Professional Documents
Culture Documents
PIC12F508/509: Memory Programming Specification
PIC12F508/509: Memory Programming Specification
PIC12F508/509: Memory Programming Specification
Pin Diagrams
1.0 PROGRAMMING THE
PIC12F508/509 PDIP, SOIC, MSOP
The PIC12F508/509 is programmed using a serial
method. The Serial mode will allow the PIC12F508/509
PIC12F508/509
VDD 1 8 VSS
to be programmed while in the user’s system. This
allows for increased design flexibility. This GP5/OSC1/CLKIN 2 7 GP0/ICSPDAT
programming specification applies to PIC12F508/509 GP4/OSC2 3 6 GP1/ICSPCLK
devices in all packages. GP3/MCLR/VPP 4 5 GP2/T0CKI
User Memory
Space
The user memory space extends from (0x000-0x1FF) On-chip User 0FFh
Program Memory 100h
on the PIC12F508 and (0x000-0x3FF) on the
PIC12F509. In Program/Verify mode, the program
memory space extends from (0x000-0x3FF) for the 1FEh
PIC12F508 and (0x000-0x7FF) for the PIC12F509. Reset Vector 1FFh
Config Memory
The first half, (0x000-0x1FF) and (0x000-0x3FF) 200h
User ID Locations
respectively, is user program memory. The second half, 203h
Space
(0x200-0x3FF) and (0x400-0x7FF) respectively, is Backup OSCCAL value 204h
configuration memory. The PC will increment from 205h
(0x000-0x1FF) and (0x000-0x3FF) respectively, then Reserved
to 0x200 and 0x400, respectively (not to 0x000). 23Fh
In the configuration memory space, 0x200-0x23F for 240h
Unimplemented
the PIC12F508 and 0x400-0x43F for the PIC12F509 3FEh
are physically implemented. However, only locations Configuration Word 3FFh
0x200-0x203 and 0x400-0x403 are available. Other
locations are reserved.
FIGURE 2-2: PIC12F509 PROGRAM
2.2 User ID Locations MEMORY MAP
000h
A user may store identification information (ID) in four On-chip User
User Memory
user ID locations. The user ID locations are mapped in Space Program
1FFh
[0x200:0x203] and [0x400:0x403], respectively. It is On-chip User 200h
recommended that the user use only the four Least Program
Significant bits (LSb) of each user ID location and Memory (Page 1) 3FEh
program the upper 8 bits as ‘1’s. The user ID locations Reset Vector 3FFh
read out normally, even after code protection is 400h
User ID Locations
enabled. It is recommended that user ID location is
Config Memory
403h
written as ‘1111 1111 bbbb’ where ‘bbbb’ is user Backup OSCCAL value 404h
Space
ID information. 405h
Reserved
2.3 Configuration Word 43Fh
440h
The Configuration Word is physically located at 0x3FF
Unimplemented
and 0x7FF, respectively. It is only available upon 7FEh
Program mode entry. Once an Increment Address Configuration Word 7FFh
command is issued, the Configuration Word is no
longer accessible, regardless of the address of the
program counter. 2.4 Oscillator Calibration Bits
Note: By convention, the Configuration Word is The oscillator calibration bits are stored at the Reset
stored at the logical address location of vector as the operand of a MOVLW instruction. Program-
0xFFF within the hex file generated for the ming interfaces must allow users to program the
PIC12F508/509. This logical address calibration bits themselves for custom trimming of the
location may not reflect the actual physical INTOSC. Capability for programming the calibration
address for the part itself. It is the respon- bits when programming the entire memory array must
sibility of the programming software to also be maintained for backwards compatibility.
retrieve the Configuration Word from the
logical address within the hex file and 2.5 Backup OSCCAL Value
granulate the address to the proper physi-
cal location when programming. The backup OSCCAL value, 0x204/0x404, is a factory
location where the OSCCAL value is stored during test-
ing of the INTOSC. This location is not erased during a
standard bulk erase, but is erased if the PC is moved
into configuration memory prior to invoking a bulk
erase. If this value is erased, it is the user’s responsibil-
ity to rewrite it back to this location for future use.
ICSPCLK
1 2 3 4 5 6 1 2 3 4 5 15 16
TDLY2
ICSPCLK
TDLY2
1 2 3 4 5 6 1 2 3 4 5 15 16
ICSPCLK
TDLY3
1 0 0 1 0 x x MSb stp_bit
ICSPDAT strt_bit
LSb
TSET1 TDLY1
THLD1
TDLY2
Next Command
1 2 3 4 5 6 1 2
ICSPCLK
0 1 1 0 x x
ICSPDAT
TSET1
THLD1
TPROG
End Programming Command
1 2 3 4 5 6 1 2
ICSPCLK
0 0 0 1 x x 0 1
ICSPDAT
TSET1 THLD1
TDIS
Next Command
1 2 3 4 5 6 1 2
ICSPCLK
0 1 1 1 x x
ICSPDAT
TSET1 THLD1
3.1.2.6 Bulk Erase Program Memory To perform a full device bulk erase of the program
memory, configuration fuses, user IDs and backup
After this command is performed, the entire program
OSCCAL, the following sequence must be performed
memory and Configuration Word is erased.
(see Figure 3-13).
Note 1: A fully erased part will read ‘1’s in every 1. Read and save 0x1FF/0x3FF oscillator calibra-
program memory location. tion bits and 0x204/0x404 backup OSCCAL bits
2: The oscillator calibration bits are erased if into computer/programmer temporary memory.
a bulk erase is invoked. They must be 2. Enter Program/Verify mode.
read and saved prior to erasing the 3. Increment PC to 0x200/0x400 (first user ID
device and restored during the program- location).
ming operation. Oscillator calibration bits
4. Perform a Bulk Erase command.
are stored at the Reset vector as the
operand of a MOVLW instruction. 5. Wait TERA to complete bulk erase.
6. Restore OSCCAL bits.
To perform a bulk erase of the program memory and
configuration fuses, the following sequence must be 7. Restore backup OSCCAL bits.
performed (see Figure 3-12).
1. Read and save 0x1FF/0x3FF oscillator
calibration bits and 0x204/0x404 backup
OSCCAL bits into computer/programmer
temporary memory.
2. Enter Program/Verify mode. PC is set to Config-
uration Word address.
3. Perform a Bulk Erase Program Memory
command.
4. Wait TERA to complete bulk erase.
5. Restore OSCCAL bits.
TERA
Next Command
1 2 3 4 5 6 1 2
ICSPCLK
1 0 0 1 x x
ICSPDAT
TSET1
THLD1
Start
Enter Programming
Mode
No PC =
Increment
Address 0x1FF/3FF?
Yes
Read Calibration
Bits and Save in
Computer/Programmer
Temp. Memory
Increment No PC =
Address 0x204/404?
Yes
Done
Start
Enter Programming
Mode
Increment No PC =
Address 0x1FF/3FF?
Yes
Read Calibration
Bits from
Computer/Programmer
Temp. Memory
Increment No PC =
Address 0x204/404?
Yes
Done
Start
Enter Programming
Mode
PC = 0x3FF/7FF
(Config Word)
Increment
Address
Wait TPROG
Report
No
Data Correct? Programming
Failure
End
Yes
Programming
Increment
Address No
All Programming
Command
Locations
Done? Wait TDIS
Yes
Exit Programming
Mode
Program
Configuration
Memory
(Figure 3-11)
Done
Start
Enter Programming
Mode
PC = 0x3FF/7FF
(Config Word)
One-Word
Programming
Cycle
(see Figure 3-10)
Data No Report
Correct? Programming
Failure
Yes
Increment Address
Command
No Address =
0x200/400?
Yes
Load Data
Command Programs User IDs
One-Word
Programming Read Data Command
Cycle
(see Figure 3-10)
Data No Report
Correct? Programming
Failure
Yes
Increment Address
Command
No Address =
0x204/404?
Yes
Done
Start
Bulk Erase Device
Done
Enter
Program/Verify mode
PC = 0x3FF/7FF
(Config Word)
Increment No PC = 0x200/400?
PC (First User ID)
Yes
Done
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
09/27/04