JOHN KEVIN DIPOLOG

Let’s Analyze

Activity 1. In this activity we will see how deeply you understand combinational circuit
particularly the encoder and decoder by answering the given questions below.
1. Design the following encoder and decoder circuit (below) which includes (1) Truth Table, (2)
Solution,
(3) Circuit Diagram using proteus.
a. Encoder
• 8 x 3 Encoder

INPUT Output
D7 D6 D5 D4 D3 D2 D1 D0 I3 I2 I1
0 0 0 0 0 0 0 0 X X X
0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 X 0 0 1
0 0 0 0 0 1 X X 0 1 0
0 0 0 0 1 X X X 0 1 1
0 0 0 1 X X X X 1 0 0
0 0 1 X X X X X 1 0 1
0 1 X X X X X X 1 1 0
1 X X X X X X X 1 1 1

Solution:

I1=D1+D3+D5+D7

I2=D2+D3+D6+D7
I3=D4+D5+D6+D7

Circuit Diagram
  16:4 Encoder
Truth Table
INPUT Output
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 I4 I3 I2 I1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X X X X
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 X 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 1 X X 0 0 1 0
0 0 0 0 0 0 0 0 0 0 0 0 1 X X X 0 0 1 1
0 0 0 0 0 0 0 0 0 0 0 1 X X X X 0 1 0 0
0 0 0 0 0 0 0 0 0 0 1 X X X X X 0 1 0 1
0 0 0 0 0 0 0 0 0 1 X X X X X X 0 1 1 0
0 0 0 0 0 0 0 0 1 X X X X X X X 0 1 1 1
0 0 0 0 0 0 0 1 X X X X X X X X 1 0 0 0
0 0 0 0 0 0 1 X X X X X X X X X 1 0 0 1
0 0 0 0 0 1 X X X X X X X X X X 1 0 1 0
0 0 0 0 1 X X X X X X X X X X X 1 0 1 1
0 0 0 1 X X X X X X X X X X X X 1 1 0 0
0 0 1 X X X X X X X X X X X X X 1 1 0 1
0 1 X X X X X X X X X X X X X X 1 1 1 0
1 X X X X X X X X X X X X X X X 1 1 1 1

Solution:
I1= D1+D3+D5+D7+D9+D11+D13+D15
I2= D2+D3+D6+D7+D10+D11+D14+D15
I3= D4+D5+D6+D7+D12+D13+D14+D15
I4= D8+D9+D10+D11+D12+D13+D14+D15

Circuit Diagram
b. Decoder

• 4 x 7 Decoder (7 Segment Decoder)

Truth Table

Input Output
D3 D2 D1 D0 A B C D E F G
0 0 0 0 1 1 1 1 1 1 0
0 0 0 1 0 1 1 0 0 0 0
0 0 1 0 1 1 0 1 1 0 1
0 0 1 1 1 1 1 1 0 0 1
0 1 0 0 0 1 1 0 0 1 1
0 1 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 1 1 1 1 1
0 1 1 1 1 1 1 0 0 0 0
1 0 0 0 1 1 1 1 1 1 1

1 0 0 1 1 1 1 1 0 1 1
1 0 1 0 1 1 1 0 1 1 1
1 0 1 1 0 0 1 1 1 1 1
1 1 0 0 1 0 0 1 1 1 0
1 1 0 1 0 1 1 1 1 0 1
1 1 1 0 1 0 0 1 1 1 1
1 1 1 1 1 0 0 0 1 1 1
Solution:
A = D0 D3’ + D2 (D0’ + D1) + D1’ (D0’ D3’ + D0 D2’) + D0’ D1 D3

B = D2’ (D1’ + D0’ D3’ + D0 D3) + D2 (D0’ D3 + D1’ D3’)

C = D0’ (D2’ + D3 + D1) + D2’ D3 + D0 D1’

D = D2’ (D0 + D1 D3) + D1’ (D2 D3 + D0’ D3’) + D1 D2 D3’

E = D0 (D1 + D2) + D3’ (D1’ + D2)

F = D0 (D1’ + D2) + D2’ (D3’ + D0’ D1) + D1 D2 D3’

G = D0’ D1 D2’ + D0 (D1’ + D3) + D2 (D1’ + D3’)

Circuit Diagram