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Lag Comp Ensator Design Using Root: Ob Jectives
Lag Comp Ensator Design Using Root: Ob Jectives
Objectives
The objective of this lab is to use Root locus techniques to adjust the
steady-state error of a closed loop system provided the condition of satisfac-
tory transient response. The students would be able to suggest a suitable
compensator Gc (s), if the root-locus plot is such that the desired performance
(in terms of steady-state error) cannot be achieved by the adjustment of the
gain K.
Theory
The lag compensator which is an approximate integral control is used to
improve the steady-state behavior of a system while preserving satisfactory
transient response. This compensation scheme is useful where there is satis-
factory transient response but unsatisfactory steady-state response.
Let’s review the effect of addition of poles on root locus of the system in Fig.
7.1 It is clear from the Fig. 7.1 that system’s root locus is moving towards
unstable region with the addition of poles. Furthermore, speed of the system
getting slow.
Now consider the effect of addition of zero on root locus of the system. in Fig
7.2 One important observation of the Fig. 7.2 is that, behavior of addition
of Zero to the root locus is exactly opposite to that of pole. Root locus is
shifting towards more stable region and speed of the system also increasing
when added zero gets more closer to the origin. In other words, location of
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Figure 7.1: General effect of addition of Poles on Root locus
the zero with respect to the origin directly affects the root locus.
The transfer function of Lag compensator is given as:
Kc (s + z)
Gc (s) = (7.1)
s+p
With |z| > |p| indicating that location of pole should be more closer to the
origin than corresponding zero which is also shown in Fig. 7.3
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Steady state error
How does a lag compensator reduces the state error?? The general formula
of closed loop steady state error is as:
u(s)
Ess = lim s. (7.2)
s→0 (1 + (Gn /Gd ))
After applying lag compensator to the same system, steady state error changes
as:
u(s)
Ess = lim s. (7.3)
s→0 (1 + (Gn (s − z)/Gd (s − p)))
For a step input u(s) = 1/s, Eq. 7.3 becomes
Gd (0).P
Ess = (7.4)
Gd (0).P + Gn (0).Z
rearranging Eq. 7.4, we get
Where, Ess−c is the desired steady state error to a unit step input. hence
we need to know the location of compensator pole and zero for a specific
required steady state error Ess−c .
Design procedure
In the phase-lag control, the controller poles and zeros are placed very close
together, and the combination is located relatively close to the origin of the s-
plane. Thus, the root-loci in the compensated system are shifted only slightly
from their original locations. The compensator contributes a magnitude of
Kc in
Kc (s + z)
Gc (s) =
s+p
K0 |G(s)H(s)| = 1
Or,
1
|G(s)H(s)| = (7.6)
K0
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For the compensated system, the magnitude criterion requires that
Or,
1
K Kc = 1 (7.7)
K0
K0
Kc = (7.8)
K
For a given desired location of a closed-loop pole s1 , the design can be
accomplished by trial and error. The procedure for approximate phase-lag
design is as follows:
1. Obtain the root-locus and determine the gain K0 to satisfy the desired
damping ratio
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Lab Tasks
1. A system is defined by the following forward transfer function and
feedback gain H(s) = 1 connected in the closed loop
1
G(s) =
(s + 1)(s + 2)(s + 10)
Obtained the root locus of open loop system GH and closed loop
step response to find Settling Time (Ts), Overshoot (OS), Steady
State Error (SSE)
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2. Design a lag-lead compensator for the system having to obtain the
followings.
4
G(s) =
s(s + 2)
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3. For the unity closed loop system, the forward transfer function is given
as
1
G(s) =
(s + 1)(s + 3)
A lead compensator was already designed to meet the transient re-
sponse specifications with following transfer function
(s + 4)
G(s) = 16
(s + 9)
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Student’s Comments
Lesson Learnt
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