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Laplace Transform
Laplace Transform
Classical Algebraic
techniques techniques
i1 (t ) + i2 (t ) − i3 (t ) + i4 (t ) = 0 I1 ( s ) + I 2 ( s ) − I 3 ( s ) + I 4 ( s ) = 0
+ v2 (t ) − + v4 (t ) −
+ + +
Kirchhoff’s voltage law (KVL) v1 (t ) v3 (t ) v5 (t )
− − −
− v1 (t ) + v2 (t ) + v3 (t ) = 0 − V1 ( s ) + V2 ( s ) + V3 ( s ) = 0
Signal Sources in s Domain
t domain s domain
i (t ) I (s )
Voltage Source: + + Voltage Source:
v(t ) = vS (t ) V ( s ) = VS ( s )
+ +
v(t ) _ vS (t ) L V (s ) _ VS (s )
i (t ) = depends _ _ I ( s ) = depends
on circuit on circuit
i (t ) I (s )
Current Source: _ _ Current Source:
i (t ) = iS (t ) v(t ) iS (t ) L V (s ) I S (s) I ( s ) = VS ( s )
v(t ) = depends + + V ( s ) = depends
on circuit on circuit
Time and s-Domain Element Models
Impedance and Voltage Source for Initial Conditions
Time Domain iR (t ) I R (s ) s-Domain
+ +
Resistor: Resistor:
vR (t ) R VR (s ) R
vR (t ) = RiR (t ) L VR ( s ) = RI R ( s )
_ _
iL (t ) I L (s )
Inductor: Inductor:
diL (t ) + +
vL (t ) = L Ls VL ( s ) = LsI L ( s ) −
dt vL (t ) L L VL (s ) _
LiL (0)
_ _ + LiL (0)
iC (t ) I C (s )
Capacitor: Capacitor:
1 t + + 1
vC (t ) = ∫ iC (τ )dτ 1 Cs VC ( s ) = I C ( s) +
C 0 vC (t ) C L VC (s ) + vC (0) Cs
+ vC (0) _ _ _
s vC( 0 )
s
Impedance and Voltage Source for Initial
Conditions
• Impedance Z(s)
voltage transform
Z ( s) =
current transform
VA
By KVL: − + VR ( s ) + VL ( s ) = 0
s
Resistor: VR ( s ) = RI ( s ) Inductor: VL ( s ) = LsI ( s ) − LiL (0)
V
− A + RI ( s) + LsI ( s) − LiL (0) = 0
s
VA L iL (0)
I (s) = +
s ( s + R L) s + R L
VA R VA R i L ( 0)
= − +
s s+R L s+R L
V A V A − RL t − t
R
Inverse Transform: i (t ) = − e + iL (0)e L u (t )
R R
forced response natural response
Series Equivalence and Voltage Division
I1 ( s )
+ V1 ( s ) − V1 ( s ) = Z1 ( s ) I1 ( s ) = Z1 ( s ) I ( s )
I (s )
+ Z1 V2 ( s ) = Z 2 ( s ) I 2 ( s ) = Z 2 ( s ) I ( s )
Rest +
of V (s) Z2 V2 ( s) I 2 ( s )
Circuit − − KVL: V ( s ) = V1 ( s ) + V2 ( s )
= ( Z1 ( s ) + Z 2 ( s )) I ( s )
Z EQ ( s ) = Z1 ( s ) + Z 2 ( s )
I (s )
Rest +
Z1 ( s )
V (s) Z V1 ( s) = V (s)
of EQ Z EQ ( s )
Circuit − Z EQ = Z1 + Z 2 Z 2 (s)
V2 ( s ) = V (s)
Z EQ ( s)
Parallel Equivalence and Current Division
I (s ) I1 ( s ) = Y1 ( s )V ( s )
+ I 2 ( s ) = Y2 ( s )V ( s )
Rest I1 ( s ) I 2 (s)
of V (s) Y Y2
1
Circuit −
KCL: I ( s ) = I1 ( s ) + I 2 ( s )
= (Y1 ( s ) + Y2 ( s ))V ( s )
YEQ ( s ) = Y1 ( s ) + Y2 ( s )
I (s )
Rest +
Y1 ( s )
V (s) Y I1 ( s ) = I ( s)
of EQ YEQ ( s )
Circuit − YEQ = Y1 + Y2 Y2 ( s)
I 2 (s) = I (s)
YEQ ( s )
Example:
Equivalence Impedance and Admittance
A L
Inductor current = 0
at t = 0
+ capacitor voltage = 0
+
_ v1 (t ) R C v2 (t ) Find equivalent impedance at A and B
_ Solve for v2(t)
B 1 1 RCs + 1
YEQ1 ( s ) = = + Cs =
Z EQ1 ( s ) R R
L R
Z EQ ( s ) = Ls + Z EQ1 ( s) = Ls +
Ls RCs + 1
A
RLCs 2 + Ls + R
+ =
+
Z EQ ZR 1 RCs + 1
_ V1 ( s ) EQ1 V2 ( s )
Cs Z EQ1 ( s )
_ V2 ( s ) = V1 ( s )
Z EQ Z EQ1 Z EQ
B
R
= V1 ( s)
RCLs + Ls + R
2
General Techniques for s-Domain Circuit
Analysis
• Node Voltage Analysis (in s-domain)
– Use Kirchhoff’s Current Law (KCL)
– Get equations of node voltages
– Use current sources for initial conditions
– Voltage source current source