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Unit III Ic 741 Op-Amp
Unit III Ic 741 Op-Amp
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DEFINITION OF 741-PIN FUNCTIONS
Pin 1 (Offset Null): Offset voltage is nulled by
application of a voltage of opposite polarity to the
offset.
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ABSOLUTE MAXIMUM RATINGS
Supply voltage : 18V
Internal power dissipation
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Analog Integrated Circuits, Unit - III, IC 741
THE 741 OP-AMP CIRCUIT
11 Bias Circuit, Short Circuit Protection, The Input
Stage, The Second Stage, The Output Stage, The
Device Parameters
Wednesday, April 25, 2012
Analog Integrated Circuits, Unit - III, IC 741
Figure 1: The 741 op-amp circuit. Q11, Q12, and R5 generate a reference bias current, IREF. Q10, Q9, and Q8 bias the input
stage, which is composed of Q1 to Q7. The second gain stage is composed of Q16 and Q17 with Q13B acting as active load.
The class AB output stage is formed by Q14 and Q20 with biasing devices Q13A, Q18, and Q19, and an input buffer Q23. 12
Transistors Q15, Q21, Q24, and Q22 serve to protect the amplifier against output short circuits and are normally cut off.
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Initially IC 741 was manufactured by “Fairchild
Corporation”.
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
BIAS CIRCUIT
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The
15
Widlar
16
There is
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Q13 is double-collector lateral pnp transistor.
The transistors Q12 and Q13 form a two-output
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
SHORT-CIRCUIT PROTECTION
CIRCUITRY
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The 741 circuit includes large number of
transistors that are normally off and conduct
only when large output current is required.
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
THE DEVICE PARAMETERS
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For the standard npn and pnp transistors, the
following parameters will be used:
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Analog Integrated Circuits, Unit - III, IC 741
DC ANALYSIS OF 741
34 Reference bias current, input stage bias, input
bias and offset current, input offset voltage,
input common range, second stage bias, output
stage bias
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For the dc analysis of an op-amp circuit, the
Input terminals are grounded.
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
INPUT-STAGE BIAS
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Transistor Q11 is biased by IREF, and the voltage
developed across it is used to bias Q10 which has
a series emitter resistance R4.
I REF
VT ln I C10 R4
I C10
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Now we can determine dc current in each of the
input-stage transistors.
I B I B1 I B 2 46
Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
INPUT OFFSET VOLTAGE
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Input offset voltage is the differential voltage
that exists between two input terminals of an op-
amp, without any external inputs applied.
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SECOND STAGE BIAS
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If we neglect the base current of Q23, then we see
that the collector current of Q17 is approximately
equal to the current supplied by current source
Q13B.
Because Q13B, has a scale current 0.75 times that
I C17
VBE17 VT ln 618mV
IS
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The collector current of Q16 is given as,
I E17 R8 VBE17
I C16 I E16 I B17
R9
Which gives, IC16 = 16.2µA
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The R04 is given by, R06 ro [1 gm ( R2 r )]
So, for Q4, re= 2.63 kΩ, ro=VA/I, VA= 50V, I = 9.5 µA,
r = (β+1)re>>re, so neglect it.
So, R06 = 18.2 MΩ.
Figure Small-signal equivalent circuit for the input stage of the 741 op amp.
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
SECOND STAGE
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Figure The 741 second stage prepared for small-signal analysis
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This is used to determine the values of the
parameters of the equivalent circuit.
Input Resistance: The resistance Ri2 is given by
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
OUTPUT STAGE
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Figure The 741 output stage.
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Analog Integrated Circuits, Unit - III, IC 741
GAIN, FREQUENCY RESPONSE
AND SLEW RATE OF 741
75 Small signal gain, frequency response, a
simplified model, slew rate, relationship
between Ft and SR
Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
GAIN
SMALL SIGNAL
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The overall small-signal gain can be found from
the cascade of the equivalent circuits.
vo v v v RL
i 2 o 2 o Gm1 ( Ro1 Ri 2 )(Gm 2 Ro 2 )Gvo 3
vi vi vi 2 vo 2 RL Rout
Gm1
A( j )
jCC
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The magnitude of the gain becomes unity at ω=ωt
Where, t m1
G
CC
t
So, ft 1 MHz
2
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
SLEW RATE
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Consider the unity-gain follower shown on
previous slide.
10 volt step is applied at the input.
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From the circuit shown on previous slide, wee see
that, output voltage ramp with a slope of 2I/CC.
2I
v0 (t ) t
CC
So the slew rate is given by: SR 2 I
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
RELATIONSHIP BETWEEN FT AND
SR
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Relationship between ft and SR can be found by:
Gm1 2I
t SR
CC CC
1 VT
As we know that Gm1
2re 2re & re
I
So, Gm1 I
SR
And we get, t
4VT
SR
Finally we get, ft
8 VT
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Wednesday, April 25, 2012 Analog Integrated Circuits, Unit - III, IC 741
ALL THE BEST FOR INTERNAL EXAMS
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