A High Efficient Medium Voltage Step-up DC/DC Converter with Zero

Voltage Switching (ZVS) and Low Voltage Stress for Offshore Wind
Energy Systems

John Lam[1], Praveen K. Jain[2]

[1]
York University
Department of Electrical Engineering and Computer Science,
Lassonde School of Engineering
Toronto, Ontario, M3J 1P3, Canada
Tel.: +1 (613) – 5399354.
E-Mail: johnlam@cse.yorku.ca
URL: http://lassonde.yorku.ca/electrical-engineering-computer-science
[2]
Queen’s University
Queen’s Centre for Energy and Power Electronics Research (ePOWER)
Kingston, Ontario, K7L 3N6, Canada
Tel.: +1 (613) – 5336829.
Fax: +1 (613) – 5336615.
E-Mail: praveen.jain@queensu.ca
URL: http://www.queensu.ca/epower/

Keywords
«Wind energy», «ZVS converters», «Resonant converter», «Renewable energy systems»

Abstract
Conventional wind farms have a medium voltage AC (MVAC) grid that collects the power from the
individual wind turbines and one or two transformer substations that facilitate high voltage AC
(HVAC) power transmission. Since the output voltage of a wind turbine is too low for effective power
transmission, it is stepped-up to a medium voltage level through individual transformers to facilitate
short distance power transmission to the substation for further voltage boost. The AC transformers are
bulky and typically located in the immediate vicinity of the turbines and in off-shore wind farms,
marginally rated transformers are usually installed in the turbine’s nacelle. In order to provide
efficient long distance power transmission from the wind farms, HVAC links are now being replaced
by high voltage DC (HVDC) links where the bulky transformers are replaced by DC/DC step-up
converters. In this paper, a new medium voltage step-up resonant DC/DC converter is proposed for
high power wind turbines in offshore wind energy systems. The proposed converter features zero
voltage switching and low voltage stress across the power transistors. Four strings of switch pairs are
connected in series in the proposed converter so that the voltage stress across each power transistor is
equal to only a quarter of the input DC voltage. The circuit’s operating principles will be discussed in
this paper. Simulation results and experimental results on a proof-of-concept prototype are provided
to highlight the merits of the proposed converter.

Introduction
Renewable energy sources, such as wind, are gaining popularity to reduce global warming and
conserve depleting sources of fossil fuel. The wind energy industry has experienced a rapid
development over the past decade during which the global installed wind capacity grew sevenfold.
Typically, offshore wind farms have a medium voltage AC (MVAC) grid that collects the power from
the individual wind turbines and one or two transformer substations that facilitate high voltage AC
(HVAC) power transmission as shown in Fig. 1. In order to provide efficient long-distance power
transmission, high voltage DC (HVDC) transmission [1]-[2] with multiple DC/DC conversion stages
[3]-[5] as shown in Fig. 2 have been presented to eliminate the bulky line frequency transformers and
inefficient high current AC cables used in the conventional AC power transmission system. In this
approach, wind turbines are first connected to a collective medium voltage DC grid (20~60kV)
through a medium voltage step-up DC/DC converter as shown by the red line in Fig. 2. A central
step-up DC/DC converter is then used to step-up the medium voltage to high voltage (> 600kV) for
HVDC transmission. Although most wind generators have output voltage of less than 1kV, as the
power ratings of commercial wind turbines increase, wind turbines with high output voltage (such as
more than 3kV) are preferable as the rated output current of the generator can be reduced [3]-[4].

Fig. 1: Medium voltage AC grid structure for offshore wind energy systems

Fig. 2: Medium voltage DC grid structure for offshore wind energy systems

With regards to the design of the medium voltage step-up DC/DC converter, several medium voltage
step-up DC/DC converter topologies have been presented in [5]-[10]. The conventional isolated full-
bridge converter requires complicated design of the medium frequency transformer due to the use of
large turns-ratio to provide the step-up voltage function. To eliminate the large turns ratio step-up
transformer, non-isolated full-bridge step-up converter has been presented in [6][8]. However, similar
to the isolated full-bridge converter, the voltage stress across each of the power transistors is equal to
the input voltage. Hence, high voltage power transistors are required. Multiple modules [7] have also
been presented to eliminate the use of the step-up transformer; one of these approaches is to cascade
multiple boost converters in series. However, the power transistors suffer from substantial amount of
switching losses due to hard switching. Recently, switched capacitor resonant converters [9]-[10]
with multiple cells have been presented for medium voltage step-up application. However, the
magnitude of the switch current depends on the number of cells needed in the topology [9]. Hence, as
the number of cells increases to provide the required medium voltage level, the switch current
increases substantially, which result in very high conduction loss in the power transistor. Moreover,
the problem of having high voltage stress across each of the power transistors remains there.
This paper proposes a new medium voltage step-up DC/DC converter topology that combines two
modular asymmetrical pulse-width modulated (APWM) resonant circuits with four strings of switch
pairs. There are several features in the proposed converter: (1) the multi-string arrangement of the
power transistors allows a voltage stress of only a quarter of the input voltage to be achieved across
each power transistor, so that low voltage power transistors can be used; (2) the two modular APWM
CL resonant circuits are able to achieve high voltage gain without using large turns ratio transformer;
(3) the parallel resonant inductor can be integrated into the high frequency transformer so that the
number of magnetic components used in the converter is reduced. The circuit’s operating principles
and its characteristics will be discussed in this paper. Simulation results will then be given on a 3MW,
4kV/40kV system to highlight the merits of the proposed circuit. Finally, experimental results on a
proof-of-concept prototype will also be provided.

Descriptions of the proposed converter

The proposed converter is shown in Fig. 3. The input side consists of 8 switches that are arranged so
that two pairs of 4 switches are connected to an APWM CL parallel resonant circuit. The switch
voltage is then equal to a quarter of the input DC voltage (Vi). In the two resonant circuits, the series
capacitors (Cs1 & Cs2) block the DC component in vs1 and vs2 and form the resonant circuit with the
parallel inductors (Lp1 & Lp2) or the magnetizing inductance of the two transformers. The resonant
inductors (Lp1 & Lp2) can be integrated with the transformers to further reduce the number of magnetic
components in the circuit. The step-up voltage function is achieved by operating the switching
frequency close to the resonant point. Since the output voltage of the resonant circuit can become
quite sensitive to the switching frequency when the resonant circuit is designed to provide high step-
up voltage ratio, the proposed converter is a constant frequency circuit with duty ratio control. By
operates the resonant current slightly lagging behind the input voltage (vs1 or vs2) in each resonant
circuit, ZVS is achieved at the turn-on instant of all the switches. Snubber capacitors are added across
each of the transistors to minimize the turn-off switching losses of S1-S8.

Fig. 3: Proposed DC/DC step-up resonant converter

Operating principles of the proposed converter
As mentioned earlier, the proposed circuit is a constant frequency resonant converter, with Vo being
regulated by controlling the duty cycle (d) of the inner switch pairs (S2, S3, S6 and S7). The outer
switches (S1, S4, S5, S8) are then operated with a duty ratio of (1-d). The circuit operating principles
can be explained by the steady-state operating waveforms shown in Fig. 4. In general, there are six
operating stages within a switching period (Ts). The operating stages are shown in Fig. 5.

[t0<t<t1]: the gate signals are applied to S1, S4, S5 and S8, due to the negative resonant current in both
resonant circuits, the anti-parallel diodes of S1, S4, S5 and S8 are forced to turn on. Due to the positive
current of ir, Dr1 and Dr4 are forced to turn on. Meanwhile, the voltage across S2, S3, S6 and S7 are all
clamped to capacitor (C1, C2, C3 or C4) voltage, which is equal to Vi/4.

[t1<t<t2]: the gate signals are still applied to S1, S4, S5 and S8, the negative resonant currents in the
previous stage now become positive, and S1, S4, S5 and S8 are turned on under ZVS.

[t2<t<t3]: the gate signals are still applied to S1, S4, S5 and S8, at the same time, the output voltage of
the resonant circuits reverse its polarity, Dr2 and Dr3 turn on.

[t3<t<t4]: the gate signals that were applied to S1, S4, S5 and S8 are now removed and are applied to S2,
S3, S6 and S7,. Since the resonant current in both resonant circuits are positive, the anti-parallel diodes
of S2, S3, S6 and S7 are forced to turn on. Meanwhile, the voltage across S1, S4, S5 and S8 are all
clamped to capacitor (C1, C2, C3 or C4) voltage, which is equal to Vi/4.

[t4<t<t5]: the positive resonant currents in the previous stage now become negative, S2, S3, S6 and S7
are then turned on under ZVS.

[t5<t<t6]: the gate signals are still applied to S2, S3, S6 and S7, at the same time, the output voltage of
the resonant circuits reverse its polarity, Dr1 and Dr4 turn on.

Fig. 4: Steady-state operating waveforms

 ii iS1
iS1
t3 < t < t4
S1 Cs1
+ C1 S1 Cs1 t2 < t < t3 + C1 iS2
Vi /4 S2
Vi /4
_ S2 ires1
_ + ires1 Np1 : Ns1 Np1 : Ns1
+ +
vo1 vo1
vs1 _ _
S3 iS3
Lm1 Lo Lm1
_ + S3
+ Lo
C2 +
Vi /4 S4
ir Dr1 Dr2 +
+ _ Vi /4 C2 S
Vi _ + Co _
4
ir Dr1 Dr2
+
S5
v_r Vo Vi _ + Co
v_r Vo
S5
+ Cs2 Dr3 Dr4
Vi /4 C3 _ + Cs2 Dr3 Dr4
S6 C3 _
_ + ires2 Np2 : Ns2 Vi /4 S6
+ _ ires2
Np2 : Ns2
vs2 vo2 +
S7 _ vo2
+ Lm2 S7 _
_ Lm2
Vi /4 C4 +
_ Vi /4 C4
S8
_ S8
iS8

Fig. 5: Operating stages of the proposed converter

In general, the voltage across the input of each resonant circuit is given by (1), where the phase angle
(θn) is given by (2) and n represents the nth harmonics in vs1 and vs2. The series capacitors (Cs1 and
Cs2) block the DC component in (1). The analysis on the resonant circuit modules can be performed
based on the AC circuit model shown in Fig. 6, where RL represents the equivalent resistance of the
output rectifier.
Assuming the harmonics content is negligible in the resonant circuits, by considering only the
fundamental component in (1), the voltage gain equation of the CL resonant circuit can be obtained as
given by (3), where ωr is the relative operating angular frequency (i.e. ω/ωo); Qk is the loaded quality
factor given by (4) and Req is the equivalent load resistance. A plot of (3) is shown in Fig. 7(a). With
a relatively large Qk chosen in the resonant circuit, where k = 1 or 2 represents the kth module of the
resonant circuit, Fig. 7(a) shows that high voltage gain can be achieved between vs1 or vs2 and vo1 or
vo2. The phase angle (ϕ) between vs1 or vs2 and the resonant currents is given by (5), where mk = ωr/Qk,
is plotted in Fig. 7(b). The operating region to achieve high voltage gain and ZVS is highlighted in
pink. The peak value of the switch current is almost equal to the peak value of the fundamental
component of the resonant current and is given by (6).

Fig. 6: Fundamental AC circuit analysis

v s ,k =
Vi
dk k =1, 2
+ ∑⎜ i
⎛ V
1 − cos 2nπ d k ( k =1, 2
)sin(2πnft + θ n )⎞⎟ (1)
2 n =1 ⎝ 2 nπ
k =1, 2
⎠

⎜
(
⎛ sin 2 π n d k k =1 , 2 ) ⎞
⎟
θ n = tan
( )
−1
(2)
⎜ 1 − cos 2 π n d k ⎟
⎝ k =1 , 2 ⎠

v ok ω r2
(ω r , Qk ) = (3)
v sk ⎛ω ⎞
2
k =1, 2
(1 − ω ) 2 2
r + ⎜⎜ r ⎟
⎟
⎝ Qk ⎠ k =1, 2

Req
Qk = (4)
k =1, 2
ωo Lm,k k =1, 2
⎛ mk 1 ⎞
⎜ + ⎟
⎜ − mk − 1 ω r Qk
2

(
φ ω r , Qk k =1, 2
) = tan −1 ⎜
m k2
k =1, 2 ⎟
⎟ (5)
⎜ ⎟
⎜ − (m k ) − 1
2 ⎟
⎝ ⎠

Vi 1 − cos (2π d k ) (6)

i res , max, k =
k =1, 2
2π ⎛ 1 ⎞
2
⎛ 1 ⎞
2
⎛ 1 ⎞
2

⎜⎜ −2
⎟⎟ + ⎜⎜ ⎟⎟ ⎜⎜ 1 + −2
⎟⎟
⎝ 1 + mk ⎠ ⎝ mk ⎠ ⎝ 1 + mk ⎠ k =1, 2
 5.5 1.5

5 Q = 1
Q = 2 1
4.5 Q = 3
Q = 4
4 Q = 5 0.5
3.5

phase angle [rad]

voltage gain

0
3

2.5 Q=2
-0.5
2
Q=3
Q=4
1.5 -1 Q=5

1
-1.5
0.5

0 -2
0 0.5 1 1.5 2 2.5 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
relative operating frequency relative operating frequency

(a) (b)
Fig. 7: (a) Voltage gain plot of the resonant circuit (b) Phase plot of the input impedance of the CL
resonant circuit

Extended topologies of the proposed DC/DC converter

The proposed converter topology can be extended to consist of more than two resonant circuit
modules and more switch pairs. An example of the extended topology that consists of three resonant
circuit modules and 12 switches is shown in Fig. 8. Features of this circuit include: (1) voltage stress
across each power transistor is only 1/6 of the input voltage; (2) the high voltage stress across each of
the resonant magnetic components is now reduced to 1/3 of the output voltage; (3) the turns ratio of
Lm1, Lm2 and Lm3 can remain at unity. However, as the number of transistors increases, the transistors
driver structure becomes more complicated. In general, for k modules of resonant circuits in the
converter, the voltage stress across each power transistor is given by (7).

Fig. 8: Extended topology: 3 modules of resonant circuit with a voltage stress of Vi/6

Vi
vtransistor = (7)
2k
Results and Performance
Simulation results
To verify with the theoretical analysis and highlight the features of the proposed converter, a 3MW
converter system with an output DC voltage of 40kV is simulated in PSIM. The input voltage of the
converter is 4kV. The switching frequency is 23 kHz. The IGBT model used in the simulation has a
diode forward voltage drop of 1.8V and Vce,sat = 2.4V. The resonant circuit components are calculated
to be: Cs1 = Cs2 = 0.68µF; Lm = 96µH. Lo is 1mH and Co is 10µF. Fig. 9 shows the waveforms of the
switch current (is1 and is2) and voltage (vds1 and vds2) at full power condition. Fig. 10 shows the case
when the output power changes, for example in this case, the power is decreased to 0.8MW. In both
cases, ZVS is achieved in all the switches. The turn off switching loss is minimized by adding a
snubber capacitor of 0.33µF across each transistor. As shown in Fig. 9 and 10, the turn off switching
losses are reduced. An efficiency of at least 93% is achieved in both conditions.
3K
2K
1K
is2 is1
0K
-1K
-2K

1500

1000
vds2 vds1
500

-500

50K

45K

40K
Vo
35K

30K

80
78
76 Io
74
72
70
0.03896 0.03898 0.039 0.03902
Time (s)

Fig. 9: switch current; switch voltage and output waveforms at 3MW, 40kV output
2K

1K
is2 is1
0K

-1K

800
600
400 vds2 vds1
200
0
-200

50K

45K

40K
Vo
35K

30K

24
22
20
Io
18
16
0.0313 0.03132 0.03134 0.03136
Time (s)

Fig. 10: switch current; switch voltage and output waveforms at 0.8MW, 40kV output
Experimental results
A proof-of-concept 600W prototype has been designed and tested at the laboratory to validate with the
simulation results. The rated input voltage is 185V and the output voltage is 1kV. Capacitors (C1 –
C4) are: B32526T1336K (33µF). The transistors (S1 – S8) are: IRFP048NPBF (55V), output diodes
(Dr1 – Dr4) are: FFPF10F150STU (1.5kV). The switching frequency is 21 kHz. The resonant
capacitor is 0.22µF and Lm1 and Lm2 are 293µH. Fig. 11 shows the switch operating waveforms for
only two switch pairs and the output voltage for two different power conditions (full power at a duty
ratio of 0.35 and 20% load at an input voltage of 120V with a duty ratio of 0.44). A snubber capacitor
of 8.2nF is added across each transistor. ZVS operations of all switches are observed from these
waveforms. An efficiency of 94.2% is obtained at full power condition and 91.1% at 20% load
condition.

(a) at full power

(b) at 20% load

Fig. 11: (a) Vo (green: 300/div); is2 (red: 7.5A/div); is1 (orange: 7.5A/div); vds2 (blue: 25V/div)
(b) Vo (green: 300/div); is2 (red: 7.5A/div); is1 (orange: 7.5A/div); vds2 (blue: 25V/div)

Conclusion
A step-up resonant DC/DC converter with zero voltage switching and low voltage stress across the
power transistors has been presented in this paper for high power wind turbines in offshore wind
energy systems. The proposed topology consists of multiple strings of switch pairs and multiple
modules of resonant circuits. This design allows low voltage stress to be achieved across each power
transistor and components stress across the resonant capacitors and magnetic components. The
APWM controlled CL resonant circuits used in the proposed topology is able to step-up the input
voltage to provide the required voltage level for the medium voltage DC grid in offshore wind energy
systems. Finally, simulation results and experimental results on a proof-of-concept prototype have
been provided to validate with the theoretical analysis of the proposed circuit.
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