A Project Report

On

IMPLEMENTING DCF IN FPGA

Submitted to
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPUR, ANANTHAPURAMU
In Partial Fulfillment of the Requirements for the Award of the Degreeof
BACHELOR OF TECHNOLOGY
In
ELECTRONICS& COMMUNICATION ENGINEERING
Submitted By

K.VISHNU SAI - (18699A04A8)

S.MOHAMMAD FAZIL - (19690A0415)
S.GUNA SEKHAR - (19690A0417)

Under the Guidance of

Dr. Miriyala Mahesh, Ph.D.,.
Assistant Professor
Department of Electronics & Communication Engineering

MADANAPALLE INSTITUTE OF TECHNOLOGY & SCIENCE

(UGC – AUTONOMOUS)
(Affiliated to JNTUA, Ananthapuramu)
Accredited by NBA, Approved by AICTE, New Delhi
AN ISO 9001:2008 Certified Institution
P. B. No: 14, Angallu, Madanapalle – 517325
2017-2021
 DEPARTMENT OF ELECTRONICS & COMMUNICATION
ENGINEERING

BONAFIDE CERTIFICATE

This is to certify that the project work entitled “IMPLEMENTING DCF IN FPGA” is a
bonafide work carried out by

K.Vishnu Sai - (18699A04A8)

S.MOHAMMAD FAZIL - (19690A0415)
S.GUNA SEKHAR - (19690A0417)

Submitted in partial fulfillment of the requirements for the award of degree Bachelor of
Technology in the stream of Electronics &Communication Engineering in
Madanapalle Institute of Technology & Science,Madanapalle, affiliated to Jawaharlal
Nehru Technological University Anantapur, Ananthapuram during the academic year
2020-2021.

Guide Head of the Department

Dr.Miriyala Mahesh,Ph.D., Dr.S. Rajasekaran, Ph.D.,
Assistant Professor, Professor and Head,
Department of ECE. Department of ECE.

Submitted for the University examination held on:

Internal Examiner External Examiner

Date: Date:
 ACKNOWLEDGEMENT

I express my sincere and heartfelt gratitude to Dr.Miriyala Mahesh,Ph.D.,,

Assistant Professor in Dept. of E.C.E, M.I.T.S, Madanapalle who has guided me in
completing the Project with his/her cooperation, valuable guidance and immense help in
giving the project a shape and success. I am very much indebted to him/her for suggesting
a challenging and interactive project and his valuable advice at every stage of this work.

We are extremely grateful to Dr.S.Rajasekaran, Ph.D.,Professor and Headof ECE for her
valuable guidance and constant encouragement given to us during this work.

We sincerely thank Dr. C. Yuvaraj, M.E., Ph.D., Principal for guiding and providing
facilities for the successful completion of our project at Madanapalle Institute of
Technology & Science, Madanapalle.

We sincerely thank the MANAGEMENT of Madanapalle Institute of

Technology & Science for providing excellent infrastructure and lab facilities that helped
me to complete this project.

We would like to say thanks to other Faculty of ECE Department and also to our
friends and our parents for their help and cooperation during our project work.
 DECLARATION

We hereby declare that the results embodied in this project“ IMPLEMENTING

DCF IN FPGA ” by us under the guidance of, Dr . Miriyala Mahesh, Ph . D, Assistant
Professor, Dept. of ECE in partial fulfillment of the award of Bachelor of
Technology in Electronics and Communication Engineering, MITS, Madanapalle
from Jawaharlal Nehru Technological University Anantapur, Ananthapuramu and
we have not submitted the same to any other University/institute for award of any
other degree.

Date :
Place :

PROJECTASSOCIATES
K.Vishnu Sai (18699A04A8)
S.MOHAMMAD FAZIL(19690A0415)
S.GUNA SEKHAR(19690A0417)

I certify that above statement made by the students is correct to the best of my
knowledge.

Date : Guide
 ABSTRACT

Table of Contents

S.N TOPIC PAGE NO.

O

1. INTRODUCTION 1
1.1 Motivation 2
1.2 Problem Definition 2
1.3 Objective of the Project 2
1.4 Limitations of Project 3
1.5 Organization of Documentation 3
2. LITERATURE SURVEY 6
2.1 Introduction 7
2.2 Existing System 16
2.3 Disadvantages of Existing System 16
2.4 Proposed System 16
2.5 Advantages over Existing System 16
3. ANALYSIS 17
3.1Introduction 18
3.2 Software Requirement Specification 19
3.3 Content diagram of Project 21
4. DESIGN 22
4.1 Introduction 23
4.2 ER/UML Diagrams 23
4.3 Module Design and Organization 40
4.4 Conclusion 40
5. IMPLEMENTATION AND RESULTS 41
5.1 Introduction 42
5.2 Implementation of key functions 44
5.3 Method of Implementation 48
5.4 Output Screens and Result Analysis 49
5.5 Conclusion 60

6. TESTING AND VALIDATION 61

6.1 Introduction 62
6.2 Design of Test cases and Scenarios 64
6.3 Validation 68
6.4 Conclusion 70
7. CONCLUSION 71
7.1 Conclusion 72
8. REFERENCES 73
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 CHAPTER 1
INTRODUCTION
1.1MOTIVATION

In recent years, much interest has been involved in the design of wireless networks for
local area communication. Study group 802.11 was formed under IEEE Project 802 to
recommend an international standard for Wireless Local Area Networks (WLAN’s). The
final version of the standard has recently appeared and provides detailed medium access
control (MAC) and physical layer (PHY) specification for WLAN’s. In the 802.11
protocol, the fundamental mechanism to access the medium is called distributed
coordination function (DCF). This is a random access scheme, based on the carrier sense
multiple access with collision avoidance (CSMA/CA) protocol. Retransmission of
collided packets is managed according to binary exponential backoff rules. The standard
also defines an optional point coordination function (PCF), which is a centralized MAC
protocol able to support collision free and time bounded services. In this paper we limit
our investigation to the DCF scheme. DCF describes two techniques to employ for packet
transmission. The default scheme is a two-way handshaking technique called basic access
mechanism. This mechanism is characterized by the immediate transmission of a positive
acknowledgement (ACK) by the destination station, upon successful reception of a packet
transmitted by the sender station.

1.2 PROBLEM STATEMENT

Implementing DCF in FPGA.

1.3 OBJECTIVES OF THE PROJECT

The objective of the project is to implement distribution coordination

function(DCF) in field programmable gate array (FPGA) using VHDL
modelling techniques.
Advantages:
i.

1.4 LIMITATIONS OF PROJECT

1.5 INTRODUCTION TO DCF

The DCF protocol describes two techniques for wireless packet switching. The basic
scheme is a two-way handshaking technique; this mechanism is characterized by the
immediate transmission of a positive ACK (acknowledgement) by the destination node,
upon successful reception of a packet transmitted by the source node. In addition, the
IEEE 802.11 standard defines a four-way handshaking, known as RTS/CTS (request-to-
send/clear-to-send), to be optionally used. In RTS/CTS mechanism, the source node
sends an RTS frame, instead of the DATA frame, when successfully completing for the
shared channel; the destination node acknowledges the reception of this RTS frame by
sending back a CTS frame; then, normal packet (i.e. DATA) transmission and ACK
response occur.

1.6 CONCEPTS
 CHAPTER 2
LITERATURE REVIEW
2.1 INTRODUCTION

IEEE 802.11 Distributed coordination function (DCF) is a wireless local area network
standard. When using the wireless channel for data transmission, each node cannot detect
the occurrence of data collision, so the DCF mechanism Using a random multiple access
technology, if a node wants to send data, first to seize the channel, after the success of the
data frame to send; at the same time each node can listen to the status of the line, the line
is busy or conflict , Each node adjusts the data transmission time, thus reduces the
competition in the channel, enhances the channel utilization rate.

2.2 LITERATURE SURVEY

2.2.1 IEEE802.11 TERMS

As technology advancement in the 21st century wireless communication had been the
most popular choices of communication. More and more people are tuning into wireless
due to the convenience of mobility. Although wireless communications are considerably
advance nowadays, but continuous researches and developments are essential
requirements to bring wireless communication performance a leap further forward. The
VHDL (Very High Speed Hardware Description Language) is defined in IEEE as a tool
of creation of electronics system because it supports the development, verification,
synthesis and testing of hardware design, the communication of hardware design data and
the maintenance, modification and procurement of hardware. It is a common language
used for electronics design and development prototyping. IEEE802.11b is one of the
many standards for wireless communication in the radio frequency range. IEEE802.11b
defined the Medium Access Control layer (MAC) for wireless local area networks . The
lower sublayer of the MAC protocol is the Distribution Coordination Function (DCF) that
utilizes the random access method of carrier sense multiple access with collision
avoidance (CSMA/CA) to support asynchronous date traffic. Since random access is not
appropriate for real-time periodic traffic, a scheduling technique called the Point
Coordination Function (PCF) is implemented on top of DCF to support real-time traffic,
based on polling that is controlled by a centralized point coordinator. There are few
CSMA/CA protocol had been model , but the ways and purposes of model CSMA/CA
protocol are unlike ours. Modeling CSMA/CA protocol with VHDL allowed us-to build
up a software component that is ready-to-used in wireless development prototyping. This
could be conveniently being used as a substitution of hardware and consequently to cost
reduction.

2.2.2 FPGA BASED SYSTEM

A field-programmable gate array (FPGA) is an integrated circuit designed to be

configured by a customer or a designer after manufacturing – hence the term field
programable. The FPGA configuration is generally specified using a hardware description
language (HDL), similar to that used for an application-specific integrated circuit (ASIC).
FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable
interconnects allowing blocks to be wired together. Logic blocks can be configured to perform
complex combinational functions, or act as simple logic gates like AND and XOR. In most
FPGAs, logic blocks also include memory elements, which may be simple flip-flops or more
complete blocks of memory. Many FPGAs can be reprogrammed to implement different logic
functions, allowing flexible reconfigurable computing as performed in computer software.

2.3 EXISTING SYSTEM

CHAPTER-6
CONCLUSION
6.1 CONCLUSION
CHAPTER-7

REFERENCES
7.1 REFERENCES

 [1] WL Pang, KW Chew, Florence Choong, and ES Teoh. VHDL modeling of the
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Instrumentation, Measurement, Circuits and Systems, pages 15–17. Citeseer,
2007.
 [2] Ma Kang. Wireless communication channel technology research [j]
Information and Communication, 2014,0 (10): 218-218.
 [3] Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY)
Specifications, IEEE Std. 802.11-2007 (Revision of IEEE Std 802.11-1999), June,
2007.
 [4] Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY)
Specifications, IEEE Std. 802.11-2007 (Revision of IEEE Std 802.11-1999), June,
2007.
 [5] D. Malone; K. Duffy; D. Leith, “Modeling the 802.11 Distributed Coordination
Function in Nonsaturated Heterogeneous Conditions,” IEEE/ACM Transactions on
Networking, vol.15, no.1, pp.159-172, Feb. 2007.
 [6] G. Bianchi, A. Di Stefano, C. Giaconia, L. Scalia, G. Terrazzino, I. Tinnirello,
“Experimental assessment of the backoff behavior of commercial IEEE 802.11b
network cards,” the 26th IEEE International Conference on Computer
Communications (INFOCOM 2007), pp.1181-1189, May 2007.
 [7] G. Hueber, R. Stuhlberger, A. Springer, “An Adaptive Digital Front-End for
Multimode Wireless Receivers,” IEEE Transactions on Circuits and Systems II:
Express Briefs, vol.55, no.4, pp.349-353, April 2008.
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Architecture,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol.55,
no.4, pp.369-373, April 2008.
 [9] W. Xiao, Z. Fang, Y. Shi, “The design and implementation of the IEEE 802.11
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vol.24, no.2, pp.232- 237, 2007.
 [10] W. L. Pang, K. W. Chew, F. Choong, E. S. Teoh, “VHDL modeling of the
IEEE802.11b DCF MAC,” the 6th WSEAS International Conference on
Instrumentation, Measurement, Circuits and Systems, pp.28-33, Hangzhou,
China, April 2007.
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 [12] XILINX, available at http://www.xilinx.com/

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