Schematic Lenovo D300S-14 Wistron LT41 Tesla SKL-U 14292-1 Rev - 1

5 4 3 2 1
D D
Tesla Schematics
Skylake-U
C C
B B
A BOM1 A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
A3
Tesla SKL-U -1
Date: Tuesday, July 21, 2015 Sheet 1 of 102
5 4 3 2 1
5 4 3 2 1
Project code: CHARGER

BQ24780RUYR 44
PCB P/N: 14292-1 INPUTS OUTPUTS
Revision: -1
Tesla SKL-U Block Diagram AD+
BT+
DCBATOUT
SYSTEM DC/DC
IO Board: TPS51275CRUKR 45
DDR3L INPUTS OUTPUTS
1600 3D3V_AUX_S5
DDR3L 1333/1600MHz Channel B
D 5V_PWR_2 D
SODIMM B DCBATOUT 5V_S5
GPU 13
3D3V_S5
Intel CPU CPU Core Power
VRAM(DDR3L) *4 N16S-GT
PCIe x 4 Skylake U NCP81208MNTXG 46~50
33
2GB (Single Rank) N16V-GM LAN 10/100/1000 RJ45 NCP81382MNTXG x 2
81,82,83,84
DDR3L 28W (UMA only) PCIe x 1
RealTek RTL8111H NCP81382MNTXG(23e)
76,77,78,79,80
15W (UMA&DIS)
30
Conn. NCP81253MNTBG
INPUTS OUTPUTS
27MHz DCBATOUT VCC_CORE
25MHz PCB LAYER DCBATOUT +VCCGT
SKL PCH-LP
L1:Top DCBATOUT +V_VCCGTUS_VR
10 USB 2.0/1.1 ports PCIe x 1 NGFF WLAN L2:VCC (23e only)
6 USB 3.0 ports L3:Signal
W/ Bluetooth L4:Signal DCBATOUT+VCCSA_VR
High Definition Audio
USB2.0 x 1 COMBO L5:GND
3 SATA ports
61 L6:Signal DDR3L SUS
6 PCIE ports TPS51716RUKR 51
HDMI V1.4a HDMI LPC I/F INPUTS OUTPUTS

57 ACPI 5.0
LPC BUS LPC debug port DCBATOUT 1D35V_S3
C 65 0D65V_S0 C
14.0"/15.6" (FHD) eDP CPU VCCIO 0.975V

Thermal RT8068AZQWID 52
SMBUS
KBC NUVOTON INPUTS OUTPUTS
Touch Screen USB2.0 x 1 NCT7718W 26
3D3V_S5 +VCCIO_VR
NPCE285
PWM CPU VCCPRIM_CORE
24 FAN 0.95V
26
Camera (HD) USB2.0 x 1
TPS22961DNYT 52
52
D-MIC SPI INPUTS OUTPUTS
3D3V_S5 VCCPRIM_CORE
PS2 Int. G-Sensor
SPI LIS3DETR CPU DCDC-V1D00A
HDA Flash ROM KB 70
AOZ1268QI 53
16MB
2CH SPEAKER CODEC 25 INPUTS OUTPUTS
(2CH 2W/4ohm) DCBATOUT 1D0V_S5
Realtek HDA
ALC3240 Clickpad LDO-V1D5V
I2C TLV70215DBVR 54
27
B 62 INPUTS OUTPUTS B
MIC_IN/GND 3D3V_S5 1D5V_S0
LDO-V1D8V
HP_R/L RT9025-25ZSP 54
29 VCCSTG
Universal Jack INPUTS OUTPUTS
HDD M5938ARD1U
SATA(Gen3) x 1 3D3V_S5 1D8V_S5
IO Board INPUTS OUTPUTS
60 5V/3V S0
USB2(USB2.0) USB2.0 x 1 +V1.00DX
(14874-SX) 1D0V_S5 40 G5016KD1U 40
32.768KHz VCCST INPUTS OUTPUTS
M5938ARD1U 5V_S5 5V_S0
SD Card Slot CardReader 24MHz INPUTS OUTPUTS
3D3V_S5 3D3V_S0
SDR104 USB3.0 x 1 1D0V_S5 +V1.00U_CPU

EOPIO/EDRAM (23e)
40 TPS22961DNYT 52
SSD/MMC GL3213L
INPUTS OUTPUTS
1D0V_S5 +V_EDRAM_VR
1D0V_S5 +V_EOPIO_VR
Left side 3D3V VGA

USB3.0 x 1,USB2.0 x 1 G5016KD1U 86
USB1&2 INPUTS OUTPUTS
A
(USB3.0) USB3.0 x 1,USB2.0 x 1
USB Charger 3D3V_S0
3D3V_S0
+V_EDRAM_VR
A
+V_EOPIO_VR
TPS2544 34
BOM1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Block Diagram
C
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = CPU

+VCCST_CPU
1
R419
+VCCSTG
+VCCSTG = 1.0 V 1KR2J-1-GP +VCCSTG = 1.0 V
2
R420 +VCCSTG
PCH_THERMTRIP
D 1
DY 2 H_THERMTRIP# 40 D
1
R401 0R2J-2-GP
[PECI] and [PROCHOT#] Rb 1KR2J-1-GP
Impedance control: 50 ohm TP401 CPU1D 4 OF 20
TPAD14-OP-GP
2
1 H_CATERR# D63 SKYLAKE_ULT
CATERR#
24 H_PECI A54 PECI
499R2F-2-GP 1 R403 2 H_PROCHOT#_R C65 JTAG
24,44,46 H_PROCHOT# PROCHOT#
PCH_THERMTRIP C63 PCH_JTAG_TDO 1 2
Ra THERMTRIP#
TPAD14-OP-GP TP402 1SKTOCC# A65 SKTOCC# PROC_TCK B61 PROC_TCK 99 51R2J-2-GP R407
CPU MISC D60 PROC_TDI 99
C55
PROC_TDI
A61 DY
BPM#[0] PROC_TDO
#543016 Rev0.7: Ra = 500 ohm / Rb = 1k ohm D55 BPM#[1] PROC_TMS C60 PROC_TMS 99
#544669 Rev0.52: B54 BPM#[2] PROC_TRST# B59 PROC_TRST# 99
Ra = 56 ohm (TO BE CHANGED TO 100 OHMS) / Rb = 62 ohm and 150 ohm C56 BPM#[3]
TP403 1 GPP_E3/CPU_GP0 A6 B56 PCH_JTAG_TCK 99

TPAD14-OP-GP GPP_E3/CPU_GP0 PCH_JTAG_TCK
A7 GPP_E7/CPU_GP1 PCH_JTAG_TDI D59
BA5 GPP_B3/CPU_GP2 PCH_JTAG_TDO A56 PCH_JTAG_TDO 99
TP404 1 GPP_B4/CPU_GP3 AY5 C59 PROC_TCK R406 1 2 51R2J-2-GP
TPAD14-OP-GP GPP_B4/CPU_GP3 PCH_JTAG_TMS
PCH_TRST# C61
2 1 CPU_POPIRCOMP AT16 PROC_POPIRCOMP JTAGX A59 DY
49D9R2F-GP 2 R412 1 PCH_POPIRCOMP AU16
49D9R2F-GP 2 R413 PCH_OPIRCOMP
1EDRAM_OPIO_RCOMP H66 OPCE_RCOMP
49D9R2F-GP 2 R414 1 EOPIO_RCOMP H65
49D9R2F-GP R415 OPC_RCOMP
SKYLAKE-U-GP
C C
071.SKYLA.000U
(#543016) PROCHOT# Routing Guidelines
B B
M1,2,3,4,5: <3 inches

M6: 1-11 inches
MCPU: 0.3-1.5 inches
Mt <0.3 mils
Main route(M1+M2+M3+M4+M5+M6+MCPU): 1-12 inches
A BOM1 A
Wistron Corporation
Title
CPU_(JTAG/CPU SIDE BAND)

A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = CPU

DDR3L ball type: Interleaved Type
13 M_B_DQ[63:0]
D D
CPU1C 3 OF 20
CPU1B 2 OF 20
SKYLAKE_ULT AY39 SKYLAKE_ULT AN45

DDR0_DQ[32]/DDR1_DQ[0] DDR1_CKN[0] M_B_CLK#0 13
AL71 AU53 AW39 AN46
DDR0_DQ[0] DDR0_CKN[0] DDR0_DQ[33]/DDR1_DQ[1] DDR1_CKN[1] M_B_CLK#1 13
AL68 AT53 AY37 AP45
DDR0_DQ[1] DDR0_CKP[0] DDR0_DQ[34]/DDR1_DQ[2] DDR1_CKP[0] M_B_CLK0 13
AN68 AU55 AW37 AP46
DDR0_DQ[2] DDR0_CKN[1] DDR0_DQ[35]/DDR1_DQ[3] DDR1_CKP[1] M_B_CLK1 13
AN69 AT55 BB39
DDR0_DQ[3] DDR0_CKP[1] DDR0_DQ[36]/DDR1_DQ[4]
AL70 BA39 AN56
DDR0_DQ[4] DDR0_DQ[37]/DDR1_DQ[5] DDR1_CKE[0] M_B_CKE0 13
AL69 BA56 BA37 AP55
DDR0_DQ[5] DDR0_CKE[0] DDR0_DQ[38]/DDR1_DQ[6] DDR1_CKE[1] M_B_CKE1 13
AN70 BB56 BB37 AN55
DDR0_DQ[6] DDR0_CKE[1] DDR0_DQ[39]/DDR1_DQ[7] DDR1_CKE[2]
AN71 AW56 AY35 AP53
DDR0_DQ[7] DDR0_CKE[2] DDR0_DQ[40]/DDR1_DQ[8] DDR1_CKE[3]
AR70 AY56 AW35
DDR0_DQ[8] DDR0_CKE[3] DDR0_DQ[41]/DDR1_DQ[9]
AR68 AY33 BB42
DDR0_DQ[9] DDR0_DQ[42]/DDR1_DQ[10] DDR1_CS#[0] M_B_CS#0 13
AU71 AU45 AW33 AY42
DDR0_DQ[10] DDR0_CS#[0] DDR0_DQ[43]/DDR1_DQ[11] DDR1_CS#[1] M_B_CS#1 13
AU68 AU43 BB35 BA42
DDR0_DQ[11] DDR0_CS#[1] DDR0_DQ[44]/DDR1_DQ[12] DDR1_ODT[0] M_B_DIMB_ODT0 13
AR71 AT45 BA35 AW42
DDR0_DQ[12] DDR0_ODT[0] DDR0_DQ[45]/DDR1_DQ[13] DDR1_ODT[1] M_B_DIMB_ODT1 13
AR69 AT43 BA33
DDR0_DQ[13] DDR0_ODT[1] DDR0_DQ[46]/DDR1_DQ[14] M_B_A5
AU70 BB33 AY48
DDR0_DQ[14] M_B_DQ32 DDR0_DQ[47]/DDR1_DQ[15] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A9
AU69 BA51 AU40 AP50
M_B_DQ0 DDR0_DQ[15] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_B_DQ33 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] M_B_A6
AF65 DDR0_DQ[16] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] BB54 AT40 BA48
M_B_DQ1 DDR1_DQ[0]/DDR0_DQ[16] M_B_DQ34 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] M_B_A8
AF64 DDR0_DQ[17] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] BA52 AT37 BB48
M_B_DQ2 DDR1_DQ[1]/DDR0_DQ[17] M_B_DQ35 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] M_B_A7
AK65 AY52 AU37 AP48
DDR1_DQ[2]/DDR0_DQ[18]DDR0_DQ[18] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
M_B_DQ3 AK64
DDR1_DQ[3]/DDR0_DQ[19]DDR0_DQ[19] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
AW52 M_B_DQ[32:39] M_B_DQ36 AR40
DDR1_DQ[36]/DDR1_DQ[20] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
AP52 M_B_BS2 13
M_B_DQ[0:7] M_B_DQ4 AF66 AY55 M_B_DQ37 AP40 AN50 M_B_A12
M_B_DQ5 DDR1_DQ[4]/DDR0_DQ[20]DDR0_DQ[20] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_B_DQ38 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_A11
AF67 AW54 AP37 AN48
M_B_DQ6 DDR1_DQ[5]/DDR0_DQ[21]DDR0_DQ[21]DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] M_B_DQ39 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] M_B_A15
AK67 BA54 AR37 AN53
M_B_DQ7 DDR1_DQ[6]/DDR0_DQ[22]DDR0_DQ[22]DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_B_DQ40 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_A14
AK66 BA55 AT33 AN52
M_B_DQ8 DDR1_DQ[7]/DDR0_DQ[23]DDR0_DQ[23] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_B_DQ41 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
AF70 AY54 AU33
M_B_DQ9 DDR1_DQ[8]/DDR0_DQ[24] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_B_DQ42 DDR1_DQ[41]/DDR1_DQ[25] M_B_A13
AF68 AU30 BA43
M_B_DQ10 DDR1_DQ[9]/DDR0_DQ[25] M_B_DQ43 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
AH71 AU46 AT30 AY43 M_B_CAS# 13
M_B_DQ11 DDR1_DQ[10]/DDR0_DQ[26] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] M_B_DQ44 DDR1_DQ[43]/DDR1_DQ[27] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
AH68
DDR1_DQ[11]/DDR0_DQ[27] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
AU48 M_B_DQ[40:47] AR33
DDR1_DQ[44]/DDR1_DQ[28] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
AY44 M_B_WE# 13
M_B_DQ[8:15] M_B_DQ12 AF71 AT46 M_B_DQ45 AP33 AW44
DDR1_DQ[12]/DDR0_DQ[28] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR1_DQ[45]/DDR1_DQ[29] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] M_B_RAS# 13
M_B_DQ13 AF69 AU50 M_B_DQ46 AR30 BB44 M_B_BS0 13
M_B_DQ14 DDR1_DQ[13]/DDR0_DQ[29] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_B_DQ47 DDR1_DQ[46]/DDR1_DQ[30] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_A2
AH70 AU52 AP30 AY47
M_B_DQ15 DDR1_DQ[14]/DDR0_DQ[30] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
AH69 AY51 AY31 BA44 M_B_BS1 13
DDR1_DQ[15]/DDR0_DQ[31] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_DQ[48]/DDR1_DQ[32] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_A10
BB65 AT48 AW31 AW46
DDR0_DQ[16]/DDR0_DQ[32] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_DQ[49]/DDR1_DQ[33] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] M_B_A1
AW65 AT50 AY29 AY46
DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_DQ[50]/DDR1_DQ[34] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] M_B_A0
C AW63 BB50 AW29 BA46 C
DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_DQ[51]/DDR1_DQ[35] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A3
AY63 AY50 BB31 BB46
DDR0_DQ[19]/DDR0_DQ[35] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_DQ[52]/DDR1_DQ[36] DDR1_MA[3] M_B_A4
BA65 BA50 BA31 BA47
DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[3] DDR0_DQ[53]/DDR1_DQ[37] DDR1_MA[4]
AY65 BB52 BA29
DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[4] DDR0_DQ[54]/DDR1_DQ[38]
BA63 BB29 BA38
DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[4]/DDR1_DQSN[0]
BB63 AM70 AY27 AY38
DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQSN[0] DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSP[4]/DDR1_DQSP[0]
BA61 AM69 AW27 AY34
DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQSP[0] DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[5]/DDR1_DQSN[1]
AW61 AT69 AY25 BA34
DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQSN[1] DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] M_B_DQS_DN4
BB59 AT70 AW25 AT38
DDR0_DQ[26]/DDR0_DQ[42] DDR0_DQSP[1] M_B_DQS_DN0 DDR0_DQ[59]/DDR1_DQ[43] DDR1_DQSN[4]/DDR1_DQSN[2] M_B_DQS_DP4 M_B_DQS4
AW59 AH66 BB27 AR38
DDR0_DQ[27]/DDR0_DQ[43] DDR1_DQSN[0]/DDR0_DQSN[2] DDR0_DQ[60]/DDR1_DQ[44] DDR1_DQSP[4]/DDR1_DQSP[2]
BB61
DDR0_DQ[28]/DDR0_DQ[44] DDR1_DQSP[0]/DDR0_DQSP[2]
AH65 M_B_DQS_DP0 M_B_DQS0 BA27
DDR0_DQ[61]/DDR1_DQ[45] DDR1_DQSN[5]/DDR1_DQSN[3]
AT32 M_B_DQS_DN5
AY61 AG69 M_B_DQS_DN1 BA25 AR32 M_B_DQS_DP5 M_B_DQS5
DDR0_DQ[29]/DDR0_DQ[45] DDR1_DQSN[1]/DDR0_DQSN[3] DDR0_DQ[62]/DDR1_DQ[46] DDR1_DQSP[5]/DDR1_DQSP[3]
BA59
AG70 M_B_DQS_DP1 M_B_DQS1 BB25
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSN[6]/DDR1_DQSN[4]
BA30
AY59 BA64 M_B_DQ48 AU27 AY30
M_B_DQ16 DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQSN[2]/DDR0_DQSN[4] M_B_DQ49 DDR1_DQ[48] DDR0_DQSP[6]/DDR1_DQSP[4] 1D35V_S3
AT66 AY64 AT27 AY26
M_B_DQ17 DDR1_DQ[16]/DDR0_DQ[48] DDR0_DQSP[2]/DDR0_DQSP[4] M_B_DQ50 DDR1_DQ[49] DDR0_DQSN[7]/DDR1_DQSN[5]
AU66 AY60 AT25 BA26
M_B_DQ18 DDR1_DQ[17]/DDR0_DQ[49] DDR0_DQSN[3]/DDR0_DQSN[5] M_B_DQ51 DDR1_DQ[50] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQS_DN6
AP65
BA60 M_B_DQ[48:55] AU25
DDR1_DQ[51] DDR1_DQSN[6]
AR25
1
M_B_DQ[16:23] M_B_DQ19 AN65 AR66 M_B_DQS_DN2 M_B_DQ52 AP27 AR27 M_B_DQS_DP6 M_B_DQS6
DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQ[52] DDR1_DQSP[6]
M_B_DQ20 AN66
AR65 M_B_DQS_DP2 M_B_DQS2 M_B_DQ53 AN27
DDR1_DQ[53] DDR1_DQSN[7]
AR22 M_B_DQS_DN7 R505
M_B_DQ21 AP66 AR61 M_B_DQS_DN3 M_B_DQ54 AN25 AR21 M_B_DQS_DP7 M_B_DQS7 470R2F-GP
DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQ[54] DDR1_DQSP[7]
M_B_DQ22 AT65
AR60 M_B_DQS_DP3 M_B_DQS3 M_B_DQ55 AP25
DDR1_DQ[55]
M_B_DQ23 AU65 M_B_DQ56 AT22 AN43
2
M_B_DQ24 DDR1_DQ[23]/DDR0_DQ[55] M_B_DQ57 DDR1_DQ[56] DDR1_ALERT# DDR1_PAR TP502 TPAD14-OP-GP R504
AT61 AW50 AU22 AP43 1
M_B_DQ25 DDR1_DQ[24]/DDR0_DQ[56] DDR0_ALERT# DDR0_PAR TP501 TPAD14-OP-GP M_B_DQ58 DDR1_DQ[57] DDR1_PAR SM_DRAMRST#
AU61 AT52 1 AU21 AT13 1 2 DDR3_DRAMRST# 13
M_B_DQ26 DDR1_DQ[25]/DDR0_DQ[57] DDR0_PAR M_B_DQ59 DDR1_DQ[58] DRAM_RESET# SM_RCOMP_0
AP60
DDR1_DQ[26]/DDR0_DQ[58] M_B_DQ[56:63] AT21
DDR1_DQ[59] DDR_RCOMP[0]
AR18 1 R501 2 121R2F-GP
M_B_DQ[24:31] M_B_DQ27 AN60
DDR1_DQ[27]/DDR0_DQ[59] DDR_VREF_CA
AY67 V_SM_VREF_CNT 42
M_B_DQ60 AN22
DDR1_DQ[60] DDR_RCOMP[1]
AT18 SM_RCOMP_1 1 R502 2 80D6R2F-L-GP 0R0402-PAD
M_B_DQ28 AN61 AY68 M_VREF_DQ_DIMM01 TP503 TPAD14-OP-GP M_B_DQ61 AP22 AU18 SM_RCOMP_2 1 R503 2 100R2F-L1-GP-U
M_B_DQ29 DDR1_DQ[28]/DDR0_DQ[60] DDR0_VREF_DQ M_B_DQ62 DDR1_DQ[61] DDR_RCOMP[2]
AP61 BA67 M_VREF_DQ_DIM1 42 AP21
1
M_B_DQ30 DDR1_DQ[29]/DDR0_DQ[61] DDR1_VREF_DQ M_B_DQ63 DDR1_DQ[62]
AT60 AN21 DDR CH - B
DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[63]
ED501
ED502
M_B_DQ31 AU60 AW67 SM_PGCNTL #543016
PESD5V0U1BL-GP-U1
PESD5V0U1BL-GP-U1
DDR1_DQ[31]/DDR0_DQ[63] DDR CH - A DDR_VTT_CNTL
SKYLAKE-U-GP
SKYLAKE-U-GP
2
071.SKYLA.000U
071.SKYLA.000U
Design Guideline:
Layout Note:
SM_RCOMP keep routing length less than 500 mils.
DQ Bit Swapping is allowed within the same byte, and Byte Swapping is allowed within the same channel.
B
Clock (CLK and CLK#) and Strobe (DQS and DQS#) differential signal swapping within a pair is not allowed. Also differential B
clock pair to clock pair swapping within a channel is not allowed.
M_B_A0 M_B_A[15:0] 13
M_B_A1
M_B_A2
M_B_A3
PDG: DDR/ODT M_B_A4
M_B_A5
1D35V_S3 3D3V_S0 M_B_A6
M_B_A7
M_B_A8
1
M_B_A9
R506 M_B_A10
220KR2F-GP M_B_A11
G
M_B_A12
M_B_A13
2
M_B_A14
SM_PGCNTL S D M_B_A15
DDR_PG_OUT 51
Q501
DMN5L06K-7-GP M_B_DQS_DN[7:0] 13
M_B_DQS_DN0
84.05067.031 M_B_DQS_DN1
2nd = 084.00138.0A31 M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7
M_B_DQS_DP[7:0] 13
M_B_DQS_DP0
M_B_DQS_DP1
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
A M_B_DQS_DP7 A
BOM1
Wistron Corporation
Title
CPU_(DDR)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = CPU CPU1S 19 OF 20
RESERVED SIGNALS-1
E68
CFG[0]
SKYLAKE_ULT
RSVD_TP#BB68
BB68 RSVD_TP_BB68 1 [#543016 Rev0.9]
B67 BB69 RSVD_TP_BB69 1 TP603 TPAD14-OP-GP
CFG[1] RSVD_TP#BB69 TP604 TPAD14-OP-GP
D65
CFG3 CFG[2] RSVD_TP_AK13
99 CFG3 D67 AK13 1
CFG4 CFG[3] RSVD_TP#AK13 RSVD_TP_AK12 TP605 TPAD14-OP-GP
E70 AK12 1
CFG[4] RSVD_TP#AK12 TP606 TPAD14-OP-GP
C68
CFG[5]
D68 BB2
CFG[6] RSVD#BB2
C67 BA3
CFG[7] RSVD#BA3
F71
CFG[8]
G69
CFG[9] TP5_AU5
F70 AU5 1
CFG[10] TP5 TP6_AT5 TP607 TPAD14-OP-GP
G68 AT5 1
CFG[11] TP6 TP608 TPAD14-OP-GP
H70
CFG[12]
G71
CFG[13]
D H69 D5 D
CFG[14] RSVD#D5
G70 D4
CFG[15] RSVD#D4
B2
RSVD#B2
E63 C2
CFG[16] RSVD#C2
F63
CFG[17]
B3
RSVD#B3
E66 A3
CFG[18] RSVD#A3
F66
CFG[19]
AW1
49D9R2F-GP CFG_RCOMP RSVD#AW1
2 1 R601 E60
CFG_RCOMP
E1
RSVD#E1
99 ITP_PMODE E8 E2
ITP_PMODE RSVD#E2
AY2 BA4
RSVD#AY2 RSVD#BA4
AY1 BB4
RSVD#AY1 RSVD#BB4
D1 A4
RSVD#D1 RSVD#A4
D3 C4
RSVD#D3 RSVD#C4
K46 BB5 TP4_BB5 1
RSVD#K46 TP4 TP609 TPAD14-OP-GP
K45
RSVD#K45
A69
RSVD#A69
AL25 B69
RSVD#AL25 RSVD#B69
AL27
RSVD#AL27 RSVD_AY3
AY3 1 R606 2
RSVD#AY3 0R2J-2-GP
C71
RSVD#C71
B70
RSVD#B70 RSVD#D71
D71 DY
C70
RSVD#C70
F60
RSVD#F60
C54
RSVD#C54
A52 D54
RSVD#A52 RSVD#D54
1 RSVD_TP_BA70 BA70 AY4 TP1_AY4 1
TPAD14-OP-GP TP601 RSVD_TP_BA68 RSVD_TP#BA70 TP1 TP2_BB3 TP610 TPAD14-OP-GP
1 BA68 BB3 1
TPAD14-OP-GP TP602 RSVD_TP#BA68 TP2 TP611 TPAD14-OP-GP
J71
RSVD#J71 VSS
AY71 VSS_AY71 1 R602 2 #54469 CRB.
J68 AR56 ZVM# 0R0402-PAD
1
RSVD#J68 ZVM# TP616 TPAD14-OP-GP
1 RSVD_F65 F65 AW71 RSVD_TP_AW71 1
TPAD14-OP-GP TP612 RSVD_G65 VSS RSVD_TP#AW71
RSVD_TP_AW71 RSVD_TP_AW70 TP614 TPAD14-OP-GP +VCCST_CPU
1 G65 AW70 1
TPAD14-OP-GP TP613 VSS RSVD_TP#AW70
RSVD_TP_AW70 TP615 TPAD14-OP-GP
C F61 AP56 MSM# 1 C
RSVD#F61 MSM# TP617 TPAD14-OP-GP
E61 C64
RSVD#E61 PROC_SELECT#
PROC_SELECT# 1 2
R603
SKYLAKE-U-GP 100KR2J-1-GP
PCH strap pin: 071.SKYLA.000U

CFG3
1
[BDW Only]PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

R604
1KR2J-1-GP 0 : ENABLED
DY
CFG[3] SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
2
1 : DISABLED
(#543016)
CFG4
1
DISPLAY PORT PRESENCE STRAP

R605
1KR2J-1-GP
0 : ENABLED
CFG[4]
An external Display Port device is connected to the Embedded Display Port.
2
1 : DISABLED (Default)
No Physical Display Port attached to Embedded DisplayPort*. No connect for disable.
SKL(#543016):
Processor strap CFG[4] should be pulled low to enable embedded DisplayPort*
B B
A A
BOM1
Wistron Corporation
Title
CPU_(RESERVED)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
CPU1L 12 OF 20 CPU1M 13 OF 20
VCC_CORE VCC_CORE +VCCGT
CPU POWER 1 OF 4
+VCCGT CPU POWER 2 OF 4
A30 G32 N70
VCC VCC VCCGT
A34 G33 A48 N71
VCC SKYLAKE_ULT VCC VCCGT SKYLAKE_ULT VCCGT +VDDQ_CPU_CLK 1D35V_S3
A39 G35 A53 R63
VCC VCC VCCGT VCCGT
A44 G37 A58 R64
VCC VCC VCCGT VCCGT
AK33 G38 A62 R65
VCC VCC VCCGT VCCGT
AK35 G40 A66 R66
VCC VCC VCCGT VCCGT
1
AK37 G42 AA63 R67
VCC VCC VCCGT VCCGT C722
AK38
VCC VCC
J30 AA64
VCCGT VCCGT
R68 DY SC1U10V2KX-1GP
AK40 J33 AA66 R69
2
VCC VCC VCCGT VCCGT
1
AL33 J37 AA67 R70
VCC VCC VCCGT VCCGT C719 +VCCIO
AL37 J40 AA69 R71
VCC VCC VCCGT VCCGT CPU1N 14 OF 20
AL40 K33 AA70 T62 SC1U10V2KX-1GP
2
VCC VCC VCCGT VCCGT +VCCIO(ICCMAX.=2.73A
AM32 K35 AA71 U65 CPU POWER 3 OF 4
VCC VCC VCCGT VCCGT
AM33 K37 AC64 U68
VCC VCC VCCGT VCCGT
AM35 K38 AC65 U71 AU23 AK28
D VCC VCC VCCGT VCCGT VDDQ VCCIO D
AM37 K40 AC66 W63 AU28 AK30
VCC VCC VCCGT VCCGT VDDQ SKYLAKE_ULT VCCIO
AM38 K42 AC67 W64 AU35 AL30
VCC VCC VCCGT VCCGT VDDQ VCCIO
G30 K43 AC68 W65 AU42 AL42
VCC VCC VCCGT VCCGT VDDQ VCCIO
AC69 W66 BB23 AM28
TPAD14-OP-GP TP701 +VCCCOREG0 VCCGT VCCGT VDDQ VCCIO
1 K32 RSVD_K32 E32 AC70 W67 BB32 AM30
RSVD#K32 VCC_SENSE VCC_SENSE 46 VCCGT VCCGT VDDQ VCCIO +VCCSA
E33 AC71 W68 BB41 AM42
TPAD14-OP-GP TP702 +VCCCOREG1 VSS_SENSE VSS_SENSE 46 VCCGT VCCGT VDDQ VCCIO
1 AK32 RSVD_AK32 J43 W69 BB47
RSVD#AK32 H_CPU_SVIDALRT# VCCGT VCCGT +VDDQ_CPU_CLK VDDQ
B63 J45 W70 BB51 AK23
VIDALERT# H_CPU_SVIDCLK VCCGT VCCGT VDDQ VCCSA
3A +V_EDRAM_VR AB62
P62
V62
VCCOPC
VCCOPC
VIDSCK
VIDSOUT
A63
D64 H_CPU_SVIDDAT +VCCSTG
J46
J48
J50
VCCGT
VCCGT
VCCGT
VCCGT
W71
Y62 SC10U6D3V3MX-GP2 1 C715
+VCCST_CPU AM40
VCCSA
VCCSA
AK25
G23
G25
VCCOPC +VCCFUSEPRG VCCGT +VCCGT VDDQC VCCSA
G20 1 R703 2 J52 G27
VCCSTG VCCGT VCCSA
SC1U10V2KX-1GP 2 1 C716 0.04 A
140mA +V1.8S_EDRAM
1 R702 2 VCC_EDRAM_FUSEPRG
H63
G61
VCC_OPC_1P8 0R0603-PAD
J53
J55
J56
VCCGT
VCCGT
VCCGTX
VCCGTX
AK42
AK43
AK45
+VCCSTG
A18
A22
VCCST VCCSA
VCCSA
G28
J22
J23
VCC_OPC_1P8 VCCGT VCCGTX SC1U10V2KX-1GP 2 VCCSTG VCCSA
J58 AK46 1 C717 J27
0R0603-PAD VCCSENSE_EDRAM_VR VCCGT VCCGTX VCCSA
+V_EDRAM_VR VSSSENSE_EDRAM_VR
AC63
VCCOPC_SENSE
J60
VCCGT VCCGTX
AK48 DY 1D35V_S3
AL23
VCCPLL_OC VCCSA
K23
AE63 K48 AK50 K25
23e VSSOPC_SENSE
K50
VCCGT VCCGTX
AK52 K20
VCCSA
K27
VCCGT VCCGTX SCD1U16V2KX-3GP2 VCCPLL VCCSA
1 C718
3A +V_EOPIO_VR AE62
AG62
VCCEOPIO
VCCEOPIO
K52
K53
VCCGT
VCCGT
VCCGTX
VCCGTX
AK53
AK55
K21
VCCPLL VCCSA
VCCSA
K28
K30
C701
C702
K55 AK56
VCCGT VCCGTX
1
VCCSENSE_EOPIO_VR AL63
VCCEOPIO_SENSE
K56
VCCGT VCCGTX
AK58 #544669 CRB. +V1.00U_CPU
VCCIO_SENSE
AM23 VCCIO_VR_FB
23e 23e VSSSENSE_EOPIO_VR AJ62 K58 AK60 AM22 VSSIO_VR_FB
VSSEOPIO_SENSE VCCGT VCCGTX VSSIO_SENSE
K60 AK70
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
2
VCCGT VCCGTX 1D35V_S3 +VDDQ_CPU_CLK 0.12 A
C720
C721
L62 AL43 H21 VSSSA_SENSE 46
VCCGT VCCGTX VSSSA_SENSE
1
SKYLAKE-U-GP L63 AL46 H20
VCCGT VCCGTX VCCSA_SENSE VCCSA_SENSE 46
L64 AL50
VCCGT VCCGTX
071.SKYLA.000U L65 AL53 1 R705 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
2
VCCGT VCCGTX SKYLAKE-U-GP
L66 AL56
VCCGT VCCGTX 0R0603-PAD
L67 AL60
VCCGT VCCGTX +VCCIO
L68
VCCGT VCCGTX
AM48 071.SKYLA.000U (#543016 SKL U/Y PDG rev1.0)
L69 AM50
+V_EOPIO_VR VCCGT VCCGTX
L70 AM52
+V_EDRAM_VR VCCGT VCCGTX
L71 AM53
VCCGT VCCGTX
1
M62 AM56
VCCGT VCCGTX R733
N63 AM58
VCCGT VCCGTX +VCCIO +VCCSTG
C703
C704
N64 AU58 100R2J-2-GP

VCCGT VCCGTX
1
23e 23e R724 N66 AU63 R710

VCCGT VCCGTX
N67 BB57 1 2
100R2J-2-GP
2
VCCGT VCCGTX 0R0402-PAD
23e N69 BB66
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
2
VCCGT VCCGTX VCCIO_VR_FB

46 VCCGT_SENSE J70 AK62
2
VCCGT_SENSE VCCGTX_SENSE
46 VSSGT_SENSE J69
VSSGT_SENSE VSSGTX_SENSE
AL61 +VCCSTG(ICCMAX.=0.16A) VSSIO_VR_FB
VCCSENSE_EDRAM_VR
1
VSSSENSE_EDRAM_VR
SKYLAKE-U-GP R730
100R2J-2-GP
1
R725 071.SKYLA.000U
100R2J-2-GP
2
23e
2
+V_EOPIO_VR VCC_CORE
C C
RN701
2 3 VCC_SENSE 46
1
R729 1
R2
4 +VCCSA
R1 VSS_SENSE 46
100R2J-2-GP
23e SRN100F-1-GP
Layout Note:
1
2
1. Place close to CPU R735

VCCSENSE_EOPIO_VR 100R2J-2-GP
VSSSENSE_EOPIO_VR 2. VCC_SENSE/ VSS_SENSE
impedance=50 ohm
2
3. Length match<25mil
1
R731 Layout Note: VCCSA_SENSE

23e
SVID DATA The total Length of Data and Clock (from CPU to each VR) must be equal (±0.1 inch). VSSSA_SENSE
100R2J-2-GP
Route the Alert signal between the Clock and the Data signals.
1
R734
2
100R2J-2-GP
+VCCST_CPU
2
+VCCGT
RN702
1
CLOSE TO CPU 1 R1
4 VCCGT_SENSE 46
R726 2 R2
3 VSSGT_SENSE 46
100R2F-L1-GP-U #544669
SRN100F-1-GP
2
R709
H_CPU_SVIDDAT 1 2 VR_SVID_DATA 46
0R0402-PAD
+VCCST_CPU
SVID CLOCK #544669

1
CLOSE TO VR
R723
DY 54D9R2F-L1-GP
2
R732
H_CPU_SVIDCLK 1 2 VR_SVID_CLK 46
0R0402-PAD
SVID_543016:
B B
+VCCST_CPU
#544669
1
CLOSE TO CPU
R727
56R2J-4-GP
2
R728
H_CPU_SVIDALRT# 2 1 VR_SVID_ALERT# 46
220R2J-L2-GP
A A
BOM1
Wistron Corporation
Title
CPU(VCC_CORE)
A1
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
D D
CPU1A 1 OF 20
E55 SKYLAKE_ULT C47

57 HDMI_CRT_N0 DDI1_TXN[0] EDP_TXN[0] eDP_TX_CPU_N0 55
57 HDMI_CRT_P0 F55 DDI1_TXP[0] EDP_TXP[0] C46 eDP_TX_CPU_P0 55
57 HDMI_CRT_N1 E58 DDI1_TXN[1] EDP_TXN[1] D46 eDP_TX_CPU_N1 55
57 HDMI_CRT_P1 F58 DDI1_TXP[1] EDP_TXP[1] C45 eDP_TX_CPU_P1 55
HDMI/CRT 57 HDMI_DATA0#
57 HDMI_DATA0
F53
G53
DDI1_TXN[2]
DDI1_TXP[2]
EDP_TXN[2]
EDP_TXP[2]
A45
B45
57 HDMI_CLK# F56 DDI1_TXN[3] EDP_TXN[3] A47
57 HDMI_CLK G56 DDI1_TXP[3] EDP_TXP[3] B47
C50 DDI2_TXN[0] DDI EDP_AUXN E45 eDP_AUX_CPU_N 55

D50 EDP F45
DDI2_TXP[0] EDP_AUXP eDP_AUX_CPU_P 55
C52 DDI2_TXN[1]
D52 B52 EDP_DISP_UTIL 1
DDI2_TXP[1] EDP_DISP_UTIL TP801 TPAD14-OP-GP
A50 DDI2_TXN[2]
B50 DDI2_TXP[2] DDI1_AUXN G50
D51 DDI2_TXN[3] DDI1_AUXP F50
C51 DDI2_TXP[3] DDI2_AUXN E48
3D3V_S0 F48
DDI2_AUXP
RSVD#G46 G46
DISPLAY SIDEBANDS
RN801 RSVD#F46 F46
HDMI
C L13 C
57 CPU_DP1_CTRL_CLK GPP_E18/DDPB_CTRLCLK
2 3 CPU_DP1_CTRL_CLK
57 CPU_DP1_CTRL_DATA L12 Strap L9
CPU_DP1_CTRL_DATA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 CPU_DP1_HPD 57
1 4 GPP_E14/DDPC_HPD1 L7
N7 L6 EC_SMI# EC_SMI# 24
GPP_E20/DDPC_CTRLCLK Strap GPP_E15/DDPD_HPD2
SRN2K2J-1-GP N8 GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 N9 EC_SCI# 24
GPP_E17/EDP_HPD L10 EDP_HPD 55
Check +VCCIO TPAD14-OP-GP N11 GPP_E22
R801
TP802 1 DDPD_CTRLDATA N12 GPP_E23
Strap EDP_BKLTEN R12 L_BKLT_EN 55
EDP_BKLTCTL R11 L_BKLT_CTRL 55
1 2 EDP_COMP E52 U13 EDP_VDD_EN 55
EDP_RCOMP EDP_VDDEN
24D9R2F-L-GP SKYLAKE-U-GP
071.SKYLA.000U
(#543016) The Skylake U/Y processor supports only two DDI ports - Port 1 and Port 2.
3D3V_S0
(#543016) eDP_RCOMP Guideline
Signal Trace Isolation Resistor Length
Width Spacing Value EC_SMI# 1 R802 2 10KR2J-3-GP
eDP_RCOMP 20 mils 25 mils 24.9 Ω ±1% Max = 100 mils

EC_SCI# 1 R803 2 10KR2J-3-GP
B DY B
(#543016) DDI Disabling and Termination Guidelines R804

1 2 L_BKLT_EN
Port Strap Enable Port Disable Port 100KR2J-4-GP
PU to 3.3 V with 2.2-k

Port 1 DDPB_CTRLDATA ±5% resistor NC
PU to 3.3 V with 2.2-k
Port 2 DDPC_CTRLDATA ±5% resistor NC
A BOM1 A
Wistron Corporation
Design Guideline:
Skylake processor signal eDP_RCOMP should be connected to the VCCIO rail via a single 24.9 ±1% Ω resistor. Title
CPU_(DISPLAY)
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
(Reserved)CPU
A3
Tesla SKL-U -1
5 4 3 2 1
D
-1
Wistron Corporation
Rev
102
of
CPU_(Power CAP1)
10
Sheet
Tesla SKL-U
1
1
Tuesday, July 21, 2015
Document Number
BOM1
Date:
Size
Title
A2
2
2
(#543016 PDG)
3
3
PC1025
SC1U10V2KX-L1-GP SC22U6D3V3MX-1-GP
PC1064
1 2 1 2
SC1U10V2KX-L1-GP
PC1026
SC22U6D3V3MX-1-GP
PC1063
1 2
PC1060 SC10U6D3V3MX-GP 1 2
1 2
SC1U10V2KX-L1-GP
PC1062
1 2
PC1027
1 2 SC22U6D3V3MX-1-GP
PC1059 SC10U6D3V3MX-GP
SC1U10V2KX-L1-GP 1 2
PC1053
1 2
PC1061 SC22U6D3V3MX-1-GP
PC1058 SC10U6D3V3MX-GP 1 2
1 2
PC1052
1 2
1 2
PC1051
SC22U6D3V3MX-1-GP
1D35V_S3
1 2
1 2
PC1050
SC22U6D3V3MX-1-GP
1 2
4
4
PC1049
SC22U6D3V3MX-1-GP
PC1081
SC22U6D3V3MX-1-GP
1 2
1 2
PC1048
SC22U6D3V3MX-1-GP
PC1080
SC22U6D3V3MX-1-GP
1 2
1 2
PC1047
PC1078 PC1079
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
1 2 1 2
PC1019 PC1020
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
DY
1 2
PC1046
SC22U6D3V3MX-1-GP 1 2
SC22U6D3V3MX-1-GP
VCCSA
PC1076 PC1077
1 2
1 2
PC1009
PC1018
PC1045
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
PC1090
+VCCSA
1 2 1 2 1 2
1 2 1 2
PC1007 PC1008
PC1016 PC1017
PC1075
PC1089
1 2 1 2
PC1029 PC1030
1 2 1 2
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC1U10V2KX-1GP
PC1042 PC1043
PC1073 PC1074
DY
1 2
1 2 1 2
1 2 1 2
PC1005 PC1006
PC1014 PC1015
PC1087
DY
1 2
IccMax current-10ms max = 34 A
1 2 1 2
PC1028
DY
IccMax current-10ms max[A] = 67 A
1 2 1 2 1 2
PC1034 PC1041
PC1071 PC1072
PC1085 PC1086
1 2 1 2 SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
1D0V_S5
1 2 1 2 PC1039 SC22U6D3V3MX-1-GP
SLICED GT
PC1004 1 2 1 2 1 2
PC1013
PC1024
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP 1 2
SC18P50V2JN-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
1 2 1 2 1 2
Main Func = CPU
1 2 1 2 1 2
PC1002 PC1003
PC1011 PC1012
PC1023
5
5
PC1033
PC1070
PC1084
U-line 23e 28W
SC18P50V2JN-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
+VCCIO(ICCMAX.=2.73A)
1 2 1 2 1 2
DY
CORE
1 2 1 2 1 2
PC1022
U-line 23e 28W
PC1031 PC1032
PC1044 PC1069
PC1082 PC1083
DY
1 2 1 2 1 2
1 2 1 2 1 2
PC1001
PC1010
PC1021
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP 1 2
1 2 1 2 1 2
1 2 1 2 1 2
1 2
PC1036
SC22U6D3V3MX-1-GP
VCC_CORE
+VCCIO
+VCCGT
1 2
A
5 4 3 2 1
Main Func = CPU

UNSLICED GT
+VCCGT
VCCIO
+VCCIO
+VCCIO(ICCMAX.=2.73A)
1
1
C1136 C1138 C1147 C1148 C1149 C1150 1U 0402 x 6
SC18P50V2JN-1-GP
2
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC18P50V2JN-1-GP
SC1U10V2KX-1GP
SC18P50V2JN-1-GP
C1151 C1152 C1153 C1154
2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
D D
GTUS 20141114 Alden
PCH DERIVED RAILS +VCCGT

+V_VCCGTUS_VR can merge to +VCCGT
+VCCPGPPA(ICCMAX.=0.05A)
+V1.8A +VCCPGPPA
R1111
1 DY 2 PC1104 PC1105
1
PC1106 PC1107
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
3D3V_S5 0R3J-0-U-GP 23e 23e 23e 23e
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
2
2
2
2
1 R1109 2
0R0603-PAD
1D0V_S5
+VCCCLK
1 R1114 2
0R0603-PAD +VCCPGPP
1 R1116 2
0R0603-PAD
C C
1D0V_S5
1D0V_S5 +VCCAMPHYPLL_1P0
C1174
SC1U10V2KX-1GP
1
1
C1182 C1104 C1105 1 R1102 2
C1172
B B
SC22U6D3V5MX-2GP
SC1U10V2KX-1GP
DY DY 0R0603-PAD C1181
2
1
SC18P50V2JN-1-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
VCC_CORE
3D3V_S5 +VCCPGPPD_TCH
1 R1108 2
1
C1101 C1102 C1103 C1116 C1117

1U 0402 x 5 0R0603-PAD
2
+V1.8A
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
A R1129 A
1 DY 2
0R3J-0-U-GP
+VCCPGPPD_TCH
BOM1
U-line 23e 28W
IccMax current-10ms max = 34 A C1183
Wistron Corporation
1
SC10U6D3V3MX-GP

2
Title
CPU_(Power CAP2)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = DDR SODIMM
D D
(Blanking)
C C
B B
A A
BOM1
Wistron Corporation
Title
DDR3-SODIMM1
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = DDR SODIMM
DIMM1
5 M_B_A[15:0]
M_B_A0 98 NP1
M_B_A1 A0 NP1
97 NP2
M_B_A2 A1 NP2 3D3V_S0
96
M_B_A3 A2
95 110 M_B_RAS# 5
M_B_A4 A3 RAS#
92 113 M_B_WE# 5
M_B_A5 A4 WE#
91 115 M_B_CAS# 5
1
M_B_A6 A5 CAS#
90
M_B_A7 A6 R1302
86 114 M_B_CS#0 5
M_B_A8 A7 CS0# 10KR2J-3-GP
89 121 M_B_CS#1 5
M_B_A9 A8 CS1#
85
M_B_A10 A9
107 73 M_B_CKE0 5
2
M_B_A11 A10/AP CKE0
D 84 74 M_B_CKE1 5 D
M_B_A12 A11 CKE1
83
M_B_A13 A12
119 101 M_B_CLK0 5
M_B_A14 A13 CK0 SA1_DIMB
80 103 M_B_CLK#0 5
M_B_A15 A14 CK0#
78
A15 SA0_DIMB
79 102 M_B_CLK1 5
5 M_B_BS2 A16/BA2 CK1
104 M_B_CLK#1 5
CK1#
109
5 M_B_BS0 BA0
1
108 11
5 M_B_BS1 BA1 DM0 R1301
5 M_B_DQ[63:0]
M_B_DQ8 DM1
28 Note:
5 46
M_B_DQ12 DQ0 DM2 0R0402-PAD SO-DIMMB SPD Address is 0xA4
M_VREF_CA_DIMMB Layout Note: M_B_DQ[8:15] M_B_DQ10
7
15
DQ1 DM3
63
136 SO-DIMMB TS Address is 0x34
2
DQ2 DM4
Place these caps M_B_DQ11 17
DQ3 DM5
153
M_B_DQ9 4 170
close to VREF_CA M_B_DQ13 DQ4 DM6
6 187
M_B_DQ14 DQ5 DM7
16
M_B_DQ15 DQ6
18 200 PCH_SMBDATA 18,65
M_B_DQ4 DQ7 SDA
21 202 PCH_SMBCLK 18,65
1
M_B_DQ0 DQ8 SCL

23
C1308 C1306 C1309 M_B_DQ6 DQ9 3D3V_S0
33 198
DQ10 EVENT#
M_B_DQ[0:7] M_B_DQ3 35
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
M_B_DQ5 DQ11
22 199
M_B_DQ1 DQ12 VDDSPD
24
1
M_B_DQ7 DQ13 SA0_DIMB
34 197
M_B_DQ2 DQ14 SA0 SA1_DIMB C1311
36 201
M_B_DQ20 DQ15 SA1 SCD1U16V2KX-3GP
39
2
M_B_DQ19 DQ16
41 77
DQ17 NC#1
M_B_DQ[16:23] M_B_DQ17 51
DQ18 NC#2
122
1D35V_S3
M_B_DQ22 53 125
M_B_DQ18 DQ19 NC#/TEST
40
M_B_DQ21 DQ20 1D35V_S3
42 75
M_B_DQ23 DQ21 VDD1
50 76
M_B_DQ16 DQ22 VDD2
52 81
M_B_DQ29 DQ23 VDD3
57 82
DQ24 VDD4
M_B_DQ24 10U 0603 x 3
M_VREF_DQ_DIMMB Layout Note: M_B_DQ[24:31] M_B_DQ30
59
67
DQ25 VDD5
87
88 1U 0402 x 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DQ26 VDD6
Place these caps M_B_DQ31
C1317
C1318
C1323
69 93 0.1U 0402 x 5
DQ27 VDD7
1
M_B_DQ28 56 94
close to VREF_DQ M_B_DQ25 DQ28 VDD8
58 99
M_B_DQ26 DQ29 VDD9
68 100
2
M_B_DQ27 DQ30 VDD10
C 70 105 C
M_B_DQ37 DQ31 VDD11
129 106
DQ32 VDD12
1
M_B_DQ36 131 111

C1302 C1310 M_B_DQ35 DQ33 VDD13
C1305
141 112
SC2D2U10V3KX-1GP
M_B_DQ39 DQ34 VDD14

M_B_DQ[32:39] 143 117
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
M_B_DQ33 DQ35 VDD15

130 118
M_B_DQ32 DQ36 VDD16
132 123
M_B_DQ34 DQ37 VDD17
140 124
M_B_DQ38 DQ38 VDD18
142
SC1U10V2KX-1GP
SC1U10V2KX-1GP
M_B_DQ40 DQ39
C1322
C1321
147 2
DQ40 VSS
1
M_B_DQ41 149 3
M_B_DQ42 DQ41 VSS
157 8
DQ42 VSS
M_B_DQ[40:47] M_B_DQ43 159 9
2
M_B_DQ45 DQ43 VSS
146 13
M_B_DQ44 DQ44 VSS
148 14
M_B_DQ47 DQ45 VSS
158 19
M_B_DQ46 DQ46 VSS
160 20
M_B_DQ49 DQ47 VSS
163 25
M_B_DQ51 DQ48 VSS
165 26
M_B_DQ50 DQ49 VSS
M_B_DQ[48:55] 175
DQ50 VSS
31
M_B_DQ55 177 32
M_B_DQ52 DQ51 VSS
164 37
M_B_DQ53 DQ52 VSS
166 38
M_B_DQ48 DQ53 VSS
C1315
C1314
C1316
C1312
C1313
174 43
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
M_B_DQ54 DQ54 VSS
176 44
DQ55 VSS
1
M_B_DQ56 181 48
M_B_DQ58 DQ56 VSS
183 49
DQ57 VSS
M_B_DQ[56:63] M_B_DQ60 191 54
2
M_B_DQ59 DQ58 VSS
193 55
M_B_DQ57 DQ59 VSS
180 60
M_B_DQ61 DQ60 VSS
182 61
M_B_DQ62 DQ61 VSS
192 65
M_B_DQ63 DQ62 VSS
194 66
DQ63 VSS
5 M_B_DQS_DN[7:0] 71
M_B_DQS_DN1 VSS
10 72
M_B_DQS_DN0 DQS0# VSS
M_B_DQS_DN2
27
45
DQS1# VSS
127
128
Layout Note:
DQS2# VSS
M_B_DQS_DN3 62
DQS3# VSS
133 Place these Caps near DIMM2.
M_B_DQS_DN4 135 134
152 138
169 139
B M_B_DQS_DN7 DQS6# VSS B
186 144
DQS7# VSS
5 M_B_DQS_DP[7:0] 145
M_B_DQS_DP1 VSS
12 150
M_B_DQS_DP0 DQS0 VSS
29 151
47 155
64 156
137 161
154 162
171 167
188 168
DQS7 VSS 0D675V_S0
172
VSS
116 173
5 M_B_DIMB_ODT0 ODT0 VSS
120 178
5 M_B_DIMB_ODT1 ODT1 VSS
179
VSS
M_VREF_CA_DIMMB 126 184
VREF_CA VSS
1 185 1U 0402 x 3
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
M_VREF_DQ_DIMMB VREF_DQ VSS
C1307
C1304
C1303
Layout Note: 189
1
VSS
30 190
5 DDR3_DRAMRST# RESET# VSS
All VREF traces should VSS
195
have width=20mil; 196
2
VSS
0D675V_S0 203 205
spacing=20 mil VTT1 VSS
1
204 206
C1301 VTT2 VSS
SCD1U16V2KX-3GP SKT_DDR 204P SMD
2
DDR3-204P-263-GP-U
DY
62.10024.S61
close to dimm 1ST = 62.10024.S61 Place these Caps near DIMM2.
A 0D675V_S0 A
1
AFTE14P-GP AFTP1301
BOM1
Wistron Corporation
Title
DDR3-SODIMM2
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
BOM1
A
Wistron Corporation A
Title
(Reserved)SODIMM3_SODIMM4
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = PCH
CPU1I 9 OF 20
CSI-2 SKYLAKE_ULT
A36 CSI2_DN0 CSI2_CLKN0 C37

B36 CSI2_DP0 CSI2_CLKP0 D37
D C38 CSI2_DN1 CSI2_CLKN1 C32 D
D38 CSI2_DP1 CSI2_CLKP1 D32
C36 CSI2_DN2 CSI2_CLKN2 C29
D36 CSI2_DP2 CSI2_CLKP2 D29 DC resistance < 0.5ohm.
A38 CSI2_DN3 CSI2_CLKN3 B26
B38 CSI2_DP3 CSI2_CLKP3 A26 R1501
C31 E13 CSI2_COMP 1 2
CSI2_DN4 CSI2_COMP
D31 CSI2_DP4 GPP_D4/FLASHTRIG B7
C33 CSI2_DN5 100R2F-L1-GP-U
D33 CSI2_DP5 EMMC
A31 CSI2_DN6
B31 CSI2_DP6 GPP_F13/EMMC_DATA0 AP2
A33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP1 [#545659 Rev0.7]
B33 CSI2_DP7 GPP_F15/EMMC_DATA2 AP3
GPP_F16/EMMC_DATA3 AN3 GPP_F: VCCPGPPF = 1.8V Only
A29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN1
B29 CSI2_DP8 GPP_F18/EMMC_DATA5 AN2
C28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM4
D28 CSI2_DP9 GPP_F20/EMMC_DATA7 AM1
A27 CSI2_DN10
B27 CSI2_DP10 GPP_F21/EMMC_RCLK AM2
C27 CSI2_DN11 GPP_F22/EMMC_CLK AM3
D27 CSI2_DP11 GPP_F12/EMMC_CMD AP4 R1502
AT1 EMMC_RCOMP 1 2
EMMC_RCOMP
SKYLAKE-U-GP 200R2F-L-GP
C C
071.SKYLA.000U
B B
A BOM1 A
Wistron Corporation
Title
CPU_(CS-2/EMMC)
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = PCH

#543016:
220 nF nominal capacitors are recommended for Gen 3. CPU1H 8 OF 20
100 nF nominal capacitors are recommended for Gen 2. SKYLAKE_ULT
SSIC / USB3
PCIE/USB3/SATA
USB3_1_RXN
H8
USB30_RX_CPU_N1 34
(#545659) The xHCI controller supports USB Debug port on all USB3.0 capable ports.
G8
USB3_1_RXP USB30_RX_CPU_P1 34
76 PEG_RX_CPU_N0
76 PEG_RX_CPU_P0 SCD1U16V2KX-L-GP
H13
G13
PCIE1_RXN/USB3_5_RXN
PCIE1_RXP/USB3_5_RXP
USB3_1_TXN
USB3_1_TXP
C13
D13
USB30_TX_CPU_N1
USB30_TX_CPU_P1
34
34
USB1 (USB3.0 Port1)
76 PEG_TX_GPU_N0 C1606 1 2OPS PEG_TX_CPU_N0 B17
C1605 PEG_TX_CPU_P0 PCIE1_TXN/USB3_5_TXN
76 PEG_TX_GPU_P0 1 2OPS A17 J6
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_RXN USB30_RX_CPU_N2 36
USB2 (USB3.0 Port2)
SCD1U16V2KX-L-GP H6
USB3_2_RXP/SSIC_RXP USB30_RX_CPU_P2 36
76 PEG_RX_CPU_N1 G11 B13 USB30_TX_CPU_N2 36
SCD1U16V2KX-L-GP PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_TXN
76 PEG_RX_CPU_P1 F11 A13 USB30_TX_CPU_P2 36
C1608 PEG_TX_CPU_N1 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_TXP
76 PEG_TX_GPU_N1 1 2OPS D16
C1607 PEG_TX_CPU_P1 PCIE2_TXN/USB3_6_TXN
76 PEG_TX_GPU_P1 1 2OPS C16 J10
PCIE2_TXP/USB3_6_TXP USB3_3_RXN
GPU
SCD1U16V2KX-L-GP H10
USB3_3_RXP
76 PEG_RX_CPU_N2 H16 B15
SCD1U16V2KX-L-GP PCIE3_RXN USB3_3_TXN
76 PEG_RX_CPU_P2 G16 A15
C1610 PEG_TX_CPU_N2 PCIE3_RXP USB3_3_TXP
76 PEG_TX_GPU_N2 1 2OPS D17
C1609 PEG_TX_CPU_P2 PCIE3_TXN
76 PEG_TX_GPU_P2 1 2OPS C17 E10
PCIE3_TXP USB3_4_RXN USB30_RX_CPU_N4 66
Card Reader (USB3.0 Port3)
SCD1U16V2KX-L-GP F10
USB3_4_RXP USB30_RX_CPU_P4 66
76 PEG_RX_CPU_N3 G15 C15 USB30_TX_CPU_N4 66
D SCD1U16V2KX-L-GP PCIE4_RXN USB3_4_TXN D
76 PEG_RX_CPU_P3 F15 D15 USB30_TX_CPU_P4 66
C1612 PEG_TX_CPU_N3 PCIE4_RXP USB3_4_TXP
76 PEG_TX_GPU_N3 1 2OPS B19
PCIE4_TXN
USB1 (USB2.0 port1)
76 PEG_TX_GPU_P3 C1611 1 2OPS PEG_TX_CPU_P3 A19 AB9 USB_CPU_PN0 34
SCD1U16V2KX-L-GP PCIE4_TXP USB2N_1
AB10 USB_CPU_PP0 34
USB2P_1
61 PCIE_RX_CPU_N5 F16
PCIE5_RXN
WLAN USB2 (USB2.0 Port2)
61 PCIE_RX_CPU_P5 SCD1U16V2KX-3GP E16 AD6 USB_CPU_PN1 36
C1601 1 PCIE_TX_CPU_N5 PCIE5_RXP USB2N_2
61 PCIE_TX_CON_N5 2 C19 AD7 USB_CPU_PP1 36
C1602 1 PCIE_TX_CPU_P5 PCIE5_TXN USB2P_2
61 PCIE_TX_CON_P5 2 D19
PCIE5_TXP
USB3 (IO BD/USB2.0 Port3)
SCD1U16V2KX-3GP AH3 USB_CPU_PN2 66
USB2N_3
31 PCIE_RX_CPU_N6 G18 AJ3 USB_CPU_PP2 66
SCD1U16V2KX-3GP PCIE6_RXN USB2P_3
31 PCIE_RX_CPU_P6 F18
PCIE6_RXP
LAN 31 PCIE_TX_CON_N6 C1603 1 2 PCIE_TX_CPU_N6 D20 AD9 USB_CPU_PN3 1
PCIE6_TXN USB2N_4 TP1601 TPAD14-OP-GP
31 PCIE_TX_CON_P6 C1604 1 2 PCIE_TX_CPU_P6 C20 AD10 USB_CPU_PP3 1
PCIE6_TXP USB2P_4 TP1602 TPAD14-OP-GP
SCD1U16V2KX-3GP
F20
E20
PCIE7_RXN/SATA0_RXN
PCIE7_RXP/SATA0_RXP
USB2N_5
USB2P_5
AJ1
AJ2
USB_CPU_PN4
USB_CPU_PP4
55
55
CAMERA (USB2.0 Port5)
B21 USB2
PCIE7_TXN/SATA0_TXN
A21 AF6
PCIE7_TXP/SATA0_TXP USB2N_6
AF7
USB2P_6
60 SATA_RX_CPU_N0 G21
PCIE8_RXN/SATA1A_RXN
60 SATA_RX_CPU_P0 F21
PCIE8_RXP/SATA1A_RXP USB2N_7
AH1 USB_CPU_PN6 55
Touch Panel (USB2.0 Port7)
HDD 60 SATA_TX_CPU_N0
60 SATA_TX_CPU_P0
D21
C21
PCIE8_TXN/SATA1A_TXN
PCIE8_TXP/SATA1A_TXP
USB2P_7
AH2 USB_CPU_PP6 55
3D3V_S0
E22
PCIE9_RXN
USB2N_8
USB2P_8
AF8
AF9
USB_CPU_PN7
USB_CPU_PP7
61
61
Bluetooth (USB2.0 Port8)
1. Trace Width: 4 mils min (breakout) 12-15 mils (trace) E23
PCIE9_RXP
Note: Must maintain low DC resistance routing (<0.1 ohm). B23 AG1 R1608
PCIE9_TXN USB2N_9
A23 AG2
Layout Note: 2. Isolation Spacing: At least 12 mils to any adjacent PCIE9_TXP USB2P_9
DC resistance < 0.5ohm. SATA_ODD_DA# 2 1
high speed I/O. F25 AH7
PCIE10_RXN USB2N_10
E25 AH8
PCIE10_RXP USB2P_10 10KR2J-3-GP
D23
PCIE10_TXN USBCOMP Unused SATA[3:0]GP pins must be terminated to either
C23 AB6 1 R1603 2 113R2F-GP
PCIE10_TXP USB2_COMP 3.3V rail or GND using 8.2K to 10K on the
AG3
PCIE_RCOMPN USB2_ID motherboard. Either pull-up or pull-down is acceptable.
F5 AG4
R1604 1 PCIE_RCOMPP PCIE_RCOMPN USB2_VBUSSENSE
2 E5
100R2F-L1-GP-U PCIE_RCOMPP
A9
GPP_E9/USB2_OC0# USB_OC1# USB_OC0# 34
99 XDP_PRDY# D56 C9
PROC_PRDY# GPP_E10/USB2_OC1# USB_OC2# USB_OC1# 36
99 XDP_PREQ# D61 D9
10KR2J-3-GP 2 PROC_PREQ# GPP_E11/USB2_OC2# USB_OC2# 66
3D3V_S0 1R1607 PIRQA# BB11 B9 NFC_IRQ 90
GPP_A7/PIRQA# GPP_E12/USB2_OC3#
E28 J1 (#543016) When used as DEVSLP, no external pull-up or pull-down 3D3V_S0
PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 NFC_RST 90
DY E27 J2 DEVSLP1_HDD_CON 60 termination required from SATA Host DEVSLP.
PESD5V0U1BL-GP-U1
PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1
1
D24 J3 SATA_ODD_DA#
PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 R1610
ED1602
C24
PCIE11_TXP/SATA1B_TXP GPP_E0/SATAXPCIE0/SATAGP0 DEVSLP1_HDD_CON 2
E30 H2 1
PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 SATA_ODD_PRSNT# 3D3V_S5_PCH
F30
PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1
H3
GPP_E2/SATAXPCIE2/SATAGP2 3D3V_S0 DY
A25 G4
2
PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 RN802 10KR2J-3-GP

B25
PCIE12_TXP/SATA2_TXP SATA_LED# USB_OC2#
H1 8 1
GPP_E8/SATALED#
7 2
USB_OC0# 6 3
SKYLAKE-U-GP RN803 USB_OC1# 5 4
GPP_E2/SATAXPCIE2/SATAGP2 8 1
071.SKYLA.000U SATA_ODD_PRSNT# 7 2
SATA_LED# 6 3 SRN10KJ-6-GP
GPP_E0/SATAXPCIE0/SATAGP0 5 4
C C
SRN10KJ-6-GP
PCIE Table USB 2.0 Table

(#543016) Unused SATAGP[2:0]/GPP_E[2:0] pins must be terminated to either 3.3 V rail or GND
using 8.2 KΩ to 10 KΩ on the motherboard.
Do not use both pull-up and pull-down. Either pull-up or pull-down is acceptable.
Port Device Share BUS Pair Device
1 N/A USB3.0_3 0 USB3.0 port1 (Debug Port)
2 N/A USB3.0_4 1 USB2.0 Port2
3 WLAN 2 USB2.0 Port3 (IOBD)
4 LAN 3 X
5(L0~L3) GPU 4 CAMERA
6(L3) HDD SATA0 5 Card Reader
6(L2) N/A SATA1 6 Touch Panel
6(L0~L1) N/A 7 Bluetooth
#545659 (SKL_PCH_U_Y_EDS Rev0.7)
B B
A A
BOM1
Wistron Corporation
Title
CPU_(PCIE/SATA/USB)
A1
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = PCH

3D3V_S5
R1709
1 2 AC_PRESENT
10KR2J-3-GP
RN1701 SIO_SLP_S3# 1 AFTP1701

2 3 SIO_PWRBTN#
1 4 PCH_WAKE#
TPAD14-OP-GP
SRN10KJ-5-GP
R1713
R1723 PCH_PLTRST#
24,31,40,61,68,79 PLT_RST# 1 2
D 1 2 PCH_BATLOW# 0R0402-PAD D
1
10KR2J-3-GP
1
RTC_AUX_S5 3D3V_S0 3D3V_S5 R1715 C1701
47KR2J-2-GP DY SC220P50V2KX-3GP
[#543016 Rev0.7]
2
EXT_PWR_GATE#: Due to a bug on A0, a temporary pull-up resistor will be required to overcome the internal 20k
2
1
1
1 2 SM_INTRUDER# pull-down that is active during the early portion of the power up sequence
R1730 1MR2J-1-GP R1711 R1701
3KR2J-2-GP CPU1K 11 OF 20
10KR2J-3-GP
DY SYSTEM POWER MANAGEMENT
2
AT11 SIO_SLP_S0# 40
ED1704 SKYLAKE_ULT GPP_B12/SLP_S0#
AP15 SIO_SLP_S3# 24,40,51,52,54
R1733 1 10KR2J-3-GP PM_RSMRST# PCH_PLTRST# GPD4/SLP_S3#
2 2 1 AN10 BA16 SIO_SLP_S4# 24,40,51
XDP_DBRESET# GPP_B13/PLTRST# GPD5/SLP_S4# SIO_SLP_S5# 3D3V_S5
B5 AY16 1
PM_RSMRST# SYS_RESET# GPD10/SLP_S5# TP1703 TPAD14-OP-GP
AY17
PESD5V0U1BL-GP-U1 RSMRST#
DY H_CPUPWRGD SLP_SUS#
AN15
SLP_LAN#
SIO_SLP_SUS# 40,41,53,54
0R2J-2-GP
1 R411 2 A68 AW15 1
40 H_THERMTRIP_EN PROCPWRGD SLP_LAN# R1731
#544669 Rev0.52 CRB: H_VCCST_PWRGD_R 1 2 60D4R2F-GP H_VCCST_PWRGD B65 BB17 GPD9/SLP_WLAN# 1 TP1704 TPAD14-OP-GP
R1734 VCCST_PWRGD GPD9/SLP_WLAN# SIO_SLP_A# TP1705 TPAD14-OP-GP EXT_PWR_GATE#
No PL resistor on THERMTRIP#. AN16 1 2 1
ED1701 SYS_PWROK GPD6/SLP_A# TP1706 TPAD14-OP-GP
24 SYS_PWROK B6
H_CPUPWRGD R1706 1 PM_PCH_PWROK SYS_PWROK
2 1 40 PCH_PWROK 2 0R0402-PAD BA20 BA15 SIO_PWRBTN# 24
PM_RSMRST# R1704 1 0R0402-PAD PCH_DPWROK PCH_PWROK GPD3/PWRBTN# AC_PRESENT 20KR2J-L2-GP
DY 2 BB20
DSW_PWROK GPD1/ACPRESENT
AY15
PCH_BATLOW#
AC_PRESENT 24
AU13
1
PESD5V0U1BL-GP-U1 GPD0/BATLOW#
ME_SUS_PWR_ACK_R AR13 BATLOW#:
1
20,24 ME_SUS_PWR_ACK_R SUSACK#_R GPP_A13/SUSWARN#/SUSPWRDNACK
AP11 Pull-up required even if not implemented.
GPP_A15/SUSACK#
1 2 PM_PCH_PWROK 1 R405 AU11 PME# 1
GPP_A11/PME#
ED1703
R1732 8K2R2F-1-GP DY 10KR2J-3-GP PCH_WAKE# BB15 AP16 SM_INTRUDER# TP1707 TPAD14-OP-GP
PESD5V0U1BL-GP-U1
AFTP1702 24,31 PCH_WAKE# R1707 GPD2/LAN_WAKE# WAKE# INTRUDER#

3D3V_S5 1 2 10KR2J-3-GP AM15
R1717 SYS_PWROK AFTE14P-GP GPD2/LAN_WAKE# EXT_PWR_GATE#
2 DY 1 10KR2J-3-GP AW17 AM10
2
GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# GPP_B2/VRALERT#
AT15 AM11 1
2
GPD7/RSVD#AT15 GPP_B2/VRALERT# TP1708 TPAD14-OP-GP

(PDG#543016)
SKYLAKE-U-GP
WAKE#: Ensure that WAKE# signal Trise (Maximum) is <100 ns.
071.SKYLA.000U
3D3V_S5
SCD1U16V2KX-3GP
C C1702 C
+VCCST_CPU
1
2
Dis-wire with XDP_PM_RSMRST_PWRGD_XDP
1
U1701 R1722
1KR2J-1-GP
1 5
NC#1 VCC
VCCST_PWRGD / HWM201:
2
24,40 ALL_SYS_PWRGD 2
A
3 4 H_VCCST_PWRGD_R
GND Y
EC1708
1
74LVC1G07GW-GP DY
73.01G07.0HG
SCD1U16V2KX-3GP
2
1
R1716
DY 2
100KR2F-L1-GP
1
R1719
1
47KR2F-GP
EC1709
DY
DY
SCD1U16V2KX-3GP
2
#543016 Rev0.7
1. VCCST_PWRGD is only 1.0 V tolerant.
2. VCCST_PWRGD must go low during Sx pwr states, regardless of the voltage level of VCCST
B B
XDP_DBRESET#
SYS_PWROK
PLT_RST#
PCH_PWROK
DS3 BOM Option

DY
1
R1708 DY DY DY DY
ME_SUS_PWR_ACK_R 1 2 SUSACK#_R EC1706 EC1702 EC1703 EC1704 ED1702
0R2J-2-GP PCH_DPWROK R1718 1 DS3 2 0R2J-2-GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
KBC_DPWROK 24 PESD5V0U1BL-GP-U1
2
DY
2
2
DS3 R1725
100KR2F-L1-GP
1
3D3V_AUX_S5 R1727
100KR2J-1-GP
1 2
NON DS3
2
R1726
10KR2J-3-GP
1KR2J-1-GP
Q1701
1
R1702
4 3 PM_RSMRST# 1 2 PCH_RSMRST# 24
3V_5V_POK# 5 2 3V_5V_POK_C 1 R1728 2 3V_5V_POK 45,54
6 1 0R0402-PAD EC1711 EC1712
1
DY DY
DS3
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
A 2N7002KDW-GP R1729 1 SIO_SLP_SUS# A

2
2
0R2J-2-GP
84.2N702.A3F
2nd = 84.2N702.E3F BOM1
3rd = 75.00601.07C
4th = 84.DMN66.03F
Wistron Corporation
Title
CPU_(POWER MANAGEMENT)
A2
Tesla SKL-U -1
Date: Monday, July 27, 2015 Sheet 17 of 102
5 4 3 2 1
5 4 3 2 1
Main Func = PCH PCH strap pin: PCH Prim

PCH strap pin: PCH Prim
eSPI or LPC Sampled at rising edge of RSMRST# 3D3V_S5_PCH
BOOT HALT 3D3V_S5
SML0ALERT# / This signal has a weak internal pull-down. 3D3V_S5_PCH
1
0 = LPC Is selected for EC. SPI0_MOSI 0 = ENABLED
GPP_C5
1
1 = eSPI Is selected for EC. DY R1822 1 = DISABLED
1KR2J-1-GP WEAK INTERNAL PU DY R1824 RN1807
This signal has a weak internal pull-down. 1KR2J-1-GP SML1_SMBDATA 8 1
This signal has a weak internal pull-up. SML1_SMBCLK 7 2
2
SML0_DATA 6 3
2
GPP_C5/SML0ALERT# SML0_CLK 5 4
SPI_SI_CPU
1
SRN2K2J-4-GP
1
DY R1823
1KR2J-1-GP DY R1825
1KR2J-1-GP
D R1826 D
2
SENSOR_HUB_INT# 1 2
3D3V_S5 10KR2J-3-GP
3D3V_S5 PLACE WITHIN 1.1 INCH OF PCH GPP_C2/SMBALERT# 1 R1827 2
(#543016)Optional, can be left as OPEN/No-Connect. DY 10KR2J-3-GP
1
RN1811
1
R1835
R1834 1KR2J-1-GP MEM_SMBCLK 4 1
MEM_SMBDATA
DY 1KR2J-1-GP DY 3 2
2
2
SPI_HOLD_CPU SRN2K2J-1-GP
RN1806
1
LPC_AD0 8 1 LPC_LAD0_R add Circuit for NFC

R1836 24,68 LPC_AD0 LPC_AD2 LPC_LAD2_R
7 2
SPI_WP_CPU 24,68 LPC_AD2 LPC_AD1 LPC_LAD1_R
1KR2J-1-GP 6 3
24,68 LPC_AD1 LPC_AD3 LPC_LAD3_R
5 4
24,68 LPC_AD3 3D3V_S0
2
SRN0J-7-GP-U
3D3V_S0 CPU1E 5 OF 20 RN1812
Resister value will check later 2 3
SPI - FLASH
R2021
0R0402-PAD R1806 SPI_CLK_CPU SKYLAKE_ULT
SMBUS, SMLINK
MEM_SMBCLK 3D3V_S5_PCH
1 NFC 4
24,25 SPI_CLK_R 1 2 AV2 R7
SIO_RCIN# 0R0402-PAD R1807 SPI_SO_CPU SPI0_CLK GPP_C0/SMBCLK MEM_SMBDATA SRN1KJ-7-GP
1 2 24,25 SPI_SO_R 1 2 AW3 R8
10KR2J-3-GP 0R0402-PAD R1808 SPI_SI_CPU SPI0_MISO GPP_C1/SMBDATA GPP_C2/SMBALERT#
24,25 SPI_SI0_R 1 2 AV3
SPI0_MOSI Strap GPP_C2/SMBALERT#
R10
0R0402-PAD 1 2 R1809 SPI_WP_CPU AW2 R1814
R2032 25 SPI0_WP# SPI0_IO2
0R0402-PAD 1 2 R1811 SPI_HOLD_CPU AU4 R9 SML0_CLK SUS_STAT#/LPCPD# 2 DY 1 Q1802
25 SPI_HOLD_0# SPI0_IO3 GPP_C3/SML0CLK
1 2 INT_SERIRQ 0R0402-PAD 1 2 R1812 SPI_CS_CPU_N0 AU3 W2 SML0_DATA TP1810 1SML0_DATA 6 1
24,25 SPI_CS0#_R SPI0_CS0# GPP_C4/SML0DATA PCH_SML0_DATA 90
10KR2J-3-GP AU2 W1 GPP_C5/SML0ALERT# 10KR2J-3-GP TPAD14-OP-GP
AU1
SPI0_CS1# Strap GPP_C5/SML0ALERT# 3D3V_S0 5 2
SPI0_CS2#
SERIRQ PH: GPP_C6/SML1CLK
W3 SML1_SMBCLK
SML1_SMBCLK 24,26,66,79,90
R1818
PDG: 8.2k V3 SML1_SMBDATA 8K2R2F-1-GP 4 3
SPI - TOUCH GPP_C7/SML1DATA SML1_SMBDATA 24,26,66,79,90
AM7 SENSOR_HUB_INT# CLKRUN#_R 1 2
CRB: 10k TPAD14-OP-GP TP1801 CPU_D1_TP GPP_B23/SML1ALERT#/PCHHOT# SENSOR_HUB_INT# 24
2N7002KDW-GP
1 M2
TPAD14-OP-GP TP1802 CPU_D2_TP GPP_D1/SPI1_CLK
TPAD14-OP-GP TP1803
1
CPU_D3_TP
M3
GPP_D2/SPI1_MISO 84.2N702.A3F
TPAD14-OP-GP TP1804
1
CPU_D4_TP
J4
GPP_D3/SPI1_MOSI 20140820 DAIVD
2nd = 84.DM601.03F PCH_SML0_CLK 90
1 V1
CPU_D5_TP GPP_D21/SPI1_IO2
TPAD14-OP-GP TP1805 1 V2 TP1809 1SML0_CLK
GPP_D22/SPI1_IO3
TPAD14-OP-GP TP1806 1 CPU_D6_TP M1
GPP_D0/SPI1_CS#
LPC
GPP_A1/LAD0/ESPI_IO0
AY13 LPC_LAD0_R TPAD14-OP-GP NFC
C BA13 LPC_LAD1_R C
GPP_A2/LAD1/ESPI_IO1 LPC_LAD2_R
BB13
C LINK GPP_A3/LAD2/ESPI_IO2 LPC_LAD3_R R1801
AY12
GPP_A4/LAD3/ESPI_IO3 LPC_LFRAME#_R
61 CL_CLK G3 BA12 2 1 LPC_FRAME# 24,68
CL_CLK GPP_A5/LFRAME#/ESPI_CS# SUS_STAT#/LPCPD# 0R0402-PAD
61 CL_DATA G2 BA11
CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET#
61 CL_RST# G1
CL_RST#
AW9 PCI_CLK_LPC0 R1820 1 222R2J-2-GP
GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_PCI_KBC 24
RCIN#: 24 SIO_RCIN# AW13
GPP_A0/RCIN# GPP_A10/CLKOUT_LPC1
AY9 PCI_CLK_LPC1 R1804 1 222R2J-2-GP CLK_PCI_DB 68
Frequency to Avoid: 33 MHz AW11 CLKRUN#_R 1 R1819 2
GPP_A8/CLKRUN# PM_CLKRUN#_EC_R 24
24 INT_SERIRQ AY11
GPP_A6/SERIRQ 0R0402-PAD
SKYLAKE-U-GP
071.SKYLA.000U
1
SCD1U16V2KX-3GP
EC1805
DY
2
3D3V_S0
RN1810
3 2 3D3V_S0
4 1
SRN10KJ-5-GP
2N7002KDW-GP
MEM_SMBDATA 6 1 PCH_SMBDATA 13,65
84.2N702.A3F 5 2
2nd = 84.2N702.E3F
3rd = 75.00601.07C 4 3
4th = 84.DMN66.03F
Q1801
B B
PCH_SMBCLK 13,65 RTC_X1

C1801
3D3V_S0
MEM_SMBCLK 1 2 RTC_X2 XTAL24_IN 2 1
R1815 10MR2J-L-GP
1 R1817 2 CLKREQ_PEG#0
10KR2J-3-GP X1802 SC15P50V2JN-2-GP
1
1 R1829 2 CLKREQ_PCIE#1
10KR2J-3-GP 1 4 X1801
1
XTAL-24MHZ-81-GP
R1802
RN1801 1MR2J-1-GP 82.30004.841
2
8 1 CLKREQ_PCIE#5 2 3
4
7 2 CLKREQ_PCIE#2 C1804 C1803
C1802
2
6 3 CLKREQ_PCIE#4 SC4P50V2CN-GP SC4P50V2CN-GP XTAL24_OUT
1
5 4 CLKREQ_PCIE#3 XTAL-32D768KHZ-67-GP XTAL24_OUT 2 1
CPU1J 10 OF 20
SRN10KJ-6-GP
CLOCK SIGNALS 82.30001.G11 SC15P50V2JN-2-GP
DY
1
ED1803
76 PEG_CLK_CPU# D42
PESD5V0U1BL-GP-U1
CLKOUT_PCIE_N0 SKYLAKE_ULT
GPU 76 PEG_CLK_CPU
76 CLKREQ_PEG#0
CLKREQ_PEG#0
C42
AR10
CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0#
2
WLAN 61 PEG_CLK1_CPU#
61 PEG_CLK1_CPU
B42
A42
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N
F43 SUSCLK_R
CLKREQ_PCIE#1 AT7 E43
61 CLKREQ_PCIE#1
2
GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P R1813 RTC_AUX_S5
D41 BA17 SUSCLK_R 1 2 DY EC1803
31 PEG_CLK2_CPU# CLKOUT_PCIE_N2 GPD8/SUSCLK PCH_SUSCLK_KBC 61
LAN 31 PEG_CLK2_CPU C41
1
CLKOUT_PCIE_P2
SC4D7P50V2BN-GP
AT8 E37 XTAL24_IN 0R0402-PAD 1D0V_S5
31 CLKREQ_PCIE#2 GPP_B7/SRCCLKREQ2# XTAL24_IN
E35 XTAL24_OUT +V1.05S_AXCK_LCPLL
2
1
XTAL24_OUT
D40
CLKOUT_PCIE_N3 XCLK_BIASREF
C40 E42 1 R1803 2 RN1813
CLKREQ_PCIE#3 CLKOUT_PCIE_P3 XCLK_BIASREF 2K7R2F-GP
AT10 SRN20KJ-1-GP
GPP_B8/SRCCLKREQ3# RTC_X1 R1810
AM18
RTCX1 RTC_X2 Intel recommend: 2.71k ohm 5%
B40 AM20 1 2
CLKOUT_PCIE_N4 RTCX2 0R0402-PAD
A40
3
4
CLKREQ_PCIE#4 CLKOUT_PCIE_P4 SRTC_RST#
AU8 AN18
GPP_B9/SRCCLKREQ4# SRTCRST# RTC_RST# Q1803
AM16
A RTCRST# A
E40 24 RTCRST_ON G
CLKOUT_PCIE_N5 SRTC_RST#
E38 1
CLKREQ_PCIE#5 CLKOUT_PCIE_P5 RTC_RST#
AU7 D
GPP_B10/SRCCLKREQ5# R1821
DY
SC1U10V2KX-1GP
1
2
10KR2J-3-GP S
DY DY
1
ED1802
G1801
C1806
PESD5V0U1BL-GP-U1
1
SCD1U16V2KX-3GP
2N7002K-2-GP C1805
2
1
EC1808
GAP-OPEN
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SKYLAKE-U-GP SC1U10V2KX-1GP
DY 84.2N702.J31
EC1806
EC1807
2ND = 84.2N702.031 DY DY
Wistron Corporation
2
2
071.SKYLA.000U 3rd = 84.07002.I31
2
(#514849)
Title
Layout: Place at the open door area. CPU_(LPC/SPI/SMBUS/CL/CLK)

A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = PCH Strap pin:

Port B /
Sampled at rising edge of PCH_PWROK
Port C Detected
0 = Port B is not detected.

DDPB_CTRLDATA * 1 = Port B is detected.
DDPC_CTRLDATA *
D D
R1915
CPU1G 7 OF 20 BT_DISABLE# 2 1
These two signals have weak internal pull-down.
0 = Port C is not detected.
AUDIO 10KR2J-3-GP
1 = Port C is detected. SKYLAKE_ULT
HDA_SYNC BA22
HDA_BITCLK HDA_SYNC/I2S0_SFRM
AY22 HDA_BLK/I2S0_SCLK
HDA_SDOUT BB22 SDIO/SDXC
HDA_SDO/I2S0_TXD
27 HDA_SDIN0 BA21 HDA_SDI0/I2S0_RXD
AY21 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB11 BT_DISABLE# 61
HDA_RST# AW22 AB13 GPU_EVENT# 79
HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0
J5 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 AB12
AY20 I2S1_SFRM GPP_G3/SD_DATA2 W12
AW20 I2S1_TXD GPP_G4/SD_DATA3 W11
GPP_G5/SD_CD# W10
AK7 GPP_F1/I2S2_SFRM GPP_G6/SD_CLK W8
AK6 GPP_F0/I2S2_SCLK GPP_G7/SD_WP W7
AK9 GPP_F2/I2S2_TXD
AK10 GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BA9
BB9 CPU_A16_TP 1 TP1902
GPP_A16/SD_1P8_SEL TPAD14-OP-GP
H5 AB7 SD_RCOMP 1 R1901 2
GPP_D19/DMIC_CLK0 SD_RCOMP
D7 GPP_D20/DMIC_DATA0
200R2F-L-GP
D8 GPP_D17/DMIC_CLK1 GPP_F23 AF13
24,76,86 DGPU_PW ROK DGPU_PW ROK C8 GPP_D18/DMIC_DATA1
27 SPKR SPKR AW5

C GPP_B14/SPKR C
SKYLAKE-U-GP
PCH strap pin:
PCH strap pin:
Flash Descriptor Security Overide/ NO REBOOT
3D3V_S0
Intel ME Debug Mode 1KR2J-1-GP
HDA_SDOUT
Low = Default * HDA_SPKR
* Low = Enable (Default) R2006
1 DY 2 SPKR
High = Enable High = Disable
The internal pull-down is disabled after
PLTRST# deasserts The internal pull-down is disabled after
PLTRST# deasserts
RN1901
27 HDA_CODEC_SYNC 1 4 HDA_SYNC
27 HDA_CODEC_SDOUT 2 3 HDA_SDOUT
SRN0J-6-GP
24 ME_FW P_EC R1909 1 2 1KR2J-1-GP

EC1901
1 2 HDA_CODEC_BITCLK
B B
DY
SC10P50V2JN-4GP
RN1902
27 HDA_CODEC_BITCLK 1 4 HDA_BITCLK
27 HDA_CODEC_RST# 2 3 HDA_RST#
HDA_CODEC_RST# SRN0J-6-GP
1
DY EC1902
SCD1U16V2KX-3GP
2
A BOM1 A
Wistron Corporation
Title
CPU_(AUDIO/SDIO/SDXC)
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = PCH 79 DGPU_HOLD_RST# SRN2K2J-1-GP

3D3V_S0
RN2007
R1922
10KR2J-3-GP 2 1 DGPU_HOLD_RST# SENSOR_HUB_SCL 1 4
1
2 1 DGPU_PWR_EN# DY SENSOR_HUB_SDA 2 3
10KR2J-3-GP R1923 EC2002
SC1KP50V2KX-1GP
RN2008
2
R1916 1 2 CAMERA_EN
10KR2J-3-GP CPU1F 6 OF 20 I2C1_SCL 1 4
I2C1_SDA 2 DY 3
LPSS ISH
SKYLAKE_ULT
USB_UART_SEL_D9 1 TP2006 TPAD14-OP-GP SRN2K2J-1-GP
90 NFC_REQ AN8 P2
GPP_B15/GSPI0_CS# GPP_D9 DGPU_HOLD_RST#
AP7 P3
VRAM_ID1 GPP_B16/GSPI0_CLK GPP_D10 RN2009
AP8 P4
GPP_B18/GSPI0_MOSI GPP_B17/GSPI0_MISO GPP_D11 GC6_FB_EN_PCH 79 ISH_GP_0_R
PCH strap pin: AR7
GPP_B18/GSPI0_MOSI
Strap
GPP_D12
P1 CAMERA_EN 55
ISH_GP_1_R
1
2
4
3
RTC_DET_R AM5 M4
25 RTC_DET_R GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA
D Boot BIOS Strap Bit BBS AN7 N3 SRN10KJ-5-GP D
79 VIDEO_THERM_ALERT# GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL
55 TOUCH_RST AP5
GPP_B22/GSPI1_MOSI GPP_B21/GSPI1_MISO I2C1_SDA
AN5 N1
GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA
Boot BIOS * Low = SPI (Default)
AB1
GPP_D8/ISH_I2C1_SCL
N2 I2C1_SCL GC6_FB_EN_PCH
10KR2J-3-GP
2 1 R1921
Destination High = LPC GPP_C8/UART0_RXD
AB2 AD11 1.8V Only
GPP_C9/UART0_TXD GPP_F10/I2C5_SDA/ISH_I2C2_SDA
W4 AD12
DGPU_PRSNT# GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
The internal pull-down is disabled after PLTRST# deasserts AB3
GPP_C11/UART0_CTS#
Need double confirm, GPIO table set to GPI AD1
GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
U1 DGPU_PWR_EN# 86
AD2 U2 TPM_DETECT_1
if that's needed PH or PL AD3
GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
U3 TPM_DETECT_2
GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS# UART0_CTS# TP2011 TPAD14-OP-GP
AD4 U4 1
GPP_C23/UART2_CTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT#
(PDG#543016) Ensure that all I2C interface on-board terminations are pulled up
RN2010 AC1 UART1_RXD 1 TP2012 TPAD14-OP-GP to the same voltage rail as the device/end point.
3D3V_S0 GPP_C12/UART1_RXD/ISH_UART1_RXD
G-sensor 24 SENSOR_HUB_SDA 2 3 SENSOR_HUB_SDA0
SENSOR_HUB_SCL0
U7
GPP_C16/I2C0_SDA GPP_C13/UART1_TXD/ISH_UART1_TXD
AC2 UART1_TXD
UART1_RTS#
1 TP2013
TP2014
TPAD14-OP-GP
TPAD14-OP-GP
24 SENSOR_HUB_SCL 1 4 U6 AC3 1
GPP_C17/I2C0_SCL GPP_C14/UART1_RTS#/ISH_UART1_RTS# UART1_CTS# TP2015 TPAD14-OP-GP
AB4 1
SRN0J-14-GP GPP_C15/UART1_CTS#/ISH_UART1_CTS#
U8
GPP_C18/I2C1_SDA ISH_GP_0_R
U9 AY8 ISH_GP_0_R 70
GPP_C19/I2C1_SCL GPP_A18/ISH_GP0 ISH_GP_1_R
BA8 ISH_GP_1_R 66
R1914 1 CAMERA_EN GPP_A19/ISH_GP1 TOUCH_DET
DY 2 10KR2J-3-GP AH9 BB7
GPP_F4/I2C2_SDA GPP_A20/ISH_GP2 NFC_DETECT
AH10 BA7
R1917 1 TOUCH_RST GPP_F5/I2C2_SCL GPP_A21/ISH_GP3 UC_DETECT
2 10KR2J-3-GP AY7
GPP_A22/ISH_GP4 ThermalIC_DET
AH11 AW7
GPP_F6/I2C3_SDA GPP_A23/ISH_GP5
AH12 AP13
GPP_F7/I2C3_SCL SX_EXIT_HOLDOFF#/GPP_A12/BM_BUSY#/ISH_GP6
AF11
GPP_F8/I2C4_SDA 3D3V_S0
AF12
GPP_F9/I2C4_SCL
R1918
1 2 GPP_B22/GSPI1_MOSI SKYLAKE-U-GP
1KR2J-L2-GP
1
DY 071.SKYLA.000U (PDG#543016) If the UART/GPIO functionality is also not used,
R2017 the signals can be left as no-connect.
10KR2J-3-GP
TOUCH
PCH Prim
2
TOUCH_DET
PCH strap pin: 3D3V_S0
1
C C
No Reboot Sampled at rising edge of PCH_PWROK
1
R2018
R2007 10KR2J-3-GP
0 = Disable “No Reboot” mode. DY NON TOUCH
GSPI0_MOSI / 1KR2J-1-GP
GPP_B18 1 = Enable “No Reboot” mode (PCH will disable the TCO
2
3D3V_S0 3D3V_S0
Timer system reboot feature). This function is useful
2
3D3V_S0
when running ITP/XDP. GPP_B18/GSPI0_MOSI
1
RN2011
1
The signal has a weak internal pull-down. R2010 R2029 1 4 NFC_DETECT

DY R2019 DY 10KR2J-3-GP DY 10KR2J-3-GP 2 3 UC_DETECT
1KR2J-1-GP
3D3V_S0 3D3V_S0 3D3V_S0
2
SRN10KJ-5-GP
2
TPM_DETECT_1 TPM_DETECT_2
1
R2005
UMA
1
1
10KR2J-3-GP
R2022 R2028 R2009 R2013
10KR2J-3-GP
DY 10KR2J-3-GP
DY
DY 10KR2J-3-GP DY 10KR2J-3-GP NFC_DETECT UC_DETECT
2
DGPU_PRSNT#
2
1
NFC_REQ VIDEO_THERM_ALERT#
R2026 R2016
1
10KR2J-3-GP 10KR2J-3-GP
NFC
1
R2008 NUC
R2020 R2027 10KR2J-3-GP
OPS
2
10KR2J-3-GP 10KR2J-3-GP
DY DY
2
2
TPM/TCM Strap pin TPM_DETECT_1 TPM_DETECT_2
TPM 0 0
3D3V_S0 3D3V_S0
3D3V_S5_PCH
TCM 0 1
1
R2053 R2023
R2039 1 2 10KR2J-3-GP Non-TPM&Non-TCM 1 0 NCT7718 10KR2J-3-GP 10KR2J-3-GP
ME_SUS_PWR_ACK_R 17,24 DY
B B
2
ThermalIC_DET VRAM_ID1
1
R2054 R2024
10KR2J-3-GP DY 10KR2J-3-GP
TV
2
A A
BOM1
Wistron Corporation
Title
CPU_(LPSS/ISH)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = PCH
RTC_AUX_S5
C2119 C2118
1D0V_S5
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
CPU1O 15 OF 20
C2117
DY
SC1U10V2KX-1GP
CPU POWER 4 OF 4
AB19
2
VCCPRIM_1P0
AB20 AK15 +VCCPGPPA
VCCPRIM_1P0 SKYLAKE_ULT VCCPGPPA
P18 AG15 +VCCPGPP
VCCPRIM_1P0 VCCPGPPB
Y16
VCCPGPPC
2.57A AF18
VCCPRIM_CORE VCCPGPPD
Y15
C2106
C2107
AF19 T16
1
VCCPRIM_CORE VCCPGPPE
SC1U10V2KX-1GP
SC1U10V2KX-1GP
V20 1.8V Only AF16 +V1.8A
VCCPRIM_CORE VCCPGPPF
D
+VCCDSW_1P0
V21
VCCPRIM_CORE VCCPGPPG
AD15 CAP need close to VCCRTC D
2
C2120 AL1 V19 3D3V_S5
DCPDSW_1P0 VCCPRIM_3P3
1
1D0V_S5
K17 T1 1D0V_S5
VCCMPHYAON_1P0 VCCPRIM_1P0
L1
2
VCCMPHYAON_1P0
SC1U10V2KX-1GP
AA1 +V1.8A
VCCATS_1P8
N15
VCCMPHYGT_1P0
N16 AK17 3D3V_S5
VCCMPHYGT_1P0 VCCRTCPRIM_3P3
N17
VCCMPHYGT_1P0
P15 AK19 RTC_AUX_S5
+VCCAMPHYPLL_1P0 VCCMPHYGT_1P0 VCCRTC
P16 BB14
VCCMPHYGT_1P0 VCCRTC
K15 BB10 VCCRTCEXT C2112 1 2 SCD1U16V2KX-3GP
VCCAMPHYPLL_1P0 DCPRTC
L15
1D0V_S5 VCCAMPHYPLL_1P0
A14 +VCCCLK
VCCCLK1
C2109
V15
1
VCCAPLL_1P0
SC1U10V2KX-1GP
K19 +VCCCLK
VCCCLK2 C2110 C2111
AB17
3D3V_S5 VCCPRIM_1P0
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Y18 L21 +VCCCLK
2
VCCPRIM_1P0 VCCCLK3
AD17 N20 +VCCCLK
VCCDSW_3P3 VCCCLK4
AD18
VCCDSW_3P3
AJ17 L19 +VCCCLK
VCCDSW_3P3 VCCCLK5
AJ19 A10 +VCCCLK
VCCHDA VCCCLK6
AJ16 AN11 V0.85A_VID0 1 TP2101 TPAD14-OP-GP
VCCSPI GPP_B0/CORE_VID0
AN13 V0.85A_VID1 1 TP2102 TPAD14-OP-GP
GPP_B1/CORE_VID1
1D0V_S5 AF20
VCCSRAM_1P0
AF21
3D3V_S5 VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3
1D0V_S5 AK20
VCCPRIM_1P0
C2105
1
SC1U10V2KX-1GP
N18
VCCAPLLEBB_1P0
2
C SKYLAKE-U-GP C
071.SKYLA.000U
1D0V_S5 +VCCDSW_1P0 +V1.8A

C2101
C2102
C2104
C2103
C2108
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
2
+VCCCLK
B B
C2116
C2121
1
1
SC1U10V2KX-1GP
SC2D2U10V2KX-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
C2113 C2115 C2114

2
A A
BOM1
Wistron Corporation
Title
CPU_(POWER1)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = PCH
D D
CPU1T 20 OF 20
SKYLAKE_ULT
SPARE
AW69 RSVD#AW69 RSVD#F6 F6

AW68 RSVD#AW68 RSVD#E3 E3
AU56 RSVD#AU56 RSVD#C11 C11
AW48 RSVD#AW48 RSVD#B11 B11
C7 RSVD#C7 RSVD#A11 A11
U12 RSVD#U12 RSVD#D12 D12
U11 RSVD#U11 RSVD#C12 C12
H11 RSVD#H11 RSVD#F52 F52
SKYLAKE-U-GP
C
071.SKYLA.000U C
B B
BOM1
A
Title
CPU_(RSVD)
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = PCH
CPU1P 16 OF 20
GND 1 OF 3
CPU1Q 17 OF 20 CPU1R 18 OF 20
A5 SKYLAKE_ULT AL65
VSS VSS GND 2 OF 3
D A67 VSS VSS AL66 GND 3 OF 3 D
A70 VSS VSS AM13 F8 VSS VSS L18
AA2 AM21 AT63 SKYLAKE_ULT BA49 G10 L2
VSS VSS VSS VSS VSS SKYLAKE_ULT VSS
AA4 VSS VSS AM25 AT68 VSS VSS BA53 G22 VSS VSS L20
AA65 VSS VSS AM27 AT71 VSS VSS BA57 G43 VSS VSS L4
AA68 VSS VSS AM43 AU10 VSS VSS BA6 G45 VSS VSS L8
AB15 VSS VSS AM45 AU15 VSS VSS BA62 G48 VSS VSS N10
AB21 VSS VSS AM60 AU38 VSS VSS BB18 G55 VSS VSS N21
AB8 VSS VSS AM61 AV1 VSS VSS BB26 G58 VSS VSS N6
AD13 VSS VSS AM68 AV68 VSS VSS BB30 G6 VSS VSS N65
AD16 VSS VSS AM71 AV69 VSS VSS BB34 G60 VSS VSS N68
AD19 VSS VSS AM8 AV70 VSS VSS BB38 G63 VSS VSS P17
AD20 VSS VSS AN20 AV71 VSS VSS BB43 G66 VSS VSS P19
AD21 VSS VSS AN23 AW10 VSS VSS BB55 H15 VSS VSS P20
AD62 VSS VSS AN28 AW12 VSS VSS BB6 H18 VSS VSS P21
AD8 VSS VSS AN30 AW14 VSS VSS BB60 H71 VSS VSS R13
AE64 VSS VSS AN32 AW16 VSS VSS BB64 J11 VSS VSS R6
AE65 VSS VSS AN33 AW18 VSS VSS BB67 J13 VSS VSS T15
AE66 VSS VSS AN35 AW21 VSS VSS BB70 J25 VSS VSS T17
AE67 VSS VSS AN37 AW23 VSS VSS C1 J28 VSS VSS T18
AF1 VSS VSS AN42 AW30 VSS VSS D10 J38 VSS VSS T4
AF10 VSS VSS AN58 AW32 VSS VSS D11 J42 VSS VSS U10
AF15 VSS VSS AN63 AW34 VSS VSS D14 J8 VSS VSS U63
AF17 VSS VSS AP10 AW36 VSS VSS D18 K16 VSS VSS U64
C AF4 AP20 D25 K22 U67 C
VSS VSS VSS VSS VSS
AG16 VSS VSS AP28 AW43 VSS VSS D30 K63 VSS VSS U70
AG17 VSS VSS AP32 AW45 VSS VSS D34 K64 VSS VSS V16
AG20 VSS VSS AP42 AW51 VSS VSS D45 K67 VSS VSS W13
AH13 VSS VSS AP68 AW57 VSS VSS D53 K71 VSS VSS Y17
AH6 VSS VSS AP70 AW6 VSS VSS D58 L11 VSS VSS Y19
AH63 VSS VSS AR11 AW60 VSS VSS D6 L16 VSS VSS Y20
AH64 VSS VSS AR15 AW62 VSS VSS D62 L17 VSS VSS Y21
AH67 VSS VSS AR16 AW64 VSS VSS D66
AJ15 VSS VSS AR20 AW66 VSS VSS D69
AJ18 VSS VSS AR23 AW8 VSS VSS E11
AJ20 VSS VSS AR28 AY66 VSS VSS E15
AJ4 AR35 B10 E18 SKYLAKE-U-GP
VSS VSS VSS VSS
AK11 VSS VSS AR42 B14 VSS VSS E21
AK16 VSS VSS AR43 B18 VSS VSS E46 071.SKYLA.000U
AK69 VSS VSS AR53 B53 VSS VSS F1
AK8 VSS VSS AR55 B58 VSS VSS F13
AL2 VSS VSS AR58 B62 VSS VSS F2
B B
AL35 VSS VSS AT2 BA1 VSS VSS F27
F68 VSS VSS F42
BA45 VSS VSS BA41
SKYLAKE-U-GP
071.SKYLA.000U SKYLAKE-U-GP
071.SKYLA.000U
A BOM1 A
Wistron Corporation
Title
CPU_(VSS)
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
SSID = KBC MODEL ID

3D3V_AUX_KBC Model_ID_BOM Ctrl
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
1
R2441
LT41 Intel skylake 100.0K 10.0K 64.10025.6DL 3.0V
33KR2F-2-GP
BOM Ctrl_Model LT51 Intel skylake 100.0K 20.0K 64.20025.L0L 2.75V
2
LC41 Intel skylake 100.0K 33.0K 64.33025.L0L 2.48V
MODEL_ID
LC51 Intel skylake 100.0K 47.0K 64.47025.6DL 2.24V
1
R2442 LC51P Intel skylake 100.0K 64.9K 64.64925.6DL 2.0V
100KR2F-L1-GP
M51 100.0K 76.8K 64.76825.6DL 1.87V
2
NA 100.0K 215.0K 64.21535.6DL 1.048V
3D3V_AUX_KBC 3D3V_AUX_S5
D D
R2479 SPEC: ADT PWR Detection Function V1 3
1 2
0R0805-PAD
1 R2493 2 VBAT 3D3V_AUX_KBC

PCB VERSION
0R0603-PAD
1
C2426 C2420 PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
SC2D2U10V3KX-L-GP
SCD1U16V2KX-L-GP
R2469 R2437
2D2R3-1-U-GP 10KR2F-2-GP SA 100.0K 10.0K 3.0V
2
BOM Ctrl_VER SB 100.0K 20.0K 2.75V
2
2
PCB_VER SC 100.0K 33.0K 2.48V
EC_AGND
NPCE285G
1
3D3V_AUX_KBC_VCC SD 100.0K 47.0K 2.24V
R2436
100KR2F-L1-GP -1 100.0K 64.9K 2.0V
U2403
KROW[0..7] 65
SE 100.0K 76.8K 1.87V
2
1
1
C2401 C2404 C2405 C2430 C2429 C2421 19 54 KROW0
VCC KBSIN0/GPIOA0/N2TCK
SC2D2U10V3KX-L-GP
SCD1U16V2KX-L-GP
SCD1U10V2KX-5GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY 46
VCC KBSIN1/GPIOA1/N2TMS
55 KROW1 Reserved 100.0K 100.0K 1.65V
76 56 KROW2
2
2
VCC KBSIN2/GPIOA2 KROW3
88 57
3D3V_S0 VCC KBSIN3/GPIOA3 KROW4
115 58
VCC KBSIN4/GPIOA4 KROW5
59
KBSIN5/GPIOA5 KROW6
102 60
AVCC KBSIN6/GPIOA6 KROW7
61
KBSIN7/GPIOA7 3D3V_AUX_KBC
4
VDD KCOL[0..17] 65
R2481
45W_65W#
1D0V_S5 1 2 EC_VTT 12
VTT KBSOUT0/GPOB0/SOUT_CR/JENK#
53 KCOL0
DELTA Model:ADP65FD BB-PD03 ADP
0R0402-PAD
KBSOUT1/GPIOB1/TCK
52 KCOL1
High: 45W / Low 65W
1
1
C2402 C2428 EC_AGND C2427
DY
1 2 SCD1U10V2KX-5GP
KBSOUT2/GPIOB2/TMS
51 KCOL2 R2407
ADP internal Resis 287ohm
1
DISCRETE#
SCD1U16V2KX-L-GP
SC2D2U10V3KX-L-GP
C2425 97 50 KCOL3
44 AD_IA GPIO90/AD0 KBSOUT3/GPIOB3/TDI
SCD1U16V2KX-3GP PCB_VER 98 49 KCOL4 750R2F-L-GP 3.3*287/1037=0.91V (65W) High: UMA / Low: Discrete
2
ADT_TYPE GPIO91/AD1 KBSOUT4/GPOB4 KCOL5 LPC_AD0_C1 33R2J-2-GP R2449 LPC_AD0

99 48 1 2
2
GPIO92/AD2 KBSOUT5/GPIOB5/TDO KCOL6 LPC_AD1_C1 33R2J-2-GP R2454 LPC_AD1 LPC_AD0 18,68

66 LID_CLOSE2# 100 47 1 2
2
GPIO93/AD3 KBSOUT6/GPIOB6/RDY# KCOL7 LPC_AD1 18,68
17,31 PCH_WAKE# 108 43
MODEL_ID GPIO05/AD4 KBSOUT7/GPIOB7 KCOL8 ADT_TYPE R2499 1
96 42 2 AD_ID 43
GPIO04/AD5 KBSOUT8/GPIOC0 KCOL9 RN2405 0R0402-PAD
66 SCREEN_ROTATE_LOCK# 95 41
VD_IN2 GPIO03/EXT_PURST#/AD6KBSOUT9/GPOC1/SDP_VIS# KCOL10 LPC_AD2_C1 LPC_AD2
94 40 2 3
Thermal VD 26 VD_IN2 GPIO07/AD7/VD_IN2 KBSOUT10/P80_CLK/GPIOC2 LPC_AD2 18,68
1
39 KCOL11 LPC_AD3_C1 1 4 LPC_AD3
KBSOUT11/P80_DAT/GPIOC3 KCOL12 LPC_AD3 18,68 R2408
38
USB_PWR_EN1 KBSOUT12/GPO64/TEST# KCOL13 SRN33J-5-GP-U 100KR2F-L1-GP
34 USB_PWR_EN1 101 37
USB_AO_SEL1 GPIO94/DA0 KBSOUT13/GP(I)O63/TRIST# KCOL14
34 USB_AO_SEL1
USB_AO_SEL2
105
106
GPIO95/DA1 KBSOUT14/GP(I)O62/XORTR#
36
35 KCOL15 LPC_FRAME#_C1 33R2J-2-GP 1 2 R2498 DY
34 USB_AO_SEL2
2
GPIO96/DA2 KBSOUT15/GPIO61/XOR_OUT LPC_FRAME# 18,68
1 1D0V_S5
17,40 ALL_SYS_PWRGD 107
GPIO97/DA3 GPIO60/KBSOUT16/DSR1#
34
33
KCOL16
KCOL17
SA
GPIO57/KBSOUT17/DCD1#
AFTE14P-GP AFTP2404 NOTE:
43,44,70 BAT_SCL 70 Please be aware that the SPI interface trace length between
GPIO17/SCL1/N2TCK
BATTERY / CHARGER ----> 43,44,70 BAT_SDA 69
GPIO22/SDA1/N2TMS LAD0/GPIOF1
126 LPC_AD0_C1
PCH and EC should not exceed 6500mils,. The mismatch
18,26,66,79,90 SML1_SMBCLK 67
GPIO73/SCL2/N2TCK LAD1/GPIOF2
127 LPC_AD1_C1 EMI
PCH / GPU N15S / Gsensor /NCT7718 68 128 LPC_AD2_C1 C2431 of SPI interface signals between EC and SPI flash should
18,26,66,79,90 SML1_SMBDATA GPIO74/SDA2/N2TMS LAD2/GPIOF3
20 SENSOR_HUB_SCL 119
GPIO23/SCL3/N2TCK LAD3/GPIOF4
1 LPC_AD3_C1 1DYSC220P50V2KX-3GP
2 not exceed 500mils.
120 2 CLK_PCI_KBC_R 2 R2457 1
20 SENSOR_HUB_SDA GPIO31/SDA3/N2TMS LCLK/GPIOF5 CLK_PCI_KBC 18
PROCHOT_EC 24
28
GPIO47/SCL4A/N2TCK LFRAME#/GPIOF6
3
7
LPC_FRAME#_C1
PLT_RST#_EC
0R0402-PAD
1 R2473 2
Prevent BIOS data loss solution
18 SENSOR_HUB_INT# GPIO53/SDA4A/N2TMS LRESET#/GPIOF7 PLT_RST# 17,31,40,61,68,79
R2445 2 1 DGPU_PWROK_EC 26 0R0402-PAD
C 19,76,86 DGPU_PWROK GPIO51/TA3/N2TCK 3D3V_AUX_KBC C
66 VOL_UP_BTN# VOL_UP_BTN# 0R0402-PAD 123
GPIO67/SOUT1/N2TMS EC_SPI_CS#_C R2485
90 2 1 33R2J-2-GP SPI_CS0#_R 18,25
GPIOC6/F_CS0#
GPIOC7/F_SCK
92 EC_SPI_CLK_C R2497 2 1 33R2J-2-GP SPI_CLK_R 18,25 NOTE: ECRST#
1
TP----> 65 TPCLK 72
71
GPIO37/PSCLK1 GPIO30/F_WP#/RTS1#
109
80
RTCRST_ON RTCRST_ON 18 Locate resistors R2415 and R2417 close
65 TPDATA GPIO35/PSDAT1 GPIO41/F_WP#/PSL_GPIO41 BAT_IN# 43,44 to the U2401.
06/24 NOVO Button----> KBC_NOVO_BTN#_EC 10
11
GPIO26/PSCLK2 GPIOC5/F_SDIO/F_SDIO0
87
86
EC_SPI_DO_C
EC_SPI_DI_C
R2491
R2482
2
1
1 33R2J-2-GP
2 33R2J-2-GP
SPI_SI0_R 18,25
R2471
10KR2J-3-GP
61 WLAN_PCIE_WAKE# GPIO27/PSDAT2 GPIOC4/F_SDI/F_SDIO1 SPI_SO_R 18,25
1
DGPUHOT 25 91 NUM_LED C2424
E
GPIO50/PSCLK3 GPIO81/F_WP#/F_SDIO2 NUM_LED 65
55 BLON_OUT
27
GPIO52/PSDAT3 GPIO00/32KCLKIN/F_SDIO3
77
USB_CHAR_SEL 34 < ----06/26 LT41 USB_CHAR_SEL 8 EC_SMI#
1 R2489 2 R2495 SC1U6D3V2KX-GP
0R0402-PAD PURE_HW_SHUTDOWN# PURE_HW_SHUTDOWN#_B Q2401
26,40,79 PURE_HW_SHUTDOWN# 1 2 B DY
2
R2416 1 2 100KR2J-1-GP 3D3V_AUX_S5 10KR2J-3-GP MMBT3906-4-GP
26 FAN_TACH1 31 73 AC_IN_KBC# 1 R2433 2 R2486
AC_IN# 44
C
GPIO56/TA1 PSL_IN1#/GPI70 KBC_PWRBTN_EC# 0R0402-PAD ECSCI#_KBC
17 SIO_PWRBTN#
117
GPIO20/TA2/IOX_DIN_DIO
PSL_IN2#/GPI06/EXT_PURST#
93
EC_ENABLE# PSL 8 EC_SCI#
1 DY 2
0R2J-2-GP
84.T3906.A11
65 CAP_LED 63 74 1
GPIO14/TB1 PSL_OUT#/GPIO71 TP2418 PSL
VIDEO_POWER_LIMIT# R2462 1 DGPUHOT
17,40,51,52,54 SIO_SLP_S3# 64
GPIO01/TB2 TPAD14-OP-GP
2nd = 84.T3906.E11
79 VIDEO_POWER_LIMIT# 2
DY 0R2J-2-GP 29 ECSCI#_KBC
ECSCI#/GPIO54 ECRST# 3D3V_AUX_KBC
64,66 DC_BATFULL
32
GPIO15/A_PWM EXT_RST#
85 DY
27 KBC_BEEP
65 KB_BKLT_PWM
KBC_BEEP
KB_BKLT_PWM
118
62
GPIO21/B_PWM
GPIO13/C_PWM
KBRST#/GPIO86
122
SIO_RCIN# 18 KBC PWR supply at PSL mode. U2402
64,66 CHARGE_LED 65 75 KBC_VSBY 0R0402-PAD 1 2 R2494 3D3V_AUX_S5 1

VOL_DOWN_BTN# GPIO32/D_PWM VSBY KBC_VBKUP 0R0402-PAD 1 GND
66 VOL_DOWN_BTN# 22 114 2 R2488 RTC_AUX_S5 3
PWRLED GPIO45/E_PWM/DTR1#_BOUT1 VBKUP KBC_VCORF C2422 VDD
64,66 PWRLED 16 44 1 2 2
GPIO40/F_PWM/1_WIRE/RI1# VCORF PECI R2474 1 RESET#
26 FAN1_PWM 81 13 2 SC1U10V2KX-L1-GP H_PECI 4
GPIO66/G_PWM/PSL_GPIO66 PECI
17 KBC_DPWROK
1 2 VD1_EN# 66
GPO33/H_PWM/VD1_EN# SERIRQ/GPIOF0
125 43R2J-GP
INT_SERIRQ 18 < ---- Viber Del TPM
R2463 0R0402-PAD
GPIO24
6
AD_OFF 43,44 < ---08/06 AD_OFF TPS3809K33-2-GP
26 VD_IN1 VD_IN1 104 15
GPIO80/VD_IN1 GPIO36/TB3/CTS1# PCH_RSMRST# 17
1
R1736 Thermal VD 26 VD_OUT1# VD_OUT1# 110

GPIO82/IOX_LDSH/VD_OUT1 GPIO44/SCL4B
21 SIO_SLP_S4# 17,40,51 NOVO button Fun define: one key to recover OS. 3D3V_AUX_S5 3D3V_AUX_KBC
VD_OUT2# < ---06/24 AOU_IFLG#
06/16 MAX R1717 DY
1KR2J-L2-GP
DY
26 VD_OUT2# 112
GPIO84/IOX_SCLK/VD_OUT2 PSL_IN4#/GPI43
PSL_IN3#/GPI42
20
17
23
LID_CLOSE#
ME_FWP_EC
LID_CLOSE#
19
AOU_IFLG#
55,66
34
NOVO button wake KBC at PSL mode.

Nuvoton KBC PSL Power Logic
2
GPIO46/SDA4B/CIRRXM
84
17 SYS_PWROK GPIO77/SPI_MISO 3D3V_AUX_S5 C2406
83 113 USB_PWR_EN 34,36,66
17 AC_PRESENT GPIO76/SPI_MOSI GPIO87/CIRRXM/SIN_CR
61 WIRELESS_EN WIRELESS_EN 82
GPIO75/SPI_SCK GPIO34/SIN1/CIRRXL
14
S5_ENABLE 40
KBC_NOVO_BTN# KBC_PWRBTN_EC#
40,45 5V_EN
5V_EN 79
GPIO02/SPI_CS#
1
AFTP2403 AFTE14P-GP
1.Enter PSL mode (Entry S5 after 10sec) : 1 2
1
GND
5
PECI
Low Low 3D3V_AUX_KBC : OFF (KBC PWR supply) R2410
SCD1U16V2KX-L-GP
31 LAN_PWR_ON 124
GPIO10/LPCPD# GND
18
330KR2J-L-GP
PSL
17,20 ME_SUS_PWR_ACK_R 1
R2402
2
0R2J-2-GP
PM_SUSWARN#_KBC
E51_TXD_KBC
121
GPIO85/GA20 GND
45 2.At PSL mode (SPEC: S5<10mW)
DS3 111
GPIO83/SOUT_CR GND
78 PSL
1
55 PANEL_BLEN 9 89 R2409 R2411
S
GPIO65/SMI# GND
R2403
GND
116 DY C2403
SC100P50V2JN-3GP KBC_PWRBTN_EC#:Low PSL mode(AC or DC): PSL
1 2 PM_CLKRUN#_EC 8 EC_ENABLE# 1 2 EC_ENABLE#_G_1 1 2 EC_ENABLE#_G G
18 PM_CLKRUN#_EC_R
2
0R0402-PAD GPIO11/CLKRUN#
1 R2472 2 Q2402
G
27 AMP_MUTE#
30
GPIO55/CLKOUT/IOX_DIN_DIO AGND
103 R2472 close to Pin103 (1) 4sec: PWR DMP2130L-7-GP
0R0402-PAD EC_ENABLE#_G S5_ENABLE 3D3V_AUX_KBC 1KR2F-3-GP 20KR2J-L3-GP D
61 WLAN_PWRON R2404 1 AOAC 2 0R2J-2-GP NPCE285PA0DX-1-GP Button shut down PSL PSL
D
2013/9/12 Hi Low OFF 84.02130.031
Reserved AOAC 071.00285.0A0G
EC_AGND
GPIO83/SOUT_CR & GPIO87/SIN_CR
(2) 8sec: KBC reset
2nd = 084.03413.0031
Need reserved TP for Debug
6/18 U2403 Change Part Number to 71.00285.0A0G (285P)
PSL Wake(AC or DC): Q2403
NOTE: G
B PWM Signal : B
NOTE: 1. If unused, select altrnative GPIO function EC_ENABLE#_G S5_ENABLE 3D3V_AUX_KBC D S5_ENABLE
Connect GND and AGND planes via either and enable internal pull-down. S
0R resistor or one point layout connection. 2. Please measure and make sure that the Low Hi ON
rise time of VCC_POR is less than 10us. 2N7002K-2-GP
KBC_PWRBTN_EC# PSL
84.2N702.J31
2
D2401 3D3V_AUX_S5
LBAT54CLT1G-1-GP 3 KBC_NOVO_BTN# KBC_NOVO_BTN# 66 EC GPIO PH EC GPIO PL EC_GPIO47 High Active
075.00054.0B7D R2470
LID_CLOSE# Q2405
2 1
1
3D3V_AUX_KBC 3D3V_S5 10KR2J-3-GP R2450 PROCHOT_EC G

AMP_MUTE# R2478
KBC_NOVO_BTN#_EC
1 DY 2
10KR2J-3-GP D H_PROCHOT#_EC 1 2
RN2403 H_PROCHOT# 4,44,46
1
R2448
2 3 BAT_SCL 1 2 USB_PWR_EN S 0R0402-PAD
06/24 add D2401. 將 Novo button 與 Power button 訊多接 ,因
因 KBC PSL 只因 4Pin 1 4 BAT_SDA 100KR2J-1-GP R2440 R2480
所所如所 1 Pin給
,所給 AOU_IFLG# R2452 USB_PWR_EN1 2 1 100KR2J-1-GP 2N7002K-2-GP
1 2 WLAN_PCIE_WAKE# 10KR2J-3-GP 84.2N702.J31
2
SRN4K7J-8-GP 10KR2J-3-GP
3D3V_AUX_KBC 2nd = 84.2N702.031
R2476
AD_OFF 1 2
3D3V_S0 1KR2J-1-GP
R2435 R2464
E51_TXD 61
2 1 S5_ENABLE 1 2 KBC_NOVO_BTN#_EC
R2458 10KR2J-3-GP 10KR2J-3-GP
E51_TXD_KBC 2 1 E51_TXD
0R0402-PAD R2434 R2439 06/24 R2464 KBC_NOVO_BTN# Change Net Name to KBC_NOVO_BTN#_EC
E51_RXD 61 2 1 ECRST# 2 1 VOL_UP_BTN#
R2451 10KR2J-3-GP 10KR2J-3-GP 06/25 KBC_NOVO_BTN#_EC 訊 3D3V_AUX_S5, 如都已 3D3V_AUX_KBC 3D3V_AUX_S5
USB_PWR_EN 1 2 E51_RXD R2443
0R2J-2-GP 2 1 VOL_DOWN_BTN#
DY 10KR2J-3-GP
RN2406 R2447 06/05 Delete R2460(DG)
1
1 4 BAT_IN# 2 1 SCREEN_ROTATE_LOCK#
2 3 5V_EN 10KR2J-3-GP R2477
3D3V_AUX_S5 10KR2J-3-GP
SRN100KJ-6-GP
2
RN2404 R2484
1 4 LID_CLOSE2# 1 2 KBC_PWRBTN_EC#
64 KBC_PWRBTN#
2 3 KBC_NOVO_BTN# 470R2J-2-GP
1
SRN10KJ-5-GP
1
R2492 C2423
100KR2J-1-GP SC220P50V2KX-3GP
DY
2
2
A A
Nuvoton KBC PSL Logic
BOM1
Wistron Corporation
Title
NPCE285
A1
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
3D3V_SPI
3D3V_S5
R2501
0R0402-PAD
SSID = Flash.ROM SPI ROM Equal length need to less than 500mil C2501
1 2
1
C2502
SC10U6D3V5KX-1GP
DY
SCD1U16V2KX-L-GP
Test point
2
U2502
3D3V_SPI
Main Winbond 72.25128.0E1
SC 3D3V_S5 1 TP2503
D SD TPAD14-OP-GP D
1
DY
R2505
R2506
4K7R2J-2-GP 10KR2J-3-GP
2
3D3V_SPI
U2502
R2502
18,24 SPI_CS0#_R 2 1 SPI_CS0# 1 8
R2503 SPI_SO CS# VCC SPI_HOLD_0#_1
18,24 SPI_SO_R 1 2 33R2J-2-GP 0R0402-PAD 2 7 R2551 1 2 33R2J-2-GP SPI_HOLD_0# 18
R2550 SPI0_WP#_1 SO/SIO1 SIO3 SPI_CLK_R_1
18 SPI0_WP# 1 2 33R2J-2-GP 3 6 R2552 1 2 33R2J-2-GP SPI_CLK_R 18,24
SIO2 SCLK SPI_SI0_R_1 R2553
4 5 1 2 33R2J-2-GP SPI_SI0_R 18,24
GND SI/SIO0
1
C2503
1
SC4D7P50V2CN-1GP MX25L12873FM2I-10G-GP C2504 C2505
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
DY DY DY
2
72.12873.001
2
C C
B B
SSID = RBATT
SSID = RBATT
High Detect
3D3V_AUX_S5 Need to Check whether to PD in PCH Side
RTC_AUX_S5 Q2501
Q2503
2
+RTC_VCC DMN5L06K-7-GP
3 RTCCN1
R2504 RTC_PWR D S RTC_DET 1 R2514 2
RTC_PWR RTC_DET_R 20
1 1 2 1 0R0402-PAD
1
1KR2J-1-GP PWR
C2506
2
GND 84.05067.031
BAS40CW-GP NP1
NP1
1
SC1U10V2KX-L1-GP 83.00040.E81 NP2 2nd = 084.00138.0A31
2
NP2 5V_S0 R2508

A 6D2MR2J-GP A
Width=20mils BAT-AAA-BAT-054-P06-GP-U
62.70001.061
2
1ST = 62.70014.001
BOM1
2nd = 20.F2316.002
Test point 3rd = 62.70001.061
Wistron Corporation
1 +RTC_VCC Taipei Hsien 221, Taiwan, R.O.C.
AFTE14P-GP AFTP2501
1 Title
AFTE14P-GP AFTP2502
Flash(KBC+PCH)/RTC
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = Thermal Sensor

3D3V_S0
3D3V_S0
*Layout* 15 mil
2
1
5V_FAN_S0
NCT7718
1
NCT7718
R5
R2605 RN2601
3D3V_S0 18K7R2F-GP SRN2K2J-5-GP
1
Q2602 D2601 C2604 C2605
3
4
SC4D7U25V5KX-L2-GP
2N7002KDW-GP RB551V30-GP SCD1U16V2KX-L-GP
1
ALERT# THM_SML1_CLK 1 6 SML1_SMBCLK 18,24,66,79,90 83.R5003.H8H
2
NCT7718 R2601 NCT7718
A
10R2F-L-GP 2 5 2nd = 83.R5003.T8F
D 3 4 D
2
Layout notice : 84.2N702.A3F
Both DXN and DXP routing 10 mil THM_SML1_DATA 2nd = 75.00601.07C 07/31 C2604 Change part number 78.47523.5BL to 78.47522.L4L,
trace width and 10 mil spacing. 需都4.uF, 0805, 不訊這多25V
1
C2601
SML1_SMBDATA 18,24,66,79,90
SCD1U16V2KX-L-GP
NCT7718 FAN1
2
R2603 5
NCT7718 NCT7718 NCT7718 1 DY 2
0R2J-L-GP 1
24 FAN1_PWM
P2800_DXP R2604
U2601 FAN_TACH1_C
1 DY 2 2
1
Q2601 0R2J-L-GP 3
C
R2602 C2602 C2603 THERM_VDD 1 8 THM_SML1_CLK 5V_FAN_S0 4

VDD SCL
SC470P50V3JN-2GP
SC2K2P50V2KX-L-GP
NTC-100K-8-GP B 2 7 THM_SML1_DATA
METR3904-G-GP D+ SDA ALERT#
DY 3 6 6
2
THERM_SYS_SHDN# D- ALERT# FAN1_PWM

4 5 1
2
P2800_DXN T_CRIT# GND AFTE14P-GP AFTP2601 FAN_TACH1_C

1
ACES-CON4-17-GP-U1 AFTE14P-GP AFTP2602 1 5V_FAN_S0
NCT7718W-GP 3D3V_S0 5V_FAN_S0 AFTE14P-GP AFTP2603 5V_S0 5V_FAN_S0
84.03904.E11 20.F1621.004 AFTE14P-GP AFTP2604
1
NCT7718
2nd = 20.F1937.004
2.System Sensor, Put on palm rest 74.07718.0B9
1
3rd = 020.F0243.0004 R2630
2ND = 074.00788.00B9 R2614 R2613 1 2
10KR2J-L-GP DY 10KR2J-L-GP 0R0603-PAD
2
D2602
2.System Sensor, Put on palm rest A K FAN_TACH1_C
24 FAN_TACH1
Close to Thermal sensor RB551V30-GP
3D3V_AUX_KBC
TBD PU 3D3V_AUX_KBC Note: Need R1717 PD: Enable Thermal VD Fun.
83.R5003.H8H
2nd = 83.R5003.T8F DY
Note: (1) VD_IN1 for System sensor R2618
1
3D3V_S0 3D3V_S0
06/11 Delete R2611 & R2621 Connect to 3D3V_AUX_S5
(2) VD_IN2 for CPU sensor

1 2
R2615
C 16KR2F-GP 0R2J-L-GP C
1
Close to CPU chips R2617 R2624 R2625
2
3D3V_S0 1 2 DY 2KR2F-3-GP DY 2KR2F-3-GP

TV 0R0402-PAD
2
1
VD_IN1 24
R2607
1
2KR2F-3-GP D2603
R2610 BAW56-5-GP
1
NTC-100K-11-GP-U C2615 C2616 2 VD_OUT1# 24
2
SCD1U16V2KX-L-GP SC100P50V2JN-3GP 83.00056.Q11
TV 69.60013.201 THERM_SYS_SHDN# 3 DY 2nd = 75.00056.07D
2
Q2603
S 1 VD_OUT2# 24
2
VD_IN1_C 1 R2612 2
TV TV 0R0402-PAD
24,40,79 PURE_HW_SHUTDOWN# D
TBD PU 3D3V_AUX_KBC G VR_RDY 40,46
1
3D3V_AUX_KBC
1
R2606 C2607 2N7002K-2-GP
SC4D7U6D3V3KX-GP
10KR2J-L-GP 84.2N702.J31
DY 2ND = 84.2N702.031
2
DY 3rd = 84.2N702.W31
2
1
R2616
16KR2F-GP
TV
Close to KBC chips
2
VD_IN2 24
1
R2619
1
NTC-100K-11-GP-U C2617 C2618

TV SCD1U16V2KX-L-GP SC100P50V2JN-3GP
69.60013.201
2
2
2
B
TV VD_IN2_C TV 1 R2620 2
0R0402-PAD T8=85 degree B
Thermal config
Function
Thermal VD NCT7718W
LOCATION
U2601 DY ASM
Q2601 DY ASM
Q2602 DY ASM
RN2601 DY ASM
R2601 DY ASM
R2605 DY ASM
C2601 DY ASM
C2602 DY ASM
C2603 DY ASM
R2610 ASM DY
R2619 ASM DY
R2615 ASM DY
R2616 ASM DY
A R2612 ASM DY A
R2620 ASM DY
R2624 ASM DY
R2625 ASM DY BOM1
C2615 ASM DY
C2617 ASM DY Wistron Corporation
C2616 ASM DY Taipei Hsien 221, Taiwan, R.O.C.
C2618 ASM DY Title
D2603 ASM DY THERMAL NCT7718W/Fan

R1717 ASM DY Size Document Number Rev
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
5V_S0 AUD_5VD
1 R2703 2
1
1
0R0603-PAD C2706 C2716 SCD1U25V2KX-L-GP SCD1U25V2KX-L-GP
C2705
C2707 C2708
SC1U10V2KX-L1-GP
DY
2
2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
D D
MOAT
5V_S0 AUD_5VA
1 R2726 2
1
0R0603-PAD C2727
SC10U6D3V3MX-L-GP
2
AUD_3VD
ALC_AGND
1
SCD1U25V2KX-L-GP R2702 1 2 0R0402-PAD
C2701
C2702
SC1U10V2KX-L1-GP
MOAT C2704 1 2 SCD1U25V2KX-L-GP
2
3D3V_S5 AUD_3V3_S5 Place close to pin1 Place close to pin8
1 R2705 2
1
0R0603-PAD C2712
SC10U6D3V3MX-L-GP AUD_5VA
2
1
ALC_AGND SCD1U25V2KX-L-GP
C2709 C2714
SC2D2U10V3KX-L-GP
2
3D3V_S0 AUD_3VD
Place close to pin26
1 R2701 2
ALC_AGND
1
0R0603-PAD C2703
SC10U6D3V3MX-L-GP
AUD_1D8VD
2
MOAT
1
C C
1D8V_S0 AUD_1D8VD C2711
SC4D7U6D3V3KX-L-GP
2
1 R2704 2
1
0R0603-PAD C2710 ALC_AGND U2701

SC10U6D3V3MX-L-GP RN2701
1 11 AUDIO_PC_BEEP C2723 1 2 AUDIO_BEEP 1 4 SPKR 19
2
AUD_3V3_S5 DVDD PCBEEP SCD1U25V2KX-L-GP 2 3 KBC_BEEP 24

DVDD_IO 8 13
DVDD-IO MIC2-L(PORT-F-L)/RING2 RING2 29,66
ALC_AGND 14 SRN1KJ-7-GP
SLEEVE 29,66
1
MIC2-R(PORT-F-R)/SLEEVE MIC2 C2724 1
20 15 2 SC4D7U6D3V3KX-L-GP
AUD_5VD AVDD1 MIC2-CAP R2709
33
AVDD2
17 10KR2J-3-GP
LINE1-R(PORT-C-R)
16 18
VD33STB LINE1-L(PORT-C-L) ALC_AGND
2
34 35 AUD_SPK_L+ 29
AUD_1D8VD PVDD1 SPK-OUT-LP
39 36 AUD_SPK_L- 29
PVDD2 SPK-OUT-LN SPK 4Ω 40mils
29 38 AUD_SPK_R+ 29
CPVDD SPK-OUT-RP
37 AUD_SPK_R- 29
1
C2715 1 VREF SPK-OUT-RN

2 SC1U10V2KX-L1-GP 22 RN2702
C2713 C2717 1 CPVEE VREF HP_OUT_L_AUD
2 SC1U10V2KX-L1-GP 27 25 2 3 HP_OUT_L 29,66
ALC_AGND
SC4D7U6D3V3KX-L-GP CPVEE HPOUT-L(PORT-I-L) HP_OUT_R_AUD
26 1 4 HP_OUT_R 29,66
2
C2718 1 LDO1_CAP HPOUT-R(PORT-I-R)

2 SC4D7U6D3V3KX-L-GP 21
ALC_AGND C2719 1 LDO2_CAP LDO1-CAP
2 SC4D7U6D3V3KX-L-GP 32 SRN47J-7-GP
C2720 1 LDO3_CAP LDO2-CAP
2 SC4D7U6D3V3KX-L-GP 6
LDO3-CAP
1 R2719 2 Tied at one point only under 55 DMIC_DATA 1 ER2723 2 28 AUD_CBN C2725 1 2 SC1U10V2KX-L1-GP
ALC_AGND CBN AUD_CBP
Codec or near the Codec 55 DMIC_CLK 1 2 100R2J-2-GP 30
0R0603-PAD ER2720 100R2J-2-GP DMIC_DATA_C CBP
1 2 2
C2721 SC22P50V2JN-L-GP DMIC_CLK_C GPIO0/DMIC-DATA12 R2716 SLEEVE
3 1 2 2K2R2F-GP
DY GPIO1/DMIC-CLK
23 MIC2V R2717 1 2 2K2R2F-GP RING2
MIC2-VREFO
19 HDA_CODEC_SDOUT 4 24
R2710 AC97_DATIN 7 SDATA-OUT LINE1-VREFO-L
19 HDA_SDIN0 1 2
0R0402-PAD SDATA-IN
R2713 1 2 0R0402-PAD HDA_CODEC_BITCLK_C 5
19 HDA_CODEC_BITCLK BCLK
G2701 1 2 GAP-CLOSE 1 2 9 19
SYNC AVSS1
Near AVDD1 and AVDD2 power source input C2722 SC22P50V2JN-L-GP 10 31
G2702 AUD_SD# DC_DET AVSS2
1 2 GAP-CLOSE 40
PDB
12 41
HP/LINE1-JD(JD1) GND
B 19 HDA_CODEC_SYNC B
ALC_AGND ALC_AGND
ALC3240-CG-GP
071.03240.0003
0R3J-0-U-GP
ER2722 1 DY 2
SA_ESD
0R3J-0-U-GP
ER2721 1 DY 2 AUD_3VD
R2708 1 2 100KR2J-L-GP
R2721 1 2 200KR2F-L-3-GP ALC233_SENSE_A
ALC_AGND 29,66 HP_DET#
R2708 power should follow DVDD (pin1) power rail.

If DVDD=3.3V, R7 power source should be change to 3.3V
3D3V_S5
Q9002 AUD_3VD
G
DY
1
S D
R2722
T2N7002BK-GP D2701 1KR2J-1-GP
BAW56-5-GP DY
24 AMP_MUTE# R2724 1 2 0R2J-2-GP AUD_PD#_2 2
2
DY
DY 3
19 HDA_CODEC_RST# R2723 1 2 0R2J-2-GP AUD_PD#_1 1

DY
1 R2725
2 0R0402-PAD AUD_SD#
FAE
HDA_RST#_CODEC:
1
High=1.8V
A R2718 A
Low=0V
this signal might cause AUD_SD# always low when R2710=0ohm 10KR2J-L-GP
You should add level shift on HDA_RST#_CODEC signal when Codec PIN9 DVDDIO= 1.5V.
2
BOM1
Wistron Corporation
Title
Audio Codec ALC3234
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
BOM1
Wistron Corporation
Title
Reserved
A1
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
INTERNAL STEREO SPEAKERS

D D
R2903 0R0603-PAD
RIGHT SIDE
1 2 AUD_SPK_R+_C
27 AUD_SPK_R+
1 HP_OUT_R
HP_OUT_R 27,66
27 AUD_SPK_R- 1 R2904 2 AUD_SPK_R-_C AFTE14P-GP AFTP2913 1 HP_OUT_L
HP_OUT_L 27,66
0R0603-PAD AFTE14P-GP AFTP2914
1 SLEEVE
SLEEVE 27,66
AFTE14P-GP AFTP2915 1 RING2
RING2 27,66
1
Place these EMI components C2902 C2903 AFTE14P-GP AFTP2916 1 HP_DET#
HP_DET# 27,66
AFTE14P-GP AFTP2917
close to speaker connector.
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SPK1
2
5
1 ALC_AGND
Only needed if speaker 1 AFTE14P-GP AFTP2918
connector is physically far from
2
audio codec. When in doubt, it's 3
always a good idea to have 4
population option.
LEFT SIDE 6
ACES-CON4-17-GP-U1 1 R2907 2
R2905 0R0603-PAD 20.F1621.004 0R0402-PAD
1 2 AUD_SPK_L+_C
27 AUD_SPK_L+
R2906 2nd = 20.F1937.004 1 R2908 2
1 2 AUD_SPK_L-_C 0R0402-PAD
27 AUD_SPK_L-
C 0R0603-PAD 3rd = 020.F0243.0004 C
R2909 2 0R2J-2-GP
1 DY
1
C2904 C2905 R2910 2 0R2J-2-GP

1 DY
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
08/12 SPK1 20.F2348.007 Change to 20.F1621.004

2
06/12 SPK1 原原都4Pin, 已7 pin 訊 Hall Sensor 訊訊
ALC_AGND
1 AUD_SPK_L+_C 1 AUD_SPK_R+_C
AFTE14P-GP AFTP2910 1 AUD_SPK_L-_C AFTE14P-GP AFTP2908 1 AUD_SPK_R-_C
AFTE14P-GP AFTP2911 AFTE14P-GP AFTP2909
1
AFTE14P-GP AFTP2912
1
1
Only needed if speaker ED2901 ED2902 ED2904 ED2903
connector is physically far from
ESD5B5D0ST1G-GP-U
ESD5B5D0ST1G-GP-U
ESD5B5D0ST1G-GP-U
ESD5B5D0ST1G-GP-U
Place these EMI components audio codec. When in doubt, it's
B close to speaker connector. always a good idea to have DY DY DY DY B
population option.
2
A BOM1 A
Wistron Corporation
Title
Audio IO
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = Audio
D D
C C
(Blanking)
B B
BOM1
A
Title
Reserved
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
3D3V_LAN_S5
R3102 1 DY 2 0R3J-0-U-GP
3D3V_S5 Q3101
AO3419L-GP REGOUT 1 R3101 2 VDD10
S D
0R0603-PAD
1
D D
1
1
84.03419.031 C3140 C3138 C3139 C3137 C3141 C3136 C3142
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
SCD1U16V2ZY-2GP
C3154 C3153 R3131 C3152 C3150
SCD1U16V2KX-3GP SCD1U16V2ZY-2GP 100KR2J-1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
2
2
DY DY
2
LAN_PW R_ON_T 1 2 LAN_PW R_ON_T2
1
R3132
Q3102 1KR2J-1-GP C3151 DY
G SC1U10V2KX-L1-GP For RTL8111G(S)/ RTL8111GUS/ RTL8106EUS
24 LAN_PW R_ON
2
D
*Place C3138 to C3141 close to each VDD10 pin-- 3, 8, 22, 30
S For RTL8111G(S)/ RTL8111GUS/ RTL8106EUS
2N7002K-2-GP *Place C20 and C21 close to each VDD10 pin-- 22 (Reserved)
84.2N702.J31
08/12 add 3D3V_S5 to 3D3V_LAN_S5 Circuit
U3101
VDD10 3 1 MDI0+ 32
C AVDD10 MDIP0 C
8 AVDD10 MDIN0 2 MDI0- 32
30 AVDD10 MDIP1 4 MDI1+ 32
MDIN1 5 MDI1- 32
3D3V_LAN_S5 11 AVDD33 MDIP2 6 MDI2+ 32
32 AVDD33 MDIN2 7 MDI2- 32
MDIP3 9 MDI3+ 32
1
C3143 C3144 C3145 C3146 22 10 MDI3- 32

DVDD10 MDIN3
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SC4D7U6D3V3KX-L-GP
SC4D7U6D3V3KX-L-GP
3D3V_LAN_S5 23 28 LAN_XTAL1
2
VDDREG CKXTAL1 LAN_XTAL2

CKXTAL2 29
13 24 REGOUT
16 PCIE_TX_CON_P6 HSIP REGOUT R3113
14 31 RSET 1 2
16 PCIE_TX_CON_N6 HSIN RSET 2K49R2F-GP
16 PCIE_RX_CPU_P6 2 1 C3116 PCIE_RXP4_L 17 HSOP LED0 27
16 PCIE_RX_CPU_N6 SCD1U16V2KX-L-GP2 1 C3117 PCIE_RXN4_L 18 26 LAN_LED 1 TP3101 TPAD14-OP-GP
SCD1U16V2KX-L-GP HSON LED1/GPO
LED2 25
18 PEG_CLK2_CPU 15 REFCLK_P ISOLATE# R3108
18 PEG_CLK2_CPU# 16 REFCLK_N ISOLATE# 20 1 2 3D3V_S0
21 PCIE_LAN_W AKE#_R 1 R3130 2 1KR2J-1-GP
LANWAKE# PCH_W AKE# 17,24 R3111
12 0R0402-PAD 1 2
18 CLKREQ_PCIE#2 CLKREQ#
15KR2J-1-GP
PLT_RST# 19 33
17,24,40,61,68,79 PLT_RST# PERST# GND
RTL8111H-CG-1-GP
071.8111H.0003
B B
25MHz XTAL
C3109
X3101
1
SC15P50V2JN-L-GP
2
Change LAN PN to SC50H01259
LAN_XTAL1 1 4
LAN and Transformer Config:
1
R3114
1MR2J-L3-GP C3108
DY 2 3 1 2
LAN/Transformer
2
LAN_XTAL2 SC15P50V2JN-L-GP
XTAL-25MHZ-181-GP RTL8111GUL 1000M

20200540
82.30020.G71
A
2nd = 82.30020.D41 1000M Transformer Main source
BOM1 A
068.IH219.3001 Wistron Corporation

Crystal 27MHz 1000M Transformer 2nd source
MAIN HASONIC 82.30020.G71 78.15034.L1L 68.89246.301 Title
2ND HARMONY 82.30020.D41 78.18034.1FL LAN_RTL8111
A3
Tesla SKL-U -1
Date: W ednesday, August 19, 2015 Sheet 31 of 102
5 4 3 2 1
5 4 3 2 1
10/100M/1000M Lan Transformer 10/100/1000 LAN surge circuit

For test stuff
MCT2
XF3201 MCT1
XRF_TDC_1 RJ45_1
31 MDI0+ 2 23
1000M Lan Transformer pin define
1
1
1
C3204 1 24 MCT1 R3211
SCD1U16V2KX-L-GP R3221 0R0603-PAD
3 22 RJ45_2 0R0603-PAD
31 MDI0-
2
1CT:1CT
2
5 20 RJ45_3
31 MDI1+
2
MCT4
D 4 21 MCT2 MCT4 D
6 19 RJ45_6
31 MDI1-
1CT:1CT
1
C3202 8 17 RJ45_4
31 MDI2+
SCD1U10V2KX-4GP
2 7 18 MCT3
MCT3
9 16 RJ45_5
31 MDI2-
1CT:1CT
11 14 RJ45_7
31 MDI3+
1
10 15 MCT4 R3210
0R0603-PAD
12 13 RJ45_8
31 MDI3-
1CT:1CT
2
XFORM-24P-101-GP MCT4
068.IH219.3001
2nd = 68.89240.30D
LAN and Transformer Config: ED3202
R3214
2 1 MCT4 1 2 MCT4_C
75R5F-1-GP
LAN/Transformer THW4006KV-SMB-GP
2
069.A0002.0001
RTL8111GUL 1000M 1000M Transformer PN: 1ST = 069.A0002.0001 C3203
20200540 068.01010.3001 (AZ chip)

SC100P3KV8JN-2-GP
1
2ND = 069.A0007.0001
3rd = 069.A0007.0011
1000M Transformer Main source 10/6 Change ED3202 1st & 3rd source
068.IH219.3001
C 1000M Transformer 2nd source C
68.89246.301
ED3203
LAN Connector 31 MDI0+
MDI0+ 1 10 MDI0+
MDI2+
ED3204
MDI2+
31 MDI2+ 1 10
RJ45 MDI0- 2 9 MDI0-
31 MDI0-
9 3 8 MDI2- 2 9 MDI2-
CHASSIS#9 31 MDI2-
RJ45_1 1 3 8
MDO0+ MDI1+ MDI1+
31 MDI1+ 4 7
RJ45_2 2 MDI3+ 4 7 MDI3+
MDO0- 31 MDI3+
RJ45_3 3 MDI1- 5 6 MDI1-
RJ45_1 RJ45_4 MDO1+ 31 MDI1- MDI3- MDI3-
1 4 31 MDI3- 5 6
AFTE14P-GP AFTP3202 RJ45_2 RJ45_5 MDO2+
1 5
AFTE14P-GP AFTP3203 RJ45_3 RJ45_6 MDO2- PJE5UFN10A-GP
1 6
AFTE14P-GP AFTP3204 RJ45_4 RJ45_7 MDO1- PJE5UFN10A-GP
AFTE14P-GP AFTP3205
1
RJ45_5 RJ45_8
7
MDO3+ DY
1
RJ45_6
8
MDO3- 075.00510.0073 DY
AFTE14P-GP AFTP3206 1 10
AFTE14P-GP AFTP3207 1 RJ45_7 CHASSIS#10
2ND = 075.00550.0071 075.00510.0073
AFTE14P-GP AFTP3208 RJ45_8 RJ45
1 3RD = 75.01045.073 2ND = 075.00550.0071
AFTE14P-GP AFTP3209 RJ45-8P-185-GP 3RD = 75.01045.073
022.10001.00A1
2nd = 022.10001.0E71
06/13 Delete LAN_AGND 08/13 RJ45 22.10019.141 Change to 022.10001.00A1 8/25 將ED3203,ED3204 這這ESD STUFF OPTION 都已DY, 如的這上上Wake on Lan
AZ&NON AZ 10/13 ED3203,ED3204 都已跟ED3501多

多所, 增加增增Source
Function
AZ NON AZ
RJ45 Pin define 10/23 將3rd Source將
將將 75.09904.07C, 因都已因因因50米
米米多米不米(Part number跟
跟ED3501多
多所,BOM別
別別別)
LOCATION 都 DY,不
10/23 ED3203, ED3204 ESD STUFF OPTION都不如的
ED3102 DY ASM
B
R3114 DY ASM B
ED3103 ASM DY
ED3104 ASM DY
ED3105 ASM DY
ED3106 ASM DY
ED3107 ASM DY
ED3108 ASM DY
R3112 ASM DY
R3115 ASM DY
R3116 ASM DY
R3117 ASM DY
R3118 ASM DY
R3119 ASM DY
R3120 ASM DY
A A
BOM1
Wistron Corporation
Title
RJ45&Transformer
A2
Tesla SKL-U -1
Date: Wednesday, August 19, 2015 Sheet 32 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
BOM1
Wistron Corporation
Title
Reserved
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
不如的
UC, UC_ST, DY_UC_TI不
USB3.0 Port1
USB charger
Support 2A Should use discharge part.
3D3V_AUX_S5
5V_USB1_S3
5V_S5
at least 80 mil DY
1
ST chip: PWR:DC or AC Mode:S5 ATTACH#:Hi TP3407
at least 80 mil R3418
1
5V_S5: Down to 3.3V for power saving
1
SC10U10V5KX-2GP
C3402 C3403 0R2J-2-GP AOU_IFLG# 1
SC1U10V2KX-L1-GP
1
C3401
2
2
TPAD14-OP-GP
08/05 U3502 add 2nd & 3rd Source DY C3452
NUC
2
C3411
2
ILIM Charge Current limit:
2
SCD1U16V2KX-L-GP
NUC Imax(mA) = 48000/ Rilim (k ohm) UC_TI
SC47U6D3V5MX-1-GP DY
U3401 NUC SCD1U16V2KX-L-GP R3422
NUC
1
D D
40K2R2F-GP
1
1 5
OUT IN
2 R3402 1 USB30_OC#0_D
2
3
GND
4 USB_PWR_EN_D1
2
R3401
1
Support 2.1A 22KR2F-GP
R3419
16 USB_OC0# OC# EN USB_PWR_EN 24,36,66 5V_S5 1 2 USB_OC0# 16
0R0402-PAD 0R0402-PAD UC
UC_AUX_PWR
G524B1T11U-GP
074.00524.0B9F
USB 3.0 Connector C3404
Pin definition DY DY 5V_USB1_S3
ILIM_HI
1
2
SCD1U16V2KX-L-GP
2ND = 74.06288.07F C3410
SC4D7U10V5KX-1GP
C3406 UC at least 85 mil
SC47U6D3V5MX-1-GP
1 POWER
1
2 USB 2.0 D- C3405
17
16
15
14
13
U3402
2
3 USB 2.0 D+ USB_47uFx3
FAULT#
ILIM
GND
VDD
GND
NUC R3414 NUC R3403 4 GND 47uF x1
USB_PN1_CHG 1 2 USB_PN1_CHG_R 1 2 USB_CPU_PN0 SC47U6D3V5MX-1-GP
0R2J-2-GP 0R2J-2-GP 5 StdA_SSRX- SuperSpeed RX 1
IN OUT
12
NUC R3413 NUC R3404 2 11 USB_PN1_CHG
16 USB_CPU_PN0 DM_OUT DM_IN
USB_PP1_CHG 1 2 USB_PP1_CHG_R 1 2 USB_CPU_PP0 6 StdA_SSRX+ 16 USB_CPU_PP0 3
DP_OUT DP_IN
10 USB_PP1_CHG
0R2J-2-GP 0R2J-2-GP UC_ATTACH_EN 4 9
ATTACH_EN CHARGING#/ATTACH#
7 GND
AOU_IFLG#_R
06/12 NUC 因 USB Charger 時 ,不
不如的 8 StdA_SSTX- SuperSpeed TX 3D3V_AUX_S5 3D3V_AUX_S5
CTL1
CTL2
CTL3
100KR2J-1-GP
EN
AFTP3405 9 StdA_SSTX+ R3420
1
1 2 STCC5021IQTR-GP
5
6
7
8
1
AFTE14P-GP R3425
5V_USB1_S3 DY
5V_S5 UC_ST/TI Option 0R2J-2-GP R3421
USB_47uFx3 DY 100KR2J-1-GP
UC_CTL2
UC_CTL3
USB1 2 1 24 USB_PWR_EN1
2
USB_47uFx3 0R2J-2-GP R3416 UC
2
1
VBUS CHASSIS#10
10 DY
11
CHASSIS#11
1
TC3401 C3409 2 12 R3426

D- CHASSIS#12
SC47U6D3V5MX-1-GP
C3413 C3412 3 13 2 1 UC 5V_S5

D+ CHASSIS#13 24 USB_CHAR_SEL
ST150U6D3VDM-28-GP
SC47U6D3V5MX-1-GP
SCD1U16V2KX-L-GP
AOU_IFLG# 24
2
0R0402-PAD 100KR2J-1-GP
USB3_1_RX1_N_R 24 USB_AO_SEL1
USB_150uF 5 R3406
SSRX-
47uF x2 USB3_1_RX1_P_R 6
SSRX+
1 2 06/25 AOU_IFLG# 訊 3D3V_AUX_KBC, 如都已 3D3V_AUX_S5
077.51571.0001 USB3_1_TX1_N_R PGND
4
USB3_1_TX1_P_R
8
9
SSTX-
SSTX+ GND
7 DY #Need check KBC GPIO Port is PSL_IN
USB3.0
10/23 USB1 都訊 GND(原
原原 USB3_AGND)
10/13 UC_ST:074.05021.0073 2 1
AFTE14P-GP AFTP3401
1 USB_PN1_R
USB_PP1_R
SKT-USB13-206-GP UC_TI: 74.02544.073 0R2J-2-GP R3405
1
AFTE14P-GP AFTP3404
022.10005.00P1
UC_Pericom: 074.52544.0093 DY
2 1 USB_AO_SEL2 24
2nd = 022.10005.01B1 0R2J-2-GP R3415
10/16 R3626, R3617 原原這這都 UC_TI, 因都都如 TI,都
都都改改多
C 3rd = 022.10005.00Z1 2 R3417 1 5V_S5 C
C3407 R3407 08/12 USB1 Change to 022.10005.00P1 0R0402-PAD
USB30_TX_CPU_P1 1 2 USB3_1_TX1_P_1 1 2 USB3_1_TX1_P_R
SCD1U16V2KX-L-GP
0R0402-PAD
AFTP3406 1
STCC5021 Truth Table
5V_USB1_S3
AFTP3408 1
C3408 R3409
USB30_TX_CPU_N1 1 2 USB3_1_TX1_N_1 1 2 USB3_1_TX1_N_R
SCD1U16V2KX-L-GP
0R0402-PAD
EMI Request
ED3401
USB3_1_TX1_P_R 1 10 USB3_1_TX1_P_R
USB3_1_TX1_N_R 2 9 USB3_1_TX1_N_R
3 8
USB3_1_RX1_P_R 4 7 USB3_1_RX1_P_R
TU3401
3 1 USB30_TX_CPU_N1 USB3_1_RX1_N_R 5 6 USB3_1_RX1_N_R
16 USB30_TX_CPU_N1 USB30_TX_CPU_P1
16 USB30_TX_CPU_P1 4 2
7 5 USB30_TX_CPU_N1 PJE5UFN10A-GP
8 6 USB30_TX_CPU_P1 DY
RF_C1 9
10
075.00510.0073
1
2ND = 075.00550.0071
SC1P50V2CN-1GP
RFC3414 6LYR_USTRIP_TO_STRIPE5U1-GP 3RD = 75.01045.073

2
RF_C2 ZZ.00CMC.014 EMI Request
B B
USB3_1_RX1_P_R
16 USB30_RX_CPU_P1
TR3402
3 4
2 1
DLP0NSN900HL2L-GP-U1
68.DLP0N.20A
USB3_1_RX1_N_R
16 USB30_RX_CPU_N1
R3411
USB_PP1_CHG 1 2 USB_PP1_R USB_PP1_R 36
0R0402-PAD
R3412
USB_PN1_CHG 1 2 USB_PN1_R
USB_PN1_R 36
0R0402-PAD
A A
BOM1
Wistron Corporation
Title
USB Charger
Custom
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
5V_USB2_S3 5V_S5
at least 80 mil
Support 2A
USB2.0 Port2
at least 80 mil
SC47U6D3V5MX-1-GP
1
1
C3617 C3611 C3622 C3604
SC1U10V2KX-L1-GP
SC10U10V5KX-L1-GP
SCD1U16V2KX-L-GP
C3619
DY
2
2
SC47U6D3V5MX-1-GP
47uF x1 U3602
USB_47uFx3 1
OUT IN
5
R3607
D 2 D
R3609 1 USB30_OC#1_D GND USB_PWR_EN_D2
16 USB_OC1# 2 3 4 2 1
OC# EN USB_PWR_EN 24,34,66
0R0402-PAD 0R0402-PAD
G524B1T11U-GP
074.00524.0B9F
2ND = 74.06288.07F
TU3601
3 1 USB30_TX_CPU_N2
16 USB30_TX_CPU_N2
4 2 USB30_TX_CPU_P2
16 USB30_TX_CPU_P2
7 5 USB30_TX_CPU_N2
8 6 USB30_TX_CPU_P2
RF_C3 9
10
1
RFC3623 6LYR_USTRIP_TO_STRIPE5U1-GP
SC1P50V2CN-1GP
2
RF_C4 ZZ.00CMC.014
AFTP3601
C AFTE14P-GP C
5V_USB2_S3
C3621 R3602
1 2 USB3_2_TX2_P_1 1 2 USB3_2_TX2_P_R USB_47uFx3
16 USB30_TX_CPU_P2
SCD1U16V2KX-L-GP USB2
1
0R0402-PAD USB_47uFx3
1 10
1
C3618 VBUS CHASSIS#10
11
CHASSIS#11
1
C3616 USB_PN2_TVS 2 12
1
D- CHASSIS#12
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
SCD1U16V2KX-L-GP
TC3602 C3615 USB_PP2_TVS 3 13
2
D+ CHASSIS#13
2
2
ST150U6D3VDM-28-GP
2
USB3_2_RX2_N_R 5
USB3_2_RX2_P_R SSRX-
USB_150uF 6
SSRX+
4
USB3_2_TX2_N_R PGND
077.51571.0001 USB3_2_TX2_P_R
8
SSTX-
9 7
SSTX+ GND
47uF x2 USB3.0
1
AFTE14P-GP AFTP3602 1 SKT-USB13-206-GP
AFTE14P-GP AFTP3603
06/24 將 TC3501 220uF DY, 多 3已

已 47uF 代代 022.10005.00P1
C3620 R3606 2nd = 022.10005.01B1
16 USB30_TX_CPU_N2 1 2USB3_2_TX2_N_1 1 2 USB3_2_TX2_N_R 10/13 220uF Change to 150uF(077.51571.0001) 10/23 USB2 都訊GND(原原原USB3_AGND)
SCD1U16V2KX-L-GP 3rd = 022.10005.00Z1
0R0402-PAD 08/12 USB2 Change to 022.10005.00P1
AFTP3604 1 5V_USB2_S3
USB3_2_RX2_P_R AFTP3605 1
16 USB30_RX_CPU_P2
TR3602
B 3 4 B
2 1
DLP0NSN900HL2L-GP-U1
68.DLP0N.20A
EMI Request
USB3_2_RX2_N_R ED3602
16 USB30_RX_CPU_N2
USB3_2_TX2_P_R 1 10 USB3_2_TX2_P_R
USB3_2_TX2_N_R 2 9 USB3_2_TX2_N_R
3 8
USB3_2_RX2_P_R 4 7 USB3_2_RX2_P_R
R3613 USB3_2_RX2_N_R 5 6 USB3_2_RX2_N_R

1 2 USB_PP2_TVS
16 USB_CPU_PP1
0R0402-PAD PJE5UFN10A-GP
075.00510.0073 06/25 ED3501 VDD change Net Name to 5V_USB1_S3

2ND = 075.00550.0071
3RD = 75.01045.073
DY 5V_USB1_S3
R3614 DY ED3601
1 2 USB_PN2_TVS
16 USB_CPU_PN1
USB_PN2_TVS 1 6
0R0402-PAD USB_PP1_R 34
2 5
08/18 ED3501 USB_PP2 Change to USB_PP2_TVS
USB_PP2_TVS 3 4
USB_PN2 Change to USB_PN2_TVS USB_PN1_R 34
USB_PP1_CHG Change to USB_PP1_R
PJSRV05W-4DW6-GP
USB_PN1_CHG Change to USB_PN1_R
A A
075.00005.0B7C
WIDE PATTERN (MIN 500MA) 2ND = 075.01256.007C
PLACE NEAR USB CONNECTOR 08/19 ED3501 USB_PN1_R 與 USB_PP1_R SWAP 3RD = 075.09904.0A7C
USB_PP2_TVS 與 USB_PN2_TVS SWAP
BOM1
6/17 ED3501 Change Part Number to 75.09904.07C
與 ED3602 合合,共共多多已ESD Wistron Corporation
Title
USB30
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = USB3.0 Port1
D D
C C
(Blanking)
B B
BOM1
A
Title
Reserved
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = USB3.0 Port1
D D
C C
(Blanking)
B B
BOM1
A
Title
Reserved
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = Power Plane & Sequence

Power Good 3D3V_S0
1
R4005
R4011 1KR2J-1-GP
51 1D35V_VTT_PWRGD 1 2
0R0402-PAD
ROSA Run Power
2
D4002
53 RSMRST_PWRGD# RSMRST_PWRGD# 3 1 ALL_SYS_PWRGD 17,24
2
R4002
LBAS16LT1G-GP 1 2 VR_EN 46,52
83.00016.P11 0R0402-PAD
5V_S5
5V_S5 5V_S0 DY 3D3V_S5
U4001
5V_S0
SCD1U16V2KX-3GP
4 13 C4023
VBIAS OUT1#13
14
OUT1#14
1
D
CT1
12 3V5V_CT1 3D3V_S0 5V_S0 Comsumption D
C4005
SC10U10V5KX-2GP
1 Peak current 5A
R4010 IN1#1
2 IN1#2 OUT2#8 8
2
3V5V_S0_ON
3D3V_S0
17,24,51,52,54 SIO_SLP_S3# 1 2 3 EN1 OUT2#9 9
10 3V5V_CT2
0R0402-PAD CT2 U4007
C4002
SC470P50V2KX-3GP
C4001
SC470P50V2KX-3GP
3D3V_S5 6 IN2#6
1
7
IN2#7 GND
11 3D3V_S0 Comsumption 26,46 VR_RDY 1
A VCC
5
C4004
SC10U10V5KX-2GP
5 15 ALL_SYS_PWRGD 2
EN2 GND Peak current 2.5A 3
B
4
GND Y PCH_PWROK 17
2
G5016KD1U-GP
SN74AUP1G08DCKR-GP
074.05016.0093
2ND = 074.22966.0093
R4018
1 2
H_THERMTRIP# 4
0R2J-2-GP
DY
Q4002
MMBT2222A-3-GP DY DY
1
84.02222.V11
ED4003
ED4004
17 H_THERMTRIP_EN H_THERMTRIP_EN B
PESD5V0U1BL-GP-U1
PESD5V0U1BL-GP-U1
DY
C
R4007
2
C4003
1
17,24,31,61,68,79 PLT_RST# 1 2 SCD1U16V2KX-3GP
DY 3D3V_S0
2
4K7R2J-2-GP
1
DY R4003
1
2K2R2J-2-GP
DY R4016
DY DY DY 100KR2J-1-GP
VCCSTG_EN
2
1
3D3V_S5
ED4001
ED4002
ED4005
ED4006
DY U4003
2
PESD5V0U1BL-GP-U1
PESD5V0U1BL-GP-U1
PESD5V0U1BL-GP-U1
PESD5V0U1BL-GP-U1
R4015 1 2 PM_SLP_S0_STG# 1
17 SIO_SLP_S0# 0R2J-2-GP 5
R4017 1 2 PM_SLP_S3_STG# 2
2
D4001 17,24,51,52,54 SIO_SLP_S3# 0R2J-2-GP VCCSTG_EN

DY 4
45 3V_EN 1 3 PURE_HW_SHUTDOWN# 24,26,79 3
2 DY
TC7SZ08FU-2-GP
LBAS16LT1G-GP 73.7SZ08.EAH
1
C C
83.00016.P11 2ND = 73.7SZ08.DAH
1
2ND = 83.00016.H11 DY R4013

DY R4006 3RD = 83.00016.K11 R4014 1 DY 2 0R2J-2-GP 100KR2J-1-GP
200KR2F-L-GP
VCCSTG
2
2
R4009
1 2 S5_ENABLE 24 1D0V_S5
2KR2F-3-GP +VCCSTG(ICCMAX.=0.16A)
1
C4008 Trise=10US < TR < 65US
SCD1U16V2KX-3GP
DY +VCCSTG
2
+VCCSTG(ICCMAX.=0.16A)
U4002
VCCSTG should only ramp up equal to or after VCCST.
D4003 1 8
IN#1 OUT#8
24,45 5V_EN 1 3 2 IN#2 OUT#7 7
2 R4012 5V_S5 3 6
VCCSTG_EN VCCSTG_EN_R VBIAS OUT#6
1 DY 2 4 DY 5
ON GND
1
LBAS16LT1G-GP
SC1U10V2KX-L1-GP
DY R4008 83.00016.P11 0R2J-2-GP 9 1D0V_S5
IN#9
2ND = 83.00016.H11
1
200KR2F-L-GP
SC10U10V5KX-2GP
3RD = 83.00016.K11 VIL > 0.7 V, VIH < 2 V C4024
Rds(on) = 11 mΩ @ VDD = 4 V DY AOZ1335DI-GP C4016 DY C4007
2
DY 074.01335.0093 DY SC10U10V5KX-2GP
Ids(max) 10 A
2
2ND = 074.08939.0093
Need to Check
1D8V_S5
V1.8A +V1.8A
PG4004
1 2
GAP-CLOSE-PWR-3-GP
PG4005
1 2
GAP-CLOSE-PWR-3-GP
Discharge circuit C4017 C4021 PG4006
1
1D8V_S5 1 2 Q4003
SC22U6D3V5MX-2GP
SC1U10V2KX-1GP
GAP-CLOSE-PWR-3-GP DMP2130L-7-GP
2
950mA DS3
B
S B
D
+VCCSTG
D
1
1
+V1.8S_EDRAM
G
DS3
1
C4019 DS3 R4039 C4020
SCD1U16V2KX-3GP
Q4008 3D3V_S5 10KR2J-3-GP DS3 C4018 DY
SCD1U16V2KX-3GP
220R3F-1-GP 1 R4021 2 1D8V_DIS_Q 3 4 SC1U10V2KX-1GP
R4040
2
Q4009 3D3V_S5 DY
2
220R3F-1-GP 1 R4028 2 1D0V_DIS_Q 3 4 2 5 1 2 1D8A_EN_R#
17,24,51,52,54 SIO_SLP_S3#
DY 1D8V_DIS
DS3
2 5 1 6 2 R4020 1 84.02130.031
1D8A_EN#
17,24,51,52,54 SIO_SLP_S3# Q4004 20KR2J-L2-GP
1 6 1D0V_DIS 2 R4022 1 100KR2J-4-GP G DS3 2nd = 84.00102.031
17,41,53,54 SIO_SLP_SUS#
2N7002KDW-GP
100KR2J-4-GP 84.2N702.A3F DY D 3rd = 84.03413.B31
2N7002KDW-GP 2nd = 84.2N702.E3F
84.2N702.A3F DY 3rd = 75.00601.07C S
2nd = 84.2N702.E3F 4th = 84.DMN66.03F
3rd = 75.00601.07C DY 2N7002K-2-GP
4th = 84.DMN66.03F
DY
V1.8S
MANAGEMENT RAIL POWER GENERATION VCCST, VCCSTG, and VCCPLL can remain powered during S4 and S5 power states for board VR optimization. +V1.8A
Q4006
DMP2130L-7-GP
+V1.8S_EDRAM
5V_S5 1D0V_S5
1D0V_S5 +V1.00U_CPU VCCST 100mA
S
D
D
1
G
SC1U10V2KX-L1-GP
R4027 23e
1
23e C4026 R4044
G
1
1
SCD1U16V2KX-3GP
C4015 C4006 1 DY 2 23e 10KR2J-3-GP C4022 84.02130.031 C4027
SCD1U16V2KX-3GP
SC1U10V2KX-1GP
SCD1U16V2KX-3GP
DY DY 0R6J-3-GP DY
R4041
2
2nd = 84.00102.031
2
2
1 2 1D8S_EN_R#
+V1.00U_CPU
23e 23e 3rd = 84.03413.B31
1D8S_EN#
U4006 Q4007 20KR2J-L2-GP
17,24,51,52,54 SIO_SLP_S3# G
1 IN#1 OUT#8 8
2 IN#2 OUT#7 7 D
R4023 3 6
VCCSTU_EN_R VBIAS OUT#6
17,24,51 SIO_SLP_S4# 1 2 4 5 S
ON GND
1
A 0R2J-2-GP EC4001 9 1D0V_S5 2N7002K-2-GP A

IN#9
1
DY C4012 23e
1
SC10U10V5KX-2GP
SCD1U16V2KX-3GP
AOZ1335DI-GP C4013
2
SC10U10V5KX-2GP
074.01335.0093
2
2ND = 074.08939.0093
+VCCSTG +VCCST_CPU
VIL > 0.7 V, VIH < 2 V BOM1
Rds(on) = 11 mΩ @ VDD = 4 V 0.04 A
Ids(max) 10 A R4045
1 DY 2 Wistron Corporation
0R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.
+V1.00U_CPU Title
R4036
Power Plane EN Sequence
1 2 Size Document Number Rev
Custom
0R0402-PAD Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = Power Plane & Sequence
3D3V_S5 3D3V_S5_PCH
D R4101 D
1 2
0R0805-PAD
3D3V_S5
Obs reason:
For new project,
pls help to use cost down version
SY6288C10CAC for instead.
C4102
1
3D3V_S5_PCH
SC1U10V2KX-1GP
2
DS3 U4101
C C
1 GND OUT#8 8
2 IN#2 OUT#7 7
DS3 3 IN#3 OUT#6 6
17,40,53,54 SIO_SLP_SUS# 1 2 DS3_PWRCTL 4 EN DS3 OC# 5
R4102 C4101
1
0R2J-2-GP
SC1U10V2KX-1GP
SY6288C10CAC-GP
074.06288.0079 (OBS)
2
DS3
RdsON: 100m ohm
DS3
B B
BOM1
A
Title
Connected_Standby(1/2)+DS3
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = DIMM1

Main Func = DIMM2
D D
VREF CIRCUITRY
Layout Note:
Place Close DIMMs
DDR_VREF_S3
1D35V_S3
1
1
R4204
0R2J-2-GP R4206
1K8R2F-GP
DY
2
2
2R2F-GP
M_VREF_CA_DIMM 1 R4208 2 V_SM_VREF_CNT 5
C C
1
C4201
SCD022U16V2KX-3GP Layout Note:
2
1
Place Close DIMM1
R4203 +V_VREF_PATH3
1
1K8R2F-GP
R4207
24D9R2F-L-GP DDR_VREF_S3 1D35V_S3
2
2
1
1
R4205 R4212
0R2J-2-GP 0R2J-2-GP R4216
1K8R2F-GP
DY
SA_DIMM_VREFDQ
2
2
R4213
DIMM1 M_VREF_CA_DIMMB 5 M_VREF_DQ_DIM1 1

2R2F-GP
2 M_VREF_DQ_DIMMB
1
C4203 R4214
SCD022U16V2KX-3GP 1K8R2F-GP
2
+V_VREF_PATH2
2
1
R4215
B 24D9R2F-L-GP B
2
A BOM1 A
Wistron Corporation
Title
Connected_Standby(2/2)
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
F4301
BT+ 1 2
FUSE-10A32V-1-GP
69.41002.101
1
PC4301 PC4302 EC4301
SCD1U50V3KX-GP SC2200P50V2KX-2GP SCD1U50V3KX-GP
BATTERY CONNECTOR
2
BAT1
D D
10 12
8
BT+_IN 7
R4301 1 2 BATA_SCL_1 6
24,44,70 BAT_SCL
R4302 1 2 33R2J-2-GP BATA_SDA_1 5
24,44,70 BAT_SDA
24,44 BAT_IN# R4303 1 2 33R2J-2-GP BAT_IN#_1 4
33R2J-2-GP 3
2
PC4303 PL4301 PL4302 PL4303
K PC4304 PC4305 1
1
SC1KP50V2KX-1GP
9 11
SC100P50V2JN-3GP
SC100P50V2JN-3GP
PD4301
MLVS0402M04-GP-U
MLVS0402M04-GP-U
MLVS0402M04-GP-U
MMSZ5232BS-7-F-GP
2
SYN-CON8-29-GP
DY
A
DY DY DY 020.F0230.0008
1
2nd = 020.F0266.0008
1 BAT_IN#_1
AFTE14P-GP AFTP4301 1 BATA_SDA_1
AFTE14P-GP AFTP4302 1 BATA_SCL_1
AFTE14P-GP AFTP4303
1 BT+_IN
AFTE30-GP AFTP4305 1
AFTE14P-GP AFTP4306 1
AFTE14P-GP AFTP4309
1
Adaptor in to generate DCBATOUT
AFTE14P-GP AFTP4310
AD_ID
C C
DY
K
AD_JK PD4302
08/01 EC4308 Change part number 78.10622.L5L to 78.10622.51L(1206 to 0805) AZ5013-01HDR7G-GP
83.05013.0AF
DC Jack
A
TP4312 TP4313
TPAD14-OP-GP TPAD14-OP-GP
AD+
AD_JK AD_JK_F
1
SC10U25V5KX-GP
F4302 PU4301
1
PWRCN1 1 2 1 S D 8
EC4308 S D
DY 6 2
S D
7
NP1 FUSE-10A32V-1-GP 3 6
2
1
AD+_2 G D
1 69.41002.101 4 5
K
1
EC4307 PC4307 PR4301 PC4308
SCD1U50V3KX-L-GP
2 SCD1U50V3KX-L-GP PD4303 AON7403-GP-U
1
200KR2F-L-GP
SC1U50V5ZY-1-GP-U
3 P4SMAFJ28A-GP 84.07403.037
2
4 083.P4SMA.0BAM
1 5
2
AFTE14P-GP AFTP4311 NP2 Id= -10A
7 PQ4301
Qg= -22nC
2
R2
2
ACES-CON5-27-GP-U AD_OFF#_1 1 R1 Rdson=13~17mohm
AD_ID_R 3
20.F2182.005 LTA024EUB-FS8-GP
1
2nd = 20.F2198.005 PR4302
DY PR4303 84.00024.01K 100KR2J-4-GP
100KR2J-4-GP
R4304 06/25 Delete PR4303,PR4304,PR4305,PR4306
2
AD_ID_R 1 2 AD_ID
0R0402-PAD
PQ4302
AD+_2 trace width > 8mil
B PR4304
R1
3 Length < 500mil B
AD_ID 24 24,44 AD_OFF 1 2AD_OFF_RC 1

0R0402-PAD 2
R2
1
PC4309 LTC024EUB-FS8-GP
Test point SCD01U16V2KX-L1-GP 84.00024.A1K
2
DY
1 AD_JK 08/06 add AD_OFF Circuit
AFTE30-GP AFTP4316
1
AFTE14P-GP AFTP4317
AFTE14P-GP AFTP4318 1 AD_ID
A A
BOM1
Wistron Corporation
Title
DCIN & BATT Com

A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
PWR_CHG_SENSE_R
PU4402 PU4406
AD+ TPCC8131-GP +SDC_IN DCBATOUT TPCC8131-GP
84.08131.037 84.08131.037
8 D S 1 PR4402 1 2 1 S D 8
7 D S 2 D01R3721F-GP-U 2 S D 7
6 D S 3 3 S D 6
5 D D 5
1
G PG4402 PG4403 G
100KR2J-4-GP
PR4403
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
4
2
2
PR4431 PR4404
2
D 1 2 AD+_D_P44 1 2 AD+_P44 D
AD+
2
PWR_CHG_ACP_P44 2 1 PWR_CHG_ACN_P44
1
10KR2J-L-GP
PR4405
AD+_G_2 0R3J-L1-GP 20KR3J-1-GP
SCD1U50V3KX-L-GP
2
2
PC4403
SCD1U50V3KX-L-GP
PC4404
PR2 PC4402 PR3
D
2
1
SCD1U50V3KX-L-GP PR4432 470KR2J-L1-GP
DY
2
PR4407
10KR2J-L-GP
PR4406
0R2J-L-GP
PR4408
10R2J-L-GP
PR4409
AD_JK_F 1 2
1
1
DC_IN_D
1KR2J-L2-GP
2
0R3J-L1-GP
CHG_AGND DY G AD_OFF_P44 2 1 AD_OFF 24,43
PQ4401
2
CHG_AGND
1
PR4411
AD+_G_1
PR4410
3 4 0R2J-L-GP 84.2N702.A31
1
2N7002KT1G-GP SCD22U10V2KX-L1-GP
2 DY 1
S
ACAV_IN 2 5 PQ4402 PC4405
2
1 6
PWR_CHG_ACP
PWR_CHG_ACN
DMN601DWK-7-1-GP
75.00601.07C
PWR_CHG_VCC_P44
DCBATOUT CHARGER_SRC
PD4402
RB751VM-40TE-17-GP
83.R2004.J8F PG4404
K A AD_JK_F 1 2
GAP-CLOSE-PWR-6-GP
PG4405
K A BT+ 1 2
1
PD4403 GAP-CLOSE-PWR-6-GP
RB751VM-40TE-17-GP PG4406
PR4413 1 2
AD_JK_F 10R2J-L-GP
83.R2004.J8F PWR_CHG_BTST_1 CHARGER_SRC
SC10U25V5KX-GP
SC10U25V5KX-GP
GAP-CLOSE-PWR-6-GP
K
2
PWR_CHG_VCC 2 1 PG4407
PC4406 PD4404 1 2
866KR2F-GP
SC10U25V5KX-L-GP
1
C SC1U50V5ZY-1-GP-U RB751VM-40TE-17-GP C
SC2K2P50V2KX-L-GP
SCD1U50V3KX-L-GP
PR4401
28
83.R2004.J8F GAP-CLOSE-PWR-6-GP
PC4408
PU4404 CHG_AGND
PC4413
PC4409
A
+SDC_IN PC4411
VCC
1
SC2D2U10V3KX-L-GP
SCD01U50V2KX-L-GP
24 PWR_CHG_REGN 2 1
PWR_CHG_ACN REGN PC4407 PC4412
1 DY DY
2
ACN
1
1
133KR2F-GP
ok!
1
PR4415
Cap close charge IC
PC4410
PR4414
DY 18
5
6
7
8
3D3V_AUX_S5 BATDRV
Check EE pull high 3.3V 4K02R2F-GP PWR_CHG_ACP 2
ACP 20141124_KAMUS
D
D
D
D
PU4403
2014_1105_KAMUS
2
17 BT+_1 SIS412DN-T1-GE3-GP BT+_1

2
PWR_CHG_CMSRC BATSRC
That is pulled high 3
CMSRC
GAP-CLOSE-PWR-3-GP
PR4418
25 PWR_CHG_BTST 1 2PWR_CHG_BTST_1
BTST
1
G
S
S
S
4
2
PR4416 PR4417 ACDRV 0R3J-L1-GP PWR_CHG_SENSE_R
84.00412.037
4
3
2
1
PG4408
3K3R2J-3-GP 3K3R2J-3-GP
PWR_CHG_ACDET PWR_CHG_HIDRV BT+
DY DY 6
ACDET HIDRV
26
PL4401
2
1
1
PR4419
PC4414 D01R3721F-GP-U
27 PWR_CHG_PHASE SCD047U25V3KX-3-GP 1 2 1 2
2
BAT_SDA PHASE
11
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
24,43,70 BAT_SDA SDA IND-2D2UH-179-GP
SCD1U50V3KX-L-GP
SC10U25V5KX-L-GP
68.2R21A.20B
5
6
7
8
GAP-CLOSE-PWR-3-GP
BAT_SCL 12 23 PWR_CHG_LODRV
24,43,70 BAT_SCL SCL LODRV
D
D
D
D
GAP-CLOSE-PWR-3-GP
PU4405
PC4418
PC4419
PG4410 SIS412DN-T1-GE3-GP
K
2
2
GAP-CLOSE-PWR-3-GP
1
PG4412
22 2 1 PD4401
GND
PG4411
Check EE pull high LMBR120ET1G-GP
G
S
S
S
ACAV_IN PR4420 1 2 0R0402-PAD PWR_CHG_ACOK 5 DY
2
PC4425
PC4415
PC4416
PC4417
ACOK PWR_CHG_SRP CHG_AGND
20 84.00412.037 083.00120.0A8F
4
3
2
1
A
SRP
AD_IA 7 DY
24 AD_IA IADP
19 PWR_CHG_SRN
SRN
TPAD14-OP-GP 1 V_ISYS V_ISYS 8
20141124_KAMUS
TP4402 IDCHG
PR4421 PC4420
B TPAD14-OP-GP 1 PMON PMON 9 1 2 PWR_CHG_SRP_1 1 2 B
TP4403 PMON PWR_CHG_STAT# PC4422
16
1
TB_STAT# 10R2F-L1-GP PC4421 SCD1U50V3KX-L-GP SCD1U50V3KX-L-GP
PR4422 SCD1U50V3KX-L-GP
DY DY
SC100P50V2JN-L-GP
SC100P50V2JN-L-GP
SC100P50V2JN-L-GP
1 2 PWR_CHG_PROCHOT# 10 15 BAT_IN#
4,24,46 H_PROCHOT#
2
PROCHOT# BATPRES#
DY DY
1
0R0402-PAD
PC4423
PC4401
PC4424
13
CMPIN
PR4423 CHG_AGND CHG_AGND
1 2 PWR_CHG_SRN_1
2
14 10R2F-L1-GP
CMPOUT
29
PWR_CHG_ILIM POWERPAD
21
ILIM
CHG_AGND CHG_AGND CHG_AGND

PWR_CHG_REGN BQ24780 3D3V_AUX_S5
BQ24780RUYR-1-GP
1
1
PR4425
PR4424 CHG_AGND BAT_IN# 24,43
3D3V_AUX_S5 DY 100KR2J-4-GP
3D3V_AUX_S5 100KR2J-4-GP TP4401
2
TPAD14-OP-GP
2
1
ACAV_IN
1
1
PR4426 PR4427
DY? 100KR2J-4-GP PR4428
G
100KR2J-4-GP DY 120KR2J-GP Boost monitor

2
PWR_CHG_ILIM
2
1
1
D S PR4430
24 AC_IN# PR4429 59KR2F-GP
120KR2J-GP
DY
PQ4403
2
2N7002KT1G-GP
2
84.2N702.A31
A A
CHG_AGND
BOM1
Wistron Corporation
Title
CHARGER
A2
Tesla SKL-U -1
5 4 3 2 1
A B C D E
08/20 add 5V_EN
PWR_5V_EN1 1 PR4501 2 DCBATOUT PWR_DCBATOUT_5V

5V_EN 24,40
0R0402-PAD PG4510
2
1 2
EC4501 PR4507 GAP-CLOSE-PWR-3-GP
0R2J-2-GP
2
SCD1U16V2KX-L-GP PG4511
DY 1 2
1
GAP-CLOSE-PWR-3-GP
PWR_3D3V_EN2 1 PR4502 2
3V_EN 40
PG4512
0R0402-PAD 1 2
1
4 EC4502 GAP-CLOSE-PWR-3-GP 4
SC68P50V2JN-1GP
DY PG4513
2
1 2
12/18 PR4501,PR4502 Change to Short PAD GAP-CLOSE-PWR-3-GP
08/06 Change to Close GAP
PG4514
1 2
DCBATOUT PWR_DCBATOUT_3D3V GAP-CLOSE-PWR-3-GP 如上上)
12/11 Change Part number ZZ.CLOSE.001(如
PG4504 PG4525
1 2 1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PG4505
1 2 PG4524
GAP-CLOSE-PWR-3-GP 1 2
GAP-CLOSE-PWR-3-GP
08/06 Change to Close GAP PG4523
1 2
GAP-CLOSE-PWR-3-GP
如上上)
12/11 Change Part number ZZ.CLOSE.001(如
DCBATOUT
PWR_DCBATOUT_5V
PWR_DCBATOUT_3D3V
1
SC10U25V5KX-GP
SCD01U50V2KX-1GP
PC4507 PC4508
1
5
6
7
8
1
PC4501 PC4502 EC4503 PC4512 PC4513 PC4514
DY
D
D
D
D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SCD1U50V3KX-L-GP
SCD1U50V3KX-L-GP
PU4504
SCD1U50V3KX-L-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
D EC4504 AON7410-GP
2
2
D 8
D 7
D 6
D 5
2
PU4502
AON7410-GP
12
G
S
S
S
PU4501 84.07410.A37
84.07410.A37
VIN
4
3
2
1
Design Current=3.1A 2nd = 84.08067.A37 2nd = 84.08067.A37
3 3
S
S
S
G
OCP <6.2A PC4503 PR4503 PR4509 PC4509 Design Current=6.4A
1
2
3
4
S G 1 2PWR_3D3V_VBST2_1
1
SCD1U50V3KX-L-GP
2PWR_3D3V_VBST2 9
1D5R3F-GP VBST2 VBST1
17 PWR_5V_VBST1 1 2PWR_5V_VBST1_1 1
1D5R3F-GP
2
SCD1U50V3KX-L-GP OCP < 12.8A
3D3V_S5 PL4502
PL4501 PWR_3D3V_DRVH2 10 16 PWR_5V_DRVH1 5V_S5
DRVH2 DRVH1
1 2 PWR_3D3V_LL2 8 18 PWR_5V_LL1 1 2
COIL-3D3UH-26-GP SW2 SW1 IND-2D2UH-179-GP
1
68.3R310.20V D PWR_3D3V_DRVL2 11 15 PWR_5V_DRVL1
1
DRVL2 DRVL1
2nd = 68.3R31A.10V 68.2R21A.20B
D 8
D 7
D 6
D 5
1
PR4504 PR4511 PC4516
SCD1U10V2KX-4GP
PG4506 2D2R5F-2-GP PU4503 PWR_5V_VO1 2D2R5F-2-GP TC4503
VO1
14 2nd = 68.2R21B.10J DY
1
5
6
7
8
ST150U6D3VDM-28-GP
AON7410-GP
DY DY
2
2
1
D
D
D
D
GAP-CLOSE-PWR-3-GP
PC4504 TC4501 PWR_3D3V_FB2 4 2 PWR_5V_FB1 PU4505 PG4509
1PWR_5V_SNUB
2
1
VFB2 VFB1
SCD1U10V2KX-4GP
AON7410-GP
DY
1PWR_3D3V_SNUB
ST150U6D3VDM-28-GP
GAP-CLOSE-PWR-3-GP
2
G
S
S
S
G
PWR_3D3V_EN2 6 20 PWR_5V_EN1
1
2
3
4
2
EN2 EN1
S
G
S
S
S
4
3
2
1
PWR_3D3V_CS2 5 1 PWR_5V_CS1 PC4515
CS2 CS1 SC560P50V-GP
84.07410.A37
3V_FEEDBACK
1
PC4505
DY 077.51571.0001
2
SC330P50V3KX-GP PR4505 19 PR4510 2nd = 84.08067.A37
75KR2F-GP VCLK 140KR2F-1-GP
DY 84.07410.A37
2
077.51571.0001
2nd = 84.08067.A37 7 21
2
2
PGOOD GND
VREG3
VREG5
1
PR4516 TPS51275CRUKR-GP
PR4506
074.51275.0073
13
6K65R2F-GP 0R2J-2-GP 5V_AUX_S5
1
3D3V_AUX_S5 PR4512
DY
PWR_5V3D3V_VREG3
PWR_5V3D3V_VREG5
PG4507 PG4508 R402-PAD-H16-GP
2
1
3D3V_S5 PWR_3D3V_FB2_R
1 2 1 2 ZZ.00RES.021 PR4514
1 ASM_RES_PAD_DY
1
AFTE14P-GP AFTP4501 1 5V_S5 PC4506 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP 15KR2F-GP
1 2
AFTE14P-GP AFTP4502 SC18P50V2JN-1-GP PWR_5V_FB1_R
PC4517
DY
2
2
SC18P50V2JN-1-GP
2 2
DY
2
1
3D3V_S5
PR4517
1
1
10KR2F-2-GP
1
PC4510 PC4511 PR4515

PR4508 SC10U25V5KX-GP SC10U25V5KX-GP 10KR2F-2-GP
2
100KR2J-1-GP
DY Close to VFB Pin (pin2)
2
2
3V_5V_POK
17,54 3V_5V_POK
Close to VFB Pin (pin5)
06/16 PU4501 Change Part Number from TPS51275 to RT6575B (074.06575.0043).

06/17 PU4501 Change Part Number from RT6575B to TPS51275 (074.51275.0073)
1 1
BOM1
Wistron Corporation
Title
SYN256_5V/3D3V
A2
Tesla SKL-U -1
A B C D E
5 4 3 2 1
Main Func = CPU_CORE
PR4611
49K9R2F-L-GP
1 2
PC4632
1 2
SC1KP50V2KX-1GP
PR4602
D PC4602 81208_AGND D
1 2 PWR_VCCSA_COMP_R 1 2 PWR_VCCSA_CSN 50
2
SCD015U25V2KX-GP
1K5R2F-2-GP
PC4604 PC4606 PR4606
1
SC15P50V2JN-2-GP PC4607 SCD015U25V2KX-GP NTC-100K-1-GP-U
1
1 2 PR4609
SC4700P25V2KX-3-GP
PC4603 14K3R2F-GP 69.60028.011
2
SC1KP50V2KX-1GP
1
PWR_VCCSA_VSN_R 1 2 1 2 PWR_VCCSA_CSN_NTC
81208_AGND
PR4605 PR4612
7 VSSSA_SENSE PR4604 1 2 0R0402-PAD 1 2 1 2 PWR_VCCSA_CSP 50
8K06R3F-AS-GP 3D3V_S0
PR4613
825R2F-GP 113KR2F-L-GP
2
PC4605 1 2
1
SC1KP50V2KX-1GP
PR4608 PC4609 SC220P50V2KX-3GP PR4614
1
2K55R2F-GP 1 2 10KR2F-2-GP
7 VCCSA_SENSE PR4607 1 2 0R0402-PAD 1 2
2
81208_AGND PR4670 1 2 0R0402-PAD VR_RDY
PWR_VCCSA_VSP_R VR_RDY 26,40
1 2 1 2
PR4616 PR4630 1 2 0R0402-PAD
0R0402-PAD PC4608 VR_EN 40,52
SC1KP50V2KX-1GP +VCCST_CPU
PWR_VCCSA_VSP_RC PSYS
PR4615 2 1 20KR2F-L-GP
75R2F-2-GP
PR4622
100R2F-L1-GP-U
PR4623
1
PC4610
81208_AGND SCD1U25V2KX-GP +VCCST_CPU +VCCSTG Check +VCCST_CPU or +VCCSTG
2
7 VCCGT_SENSE PR4617 1 2 0R0402-PAD
1
45D3R2F-L-GP
PR4621
DY
1
PC4611 [#543016]
SC1KP50V2KX-1GP
1
C PR4619 C
7 VSSGT_SENSE PR4618 1 2 0R0402-PAD 2 1 1KR2F-3-GP PR4624 PR4669
1KR2F-3-GP
VR_SVID_CLK 7 DY DY 75R2F-2-GP
PWR_VCCGT_VSN_R 1 2 VR_SVID_ALERT# 7
2
PC4612 SC2200P50V2KX-2GP PG4601 VR_SVID_DATA 7
GAP-CLOSE-PWR-3-GP
50
47,48,50
2 1 PR4668
PWR_VCCSA_PWM
PWR_VCORE_DRVON
1
PR4665
PR4666
PR4667
1 2 H_PROCHOT# 4,24,44
PR4625 100R2F-L1-GP-U
37D4R2F-GP
81208_AGND
PWR_VCORE_VR_RDY
1
PWR_VCCSA_CSP1B
PR4626
PWR_VCCSA_COMP
2
PWR_VCCSA_IOUT
49D9R2F-GP
0R0402-PAD
10R2F-L-GP
PWR_VCCGT_VSN
PWR_VCCSA_VSN
PWR_VCCGT_VSP
PWR_VCCSA_VSP
1KR2F-3-GP PC4613 2 SC470P50V2KX-3GP
PWR_VCCSA_ILIM
1
PWR_VCORE_EN
1
PWR_VCCGT_FB_R PR4627
1 PR4628 2 1 2 PWR_VCORE_CSP 47
1
8K06R3F-AS-GP
PR4632
2
PC4614
SC470P50V2KX-3GP 81208_AGND 100KR2F-L1-GP
1 2 PR4629
2
2
23e chang to 64.10035.6DL 81208_AGND
25K5R2F-GP 1 2 PWR_VCORE_CSNNTC
1
PWR_VCORE_VRHOT#
PWR_VCORE_ALERT#
2
PR4631 14KR2F-GP
49
48
47
46
45
44
43
42
41
40
39
38
37
PWR_VCORE_SCLK
PWR_VCORE_SDIO
PC4617 4K75R2F-1-GP 1 2 PU4601
1
1
SC10P50V2JN-4GP PR4633
PSYS
VSP_1B
VSN_1B
COMP_1B
VR_RDY
ILIM_1B
CSN_1B
CSP_1B
IOUT_1B
GND
VSN_2PH
VSP_2PH
EN
PWR_VCCGT_ILIM_R
PC4615 PC4634 PC4616 NTC-100K-1-GP-U

2
SC470P50V2KX-3GP SCD022U25V2KX-GP SC6800P25V2KX-1GP

69.60028.011
2
2
PWR_VCCGT_COMP_R
1
PR4634 PC4618 81208_AGND PWR_VCORE_CSN 47
1
1 2 SC2200P50V2KX-2GP PWR_VCCGT_IOUT 1 36
PWR_VCCGT_DIFFOUT IOUT_2PH PWM_1B
2 35 1 PR4635 2
2
PR4638 NTC-220K-5-GP-U PWR_VCCGT_FB DIFFOUT_2PH DRVON

PR4637 3 34
165KR2F-GP PWR_VCCGT_COMP FB_2PH SCLK
4 33
PWR_VCCGT_ILIM COMP_2PH ALERT# 47KR2F-GP
48 PWR_VCCGT_CSPA 1 2 2 1 1 PR4639 2 1 PR4640 2 5 074.81208.0B73 32
PWR_VCCGT_CSCOMP ILIM_2PH SDIO
6 31 PR4636
1
49K9R3F-GP PC4620 12K4R2F-GP PWR_VCCGT_CSSUM CSCOMP_2PH VR_HOT# PWR_VCORE_IOUT PC4633 81208_AGND

7 30
23e change to 64.76825.55L 75KR2F-GP SC1KP50V2KX-1GP PC4621 23e change to 64.16225.6DL PWR_VCCGT_CSREF CSSUM_2PH IOUT_1A PWR_VCORE_CSP_1A PC4601 1 PWR_VCORE_COMP_R
8 29 1 2 2 1 2
SC150P50V2JN-3GP CSREF_2PH CSP_1A SC1KP50V2KX-1GP SC1500P50V2KX-2GP
23e:64.49925.55L; 2+2:DY 9 28
2
CSP2_2PH CSN_1A PWR_VCORE_ILIM

48 PWR_VCCGT_CSPB 1 PR4641 2 10 27 2K49R2F-GP
CSP1_2PH ILIM_1A PWR_VCORE_COMP PC4622 PC4619
11 26 1 2
ROSC_COREGT
TSENSE_2PH COMP_1A PWR_VCORE_VSN 1PWR_VCORE_VSN_R
ADDR_VBOOT
B 73K2R3F-1-GP 12 25 2 SC15P50V2JN-2-GP 81208_AGND B
TSENSE_1PH
ICCMAX_2PH
VRMP VSN_1A
ROSC_SAUS
PR4643 2 1 10R2F-L-GP
ICCMAX_1A
ICCMAX_1B
PWM1_2PH
PWM2_2PH
48 PWR_VCCGT_CSNB
23e 5V_S5 SC1KP50V2KX-1GP
PWR_VCORE_VRMP
PWM_1A
VSP_1A
1 2 PR4645 2 1 0R0402-PAD VSS_SENSE 7
1
23e PR4644
VCC
1
1
48 PWR_VCCGT_CSNA PR4646 2 1 10R2F-L-GP R9934 422R2F-2-GP PC4625
PC4623 PC4624 1KR2F-3-GP SC1KP50V2KX-1GP
SCD047U25V2KX-GP SCD047U25V2KX-GP PR4647
23e change to DY NCP81208MNTXG-2-GP
2
13
14
15
16
17
18
19
20
21
22
23
24
2
1 2 PR4648 2 1 0R0402-PAD VCC_SENSE 7
2
PWR_VCCGT_CSP2 3K48R2F-GP
1
PWR_VCORE_VCC_R
PWR_VCORE_ROSC_SAUS
PC4626 PWR_VCCGT_CSP1 PWR_VCORE_VSP 2PWR_VCORE_VSP_RC PWR_VCORE_VSP_R

PWR_VCORE_ROSC_COREGT
1 1 2
SCD01U50V2KX-1GP PWR_VCCGT_TSENSE PR4649
2
2K49R2F-GP PC4627 PR4650

DCBATOUT PWR_VCORE_TSENSE SC1KP50V2KX-1GP 2 1 PWR_VCORE_NTC
PR4651 81208_AGND PWR_VCORE_PWM 47 0R0402-PAD
48 PWR_VCCGT_CSPA 1 2 PR4601 PWR_VCORE_ADDR_BOOT
2
1 2 1KR2F-3-GP PWR_VCCSA_ICCMAX
1
4K87R2F-GP PWR_VCORE_ICCMAX PR4652
1 2 PWR_VCCGT_ICCMAX PC4628 12K7R2F-GP PR4653
48 PWR_VCCGT_CSPB
1
SCD1U25V2KX-GP NTC-100K-1-GP-U
23e
2
PR4654 PC4629 69.60028.011
2
4K87R2F-GP SCD01U50V2KX-1GP PR4660
2
1
23e change to 64.10035.6DL
PR4662 PR4658 PR4663
1
15K8R2F-GP
PWR_VCCGT_NTC 1 2
90K9R2F-GP
10KR2F-2-GP
48D7KR2F-GP
PR4655
0R0402-PAD 81208_AGND 81208_AGND
2
5V_S5
2
2
1
PR4656 PR4657
NTC-100K-1-GP-U PR4661 PC4630 2D2R2F-GP PR4664 PR4659
12K7R2F-GP SCD1U25V2KX-GP 1 2 24KR2F-GP 24KR2F-GP
2
69.60028.011
2
2
1
1
PC4631
SC1U10V2KX-1GP 81208_AGND
2
81208_AGND PWR_VCCGT_PWMB 48
81208_AGND 81208_AGND 81208_AGND
PWR_VCCGT_PWMA 48
A A
BOM1
Wistron Corporation
Title
CPU_VCORE(1/3)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1

DCBATOUT
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V2KX-GP
PC4710
1
D PC4702 PC4703 PC4701 PC4704 PC4705 D
2
PR4701
1 2 PW R_VCORE_BOOT_RC
PWR_VCORE_BOOT
2D2R3-1-U-GP
1
5V_S5 PC4706
SCD22U25V3KX-GP
PR4702
2
2D2R2F-GP
25
26
27
28
29
30
33
35
1
2 1 PW R_VCORE_VCC PU4701
THWN
VIN
VIN
VIN
VIN
VIN
VIN
GH
BOOT
1
PC4708 VCC_CORE
SC1U10V2KX-1GP 6
2
C VCC PW R_VCORE_PHASED C
PHASED 34 PL4701
7 VCCD PHASEF 32
1
PC4707 12 PW R_VCORE_SW 1 2
SC2D2U10V2KX-GP VSW#12
5 13
2
CGND VSW#13
074.81382.0BE3 VSW#14 14
15
COIL-D15UH-2-GP
VSW#15
46 PW R_VCORE_PW M
4 PWM VSW#16 16 68.R1510.20A
PR4704 17
PW R_VCORE_DISB# 2 VSW#17
1 2 DISB# VSW#18 18
1
46,48,50 PW R_VCORE_DRVON PT4701
0R0402-PAD 36 ZCD_EN
1
PG4707 PG4708
ST220U2VDM-5-GP
2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
5V_S5 3 PR4703
1
SMOD# 2D2R5F-2-GP
DY
GL#10
GL#11
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
GL#8
GL#9
2
NCP81382MNTXG-2-GP PW R_VCORE_SNUB
8
9
10
11
19
20
21
22
23
24
31
37
1
PC4709 79.22719.2BL
PW R_VCORE_GL SC2200P50V2KX-2GP
DY
2
Confirm with EE:
22uF/0805 total 32pcs (DY 5 pcs)
B B
46 PW R_VCORE_CSP
46 PW R_VCORE_CSN
A BOM1 A
Wistron Corporation
Title
CPU_VCORE(2/3)
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
DCBATOUT
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V2KX-GP
PC4811
1
PC4820 PC4827 PC4828 PC4829 PC4830 23e
23e 23e 23e 23e 23e
2
D D
PR4802
1 2
PWR_VCCGT_BOOTA
2D2R3-1-U-GP
PWR_VCCGT_BOOTA_RC
23e
5V_S5
1
PC4809
PR4803
23e SCD22U25V3KX-GP
2
2D2R2F-GP
25
26
27
28
29
30
33
35
1
2 1 PWR_VCCGT_VCCA PU4801
23e
THWN
VIN
VIN
VIN
VIN
VIN
VIN
GH
BOOT
1
PC4808 23e
SC1U10V2KX-1GP 6 +VCCGT
2
VCC PWR_VCCGT_PHASEDA
34 PL4801
PHASED
7 32
1
VCCD PHASEF
23e
PC4807
VSW#12
12 PWR_VCCGT_SWA 1 2 Confirm with EE:
SC2D2U10V2KX-GP 5 13 COIL-D15UH-2-GP
22uF/0805 total 35pcs (DY 5 pcs)
2
CGND VSW#13
074.81382.0BE3 VSW#14
14 68.R1510.20A
15
VSW#15
1 PT4802
46 PWR_VCCGT_PWMB PR4808
4
PWM VSW#16
16 23e
PWR_VCCGT_DISB#_A
23e VSW#17
17
1 2 2 18
2
46,47,50 PWR_VCORE_DRVON DISB# VSW#18
0R0402-PAD 36
1
5V_S5 ZCD_EN PG4808 PG4809
DY
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
3 PR4804
2
SMOD# 2D2R5F-2-GP
DY
GL#10
GL#11
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
79.33719.L01
GL#8
GL#9
SE330U2VDM-L-GP
C C
2
NCP81382MNTXG-2-GP
8
9
10
11
19
20
21
22
23
24
31
37
PWR_VCCGT_SNUB_1
1
PWR_VCCGT_GL1
PC4810
SC2200P50V2KX-2GP
DY
2
46 PWR_VCCGT_CSPB
46 PWR_VCCGT_CSNB
DCBATOUT
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V2KX-GP
PC4812
1
1
PC4802 PC4803 PC4804 PC4805 PC4806
2
2
B B
PR4805
1 2
PWR_VCCGT_BOOTB
2D2R3-1-U-GP
PWR_VCCGT_BOOTB_RC
5V_S5
1
PC4845
SCD22U25V3KX-GP
PR4806
2
2D2R2F-GP
25
26
27
28
29
30
33
35
1
2 1 PWR_VCCGT_VCCB PU4802
THWN
VIN
VIN
VIN
VIN
VIN
VIN
GH
BOOT
1
PC4847
SC1U10V2KX-1GP 6
2
VCC PWR_VCCGT_PHASEDB +VCCGT

34 PL4802
PHASED
7 32
1
VCCD PHASEF
PC4846 12 PWR_VCCGT_SWB 1 2
SC2D2U10V2KX-GP VSW#12 COIL-D15UH-2-GP
5 13
2
CGND VSW#13
074.81382.0BE3 VSW#14
14 68.R1510.20A
15
VSW#15
4 16
46 PWR_VCCGT_PWMA PWM VSW#16
1 PT4801
1 PT4803
PR4809 17
PWR_VCCGT_DISB#_B VSW#17
1 2 2 18
DISB# VSW#18
2
46,47,50 PWR_VCORE_DRVON
0R0402-PAD 36
1
ZCD_EN PG4815 PG4816

GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
5V_S5 3 PR4807
1
SMOD# 2D2R5F-2-GP
DY DY
GL#10
GL#11
2
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
GL#8
GL#9
SE330U2VDM-L-GP
SE330U2VDM-L-GP
2
NCP81382MNTXG-2-GP
8
9
10
11
19
20
21
22
23
24
31
37
PWR_VCCGT_SNUB_2
A A
1
PWR_VCCGT_GL2
PC4814
SC2200P50V2KX-2GP
DY
2
BOM1
Wistron Corporation
46 PWR_VCCGT_CSPA 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
46 PWR_VCCGT_CSNA
CPU_VCCGT3/3)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
BOM1
Wistron Corporation
Title
CPU_VCCGTUS
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
DCBATOUT
PC5029 PC5002
1
SC10U25V5KX-GP
SCD1U25V2KX-GP
5
6
7
8
PR5013
2
D
D
D
D
1 2 PW R_VCCSA_BST_RC PU5002
SIS412DN-T1-GE3-GP #544669 Intel CRB Rev0.53
2D2R3-1-U-GP +VCCSA(ICCMAX.=6A)
PWR_VCCSA_BST
G
S
S
S
PC5008
SCD22U25V3KX-GP
4
3
2
1
2
C PU5001 +VCCSA C
PL5001
1 8 PW R_VCCSA_DRVH
BST DRVH PW R_VCCSA_SW
2 PWM SW 7 1 2
46 PW R_VCCSA_PW M 3 6
46,47,48 PW R_VCORE_DRVON EN GND
5V_S5 4 VCC DRVL 5 IND-D47UH-22-GP-U
1
GND 9
1
PR5014
PC5001 2D2R5F-2-GP
DY
5
6
7
8
1
SC2D2U10V3KX-1GP NCP81253MNTBG-1-GP
2
D
D
D
D
SC47U6D3V5MX-1-GP
074.81253.0AE3 PU5003 PC5003
2
PG5021 PG5022
PWR_VCCSA_SNUB
SIS412DN-T1-GE3-GP
2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
DY
1
PW R_VCCSA_DRVL
G
S
S
S
4
3
2
1
1
PC5031
DY SC2200P50V2KX-2GP
2
B B
Confirm with EE:

46 PW R_VCCSA_CSP 22uF/0805 total 20pcs (DY 5 pcs)
46 PW R_VCCSA_CSN
A BOM1 A
Wistron Corporation
Title
CPU_VCCSA
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = VDDQ
DCBATOUT +PWR_SRC_1D35V
PG5103
D D
1 2
GAP-CLOSE-PWR-6-GP
PG5104
1 2
GAP-CLOSE-PWR-6-GP
PG5105
1 2
GAP-CLOSE-PWR-6-GP
PG5106
1 2 1D35V_PWR 1D35V_S3
+PWR_SRC_1D35V
GAP-CLOSE-PWR-6-GP
PG5124
5V_S5 PG5108
1 2
1 2
GAP-CLOSE-PWR-6-GP PC5112
PC5109 PC5111 GAP-CLOSE-PWR-6-GP
SC10U25V5KX-GP
PG5109
2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1
1
3D3V_S0 PC5113 1 2
DY
1
SCD1U50V3KX-GP
1
PC5101 GAP-CLOSE-PWR-6-GP
2
SC1U16V3KX-2GP PG5110
2
1
1 2
DY PR5104 PU5102
5
6
7
8
20KR2F-L-GP PR4605_2 GAP-CLOSE-PWR-6-GP
PG5111
D
D
D
D
1 2
SIS412DN-T1-GE3-GP
PU5101
2
20 12 PC5119
40 1D35V_VTT_PWRGD PGOOD V5IN GAP-CLOSE-PWR-6-GP
SCD1U50V3KX-GP Design Current=10.33A PG5112
2 PR5109 10R0402-PAD DDR_VTT_PG_CTRL_R 17 PR5105
5 DDR_PG_OUT S3 15.5A<OCP>18.6A 1 2
G
S
S
S
15 PWR_1D35V_VBST 1 2 1 2
VBST
2 PR5110 1 0R2J-2-GP PWR_1D35V_EN 16
4
3
2
1
17,24,40,52,54 SIO_SLP_S3# S5 2D2R3-1-U-GP GAP-CLOSE-PWR-6-GP
DY PWR_1D35V_VREF PWR_1D35V_DRVH
PG5113
6 14
VREF DRVH
1
C 1D35V_PWR 1 2 C
PL5101
PR5103
10K2R2F-GP 13 PWR_1D35V_SW 1 2 GAP-CLOSE-PWR-6-GP
SW PG5114
1 2
2
COIL-D68UH-5-GP-U
5
6
7
8
PC5121
PWR_1D35V_REFIN 8 11 PWR_1D35V_DRVL
32K4R2F-1-GP
SC4D7U6D3V3KX-GP
REFIN DRVL
1
D
D
D
D
GAP-CLOSE-PWR-6-GP
GAP-CLOSE-PWR-3-GP
PG5115
1
PU5103 DY PC5123 PC5124 PC5125 PC5126 PC5127 PC5128
PC5103
PC5102
PC5120
10
PG5107
PGND
1
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PWR_1D35V_MODE 19 SIS780DN-T1-GE3-GP DY PR5112 DY DY EC5101
MODE
1
PR5108 2D2R5F-2-GP SCD1U50V3KX-GP

2 PR5101
2
12KR2F-L-GP GAP-CLOSE-PWR-6-GP
1
G
4
2
1
SCD1U16V2KX-3GP
S
S
S
PWR_1D35V_TRIP 18 9 PWR_1D35V_VDDQS
SCD1U16V2KX-3GP
2
TRIP VDDQSNS
PR5102
PWR_1D35V_VDDQS
154KR2F-GP
SCD01U50V2KX-1GP
3
2
1
1
+0D675V_DDR_P TPS51216_PHS_SET
PR4601_1
2
PWR_1D35V_VTTREF VLDOIN
5
PC5115
VTTREF
1
1
3
0R0402-PAD
SC10U6D3V3MX-GP
2
VTT
1
PC5118 DY PC5122
SC10U6D3V3MX-GP
1
1
SCD22U10V2KX-1GP SC330P50V2KX-3GP
PR5106
PC5116
PC5117
1
2
2
VTTSNS
21 DY
SCD1U16V2KX-3GP
2
GND
4
2
2
VTTGND
7
GND
TPS51716RUKR-GP
74.51716.073 1D35V_PWR
1D35V_PWR 1
AFTP5101 AFTE14P-GP
1
+0D675V_DDR_P 0D675V_S0
PG5101 DDR_VREF_S3 PC5104 PR5107
1 2 SC1U16V3KX-2GP 1 2 PWR_1D35V_EN
PR5111
2
17,24,40 SIO_SLP_S4#
GAP-CLOSE-PWR-6-GP PWR_1D35V_VTTREF 1 2 0R0402-PAD PC5106
1
PG5102 DY
1 2
SCD1U16V2KX-3GP
0R3J-0-U-GP
2
GAP-CLOSE-PWR-6-GP
B B
State S3 S5 VDDR VTTREF VTT I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP CHOKE 0.68UH PCMC063T-R68 5~5.5mohm Isat =25Arms 68.R6810.20B
S0 Hi Hi On On On
O/P cap:CHIP CAP C 22U 6.3V M0805 X5R / 78.22610.51L
S3 Lo Hi On On Off(Hi-Z) H/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037
S4/S5 Lo Lo Off Off Off L/S:SIS780 / 14.5mOhm/17.5mOhm@4.5Vgs / 84.00780.037
A A
BOM1
Wistron Corporation
Title
MEM&MEMVTT
C
Tesla SKL-U -1
5 4 3 2 1
A B C D E
VCCIO
+VCCIO(ICCMAX = 2.73A)
+VCCIO 1D0V_S5
5V_S5 1D0V_S5
Cyntec. 2.5mm×2.0mmX1.2mm
DCR: 59m Ohm
PU5203
Idc : 3 A , Isat : 3A
1 8
VIN#1 VOUT#8
2 7
VIN#2 VOUT#7
3 6
PWR_VCCIO_EN VBIAS VOUT#6
17,24,40,51,54 SIO_SLP_S3# 1 2 4 5
PR5216 0R2J-2-GP ON GND
9
1
VIN#9
1 2 PC5227
40,46 VR_EN PR5218 0R2J-2-GP SC22P50V2JN-4GP TPS22961DNYT-GP
2
DY DY 074.22961.0093
Power modify 20140815
4 4
EOPIO and EDRAM 5V_S5 1D0V_S5

PU5204
+V_EDRAM_VR
+V_EDRAM_VR
1
VIN#1 VOUT#8
8 V_EDRAM_EOPIO_R 1 23e 2 PR5221 Voltage = 1.0 V ± 50 mV
2 7 0R6J-3-GP
PR5217 3
VIN#2 VOUT#7
6 Imax = 6 A Imax = 3.2 A
EN_EDRAM_VR VBIAS VOUT#6 Rds on = 4.65mohm TRISE = 240 us
17,24,40,51,54 SIO_SLP_S3# 1 23e 2 4 5
ON GND
0R2J-2-GP 23e 9 1D0V_S5
1D0V_S5 VIN#9
[#544669 Rev0.7] CRB: ALL_SYS_PWRGD_PMIC
[#543977 Rev0.7] PDDG: PM_SLP_S3# V_EDRAM_EOPIO_R
TPS22961DNYT-GP
074.22961.0093
+V_EOPIO_VR
1
1
3 3
PC5215 23e PC5211 PC5210 Voltage = 1.0 V ± 50 mV
SC10U10V5KX-2GP
SCD1U16V2KX-3GP
SC1U10V2KX-1GP
23e DY Imax = 2.8 A

2
2
TRISE = 240 us
V_EDRAM_EOPIO_R +V_EOPIO_VR
PR5222 2 23e 1
0R6J-3-GP
2 2
1 1
BOM1
Wistron Corporation
Title
DCDC-0D975V_VCCIO
Custom
Tesla SKL-U -1
A B C D E
5 4 3 2 1
Main Func = 1D0V
AOZ1268 for 1D0V

D D
5V_S5
TDC : 10A
1
PC5302 MAG. 7*7*3
DCR: 8.9m +/-7% Ohm
SC1U10V2KX-L1-GP
2
Idc : 11 A , Isat : 22A
DCBATOUT PU5301 1D0V_S5
PL5301
21 18 PWR_1D0V_LX 1 2 PC5303 PC5305 PC5301 PC5316 PC5318 PC5306 PC5307
VCC LX#18 COIL-1UH-63-GP
17
LX#17
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SCD1U25V2KX-L-GP
7 16 11/25 JAIME
IN#7 LX#16 68.1R010.20I
LX#11
11 2nd = 68.1R01B.10K
1
22
IN#22 LX#10
10 DY
2
8 PC5304
IN#8
PC5308
PC5309
PC5317
PC5312
C PR5301 9 20 PWR_1D0V_BOOT
1 2 SCD1U25V2KX-L-GP PG5315 DY C
2
93K1R2F-L-GP IN#9 BST
GAP-CLOSE-PWR-6-GP
5 PWR_1D0V_FB
1
FB
1
1 2 PWR_1D0V_TON 6
TON
SCD1U25V2KX-L-GP
PWR_1D0V_PG 1 4
2
PGOOD AGND
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
PWR_1D0V_VFB1
PWR_1D0V_EN 2 19
EN PGND
14
PGND
3 13
PWR_1D0V_PFM PFM# PGND
PGND
12 DY
1
PWR_1D0V_SS 23 15
SS PGND PR5302 PC5319
SC220P50V2KX-3GP
10K7R2F-GP
PR5303
R1
2
AOZ1268QI-02-GP
1
100KR2F-L3-GP
2
PC5313
SC1KP50V2KX-L-1-GP
2
PWR_1D0V_LX
B 3D3V_S5 B
1
1 PR5305 2 10KR2J-3-GP
1
11/07 jaime
PR5304
39KR2F-GP R2 Vo=0.8x(1+R1/R2) RFC5301
SC8P250V2CC-GP
0R0402-PAD
=0.8x(1+8.06/31.6)
2
1 PR5306 2 PWR_1D0V_PG
2
40 RSMRST_PWRGD#
PR5307 =1.004 DY
0R2J-2-GP
17,40,41,54 SIO_SLP_SUS# 1 2 PWR_1D0V_EN
DS3
1
PC5314
SC1KP50V2KX-L-1-GP
2
BOM1
0R0402-PAD
A
54 PWR_1D8V_PWRGD# 1 PR5312 2 Wistron Corporation A
Title
DCDC-V1D00A
Custom
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = 1D5V
3D3V_S5
S-1339D18for 1D8V_S0
SC1U10V2KX-1GP
PC5408
D D
2
Design Current = 16mA
PU5402 1D8V_PW R_AUDIO 1D8V_S0

PG5404
1 VIN VOUT 5 1 2
2 VSS
17,24,40,51,52 SIO_SLP_S3# 1 2PW R_1D8V_EN_AUDIO 3 ON/OFF NC#4 4 GAP-CLOSE-PW R-6-GP
PR5405 PC5407
PC5409
SC1U10V2KX-1GP
0R0402-PAD DY S-1339D18-N5T3U3-GP
SCD1U16V2KX-3GP
074.01339.0B3F
2
C
3D3V_S5
1
1D8V_S5 C
PR5407
100KR2F-L1-GP
11/07 jaime
2
PR5408 Design Current = 665mA

1 2
53 PW R_1D8V_PW RGD#
3D3V_S5
0R2J-L-GP 1D8V_PW R 11/25 jaime 1D8V_S5
PG5401 PG5405
GAP-CLOSE-PW R-6-GP GAP-CLOSE-PW R-6-GP
1 2 1 2
PG5402 PG5406
GAP-CLOSE-PW R-6-GP PU5401 GAP-CLOSE-PW R-6-GP
1
1 2 PC5405 1 2
PC5401 PC5402
SC10U6D3V3MX-L-GP
PW R_1D8V_POK 1 9
PGOOD GND
1
SC1U10V2KX-L1-GP
SC22P50V2JN-4GP
11/25 jaime PW R_1D8V_EN 2 8 PC5406 PC5410 PG5407

2
PW R_1D8V_S5_PVDD EN GND 1.8V_RUN_FB GAP-CLOSE-PW R-6-GP

3 VIN ADJ 7
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PW R_1D8V_S5_VDD 4 6 1 2
2
VDD VOUT
NC#5 5
B B
RT9025-25ZSP-1-GP
1
74.09025.D3D
R1
PR5403 PC5404
12K7R2F-GP SC22P50V2JN-4GP
2
5V_S5 PR5406
2D2R2F-GP
2
1 2
1.8V_RUN_FB
PC5411
1
1
SC1U10V2KX-L1-GP
R2 PR5402
2
10KR2F-L1-GP
Vout Setting
Vout = 0.8 * ( 1 + R1/R2 )
PR5401 1 2 0R2J-L-GP PW R_1D8V_EN = 0.8 * ( 1 + 12K7 / 10K)
17,40,41,53 SIO_SLP_SUS#
DS3 = 1.816V
1
11/28 jaime
PR5404 1 2 0R2J-L-GP PC5403
17,45 3V_5V_POK
SC22P50V2JN-4GP
A NON DS3 BOM1 A

2
10/23 Mars
Wistron Corporation
DY Taipei Hsien 221, Taiwan, R.O.C.
Title
LDO-V1D8V
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
SSID = VIDEO LCD POWER (Do Not use SW 74.09724.09F)
INVERTER POWER Close to eDP connector
DCBATOUT_LCD
Layout 40 mil CAMERA POWER LCD_BRIGHTNESS
2014/2/5:Change U5201 to 074.06288.007B
3D3V_S0
Layout 40 mil LCDVDD
DCBATOUT 3D3V_CAMERA_S0 3D3V_S0
2nd = 69.50007.A41 F5501 R5518 U5501
69.50007.A31
2 1 1 2
0R0603-PAD
POLYSW-1D1A24V-GP-U U5504
DY R5507
5
IN OUT
1
2
1
1
GND
SC4D7U25V5KX-GP
SC1KP50V2KX-1GP
SCD1U50V3KX-GP
SC68P50V2JN-1GP
C5506 C5504 C5505 C5511 R5522 EC5502 1 2 LCDVDD_EN 4 3
SC33P50V2JN-3GP
8 EDP_VDD_EN EN OC#
DY DY 1 DY 2 3D3V_S0_CAMERA 1 5 DY
1
0R3J-0-U-GP OUT IN 0R0402-PAD C5508
2
2
1
GND FC5501 SY6288C20AAC-GP
D 3 4 D
SC33P50V2JN-3GP
SC4D7U6D3V3KX-GP
OC# EN/EN# CAMERA_EN 20
1
C5531
DY
2
1
1
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP
SC10U6D3V3MX-L-GP R5514 C5509 C5507
074.06288.007B
2
1
SY6288CAAC-GP C5530 100KR2J-1-GP
DY
2
74.06288.07F SC10U6D3V3MX-L-GP
2
2
2
2nd = 074.00524.0B9F
Panel BL brightness/Power En/BL En

R5510
R5509 1 2 PANEL_BLEN 24
USB_PN4_R USB_CPU_PN4 8 L_BKLT_EN 0R0402-PAD
1 2 USB_CPU_PN4 16
R5503
0R0402-PAD 1 21KR2J-1-GP BLON_OUT_C
24 BLON_OUT
R5508
1
SC100P50V2JN-3GP
1 2 L_BKLT_CTRL_1 C5510
8 L_BKLT_CTRL 0R0402-PAD
1
2
eDP Device
R5530 R5532
100KR2J-1-GP
eDP connector
100KR2J-1-GP
DY
Item Device
2
R5506
1 Lid USB_PP4_R 1 2 USB_CPU_PP4
USB_CPU_PP4 16
1
DCBATOUT_LCD
2 0R0402-PAD C5527
SC100P50V2JN-3GP
EDP1 3 DMIC
2
C 42 C
4 Panel Touch
40
39 5 Camera
38
3D3V_S0
37
3D3V_AUX_S5_HALL
6 eDP Panel R5531
36
35
LID_CLOSE#
34
33 LCD_BRIGHTNESS 1 R5515 2 L_BKLT_CTRL_1
LID_CLOSE# 24,66
Lid DMIC1_VCC
0R0402-PAD
1 2 R5594
32 BLON_OUT_C 33R2J-2-GP Touch_3V3 1 2 3D3V_S0
0R2J-2-GP
31 DY
1
SCD1U16V2KX-3GP
30 06/12 Delete G Sensor Net C5534
29
28
2
27
26
DMIC_DATA 27
DMIC_CLK 27
DMIC U5505
TOUCH
25 R5523
EMB_HPD_R 3D3V_S0_Touch
24
23
USB_CPU_PP6
USB_CPU_PN6
16
16
Touch control BD 1 2
0R0603-PAD
1
2
OUT
GND
IN
5
R5525
22 TOUCH_RST 3 4 TOUCH_EN 1 2 LID_CLOSE#
1
USB_PN4_R OC# EN/EN#
21
Camera C5543 0R0603-PAD
2
20 USB_PP4_R SC4D7U6D3V3KX-GP
1
R5516 SY6288CAAC-GP
19 TOUCH C5533
2
eDP_AUXN_CPU_C C5528 1 2 SCD1U16V2KX-L-GP
18
eDP_AUXP_CPU_C C5526 1 eDP_AUX_CPU_N 8 100KR2F-L3-GP 74.06288.07F
17 2 SCD1U16V2KX-L-GP eDP_AUX_CPU_P 8
SC4D7U6D3V3KX-GP
2
16 1st = 074.00524.0B9F TOUCH
1
eDP_TXN1_CPU_C
15
14 eDP_TXP1_CPU_C
C5514 1
C5513 1
2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP
eDP_TX_CPU_N1 8
eDP_TX_CPU_P1 8
eDP Panel 3D3V_AUX_S5
13
12 eDP_TXN0_CPU_C C5532 1 2 SCD1U16V2KX-L-GP eDP_TX_CPU_N0 8
11 eDP_TXP0_CPU_C C5529 1 2 SCD1U16V2KX-L-GP eDP_TX_CPU_P0 8
10 R5535
9 EMB_HPD_R 1 2 R5542 3D3V_AUX_S5_HALL 1 0R2J-L-GP
2
EDP_HPD 8
8 EDP_DCR_EN 0R0402-PAD
1
3D3V_CAMERA_S0
SCD1U16V2KX-3GP
C5536
7
6 DMIC1_VCC
TESLA
DY
5 D5501
2
4 Touch_3V3 K A
3
1
2 C5523 C5525 08/18 add C5523(0.1uF), C5525(1uF) RB551V30-GP TESLA

SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
B B
1 DY 83.R5003.H8H
2
41 LCDVDD
2nd = 83.R5003.T8F Test point
ACES-CON40-10-GP R5528
LCDVDD_R 1 2
0R0603-PAD
20.K0617.040
1
C5522 C5524
2nd = 20.K0568.040
SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
1 AFTP5525 AFTE14P-GP
2
LCDVDD_R 1 AFTP5501 AFTE14P-GP

USB_PP4_R 1 AFTP5504 AFTE14P-GP
USB_PN4_R 1 AFTP5503 AFTE14P-GP
DCBATOUT_LCD 1 AFTP5535 AFTE14P-GP
BLON_OUT_C 1 AFTP5543 AFTE14P-GP
LCD_BRIGHTNESS 1
DMIC_DATA AFTP5542 AFTE14P-GP
DMIC_CLK 1 AFTP5536 AFTE14P-GP
3D3V_CAMERA_S0 1 AFTP5508 AFTE14P-GP
DMIC1_VCC 1 AFTP5532 AFTE14P-GP
3D3V_AUX_S5_HALL1 AFTP5534 AFTE14P-GP
EDP_DCR_EN 1 AFTP5538 AFTE14P-GP
ESD Request
LID_CLOSE# 1 AFTP5540 AFTE14P-GP
10/16 add ED5507
10/17 change ED5507 從6pin 都都10 pin(EMI如
如要)
10/20 AFTP5503, AFTP5504 USB_PN3, USB_PP3 change to USB_PN3_R, USB_PP3_R
10/20 change ED5507 從10pin 都都6 pin(EMI如
如要)
3D3V_S0 TOUCH_RST
TOUCH_RST 20
EMB_HPD_R 1 AFTP5545 AFTE14P-GP
eDP_TXP0_CPU_C
A ED5507
DY eDP_TXN0_CPU_C
1 AFTP5546 AFTE14P-GP A
eDP_TXP1_CPU_C 1 AFTP5548 AFTE14P-GP
DMIC_DATA 1 6 USB_PP4_R eDP_TXN1_CPU_C 1 AFTP5549 AFTE14P-GP
1
eDP_AUXP_CPU_C 1 AFTP5550 AFTE14P-GP

2 5 ED5506 eDP_AUXN_CPU_C 1 AFTP5551 AFTE14P-GP
DMIC_CLK 3 4 USB_PN4_R BOM1
ESD5B5D0ST1G-GP-U
DY
PJSRV05W-4DW6-GP Wistron Corporation
075.00005.0B7C Taipei Hsien 221, Taiwan, R.O.C.
2
2ND = 075.01256.007C Title

3RD = 075.09904.0A7C
LCD&CAM&DMC&Touch
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO HDMI CONNECTOR 3D3V_S0

1 HDMI_DATA2_R_C
AFTE14P-GP AFTP5701 1 HDMI_DATA2_R_C#
AFTE14P-GP AFTP5702 1 HDMI_DATA1_R_C 5V_S0 5V_CRT_PH 5V_HDMI
2
AFTE14P-GP AFTP5703 HDMI_DATA1_R_C#
AFTE14P-GP AFTP5704
1
1 HDMI_DATA0_R_C 69.48001.081 HDMI1 R5720
AFTE14P-GP AFTP5705 1 HDMI_DATA0_R_C# D5702 F5701 10KR2J-3-GP
AFTE14P-GP AFTP5706 1 HDMI_CLK_R_C A K 1 2 5V_HDMI 18 15 DDC_CLK_HDMI
AFTE14P-GP AFTP5707 HDMI_CLK_R_C# +5V_POWER SCL DDC_DATA_HDMI
1 16
1
AFTE14P-GP AFTP5708 DDC_CLK_HDMI SDA AFTP5714
1 B0530WS-7-F-GP DY
1
AFTE14P-GP AFTP5709 1 DDC_DATA_HDMI DY POLYSW-1D1A6V-9-GP-U HDMI_DATA0_R_C 7 AFTE14P-GP
TMDS_DATA0+
HDMI Passive Level Shifter AFTE14P-GP

AFTE14P-GP
AFTP5710
AFTP5711
1
1
5V_HDMI
HPD_HDMI_CON
83.R5003.G8H C5701 HDMI_DATA0_R_C#
HDMI_DATA1_R_C
9
4
TMDS_DATA0- CEC
13
17
HDMI_CEC 1
2
AFTE14P-GP AFTP5712 HDMI_DATA1_R_C# TMDS_DATA1+ DDC/CEC_GROUNG HPD_HDMI_CON
D 1 2 DY 1 R5704 SCD1U16V2KX-L-GP 6 19 D
TMDS_DATA1- HOT_PLUG_DETECT
Close to HDMI Connector AFTE14P-GP AFTP5713 0R3J-0-U-GP HDMI_DATA2_R_C
HDMI_DATA2_R_C#
1
3
TMDS_DATA2+
14
TMDS_DATA2- RESERVED#14
8
TMDS_DATA0_SHIELD
5
TMDS_DATA1_SHIELD
2
TMDS_DATA2_SHIELD
20
GND
8 HDMI_CLK
C5702 1 2 SCD1U16V2KX-L-GP HDMI_CLK_C 11 21
TMDS_CLOCK_SHIELD GND
8 HDMI_CLK#
C5703 1 2 SCD1U16V2KX-L-GP HDMI_CLK_C# HDMI_CLK_R_C 10 22
HDMI_CLK_R_C# TMDS_CLOCK+ HDMI GND
12 23
TMDS_CLOCK- (A_Type) GND
8 HDMI_DATA0#
C5704 1 2 SCD1U16V2KX-L-GP HDMI_DATA0_C#
8 HDMI_DATA0
C5705 1 2 SCD1U16V2KX-L-GP HDMI_DATA0_C
SKT-HDMI23-129-GP-U1
8 HDMI_CRT_P1
8 HDMI_CRT_N1
C5707 1 2 SCD1U16V2KX-L-GP HDMI_DATA1_C# 022.10025.0061
8 HDMI_CRT_N0
C5708 1 2 SCD1U16V2KX-L-GP HDMI_DATA2_C# 2ND = 022.10025.0091
8 HDMI_CRT_P0
08/12 HDMI1 22.10296.B41 Change to 022.10025.0061
5
6
7
8
5
6
7
8
RN5705 RN5706 HDMI_DATA2_R_C R5706 1
ESD STUFF OPTION
HDMI_DATA2_R_C#
2
SRN470J-5-GP SRN470J-5-GP ESD 150R2F-4-L-GP
STUFF OPTION
HDMI_DATA1_R_C R5707 1 2 HDMI_DATA1_R_C#
ESD 150R2F-4-L-GP
STUFF OPTION
HDMI_DATA0_R_C R5708 1 2 HDMI_DATA0_R_C#
4
3
2
1
4
3
2
1
ESD 150R2F-4-L-GP
STUFF OPTION
HDMI_CLK_R_C R5709 1 2 HDMI_CLK_R_C#
150R2F-4-L-GP 5V_CRT_PH Q5704 5V_S0
HDMI_PLL_GND AO3413L-GP
S D
HDMI DDC Passive Level Shifter 5V_S0 84.03413.B31
G
1
1
C5710 2ND = 84.00048.031
SC4D7U6D3V3KX-GP
SCD1U16V2KX-L-GP
C5711
DY
2Q5105_VDD_EN#
C D5701 C
2
BAW56-5-GP
83.00056.Q11
1
2ND = 75.00056.07D
HDMI A type pin define
DDC_DATA_HDMI_R
2
DDC_CLK_HDMI_R
R5713 R5714
10KR2J-3-GP 10KR2J-3-GP (Total: 19pin)
1
3D3V_S0
Q5101_VDD_EN#
1
3D3V_S0
D
3
4
R5701 EC5701
1
Q5701 1MR2J-1-GP 3D3V_S0 RN5707 Q5705

1 6 HDMI_PLL_GND SRN2K2J-5-GP 2N7002K-2-GP
84.2N702.J31
2
2 SCD1U16V2KX-L-GP
2 5
2ND = 84.2N702.031
2
1
HPD_HDMI_CON 3 4 CPU_DP1_HPD 8
Q5703 3rd = 84.2N702.W31
G
2N7002KDW-GP 2N7002KDW-GP 5V_S0
DDC_DATA_HDMI
84.2N702.A3F 8 CPU_DP1_CTRL_DATA 1 6
1
R5703
2nd = 84.DM601.03F
2 5
100KR2J-1-GP
3 4
2
84.2N702.A3F
HPD_HDMI_CON_R 禁多) to 84.2N702.J31
07/02 Change Part Number 84.07002.I31(禁
1
DDC_CLK_HDMI
R5712
2nd = 84.DM601.03F
0R0402-PAD 8 CPU_DP1_CTRL_CLK
2
B B
HDMI_DATA0_R_C#
R5705 R5718 HDMI_DATA0_R_C
HDMI_DATA0_C 1 2 HDMI_DATA0_R_C HDMI_DATA1_C 1 2 HDMI_DATA1_R_C HDMI_CLK_R_C#
HDMI_CLK_R_C
0R0402-PAD 0R0402-PAD
HDMI_CEC
HPD_HDMI_CON
HDMI_DATA1_R_C# DDC_DATA_HDMI
HDMI_DATA1_R_C DDC_CLK_HDMI
HDMI_DATA2_R_C
HDMI_DATA2_R_C#
R5715 R5719 HPD_HDMI_CON DDC_CLK_HDMI DDC_DATA_HDMI

HDMI_DATA0_C# 1 2 HDMI_DATA0_R_C# HDMI_DATA1_C# 1 2 HDMI_DATA1_R_C#
ED5706
0R0402-PAD 0R0402-PAD ED5702
ED5701
1 10
1 10 EMI Request
1 10 2 9
1
R5710 R5711 2 9 3 8
HDMI_CLK_C 1 2 HDMI_CLK_R_C HDMI_DATA2_C 1 2 HDMI_DATA2_R_C 2 9 3 8 ED5705 ED5703 ED5704
3 8 4 7 VARISTOR-27V-2-GP VARISTOR-27V-2-GP VARISTOR-27V-2-GP
0R0402-PAD 0R0402-PAD 4 7 69.80005.081 69.80005.081 69.80005.081
4 7 5 6
5 6
DY DY DY
2
5 6
PJE5UFN10A-GP
PJE5UFN10A-GP
PJE5UFN10A-GP
075.00510.0073 075.00510.0073
075.00510.0073 2ND = 075.00550.0071
2ND = 075.00550.0071 3RD = 75.01045.073
R5717 R5716 2ND = 075.00550.0071 3RD = 75.01045.073
HDMI_CLK_C# 1 2 HDMI_CLK_R_C# HDMI_DATA2_C# 1 2 HDMI_DATA2_R_C# 3RD = 75.01045.073
DY 08/18 add ED5706
A 0R0402-PAD 0R0402-PAD DY A
DY
08/19 HPD_HDMI_CON & DDC_CLK_HDMI SWAP
10/15 ED5701,ED5702,ED5706 Change Part number to 75.00524.073 BOM1
Wistron Corporation
Title
HDMI
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
A BOM1 A
Wistron Corporation
Title
RESERVED
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
A BOM1 A
Wistron Corporation
Title
RESERVED
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
SSID = SATA
5V_S0_HDD
E E
R6001
5V_S0 1 2 5V_S0_HDD HDD1
0R0805-PAD
P1 V33 23 23
1
C6005 R6002 P2 24
V33 24
1
SC10U10V5KX-L1-GP
SCD1U16V2KX-L-GP
C6006 C6007 1 2HDD_CON_P3 P3
16 DEVSLP1_HDD_CON V33
SC18P50V2JN-1-GP
0R0402-PAD NP1
2
NP1
P7 NP2
2
V5 NP2
P8 V5
P9 V5
P13 V12 GND S1
P14 V12 GND S4
P15 V12 GND S7
GND P4
GND P5
SCD01U50V2KX-L-GP 2 1C6001 8520B_SATA_TXP0_C S2 P6
16 SATA_TX_CPU_P0 SCD01U50V2KX-L-GP A+ GND
2 1C6002 8520B_SATA_TXN0_C S3 A- GND P10
16 SATA_TX_CPU_N0 P12
SCD01U50V2KX-L-GP GND
D 2 1C6004 8520B_SATA_RXP0_C S6 B+
R6008 D
16 SATA_RX_CPU_P0 SCD01U50V2KX-L-GP 2 1C6003 8520B_SATA_RXN0_C S5 P11 DAS1 2
16 SATA_RX_CPU_N0 B- DAS/DSS
0R0402-PAD
SKT-SATA7P-15P-101-GP
22.10300.E71
2ND = 22.10300.G61
ED6001
C 8520B_SATA_TXP0_C 1 10 8520B_SATA_TXP0_C C
8520B_SATA_TXN0_C 2 9 8520B_SATA_TXN0_C
3 8
8520B_SATA_RXN0_C 4 7 8520B_SATA_RXN0_C
8520B_SATA_RXP0_C 5 6 8520B_SATA_RXP0_C
PJE5UFN10A-GP
075.00510.0073
1ST = 075.00550.0071
3RD = 75.01045.073
B B
BOM1
A

Title
SATA IF_HDD/ODD
A3
Tesla SKL-U -1
Date: W ednesday, July 22, 2015 Sheet 60 of 102
5 4 3 2 1
5 4 3 2 1
3D3V_S5 3D3V_WLAN
AOAC
Q6103 3D3V_S0 3D3V_WLAN 3D3V_WLAN
1
AO3413L-GP
100KR2J-1-GP
1
C6111 S D 1 R6121 2
SCD1U16V2KX-L-GP
R6102
AOAC 84.03413.B31 0R0603-PAD
1
AOAC C6112 C6113 C6110
SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
2ND = 84.00048.031
SC10U6D3V3MX-GP
10/16 R6121 原原都NON_AOAC, 都都DUMMY PAD
2
D D
WLAN_PWRON#_C 10/20 R6121 都改原原都NON_AOAC DY
1
AOAC R6125 AOAC Change to 100K (TBC)
1
10KR2J-3-GP
Q6101 R6126
2
3 WLAN_PWRON#
1 R1 100KR2J-1-GP
24 WLAN_PWRON
2
2
R2
SB 84.00024.A1K
LTC024EUB-FS8-GP
1
2ND = 84.00124.H1K
100KR2J-1-GP
DY
R6127 AOAC
2
3D3V_WLAN
WLAN1
76 77
76 77
74 75
3_3VAUX GND
72 73
3_3VAUX RESERVED#73
70 71
RESERVED#70 RESERVED#71
68 69
RESERVED#68 GND
66
64
RESERVED#66 RESERVED#67/2ND_LANE_PERN1
67
65
06/27 WLan1 不這多62.10043.I91, 如多 1ST 062.10007.0291 , 2nd 062.10007.0251
GPIO0_NFC_RESET#/MGPIO7 RESERVED#65/2ND_LANE_PERP1
62 63
NFC_I2C_IRQ/MGPIO5 GND
60 61
NFC_I2C_SM_CLK RESERVED#61/2ND_LANE_PETN1
58 59
NFC_I2C_SM_DATA RESERVED#59/2ND_LANE_PETP1
24 WIRELESS_EN 56 57
W_DISABLE#1 GND
C
19 BT_DISABLE# 1 R6110 2 BT_DISABLE#_R 54 55 PCIE_WAKE#_1 1 R6108 2 WLAN_PCIE_WAKE# 24 C
0R0402-PAD RESERVED#54/W_DISABLE#2 PEWAKE0# PCIE_CLK_WLAN_REQ#_R 0R0402-PAD
17,24,31,40,68,79 PLT_RST# 52 53
PERST0# CLKREQ0#
18 PCH_SUSCLK_KBC 1 2 PCH_SUSCLK_KBC_R 50 51
R6109 0R2J-2-GP SUSCLK_32KHZ GND
DY E51_RXD_R
48
46
COEX1 REFCLKN0
49
47
PEG_CLK1_CPU# 18
COEX2 REFCLKP0 PEG_CLK1_CPU 18
E51_TXD_R 44 45
CL_CLK_WLAN_R COEX3 GND
18 CL_CLK DY 1 2
CL_DATA_WLAN_R
42
CLINK_CLK PERN0
43 PCIE_RX_CPU_N5 16
18 CL_DATA DY1 R6111 0R2J-2-GP
2
CL_RST_WLAN#_R
40
CLINK_DATA PERP0
41 PCIE_RX_CPU_P5 16
18 CL_RST# DY1 R6112 0R2J-2-GP
2
R6113 0R2J-2-GP
38
CLINK_RESET GND
39
36 37 PCIE_TX_CON_N5 16
UART_CTS PETN0
34 35 PCIE_TX_CON_P5 16
UART_RTS PETP0
32 33
UART_TX GND
22 23
UART_RX SDIO_RESET
20 21
UART_WAKE SDIO_WAKE
18
GND SDIO_DAT3
19 06/05 Wlan_DP_MLDIR 多多所此 , 待待如如因多,將
將多多將將
16 17 WLAN_DP_MLDIR 1 2
LED#2 SDIO_DAT2 R6114 0R2J-2-GP
14
12
PCM_OUT SDIO_DAT1
15
13
DY
PCM_IN SDIO_DAT0
10 11
PCM_SYNC SDIO_CMD
8 9
PCM_CLK SDIO_CLK
6 7
LED#1 GND
4 5 USB_CPU_PN7 16
3_3VAUX USB_D-
2 3
3_3VAUX NGFF_KEY_E_75P USB_D+
GND
1
USB_CPU_PP7 16
1
AFTE14P-GP AFTP6103
NP2 NP1
NP2 NP1 PCIE_WAKE#_1
1 BT_DISABLE#_R
AFTE14P-GP AFTP6105
SKT-MINI67P-2-GP-U 1 PCIE_CLK_WLAN_REQ#_R
3D3V_WLAN AFTE14P-GP AFTP6106
1 PEG_CLK1_CPU#
AFTE14P-GP AFTP6107
1
2
PEG_CLK1_CPU
62.10043.I91 DY AFTE14P-GP AFTP6108 1
1 WIRELESS_EN
AFTE14P-GP AFTP6109 PLT_RST#
ESDR0502BT1G-GP
ED6101
BOM Control WLAN1
B
1 PCIE_RX_CPU_N5
3
AFTE14P-GP AFTP6111 PCIE_RX_CPU_P5

1
R1
AFTE14P-GP AFTP6112
Q6102 1st = 062.10007.0291
LTC015TEBFS8TL-GP 2nd = 062.10007.0241
B
3rd = 062.10007.0511 ESD RESERVED B
84.00015.B1H 1 PCIE_TX_CON_N5
AFTE14P-GP AFTP6115 PCIE_TX_CON_P5
1
E
AFTE14P-GP AFTP6116 USB_CPU_PN7

2ND = 84.00015.01H AFTE14P-GP AFTP6117
1
1 USB_CPU_PP7
PCIE_CLK_WLAN_REQ#_R AFTE14P-GP AFTP6118
CLKREQ_PCIE#1 18
DY AFTE14P-GP AFTP6119
1 CL_CLK_WLAN_R
1
R6123
2
DY 0R2J-2-GP
E51_RXD_R
E51_TXD_R
R6119
R6120
1
1
DY 2 0R2J-2-GP
2 0R2J-2-GP
E51_RXD 24 AFTE14P-GP AFTP6120
1
1
CL_DATA_WLAN_R
CL_RST_WLAN#_R
E51_TXD 24 AFTE14P-GP AFTP6121
E51_TXD_R R6122 1
DY 2 0R2J-2-GP 1 E51_RXD_R
AFTE14P-GP AFTP6113
DY
E51_RXD_R R6124 1 2 0R2J-2-GP 1 E51_TXD_R
AFTE14P-GP AFTP6114
06/05 E51_RXD_R & E51_TXD_R 此多多需如此此?

原原SIT因
10/8 84.00115.E1K EOL(原因有,SIV將
將將, 加加84.00015.01H) AFTE14P-GP AFTP6122
1 E51_RXD
1 E51_TXD
AFTE14P-GP AFTP6123
1 3D3V_WLAN
AFTE14P-GP AFTP6124
07/29 AFTP6124 Change to 3D3V_WLAN
A A
BOM1
Wistron Corporation
Title
NGFF_WLAN CONN
A2
Tesla SKL-U -1
5 4 3 2 1
A B C D E
4 4
3
(Blanking) 3
2 2
BOM1
1
Wistron Corporation 1
Title
RESERVED
A4
Tesla SKL-U -1
A B C D E
5 4 3 2 1
D D
C C
(Blanking)
B B
BOM1
A
Title
RESERVED
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
POWER BTN LED

84.2N702.J31
Power Button WHITE 2N7002K-2-GP
G PWRLED
R6413 PWRLED 24,66
LED1
5V_S5 1 2 PB_LED_PWR_1 A K PB_LED_PWR_2 D
910R2J-1-GP
KBC_PWRBTN# KBC_PWRBTN# 24 LED-W-45-GP S
TESLA 83.19213.H70 TESLA U6402

1
D 1st = 84.2N702.J31 D
1
KBC_PWRBTN# 1 AFTP6407 AFTE14P-GP
L6405 G6402 G6403
TESLA
MLVS0402M04-GP-U 10/14 R6413 510R Change to 910R 2nd = 84.2N702.W31
2
FLEX GAP-OPEN GAP-OPEN

2
PWBTN1
5
R6412
KBC_PWRBTN# 1 2 KBC_PWRBTN#_R 2 1
24 KBC_PWRBTN#
100R2J-2-GP
1 C6401
TESLA
2
SC1KP50V2KX-1GP 4 3
2
L6410 SW-TACT-124-GP
TESLA
6
MLVS0402M04-GP-U
69.80007.021
1
TESLA 62.40078.001
2nd = 62.40009.D71
TESLA
C C
FLEX360 Power Button FLEX360 POWER BTN LED

84.2N702.J31
NP2 08/14 PWRLED1 Change to LED2
5 2N7002K-2-GP
R6417
24 KBC_PWRBTN# 1 2 KBC_PWRBTN#_R3 4 2 G PWRLED 24,66
100R2J-2-GP LED2
FLEX 5V_S5 R6416 1 2 PWR_LED360_1 1A 2K PWR_LED360_2 D
3 1 330R2J-3-GP
1
LED-W-196-GP-U S
C6402 FLEX FLEX 083.00270.0B70
SC1KP50V2KX-1GP SW-TACT-72-GP-U3
FLEX FLEX U6404
2
NP1
62.40012.041 PWRSH1
FLEX 1st = 84.2N702.J31
2ND = 62.40007.291
2nd = 84.2N702.W31
08/14 PWRSWH1 Change to PWRSH1

10/14 PWRSH1 (Pin1,Pin3)KBC_PWRBTN#_R3 SWAP (PIN2,PIN4)GND
Test point
B
FLEX360 CHARGER LED LED3
5V_AUX_S5 B
U6403 3
-
ORG
2N7002KDW-GP R6415 1 5V_AUX_S5_R 1 R6411 2
4 3 DC_BATFULL#_Q 1 2 DC_BATFULL#_R 2 + WHITE 0R0402-PAD
510R2J-1-GP -
5 2 LED-OW-4-GP
24,66 DC_BATFULL CHARGE_LED 24,66
FLEX 83.01222.K70
6 1
CHARGE_LED
FLEX
84.2N702.A3F
2nd = 84.2N702.F3F 1KBC_PWRBTN#_R
1
2
AFTE14P-GP AFTP6410
RN6401
FLEX 08/14 BATTLED1 Change to LED3 1
SRN100KJ-6-GP AFTE14P-GP AFTP6409
R6414
CHARGE_LED#_Q 1 2 CHARGE_LED#_R
4
3
1KR2J-L2-GP
5V_AUX_S5
FLEX FLEX AFTE14P-GP AFTP6401
1
1 DC_BATFULL
AFTE14P-GP AFTP6402 1 CHARGE_LED
AFTE14P-GP AFTP6403
1 5V_S5
TP6404 1 PWRLED
AFTE14P-GP AFTP6405
1
AFTE14P-GP AFTP6406
A A
BOM1
Wistron Corporation
Title
LED Board&Power Button

A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Internal KeyBoard Connector

KROW[0..7] 24
KCOL[0..17] 24 3D3V_S0 TouchPad
SSID = Touch.Pad
3D3V_S0
KB50
KB40 32 1 R6502 2
28 30 NUM_LED_C RN6503 NUM_LED_C 1 0R0402-PAD
CAP_LED_C 1 29 NUM_LED_3V3 2 3 NUM_LED_3V3 1 AFTP6543 AFTE14P-GP
CAP_LED_C 26 CAP_LED_3V3 1 AFTP6541 AFTE14P-GP 28 CAP_LED_C 1 4 AFTP6542 AFTE14P-GP
CAP_LED_3V3 25 KCOL15 1 AFTP6540 AFTE14P-GP 27 CAP_LED_3V3 TouchPad
1
KCOL15 24 KCOL10 1 AFTP6501 AFTE14P-GP 26 KCOL17 1 SRN330J C6502 C6501
SCD1U16V2KX-L-GP
SCD1U10V2KX-4GP
KCOL10 KCOL11 AFTP6502 AFTE14P-GP KCOL16 AFTP6529 AFTE14P-GP
KCOL11
23
22 KCOL14
1
25
24 KCOL15
1
AFTP6530 AFTE14P-GP DY
2
KCOL14 21 KCOL13 1 AFTP6504 AFTE14P-GP 23 KCOL10
1
2
KCOL13 20 KCOL12 1 AFTP6505 AFTE14P-GP 22 KCOL11
D D
KCOL12 19 KCOL3 1 AFTP6506 AFTE14P-GP 21 KCOL14 RN6501 都如的
10/20 R6503, R6504 DY都
KCOL3 18 KCOL6 1 AFTP6507 AFTE14P-GP 20 KCOL13 SRN10KJ-5-GP
KCOL6 17 KCOL8 1 AFTP6508 AFTE14P-GP 19 KCOL12 CP1
KCOL8 16 KCOL7 1 AFTP6509 AFTE14P-GP 18 KCOL3 7
KCOL7 15 KCOL4 1 AFTP6510 AFTE14P-GP 17 KCOL6 1 R6503 2TP_SMB_DATA 1
13,18 PCH_SMBDATA
4
3
KCOL4 14 KCOL2 1 AFTP6511 AFTE14P-GP 16 KCOL8 KCOL3 EC6501 1 2SC100P50V2JN-3GP 0R0402-PAD
KCOL2 13 KROW0 1 AFTP6512 AFTE14P-GP 15 KCOL7 KCOL4 EC6502 1 2SC100P50V2JN-3GP 1 R6504 2TP_SMB_CLK 2
13,18 PCH_SMBCLK
KROW0 12 KCOL1 1 AFTP6513 AFTE14P-GP 14 KCOL4 KCOL6 EC6503 1 2SC100P50V2JN-3GP RN6502 0R0402-PAD 3
KCOL1 11 KCOL5 1 AFTP6514 AFTE14P-GP 13 KCOL2 KCOL7 EC6504 1 2SC100P50V2JN-3GP 24 TPDATA TPDATA 2 3 TP_DATA 4
KCOL5 10 KROW3 1 AFTP6515 AFTE14P-GP 12 KROW0 KCOL8 EC6505 1 2SC100P50V2JN-3GP 24 TPCLK TPCLK 1 4 TP_CLK 5
KROW3 9 KROW2 1 AFTP6516 AFTE14P-GP 11 KCOL1 6
KROW2 8 KCOL0 1 AFTP6517 AFTE14P-GP 10 KCOL5 SRN33J-5-GP-U 8
KCOL0 7 KROW5 1 AFTP6518 AFTE14P-GP 9 KROW3
KROW5 6 KROW4 1 AFTP6519 AFTE14P-GP 8 KROW2
PTWO-CON6-12-GP
1
KROW4 5 KCOL9 1 AFTP6520 AFTE14P-GP 7 KCOL0 C6506 C6505
SC100P50V2JN-3GP
SC100P50V2JN-3GP
KCOL9 KROW6 AFTP6521 AFTE14P-GP KROW5
KROW6
4
3 KROW7
1
6
5 KROW4
DY DY 20.K0382.006
2
KROW7 2 AFTP6523 AFTE14P-GP 4 KCOL9 2ND = 20.K0422.006
KROW1 1 3 KROW6
KROW1 1 AFTP6524 AFTE14P-GP 2 KROW7
1
AFTP6525 AFTE14P-GP KROW1
For EMC Recommend
27 1
31
PTWO-CON26-4-GP AFTP6501~AFTP6525
20.K0382.026 ACES-CON30-1-GP
CLOSE keyboard connector 20.K0320.030
2nd = 20.K0669.026 2nd = 20.K0593.030 Keyboard Backlight CN AFTE14P-GP AFTP6539 1TP_SMB_DATA
KB 14
KB 15 KBL1 AFTE14P-GP AFTP6538 1 TP_SMB_CLK Ref. SPEC:KGDFF0106A11B0 31A
5
1 KB_BL_LED-
SA469D-22H1_v1.0
2 KB_BL_LED-
AFTE14P-GP
AFTE14P-GP
AFTP6536
AFTP6537
1
1
TP_DATA
TP_CLK VCC=3.3V
U6501 U6502 3 KB_BL_LED+
G G 4 KB_BL_LED+
24 CAP_LED 24 NUM_LED
D CAP_LED_C D NUM_LED_C 6
1 TouchPad
S S ACES-CON4-50-GP AFTE14P-GP AFTP6533
2N7002K-2-GP 2N7002K-2-GP 1
84.2N702.J31 84.2N702.J31 20.K0722.004 AFTE14P-GP AFTP6532
2nd = 20.K0397.004
2nd = 84.2N702.W31 2nd = 84.2N702.W31 BK
KB 15
6/18 KBL1 KB_BL_LED+ 與 KBL1 KB_BL_LED- 互已
10/6 KBL1 add 2nd source
C C
KB_BKLT_PWM
24 KB_BKLT_PWM
U6503
G
D KB_BL_LED-
BK
S
2N7002K-2-GP
84.2N702.J31 U6203 Keyboard Backlight U6203&BLKB1:
2ND = 84.2N702.031
3rd = 84.2N702.W31
禁多 ) to 84.2N702.J31
07/02 Change Part Number 84.07002.I31(禁
5V_S0
1 R6525 2 KB_BL_LED+
0R0603-PAD
1 KB_BL_LED-
AFTE14P-GP AFTP6526
1 KB_BL_LED-
AFTE14P-GP AFTP6527 1 KB_BL_LED+
AFTE14P-GP AFTP6528 1 KB_BL_LED+
AFTE14P-GP AFTP6534
1 5V_S0
AFTE14P-GP AFTP6531
B B
A A
BOM1
Wistron Corporation
Title
Key Board&Touch Pad

A1
Tesla SKL-U -1
Date: Wednesday, July 22, 2015 Sheet 65 of 102
5 4 3 2 1
5 4 3 2 1
IO BD Device
Item Device
1 NOVO Button
2 Audio Jack
3 USB Card Reader
4 USB2.0 Port4
IOCN1
D 41 D
1 5V_AUX_S5 USB 2.0 Power SW

2
3 5V_S5
4 5V_S5
5 PWRLED 24,64
6 5V_USB3_S3
CHARGE_LED 24,64
7
8
DC_BATFULL 24,64
VOL_UP_BTN# 24
NOVO Button at least 80 mil
9 VOL_DOWN_BTN# 24 U6601
1
10 SCREEN_ROTATE_LOCK# 24 10/13 VOL_UP_BTN# 跟 VOL_DOWN_BTN# , net name 互已 at least 80 mil C6634
11 1 5 C6637
OUT IN SC47U6D3V5MX-1-GP SCD1U16V2KX-L-GP
12 2
2
GND
13 16 USB_OC2# 3 4
OC# EN
1
C6636 USB_PWR_EN 24,34,36
14 RING2 27,29
15
16 SLEEVE 27,29
Audio Jack SC47U6D3V5MX-1-GP G524B1T11U-GP
2
17 HP_DET# 27,29 074.00524.0B9F
18
HP_OUT_L 27,29
19
HP_OUT_R 27,29 2ND = 74.06288.07F
20
21
22
23
24
25
USB_CPU_PN2
USB_CPU_PP2
16
16
USB2.0 PORT3 U6301 place near to IOCN1
26 08/18 USB2.0 Port4 & USB3.0 Card Reader 因已PIN
27 USB30_RX_CPU_N4 16
28 USB30_RX_CPU_P4 16
29
USB3_4_TX4_N_C4
30
31 USB3_4_TX4_P_C4
C6630
C6631
1
1
2SCD1U16V2KX-L-GP
2SCD1U16V2KX-L-GP
USB30_TX_CPU_N4 16
USB30_TX_CPU_P4 16
USB3.0 CARD READER
32
33
34 3D3V_S0
35
36
37 5V_USB3_S3 C6633
38
1
SCD1U16V2KX-L-GP
C 39 C
40
1
C6632
2
42
SCD1U16V2KX-L-GP
2
ACES-CON40-10-GP
20.K0617.040
2nd = 20.K0568.040 ALC_AGND
Test point
USB_CPU_PP2 1 AFTP6619
USB_CPU_PN2 1 AFTP6620
KBC_NOVO_BTN# 1 AFTP6609
3D3V_S0 1 AFTP6617
5V_USB3_S3 1 AFTP6618 3D3V_S0
VOL_UP_BTN# 1 AFTP6621
VOL_DOWN_BTN#1 AFTP6622
2
1
SCREEN_ROTATE_LOCK# AFTP6623
1 DG
3D3V_AUX_S5 1 AFTP6624 RN6601
SRN2K2J-5-GP
DG Q6601
3
4
2N7002KDW-GP
B GS_SMBCLK_DB 1 6 B
SML1_SMBCLK 18,24,26,79,90
2 5
10/13 VOL_UP_BTN# 跟 VOL_DOWN_BTN# , net name 互已 3 4
GS_SMBDATA_DB
84.2N702.A3F
2nd = 84.DM601.03F
SML1_SMBDATA 18,24,26,79,90
Flex360 SENSOR BD 7/31 add Level Shift Circuit
3D3V_S0
Novo Button
1
SENCN1 C6635 3D3V_AUX_S5

11 AFTP6653 1 KBC_NOVO_BTN#_R
2
1 SCD1U16V2KX-L-GP
NOVO1 AFTP6654 1
2 1 NP1
3 R6630 NP2
4 KBC_NOVO_BTN# 1 2 KBC_NOVO_BTN#_R 2
LID_CLOSE# 24,55 24 KBC_NOVO_BTN#
5 LID_CLOSE2# 24 100R2J-2-GP 6
6 ISH_GP_1_R 20 3 7
7 GS_SMBDATA_DB
8 GS_SMBCLK_DB SW-TACT-3P-5-GP-U
1
9
SCD1U16V2KX-L-GP
10 L6629 EC6602
1
C6629 MLVS0402M04-GP-U
12
62.40009.G71
2
SC1KP50V2KX-1GP 69.80007.021
ACES-CON10-58-GP
Hall sensor
2
DY 1
A
020.F0311.0010 A
FLEX 06/12 Delete Hall Sensor CONN, 已7 pin 與SPK 訊訊訊訊多CONN, SPK1
Wistron Corporation
Title
IO Board Connector
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
RESERVED
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main Func = Debug
D D
Debug Connector
3D3V_S0
DB1
11
1
R6801 1
DY 0R2J-2-GP LPC_AD0_R
18,24 LPC_AD0 R6802 1
DY 2
0R2J-2-GP LPC_AD1_R
2
18,24 LPC_AD1 R6803 1
DY 2
0R2J-2-GP LPC_AD2_R
3
C
18,24 LPC_AD2 R6804 1
DY 2
0R2J-2-GP LPC_AD3_R
4 C
18,24 LPC_AD3 R6805 1

DY 2
0R2J-2-GP LPC_FRAME#_R
5
18,24 LPC_FRAME# 2 6
17,24,31,40,61,79 PLT_RST# 7
8
18 CLK_PCI_DB 9
10
12
ACES-CON10-1-GP-U1
20.F0714.010
DY
B B
BOM1
A
Title
Debug connector
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
SC Digital_G-sensor
The Slave ADdress (SAD) associated to the LIS3DH is 001100xb. SDO/SA0 pad can be
used to modify less significant bit of the device address. If SA0 pad is connected to voltage
supply, LSb is ‘1’ (address 0011001b) else if SA0 pad is connected to ground, LSb value is
‘0’ (address 0011000b). This solution permits to connect and address two different
accelerometers to the same I2C lines.
D D
3D3V_S0
10/07 Delete R201
3D3V_S0
DG DG
1
C7003 C7010
SC10U6D3V3MX-L-GP SCD1U16V2KX-L-GP
1
DY
R7010
10KR2J-3-GP
DG
Close to Pin14
16
15
14
2
U7002 10/23 Delete R204, Pin10 connect to GND
GS_SA0
ADC1
ADC2
VDD
1
1 VDD_IO ADC3 13 DG
R7011
2 NC#2 GND 12
3 11 I2C_GSENSE_INT_R 10KR2J-3-GP
SDA/SDI/SDO
GS_SMBCLK NC#3 INT1
4 SCL/SPC RES 10
5 9
SDO/SA0
2
GND INT2
C C
CS
07/07 RN7001 需如已已需都3.3K 10/04 Delete R206 & R207
LIS3DETR-GP
6
7
8
08/22 RN7001 已已已已已已已3.3K 74.00003.BB0
3D3V_S0 R7009
GS_SMBDATA 3D3V_S0 I2C_GSENSE_INT_R 1 2
0R0402-PAD ISH_GP_0_R 20
DY
GS_SA0
1
R7005
10KR2J-3-GP
R7007 R7006
1
1
3K3R2F-2-GP
3K3R2F-2-GP
2
DG 10/23 Delete R205, Pin8 connect to 3D3V_S0 directly
DG
DG Q7002
SC
2
2N7002KDW -GP 08/05 R7005 Change to DY

GS_SMBCLK 1 6 BAT_SCL 24,43,44
2
3
5
4
U6702 change to LIS3DETR-GP
GS_SMBDATA
84.2N702.A3F
B 2nd = 84.DM601.03F B
BAT_SDA 24,43,44
10/23 Delete R208, R209
A BOM1 A
Wistron Corporation
Title
G Sensor
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
BOM1
A A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
550mA
3V3_AON 1D05V_VGA_S0
SC4D7U6D3V3KX-L-GP
2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
R7601
3V3_AON
0R2J-2-GP OPS OPS OPS OPS OPS OPS OPS
1
R7602
DY
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
C7602 C7603 C7604 C7605 C7606 C7607 C7608
1
2 1 DGPU_PWROK_G
2
1
19,24,86 DGPU_PWROK GPU1A 1 OF 14
D 0R0402-PAD R7603 PCI_EXPRESS D
10KR2J-L-GP
OPS OPS AB6
2
NC#AB6
G
PEX_IOVDD
AA22 Under GPU Near GPU
18 CLKREQ_PEG#0
D 84.2N702.J31 79 VGA_RST# AC7
PEX_RST# PEX_IOVDD
AB23
2ND = 84.2N702.031 PEG_CLKREQ#_1 PEX_IOVDD
AC24
S AC6 AD25
PEX_CLKREQ# PEX_IOVDD
3rd = 84.2N702.W31 PEX_IOVDD
AE26 10uF(X5R) 22uF(X5R)
Q7601 18 PEG_CLK_CPU AE8 AE27
2N7002K-2-GP 18 PEG_CLK_CPU# AD8
PEX_REFCLK PEX_IOVDD M0805 ×4 M0805 ×4
PEX_REFCLK#
SCD1U16V2KX-L-GP 2 C7601 PEG_C_RXP0
16 PEG_RX_CPU_P0
SCD1U16V2KX-L-GP
OPS 1
2 C7609 PEG_C_RXN0
AC9
PEX_TX0
16 PEG_RX_CPU_N0 OPS 1 AB9
PEX_TX0#
16 PEG_TX_GPU_P0 AG6
PEX_RX0
16 PEG_TX_GPU_N0 AG7 AA10
PEX_RX0# PEX_IOVDDQ
AA12
SC4D7U6D3V3KX-L-GP
SCD1U16V2KX-L-GP PEG_C_RXP1 PEX_IOVDDQ
OPS 1 2 C7610 AB10 AA13
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
16 PEG_RX_CPU_P1 PEX_TX1 PEX_IOVDDQ
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SCD1U16V2KX-L-GP 2 C7611 PEG_C_RXN1
16 PEG_RX_CPU_N1 OPS 1 AC10
PEX_TX1# PEX_IOVDDQ
AA16
AA18
OPS OPS OPS OPS OPS OPS DY
1
PEX_IOVDDQ
16 PEG_TX_GPU_P1 AF7 AA19
PEX_RX1 PEX_IOVDDQ
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
AE7 AA20 C7612 C7613 C7614 C7618 C7619 C7615 C7616
16 PEG_TX_GPU_N1 PEX_RX1# PEX_IOVDDQ
AA21
2
SCD1U16V2KX-L-GP PEG_C_RXP2 PEX_IOVDDQ
16 PEG_RX_CPU_P2 OPS 1 2 C7617 AD11 AB22
SCD1U16V2KX-L-GP PEG_C_RXN2 PEX_TX2 PEX_IOVDDQ
16 PEG_RX_CPU_N2 OPS 1 2 C7620 AC11 AC23
PEX_TX2# PEX_IOVDDQ
AD24
PEX_IOVDDQ
16 PEG_TX_GPU_P2 AE9 AE25
PEX_RX2 PEX_IOVDDQ
16 PEG_TX_GPU_N2 AF9 AF26
PEX_RX2# PEX_IOVDDQ
AF27
PEG_C_RXP3 PEX_IOVDDQ
16 PEG_RX_CPU_P3
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
OPS 1 2 C7621
2 C7622 PEG_C_RXN3
AC12
PEX_TX3 Under GPU Near GPU
16 PEG_RX_CPU_N3 OPS 1 AB12
PEX_TX3#
AG9
Midway Between GPU and Power Supply
16 PEG_TX_GPU_P3 PEX_RX3
16 PEG_TX_GPU_N3 AG10
PEX_RX3# C7302 C7303 C7304 C7305 C7306 C7307 C7308 C7312 C7313 C7314 C7318 C7319 C7315 C7316
AB13
NC#AB13 N14x ASM ASM ASM ASM ASM ASM ASM ASM ASM ASM ASM ASM ASM ASM
AC13
NC#AC13
N15S-GM/GT ASM DY ASM ASM DY ASM DY DY DY DY DY DY DY DY
AF10
NC#AF10
C AE10 C
NC#AE10 3V3_AON
NC FOR GF119
AD14
NC#AD14 210mA
AC14 AA8
NC#AC14 PEX_PLL_HVDD
AA9
PEX_PLL_HVDD
AE12
SC4D7U6D3V3KX-L-GP
SC4D7U6D3V3KX-L-GP
NC#AE12
AF12
NC#AF12
AB8
NC FOR GM108
PEX_SVDD_3V3
AC15 OPS OPS OPS
1
NC#AC15
AB15
NC#AB15
SCD1U16V2KX-L-GP
C7623 C7624 C7625
AG12
2
NC#AG12
AG13
NC#AG13
AB16
NC#AB16
AC16
NC#AC16
AF13
AE13
NC#AF13 Near GPU
NC#AE13
100nF(X5R) 4.7uF(X5R)
AD17
AC17
NC#AD17 K0402 ×1 K0603 ×2
NC#AC17
AE15
NC#AE15
AF15
NC#AF15
AC18 F2
NC#AC18 VDD_SENSE NVVDD_SENSE 85
AB18
NC#AB18
AG15 F1
NC#AG15 GND_SENSE NVGND_SENSE 85
AG16
NC#AG16
AB19
NC#AB19
AC19
NC#AC19
AF16
NC#AF16
AE16
NC#AE16
AD20
NC#AD20
AC20
NC#AC20
B AE18 B
NC#AE18
AF18
NC#AF18
SB
NC FOR GF117/GK208/GM108
AC21
NC#AC21
AB21
NC#AB21 DY
AG18 AF22 PEX_TSTCLK_OUTR7604 1 2 200R2F-L-GP
NC#AG18 PEX_TSTCLK PEX_TSTCLK_OUT#
AG19 AE22
NC#AG19 PEX_TSTCLK#
150mA 1D05V_VGA_S0
AD23
NC#AD23 100nF(X7R) 1uF(X5R) 4.7uF(X5R)
AE23
NC#AE23 K0402 ×1 K0603 ×1 K0805 ×1
AF19 AA14 1D05V_PEX_PLLVDD 1 R7630 2
NC#AF19 PEX_PLLVDD 0R0603-PAD
AE19 AA15
NC#AE19 PEX_PLLVDD
SC4D7U25V5KX-L2-GP
OPS
2
AF24
NC#AF24 OPS
1
SCD1U16V2KX-L-GP
AE24 C7626 C7627
NC#AE24
SC1U10V2KX-L1-GP
C7628
OPS OPS
1
AE21
2
NC#AE21
AF21
NC#AF21 TESTMODE
AD9
TESTMODE
AG24
NC#AG24
AG25
NC#AG25
AG21
AG22
NC#AG21 Under GPU Near GPU
NC#AG22
AF25 PEX_TERMP
PEX_TERMP
OPS OPS
1
N15S-GT-S-A2-GP R7605 R7606

2K49R2F-2-L-GP 10KR2J-L-GP
GPU BOM CTRL

2
A A
BOM1
Wistron Corporation
Title
GPU(1/5) PEG
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
GPU1G 7 OF 14 GPU1H 8 OF 14
IFPAB IFPC
IFPC
AC4 T6 GF119/GK208
NC#AC4 NC#T6
AC3
NC#AC3
DVI/HDMI DP
AA6
NC#AA6
Y3 M7 I2CW_SDA N5
NC#Y3 NC#M7 NC#N5
Y4 N7 I2CW_SCL N4
NC#Y4 NC#N7 NC#N4
V7
NC#V7
D AA2 TXC N3 D
NC#AA2 NC#N3
W7 AA3 TXC N2
NC#W7 NC#AA3 NC#N2
TXD0 R3
NC#R3
NC FOR GF117/GM108
AA1 TXD0 R2
NC#AA1 NC#R2
AB1
NC#AB1
TXD1 R1
NC FOR GF117/GM108
NC#R1
TXD1 T1
NC#T1
NC FOR GF117/GM108
AA5
NC#AA5
AA4 TXD2 T3
NC#AA4 NC#T3
TXD2 T2
NC#T2
AB4
NC#AB4 GF117
NC FOR GF117/GM108
AB5
NC#AB5
P6 NC C3
NC#P6 GPIO15
W6 AB2
NC#W6 NC#AB2 N15S-GT-S-A2-GP
AB3
NC#AB3
Y6
NC#Y6
NC#AD2
AD2 GPU BOM CTRL
AD3
NC#AD3
AD1
NC#AD1
AE1
NC#AE1
GPU1I 9 OF 14
AD5 IFPD
NC#AD5
AD4
NC#AD4
GF119/GK208
U6
NC#U6
DVI/HDMI DP
GF117
NC B3 T7 I2CX_SDA P4
GPIO14 NC#T7 NC#P4
IFPAB R7
I2CX_SCL NC#P3
P3
N15S-GT-S-A2-GP NC#R7
TXC R5
NC#R5
TXC R4
C GPU BOM CTRL NC#R4
C
NC FOR GF117/GM108
TXD0 T5
NC#T5
NC FOR GF117/GM108
TXD0 T4
NC#T4
TXD1 U4
NC#U4
IFPD TXD1 NC#U3
U3
TXD2 V4
NC#V4
TXD2 V3
NC#V3
GF117
R6 NC D4
NC#R6 GPIO17
N15S-GT-S-A2-GP
GPU BOM CTRL
GPU1J 10 OF 14
IFPEF
GPU1K 11 OF 14 GF119/GK208
DACA
DVI-DL DVI-SL/HDMI DP
GF117/GM108 GF117 GM108/GK208 J3
I2CY_SDA I2CY_SDA NC#J3
W5 NC NC B7 I2CY_SCL I2CY_SCL J2
NC#W5 I2CA_SCL NC#J2
NC A7 J7
I2CA_SDA NC#J7
AE2 TSEN_VREF
NC#AE2
TXC TXC J1
NC#J1
AF2 NC NC AE3 TXC TXC K1
NC#AF2 NC#AE3 NC#K1
NC AE4 K7
NC#AE4 NC#K7
K3
TXD0 TXD0 NC#K3
K2
B TXD0 TXD0 NC#K2 B
NC AG3
NC#AG3
K6 TXD1 TXD1 M3
NC#K6 NC#M3
NC AF4 TXD1 TXD1 M2
NC#AF4 NC#M2
NC FOR GF117/GM108
NC AF3 M1
NC#AF3 TXD2 TXD2 NC#M1
N1
TXD2 TXD2 NC#N1
GM108
GK208
GF117 IFPE NC FOR GK208
N15S-GT-S-A2-GP
C2
GPU BOM CTRL HPD_E HPD_E GPIO18
NC FOR GF117/GK208/GM108
NC FOR GF117
H6
NC#H6
GF119/GK208
J6
NC#J6 DVI-DL DVI-SL/HDMI DP
I2CZ_SDA H4
NC#H4
I2CZ_SCL H3
NC#H3
TXC J5
NC#J5
TXC J4
NC#J4
TXD3 TXD0 K5
NC#K5
TXD3 TXD0 K4
NC#K4
TXD4 TXD1 L4
IFPF NC#L4
L3
NC FOR GF117/GM108
TXD4 TXD1
NC#L3
TXD5 TXD2 M5
NC#M5
TXD5 TXD2 M4
NC#M4
NC FOR GK208
HPD_F F7
GPIO19
A A
NC FOR GF117
N15S-GT-S-A2-GP
BOM1
GPU BOM CTRL
Wistron Corporation
Title
GPU (2/5) DIGITALOUT

A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
81,82 FBA_D[63..0]
GPU1B 2 OF 14
FBA
FBA_D0 E18 F3 FB_CLAMP
FBA_D0 NC FB_CLAMP
FBA_D1 F18
FBA_D2 FBA_D1
E16 GF119
FBA_D3 FBA_D2
F17
FBA_D3
1
FBA_D4 D20
FBA_D5 FBA_D4
D21
FBA_D6 FBA_D5 R7869
FBA_D7
F20
E21
FBA_D6 OPS 10KR2J-L-GP
FBA_D8 FBA_D7
E15
2
FBA_D9 FBA_D8
D15
FBA_D10 FBA_D9
F15
FBA_D11 FBA_D10
F13
FBA_D12 FBA_D11
C13
FBA_D13 FBA_D12
D B13 D
FBA_D14 FBA_D13
E13
FBA_D15 FBA_D14
D13
FBA_D16 FBA_D15
B15
FBA_D17 FBA_D16
C16
FBA_D18 FBA_D17
A13
FBA_D19 FBA_D18
A15
FBA_D20 FBA_D19
B18
FBA_D21 FBA_D20
A18
FBA_D22 FBA_D21
A19
FBA_D23 FBA_D22
C19
FBA_D24 FBA_D23
B24
FBA_D25 FBA_D24
C23
FBA_D26 FBA_D25
A25
FBA_D27 FBA_D26
A24
FBA_D28 FBA_D27
A21
FBA_D29 FBA_D28
B21
FBA_D30 FBA_D29
C20
FBA_D31 FBA_D30
C21
FBA_D32 FBA_D31
R22
FBA_D33 FBA_D32
R24 C27
FBA_D34 FBA_D33 FBA_CMD0 FBA_CS0L 81
T22 C26
FBA_D35 FBA_D34 FBA_CMD1
R23 E24
FBA_D36 FBA_D35 FBA_CMD2 FBA_ODTL 81
N25 F24
FBA_D37 FBA_D36 FBA_CMD3 FBA_CKEL 81
N26 D27
FBA_D38 FBA_D37 FBA_CMD4 FBA_A14 81,82
N23 D26
FBA_D39 FBA_D38 FBA_CMD5 FBA_RST 81,82
N24 F25
V23 F26
V22 F23
T23 G22
U22 G23
Y24 G24
AA24 F27
FBA_D46 FBA_D45 FBA_CMD12 FBA_BA0 81,82
Y22 G25
FBA_D47 FBA_D46 FBA_CMD13 FBA_WE# 81,82
AA23 G27
AD27 G26
FBA_D49 FBA_D48 FBA_CMD15 FBA_CAS# 81,82
AB25 M24
FBA_D50 FBA_D49 FBA_CMD16 FBA_CS0H 82
AD26 M23
AC25 K24
FBA_D52 FBA_D51 FBA_CMD18 FBA_ODTH 82
AA27 K23
FBA_D53 FBA_D52 FBA_CMD19 FBA_CKEH 82
AA26 M27
C W26 M26 C
Y25 M25
R26 K26
T25 K22
N27 J23
R27 J25
V26 J24
V27 K27
W27 K25
W25 J27
FBA_D63 FBA_CMD30 FBA_RAS# 81,82
J26
FBA_CMD31
81 FBA_DQM0 D19
FBA_DQM0
81 FBA_DQM1 D14
FBA_DQM1
81 FBA_DQM2 C17 GF117/GF119
FBA_DQM2
81 FBA_DQM3 C22 GK208
FBA_DQM3
82 FBA_DQM4 P24 1D35V_VGA_S0
FBA_DQM4
82 FBA_DQM5 W24 NC B19
FBA_DQM5 FBA_CMD32
82 FBA_DQM6 AA25
U25
FBA_DQM6
FBA_DEBUG0 F22 N15S_F22 R7818 1
DY 260D4R2F-GP
82 FBA_DQM7 FBA_DQM7 FBA_CMD34
FBA_DEBUG1 J22 N15S_J22 R7819 1 260D4R2F-GP
FBA_CMD35
E19
DY
81 FBA_DQS0 FBA_DQS_WP0
81 FBA_DQS1 C15
FBA_DQS_WP1
81 FBA_DQS2 B16 D24
FBA_DQS_WP2 FBA_CLK0 FBA_CLK0 81
81 FBA_DQS3 B22 D25
FBA_DQS_WP3 FBA_CLK0# FBA_CLK0# 81
82 FBA_DQS4 R25 N22
FBA_DQS_WP4 FBA_CLK1 FBA_CLK1 82
82 FBA_DQS5 W23 M22
FBA_DQS_WP5 FBA_CLK1# FBA_CLK1# 82
82 FBA_DQS6 AB26
FBA_DQS_WP6
82 FBA_DQS7 T26
FBA_DQS_WP7
81 FBA_DQS0# F19 D18

FBA_DQS_RN0 FBA_WCK01
81 FBA_DQS1# C14 C18
FBA_DQS_RN1 FBA_WCK01#
81 FBA_DQS2# A16 D17
81 FBA_DQS3# A22 D16
82 FBA_DQS4# P25
W22
T24
U24
97mA
82 FBA_DQS5# FBA_DQS_RN5 FBA_WCK45#
AB27 V24 1D05V_VGA_S0
82 FBA_DQS6# FBA_DQS_RN6 FBA_WCK67
82 FBA_DQS7# T27
V25 100nF(X7R)
B K0402 ×3 30ohm@100MHz ESR=0.01 OPS B
GF119 L7801
F16 FB_PLLA_DLLA_VDD 1 2
FB_PLL_AVDD
NC
P22 MPZ1608S300AT-GP
FB_PLL_AVDD
OPS
1
1
FB_PLLAVDD H22
FB_DLL_AVDD
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
C7823 C7824 C7825 C7826

SC22U6D3V5MX-L3-GP
GF117 OPS OPS OPS
2
22uF(X5R)
K0805 ×1
TP7801 FB_VREF_PROBE_GPU
1 D23
FB_VREF Under GPU
Near GPU
N15S-GT-S-A2-GP
GPU BOM CTRL
FBCLK Termination placed near each VRAM

Memory ODTx, CKEx and RST Termination
at board edge side
FBA_CKEH
FBA_ODTH
FBA_RST FBA_CLK1 FBA_CLK0
FBA_CKEL
FBA_ODTL
1
R7504 R7805
1
162R2F-GP 162R2F-GP
OPS OPS OPS OPS OPS
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
R7808 R7809 R7810 R7811 R7812 OPS OPS

2
FBA_CLK1# FBA_CLK0#
2
A A
Near VRAM 1,2 Near VRAM 1,2
BOM1
Wistron Corporation
Title
GPU (3/5) VRAM I/F

Custom
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
52mA
1D05V_VGA_S0
22uF(X5R) 100nF(X7R)
L7902 M0805 ×1 K0402 ×1
3V3_AON
1 2 PLLVDD
MPZ1608S300AT-GP
OPS
SC22U6D3V5MX-L3-GP
1
1
112mA
OPS OPS
SCD1U16V2KX-L-GP
C7902 C7903
1D05V_VGA_S0
OPS OPS OPS OPS
2
1
1
Near GPU
R7906
OPS
R7902
R7903
R7904
R7905
Under GPU
2K2R2J-2-GP
22uF(X5R) 4.7uF(X5R) 100nF(X7R)
100KR2J-4-GP 2
10KR2J-L-GP 2
10KR2J-L-GP 2
10KR2J-L-GP 2
2
M0805 ×1 K0603 ×1 K0402 ×2
180ohm@100MHz ESR=0.09
1 2 SP_VID_PLLVDD
L7901
SC4D7U6D3V3KX-L-GP
GPU1N 14 OF 14 BLM18PG181SN1D-GP
SC22U6D3V5MX-L3-GP
MISC1
OPS
1
D9 SMBC_THERM_NV
I2CS_SCL
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
D8 SMBD_THERM_NV C7904 C7905 C7906 C7907
I2CS_SDA
OPS OPS OPS OPS GPU1M 13 OF 14
2
A9 XTAL_PLL
I2CC_SCL B9
I2CC_SDA
L6 PLLVDD
M6 CORE_PLLVDD
E12 GF117 SP_PLLVDD
THERMDN
F12
NC I2CB_SCL
C9
C8
Near GPU Under GPU N6
VID_PLLVDD NC
THERMDP NC I2CB_SDA
GF119/GK208 GF117/GM108
07/10 GPIO0_GFX Net name change to GC6_FB_EN
TP7901 1 JTAG_TCK AE5
D TP7902 JTAG_TCK 50ohm TRACE
1 JTAG_TMS AD6 D
TP7903 1 JTAG_TDI AE6 JTAG_TMS R7920 1 DY 2 0R2J-L-GP VIDEO_CLK_XTAL_SS A10 C10 XTAL_OUTBUFF
TP7904 JTAG_TDI XTAL_SSIN XTAL_OUTBUFF
1 JTAG_TDO AF6
R7907 1 2 JTAG_TRST# AG4 JTAG_TDO C6 GC6_FB_EN
JTAG_TRST# GPIO0 B2 GPIO6_GFX C11 B10
10KR2J-L-GP GPIO1 XTAL_IN XTAL_OUT
D6
1
GPIO2 C7 N15S-GT-S-A2-GP
OPS GPIO3
1
F9 D7903 R7909
GPIO4 A3 R7908 10KR2J-L-GP
GK208
GPIO5
GPIO6
A4
3V3_MAIN_EN 86 VIDEO_THERM_ALERT#_D 1 3
VIDEO_THERM_ALERT# 20
10KR2J-L-GP GPU BOM CTRL OPS
B6 2
OPS
2
GM108 GPIO7 A6 THERM_OVER# R7910 1 2 0R0402-PAD VIDEO_THERM_OVERT#
OVERT
2
OVERT OVERT VGA_GPIO9 R7911
F8 1 2 0R0402-PAD VIDEO_THERM_ALERT#_D LBAS16LT1G-GP 1 2 27MHZ_OUT
GPIO9 C5 83.00016.P11 R7912 DY 1MR2J-L3-GP
1
GPIO10 E7 27MHZ_OUT_R
GPIO11
D7 PWR_LEVEL VGA_CORE_VID 85 OPS R7913
GPIO12 1K8R2F-GP
GPIO13
B4 VGA_CORE_PSI_R R7914 1 2 0R0402-PAD VGA_CORE_PSI 85 reserve circuit to EC & GPIO
3
X7901
OPS
2
GM108 GK208 GF117 GF119 27MHZ_IN
GPIO16 GPIO16 NC GPIO16
D5 Crystal 27MHz
GPIO20 GPIO20 NC E6
GPIO20
1
GPIO21 GPIO8 NC C4 GPU_PEX_RST_HOLD# MAIN HASONIC 82.30034.A61 78.18034.1FL
2
GPIO21 C7908 C7901
E9 SYS_PEX_RST_MON#_R R7947 1 0R2J-L-GP
2 SYS_PEX_RST_MON# SC18P50V2JN-1-GP SC18P50V2JN-1-GP
GPIO8 NC NC 2ND HARMONY 82.30034.351 78.18034.1FL
2
GPIO8
PWR_LEVEL A
D7906
KVIDEO_POWER_LIMIT#
OPS 82.30034.A61 OPS
N15S-GT-S-A2-GP GC6 VIDEO_POWER_LIMIT# 24
3V3_AON DY 1SS355-4-GP XTAL-27MHZ-137-GP
83.00355.D1F 2ND = 82.30034.351
GPU BOM CTRL R7949
2ND = 83.00355.G1F OPS
1 2
100KR2J-4-GP OPS OPS

Q7902
R7915
DY 1 2 VGA_RST#_G G
76 VGA_RST#
07/10 GPIO0_GFX Net name change to GC6_FB_EN
10KR2J-L-GP D PURE_HW_SHUTDOWN# 24,26,40
VIDEO_THERM_OVERT# S
1
3V3_AON 3D3V_S0 2N7002K-2-GP 86 GC6_FB_EN
C7910
3V3_AON
Check 3V3_MAIN or 3V3_AON SCD22U10V2KX-1GP 84.2N702.J31
1
2nd = 84.2N702.031 07/10 delete R7601(GPIO_FB_CLAMP)
DY R7924
1
3V3_AON
Check 3V3_MAIN or 3V3_AON GC6 10KR2J-3-GP
1
GC6 GC6
10KR2J-L-GP
R7919
2
10KR2J-L-GP
R7917
Q7903 OPS
2
2N7002KDW-GP
2
4
3
SMBC_THERM_NV 1 6 SML1_SMBCLK 18,24,26,66,90

RN7901
SRN4K7J-8-GP 2 5
GPIO6_GFX
OPS 18,24,26,66,90 SML1_SMBDATA 3 4 SMBD_THERM_NV 07/10 delete GC6 1.0 07/10 delete GC6 1.0 2ND = 83.00355.G1F
83.00355.D1F
1
2
SMBC_THERM_NV 84.2N702.A3F R7926 1 2 GPU_EVENT# 19

SMBD_THERM_NV 2nd = 84.DM601.03F 0R2J-L-GP D7905
GC6_FB_EN A K
GC6_FB_EN_PCH 20
GC6 GC6 1SS355-4-GP
3D3V_S0
GC6 2.0 R7951
1 2
R7928 1 DY 2 0R2J-L-GP 0R2J-L-GP
2
DY
10KR2J-L-GP
C7911
SCD1U16V2KX-3GP R7916 DY
1
DY OPS 07/10 add R7651

U7901
2
20 DGPU_HOLD_RST# 1 5
A VCC D7904
2 A K FB_CLAMP_TGL_REQ#_R
17,24,31,40,61,68 PLT_RST# B
3 4 R7930 1 2 0R0402-PAD SYS_PEX_RST_MON# GC6 1SS355-4-GP
GND Y
83.00355.D1F
SNLVC1G08DCKRG4-GP
R7952
Non GC6 2.0
0R0402-PAD
1 2 VGA_RST# 76 2ND = 83.00355.G1F
73.01G08.DHG
C 2nd = 73.01G08.FHG
3V3_AON
GPU (Dual Rank) VRAM Config: C
3rd = 73.7SZ08.DAH GPIO Description (DG-06803-001_v04_p.180_Tale 12-1)
1
D7902 GC6
R7927
GPU_PEX_RST_HOLD# 1 2K2R2J-2-GP
2
R7929 1 0R2J-L-GP
2 VGA_RST#_R 2
83.BA054.I81
DY
BAT54AW-1-GP GC6
R7937 1 0R2J-L-GP
2
1
DY OPS
100KR2J-4-GP
R7950
2
8/14 add 100K pull down
N15S-GT(GB2-64/GT840M)-->SB SKU2,3,4,5
3V3_AON
3V3_MAIN
VRAM BOM CTRL GPU1L 12 OF 14

MISC2
VRAM BOM CTRL VRAM BOM CTRL VRAM BOM CTRL VRAM BOM CTRL
1
VRAM BOM CTRL

1
VRAM BOM CTRL R7931 VRAM BOM CTRL E10 R7936 R7938 R7953
49K9R2F-L-GP R7932 R7933 R7935 R7934 F10 NC#E10 D12 2KR2F-L1-GP 10KR2F-L1-GP 4K99R2F-L-GP
10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP NC#F10 ROM_CS#
2
B12 ROM_SI
2
ROM_SI A12 ROM_SO

STRAP0 ROM_SO ROM_SCLK
D1 C12
STRAP1 D2 STRAP0 ROM_SCLK
STRAP2 STRAP1
E4 NC FOR
VRAM BOM CTRL VRAM BOM CTRL
1
STRAP3 E3 STRAP2
VRAM BOM CTRL STRAP4 D3 STRAP3
GM108
R7939
STRAP4 20KR2F-L3-GP R7940 R7941
VRAM BOM CTRL
1
4K99R2F-L-GP 4K99R2F-L-GP
VRAM BOM CTRL VRAM BOM CTRL
2
R7942 R7943 R7944 R7945 R7946 C1

10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP 20KR2F-L3-GP NC#C1 D11 VRAM BOM CTRL
BUFRST#
2
MULTI_STRAP_REF0_GND F6 D10
MULTI_STRAP_REF0_GND NC PGOOD
GF117
GK208 GF117 GF119
VRAM BOM CTRL
F4
MULTI_STRAP_REF1_GNDMLS_REF1 NC
GM108 GK208
GM108 R7639(20K) for VRAM Type option (Default: Hynix)
1
GPIO8
R7948
40K2R2F-GP
F5
MULTI_STRAP_REF2_GND NC
R7639(25K) for VRAM Type option (Micron)
2
N15S-GT-S-A2-GP
OPS
GPU BOM CTRL
N15S-GT
Device ID: 0X1290(TBC) 07/29 Before "N15V-GM:DY Other:Stuff", 都
都都OPS
都都這這這,
這 N16X 都
這都如如如如的的
NOTE: "N15V-GM" with Binary mode support, left Multi_Strap_Ref0_GND pin "NC";
All other N15x GPUs, connect Multi_Strap_Ref0_GND pin to GND per 40.2K resister
1D35V Compatible VRAM P/N List
B B
N15S-GT Micron
Vendor Vendor P/N Lenovo P/N 1 chip VRAM Size
N15S-GT Hynix SKU4, SKU5------>
256Mx16 256Mx16 1100897 512MB
NVIDIA MT41J256M16HA-093G:E 4GB (VRAM*8) Hynix H5TC4G63AFR-11C
H5TC4G63AFR-11C
TABLE Device ID 0X1140(TBC) Micron MT41J256M16HA-093G:E 1101018 512MB
Device ID 0X1140(TBC) SKU2, SKU3------>
ROM_SI(Depend on R7636 DY DY 2GB(VRAM*4)(VRAM1,2,5,6 ASM)
VRAM type) R7639 20Kohm 25Kohm
GC6 1.0/2.0 GPU Support List
ROM_SO R7637 DY DY
R7640 4.99Kohm 4.99Kohm
ROM_CLK R7638 DY DY
R7641 4.99Kohm 4.99Kohm GPU Config:

SKU1
STRAP0 R7631 50Kohm 50Kohm GPU UMA
SKU2 SKU3 SKU4 SKU5
DY N15S-GT
R7642 DY
071.0N15S.0C0U NA STUFF STUFF STUFF STUFF
DY
STRAP1 R7632 DY
R7643 DY DY
STRAP2 R7633 DY DY
DY
R7644 DY
STRAP3 R7635 DY DY
R7645 DY DY
STRAP4 R7634 DY DY
R7646 DY DY
NVVDD Boot Voltage 0.9V
A A
BOM1
Wistron Corporation
21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
Taipei Hs ien 221, Taiwan, R.O.C.
Title
GPU (4/5) GPIO/STRAP

Size Docum ent Num ber Rev
A0
Tesla SKL-U
Tues day, July 21, 2015
-1
Date: Sheet 79 of 102
5 4 3 2 1
5 4 3 2 1
VGA_CORE
10/16 GPU PN change to 071.GM108.000U
GPU1E 5 OF 14
NVVDD
K10
VDD
K12
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
VDD
K14
VDD
OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS K16
1
VDD
K18
VDD 6 OF 14
4.7uF(X5R) C8012 C8019 C8001 C8004 C8005 C8006 C8002 C8007 C8008 C8003 L11
VDD
GPU1F
L13 GND
K0603 ×10
2
VDD
L15 A2 M13
VDD GND GND
L17 AB17 M15
VDD GND GND
M10 AB20 M17
VDD GND GND
M12 AB24 N10
VDD GND GND
M14 AC2 N12
VDD GND GND
D Under GPU M16
M18
VDD
AC22
AC26
GND GND
N14
N16
D
VDD GND GND
N11 AC5 N18
VDD GND GND
N13 AC8 P11
VDD GND GND
Change to 78.47520.5BL for layout space SC N15 AD12 P13
SC4D7U6D3V3KX-GP
VDD GND GND
N17 AD13 P15
VDD GND GND
OPS OPS OPS OPS P10 A26 P17
1
VDD GND GND
P12 AD15 P2
VDD GND GND
SC4D7U25V5KX-L2-GP
SC4D7U25V5KX-L2-GP
SC4D7U25V5KX-L2-GP
4.7uF(X5R) C8009 C8036 C8018 C8035 P14
VDD
AD16
GND GND
P23
P16 AD18 P26
K0805 ×5
2
VDD GND GND
P18 AD19 P5
VDD GND GND
R11 AD21 R10
VDD GND GND
10/17 Delete C7712 R13
VDD
AD22
GND GND
R12
Near GPU R15
R17
VDD
AE11
AE14
GND GND
R14
R16
VDD GND GND
T10 AE17 R18
VDD GND GND
T12 AE20 T11
VDD GND GND
T14 AB11 T13
VDD GND GND
T16 AF1 T15
VDD GND GND
T18 AF11 T17
VDD GND GND
U11 AF14 U10
VDD GND GND
1uF(X5R) U13 AF17 U12
1
C8038 C8016 C8017 C8037 VDD GND GND
U15 AF20 U14
K0402 ×4 VDD GND GND
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
OPS OPS OPS OPS U17
V10
VDD
AF23
AF5
GND GND
U16
U18
2
VDD GND GND
V12 AF8 U2
VDD GND GND
V14 AG2 U23
VDD GND GND
8/15 Change 1uF 0603 to 0402 size V16
VDD
AG26
GND GND
U26
V18 AB14 U5
VDD GND GND
B1 V11
GND GND
Under GPU N15S-GT-S-A2-GP
B11
B14
GND GND
V13
V15
GND GND
B17 V17
GND GND
B20 Y2
GPU BOM CTRL B23
GND
GND
GND
GND
Y23
B27 Y26
SC22U6D3V5MX-2GP
GND GND
B5 Y5
GND GND
22uF(X5R) OPS 47uF(X5R) B8
GND
1
E11
M0805 ×1 C8034 M0805 ×1 E14
GND
GND
E17
2
GND
C E2 C
GND
E20
GND
E22
GND
E25
GND
E5
GND
E8
GND
Near GPU H2
H23
GND
GND
H25
GND
H5
GND
K11
GND
K13
GND
K15
GND
K17
GND
85mA L10
GND
3V3_MAIN L12
GND
L14
GND
0.1uF(X7R) 1uF(X5R) 4.7uF(X5R) L16
GND
L18
K0402 ×2 K0603 ×1 K0603 ×1 L2
GND
GND
L23
GND
L25
SC4D7U6D3V3KX-L-GP
GND
L5 AA7
GND GND
M11 AB7
GPU1D 4 OF 14 GND GND
OPS
1
1
C8022 FBVDDQ
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
C8020 C8021 C8023

OPS N15S-GT-S-A2-GP
OPS OPS B26
2
2
FBVDDQ
C25
FBVDDQ
E23
GPU1C 3 OF 14 E26
FBVDDQ
FBVDDQ
GPU BOM CTRL
XVDD/VDD33 F14
FBVDDQ
AD10 G8
Under GPU Near GPU F21
G13
FBVDDQ
NC#AD10 3V3_MAIN FBVDDQ
AD7 GM108 G9 G14
NC#AD7 3V3_MAIN FBVDDQ
3V3_AON 3V3_AON
G10 1uF(X5R) 4.7uF(X5R) 3V3_AON G15
FBVDDQ
3V3_AON G12 G16
3V3_AON K0603 ×1 K0603 ×1 G18
FBVDDQ
FBVDDQ
TP8004 1GPU_NC_F11 F11 G19
NC#F11 FBVDDQ
G20
FBVDDQ
V5 G21
SC4D7U6D3V3KX-L-GP
B FERMI_RSVD1 FBVDDQ B
V6 L22
FERMI_RSVD2 FBVDDQ
0.1uF(X7R) OPS L24
SC1U10V2KX-1GP
FBVDDQ
K0402 ×1 OPS L26
1
FBVDDQ
M21
FBVDDQ
SCD1U16V2KX-L-GP
C8024 C8025 C8026 N21

FBVDDQ
CONFIGURABLE
OPS R21
2
FBVDDQ
POWER CHANNELS T21
FBVDDQ
* nc on substrate V21
FBVDDQ
W21
FBVDDQ
G1
NC#G1
G2
NC#G2 GF117
G3
G4
NC#G3 Under GPU Near GPU GF119
NC#G4 GK208
G5
NC#G5
G6 H24 FBVDDQ
NC#G6 FBVDDQ_AON
G7 1D35V_VGA_S0 H26 FBVDDQ
NC#G7 FBVDDQ_AON
J21 FBVDDQ
FBVDDQ_AON
K21 FBVDDQ
FBVDDQ_AON
V1
NC#V1
V2
NC#V2
SC4D7U6D3V3KX-GP
W1 OPS OPS DY
1
1
NC#W1 SC4D7U6D3V2MX-GP-U
C8032 C8040
W2
NC#W2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C8027 C8028 C8029 C8030 C8031

W3
NC#W3 OPS
SC4D7U6D3V2MX-GP-U
W4 OPS
2
2
NC#W4
OPS OPS
N15S-GT-S-A2-GP
1D35V_VGA_S0
GPU BOM CTRL
0.1uF(X7R) 1uF(X7R) 4.7uF(X5R)

K0402 ×2 K0603 ×2 K0603 ×2 FB_CAL_PD_VDDQ OPS
Under GPU FB_CAL_VDDQ
D22 1
R8001
2
40D2R2F-GP
SC22U6D3V5MX-2GP
A FB_CAL_PU_GND A
C24
FB_CAL_GND
OPS
1
1
SC10U10V5KX-L1-GP
C8033 C8039 B25 FB_CAL_TERM_GND

FB_CAL_TERM
2
DY BOM1
N15S-GT-S-A2-GP
GPU BOM CTRL Wistron Corporation
1
OPS OPS
51D1R2F-GP
42D2R2F-GP
Near GPU R8002 R8003
22uF(X5R) 10uF(X5R)
Title
M0805 ×1 M0805 ×1
2
GPU (5/5) PWR/GND
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Data Bits 31:0 RANK 0

1D35V_VGA_S0
VRAM1
FBA_D[63..0] 78,82
B2 E3 FBA_D15
VDD DQL0 1D35V_VGA_S0
D9 F7 FBA_D13 VRAM2
VDD DQL1 FBA_D11 FBA_D[63..0] 78,82
G7 F2
VDD DQL2 FBA_D9 FBA_D20
K2 F8 B2 E3
VDD DQL3 FBA_D14 VDD DQL0 FBA_D19
K8 H3 D9 F7
N1 H8 G7 F2
N9 G2 K2 F8
R1 H7 K8 H3
D R9 D7 N1 H8 D
VDD DQU0 FBA_D1 VDD DQL5 FBA_D23
C3 N9 G2
DQU1 FBA_D6 VDD DQL6 FBA_D17
A1 C8 R1 H7
VDDQ DQU2 FBA_D3 VDD DQL7 FBA_D31
A8 C2 R9 D7
VDDQ DQU3 FBA_D4 VDD DQU0 FBA_D25
C1 A7 C3
VDDQ DQU4 FBA_D2 DQU1 FBA_D30
C9 A2 A1 C8
VDDQ DQU5 FBA_D7 VDDQ DQU2 FBA_D24
D2 B8 A8 C2
E9 A3 C1 A7
VDDQ DQU7 VDDQ DQU4 FBA_D26
F1 C9 A2
VDDQ VDDQ DQU5 FBA_D29
H2 F3 FBA_DQS1 78 D2 B8
VDDQ DQSL VDDQ DQU6 FBA_D27
H9 G3 FBA_DQS1# 78 E9 A3
VDDQ DQSL# VDDQ DQU7
F1
VDDQ
C7 FBA_DQS0 78 H2 F3 FBA_DQS2 78
FBA_VREF_0 DQSU VDDQ DQSL
H1 B7 FBA_DQS0# 78 H9 G3 FBA_DQS2# 78
VREFDQ DQSU# VDDQ DQSL#
M8
VRAM_CH_A_ZQ_1 VREFCA
L8 K1 FBA_ODTL 78 C7 FBA_DQS3 78
ZQ ODT FBA_VREF_0 DQSU
H1 B7
243R2F-2-GP
FBA_DQS3# 78
1
VREFDQ DQSU#
OPS 78,82 FBA_A0 N3
CS#
L2
T2
FBA_CS0L
FBA_RST
78
78,82 VRAM_CH_A_ZQ_2
M8
L8
VREFCA
K1 FBA_ODTL 78
R8101 A0 RESET# ZQ ODT
P7
243R2F-2-GP
78,82 FBA_A1
1
A1
78,82
78,82
FBA_A2
FBA_A3
P3
N2
A2 NC#J1
J1
J9
OPS 78,82 FBA_A0 N3
CS#
L2
T2
FBA_CS0L
FBA_RST
78
78,82
2
A3 NC#J9 R8105 A0 RESET#

78,82 FBA_A4 P8 L1 78,82 FBA_A1 P7
A4 NC#L1 A1
78,82 FBA_A5 P2 L9 78,82 FBA_A2 P3 J1
A5 NC#L9 A2 NC#J1
78,82 FBA_A6 R8 M7 78,82 FBA_A3 N2 J9
2
A6 NC#M7 A3 NC#J9
78,82 FBA_A7 R2 78,82 FBA_A4 P8 L1
A7 A4 NC#L1
78,82 FBA_A8 T8 78,82 FBA_A5 P2 L9
A8 A5 NC#L9
78,82 FBA_A9 R3 78,82 FBA_A6 R8 M7
A9 A6 NC#M7
78,82 FBA_A10 L7 78,82 FBA_A7 R2
A10/AP A7
78,82 FBA_A11 R7 A9 78,82 FBA_A8 T8
A11 VSS A8
78,82 FBA_A12 N7 B3 78,82 FBA_A9 R3
A12/BC# VSS A9
78,82 FBA_A13 T3 E1 78,82 FBA_A10 L7
A13 VSS A10/AP
78,82 FBA_A14 T7 G8 78,82 FBA_A11 R7 A9
A14 VSS A11 VSS
J2 78,82 FBA_A12 N7 B3
VSS A12/BC# VSS
J8 78,82 FBA_A13 T3 E1
VSS A13 VSS
78,82 FBA_BA0 M2 M1 78,82 FBA_A14 T7 G8
BA0 VSS A14 VSS
78,82 FBA_BA1 N8 M9 J2
BA1 VSS VSS
78,82 FBA_BA2 M3 P1 J8
BA2 VSS VSS
P9 78,82 FBA_BA0 M2 M1
VSS BA0 VSS
T1 78,82 FBA_BA1 N8 M9
VSS BA1 VSS
78 FBA_DQM1 E7 T9 78,82 FBA_BA2 M3 P1
DML VSS BA2 VSS
C 78 FBA_DQM0 D3 P9 C
DMU VSS
B1 T1
VSSQ VSS
B9 78 FBA_DQM2 E7 T9
VSSQ DML VSS
78 FBA_CLK0 J7 D1 78 FBA_DQM3 D3
CK VSSQ DMU
78 FBA_CLK0# K7 D8 B1
CK# VSSQ VSSQ
E2 B9
VSSQ VSSQ
78 FBA_CKEL K9 E8 78 FBA_CLK0 J7 D1
CKE VSSQ CK VSSQ
F9 78 FBA_CLK0# K7 D8
VSSQ CK# VSSQ
G1 E2
VSSQ VSSQ
78,82 FBA_WE# L3 G9 78 FBA_CKEL K9 E8
WE# VSSQ CKE VSSQ
78,82 FBA_CAS# K3 F9
CAS# VSSQ
78,82 FBA_RAS# J3 G1
RAS# VSSQ
78,82 FBA_WE# L3 G9
WE# VSSQ
78,82 FBA_CAS# K3
H5TC4G63AFR-11C-GP CAS#
78,82 FBA_RAS# J3
RAS#
72.05463.D0U H5TC4G63AFR-11C-GP
VRAM BOM CTRL 72.05463.D0U
10/23 VRAM1~VRAM8 都Part Number 72.05463.D0U VRAM BOM CTRL

1D35V_VGA_S0
0.1uF(X7R)
K0402 ×4
1D35V_VGA_S0
1
FC8101 FC8104
SC33P50V2JN-3GP
DY
1K33R2F-GP
1
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SC33P50V2JN-3GP
C8116 C8103 C8104

OPS
2
R8106
DY OPS OPS
OPS
10uF(X5R)
2
1.0uF(X7R) M0805 ×2
B FBA_VREF_0 B
SB RF K0603 ×8
1K33R2F-GP
SCD01U50V2KX-1GP
1
OPS OPS
1
SC10U10V5KX-L1-GP
SC10U10V5KX-L1-GP
C8115 C8114 R8107 C8113

DY OPS OPS OPS OPS DY DY OPS
1
2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
C8117 C8106 C8107 C8108 C8109 C8110 C8111 C8112

2
2
DY OPS
Close to VRAM(For VRAM1 & VRAM2)
08/18 C7801, C7804, C7805,C7810, C7811 Change to DY
08/18 C7814 Change to VRAM_8PCS
A A
BOM1
Wistron Corporation
Title
VRAM1,2 (1/4)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1

1D35V_VGA_S0
VRAM3
FBA_D[63..0] 78,81 1D35V_VGA_S0
D VRAM4 D
FBA_D36 FBA_D[63..0] 78,81
B2 E3
VDD DQL0 FBA_D33 FBA_D46
D9 F7 B2 E3
G7 F2 D9 F7
K2 F8 G7 F2
K8 H3 K2 F8
N1 H8 K8 H3
N9 G2 N1 H8
R1 H7 N9 G2
R9 D7 R1 H7
VDD DQU0 FBA_D52 VDD DQL7 FBA_D59
C3 R9 D7
DQU1 FBA_D51 VDD DQU0 FBA_D61
A1 C8 C3
VDDQ DQU2 FBA_D53 DQU1 FBA_D58
A8 C2 A1 C8
C1 A7 A8 C2
C9 A2 C1 A7
D2 B8 C9 A2
E9 A3 D2 B8
VDDQ DQU7 VDDQ DQU6 FBA_D60
F1 E9 A3
VDDQ VDDQ DQU7
H2 F3 FBA_DQS4 78 F1
VDDQ DQSL VDDQ
H9 G3 FBA_DQS4# 78 H2 F3 FBA_DQS5 78
VDDQ DQSL# VDDQ DQSL
H9 G3 FBA_DQS5# 78
VDDQ DQSL#
C7 FBA_DQS6 78
FBA_VREF_1 DQSU
H1 B7 FBA_DQS6# 78 C7 FBA_DQS7 78
VREFDQ DQSU# FBA_VREF_1 DQSU
M8 H1 B7 FBA_DQS7# 78
VRAM_CH_A_ZQ_3 VREFCA VREFDQ DQSU#
L8 K1 FBA_ODTH 78 M8
ZQ ODT VRAM_CH_A_ZQ_4 VREFCA
L8 K1
243R2F-2-GP
ZQ ODT FBA_ODTH 78
1
L2
243R2F-2-GP
FBA_CS0H 78
1
CS#
78,81 FBA_A0 N3 T2 FBA_RST 78,81 L2 FBA_CS0H 78
R8208 A0 RESET# CS#
78,81 FBA_A1 P7 78,81 FBA_A0 N3 T2 FBA_RST 78,81
A1 R8209 A0 RESET#
OPS 78,81 FBA_A2 P3
A2 NC#J1
J1 78,81 FBA_A1 P7
A1
78,81 FBA_A3 N2 J9
OPS 78,81 FBA_A2 P3 J1
2
A3 NC#J9 A2 NC#J1
78,81 FBA_A4 P8 L1 78,81 FBA_A3 N2 J9
2
A4 NC#L1 A3 NC#J9
78,81 FBA_A5 P2 L9 78,81 FBA_A4 P8 L1
A5 NC#L9 A4 NC#L1
78,81 FBA_A6 R8 M7 78,81 FBA_A5 P2 L9
A6 NC#M7 A5 NC#L9
78,81 FBA_A7 R2 78,81 FBA_A6 R8 M7
A7 A6 NC#M7
78,81 FBA_A8 T8 78,81 FBA_A7 R2
A8 A7
78,81 FBA_A9 R3 78,81 FBA_A8 T8
A9 A8
78,81 FBA_A10 L7 78,81 FBA_A9 R3
A10/AP A9
78,81 FBA_A11 R7 A9 78,81 FBA_A10 L7
A11 VSS A10/AP
78,81 FBA_A12 N7 B3 78,81 FBA_A11 R7 A9
A12/BC# VSS A11 VSS
78,81 FBA_A13 T3 E1 78,81 FBA_A12 N7 B3
A13 VSS A12/BC# VSS
C 78,81 FBA_A14 T7 G8 78,81 FBA_A13 T3 E1 C
A14 VSS A13 VSS
J2 78,81 FBA_A14 T7 G8
VSS A14 VSS
J8 J2
VSS VSS
78,81 FBA_BA0 M2 M1 J8
BA0 VSS VSS
78,81 FBA_BA1 N8 M9 78,81 FBA_BA0 M2 M1
BA1 VSS BA0 VSS
78,81 FBA_BA2 M3 P1 78,81 FBA_BA1 N8 M9
BA2 VSS BA1 VSS
P9 78,81 FBA_BA2 M3 P1
VSS BA2 VSS
T1 P9
VSS VSS
78 FBA_DQM4 E7 T9 T1
DML VSS VSS
78 FBA_DQM6 D3 78 FBA_DQM5 E7 T9
DMU DML VSS
B1 78 FBA_DQM7 D3
VSSQ DMU
B9 B1
VSSQ VSSQ
78 FBA_CLK1 J7 D1 B9
CK VSSQ VSSQ
78 FBA_CLK1# K7 D8 78 FBA_CLK1 J7 D1
CK# VSSQ CK VSSQ
E2 78 FBA_CLK1# K7 D8
VSSQ CK# VSSQ
78 FBA_CKEH K9 E8 E2
CKE VSSQ VSSQ
F9 78 FBA_CKEH K9 E8
VSSQ CKE VSSQ
G1 F9
VSSQ VSSQ
78,81 FBA_WE# L3 G9 G1
WE# VSSQ VSSQ
78,81 FBA_CAS# K3 78,81 FBA_WE# L3 G9
CAS# WE# VSSQ
78,81 FBA_RAS# J3 78,81 FBA_CAS# K3
RAS# CAS#
78,81 FBA_RAS# J3
RAS#
H5TC4G63AFR-11C-GP
H5TC4G63AFR-11C-GP
72.05463.D0U
72.05463.D0U
VRAM BOM CTRL 10/23 VRAM1~VRAM8 都Part Number 72.05463.D0U
VRAM BOM CTRL
1D35V_VGA_S0
0.1uF(X7R)
K0402 ×4
1D35V_VGA_S0
OPS OPS
1
FC8201
DY OPS
SC33P50V2JN-3GP
B B
DY
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
C8222 C8226 C8228 C8224
1K33R2F-GP
2
1
OPS
2
R8201
10uF(X5R)
2
1.0uF(X7R) M0805 ×2
SB RF K0603 ×8 FBA_VREF_1
1K33R2F-GP
SCD01U50V2KX-1GP
1
DY OPS OPS OPS OPS

SC10U10V5KX-L1-GP
SC10U10V5KX-L1-GP
1
C8231 C8230
OPS OPS DY OPS
1
R8202 C8201
OPS
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
C8214 C8215 C8217 C8216 C8227 C8225 C8223 C8229 2

2
OPS DY
Close to VRAM(For VRAM3 & VRAM4)
08/18 C7915, C7921, C7926 Change to DY
08/18 C7914, C7917, C7918, C7919 ,C7920, C7925 Change to VRAM_8PCS
A A
BOM1
Wistron Corporation
Title
VRAM3,4 (2/4)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
BOM1
Wistron Corporation
Title
VRAM5,6 (3/4)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
BOM1
Wistron Corporation
Title
VRAM7,8 (4/4)
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Main source 2nd source

12/17 Change back
084.06970.0037 84.03660.037 06/30 Change PU8202~PU8205 Main Source & 2nd Source
PU8202
PU8204
PWR_DCBATOUT_VGA_CORE1 SB
PU8203 084.06970.0037 84.03660.037
12/17 Change back
EC8227
12/17 Change back PU8205
1
SCD1U25V2KX-GP
SCD1U25V2KX-GP
PC8208 PC8209 PC8220 PC8214 PC8215
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
OPS OPS OPS
2
D PU8204 D
DCBATOUT PWR_DCBATOUT_VGA_CORE1 DCBATOUT PWR_DCBATOUT_VGA_CORE2 PU8202 2
2 3
PG8201 PG8204 3 1 4
1 2 1 2 1 4 10
10 9
GAP-CLOSE-PWR-6-GP
PG8202
GAP-CLOSE-PWR-6-GP
PG8205 5V_S0
9 7
OPS
7 8 6 OPS
1 2 1 2 8 6
5
5 OPS
1
GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP Design Current
1
PT8501 PG8203 PG8206 PR8223 FDMS3600-02-RJK0215-COLAY-GP

SE33U25VM-10-GP DY 1 2 1 2 2D2R3J-2-GP FDMS3600-02-RJK0215-COLAY-GP OPS Change to 084.06970.0037 VGA_CORE = 33.5 A
OPS OPS Change to 084.06970.0037 OCP< 67A
2
GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP Cyntec. 0.36uH 10*10*4
2
2nd = 84.03660.037 DCR=1.05mohm
PVCC 2nd = 84.03660.037 Idc=30A, Isat=60A PT8206 ESR=6mohm
1
PC8207 PL8201 OPS
PC8202
SCD1U16V2KX-3GP
2 PWR_VGA_CORE_TON_1
1 OPS 2
COIL-D36UH-6-GP
1 2
SE330U2VDM-L-GP
1 OPS
1
OPS 68.R3610.20X 79.33719.L01
PR8216
18
SCD1U25V2KX-GP
07/09 3V3_AON Change to 3V3_MAIN PU8201 2D2R5F-2-GP 2ND = 068.R3610.1001
DY
PVCC
ESR=6mohm
2
PR8202 PR8201 PWR_VGA_SNUB1 PT8208
DCBATOUT OPS
1 2 1 OPS 2 PWR_VGA_CORE_TON 9 TON UGATE1 2 PWR_VGA_CORE_UGATE1 OPS
1
2D2R2F-GP 499KR2F-1-GP PC8206
3V3_MAIN 1
PR8203
2OPS 13 1 PWR_VGA_CORE_BOOT11
PR8210
OPS
PC8211
2 PWR_VGA_CORE_BOOT1_1
1 2
SC330P50V2KX-3GP
DY
12/17 Change back 1 2
SE330U2VDM-L-GP
79.33719.L01
2
PGOOD BOOT1 0R3J-0-U-GP SCD1U50V3KX-L-GP
1KR2J-1-GP
PWR_VGA_CORE_EN 3 EN PHASE1 20 PWR_VGA_CORE_PHASE1
OPS
PWR_DCBATOUT_VGA_CORE2
SB PT8207
86 DGPU_PGOOD
OPS
1 2
PWR_VGA_CORE_PSI 4 19 PWR_VGA_CORE_LGATE1 SE330U2VDM-L-GP
PSI LGATE1
C 79.33719.L01 C
79 VGA_CORE_VID 1 PR8207 2 1 PR8224 2 EC8228
1
ESR=6mohm
SCD1U25V2KX-GP
0R0402-PAD OPS
SB PU8205 PC8212 PC8213 PC8221 PC8210 PC8224
2
SCD1U25V2KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
PC8203 7K5R2F-1-GP PU8203
DY 1 2 PWR_VGA_CORE_VID 5 14 PWR_VGA_CORE_UGATE2 2
2
3
OPS OPS OPS
2
SC1KP25V2JX-GP VID UGATE2
3 1 4
1
PC8201 PR8211 1 4 10
PWR_VGA_CORE_RGND PWR_VGA_CORE_VREF PWR_VGA_CORE_BOOT2 1
1 DY 2
SCD1U10V2KX-4GP
8 VREF BOOT2 15 OPS 2
0R3J-0-U-GP
10 9
PWR_VGA_CORE_BOOT2_1
9 7
7 8 6
1
PR8206 PWR_VGA_CORE_REFIN 7 16 PWR_VGA_CORE_PHASE2 8 6 5

REFIN PHASE2
GPU BOM CTRL 5
OPS
20KR2F-L3-GP
PWR_VGA_CORE_REFADJ PWR_VGA_CORE_LGATE2 OPS
R2 6
REFADJ LGATE2
17 FDMS3600-02-RJK0215-COLAY-GP
OPS
1
PR8222 FDMS3600-02-RJK0215-COLAY-GP OPS Change to 084.06970.0037

2
AFTP8201
Cyntec. 0.36uH 10*10*4
VGA_VREF_R
OPS Change to 084.06970.0037

GPU BOM CTRL 20KR2F-L3-GP PWR_VGA_CORE_SS 11 12 PWR_VGA_CORE_VSNS 1
SS VSNS DCR=1.05mohm
2nd = 84.03660.037
PR8208 Idc=30A, Isat=60A
1
2nd = 84.03660.037
2
PWR_VGA_CORE_RGND AFTE14P-GP
GPU BOM CTRL 1 2 R1 PC8205 21
GND RGND
10 PL8202
2KR2F-3-GP SC1KP25V2JX-GP 1 OPS 2
2
1
R3 DY PC8216 COIL-D36UH-6-GP
SCD1U50V3KX-L-GP
68.R3610.20X
1
RT8812AGQW-GP
OPS
2
1
PR8215 2ND = 068.R3610.1001

PC8223
OPS 3V3_AON 2D2R5F-2-GP
SC2700P50V2KX-1-GP 74.08812.073 DY
2
2
1
PWR_VGA_CORE_RGND PWR_VGA_SNUB2
GPU BOM CTRL PR8258 VGA_CORE Nvidia GPU Vreg Strap Table & P/N:
1
R4 10KR2J-3-GP PC8218
1
PR8209
OPS SC330P50V2KX-3GP
DY
Nvidia GPU Vreg Strap Table & P/N
2
1
18KR2F-GP
GPU BOM CTRL
79 VGA_CORE_PSI 1 PR8257 2 PWR_VGA_CORE_PSI PR8212 GPU N15V-GM N15S-GT
0R0402-PAD 100R2F-L1-GP-U
Vreg Mode Config D Config B
2
PC8204
OPS
1
SCD01U16V2KX-3GP
R1(PR8222) 64.27025.6DL 64.20025.L0L
PWR_VGA_CORE_R4R5
B B
2
2
SCD1U25V2KX-GP
PC8226 PR8259
DY
2
1
PR8204
DY 10KR2J-3-GP PR8221 1 2 0R0402-PAD
NVVDD_SENSE 76 R2(PR8206) 64.75015.6DL 64.20025.L0L
PWR_VGA_CORE_RGND
DY
1
1
GPU BOM CTRL 0R2J-2-GP
R3(PR8208) 63.R0034.1DL 64.20015.6DL
2
1
R5 PC8219
DY PC8222
SC47P50V2GN-GP
R4(PR8209) 64.62015.6DL 64.18025.6DL
2
2
SC47P50V2GN-GP
OPS
2
R5(PR8204) 64.17415.6DL 63.R0034.1DL
PWR_VGA_CORE_RGND
PR8220 1 2 0R0402-PAD
NVGND_SENSE 76
C(PC8223) 78.56222.2FL 78.27224.2FL
1
PC8217 PR8213
DY SC47P50V2GN-GP 100R2F-L1-GP-U
2
OPS
2
08/07 N16S-GT & N16V-GM 都都Config B 0.9V
07/09 3V3_AON Change to 3V3_MAIN
3V3_MAIN
PR8256
1 2 PWR_VGA_CORE_EN
6K8R2J-GP PWR_VGA_CORE_EN 86
OPS PC8225
1
PR8260
SCD22U10V2KX-L1-GP
86 DGPU_PWR_EN 1 DY 2
0R3J-0-U-GP DY
2
A
SD A
BOM1
Wistron Corporation
Title
GPU CORE
Custom
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
1D35V_S3 5V_S5 1D0V_S5
Discharge 3V3_MAIN 3V3_AON 3V3_MAIN 0.3A

3D3V_S0 3V3_MAIN AFTE14P-GP
3V3_MAIN 1 AFTP8301
1
R8318 1 R8302 2
C4009
1
SCD1U16V2KX-3GP
100R3F-1-GP 0R0603-PAD C8307
3D3V_S0 Q8302
SC1U10V2KX-L1-GP
AO3413L-GP
DY
GC6
2
S D
DY 1D05V_VGA_S0
3V3_MAIN_DISCHARGE
U8305
GC6
1
PG8317
G
R8317 84.03413.B31 1 8 1D05V_VGA_OUT2 1 2
10KR2F-L1-GP IN#1 OUT#8
D GC6 2
IN#2 OUT#7
7
D
2ND = 84.00048.031 R4029 3 6 GAP-CLOSE-PWR-6-GP
DGPU_PWROK_R 1V_DGPU_EN_R VBIAS OUT#6
1 2 4 5
2
ON GND
1
C8331
SCD1U10V2KX-L1-GP
0R0402-PAD PG8318
DY IN#9
9 EMI Request 1 2
2
1D0V_S5
SB
D
AOZ1335DI-GP GAP-CLOSE-PWR-6-GP
Q8308 074.01335.0093
GC6
1Q8715_GATE
2
2N7002K-2-GP 2ND = 074.08939.0093
2
PG8319
84.2N702.J31 C8302 R8307 1 2
GC6 SCD1U16V2KX-L-GP 100KR2J-4-GP OPS
EC8301
EC8302
EC8303
GAP-CLOSE-PWR-6-GP
GC6
1
2nd = 84.2N702.031 FC8305 C8328
SC33P50V2JN-3GP
S
G
SC22U6D3V3MX-1-GP
SCD1U16V2KX-L-GP
R8310 C8327
Q8309 Q8308_EN 100R2F-L3-GP DY DY
GC6
2
1
FC8302
3 OPS
SC33P50V2JN-3GP
OPS
2
3V3_MAIN_EN 1 R1
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
2
2
2
1
1
R2 C8324 C8305
Q8715_GATE_1
SC22U6D3V3MX-1-GP
SC1U10V2KX-L1-GP
LTC024EUB-FS8-GP
DY
84.00024.A1K
2
2ND = 84.00124.H1K DY
GC6
Q8715_GATE_2
1
R8314
10KR2F-L1-GP DY DY DY
Discharge VGA_CORE GC6
2
VGA_CORE
R8335
D
GPU_1D05V_PG 1 2
Q8305
2N7002K-2-GP 0R0402-PAD
3V3_AON 3V3_AON
84.2N702.J31
1
3D3V_S0 R8330
R8329 GC6
2
24R2J-GP 100R2F-L3-GP
C C
DY OPS 2nd = 84.2N702.031 R8332
S
G
1
0R2J-L-GP
2
R8353 R8352
DY
1
10KR2F-L1-GP 10KR2F-L1-GP
VGA_CORE_R
1
R8320
OPS 10KR2F-L1-GP 79 3V3_MAIN_EN GC6 Non GC6 Non GC6
2
0R2J-L-GP
GPU_1D05V_PG
R8334
2
D8305
1 2 GPU_1D05V_PG_R 2
85 DGPU_PGOOD
R8313
3 1D35V_EN 1 2 1D35V_EN_R
D
D
Q8311 1 0R0402-PAD Q8318
79 GC6_FB_EN
1
2N7002K-2-GP 2N7002K-2-GP
DAN222MGT2L-GP C8332
84.2N702.J31 SCD1U16V2KX-L-GP 84.2N702.J31
83.00222.H1R
2
OPS GC6 2ND = 84.2N702.031
DY
2nd = 84.2N702.031 Non GC6
S
S
G
G
1
3V3_AON 10/21 R8334, R8332, R8335 都都都 Non GC6, 因都因因因因 GC6,
Q8310 Q8719_EN R8326
所所所所所所所 , 因 GC6 所這這這這這這這這都 100KR2J-4-GP
R1
3 GC6 1D05V_VGA_S0 1D05V_C
1
85 PWR_VGA_CORE_EN 2
2
1
R2 2K2R2J-2-GP NOTICE:ZZ.T3904.C1101
C
LTC024EUB-FS8-GP R8349
84.00024.A1K D8304 OPS 1KR2F-3-GP 1 2 1D05V_B B Q8320
R8350 MMBT3904-4-GP
2ND = 84.00124.H1K FBVDD_PGOOD 1 10/14 R8332 原原這這都 Non GC6, 都都 DY, 因都 Sequence因
因有有, Non GC6 Non GC6
E
2
多多多多多多 1D05V_VGA_S0來
來來來 1D35V_EN 84.T3904.C11
1
OPS 3 DGPU_PWROK 19,24,76 如如如如 GC6這
(如這的的 ,如
如的這這如上上上 ,多
多多多多多多 FOR Non GC6這
這) C8319 2ND = 84.03904.E11
2 SCD1U16V2KX-L-GP 3rd = 84.03904.T11
85 DGPU_PGOOD
2
OPS Non GC6
LBAW56LT1G-GP 1D35V_VGA_S0
3V3_AON 3V3_AON
83.00056.Y11 3D3V_S0 to 3V3_AON
1D05V_VTT to 1D05V_VGA_S0 10/14 多多多多多多 1D05V_VGA_S0來
來來來 1D35V_EN
SC47U6D3V5MX-1-GP
B 如如如如 GC6這
(如這的的 ,如
如的這這如上上上 ,多
多多多多多多 FOR Non GC6這
這) B
SC10U10V5KX-L1-GP
SC10U10V5KX-L1-GP
1
SCD1U16V2KX-L-GP
C8310 C8312
1
R8347 R8346
5V_S0
C8311 10/21 R8350, C8319, Q8320, Q8318, R8353, R8352 Change to DY
10KR2F-L1-GP 10KR2F-L1-GP C8309
U8303 DY 原原都 Non GC6)
(原
OPS OPS
2
OPS OPS DY
2
1D35V_S3 4 13
FBVDD_PGOOD VBIAS OUT1#13
14
OUT1#14 CT1
12
CT1
1 IN1#1
2 8 PG8316 3V3_AON
3D3V_S0 1D35V_EN_R IN1#2 OUT2#8 3D3V_VGA_OUT1
3 9 1 2
D
EN1 OUT2#9
1
C8304 10 CT2
Q8316 SC10U6D3V3MX-GP CT2
GAP-CLOSE-PWR-6-GP
2N7002K-2-GP OPS 6 IN2#6
2
1
7 11 C8329 C8330 C8325
84.2N702.J31 IN2#7 GND
SC330P50V2KX-3GP
SC330P50V2KX-3GP
SC22U6D3V3MX-1-GP
DGPU_PWR_EN C8326
5 EN2 GND 15 DY DY DY
1
2ND = 84.2N702.031 FC8304 SCD1U16V2KX-L-GP

SC33P50V2JN-3GP
2
OPS DY G5016KD1U-GP OPS
S
G
1
074.05016.0093 FC8303
SC33P50V2JN-3GP
1
1
C8308 C8306
1D35V_VGA_S0
SC22U6D3V3MX-1-GP
SC1U10V2KX-L1-GP
FBVDD_PG_G 2ND = 074.22966.0093

DY OPS
2
DY
2
2K2R2J-2-GP NOTICE:ZZ.T3904.C1101
OPS
C
1 2 FBVDD_PG_B B Q8317
R8348 MMBT3904-4-GP
OPS OPS
E
84.T3904.C11
1
C8318 2ND = 84.03904.E11

SCD1U16V2KX-L-GP 3rd = 84.03904.T11
2
OPS
3D3V_S0
3V3_MAIN
1
A A
R8336
1
20KR2F-L-GP
Q8315 OPS R8333
R8337 1 2 DGPU_PWR_EN_R G OPS 10KR2J-3-GP
2
20 DGPU_PWR_EN# 0R0402-PAD
D DGPU_PWR_EN OPS
2
DGPU_PWR_EN 85 BOM1
1
C8316 S DGPU_PWROK_R
1
SC1KP50V2KX-L-1-GP
DY 2N7002K-2-GP C8317 Wistron Corporation

2
84.2N702.J31 SCD47U25V3KX-1GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

2
2ND = 84.2N702.031 C8323

OPS SCD22U10V2KX-L1-GP Title
2
OPS
GPU Discrete Power
7/31 C8317 Change part number to 78.47422.5BL(0402 to 0603) Size Document Number Rev
Custom
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
Structure boss H12 H13 H18

HOLE237X189R103-S-GP HOLE237R158-GP HOLE237R158-GP
H9
H6 H8
HOLET237B315X315R91-S-GP-U2
HOLET315B315X315R237-S-1-GP HOLET315B315X315R237-S-1-GP ZZ.SCREW.I21
ZZ.0HOLE.011 ZZ.0HOLE.011
ZZ.SCREW.H21 ZZ.SCREW.H21 ZZ.00PAD.591
1
1
1
07/29 H3 Change to OPS
GPU
D
Stand off CPU H1
STF237R128H42-GP
H2
STF237R128H42-GP
H4
STF237R128H42-GP
H3
STF237R128H42-GP
H5
STF237R128H42-GP
D
H14
STF236R128H88-GP
OPS OPS
34.4GD01.101 34.4GD01.101 34.4GD01.101 34.4GD01.101 34.4GD01.101
1
34.4LY03.001 1ST = 34.4WZ01.001 1ST = 34.4WZ01.001 1ST = 34.4WZ01.001 1st = 34.4WZ01.001 1st = 34.4WZ01.001
1
1st = 34.4LY03.201 2nd = 34.4WZ01.101 2nd = 34.4WZ01.101 2nd = 34.4WZ01.101 2nd = 34.4WZ01.1012nd = 34.4WZ01.101
CLP12 CLP13
CLP2 CLP3 CLP6 CLP7 CLP9 CLP5 CLP8 CLP10 CLP11 SPRING-166-GP SPRING-166-GP
SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP
34.41L50.001 34.41L50.001
34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001
1
1
1
Clip change to 434.03N0G.0001
VCC_CORE 1D35V_S3
C DCBATOUT C
DCBATOUT
1
1
EC8607 RFC8911 RFC8912 RFC8913 RFC8914 RFC8915 RFC8920 RFC8916 RFC8917 RFC8918 RFC8919 RFC8921 RFC8922
SCD1U50V3KX-L-GP
SCD1U50V3KX-L-GP
SCD1U50V3KX-L-GP
EC8601 EC8602 EC8603 EC8604 EC8605 EC8606 EC8609 EC8610 EC8611
1
SCD1U25V2KX-L-GP
SC1U50V5ZY-1-GP-U
SC1U50V5ZY-1-GP-U
SC1U50V5ZY-1-GP-U
SC1U50V5ZY-1-GP-U
SC1U50V5ZY-1-GP-U
SC1U50V5ZY-1-GP-U
2
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
2
2
DY DY DY DY DY DY DY DY DY DY DY DY
3D3V_S5 5V_S5 3D3V_S0 VGA_CORE +VCCGT 5V_S0 1D0V_S5 +VCCSA

1
1
C8601
EC8615 EC8907 EC8908

1
1
SC1U25V3KX-L-GP
SC1U25V3KX-L-GP
SC1U10V2KX-1GP
SC1U25V3KX-L-GP
SC1U25V3KX-L-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC1U25V3KX-L-GP
SC1U25V3KX-L-GP
EC8612 EC8613 EC8614 EC8616 EC8617 EC8901 EC8902 EC8903 EC8904 EC8905 EC8906 EC8909 EC8910 RFC8927 RFC8923 RFC8924 RFC8925 RFC8926 RFC8928
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
2
1
DY DY DY DY DY DY
2
2
B B
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
2
2
DY DY DY DY DY DY
1D35V_VGA_S0
RFC8935 RFC8931 RFC8933 RFC8932 RFC8934 RFC8929 RFC8930

1
1
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
2
DY DY DY DY DY DY DY
A A
BOM1
Wistron Corporation
Title
UNUSED PARTS/EMI Capacitors

A2
Tesla SKL-U -1
Date: Thursday, August 13, 2015 Sheet 89 of 102
5 4 3 2 1
5 4 3 2 1
3D3V_S0
NFC_IRQ
2
1
1
R4019 RN9001
NFC ROM
DY 100KR2J-1-GP SRN2K2J-5-GP
Q9001
3
4
D 2N7002KDW -GP D
NCT_CLK 1 6
5V_S0 SML1_SMBCLK 18,24,26,66,79
NFC ROM
2 5
3D3V_S0
3D3V_S0 3 4
1
R9009 84.2N702.A3F
1
Power consumption : Max 3mW 0R0402-PAD NCT_DATA 2nd = 84.DM601.03F
1
R9008
0R0402-PAD R9010
SML1_SMBDATA 18,24,26,66,79
2
0R2J-2-GP
NFC ROM
2
NFC1
1
17 C9001
15 SCD1U16V2KX-L-GP
14 NFC ROM
2
13
12
11 NFC_REQ 20 NFCROM_VDD
NFC 10
9
NFC_RST 16 U9001
8 PCH_SML0_CLK 18 1 A0 VCC 8
7 PCH_SML0_DATA 18 2 A1 WP 7
6 3 6 NCT_CLK
A2 SCL NCT_DATA
5 NFC_IRQ 16 VCC_BOOST 4 VSS SDA 5
C 4 C
3
2 CAT24C64YI-GT3-GP
NFC_VBAT
72.24C64.D0Q
1
16
NFC ROM
ACES-CON15-19-GP-U
020.K0112.0015
NFC Module Pin Define
1 NFC_VBAT
AFTP9001 AFTE14P-GP 1 PCH_SML0_DATA
AFTP9002 AFTE14P-GP 1 PCH_SML0_CLK
AFTP9003 AFTE14P-GP 1 NFC_IRQ
B AFTP9004 AFTE14P-GP NFC_RST B
1
AFTP9005 AFTE14P-GP 1 NFC_REQ
AFTP9006 AFTE14P-GP 1 GND
AFTP9007 AFTE14P-GP
A BOM1 A
Wistron Corporation
Title
NFC
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A BOM1 A
Wistron Corporation
Title
TPM
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
SSID = Finger Print
D D
C
Reserved C
B B
BOM1
A
Title
Reserved
A4
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
1 TP9911
16 XDP_PREQ# TPAD14-OP-GP
16 XDP_PRDY# 1 TP9901
TPAD14-OP-GP
1 TP9915
6 CFG3 TPAD14-OP-GP
1 TP9938
6 ITP_PMODE TPAD14-OP-GP
1 TP9904
TPAD14-OP-GP
4 PROC_TCK 1 TP9902
TPAD14-OP-GP
1 TP9908
TPAD14-OP-GP
4 PROC_TDI 1 TP9903
TPAD14-OP-GP
1 TP9937
TPAD14-OP-GP
4 PROC_TMS 1 TP9905
TPAD14-OP-GP
1 TP9939
TPAD14-OP-GP
4 PROC_TRST# 1 TP9906
TPAD14-OP-GP
1 TP9940
TPAD14-OP-GP
1 TP9936
4 PCH_JTAG_TDO TPAD14-OP-GP
4 PCH_JTAG_TCK 1 TP9907
TPAD14-OP-GP
C C
B B
A A
BOM1
Wistron Corporation
Title
Reserved
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
BOM1
Wistron Corporation
Title
Reserved
A2
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A BOM1 A
Wistron Corporation
Title
Reserved
A3
Tesla SKL-U -1
5 4 3 2 1
5 4 3 2 1
SKL-U/Y Timing Diagram for G3 to S0/M0 [Non Deep Sx Platform]

[#543016 Rev0.9]
(DC mode) Red Words: Controlled by EC GPIO Skylake POWER UP SEQUENCE DIAGRAM
Red: Power Rail
+RTC_VCC t01 >9ms
Orange: Output from KBC
1D0V_S5 5V_S5
RTC_RST# Light Blue: Output from CPU
DCBATOUT
Vin VDD
3D3V_AUX_S5 DC AON7403
BT+ Page43
Battery EN SW +V1.00U_CPU(VCCST)
a Page43 Page43
Sense the power button status Press Power button
Platform to KBC PSL_IN2 SLG59M1470VTR
KBC_PWRBTN# c Page40
PSL_OUT#(GPIO71) keep low AC +DC_IN AON7403
3D3V_AUX_KBC a Adapter in S5_ENABLE 3D3V_S5
KBC GPIO34 control power on by 3V_5V_EN Page43
Page43
S5_ENABLE
AD+ 3D3V_S5
5V_S5 IN 1D5V_S0
5V_S5 & 3D3V_S5 need meet 0.7V difference Out
V5REF_Sus must be powered up before EN1 EN2
3D3V_S5 3D3V_S5
VccSus3_3, or after VccSus3_3 within
0.7 V. Also, V5REF_Sus must power 5V_S5 & 3D3V_S5 need meet 0.7V difference TLV70215DBVR
D down after VccSus3_3, or before Charger EN Vin +VCCIO_VR D
VccSus3_3 within 0.7 V. +5VA_PCH_VCC5REFSUS Ta DCBATOUT TPS51275CRUKR Lx
BQ24780RUYR VIN
DC/DC Page54
KBC GPIO43 to PCH
4 PM_SLP_S3# RT8068AZQWID
PM_RSMRST#(RSMRST#_RST) t05 >10ms (3.3V/5V) 5V_S5 EN VCCIO_PWRGD
t07 >100ms PCH to KBC GPIO00 ACOK Page44 PGOOD
In case of a non-Deep S4/S5 Platform
timing t42 should be added to t07
which will make it 100mS minimum.
PCH_SUSCLK_KBC Page45 Page52 5
KBC GPIO20 to PCH 3D3V_AUX_S5 d PM_SLP_S4# S5 1D35V_S3
PM_PWRBTN#
3
PM_SLP_S4#
TPS51716RUKR
PM_SLP_S3#
3V_5V_POK
DDR_VTT_PG_CTRL 0D675V_S0
S3
1D35V_VTT_PWRGD
2N7002 3D3V_AUX_KBC PM_SLP_SUS# PGOOD
PM_PWRBTN# g Page51
DC
After Power Button
3 4 4 5
SLP_S4# SLP_S3# DDR_PG_CTL
PCH to KBC GPIO44
PM_SLP_S4# GPIO71 GPIO05 H_VR_ENABLE
t10 PCH to KBC GPIO01 VR_EN
KBC_PWRBTN#
PM_SLP_S3# >30us PSL_IN2#
GPIO34
S5_ENABLE DPWROK 7
KBC GPIO47 to LAN 1
PM_LAN_ENABLE c
Enable by PM_SLP_S4# The DSW rails must be stable for at least
1D5V_S3 10 ms before DSW_PWROK is asserted to PCH.
KBC_DPWROK
GPIO66 DSW_PWROK
DDR_VREF_S3(0.75V)
5V_S0 & 3D3V_S0 need meet 0.7V difference f
5V_S0 AC_IN# b PM_PWRBTN# Skylake-U MCP
PSL_IN1# GPIO20 PWRBTN#
V5REF must be powered up before 3D3V_S0 RSMRST_PWRGD#
TBD KBC 2
Vcc3_3, or after Vcc3_3 within 0.7 j ALL_SYS_PWRGD and VR_RDY assert,
3D3V_S5
Delay 10ms
V. Also, V5REF must power down
after Vcc3_3, or before Vcc3_3
within 0.7 V.
+5VS_PCH_VCC5REF Tb MEC1404 delay 10ms; PCH_PWROK assert.
RSMRST#_KBC: Delay 10 ms after receive 8 PCH_PWROK
1D5V_S0 RSMRST_PWRGD# and PM_SLP_SUS#. AND APWROK 4 PM_SLP_S3#
AND
Vcc
RSMRST#_KBC k AND Gate
1D8V_S0 PCH_PWROK PM_SLP_S0# VCCSTG_EN
GPIO36 GPIO93 PCH_PWROK SLP_S0# U74LVC1G08G-AL5 Y
0D75V_S0 6
1D8V_S0 & 1D5V_S3 power ready 7
VR_RDY TBD PM_SUSWARN# 5
GPIO02 SUSWARN# PROCPWRGD
RUNPWROK
ALL_SYS_PWRGD l
6 GPIO26 9 1D0V_S5 5V_S5
1D05V_PCH PM_SUSACK#
GPIO81 SUSACK#
PLTRST# 11 PCI_PLTRST#
VCCP_CPU m AND VIN VDD
It is recommended that SYS_PWROK be asserted after RSMRST#_KBC VCCSTG_EN
both PWROK assertion and processor core VR PWRGD assertion. RSMRST# EN +V1.00DX(VCCSTG)
1D05_VTT_PWRGD VOUT
k
0D85V_S0 SY6288C10CAC
PM_SLP_S4#
GPIO44 Page41
3
Delay 100ms
PM_SLP_S3#
4 GPIO01 H_VCCST_PWRGD ALL_SYS_PWRGD
0D85V_S0 6 Level Shifter
D85V_PWRGD 10 74LVC1G07GW Page17
C SYS_PWROK C
GPIO77 SYS_PWROK
CPU SVID BUS SetVID ACK 50us< t36 <2000us EXT_PWR_GATE#
Page24 1D35VTT_PWRGD
VCC_CORE EXT_PWR_GATE# 5
ALL_SYS_PWRGD assert, SLP_SUS#
g ALL_SYS_PWRGD
VCC_GFXCORE delay 100ms; SYS_PWROK assert. VCCIO_PWRGD
t37
3D3V_S5 5 6
<5ms
g
IMVP_PWRGD
VIN
PM_SLP_SUS# 3D3V_S5_PCH
PCH_CLOCK_OUT SVID Transanctions EN SW
ALL_SYS_PWRGD=D85V_PWRGD t14 >99ms KBC GPIO77 to PCH

SY6288C10CAC
This signal represents the Power
Good for all the non-CORE and PWROK(S0_PWR_GOOD) Page41
non-graphics power rails.
t18
D85V_PWRGD >0us PCH to CPU
DRAMPWROK(VDDPWRGOOD) 2ms<t17 <650ms IMVP8 3D3V_S5
CPU SVID Rails
t19 >1ms
t20 >2ms
6 ALL_SYS_PWRGD SA/Core/GT/GTx
VR_ON
1D8V_S0 VR_RDY
5ms<t13 <650ms PCH to CPU VR_READY VIN
PM_SLP_SUS#
UNCOREPWRGOOD(H_CPUPWRGD) 7 VCCPRIM_CORE
EN LX
SYS_PWROK t21+t22 >1ms+60us RT8068AZQWID VCCPRIMCORE_PWROK

PGOOD
1ms< t25 <100ms PCH to all system 1D0V_S5 5V_S5 Page52 h

PLT_RST#
t39 <200us
3D3V_S5 5V_S5
DMI
Vin VDD
+VCCMPHYGTAON_1P0_LS_SIP
EXT_PWR_GATE# EN SW
Vin VCNTL
g PM_SLP_SUS#
SLG59M1470VTR 1D8V_S5
EN Vout
Page17
APL5930KAI 1D8V_S5_PWROK
PGOOD
Page54 h
3V_5V_POK
e 0R 0402
PWR_DCBATOUT_1D0V
VCCPRIMCORE_PWROK RSMRST_PWRGD#
h 0R 0402
1D8V_S5_PWROK
j VIN
h 0R 0402
1D0V_S5
LX
1D0V_S5_PWRGD VCCPRIMCORE_PWROK EN
i
0R 0402
SY8208DQNC 1D0V_S5_PWRGD
h PGOOD
[dGPU] N16x Power-Up/Down Sequence Page53 i

B B
[DG-07158-001_v03]
a b c d e f g h i j k l m
1 2 3a 4 4a 4b 5 6 7 8 9 10 11 12
A A
BOM1
Wistron Corporation
21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
Taipei Hs ien 221, Taiwan, R.O.C.
Title
POWER SEQUENCE
Size Docum ent Num ber Rev
A0
Tesla SKL-U
Tues day, July 21, 2015
-1
Date: Sheet 102 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
BOM1
Wistron Corporation
Title
Power Block Diagram

A2
Tesla SKL-U -1
5 4 3 2 1
A B C D E
PCH SMBus Block Diagram KBC SMBus Block Diagram

3D3V_S5_PCH 3D3V_S0
TP_VDD
‧ ‧
3D3V_S0 ‧
SRN2K2J-1-GP SRN10KJ-5-GP
‧
DIMM 1 SRN10KJ-5-GP
SMBCLK SMB_CLK
‧ ‧PCH_SMBCLK
1
SMBDATA SMB_DATA
‧ ‧ PCH_SMBDATA
SCL
SDA
TouchPad Conn. 1
PSDAT1 TPDATA
‧ TPDATA TPDATA
SMBus Address:0xA0/0xA1 PSCLK1 TPCLK

‧ TPCLK TPCLK
2N7002SPT
3D3V_AUX_KBC
TPAD
PCH_SMBCLK
SCL
‧
PCH_SMBDATA
3D3V_S5_PCH SDA
SRN4K7J-8-GP
SMBus Address:0x58/0x59
‧
SRN33J-7-GP Battery Conn.
GPIO17/SCL1 ‧‧BAT_SCL PBAT_SMBCLK1 CLK_SMB
SRN2K2J-1-GP PTN3355 GPIO22/SDA1 BAT_SDA PBAT_SMBDAT1 DAT_SMB SMBus address:16
PCH_SMBCLK
VDDA33_DP
‧ ‧
PCH_SMBDATA
TMS (Janus Only)
SML0CLK SML0_CLK
SML0DATA SML0_DATA SMBus Address:0xC0H/0x40H HPA02224RGRR
KBC SCL
SDA SMBus address:12
NPCE285P
2 2
GPIO73/SCL2
GPIO74/SDA2
PCH 3D3V_S0 SMBus Address:

3D3V_S5_PCH 0x94/0x95/0x96/0x97
‧
3D3V_S0
SRN2K2J-8-GP
‧ SRN2K2J-8-GP
SML1CLK ‧ ‧ SML1_CLK
‧ THM_SML1_CLK
SCL Thermal
‧ SML1_DATA THM_SML1_DATA
SML1DATA ‧ ‧ SDL
NCT7718W
SMBus Address:0x82/0x83 SMBus Address:0x98/0x99
2N7002SPT
3D3V_VGA_S0
‧SRN4K7J-8-GP
3D3V_VGA_S0
‧
dGPU
3 3
SMBC_Therm_NV I2CS_SCL
‧
SMBD_Therm_NV I2CS_SDA
‧
SMBus Address:0x9E/0x9F
3D3V_S0 5V_S0
0R2J-2-GP
‧ ‧ DY
3D3V_S0
SRN2K2J-1-GP SRN2K2J-1-GP GPIO47/SCL4A PROCHOT_EC
‧ ‧ H_PROCHOT_EC
GPIO53/SDA4A LCD_TST_EN LCD_TST_EN
‧ ‧
0R2J-2-GP
DDPB_CTRLCLK ‧PCH_HDMI_CLK DDC_CLK_HDMI ‧ LCD_TST
DDPB_CTRLDATA
‧ PCH_HDMI_DATA ‧‧ DDC_DATA_HDMI ‧ HDMI CONN
2N7002DW-1-GP
4 4
BOM1
Wistron Corporation
Title
SMBUS BLOCK DIAGRAM

A2
Tesla SKL-U -1
A B C D E
A B C D E
Thermal Block Diagram Audio Block Diagram

1 1
3D3V_S5_PCH 3D3V_S0
PAGE28 D+ NCT7718_DXP
PCH MMBT3904-3-GP
SPKR_L+
SPKR_L-
D- NCT7718_DXN
SC2200P50V2KX-2GP SPKR_R-
SPKR_R+ SPEAKER
Thermal Place near CPU
SML1_DATA THM_SML1_DATA
NCT7718 PWM CORE
Codec
SML1DATA/GPIO74 ‧ ‧‧ 2N7002 ‧ SDA
SML1CLK/GPIO75 SML1_CLK
‧‧ ‧ THM_SML1_CLK
‧ SCL
MMBT3904-3-GP
ALC3223
T8 AUD_HP1_JACK_L HP MIC
AUD_HP1_JACK_R
SML1_DATA
COMBO
SML1_CLK
3D3V_S0 PURE_HW_SHUTDOWN#
T_CRIT# THERM_SYS_SHDN#
2N7002
D EN 3V/5V SLEEVE
PAGE20 S PCH_PWROK
G RING2
2
‧ Put under CPU(T8 HW shutdown) 2
PAGE27 PAGE86
GPIO74
KBC GPIO73 Digital

NPCE285P 2N7002
SMBD_THERM_NV I2CS_SCL
VGA GPIO0/DMIC_DATA
DMIC_DATA_R R2714
0R2J-2-GP
DMIC_DATA
MIC
SMBC_THERM_NV I2CS_SDA DMIC_CLK_R R2716 DMIC_CLK
GPIO1/DMIC_CLK
0R2J-2-GP
GPIO4
N15V-GM-S-A2
GPIO94 GPIO56
GB2-64 (23x23)
FAN_TACH1
FAN1_DAC_1
3 3
TACH
FAN
VIN
FAN_VCC1
5V
VIN VSET VOUT
FAN CONTROL
APL5606AKI
PAGE28
4 4
BOM1
Wistron Corporation
Title
THERMAL/AUDIO BLOCK DIAGRAM
Custom
Tesla SKL-U -1
A B C D E

Schematic Lenovo D300S-14 Wistron LT41 Tesla SKL-U 14292-1 Rev - 1

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5 4 3 2 1

Project code: CHARGER

HDMI V1.4a HDMI LPC I/F INPUTS OUTPUTS

14.0"/15.6" (FHD) eDP CPU VCCIO 0.975V

MIC_IN/GND 3D3V_S5 1D5V_S0

SDR104 USB3.0 x 1 1D0V_S5 +V1.00U_CPU

Left side 3D3V VGA

Main Func = CPU

Main Func = CPU

TP403 1 GPP_E3/CPU_GP0 A6 B56 PCH_JTAG_TCK 99

(#543016) PROCHOT# Routing Guidelines

M1,2,3,4,5: <3 inches

CPU_(JTAG/CPU SIDE BAND)

Main Func = CPU

SKYLAKE_ULT AY39 SKYLAKE_ULT AN45

Main Func = CPU CPU1S 19 OF 20

PCH strap pin: 071.SKYLA.000U

[BDW Only]PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

DISPLAY PORT PRESENCE STRAP

Main Func = CPU

VCCGT VCCGTX 1D35V_S3 +VDDQ_CPU_CLK 0.12 A

N64 AU58 100R2J-2-GP

23e 23e R724 N66 AU63 R710

VCCGT VCCGTX VCCIO_VR_FB

1. Place close to CPU R735

R731 Layout Note: VCCSA_SENSE

SVID CLOCK #544669

Main Func = CPU

E55 SKYLAKE_ULT C47

C50 DDI2_TXN[0] DDI EDP_AUXN E45 eDP_AUX_CPU_N 55

eDP_RCOMP 20 mils 25 mils 24.9 Ω ±1% Max = 100 mils

(#543016) DDI Disabling and Termination Guidelines R804

PU to 3.3 V with 2.2-k

Main Func = CPU

SC18P50V2JN-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP

U-line 23e 28W

Main Func = CPU

GTUS 20141114 Alden

PCH DERIVED RAILS +VCCGT

C1101 C1102 C1103 C1116 C1117

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Main Func = DDR SODIMM

Main Func = DDR SODIMM

M_B_DQ0 DQ8 SCL

M_B_DQ36 131 111

M_B_DQ39 DQ34 VDD14

M_B_DQ33 DQ35 VDD15

Main Func = PCH

A36 CSI2_DN0 CSI2_CLKN0 C37

Main Func = PCH

PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 RN802 10KR2J-3-GP

PCIE Table USB 2.0 Table

1 N/A USB3.0_3 0 USB3.0 port1 (Debug Port)

2 N/A USB3.0_4 1 USB2.0 Port2

3 WLAN 2 USB2.0 Port3 (IOBD)

5(L0~L3) GPU 4 CAMERA

6(L3) HDD SATA0 5 Card Reader

6(L2) N/A SATA1 6 Touch Panel

6(L0~L1) N/A 7 Bluetooth

#545659 (SKL_PCH_U_Y_EDS Rev0.7)

Main Func = PCH

RN1701 SIO_SLP_S3# 1 AFTP1701