Microprocessors

Module 11
Fetch decode execute
cycle
1. Orient the students on the fetch-decode-execute cycle
of a microprocessor.
2. Orient the students on how addresses are decoded.
Address Decoding
In order to attach a memory device to the
microprocessor, it is necessary to decode the address
from the microprocessor to make the memory function
at a unique section or partition of the memory map.

Without an address decoder, only one memory device

can be connected to a microprocessor, which would
make it virtually useless.
For example, a 2716 EPROM has 11 connections and the
microprocessor has 20.

This means that the microprocessor sends out a 20-bit

memory address whenever it reads or writes data. Since
the EPROM has only 11 address inputs, there is a
mismatch that must somehow be corrected.
For example, a 2716 EPROM has 11 connections and the
microprocessor has 20.

This means that the microprocessor sends out a 20-bit

memory address whenever it reads or writes data. Since
the EPROM has only 11 address inputs, there is a
mismatch that must somehow be corrected.
The Simple NAND Gate Decoder
Case Study:

Connecting the 2716 2K x 8 EPROM to the 8088 starting

at address 00000H.

Take note that EPROM chip has 11 address lines (since

it has 2K or 2,048 memory locations). If this chip is
mapped starting at memory address 00000H, then its
ending memory address would be 007FFH.
00000H
00001H
.
2,048
. memory
. locations

007FEH
007FFH
The first connections that should be done is to connect
the 11 address lines of the EPROM chip to A0 to A10 of
the 8088 and the 8 data lines of the EPROM chip to D0 to
D7 of the 8088. The OE’ line of the memory chip should
also be connected to MEMR’ of the CPU.
 D0 D0
D1 D1
. .
. .
. .
D7 D7 2K x 8
Memory
A0 A0
Chip
A1 A1
8088 . .
CPU . .
. .
A10 A10 CS' OE'
A11
.
.
.
A19

MEMR'
The given memory chip is mapped to addresses 00000H
to 007FFH. In other words, the memory chip should be
activated if the CPU issues out any address between the
given range. By examining the said addresses, it is
easily observed that the bits that are common to these
addresses are:

0000 0000 0000 0000 0000 = 00000H

0000 0000 0111 1111 1111 = 007FFH
The EPROM chip should therefore be activated if the
values of A19 to A11 are all 0s. The address decoder of
the memory interface circuit should activate the memory
chip (CS’ = 0) if these conditions (A19 to A11 are all 0s)
occur.
 D0 D0
D1 D1
. .
. .
. .
D7 D7 2K x 8
Memory
A0 A0
Chip
A1 A1
8088 . .
CPU . .
. .
A10 A10 CS' OE'
A11
.
.
.
A19

MEMR'

A19
A18
A17
A16
A15
A14
A13
A12
A11
S. Mathur(2016), Microprocessor and Microcontrollers,
PHI Learning and Private Limited
Taylor and Francis Group. Essentials of Computer
Architecture. CRC Press, Comer, D. (2017).
Jones and Bartlett Learning, Computer Organization And
Architecture (10th Ed.), Stallings, (2016)