Lecture 5: Introduction to VHDL

in Quartus II Software and

Combinational Logic
CS-216: Digital Logic Design
September 20, 2015
 Lecture Overview
• Very hands-on lecture (almost a lab)
• Installing device drivers for USB-Blaster (Programmer/
Debugger) that we will be using for programming.
• Sample LED project that you’ll compile and download on the
EMP240 CPLD kit. Different files constituting the project will
be explained.
• Brief introduction will be provided for the VHDL file, and
different parts will be explained.
• Combinational Logic vs. Sequential Logic
• Combinational Circuits Part I - Arithmatic Circuits
 Recommended Reading
• “Circuit Design with VHDL” by Volnei A. Pedroni
• “Low Carb VHDL Tutorial” by Bryan Mealy

• Material that will be provided for this lecture:

– “A Fairly Small VHDL Guide”
– Zipped file for the EPM240 kit for Quartus II.
– Schmatic for the EPM240 kit

NOTE: Detailed study of VHDL not covered in this course.

 Device Drivers Installation
NOTE: Expected that you have installed Quartus II Web Edition (Free) software on your computers.
1. Plug the USB-Blaster programmer into the USB port.
2. For Windows platform, from Control Panel, start device manager.
3. USB-Blaster is listed under “Other devices” initially.
 Device Drivers Installation
4. Right click, and click “Update Driver Software”

5. Click “Browse my computer for driver software”

 Device Drivers Installation
6. Browse to the directory in which Altera Quartus II software was installed
to find drivers in.
7. Click Next. Proceed with installation if a dialog box pops up. The drivers
will be installed automatically after a while.
 Configuring the Sample LED Project

• Unzip the provided file

• Start Quartus II IDE. From File→Open
Project…, browse to the location where the
file was uncompressed, and choose
DLD_LED.qpf file (.qpf = quartus project file).
• In the top left corner window, double click on
DLD_LED. This will bring up the DLD_LED.vhd
file in the text editor area (top right window).
 Components of a Minimal VHDL File

• Apart from the file header (comments), the

minimal project file has three parts:
– Libraries
– Entity
– Architecture
File Header and Libraries
Entity
Architecture
Schematic
 Pin Planning
• From the Menu item: Assignments→Pin Planner
 Implement a NOT gate
• First, from Pin Planner, assign a new pin input.
Implement a NOT gate
Project Directory
Quartus II Project File (.qpf)
Quartus II Settings File (.qsf)
 Combinational Logic
• Digital Logic Circuits Catagorization
– Combinational Logic
– Sequential Logic

• Combinational Logic Circuits

– Output depends upon the current value of inputs.
Previous history of inputs and/or outputs does not
have any bearing on the output.
– No memory elements, no feedback from output to
input
 Combinational Logic
• So far, all the circuits we have studied are
combinational logic circuits.
• Design Problem: Formulate problem; Write
Truth Table; Get Boolean expression, and
minimize gates OR minimize through K-maps;
Draw logic diagram; realize the circuit.
• Analysis: Given a circuit (designed by you, or
provided to you), write down the Boolean
expression, and analyze it for optimization.
 Combinational Logic Circuit Examples
• Arithmatic circuits
– Adders/subtractors (using 2’s complement)
– Multipliers
– Magnitude comparators

• Encoders/ Decoders
• Multiplexers

• Combinational logic Design

• Modular Design
 Arithmatic Circuits (Basic Building Blocks)
• Simple (Half) Adder
Arithmatic Circuits (Basic Building Blocks)
• Addition of more than one-bit numbers:
 Arithmatic Circuits (Basic Building Blocks)
• Full Adder
 Behaviour of Different Gates
• OR gate: Combine

• AND gate: Mask/ Select (multiplex)

• XOR gate: Inputs not equal; Also selective

inverter

• XNOR gate: Inputs equal

 Arithmatic Circuits (Basic Building Blocks)
• Full Adder
 Arithmatic Circuits
• Four-bit Adder (Ripple Carry Adder)
 Arithmatic Circuits
• Four-bit adder with carry look-ahead
 Arithmatic Circuits
• Subtractor (using two’s complement)
 Arithmatic Circuits
• Two-bit Binary Multiplier
 Arithmatic Circuits
• 3-bit number by 4-bit number multiplier
 Arithmatic Circuits
• Magnitude Comparator
 Some new concepts

• Already Discussed
– Bubble transfer
– NAND level implementation
– NOR level implementation
• New Concepts
– RTL (Register Transfer Level) Logic

– Tri State gates

 Summary

• How to modify the provided file to implement

simple logic circuits in Quartus II IDE.

• Combinational Logic Circuits

– Arithmatic
– Encoders/ Decoders
– Multiplexers/ Demultiplexers