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Lecture 1: Introduction

CS-216: Digital Logic Design


August 23, 2015
Introduction
• Ahmad Rana

• Muhammad Arqum Razzaq


Lecture Overview
• Introduction
• Course Objective and Syllabus
• Schedule
• Grading
• What is Digital Logic Design (DLD)
and why study it?
• Overview of DLD course
Course Objective
“This course introduces the foundation of Digital
Computer Design. Numbering systems and
Boolean algebra become the basis of this
course. At the end of the course, the students
should be able to design different combinational
and sequential circuits leading to the design of
complex digital systems such as ALU.”
Syllabus (Topics Covered)
• Number Systems: Binary Numbers, Number Base Conversion, Octal & Hexa-Decimal
Numbers, Complements (R’s & (R-1)’s), Binary Codes, Binary Logic. Boolean algebra and
• Logic Gates: Basic Definitions, Basic Theorems & Properties of Boolean Algebra,
Boolean Functions, Canonical & Standard forms, Other Logic Operations, Digital Logic
Gates, IC Digital Logic Families.
• Simplification Of Boolean Functions: The Map Method, Two and Three-Variables Maps,
Four-Variable Map, Five and Six-Variable Map, Product of Sums Simplification. NAND &
NOR Implementation, Other 2-Level Implementations, Don’t-Care Conditions.
• Combinational Logic: Design Procedure, Adders, Subtractors, Code Conversion, Analysis
Procedure, Multilevel NAND circuits, Multilevel NOR Circuits, Exclusive-OR &
Equivalence Functions.
• Combinational Logic With MSI & LSI: Binary Parallel Adder, Decimal Adder, Magnitude
Comparator, Decoder, Multiplexers.
• Sequential Logic: Introduction, Flip-Flops, Triggering of Flip-Flops, Analysis of clocked
Sequential Circuits, Flip-Flops Excitation Tables, Design Procedure, Design of Counters,
Design with State equations.
• Synchronous & Asynchronous Counters: Introduction, Design Procedure of
Synchronous Counters, Design Procedure of asynchronous counter. Registers with
Parallel Load, Sequential Logic Implementation, Shift Registers, Serial Transfer.
Syllabus (Teaching Material)
• Text Books:
– “Digital Design – With an Introduction to Verilog HDL”, 3rd Edition, Morris
Mano and Michael Ciletti
– “Digital Computer Electronics”, 3rd Edition, Albert Malvino and Jerald Brown.

• Class Lectures (Videos)


• Exercises and Assignments
Course Overview
• Lectures
– Basic Theory and Techniques
– Hands on exercises
• Labs
• Mini Projects
• Homework and Exams
Schedule
• Lecture 1: Introduction and Course Layout
• Lecture 2: Number Systems and Logic Gates
• Lecture 3: Boolean Algebra (with application
to engineering problem solving and design)
• Lecture 4: Gate Level Minimization
• Lecture 5: Altera VHDL Development
Environment Setup and Introduction to VHDL
• Lecture 7-9: Combinational Logic Design
• Lecture 10-12: Sequential Logic Design
Schedule (continued)
• Lecture 13: Design at Register Transfer Level
• Presentations
Grading
• Quizzes - 10%
• Assignments - 10%
• Lab Work - 20%
• Mid Semester Exam - 20%
• End Semester Exam - 40%
What is Digital System
• How do you represent a system

• Analog System

• Discrete System

• Digital System
Digital Logic Design (DLD)
• How to represent digital systems
– Binary logic
• Analysis and design of digital systems
– Basic mathematical theory (Boolean Algebra)
– Combinational and sequential logic design
techniques
– System level, RTL based design using HDL
languages
Motivation to Study DLD
• Forms the basis of digital computer design
• Digital solutions to inherently digital
engineering problems
• Dedicated digital electronics solution using
VLSI (CPLD and FPGA design)
What you should expect from this course

• Very easy course


• Teaching philosophy – Immersion; expect a lot
of work
• Hands on course; lectures and lab work might
overlap
• End of the course: You will learn have gained
skills which you will use in the industry
Number Systems and Logic Gates
• Various number systems suitable for representing
information in digital systems.
– Decimal number system
– Binary number system
– Octal and Hexadecimal number systems
– Codes (Grey code, BCD etc)
• Basic arithmatic operations (e.g. addition and
subtraction of signed numbers) as well as logic
operations (e.g. NOT, AND, OR etc.) and their
representation using logic gates
• Conversion between number systems
• Exercises
Boolean Algebra and Gate Level Minimization

• Basic postulates of Boolean algebra


• Boolean expressions and their corresponding
logic diagrams
• Gate level minimization (through Boolean
Algebra and K-Maps)
• Exercises
Altera VHDL Development Environment Setup and
Introduction to VHDL
• Altera: One of the two largest vendors of PLD’s (FPGA/CPLD)
• Quartus II design environment software
• EPM240 CPLD design kit and USB Blaster programmer

• Hands on exercises
Combination Logic Design

• Logic design using simple Boolean operators


(without memory)
• Formal procedures for analysis and design of
combinational logic systems
– Adders, subtractors, decoders, encoders,
multiplexers
• VHDL implementation
• Exercises
(Synchronous) Sequential Logic Design

• Basic memory elements (Flip flops)


• Synchronous → Clocked
• Timing diagrams
• Formal methods for analysis and design of synchronous
logic systems (state tables, state diagrams, behavioural
modeling, etc.)
– Counters, sequence detectors etc.
• Memory devices, logic implementation devices, such as
ROMs, PALs, PLAs, CPLDs, FPGAs.
• VHDL implementation
• Exercises
Design at RTL Level

• Stretch goal; only an introduction


• Systematic approach to advanced DLD
projects
• Register transfer level (RTL) representation of
digital systems.
• The algorithmic state machine (ASM) chart,
ASM and Data path (ASMD) chart, and timing
sequence
Mini Projects

• Use techniques learnt in the course to design


and implement small DLD projects
• Groups of three or four students
• Project report
• Presentation
Summary

• Basic course on Digital Logic Design


• A more vigorous and advanced digital logic
systems design course may be offered in the
future (Special topics in Mechatronics
Engineering)
• !!! Useful design skills!!!
Contact
• Muhammad Arqum Razzaq
email: arqum.razzaq@uettaxila.edu.pk

• Ahmad Rana
email: ahmadsrana@gmail.com
ahmad.s.rana@villanova.edu

• Prof. Amir Sultan

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