Input Filter Interactions With Switching by Basso

Input Filter Interactions with Switching
Regulators
Christophe Basso – Technical Fellow
IEEE Senior Member
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Course Agenda
 A Switching Regulator as a Load
 EMI Filter Impact
 An Introduction to FACTs
 Buck Converter Input/Output Impedances
 Filtering the Input Current
 Damping the Filter
 Optimum Component Selection
 A Practical Case Study
 Cascading Converters
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2 3/7/2017 Christophe Basso –Input Filter Interactions
Course Agenda
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EMI Filter Interaction
 A LC filter is inserted to prevent input line pollution
L Vin Vout
Vg
C Rload
Z in  s  ?
Switching converter
 What load does the converter offer?

C. Basso, “Designing Control Loops for Linear and Switching Power Supplies”, Artech House, 2012
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A Negative Incremental Resistance
 Assume a 100%-efficient converter
Pout  Pin I inVin  I outVout Infinite rejection
 In closed-loop operation, Pout is constant, no link to Vin

Pout
I in Vin  
Vin
 For a constant Pout , if Vin increases, Iin drops
1
P 
0.8
d  out 
dI in Vin 
  in    out2
V P
I in  A  0.6 dVin dVin Vin
0.4
The incremental input Vin 2
Rin  
0.2
resistance is negative Pout
10 15 20 25 30
Vin  V 
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A Simple SPICE Simulation
 A constant-power current source shows the negative resistance
bulk
parameters B1
Vin
100 Current
Pout=50W {Pout}/V(bulk)
.TF V(bulk) Vin
Infinite
bandwidth
***** SMALL SIGNAL DC TRANSFER FUNCTION
output_impedance_at_V(bulk) 0.000000e+000
vin#Input_impedance -2.00000e+002 Neg. resistance
Transfer function
Transfer_function 1 000000e+000
1.000000e+000
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A Simple LC Filter
 The low-pass filter is built with L and C elements:
Vout
1  s  z1
rL L H  s  H0 2
rC s  s 
1  
0 Q  0 
Vg R
1 rL  R 1
C 0  z 
LC rC  R 1
rC C
LC0  rC  R 
Q
L  C  rL rC  rL R  rC R 
L  C  rL rC  rL R  rC R   0
A negative resistance cancels
Q losses: poles become imaginary
L  rC rLC
If R   Sustained oscillations
C  rC  rL 
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A Negative Resistance Oscillator
 If losses are compensated, the damping ratio is zero
1  s z 1
H  s  H0 Q 
s2 s 2 If ohmic losses are gone,
gone the
  1 damping ratio is zero, Q is infinite.
0 2 0 Q
 Without precautions, instability can happen!
150 Input voltage
rL L Vout
rC 130
Output voltage
(V)
Vin I 110
C 90.0
P (constant) 70.0  0  0  0
I  out Negative resistance
Vout Infinite bandwidth 3.64m 10.9m 18.2m 25.5m 32.7m
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Filter Output Impedance
 What is the output impedance of an LC filter?
VT  s 
It follows
rC IT  s  N s
L the form
Z th  s   R0
Rload D s
rL
C Ω Ω
No dimension
 L
 1  s  1  srC Cout 
Z th  s    rL || Rload   rL 
 L   r  Rload 
1 s   C  rL || Rload  rC    s 2  LC C 
 rL  Rload   rL  Rload 
 All losses ((ohmic, iron etc.)) help

p decreasing
gQ
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Typical Filter Output Impedance
 At low frequency, the inductive ohmic loss dominates
dBΩ °
20.0 180
Phase is
positive
10 0
10.0 90 0
90.0
Z out  f 
0 0
Phase is rC
Z out  f 
-10.0 -90.0
negative
rL
-20.0 -180
1 10 100 1k 10k 100k 1Meg

frequency in hertz
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Negative Resistance at Low Frequency
N
 Neg. i
resistance i because
exists b off feedback
f db k (Pout = constant )
R4 2.70V L1
2.70V 1.5m 5u 2.70V
VZin 5 3 18
PWMCM2_L
X1
IImpedance
d
L = 5u
Fs = 1Meg
Average model
L2 Ri = -40m
10GH Se = 16.4k
measurement
c
2.70V
p
vout
setup
7 4
5.00V
I1 Vin duty_cycle
AC = 1 2.7
D
Resr
duty-cycle
536mV
ossy PWM
swiitch CM
2
60m
Rload
SW
vc
c
S
Lo
a
R9 -455mV 5.00V
16
5
1k -301mV
11
13 Cout
Rdson 200uF
140m
D1
mbra210et3
parameters
C2
Rupper=10k {C2}
fc=8k
pm=70 C1 R2
R7 {C1} {R2}
Gfc=-20 1k 99.9mV 15 R1
pfc=-101 14
2.50V {Rupper}
R6 2.50V
G=10^(-Gfc/20) 10k 6
boost=pm-(pfc)-90 1.10V
9
pi=3.14159
p 2.50V
K=tan((boost/2+45)*pi/180) 1 R3
Verr
C2=1/(2*pi*fc*G*k*Rupper) V2 10k
G s
C1=C2*(K^2-1) 2.5
R2=k/(2*pi*fc*C1) X2
AMPSIMP
VHIGH = 100
fp=1/(2*pi*R2*C2) VLOW = 10m
fz=1/(2*pi*R2*C1)
Sw itchMode Pow er Supplies: SPICE Simulations and Practical Designs
Christophe Basso - McGraw -Hill, 2014
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Negative Resistance at Low Frequency
Th resistance
 The i i truly
is l negative
i up to 200 Hz
H
1 2
24.0
12.0
(dBΩ) 1.02 Ω
0
e before
Well be o e crossover,
c osso e ,
Z in  f 
-12.0
12 0
the -180° argument
-24.0 is gone.
144 In this region

72.0
Z in  f  Pout  constant
(°) 0 fc
-72.0
-144 Z in  180
10 100 1k 10k 100k 1Meg
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Course Agenda
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A Filter Affects the Line Output Impedance
Th line
 The li impedance
i d d i i the
driving h converter is
i no llonger 0
H1  s  Z th  s  Z in  s  H2  s
vôut
vˆg
Vin  s 
d̂
G s
 The system can be modeled by a minor loop
1 +
Vin  s   Vth  s  Vth  s  Vini  s 
Z th  s 
1 -
Z in  s 
Zth Zin
gain
ga
“Input Filter Considerations in Design and Application of Switching Regulators”, R. D. Middlebrook, IEEE Proceedings, 1976
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Impedance Interactions
 Stability can be at stake when inserting the filter
Vin  s 
Z th  s 
Vth  s  Z in  s 
Z th  s  Z in  s 
Filter Switching Supply
 The Nyquist criterion applies

Z th  s 
 1
Vin  s   Vth  s 
1 Z in  s  Conditions
C diti ffor
Z th  s  oscillations
1 Z th  s  Z s
Z in  s   1 and  th  180
Z in  s  Z in  s 
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A Filter Modifies Converter’s Dynamics
 The EMI filter output impedance makes Z th  s   0
 The converter input voltage is no longer zero in ac analysis
Z th  0
H s vîn  0 H s
vôut Z th  s  vôut
Z th  0
vîni  0 d̂ d̂
G s G s
Vout  s  Vout  s 
H s  H s 
D s V D s V
in  s 0 in  s 0
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Extra Element Theorem to Help
 It can be shown how an EMI filter affects the open-loop gain
H s
Vout  s 
H s  Gain without the filter
vôut D s Z
th  s 0
Z th  s  Z th  s  Filter output impedance
Extra-Element 1
d̂ correction factor
G s
Z th  s 
1
Vout  s  Vout  s  ZN s Z th  s   Z N  s 
H s  
D s Z D  s  Z s 0 Z th  s 
 s 0   1 Z th  s   Z D  s 
ZD  s
th th
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What are ZD and ZN?
 ZD and ZN come from the Extra-Element Theorem, EET
Z D  s   Z i  s  D s 0 Open-loop
Open loop input impedance
 
Z N  s   Z i  s  vˆ Input impedance for a nulled output

out  0 Ideal input rejection
ZD  s  ? ZN  s  ? Null
vôut  0 vôut  0
iôut  0 iôut  0
D0  35% D0  35%
dˆ  0 Ideal control dˆ  0
Open-loop input impedance Input impedance for vôut  0

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Consider Closed-Loop Input Impedance
Th
 These l
values h
have l d been
already b d i d
derived
Ze(s) is the input impedance for a shorted output
Converter ZN(s) ZD(s) Ze(s)

 L 
1  s  s 2 LC 
R R  sL
Buck  2 
R
D 2  1  sRC

D  D2
 
 L LC 
 sL   1  s 2  s2 2 
Boost  D ' R 1  2 
2
D '2 R  D' R D'
 sL
L
 D' R   1  sRC 
 
 L LC 
D '2 R  sDL  D '2 R 
1  s 2  s2 2  sL
Buck-Boost  2 
1 2  
D' R D'

D  D' R  D2  1  sRC  D2
 
 A converter closed-loop input impedance follows the form

1 1 T s 1 1
 
Z in  s  Z N  s  1  T  s  Z D  s  1  T  s 
L
Loop gain
i “Fundamentals of Power Electronics”, R. Erickson, D. Maksimovic, Springer, 2001
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The Output Impedance is Affected
 The filter degrades the closed-loop output impedance
Z th  s 
1 No impact if
Ze  s 
Z out ,CL  s  Z  Z out ,CL  s  Z s 0 Z th  s   Z e  s 
th  s  0 th   Z th  s 
1
Z in ,CL  s 
 Ze(s) is the converter input impedance with a shorted output
Ze  s  H2  s Vout  0
Short circuit
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Applying Dr. Middlebrook Criteria
P i
 Previous equations i consider id switching
i hi cellll alone
l
 Do not include the decoupling capacitor!
H1  s 
Z ini  s  H s 2
vôut
vˆg
 If p
possible,, move the capacitor
p to the filter side
Z in  s 
H1  s  H2  s
vôut
vˆg
“Input Impedance and Filter Interactions Part I”, R. Ridley, ridleyengineering.com
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At 1st-Order Check Crossover Points
 Plot the converter input resistance value
 Plot the filter output impedance: check for overlaps: Zth  s   Z in  s 
dBΩ
Overlap occurs?
Vin 2 Z th  s 
65.0
undamped
1
Pout Z in  s 
36 dBΩ
35.0
Z th  s 
1
Z in  s 
5 00
5.00 Watch the
damped
argument of
3.6 /100 µF
-25.0
Zth Zin
-55.0
Output filter Z out  s 
10 100 1k 10k 100k
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Condition for Oscillations
 Plot the ratio of magnitude Zth Zin
 Plot the difference of arguments arg Z th  arg Z in
Check phase margin at 0-dB points if any
° dB
Z th Z in Conditions for
0 60.0
oscillations
ill ti
safe
-90.0 30.0 Z th  s 
1
Z in  s 
-180 0
and
problem Z th  s 
-270 -30.0
  180
arg Z th  arg Zin Z in  s 
-360 -60.0
1 10 100 1k 10k 100k 1Meg
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Damping the Filter to Build Margin
 Damping the filter can provide phase margin at 0 dB
 The phase margin in this example is a bare 12°
Avoid magnitude overlaps by working on Zth and Zin!
dB °
20 0
20.0 0
arg Z th  arg Z in
10.0 -90.0
168
0 -180
-10 0 -270
-10.0
Z th Z in
-20.0 -360
1 10 100 1k 10k 100k 1Meg
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Preliminary Conclusion
Y design
 You d i the
h iinput filter
fil together
h with
i h the
h SMPS
Z th  s   Z N  s 
When a filter is installed:
Converter loop gain T is unaffected

Z th  s   Z D  s 
and
Z th  s   Z e  s  Converter output impedance is unaffected

Vout shorted, open loop
 You design the input filter alone

Z th  s  Z th  s  Don’t care about phase anymore
and 
Z in  s  Z in  s 
If d
damping the
i th Z th  s   Z in  s  OK
filter guarantees closed loop
System is stable but overall performance may be altered
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Course Agenda
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Classical Circuits Analysis Techniques
 Apply classical Kirchhoff’s voltage and current laws
 The expression is correct but disorganized: high-entropy form
Vout response
rL L1
What is the Vout  s 
ti ? H  s  
rC
Vin  s 
R t
transfer
f function?
f
Vin 1
C2
stimulus Apply brute
force algebra
 1 
  rC  || R1
 2
sC  R1  sR1rC C2
H s  
 1  R1  rL  sL1  sC2 R1rC  C2 R1rL s  C2 rC rL s  C2 L1 R1 s 2  C2 L1rC s 2
  rC  || R1  rL  sL1
 2
sC 
No
o insight:
s g t poles?
po es Zeros?
e os Dcc gain?
ga
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Fast Analytical Circuits Techniques
 FACTs describe a set of tools to quickly write transfer functions
R1 1  srC C2
H s 
R1  rL  L  r  R1
1  s  1  C2  rC  rL || R1    s 2 L1C2 C
Dc gain  rL  R1  rL  R1
 Naturally showing gains, poles and zeros…

s 1 1 rC  R1
1 z  0 
z rC C2 rL  R1
H  s  H0
L1C2
2
s  s  rL  R1 1
1   Q
0 Q  0  L1  C2  rC rL  R1  rC  rL   0
This is a low-entropy expression

R. D. Middlebrook, “Methods of Design-Oriented Analysis: Low Entropy Expressions”, New Approaches to Undergraduate Education, July 1992
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Two Different Stages
 Consider dc and high-frequency states for L and C
impedance
p 1 Dc state Z C   Cap. is an open circuit
Cap
C ZC 
sC HF state ZC  0 Cap. is a short circuit
impedance D state
Dc Z L  0 IInductor
d is
i a short
h circuit
i i
L Z L  sL
HF state Z L   Inductor is an open circuit
 Change the circuit depending on s
s s0 s s0

C L
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Principles of FACTs: Time Constants
 Determine time constants in two different conditions
1. The excitation is set to zero (no excitation)
2 The output is nulled (no response)
2.
How do you determine a time constant?
R1 R1 IT
Remove
R2 R3 C1 R2 R3 VT
capacitor
Test generator
VT
Remove L or C and look into its terminals: R   R2 || R3  R1
IT
   R2 || R3  R1  C1
In your head, imagine an ohm-meter placed across C1’s terminals Excitation is set to 0
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Turning the Excitation off – The Pole
 Turning the excitation off means
 A 0-V source becomes a short circuit
A0 0-A
A generator is an open circuit and disappears
L1 R1 Set source R1
L1
R2 0V
R? R2 
Vin R1  R2
to 0 V
R2 R2
R?
Set source
L1
L1 R1 I in R1 0A 
to 0 A R1
1
 The inverse of the time constant in this case is a p
pole:  p 

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Mathematical Definition of a Zero
 A zero is the root of the equation f  x   0
15
f  x   x2  4
10
x1 x2 f  x  0
f ( x) 5
0 x1  2
x2  2
5
4 2 0 2 4
x
 Transfer function zeros are the numerator roots
N s  0 sz1 , sz2 ...
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Nulling the Response
 If the numerator is 0, then the response is theoretically 0
vôut  0
H(sz)
Complex excitation Complex response
s  sz N  sz   0
 What is happening in the box when s  s z ?
The excitation cannot reach the output: the response is nulled

Vout  sz   0 vôut  s z   0
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How Does the Response Disappear?
 The signal is lost in the transformed network
p
response R1 p
response
Z1  sz    Vout  sz   0 Vout  sz   0
Vin  sz  Vin  sz  Z 2  sz   0
R1
excitation excitation
s  j   s  j  
A series impedance
p Ap
parallel impedance
p
becomes infinite. shorts the path to ground
 What is a transformed network?
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The Transformed Network
 Reactances are replaced by their Laplace expression
R1 R2 R1 R2
C1 1
sC1
R1 R2 R1 R2
L2 sL
L2
 The circuit is then observed at the zero angular frequency
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Considering a Negative Angular Frequency
F s = sz1, the
 For h RC impedance
i d iis a short
h circuit
i i
=0
 
Z1 sz1  0 Ω
rC 1  srC C1
shunt
Z1  s  
sC1
1 1
sz1  
sC1 rC C1
 For s = sz2, the RL impedance is infinite

R2
 
Z 2 s z2   Ω
sL2 R2
Z2  s  
R2  sL2 R2
sL2 =0 s z2  
series
Poles of the RL network become L2
zeros of the transfer function.
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Zeros by Inspection: Fastest Option!
Id if transformed
 Identify f d open circuits/short
i i / h circuits
i i
R1 R3 Vout  s  sz1  
rL
 z1 
rL
R2 L1 L1
rL sL2 rC R2 R2
s z2    z2 
Vin  s  L2 L2
sL1 1
1 1
sC1 sz3    z3 
rC C1 rC C1
 s  s  s  No
N  s   1  1   1   equations!
 z   z   z 
 1  2  3 
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FACTs at Work in an Example
 How would you calculate Vout / Vin?
Vout  s 
R1 R3
rC
Vin  s  R2 R4
C1
1. Transform the circuit with a Thévenin generator

2. Apply impedance divider involvingg C1
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Apply Impedance Divider
 Reduce circuit complexity with Thévenin
R1 R3 R1 || R2  R3
Vout  s  Vout  s 
R2
Rth  s  rC rC
R2
Vth  s  R4 Vin  s  R4
R1  R2
C1 C1 Z1  s 
 Apply impedance divider involving Z1 and Rth

Rth  s   R1 || R2  R3 Z1  s  R2
H s 

Z1  s   R4 ||  rC 
1 

Z1  s   Rth  s  R1  R2 “Who you
 sC
C1  gonna call?”
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High-Entropy Expression
 How do you make use of this result?

R2 R4 C1 rC s  1 
H2( s ) 
R1 R2  R1 R3  R1 R4  R2 R3  R2 R4  C1 R1 R2 R4 s  C1 R1 R3 R4 s  C1 R2 R3 R4 s  C1 R1 R2 rC s  C1 R1 R3 rC s  C1 R1 R4 rC s  C1 R2 R3 rC s  C1 R2 R4 rC s
 what is the pole/zero position?

 what affects the q
quasi-static ggain for s = 0?
0
Hf
-20
20 50 You can plot the ac
-40 response but it yields no
-60
0
insight on what drives
arg H  f  -50
poles and zeros!
-80
-100
10 100 1k 10k 100k 1Meg 10Meg 100Meg
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Applying FACTs Now
 What is the gain when Vin is a dc voltage?
Voutt  s 
R1 R3
rC
Vin  s  R2 R4
C1
 The capacitor is open circuited, read the schematic!

R2 R4
H0 
R1  R2 R1 || R2  R3  R4
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Determine the First Time Constant
 Look at the resistance driving the storage element
1. When the excitation is turned off, Vin = 0 V
R1 R3
rC
R2 R4
R?
 1   rC   R1 || R2  R3  || R4  C1
Denominator calculation
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Determine the Second Time Constant
 Inspect the circuit and find the transformed short circuit
Voutt  sz   0
R1 R3
rC
Vin  sz  R2 R4
1
Z1 sC1
 If Z1 is equal to 0,
0 the output is nulled
1 1
rC  0 sz  
s z C1 rC C1 Numerator calculation
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Assemble the Terms
 You immediately have a low-entropy form
R2 R4
H0 
s R1  R2 R1 || R2  R3  R4
1
z 1
H  s  H0 p 
1
s  rC   R1 || R2  R3  || R4  C1
p
1
z 
rC C1 Way cool!
 We did not write a single line of algebra!
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Use Mathcad® to Check Results
R1  1k R2  22k rC  0.1 R3  150 R4  100 0
x y
||( xy )  C1  1F
x y
 20 50

20 log H1 i 2 
2  f k  10  40  
arg H 1 i 2  f k  
180

 
20 log H2 i 2  f k  10
1 0
R 4   rC 
s  C1 
 
180
   60 arg H 2 i 2  f k  

1
R 4 rC 
s  C1 R2
H( s )   80  50
R4  rC 
1  R1  R2
s  C1 
   R1 R2  R
1 3
R1  R2
R4  rC   100
s  C1 3 4 5 6 7 8
10 100 110 110 110 110 110 110
fk

R2 R4 C1 rC s  1
H2( s ) 
R1 R2  R1 R3  R1 R4  R2 R3  R2 R4  C1 R1 R2 R4 s  C1 R1 R3 R4 s  C1 R2 R3 R4 s  C1 R1 R2 rC s  C1 R1 R3 rC s  C1 R1 R4 rC s  C1 R2 R3 rC s  C1 R2 R4 rC s
 
 2  C1 rC  R1 || R2  R3 || R4  91.812 s
 
Superimposing both transfer functions,
 1  C1 rC  100 ns
R4 R2
matching should be perfect. If not,
H0 
R4  R1 || R2  R3 R1  R2
  0.079
there is mistake.
1  s 1
H1( s )  H0
1  s 2
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Fractions and Dimensions
 A 1st-order system follows the form
a1
1 s
N  s  a0  a1 s factoring
f t i a0 a0
H s   H s 
D  s  b0  b1 s b0 b1
1 s
b0
 A leading term (if any) carries the unit
a1
a1 1 s a1
1 s a0  s    N
a0 a0
Z  s   R0
time
b1
1 s b1 b1
b0 1 s  s    D
    b0 b0 time
Unitless Unitless
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2nd-Order System
 A 2nd-order system follows the form
 0  1 s   2 s 2 Factoring 0 1  a1 s  a2 s 2
H s  H  s  H0 Unitless
 0  1 s   2 s 2 Factoring 0 1  b1 s  b2 s 2
Carries the unit
 The second fraction is unitless
1 2
a1   s    1N   2 N a2   s 2    1N 21 N or  2 N 12N
0 0 time²
sum product
1 2
b1    s    1D   2 D b2   s 2    1D 21 D or  2 D 12D
0 0 time²
reactance 1 reactance 2
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Alternating the Reactance States
order circuit,
 In a 1st-order circuit there is one reactance
 it is either in a high-frequency state or in a dc state
s0 s
 In a 2nd-order circuit, there are two reactances

 we can consider individual states
C2 L1 C2 L1
s0 H0 L1 s H
C2 L1
 2
1
C2 L1
 21
C2
R? R?
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Introducing the Notation
 Set one reactance into its high-frequency state
 1 Reactance 1 is in its high-frequency state
2 What resistance drives reactance 2?

R?
 2 Reactance 2 is in its high-frequency state
1 What resistance drives reactance 1?

R?
 There is redundancy: pick the simplest result
b2   1
1 2 b2    2
2 1
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Example with Capacitors
 Assume the following 2-capacitor circuit
Vout  s 
R1 R1
rC s0 rC
Vin  s  C2 H0  1
C1
 Determine the two time constants while Vin is 0 V

R?
R1 rC  1  C1  rC  R1  b1   1   2
b1  C1  rC  R1   C2 R1
R?  2  C2 R1
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Determining the Higher-Order Term
 Place C1 in its high-frequency state and look into C2
R1 rC R?
Vin  0 V b2   1 21  C1  rC  R1  C2  R1 || rC 
C2
C1
 21   R1 || rC  C2
 Place C2 in its high-frequency

g q y state and look into C1
R1 rC
Vin  0 V C2 b2   2 12  C2 R1C1rC
C1
R?
 12  rC C1
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Denominator is Completed
 The denominator can be assembled
D  s   1  b1 s  b2 s 2  1  C1  rC  R1   C2 R1  s  C2 R1C1rC s 2
 Is there a zero in this network?
Vout  sz   0
1
R1 sz1  
rC rC C1
1 1
rC  0
Vin  sz  sC2 sC1 1
1 z1 
rC C1
sC1 Z1
 If Z1 becomes a transformed short, the response disappears
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Final Expression and Conclusion
 Gather the pieces to form the transfer function
1  srC C1
H s 
1  C1  rC  R1   C2 R1  s  C2 R1C1rC s 2
s
1
z
H  s  H0 2
s  s 
1  
0 Q  0 
 This expression was determined in a flashing time No algebra!
 We did not use KVL or KCL: inspection is easy
Fast Analytical Circuits Techniques Linear Circuit Transfer Function – A
for Electrical and Electronic Circuits Tutorial Introduction to Fast
– Vatché Vorpérian – Cambridge Analytical Techniques –Christophe
Press 2002 Basso – Wiley & Sons 2016
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Course Agenda
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A Buck Converter in Voltage Mode
 Replace the diode and the switch by the PWM switch
a c
Vout
rL L1
Control rC
Vin Rload
. .
p C2
Small-signal model
V. Vorpérian,
V Vorpérian "Simplified
Simplified Analysis of PWM Converters using Model of PWM Switch
Switch, parts I and II"
II
IEEE Transactions on Aerospace and Electronic Systems, Vol. 26, NO. 3, 1990
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Buck Input Impedance
 Inductance LoL lets you sweep the input to have Zin
VZin B2
Voltage
Ac block LoL
1GH
V(a,p)*V(d)/V(D0) Vc 5.00V
L1 rL
100uH 5.00V 10m 4.99V
12.0V 5.00V
10 a a 3 11 c c 4 5
12.0V
B1 B3 B4
417mV
Current Current Voltage
I(Vc)*V(d) I(Vc)*V(D0) rC
12.0V D0 V(3,p)*V(D0) 30m
-582nV
I1 Vin p R3
p 4.99V
AC = 1 {Vin} d parameters 6
5
0V
C2
V4 V5 Vin=12 47uF
{D} AC = 0 D=0.417
 In this mode, d̂ is equal to zero
Vin  s  Source B2 and B1 are zero

Simplify schematic
Node p is ground
I in  s  dˆ  0
V  a, p   Vin Check ac response
Input impedance
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Simplifying and Rearranging is Key
 Install the dc transformer to obtain Zin
Excitation IT
rL L1 C2
VT  s 
VT Rload Z in  s  
1 D0 I in  s 
rC
R
Response
 Reflect elements to the p

primaryy side
rL L1
IT C2 D0 2
D0 2 D0 2
Rload
l d
VT D0 2 1 D0
rC
D0 2
Dc input resistance
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Start with s = 0 – Draw Circuit in dc
 Short the inductor, open the capacitor
rL L1
IT
D0 2 C2 rL  Rload
VT
Rload
D0 2
R0 
rC D0 2
D0 2
 For the time constants, suppress the excitation, IT = 0

rL L1 rL L1
D0 2 D0 2 R?
C2 Rload
l d
C2 Rload
l d
R? D0 2 D0 2
 rC  RLoad  rC L1 rC
 2  C2 D0 2   1 
2 D0 2 D0 2   D0 2
 D 0 
Input impedance
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Higher Order Coefficients
 Avoid indeterminacy with  1 : use  2 instead
 Determine  12
rL
L1
C2
 2
1 R?
High-frequency
High frequency state
D0 2 L1
R?  12 
Rload D0 2  
D0 2
rC
D0 2
 r  RLoad  L1
b2   2 12  C2 D0 2  C  2 0
 D0  
2
 D 0
 2  rC  RLoad  L1 
D  s   1  C2 D0    2  s  1  sC2  rC  RLoad 
 D0   
2
  D 0
Input impedance
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The Numerator is of 2nd-Order Type
 Null the response across the current source
Degenerate case, short the generator’s terminals!
rL L1
C2 D0 2
D0 2 D0 2 Use Fast
Rload
Analytical Circuits
VT  0 IT D0 2
rC Techniques!
D0 2
 L1  2 rC  Rload 
N s  1 s   C2  rL || Rload   rC    s  L1C2 
 L
r  R load   rL  Rload 
C. Basso, “Introduction to Fast Analytical Techniques, Application to Small-Signal Modeling”, APEC 2016 Professional Seminar
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Assemble the Pieces
 The transfer function dimension is ohm
2
s  s 
1  
0 Q  0  1 rL  Rload
Z in ,OL  s   R0 p  R0 
1
s  rC  RLoad  C2 D0 2
p
100 100°
L1C20  rC  Rload 
Q
L1  C2  rL rC  rL Rload  rC Rload  Z in ,OL  f 
1 rL  Rload
0 
L1C2 rC  Rload dBΩ
Z in ,OL  f 
29.2 dBΩ
0 -90°
10 Hz 10 MHz
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Closed-Loop Input Impedance
 We want the input impedance once the loop is closed
H s
Control to
Vout  s 
output
D s
Z in  s 
C2 R3
GPWM C1 R2 R1
C3
Verr  s   Voutt  s  G  s 
G s
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Stabilize the Buck with a Type 3
10 kHz crossover is selected for the compensation
 A 10-kHz
L2 R1
v out
  z1  s 
1   1 
parameters 100u 20m

20.0V 5.20V
a c 5.00V

1 2 7
5.20V
Vout=5
 s  z2 
G  s   G0
260mV
Pout=50 d
4
p
  s 
Rload=Vout^2/Pout PWM switch VM R2
Rupper=10k 50m
s
1   1  
X1
5.00V
AOL=1T PWMVM R4
  p1 
V3 8
L = 100u {Rload}
Vp=2
 p2 
{Vin}
GAIN
XPWM
Fs = 100k
fc=10k GAIN
Neg. sign
K = 1/Vp C1
Vin=20 470u
521mV
Gfc=-22 5
PM=70
PS=-119
boost=PM-PS-90
v out
v out dB °
Tf 
C3 AC = 1
{C2} V1
G=10^(-Gfc/20) 60.0 180
pi=3.14159
T  f 
Vin
C2 R7
{C1} 5.00V
2.50V {R2} R9
fz1=540
5 0 3
{R3}
9
fz2=230 R5 5.00V 30.0 90.0
fp1=6.8k E1 {Rupper} 12
{AOL} 2.50V C5
fp2=fp12
m
10 {C3}
C1=1/(2*pi*fz1*R2) 0 0
C2=C1/(C1*R2*2*pi*fp1-1)
C3=(fp2-fz2)/(2*pi*Rupper*fp2*fz2)
R3=Rupper*fz2/(fp2 fz2)
R3=Rupper*fz2/(fp2-fz2) 2.50V
f c  10 kHz fc
-30.0 -90.0
 m  60
11 Rlower
a=sqrt((fc^2/fp1^2)+1) Vref 10k
2.5
b=sqrt((fc^2/fp2^2)+1)
c=sqrt((fz1^2/fc^2)+1)
T s  H sG s

d=sqrt((fc^2/fz2^2)+1)
-60.0 -180
G s
R2=((a*b/(c*d))/(fp1-fz1))*Rupper*G*fp1
G0=((R2*C1)/(Rupper*(C1+C2)))*c*d/(a*b) 1 10 100 1k 10k 100k
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Use Large-Signal Model for Reference
U the
 Use h PWM switch
i h to check
h k the
h response
VZin H L2 R1
100u 10m vout
5.00V
a c
4 5
5.10V 5.10V
20.0V
255mV
d
L1 2
p
PWM switch VM R2
1T
20.0V
d f  X1
50
50m
5.00V R4
10 PWMVM
7 {Rload}
I1 L = 100u
GAIN XPWM
AC = 1 Fs = 100k
GAIN
Vin K = 1/Vp C1
{Vin} 470u
511mV
3
Setup for input Verr  f 

impedance
measurement.
G f 
compensator
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Loop Gain Decreases as f Increases
I t impedance
 Input i d i negative
is ti att low
l ffrequencies
i only
l
Z in,CL  f 
55.0
45.0
(dBΩ) 35.0
25 0
25.0
15.0
0
Z in ,CL  f 
-40.0
(°)
-80.0
-120
Z in  f   0
Simulation -160 Z in  f   180
results 1 10 100 1k 10k 100k
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Why Does Zin Become Positive?
 The below expression only holds if Pout is truly constant
Vin 2
Rin   Infinite input
p voltage
g rejection
j
Pout
 It is true at dc, where loop gain is very high
s  20
1
Rload z ASC ,CL  f 
ASC ,OL  s   D
Rload  rL s  s 
2  40
1  
Audio 0Q  0   60 Rejection
susceptibility
dB  weakens
 80
ASC ,OL  s   100

Strongg rejection
j
ASC ,C L  s  
1 T s  120
3 4 5 6 7
1 10 100 110 110 110 110 110
 Loop gain quickly drops as f increases ASC, audio susceptibility
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Determining the Closed-Loop Impedance
 Update the large-signal model with linear sources
B2
VZin Voltage
R8 L2 R1
vin V(a,p)*V(d)/{D} Vc vout
1u 100u 10m 5.00V
c
a 16 17 c 5
a
20.0V B1 B3 5.10V
B4
Current Current Voltage
I(Vc)*V(d) I(Vc)*{D}
L1 V(16,p)*{D}
1T R2
p 50m
20.0V
10
p 5.00V R4
7 {Rload}
I1
AC = 1
R3
Vin C1
1u
{Vin} 470u
 B2 needs to be linearized as d and Vin now include ac

Vin  vîn   D0  dˆ   dV
ˆ  vˆ D
in in 0
Analytical analysis
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Simplified Circuit Helps Analysis
 Final closed-loop schematic to perform analysis
VZin
Vin  s 
L2 R1
vin Vc 100u 10m vout
c
2 5
IC  s  Z RLC  s 
L1
1T R2
50m
14
10 B3 R4
B1 B4 7
I1 Current {Rload}
Current Voltage
AC = 1 {Iout}*V(d) I(Vc)*{D}
V(vin)*{D}+V(d)*{Vin}
Vin C1
{Vin}
I C  s  D0
470u
H p s
D s
 Sanity check Verr  s  Vout  s 

GPWM G s (-)
is mandatory!
ZRLC(s) is the filter input impedance
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Derive Equations for Individual Variables
 The duty ratio is linked to Vout by the error amplifier G
D  s   G  s  GPWM Vout  s 
 From the previous slide, we have
H s Control-to-output
Vout  s    D0Vini  s   D  s  Vini  function of the buck
Vin Divide by Vin to get
the transmittance Hp
D0  GPWM G  s  H  s  Vin  s 
D s 
Vin  GPWM Vin G  s  H  s 
 Current in terminal c is B4 applied to the RLC network
D0  GPWM G  s  H  s  Vin  s 
Vin  s  D0  Vin
Vin  GPWM Vin G  s  H  s 
IC  s  
Z RLC  s 
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Substitute Expressions and Rearrange
 The input current depends on the two input sources:
I in  s   I out D  s   I C  s  D0
Buck dc Static duty
output current ratio
 Substitute D(s) and IC(s) previously obtained

D0  GPWM G  s  H  s  Vin  s 
D0  Vin
D0  GPWM G  s  H  s  Vin  s  Vin  GPWM Vin G  s  H  s 
I in  s   I out  D0
Vin  GPWM Vin G  s  H  s  Z RLC  s 
T s
Factor
1 I in  s 
D0 I out GPWM G  s  H  s  D0 2  GPWM G  s  H  s  
   1  
Z in  s  Vin  s  Vin 1  GPWM G  s  H  s  Z RLC  s   1  GPWM G  s  H  s  
Rearrange V
Vini  out
D0
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Final Expression for Zin in Closed Loop
 Final expression involves two contributors
1 D0 2 T  s  D0 2  1 
   
Z in  s  Rload 1  T  s  Z RLC  s   1  T  s  
 In dc or low frequency, T(s) is >> 1

1 D0 2 T  s  D0 2 Z in  s   
Rload
 
Z in  s  Rload 1  T  s  Rload s0
D0 2
 As s exceeds fc and increases,

increases T(s) is << 1
1 D0 2  1  D0 2 Z RLC  s 
    Z in  s  
Z in  s  Z RLC  s   1  T  s   Z RLC  s  D0 2
1 2
s  s 
No gain means open-loop operation 1  
0 Q  0 
Same as D  s   0 Z RLC  s    rL  Rload 
1  s  rC  Rload  C1
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Plot the Closed-Loop Input Impedance
 Magnitude becomes open-loop plot in high-frequency
100 100
80
Positive
Z in ,O L  f  0
60
Z in ,O L  f 
Z in ,CL  f 
40
 100
Z in ,CL  f 
20 Neg area
Neg.
 180
3 4 5 6 7 3 4 5 6 7
1 10 100 1´ 10 1´ 10 1´ 10 1´ 10 1´ 10 1 10 100 1´ 10 1´ 10 1´ 10 1´ 10 1´ 10
 Argument
A meets open-loop
l plot
l ini hi
high-frequency
hf
 Negative argument occurs only at low-frequency
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Open-Loop Output Impedance
 What is the buck converter output impedance?
L1 Z out  s 
Vin C2 Rload
D
Voltage mode
Voltage-mode
 Consider parasitic elements for L and C
I out  s 
Vout  s 
L1 C2
response
Vout  s  Z out  s  
Rload
I out  s  excitation
rL rC
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Buck Output Impedance
 Let's find the term R0 in dc: open caps, short inductors
VT
rL Rload VT IT R0   rL || Rload
IT
 The zeros cancel the response

Vout  s z   0 ?  L  rL
sL1  rL  0 rL  s 1  1  0 z 
1
L1
1  rL 
sL1 I out  sz  1
sC2 1 z 
Rload  rC  0 1  srC C2  0 2
rC C2
sC
C2
rL rC  L1 
N  s    1  s  1  srC C2 
 rL 
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Low-Frequency Time Constants
 All elements are in their dc state
 Look at R driving L then R driving C
1 2
R? R?
L1 C2 Rload L1 C2 Rload
rL rC rL rC
R  rL  Rload R   rL || Rload   rC
L1
b1   C2  rL || Rload   rC 
rL  Rload
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High-Frequency Time Constants
 Set L1 in high frequency state and look at R driving C2
 21  12
R? R?
L1 C2 Rload L1 C2 Rload
rL rC rL rC
L1
 21  C2  rc  Rload   12 
rL  Rload || rC
L1 L1
b2  C2  rc  Rload   C2  rL || Rload   rC 
rL  Rload rL  Rload || rC
b2   1 21 redundancy b2   2 12
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Final Expression for ZOUT
 We have our denominator!
 L1  2 rC  Rload 
D s  1 s   C2  rL || Rload   rC    s  L1C2 
 L
r  R load   rL  Rload 
 The complete transfer function is now:

 L1 
1  s  1  srC C2 
Z out ,OL  s    rL || Rload   rL 
 L1  2 rC  Rload 
1 s   C2  rL || Rload
l d   rC 
   s  L1C2 r  R 
Open loop  rL  Rload   L load 
 This is the open-loop output impedance

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A Closed-Loop System
 The converter fights output perturbations
I out  s  Z out ,OL  s 
+ -
Vref  s  G(s) H(s) Vout  s 
+

 Because the system is linear, superposition applies

TOL  s 
Vout1  s   Vref  s  Vout 2  s   I out  s  Z out ,OL  s   Vout  s  TOL  s 
1  TOL  s 
TOL  s  Z out ,OL  s 
Vout  s   Vout1  s   Vout 2  s   Vref  s   I out  s 
1  TOL  s  1  TOL  s 
Z out ,CL
 The loop gain affects the final expression
Open loop
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Loop Gain Impact on the Impedance
 Plots superimpose as loop gain approaches 0
0
Z out ,OL  f 
 20
f0
 Z outCL i 2  f k   rC
20 log   40
 1  rL
 Z outOL  i 2  f k  
20 log   60 Peaking is gone
 1 
i closed-loop
in l dl
 80
Z out ,CL  f 
 100
3 4 5
10 100 110 110 110
fk
 Having gain at f0 is important to damp the filter

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Course Agenda
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A Design Example with a Buck
 Assume the following 5-V/50-W buck converter
X2
PSW1 L2 R1
22u 10m vout
> 8 1 2
vout
iin
R2
20
20m
Vin 7
20 R4
D1 3
{Rload}
mbr1645
X1 C1
680u
+
COMPAR
-
4 5
V(err)>1.9 ?
B1
1.9 : Vramp
V( )
V(err) Fsw  100 kHz
kH
 Specifications are less than 15 mA peak of input ripple

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What is the Necessary Attenuation?
 Use SPICE to analyze the input current signature
14.0 I in , rms  5.4 A iin  t  .FOUR 100kHz I(V4)
11.13 A
10.0
(A) I1  4.94
4 94 A peak
6.00
I in  15 mA peak
2.00
2 00
-2.00 10 µs
10.054m 10.063m 10.072m 10.082m 10.091m

Attenuate by 3m
I ac  I in , rms 2  I dc 2  5 4 2  22.85
5.4 852  4.6
46A or 50 dB
Current in the capacitor
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Where do you Place the Double Pole?
 Insert a LC filter to attenuate the pulsating current
I out
L 2
C I in  0 
I in  
I out   
 Position f0 to provide a 50-dB

50 dB attenuation at 100 kHz
f0  A filter  f SW  3m  100k  17 kHz
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Select the Filter Elements
 The resonant frequency lets us chose L and C
1
LC   8.34  1010 s 2
4 2 f 0 2
 Component selection depends on volume, cost etc.
 the capacitor sees the buck ac input current
 the inductor ripple current is small, consider dc only
Kemet F series
L  22 µH
I in  3 A
4 x 10 µF
Itot,rms
tot rms > 40 A 7447714220 Würth
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Always Consider Component ESR
 We can show that the complete attenuation is
1
rC 
2
 C1 
rL I out 2
rC I in
I in 
1 2 L1
I out
 C L  1 
2 2
r  r    L 
C1  C1
2
L C
 Check if attenuation is ok with selected components

5 mΩ
X4 rC   1.3 mΩ
4 I in
 50.8 dB at 100 kHz
I out
rL  50 mΩ
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Control-to-Output Transfer Function
 The addition of the filter affects the converters
H s
vîn
vôut
rL rC s
1
z
L C
H  s   Vin 2
s  s 
1  
0 Q  0 
d̂ Buck control-to-output
G s TF without filter.
 The small-signal model needs an update
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A More Complex Architecture
 The converter becomes a 4th-order system
vout
L2 R1
vin V(c) 22u 10m
Z th  s 
9 5
Vc
R2
R3 20m
R8
50m 11
1.5m B3 R4
B1 B4 7
Current {Rload}
Current Voltage
2 15 {Iout}*V(d) I(Vc)*{D} V(vin)*{D}+V(d)*{Vin}
L1 C4 C1
d 22uH 40u 680u
Z RLC  s  H p s
Vmod
AC = 1
 Simplify the circuit before solving the function
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A Simplified Circuit
 You can reuse previously-determined transfer functions
Vin  s  IC  s  Vout  s 
Zth  s  D  s  I out I C  s  D0 H p s

Vin  s  D0  d  s  Vin
Small-signal
Small signal model
 Apply KVL and KCL to obtain the new expression
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Determine and Substitute Variables
 Determine the input voltage expression Vin(s)
Vin  s    Z th  s   I out D  s   I C  s  D0 
 Terminal c current is the voltage V(c) divided by ZRLC(s)

Vin  s  D0  D  s  Vin  V  s  D0  D  s  Vin 
IC  s   Vin  s    Z th  s   I out D  s   in D0 
Z RLC  s   Z RLC  s  
D  s  Z RLC  s  Z th  s  I out  D0Vin D  s  Z th  s 

Vin  s  
Z th  s  D0 2  Z RLC  s 
 The
Th output
t t voltage
lt involves
i l the
th RLC transmittance
t itt Hp
Vout  s   Vin  s  D0  D  s  Vin  H p  s 
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Final Expression is Complicated
 Rearrange the final transfer function
s D0 2
1 1 Z th  s 
Vout  s  R V z Rload
 load in
D s Rload  rL  
2
D 2
1  sC1  rL  Rload 
1
s s
   1
0
Z th  s 
0 Q  0  Rload  rL s  s 
2
1  
Classical buck, no filter
0 Q  0 
Filter effect
 Lf  1 Lf 1
1  srCf C f  1  s r  Qf 
C f rCf  rLf
0 f 
Lf C f
Z th  s   rLf  Lf 
1  sC f  rCf  rLf   s 2 L f C f 1 rLf

 z1  z 
2
rC f C f Lf
 Filter output impedance impacts the transfer function

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Plots Show a Distorted Transfer Function
 Mathcad and SPICE match each other quite well
40
Vout  f 

D f 
100
20
Vout  f 



0
D f  0
 20
 100
 40
3 4 5 3 4 5
10 100 110 110 110 10 100 110 110 110
fk fk
Control-to-output transfer function
 The notch occurs because Vin drops at resonance
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The Extra Element Theorem at Work
 What is the EET principle?
 Identify an element whose presence complicates the analysis
 Calculate the transfer function with that element removed
 Apply a correction factor k to the transfer function: voilà!
H s 1
s
vîn  0 z
H  s  Z 0  Vin
ˆ vout 2
th
s  s 
rL rC 1  
0 Q  0 
L C
Z th  s   0 d̂ H s  H s Z k
th  0
G s
Correction factor
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Determining the Correction Factor
 The correction factor requires two terms:
1. The converter input impedance obtained in open-loop
2 The converter input impedance obtained for Vout(s)=0
2.
Excitation IT
rL L1 C2
VT Rload
1 D0
rC
Response
p
d s  0
 The open-loop impedance has already been derived

2
s  s 
1  
R r 0 Q  0 
Z D  s   load 2 L
D0 s
1
p
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The Null Propagates in the Circuit
 Despite excitation with IT, there is no ac response
 This is the principle behind nulling the response
excitation Vin  s  0V 0V
IT L1 rL
0
IC  s   0
I out  s   0
rC
VT Rload
response
D  s  I out I C  s  D0 Vin  s  D0  D  s  Vin
C2
Vout  s   0
 0 A in the load and 0 V at rL-rC implies 0 V across L1

Vin  s 
Vin  s  D0  D  s  Vin  0 D  s    D0
Vin
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Expression for ZN Comes Easily
 Substitute/rearrange test and voltage expressions
Vout
I T  s   I out D  s   I C  s  D0 Rload
IT  s  I out D0
Vin  s  
D  s    D0 VT  s  Vin Vout
Vin D0
 The input impedance ZN for a nulled response is:

Rload
ZN s   2 Nulled response implies infinite input rejection
D0 It is the incremental input resistance seen before
 We already had this with the SPICE simulation

2
bulk  Vout 
parameters B1  
Vin 2
   0 2   load2
Vin D R
100 Current R0  
Pout=50W {Pout}/V(bulk) Pout Vout D0
For a buck
R0  200 Ω
Rload
l d
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Final Expression with EET
 The final expression includes the filter impact
Z th  s 
1
s Rload
1
Vout  s  Rload z D0 2
 Vin
D s Rload  rL s  s 
2
Z th  s 
1    1 2
0Q  0  s  s 
1  
Rload  rL 0 Q  0 
D0 2 1
s k
p
Comparison between EET and full formula
 14  13
410 810
 14 610
 13 Argument
210
410
 13
difference
0
 13
210
 14
 210
 14
Magnitude 0
 410
difference  13
 210
 14  13
 610  410
3 4 5 3 4 5
10 100 110 110 110 10 100 110 110 110
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What is the Impact on Stability?
 When adding the filter, the loop gain is awfully ugly!
200
40
100
20
(dB) 0 (°) 0
 20
 100
 40 Tf  T  f 
 200
3 4 5 3 4 5
10 100 10 10 10 10 100 10 10 10
Z th  s   Z N  s 
Filter damping is necessary: Z th  s   Z D  s 
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The Output Impedance is Affected
 Closed-loop output impedance peaks as filter resonates
0
 20
 Z outCLF  i 2  f k  
20 logg   40
 1  Without
 Z outCL i 2  f k   filter
20 log   60 Z th  s 
 1  1
Ze  s 
Z out  s   Z out  s  Z s 0
 80 th   Z s
1  th
Z in ,CL  s 
 100
3 4 5
10 100 110 110 110
Filter damping is necessary: Z th  s   Z e  s 
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Course Agenda
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Check Filter Output Impedance
 Plot shows that design inequalities are not respected
60
Open-loop
((dBΩ)) Z th  s   Z N  s  impedance
No!
Z th  s   Z D  s 
ZD  f 
40
Nulled-output
 Z th  i 2  f k   Input impedance
20 log 
 1  ZN  f 
 Z inOL i 2  f k   20
20 log 
 1 
 Z N( s) 
20 log 
 1  0
Q f  14.4
 20
Z th  f 
3 4 5
10 100 110 110 110
fk
Gain and phase distortion of k must be minimized
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Filter Peaking Also Affects Zout
 Inequality for the closed-loop Zout is not respected
((dBΩ)) Q f  14.4 Input impedance

with shorted output
20 Ze  f 
 Z th  i 2  f k  
20  logg 
 1 
0
 Z e i 2   f k  
20  log 
 1 
 20
Z th  f 
 40
3 4 5
10 100 1 10 1 10 1 10
fk
 Filter dampingg must ensure Z th  s   Z e  s 
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Look at the Correction Factor k
S
 Sweep f th
Qf for the lleastt phase
h d ggain
and i deviation
d i ti
0
Z s
1  th
Rload Q f  0.9
D0 2  0.5
k s 
Z th  s  (dB)
1 2
s  s  1
1  
0Q  0  1 3 dB k  f
Rload  rL
D0 2 s
Magnitude distortion
-1.3 
 1.5
1 3 4 5
p 10 100 10 10 10
10
 s  s  Ph
Phase di
distortion
i
1   1  
 
Z th  s   R0 
z1   z2  5 -4.9°
2
s  s  (°)
1   0
0 Q f  0 
5
-6°
Qf 
Lf 1 Q f  0.9 k  f 
C f rCff  rLff 10
3 4 5
10 100 10 10 10
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Determine Maximum Filter Peaking
 Determine maximum peaking with selected Qf
  
R0 Q f
Z thh  2
  z1 2 0 2   z2 2
MAX
z z
1 2
0
50 mΩ 22 µH Q f  14.4
Z th MAX
 10.7 Ω
1.3 mΩ
Damp
Vin
Q f  0.9
40 µF
Z th MAX
 0.7
07Ω Th ttargett
The
 What damping elements will reduce Z th MAX to 0.7 Ω?

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Available Damping Techniques
 Damping means increasing the loss per cycle
 Increase power dissipation R damp
rLf Lf rLf Lf
rCf rCf
Vin Rdamp Vin
Cf Cf
Parallel Series
 rC-Cf parallel damping: Rdamp dissipates power

 rL-Lf parallel damping: Rdamp adds a zero and alters filter
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Adding a Blocking Capacitor
 The series capacitor blocks the dc component
 Literature recommends Cdamp = 10 x Cf
rLf Lf
C f  40 µF
rCf Rdamp
x10
Vin
Cf Cdamp
Cdamp  400 µF
 Cdamp can be extremely bulky Optimum

 In ac Rdamp dissipation can be an issue combination?
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Analyzing the Filter Output Impedance
L1 rL
Z out  s 
1 C3 Cdamp
0V
3 rC Rdampp 2
Three storage elements with independent state variables: 3rd order system.
D  s   1  b1 s  a2 s 2  a3 s 3
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Start with Dc Analysis s = 0
Z out  s 
L1 rL response
C3 Cdamp stimulus
0V IT
rC Rdamp Rinf
R0  rL || Rinf
Rinf is the current source output resistance and ensures a dc path when IT = 0
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Determine Time Constants
 Turn excitation off, current source is set to 0 A
L1
rL
R? R?
C3 Cdamp
0V Rinf
rC Rdamp
 3  C3  rC  rL || Rinf   2  Cdampp  Rdampp  rL || Rinf 

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Assemble Time Constants for b1
L1
rL
R?
C3 Cdamp
0V L1 Rinf
1 
Rinf  rL rC Rdamp
D  s   1   1   2   3  s   1 21   1 31   2 32  s 2   1 21 312  s 3
 Cdamp  Rdamp  rL || Rinf   C3  rC  rL || Rinf 

L1
b1   1   2   3 
i f  rL
Rinf
Rinf  
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Second-Order Time Constants
D  s   1        s           s      s
1 2 3
1
1 2
1
1 3
2
2 3
2 1 12
1 2 3
3
rL
L1 L1
rL
t 1
tau1 R? t 1
tau1 R?
C3 Cdamp C3 Cdamp
0V 0V
tau3 rC Rdamp tau2 tau3 rC Rdamp tau2
 21  Cdamp  Rdamp  Rinf   31  C3  rC  Rinf 

rL
L1
 1
tau1 R? Reactance 1 is in
C3 Cdamp its high-frequency state
0V
2
tau3 rC Rdamp tau2
What resistance
drives reactance 2?
R?
  C3  rC  Rdamp || rL || Rinf 
2
3
Rinf is not added for clarity purposes
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Assemble Time Constants for b2
Cdamp  Rdamp  Rinf 
L1
b2  b2   1 21   1 31   2 32
Rinf  rL
L1
 C3  rC  Rinf 
Rinf  rL
 Cdamp  Rdamp  rL || Rinf  C3  rC  Rdamp || Rinf || rL 
Rinf   b2  L1  Cdamp  C3   Cdamp  Rdamp  rL  C3  rC  rL || Rdamp 
rL
L1
b3     1 12
1 2 3
tau1 R?
HF state C3 Cdamp
 312  C3  rC  Rdamp || Rinf  tau3 rC Rdamp tau2

What resistance
drives reactance 3?
t 12t 3
tau12tau3
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Build the 3rd-Order Denominator
 Gather time constants and rearrange to form D(s)
D  s   1  b1 s  b2 s 2  b3 s 3
b1  Cdamp  Rdamp  rL   C3  rC  rL 
b2  L1  Cdamp  C3   Cdamp  Rdamp  rL  C3  rC  rL || Rdamp 
b3  1 Cdamp  Rdamp  Rinf  C3  rC  Rdamp   L1Cdamp C3  rC  Rdamp 
L
Rinf
D  s   1  s Cdamp  Rdamp  rL   C3  rC  rL  
 s 2  L1  Cdamp  C3   Cdamp  Rdamp  rL  C3  rC  rL || Rdamp  
 s 3  L1Cdampp C3  rC  Rdampp  
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Determine N(s) Swiftly with Inspection
Z2  s   0
Z1  s   0 L1 Response
C3 Cdamp is nulled
VT  0
rL rC Rdamp
Z3  s   0
Three zeros when  

Z1 sz1  0  
Z 2 s z2  0  
Z 3 sz3  0
 L1 
N  s    1  s  1  srC C3  1  sRdamp Cdamp 
 rL 
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Run a Sanity Check to Verify Results
N s
Z out  s   R0 The complete low-entropy transfer function is thus
D s
 L1 
1  srC C3  1  sRdamp
d Cddamp   1  s 
Z out  s   R0  rL 
1  s Cdamp  Rdamp  rL   C3  rC  rL    s  L1  Cdamp
2
 C3   Cdamp  Rdamp  rL  C3  rC  rL || Rdamp    s 3  L1Cdamp C3  rC  Rdamp  
The raw transfer function is Z out  s   Z1  s  || Z 2  s  || Z 3  s 

60
40
50
 Href i 2  f k  
 
20 log  180
20 arg H1 i 2  f k  
   
 H1 i 2  f k   0
 
180
20 log  0 arg Href i 2  f k  
   
 20  50
 40
3 4 5 6
10 100 110 110 110 110 3 4 5 6
10 100 110 110 110 110
fk
fk
Raw and full TF plots are superimposed: good to go!
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Trying to Rewrite the Transfer Function
In this 3rd-order system, it is difficult to find a canonical form such as
N s
Z out  s   R0
  s  
2
 s s
 1   1    
 p   0 Q  0  
If rL is larger than rC and CdampRdamp larger than C3rL
D  s   1  sCdamp Rdamp  s 2 L1  Cdamp  C3   s 3 L1Cdamp C3 Rdamp
Unfortunately, 1  sCdamp Rdamp does not dominate at low freq.
Cannot factor the 3rd-order denominator
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Neglect Parasitic Terms rL and rC
S f the transfer
 Simplify f function
f considering 0 rL and rC
 L1 
1  srC C3  1  sRdamp Cdamp  1  s 
Z out  s   rL  rL 
1  s Cdamp  Rdamp  rL   C3  rC  rL    s  L1  Cdamp
2
 C3   Cdamp  Rdamp  rL  C3  rC  rL || Rdamp    s 3  L1Cdamp C3  rC  Rdamp  
 Factor the L1/rL term

 r 
1  sR dampCdamp   L  1
Z out  s   rL s
L1  sL1 
rL 1  s Cdamp  Rdamp  rL   C3 rL   s 2  L1  Cdamp  C3   Cdamp  Rdamp  rL  C3  rL || Rdamp    s 3  L1Cdamp C3 Rdamp 
  
 Have rL go to zero
1  sRdamp Cdamp
Z out  s   sL1
1  sCdamp Rdamp  s 2 L1  Cdamp  C3   s 3  L1Cdamp C3 Rdamp 
 Consider Cdamp = nC3

1  sRdamp nC3
Z out  s   sL1
1  sRdamp nC3  s 2 L1C3 1  n   s 3  L1nC32 Rdamp 
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Rearrange Expressions
 Determine the magnitude of this transfer function
L1 2 nRdamp C3  jL1
Z out  j  
C L 
3 1
2
 C3 L1 2 n  1  j  C3 Rdamp n  1  C3 L1 2 
 L  nR C    L  
2 2 2
Z out   
1 damp 3 1
mag1
C L   C L  n  1   C R  n  1  C L  
2 2 2 2 2 2
3 1 3 1 3 damp 3 1
 Check with Middlebrook’s definitions

L1 Rdamp s 1
R0  Q p s  0 
C3 R0 0 L1C3
p  s  1  nQp  s  
Z out  s  
1  nQp  s   1  n  p  s   nQp  s 
2 3
x 1  n2Q 2 x 2 
Z out    R0 x mag2
1  1  n  x    xnQ 1  x  
2 2 2
2 0
 
Design Techniques for Preventing Input-Filter Oscillations in Switched-Mode Regulators, R.D Middlebrook, Powercon, May 1978
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Always Run a Sanity Check
 Check if expressions are ok versus Mathcad® calculations
60
 Mag1 2   f k  
20 log 
   40
 Href  i 2  f k  
20 log  20
  
 Mag2 2   f k  
20 log  0
  
 Rload 
20 log   20
  
 40
3 4 5
1 10 100 110 110 110
fk
 Compare analytical results versus raw magnitude expression

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Course Agenda
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The Damping Resistor Affects Q and 0
 The damping resistor value changes the resonant frequency
Rdamp  
1
L1 No loss 0 
Rdamp L1C3
Q
C3
Rdamp  0
Cdamp 1
No loss 0 
L1  C3  Cdamp 
Q
 There must be a RdampCdamp couple optimizing Q

 What is the minimum in the maximum (minmax) peaking of |Zout|?
 For what optimum Q value does it occur and at what frequency?
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Changes Induced by Damping Resistor
Pl magnitudes
 Plot i d versus various
i f
Q factors, Cdamp = 10C3
 Mag3( x0) 
20 log  Rdampp  0 Z out  f , Q 
  
Q  100
 Mag3( x0.01) 
20 log 
   60 Rdamp
 Mag3( x0.1) 
20 log  decreases
  
 Mag3( x1) 
20 log 
   40
 Mag3( x10) 
20 log  Qopt
  
 Mag3( x100) 
20 log 
   20
 Mag3 xQopt  
20 log 
  
opt
n  10 0
0.1 1
 0
10
x
This point is It is the point at which

independent of Q peaking is the lowest!
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Optimum Peak Depends on Cdamp
 Optimum Zout magnitudes versus different values of n
max
Z out  f , n  opt
n 1  Vin 2 
20 Log
L  
 Mag5( x1)  40
20 log
 


 out 
P
opt n5
 Mag5( x5) 
20 log 
   30
 Mag5( x10)  opt n  10
20 log 
  
 Mag5( x100)  opt
20 log 20
  
 Rload 
n  100
20 log 
  
10
Q  Qopt
0
0.1 1 10
 0
x
 There is an optimum Rdamp and n to match a given Zout

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Determine the Optimum Frequency
 The frequency at which the minmax occurs is immune to Q
 Calculate the sensitivity of Zout to Q and cancel it
 Work on Zout² to get rid of square roots
 
2
1  Q x 
2 2 2 2
 
d d  2 x n 
Z out  Q 
2
 R0
dQ dQ  1  1  n  x 2    xnQ 1  x 2  
2 2 

   
2 3 6
 2
 2 2
 2
 
d Qn x nx x
Z out  Q  
2
0
dQ D Q 
nx 2  2 x 2  2  0
x2  n  2  2
The point at which   2 2
2 0 
x
2n
Qopt occurs is: opt
2n  2  n  L1C3

x
0
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Calculate the Magnitude at opt
 Update the magnitude definition to have |Zout| at opt
opt 2
x 1  n2Q 2 x 2 x 
Z out    R0 0 2n
 
2
1  1  n  x 2    xnQ
2
 Q 1  x 2
2 2  n 2 2  n This is the value

Z out optp  
L1
R0 
n n C3 of |Zout| at opt
 We want to minimize |Zout| at opt

 Differentiate Zout² with respect to x², find the optimum Q
 Replace A  x 2 and A  x
d out  
Z A

d
2
A 1  n Q A
2 2
0
2
dA R0 dA 1  1  n  A   n AQ 1  A  
2
   
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Determine the Optimum Value of Q
brute force differentiation with Mathcad ®
 Apply brute-force
d Z out  A   AQn   2 A3Q 2 n 2  A2 Q 4 n 4  2 A2 Q 2 n3  A2 n 2  2 A2 n  A2  2 AQ 2 n 2  1
2 4
 0
dA R0 D
Extract Q
 AQn
AQ 
4
 2 A3Q 2 n 2  A2 Q 4 n 4  2 A2 Q 2 n3  A2 n 2  2 A2 n  A2  2 AQ 2 n 2  1  0
 A3 n5  A3 n  2 A  2 A2  2 A3  2 An  2   An 2  A2 n3  A3 n 2
Qopt 
A2 n 4  A4 n 4
2
A Result from
2n
3n 2  10n  8  4  3n  2  n  Dr Middlebrook
Qopt  
2n  n  4 
2
2n 2  4  n 
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Apply the Technique to the Buck
 The target is to reduce the filter impedance peak to 0.7 Ω
Lf
 
R0  R0  R0  R0 2  4  Z out 
2
Cf 
n    3.5
mm
 Zout mm 
2
Z out 2 2  n
mm

R0 n2 target
Rdamp  R0 Qopt  0.487 

 4  3n  2  n 
Qopt   0.65 Cdamp  nC f  141µF
2n 2  4  n 
 This is a rather large capacitance value

 An electrolytic capacitor and its ESR can do the job
 Watch for temperature
p effects as ESR increases at low temp!
p
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Check Margins with ZD and ZN
 The overlap is gone for both impedances
60
(dBΩ)
ZD  f 
40
 Z th  i 2  f k  
20 log 
 
ZN  f 
1
 Z inOL i 2  f k   20
20 log 
 1 
 Z N( s) 
20 log 
 1  0
 20
Zth  f 
3 4 5
10 100 110 110 110
fk
Gain and p
phase distortion of k are minimized
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Check Margin with Ze
 The output impedance should not be affected by the EMI filter
60
damped
p
(dBΩ) filter
40
 Z th  i 2  f k  
20 log  20
 1 
Z e i 2  f k 
20 dB
 
Ze  f 
20 log  0
 1 
 20
Z th  f 
input impedance
with 0-Ω Rload
 40
3 4 5
10 100 110 110 110
fk
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Verify Results after Damping - Magnitude
 Check the resulting control-to-output transfer function
damped 40
filter Damped
filter
20

20 log T filter i 2  f k  
20 log 
0
T filterM  i 2  f k  Undamped
 20
undamped
 40
Tf 
3 4 5
10 100 110 110 110
fk
 Magnitude distorsion has disappeared after damping
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Verify Results after Damping - Phase
 Original phase margin is unaffected after damping
200
damped Damped
filter filter
100
 
arg T filter  i 2  f k  
180

0
 
arg T filterM  i 2  f k  

180
Undamped
 100
undamped T  f 
 200
3 4 5
10 100 110 110 110
fk
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Closed-Loop Output Impedance
 Peaking effects of the EMI filter are now gone
0
damped Damped
filter Z out ,CL  f  filter
(dBΩ)  20
Undamped
 Z outCLFD  i 2
2  f k  
20 log   40
 1 
 Z outCLF  i 2  f k  
20 log   60
 1 
 80
undamped
 100
3 4 5
10 100 110 110 110
fk
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Opting for a Different Strategy
 What if you only try to get rid of the overlap, ignoring ZD and ZN?
 Plot the closed-loop input impedance and build margin (10 dB)
60
(dBΩ)
40
 Z th  i 2  f k   Z in,CL  f 
20 log 
 1  20
10 dB
 Z inCL i 2  f k  
l 
20 log  10 dBΩ
 1 
0
3.3 Ω
 20
Zth  f 
3 4 5
10 100 110 110 110
fk
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Calculate the New Damping Elements
 Different damping elements are now required
 
R0  R0  R0 2  4  Z out 
2
  4  3n  2  n 
n    0.5
mm
Qopt   2.4
 out mm 
Z
2
2n  4  n 
2
3.3 Ω
Rdamp  R0 Qopt  1.8  Cdamp  nC f  20 µF
10
(dBΩ) 0
 Z th  i 2  f k  
20 log  10
 1 
 20 Z th  f 
Plot includes Filter output
all ohmic losses impedance
 30
3 4 5
10 100 110 110 110
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Verify Results after Damping - Magnitude
 The new filter effect can be observed when it resonates
40
damped
20
20 log
l T filter i 2  f k  
20 log 
0
T filterM  i 2  f k 
 20
undamped
 40 Tf 
3 4 5
10 100 110 110 110
fk
 Gain distortion is noticeable before crossover

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Verify Results after Damping - Phase
 Phase distorsion appears but do not jeopardize phase margin
200
damped
100
 
180
filter i 2  f k   
arg T fil
0
 
180
arg T filterM  i 2  f k  

 100
undamped
T  f 
 200
3 4 5
10 100 110 110 110
fk
 Original phase margin is unaffected in this case

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Verify Results after Damping - Zout
 Peaking can be observed but it remains limited
damped
Z out ,CL  f 
 20
 Z outCLFD  i 2
2  f k  
20 log   40
 1 
 Z outCLF  i 2  f k  
20 log   60
 1 
 80
undamped
 100
3 4 5
10 100 110 110 110
fk
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Average Model Simulation Template
 Both damping strategies can be tested with SPICE
Rdamp  0.487  Rdamp  1.8 
or
Cdamp  141µF
141 F Cdamp  20 µF
F
L1 R3 L2 R1
vout
22uH 50m 22u 10m
a c vout
9 8 4 1 2
d
5
p X3
PWM sw itch VM R2 PSW1
R8 Rdam p 20m
X1
1.5m 1.8
Vin
Vi PWMVM 11
3
20 L = 22u V6
GAIN
XPWM
10 12 Fs = 100k unknown
C4 Cdam p GAIN
40u 22u K = 1/Vp C1
680u
Type 3
7 V(err) 1.9 ?
V(err)>1.9
B1
Voltage
1.9 :
V(err)
G s
 The load is stepped from 50 to 100% in 1 µs

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Average Response Shows Oscillations
 Oscillatory but stable response to a load step
5.32
Rdamp  1.8 
Cdamp  20 µF
5.16
(V) 5.00
Rdamp  0.487 
4.84
Cdamp  141µF
4.68
vout  t 
10 5m
10.5m 11 5m
11.5m 12 5m
12.5m 13 5m
13.5m 14 5m
14.5m
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Switching Model Simulation Template
 This is a simple model compensated by the type III structure
X2
L1 R3 PSW1 L2 R1
22uH 50m 22u 10m vout
11 10 9 8 1 2
vout
IV4 X3
R2 PSW1
R8 Rdamp 20
20m
1.5m 1.8 7 13
Vin D1 3
20 V6
12 14
mbr1645 unknow n
C4 Cdamp
40u 22u X1 C1
680u
COMPAR + Type 3
-
4 5
G s
V(err)>1.9 ?
B1
1.9 : Vramp
V(err)
 You can verify the step response but also the filtered signature
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Oscillations in the Switched Model
 Oscillations
O are present but not too disturbing
5.32 Rdamp  1.8 
5.16
5 16 Cdamp  20 µF
5.00
4.84
4.68
vout  t 
5.32 Rdamp  0.487 

5.16 Cdamp  141µF
5 00
5.00
4.84
4.68
vout  t 
10.6m 11.6m 12.5m 13.5m 14.5m
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Input Current Signature is Good
 No difference
ff in the signature – amplitude is within specs
Rdamp  1.8 
-2.750 I in , ppeak  14.8 mA
Cdamp  20 µF
F
-2.760
(A) -2.770
-2.780
Rdamp  0.487 
iin  t 
-2.790
Cdamp  141µF
10 005m
10.005m 10 016m
10.016m 10 026m
10.026m 10 037m
10.037m 10 047m
10.047m
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Course Agenda
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A Practical Case with NCL30186
 This LED driver featuring PFC requires the insertion of a filter
vinavg
R2
{R} 707mV
C4
{C}
Input
p impedance
p Zin
3 8
B2 707mV
R7 Voltage
R1
3Meg 1.80V
1.80V {R}
VS 707mV 4
2
PFC 6
D2
unknown
VFB
C1
{C} X4
R5
GA
X3 GAIN
AIN
5.00V
8.2k C2 AMPSIMP K = 0.25
28
470p
Vin
V6 X1
5 vinavg PWMBCMCM2
90.0V VC
449mV
PWM swi tch BCM

vc
9.95V
a
ton
QR model
ton
59.4V X2
Input filter Zth R13
Fsw (kHz)
Fsw XFMR
100m vout 42.8V
-130V RATIO = -N
90.0V
Vout 14
p
1
L3 R6
c
1m 600m ESR
0V 0V 0V L4
V11 {ESR}
7 21 12 1G Iout V2
28.4fV 42.8V
C7 C8 90.0V 21
13 18
1p 220nF 46
0V 0V
V10 B12 89.9V
90.0V 1.47V Ipk Lp Cout 21.8V
44 45 5
Current Vin {Lp}
0 48 {Cout}
R11 R12 {Vin} B3 R4
I(V11) unknown IC = {IC}
23m 32m Voltage 24
AC = 1
V(VC)/({Ri})
Average model by S. Cannenterre
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Plot the Impedance Ratio Zout/Zin
 Analysis reveals a negative phase margin: stability issue
° dBΩ
360 120
Z th  f 
 Z th  f 
Z in  f  1
Z in  f 
180 60.0
0 0
Z th  f 
Z in  f 
-180 -60.0
Z th  f 
-360 -120   233
Z in  f 
10m 100m 1 10 100 1k 10k 100k 1Meg
g
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A Simulation Shows Oscillations
 The negative phase margins brings a diverging filter voltage
(V)
200 vin  t 
150
100
50
120 V
0
90 V C1 = 0 pF
28.9m 86.7m 144m 202m 260m
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Act on the PFC Input Voltage
 Reduce the phase stress by inserting a zero in the PFC chain
Vin  s 
R2
H0 
Added R1  R2
R1 C1 zero
 1  C1 R1  2   R1 || R2  C1  C2 
s
VS  s  1
1  s 1 z
H  s  H0  H0
1  s 2 1
s
R2 C2 p
1 1
z  p 
1 2
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Insert the Zero to Reduce Phase Stress
 Adding a zero in the PFC control input brings phase margin
° dBΩ
360 120
Z th  f 
 Z th  f 
Z in  f  1
180 60.0 Z in  f 
0 0
Z th  f 
Z in  f 
-180 -60.0
Z th  f 
  135
Z in  f 
-360 -120
Phase margin is 45°
10m 100m 1 10 100 1k 10k 100k 1Meg
“Interaction between EMI filter and PFC with average current control”, G. Piazzi, J. Pomilio, IEEE Transactions on Power Electronics, 1999
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The Zero Insertion Cancels Oscillations
 Adding a zero builds phase margin and tames oscillations
(V)
200 vin  t 
150
100
50.0
120 V
0
90 V C1 = 22 pF
28.9m 86.7m 144m 202m 260m
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Practical Experiments
 Placing a zero at 2.5 kHz (22-pF cap.) stops oscillations
 However, PFC operations are affected: need to damp the filter!

Public Information
Explore Another Option and Damp Filter
 
R0  R0  R0 2  4  Z out 
2
Z out 2 2  n 
n  
L1 mm
R0  mm

n2  out mm 
2
C3 R0 Z
 4  3n  2  n  Rdamp  R0 Qopt
Qopt 
2n 2  4  n 
Z out mm This is the minimum of Zout peaking to avoid overlap

Vin 2
Z out mm
k For a 40-W output and a 108-V input:
Pout
Z out mm
 291 Ω Assume 10% margin, k = 0.9 Z out mm
 262 Ω
n  0.584 Cdamp  n  220 nF  0.128 µF
Qopt  2.18 Rdamp  R0 Qopt  147 Ω
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Plots with L1 = 1 mH and C3 = 220 nF
Ch k absence
 Check b off overlap
l with
i h Mathcad
M h d®
60
Minimum resistance at Vin = 108 V rms
 H1 i 2  f k   40
20 log 10
  
 Href  i 2  f k   20
20 log 10 No overlap
  
0
 Rload 
20 log 
  
 20
Rdamp = 146 Ω and Cdamp = 0.128 µF

 40
3 4 5 6
10 100 110 110 110 110
fk
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Check Results on the Simulation Template
Si l i results
 Simulation l Vin = 108 V rms Pout = 40 W:
W no overlap
l
dBΩ °
Rdamp = 180 Ω and Cdamp = 0.1 µF
40 0 540
40.0
20.0 360
5-dB margin
0 180
Z th  f
 Z th  f 
Z in  f 
-20.0 0
Z in  f 
-40.0 -180
10m 100m 1 10 100 1k 10k 100k 1Meg
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Practical Implementation in the Driver
 Final Q is affected by several other factors:
 PCB traces, dielectric losses in the caps but also iron losses in the inductor.
 True peaking is often lower and gives design margin.
iin  t  iin  t 
vs  t  vs  t 
No damping Damping 100 nF + 180 Ω

7.5 mH and 220 nF (no C2) 7.5 mH and 220 nF (no C2)
after bridge. Pout > 40 W after bridge. Pout > 40 W
Vin = 120 V rms Vin = 120 V rms Curves and experiments by J. Turchi
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Course Agenda
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Cascading Converters
 When cascading converters, impedances matter
Vin  s 
Z th  s 
Vth  s  Z in  s 
Z out  s  Z in  s 
Boost Buck
 The system can be also be modeled by a gain TM

1 +
Vin  s   Vth  s  Vth  s  Vin  s 
Z th  s 
1 -
Z in  s 
Zth Zin
TM  s 
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Use SPICE Models First
Si l
 Simulate h boost
the b i d
converter output impedance
L1 R5
33u 7m
12
Closed-loop Zout
11
c
vout vout
WM switch CM
duty_cycle
Z out  f 
R10
duty-cycle
Vin
2 18m
Rload
0
PW
vc
c
11
a
X3 16 8.3
PWMCM I1
L = 33u C5 AC = 1A
Fs = 200k 820u
Ri = -300m
Se = 82k
-20.0
C3
282p
-40.0
40 0
C2 R2
10n 50k
R1
9
11.66k
R4 1
-60.0
1m
5 8
(dBΩ)
R3
Verr
V2 1.35k -80.0
2.5
X2
AMPSIMP
1 10 100 1k 10k 100k 1Meg
VHIGH = 10
VLOW = 10m
11-15 V/24 V – 3 A
Public Information
Use SPICE Models First
Si l
 Simulate h buck
the b k converter input
i i d
impedance
Zin
duty cycle
duty_cycle
L2
210mV
5
L1 R4
Closed-loop Zin
1kH duty-cycle 8u5.05V 4m vout
24.0V 5.05V 5.00V
a c Vout
6 3 4
24.0V 2.37V
vc Resr
19.8
1 7
PWM switch CM p 14m
I1 V4 R2
AC = 1 24 PWM CM
5.00V 2 416m
X2
Z in  f 
L = 8u Cout
Fs = 200k 820u 19.4
Ri = 176m
Se = 30k
C3
1n 19.0
vout
R6 C1
15k 3.5n
2.37V
R1
8
1k
R7
2.50V
9
18.6
1m 2.37V
11
2.50V
10 R3
Verr
18.2
(dBΩ)
V2 1k
2.5
10 100 1k 10k 100k 1Meg
24 V/5 V – 12 A
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Compare Magnitude Curves
39.0
19.0
Z ini  f  Z out  f 
N overlap
No l 1
(dBΩ) Z in  f 
-1.00
-21.0
Z out  f 
-41.0
10 100 1k 10k 100k 1M

1Meg
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Compare Phase Curves
270
Neg. up to 1 kHz
180
Z ini  f 
(°)
90.0
Z out  f 
-90.0
1 10 100 1k 10k 100k 1M

1Meg
Public Information
Check Minor Loop Gain
Th
 There i no gain,
is i Z out  Z in . The
Th system is
i stable
bl
dB °
-40.0 0
-50
50.0
0 -90
90.0
0
-60.0 -180
Z out  f 
-70.0 -270 
Z out  f  Z in  f 
-80.0 -360 Z in  f 
1 10 100 1k 10k 100k 1Meg
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Cascade Converters for Simulation
L1 R5
33u11.0V
7m
12
dc_buck
Iout
209mV
11.0V VoBoost
10
11
L2 R4
11.0V 8u5.05V 4m v out5.00V
c
duty-cycle
5.05V
a c
p
3
4 14 15 VoBuck
Vin 24.1V
11 dc_boost PWM switch CM
19
2.37V
R10 vc Resr
duty-cycle
545mV 18
2 18m PWM switch CM p 14m
I1
vc
PWMCM unknown
a
X3
v
24 1V
24.1V 5 00V
5.00V
P
16 X1 13
PWMCM
C5 L = 8u Cout
L = 33u
820u Fs = 200k 820u
Fs = 200k
Ri = 176m
Ri = -300m
Se = 30k
Se = 82k
C3
282p C6
1n
v out
Boost C2
10n
R2
50k
R6
15k2.37V
C1
3.5n
2.50V
R1 R9
9 24
11.66k 1k
2.50V 2.50V
1
R7 21
2.02V
1
1m 2.37V
VerrBoost 7 23
2.50V
6
2.50V
X2 R3 22 R11
AMPSIMP
VHIGH = 10
V2
2.5
1.35k Buck VerrBuck
V3
2.5
1k
VLOW = 10m
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Check Transient Response
T i
 Transient i good
response is d for
f the
h buck
b k and
d boost
b i stable
is bl
5.10 Buck
5.05
(V) 5.00
vout  t 
4.95
4.90 Iout from 5 to 12 A in 1 µs
24.10
24.05
(V)
24.00
23.95
23.90 Boost vout  t 

100u 300u 500u 700u 900u
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Practical Measurements – Zin
I
 Input i d
impedance i
measurement requires d di d circuit
a dedicated i i
Q1 Vin
R3 Switching
R1 Converter
C1
Dc 22 
input
dc load
R2
I in
Rsense
Network Vin  s 
analyzer
Vin Z in  s    Rsense
Vac Vsense Vsense  s 
“Practical Issues of Input/Output Impedance Measurements”, Y. Panov, M. Jovanović, IEEE Transactions on Power Electronics, 2005
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Practical Measurements – Zout
Y need
 You d to inject
i j h current to observe
enough b d l d Vout
a modulated
Vout C1 C2
I out
Switching R1 R3
Converter
Dc
D Q1 Vbias
input 22 
dc load
Rsense R2 Vac
Vout Thermal R4
stabilization
Vout  s 
Z out  s    Rsense Network
Vsense  s  Vsense analyzer
“Practical Issues of Input/Output Impedance Measurements”, Y. Panov, M. Jovanović, IEEE Transactions on Power Electronics, 2005
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Literature
“Fundamentals of Power Electronics”, R. Erickson, D. Maksimovic, Springer, 2001
“Designing Control Loops for Linear and Switching Power Supplies”, C. Basso, Artech House, 2012
“Practical
Practical Issues of Input/Output Impedance Measurements
Measurements”, Y.
Y Panov,
Panov
M. Jovanović, IEEE Transactions on Power Electronics, 2005
“Physical Origins of Input Filter Oscillations in Current Programmed Converters”,
Y. Jang, R. Erickson, IEEE Transactions on Power Electronics, 1992
“Design Consideration for a Distributed Power System”, S. Schultz, B. Cho,
F Lee,
F. Lee Power Electronics Specialists Conference
Conference, June 1990
1990, pp
pp. 611-617
“Input Filter Considerations in Design and Applications of Switching Regulators”,
R. D. Middlebrook, IAS 1976
“Design Techniques for Preventing Input-Filter Oscillations in Switched-Mode Regulators”
R.D. Middlebrook, Proceedings of Powercon, May 4-6 1978, San-Francisco
New book!
“Linear
Linear Circuit Transfer Functions
Functions”, C.
C Basso
Basso, Wiley & Sons,
Sons IEEE Press,
Press 2016
Public Information
Conclusion
 Incremental input resistance of switching converter is negative
 Inserting a LC filter impacts the switching converter performance
 You
Y h have two
t d design
i strategies
t t i
 you design the filter together with the converter
 you add a filter to an unknown-content
unknown content converter
 You must determine open- and closed-loop input impedance
 Cascadingg converters requires
q knowledgeg of Zout and Zin
 Test in the lab. dynamic responses when the filter is added
 Explore how damping is maintained at temperature extremes
Merci !
Thank you!
Xiè-xie!
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Input Filter Interactions with Switching

 What load does the converter offer?

 In closed-loop operation, Pout is constant, no link to Vin

***** SMALL SIGNAL DC TRANSFER FUNCTION

 All losses ((ohmic, iron etc.)) help

1 10 100 1k 10k 100k 1Meg

144 In this region

 The Nyquist criterion applies

Z th  s  Z th  s  Filter output impedance

Z N  s   Z i  s  vˆ Input impedance for a nulled output

Open-loop input impedance Input impedance for vˆout  0

Converter ZN(s) ZD(s) Ze(s)

 A converter closed-loop input impedance follows the form

 Ze(s) is the converter input impedance with a shorted output

“Input Impedance and Filter Interactions Part I”, R. Ridley, ridleyengineering.com

1 10 100 1k 10k 100k 1Meg

1 10 100 1k 10k 100k 1Meg

Converter loop gain T is unaffected

Z th  s   Z e  s  Converter output impedance is unaffected

 You design the input filter alone

System is stable but overall performance may be altered

 Naturally showing gains, poles and zeros…

This is a low-entropy expression

 Change the circuit depending on s

s s0 s s0

 Transfer function zeros are the numerator roots

N s  0 sz1 , sz2 ...

The excitation cannot reach the output: the response is nulled

 The circuit is then observed at the zero angular frequency

 For s = sz2, the RL impedance is infinite

1. Transform the circuit with a Thévenin generator

 Apply impedance divider involving Z1 and Rth

 what is the pole/zero position?

 The capacitor is open circuited, read the schematic!

 We did not write a single line of algebra!

 In a 2nd-order circuit, there are two reactances

 1 Reactance 1 is in its high-frequency state

2 What resistance drives reactance 2?

 2 Reactance 2 is in its high-frequency state

1 What resistance drives reactance 1?

 Determine the two time constants while Vin is 0 V

 Place C2 in its high-frequency

 If Z1 becomes a transformed short, the response disappears

 In this mode, d̂ is equal to zero

Vin  s  Source B2 and B1 are zero

 Reflect elements to the p

 For the time constants, suppress the excitation, IT = 0

T s  H sG s

Setup for input Verr  f 

results 1 10 100 1k 10k 100k

ASC ,OL  s   100

 Loop gain quickly drops as f increases ASC, audio susceptibility

 B2 needs to be linearized as d and Vin now include ac

 Sanity check Verr  s  Vout  s 

 Substitute D(s) and IC(s) previously obtained

 In dc or low frequency, T(s) is >> 1

 As s exceeds fc and increases,

 Consider parasitic elements for L and C

 The zeros cancel the response

 The complete transfer function is now:

 This is the open-loop output impedance

 Because the system is linear, superposition applies

 Having gain at f0 is important to damp the filter

 Specifications are less than 15 mA peak of input ripple