Ga 78lmt s2p Rev5.02

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PAGE TITLE
GA-78LMT-S2P Revision : 5.02
26 NB/SB POWER, VCC12HT, VDDA25
PAGE TITLE 9M-00 27 DDRIII POWER, VCC18
D D

01 COVER SHEET

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02 BOM & PCB MODIFY HISTORY

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03 BLOCK DIAGRAM

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04 CPU HYPER TRANSPORT

en
05 CPU DDRIII MEMORY

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06 CPU CONTROL

fi
07 CPU POWER & GND

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C 08 DDRIII CHANNEL A0, B0 C

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09 RS780 HT-LINK I/F

C p
10 RS780 SYSTEM I/F,STRAP,DVI

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11 RS780 POWER & GND

y t C
12 IDT 9LPRS485C

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13 ATI SB710 PCIE/PCI/CPU/LPC/CLK

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14 ATI SB710 ACPI/USB/GPIO/AUDIO

i g n
15 ATI SB710 SATA/IDE/HWM/SPI

G Do
B B

16 ATI SB710 POWER & GND


17 PCI EXPRESS x16 ,x1
18 PCI SLOT
19 LAN AR8151/8152
20 ALC887-VD2
21 RGB, COM, F_USB ,USB
22 IT8728DX,Dual-BIOS FAN/HWMO
23 ATX, FRONT PANEL
A A

24 VCORE(RT8868+RT9612)
25 POWER SEQUENCE,EUP
Title
COVER SHEET
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 1 of 27
5 4 3 2 1
5 4 3 2 1

Model Name:GA-78LMT-S2P Circuit or PCB layout change for next version


Version: 5.02 Date Version Change Item
Component value change history P-Code: U99098-0 2011.08.16 4.0 Gerber out change From 78LMT-USB3 3.11 (RS760=RS780L)
D D

Date Change Item Reason 2011.10.19 4.01 Gerber out Remove 108dB Wording
Change From 78LMT-USB3 3.11 Remove USB3.0 / Change EC Cap

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2011.08.17 4.0A E_BOM Release. PCB: 4.0 LAN change to AR8151 Codec : ALC887 2011.11.07 5.0 Gerber out PWM change RT8868+RT9612,RT8120D,IO8728DX
FIX SB OV RES R3203 :20K R3204: 10K (1.)Load line Control Circuit add DQ27 , (2.)OR24,OR26 pull to 3VDUAL_SB

a
2011.09.23 變變 Release.
4.0B P_BOM變 PCB:4.0 CLK Change 9LPRS485C 電電電電電電
2011.12.08 5.01 Gerber out (Fix 5VDUAL be Shutdown & Can't entry ErP issue ), (3.) DU1.Pin 23,22,21 Pull to VCC5

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(4.) remove 108dB (5)Add D_5VSB
2011.10.18 變變 Release.
4.0B ECN變 PCB:4.0 全全全"
add PCB Vender "全

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、DR79、
(6)DR78、 、DR80、
、DR116 shortpad電
電mask
2011.10.18 變變 Release.
4.0C MP BOM變 PCB:4.01 Change PCB to 4.01

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1. EUP_N Change to GP21(OU1.57)
2011.11.08 50A E- BOM change RT8868+RT9612,RT8120D 2011.12.27 5.02 Gerber out 2. CD4 Move to CR35.1 side

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3. OR36 Pull to 3VDUAL_SB
,MOS cgange Power pak, IO 8728 PCB 5.0 4. DRS1 GND 打打PWM 端

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5. DEL MCLK/DAT Pull hi OR28,OR29,

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2011.12.09 50B E- BOM release PCB 5.01 (1)R2804(Fix DDR OCP),DR112-->49.9K

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(2)DC58 , DC59 DC60 , DC61-->4.7n ,DR138 DR148 , DR151 , DR146 -->1 ohm

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(3)DR191 , DR101-->2K (4)R2774-->39K (5)DR200 , DR201 --> 0 ohm
C C

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(5)DR104-->40.2K (6) Add" -REQ0" (7)Add R86 for MOS_OT

電改 short pad
(8)DR200 , DR201, R271電

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(9)DR104-->40.2K

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1.Choke Change 01R/03R (電電改改 )
2011.12.28 50C E- BOM release PCB 5.02 2. IT8728 DX change IT8728EX

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3.DEL OR28,OR29

C
4.R153 change 1.5K(MOS_OT for 104 DC)

a b y o t
B

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G Do n B

A A

Title
BOM & PCB HISTORY
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: Wednesday, December 28, 2011 Sheet 2 of 27
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RS780L CUSTOMER DESKTOP DESIGN

DDRIII 1066 / 1333 UNBUFFERED


DDRIII DIMM1
8
AMD AM3

128bit
D D
Clock
Generator AM3 SOCKET DDRIII 1066 / 1333 UNBUFFERED
DDRIII DIMM2
9LPRS485C 12 4,5,6,7 8

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HyperTransport 16x16 DDRIII FIRST LOGICAL DIMM

OUT
a
LINK

IN
ti
DVI TMDS/HDMI ATI NB

n
22 RS760G
HyperTransport LINK0 CPU I/F

e
VGA RGB 1 16X PCIE VIDEO I/F DESKTOP AM3 RS760 CORE & PCIE
CON 23 POWER POWER

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4 1X PCIE I/F
27 29

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PCIE SLOT 1 4X PCIE I/F WITH SB
16X

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16X 17 DX10 IGP
DDR3 MEMORY SB710 CORE & PCIE

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POWER POWER
C 30 29 C

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1X PCIE INTERFACE

C p
9,10,11

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PCIE SLOT

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AR8151 4X
19 1X 17 PCIE

USB-7 USB-6 USB-3 USB-2

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USB 2.0

o t C ATI SB
SB710 ALC887

a
HD AUDIO I/F HD AUDIO CODEC
21 21 19 19 USB2.0
20,21

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SATA II

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AZALIA SATA#0 SATA#1 SATA#2 SATA#3 SATA#4 SATA#5
SATA II I/F
USB-8 USB-9 USB-10 USB-11

G Do
ATA 66/100/133 15 15 15 15 15 15
B B
21 21 23 23 ACPI
LPC I/F
INT RTC
HW MONITOR
PCI BUS
13,14,15,16

SPI
PCI SLOT Dual-BIOS
#1 18
15
LPC BUS

ITE LPC SIO IT8728


24
A A

KBD HW Title
MONITOR 25
25 BLOCK DIAGRAM
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: Wednesday, December 28, 2011 Sheet 3 of 27
5 4 3 2 1
L0_CADIN_L[0..15]
L0_CADIN_L[0..15] <9>
L0_CADIN_H[0..15]
L0_CADIN_H[0..15] <9>

L0_CADOUT_L[0..15]
L0_CADOUT_L[0..15] <9>
L0_CADOUT_H[0..15]
L0_CADOUT_H[0..15] <9>

M2CPUA
HYPERTRANSPORT
L0_CLKIN_H1 N6 AD5 L0_CLKOUT_H1
<9> L0_CLKIN_H1 L0_CLKIN_H(1) L0_CLKOUT_H(1) L0_CLKOUT_H1 <9>

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L0_CLKIN_L1 P6 AD4 L0_CLKOUT_L1
<9> L0_CLKIN_L1 L0_CLKIN_L(1) L0_CLKOUT_L(1) L0_CLKOUT_L1 <9>
L0_CLKIN_H0 N3 AD1 L0_CLKOUT_H0
<9> L0_CLKIN_H0 L0_CLKIN_H(0) L0_CLKOUT_H(0) L0_CLKOUT_H0 <9>
L0_CLKIN_L0 N2 AC1 L0_CLKOUT_L0
<9> L0_CLKIN_L0 L0_CLKIN_L(0) L0_CLKOUT_L(0) L0_CLKOUT_L0 <9>

a
L0_CTLIN_H1 V4 Y6 L0_CTLOUT_H1
<9> L0_CTLIN_H1 L0_CTLIN_H(1) L0_CTLOUT_H(1) L0_CTLOUT_H1 <9>

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L0_CTLIN_L1 V5 W6 L0_CTLOUT_L1
<9> L0_CTLIN_L1 L0_CTLIN_L(1) L0_CTLOUT_L(1) L0_CTLOUT_L1 <9>
L0_CTLIN_H0 U1 W2 L0_CTLOUT_H0
<9> L0_CTLIN_H0 L0_CTLIN_H(0) L0_CTLOUT_H(0) L0_CTLOUT_H0 <9>

t
L0_CTLIN_L0 V1 W3 L0_CTLOUT_L0
<9> L0_CTLIN_L0 L0_CTLIN_L(0) L0_CTLOUT_L(0) L0_CTLOUT_L0 <9>
L0_CADIN_H15 U6 Y5 L0_CADOUT_H15
L0_CADIN_L15 L0_CADIN_H(15) L0_CADOUT_H(15) L0_CADOUT_L15
V6 Y4

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L0_CADIN_H14 L0_CADIN_L(15) L0_CADOUT_L(15) L0_CADOUT_H14
T4 L0_CADIN_H(14) L0_CADOUT_H(14) AB6
L0_CADIN_L14 T5 AA6 L0_CADOUT_L14
L0_CADIN_L(14) L0_CADOUT_L(14)

e
L0_CADIN_H13 R6 AB5 L0_CADOUT_H13
L0_CADIN_L13 L0_CADIN_H(13) L0_CADOUT_H(13) L0_CADOUT_L13
T6 L0_CADIN_L(13) L0_CADOUT_L(13) AB4
L0_CADIN_H12 P4 AD6 L0_CADOUT_H12
L0_CADIN_L12 L0_CADIN_H(12) L0_CADOUT_H(12) L0_CADOUT_L12
P5 AC6

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L0_CADIN_H11 L0_CADIN_L(12) L0_CADOUT_L(12) L0_CADOUT_H11
M4 L0_CADIN_H(11) L0_CADOUT_H(11) AF6
L0_CADIN_L11 M5 AE6 L0_CADOUT_L11

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L0_CADIN_H10 L0_CADIN_L(11) L0_CADOUT_L(11) L0_CADOUT_H10
L6 L0_CADIN_H(10) L0_CADOUT_H(10) AF5
L0_CADIN_L10 M6 AF4 L0_CADOUT_L10

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L0_CADIN_H9 L0_CADIN_L(10) L0_CADOUT_L(10) L0_CADOUT_H9
K4 L0_CADIN_H(9) L0_CADOUT_H(9) AH6
L0_CADIN_L9 K5 AG6 L0_CADOUT_L9
L0_CADIN_H8 L0_CADIN_L(9) L0_CADOUT_L(9) L0_CADOUT_H8
J6 L0_CADIN_H(8) L0_CADOUT_H(8) AH5

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L0_CADIN_L8 K6 AH4 L0_CADOUT_L8
L0_CADIN_L(8) L0_CADOUT_L(8)
L0_CADIN_H7 U3 Y1 L0_CADOUT_H7
L0_CADIN_L7 L0_CADIN_H(7) L0_CADOUT_H(7) L0_CADOUT_L7

o
U2 L0_CADIN_L(7) L0_CADOUT_L(7) W1
L0_CADIN_H6 R1 AA2 L0_CADOUT_H6
L0_CADIN_L6 L0_CADIN_H(6) L0_CADOUT_H(6) L0_CADOUT_L6
T1 L0_CADIN_L(6) L0_CADOUT_L(6) AA3
L0_CADIN_H5 R3 AB1 L0_CADOUT_H5
L0_CADIN_L5 L0_CADIN_H(5) L0_CADOUT_H(5) L0_CADOUT_L5
R2 AA1

C
L0_CADIN_H4 L0_CADIN_L(5) L0_CADOUT_L(5) L0_CADOUT_H4
N1 AC2

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L0_CADIN_L4 L0_CADIN_H(4) L0_CADOUT_H(4) L0_CADOUT_L4
P1 L0_CADIN_L(4) L0_CADOUT_L(4) AC3
L0_CADIN_H3 L1 AE2 L0_CADOUT_H3
L0_CADIN_L3 L0_CADIN_H(3) L0_CADOUT_H(3) L0_CADOUT_L3
M1 L0_CADIN_L(3) L0_CADOUT_L(3) AE3

e o
L0_CADIN_H2 L3 AF1 L0_CADOUT_H2
L0_CADIN_L2 L0_CADIN_H(2) L0_CADOUT_H(2) L0_CADOUT_L2
L2 L0_CADIN_L(2) L0_CADOUT_L(2) AE1
L0_CADIN_H1 L0_CADOUT_H1

t
J1 L0_CADIN_H(1) L0_CADOUT_H(1) AG2
L0_CADIN_L1 K1 AG3 L0_CADOUT_L1
L0_CADIN_H0 L0_CADIN_L(1) L0_CADOUT_L(1) L0_CADOUT_H0
J3 AH1

C
L0_CADIN_L0 L0_CADIN_H(0) L0_CADOUT_H(0) L0_CADOUT_L0
J2 AG1

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L0_CADIN_L(0) L0_CADOUT_L(0)
CPU-SK/941AM3/S/15u/[10SC1-A01942-01R_10SC1-A01942-02R]

g a b n o t
i
G Do M2CPU

CPU_VDD_RUN = VCORE
CPU_VDDA_RUN = VDDA25
VLDT_RUN = VCC12_HT AMD RM/BLUE
CPU_VDDIO_SUS = DDR18V
CPU_VTT_SUS = DDRVTT

VLDT_A = VCC12_HT Title

VLDT_B = HT12B Size


CPU HYPER TRANSPORT
Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 4 of 27

www.vinafix.vn
M2CPUB M2CPUC
MEMORY INTERFACE A MEMORY INTERFACE B
AG21 AE14 MDA63 AJ19 AH13 MDB63
MA0_CLK_H(2) MA_DATA(63) MDA[0..63] <8> MB0_CLK_H(2) MB_DATA(63) MDB[0..63] <8>
AG20 AG14 MDA62 AK19 AL13 MDB62
MA0_CLK_L(2) MA_DATA(62) MDA61 MB0_CLK_L(2) MB_DATA(62) MDB61
G19 MA0_CLK_H(1) MA_DATA(61) AG16 A18 MB0_CLK_H(1) MB_DATA(61) AL15
H19 AD17 MDA60 A19 AJ15 MDB60
MA0_CLK_L(1) MA_DATA(60) MDA59 MB0_CLK_L(1) MB_DATA(60) MDB59
U27 MA0_CLK_H(0) MA_DATA(59) AD13 U31 MB0_CLK_H(0) MB_DATA(59) AF13
U26 AE13 MDA58 U30 AG13 MDB58
MA0_CLK_L(0) MA_DATA(58) MDA57 MB0_CLK_L(0) MB_DATA(58) MDB57
MA_DATA(57) AG15 MB_DATA(57) AL14
-CSA1 AC25 AE16 MDA56 -CSB1 AE30 AK15 MDB56
<8> -CSA1 MA0_CS_L(1) MA_DATA(56) <8> -CSB1 MB0_CS_L(1) MB_DATA(56)
-CSA0 AA24 AG17 MDA55 -CSB0 AC31 AL16 MDB55
<8> -CSA0 MA0_CS_L(0) MA_DATA(55) <8> -CSB0 MB0_CS_L(0) MB_DATA(55)
AE18 MDA54 AL17 MDB54
MODT_A0 AC28 MA_DATA(54) MDA53 MODT_B0 AD29 MB_DATA(54) MDB53
<8> MODT_A0 MA0_ODT(0) MA_DATA(53) AD21 <8> MODT_B0 MB0_ODT(0) MB_DATA(53) AK21
AG22 MDA52 AL21 MDB52
MA_DATA(52) MDA51 MB_DATA(52) MDB51
AE20 MA1_CLK_H(2) MA_DATA(51) AE17 AL19 MB1_CLK_H(2) MB_DATA(51) AH15
AE19 AF17 MDA50 AL18 AJ16 MDB50
MA1_CLK_L(2) MA_DATA(50) MDA49 MB1_CLK_L(2) MB_DATA(50) MDB49
G20 MA1_CLK_H(1) MA_DATA(49) AF21 C19 MB1_CLK_H(1) MB_DATA(49) AH19
G21 AE21 MDA48 D19 AL20 MDB48
MA1_CLK_L(1) MA_DATA(48) MB1_CLK_L(1) MB_DATA(48)

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A00P DCLKA0 V27 AF23 MDA47 DCLKB0 W 29 AJ22 MDB47
<8> DCLKA0 MA1_CLK_H(0) MA_DATA(47) <8> DCLKB0 MB1_CLK_H(0) MB_DATA(47)
A00N -DCLKA0 W 27 AE23 MDA46 B00P -DCLKB0 W 28 AL22 MDB46
<8> -DCLKA0 MA1_CLK_L(0) MA_DATA(46) <8> -DCLKB0 MB1_CLK_L(0) MB_DATA(46)
AJ26 MDA45 B00N AL24 MDB45
MA_DATA(45) MB_DATA(45)

a
AD27 AG26 MDA44 AE29 AK25 MDB44
MA1_CS_L(1) MA_DATA(44) MDA43 MB1_CS_L(1) MB_DATA(44) MDB43
AA25 MA1_CS_L(0) MA_DATA(43) AE22 AB31 MB1_CS_L(0) MB_DATA(43) AJ21

ti
AG23 MDA42 AH21 MDB42
MA_DATA(42) MDA41 MB_DATA(42) MDB41
AC27 MA1_ODT(0) MA_DATA(41) AH25 AD31 MB1_ODT(0) MB_DATA(41) AH23
AF25 MDA40 AJ24 MDB40
MA_DATA(40) MDA39 MB_DATA(40) MDB39
MA_DATA(39) AJ28 MB_DATA(39) AL27
-SCASA AB25 AJ29 MDA38 -SCASB AC29 AK27 MDB38
<8> -SCASA MA_CAS_L MA_DATA(38) <8> -SCASB MB_CAS_L MB_DATA(38)
-SW EA AB27 AF29 MDA37 -SW EB AC30 AH31 MDB37

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<8> -SW EA MA_W E_L MA_DATA(37) <8> -SW EB MB_W E_L MB_DATA(37)
-SRASA AA26 AE26 MDA36 -SRASB AB29 AG30 MDB36
<8> -SRASA MA_RAS_L MA_DATA(36) <8> -SRASB MB_RAS_L MB_DATA(36)
AJ27 MDA35 AL25 MDB35
MA_DATA(35) MB_DATA(35)

e
SBAA2 N25 AH27 MDA34 SBAB2 N31 AL26 MDB34
<8> SBAA2 MA_BANK(2) MA_DATA(34) <8> SBAB2 MB_BANK(2) MB_DATA(34)
SBAA1 Y27 AG29 MDA33 SBAB1 AA31 AJ30 MDB33
<8> SBAA1 MA_BANK(1) MA_DATA(33) <8> SBAB1 MB_BANK(1) MB_DATA(33)
SBAA0 AA27 AF27 MDA32 SBAB0 AA28 AJ31 MDB32
<8> SBAA0 MA_BANK(0) MA_DATA(32) <8> SBAB0 MB_BANK(0) MB_DATA(32)
E29 MDA31 E31 MDB31

d
CKEA1 MA_DATA(31) MDA30 CKEB1 MB_DATA(31) MDB30
<8> CKEA1 L27 MA_CKE(1) MA_DATA(30) E28 <8> CKEB1 M31 MB_CKE(1) MB_DATA(30) E30
CKEA0 M25 D27 MDA29 CKEB0 M29 B27 MDB29

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<8> CKEA0 MA_CKE(0) MA_DATA(29) <8> CKEB0 MB_CKE(0) MB_DATA(29)
C27 MDA28 A27 MDB28
MAAA15 MA_DATA(28) MDA27 MAAB15 MB_DATA(28) MDB27
M27 G26 N28 F29

f
<8> MAAA[0..15] MAAA14 MA_ADD(15) MA_DATA(27) MDA26 <8> MAAB[0..15] MAAB14 MB_ADD(15) MB_DATA(27) MDB26
N24 MA_ADD(14) MA_DATA(26) F27 N29 MB_ADD(14) MB_DATA(26) F31
MAAA13 AC26 C28 MDA25 MAAB13 AE31 A29 MDB25
MAAA12 MA_ADD(13) MA_DATA(25) MDA24 MAAB12 MB_ADD(13) MB_DATA(25) MDB24
N26 MA_ADD(12) MA_DATA(24) E27 N30 MB_ADD(12) MB_DATA(24) A28

n y
MAAA11 P25 F25 MDA23 MAAB11 P29 A25 MDB23
MAAA10 MA_ADD(11) MA_DATA(23) MDA22 MAAB10 MB_ADD(11) MB_DATA(23) MDB22
Y25 MA_ADD(10) MA_DATA(22) E25 AA29 MB_ADD(10) MB_DATA(22) A24
MAAA9 N27 E23 MDA21 MAAB9 P31 C22 MDB21
MAAA8 MA_ADD(9) MA_DATA(21) MDA20 MB_ADD(9) MB_DATA(21)

o
R24 D23 MAAB8 R29 D21 MDB20
MAAA7 MA_ADD(8) MA_DATA(20) MDA19 MAAB7 MB_ADD(8) MB_DATA(20) MDB19
P27 MA_ADD(7) MA_DATA(19) E26 R28 MB_ADD(7) MB_DATA(19) A26
MAAA6 R25 C26 MDA18 MAAB6 R31 B25 MDB18
MAAA5 MA_ADD(6) MA_DATA(18) MDA17 MAAB5 MB_ADD(6) MB_DATA(18) MDB17
R26 MA_ADD(5) MA_DATA(17) G23 R30 MB_ADD(5) MB_DATA(17) B23
MAAA4 R27 F23 MDA16 MAAB4 T31 A22 MDB16

C
MAAA3 MA_ADD(4) MA_DATA(16) MDA15 MAAB3 MB_ADD(4) MB_DATA(16) MDB15
T25 E22 T29 B21

p
MAAA2 MA_ADD(3) MA_DATA(15) MDA14 MAAB2 MB_ADD(3) MB_DATA(15) MDB14
U25 MA_ADD(2) MA_DATA(14) E21 U29 MB_ADD(2) MB_DATA(14) A20
MAAA1 T27 F17 MDA13 MAAB1 U28 C16 MDB13
MAAA0 MA_ADD(1) MA_DATA(13) MDA12 MAAB0 MB_ADD(1) MB_DATA(13) MDB12
W 24 MA_ADD(0) MA_DATA(12) G17 AA30 MB_ADD(0) MB_DATA(12) D15

e o
G22 MDA11 C21 MDB11
DQSA7 MA_DATA(11) MDA10 DQSB7 MB_DATA(11) MDB10
AD15 MA_DQS_H(7) MA_DATA(10) F21 AK13 MB_DQS_H(7) MB_DATA(10) A21
-DQSA7 MDA9 -DQSB7 MDB9

t
AE15 MA_DQS_L(7) MA_DATA(9) G18 AJ13 MB_DQS_L(7) MB_DATA(9) A17
DQSA6 AG18 E17 MDA8 DQSB6 AK17 A16 MDB8
-DQSA6 MA_DQS_H(6) MA_DATA(8) MDA7 -DQSB6 MB_DQS_H(6) MB_DATA(8) MDB7
AG19 G16 AJ17 B15

C
DQSA5 MA_DQS_L(6) MA_DATA(7) MDA6 DQSB5 MB_DQS_L(6) MB_DATA(7) MDB6
AG24 E15 AK23 A14

y
-DQSA5 MA_DQS_H(5) MA_DATA(6) MDA5 -DQSB5 MB_DQS_H(5) MB_DATA(6) MDB5
AG25 MA_DQS_L(5) MA_DATA(5) G13 AL23 MB_DQS_L(5) MB_DATA(5) E13
DQSA4 AG27 H13 MDA4 DQSB4 AL28 F13 MDB4
MA_DQS_H(4) MA_DATA(4) MB_DQS_H(4) MB_DATA(4)

t
-DQSA4 AG28 H17 MDA3 -DQSB4 AL29 C15 MDB3
MA_DQS_L(4) MA_DATA(3) MB_DQS_L(4) MB_DATA(3)

b
DQSA3 D29 E16 MDA2 DQSB3 D31 A15 MDB2
-DQSA3 MA_DQS_H(3) MA_DATA(2) MDA1 -DQSB3 MB_DQS_H(3) MB_DATA(2) MDB1
C29 MA_DQS_L(3) MA_DATA(1) E14 C31 MB_DQS_L(3) MB_DATA(1) A13
DQSA2 MDA0 DQSB2 MDB0

o
C25 MA_DQS_H(2) MA_DATA(0) G14 C24 MB_DQS_H(2) MB_DATA(0) D13

a
-DQSA2 D25 -DQSB2 C23
-DQSA[0..8] DQSA1 MA_DQS_L(2) DQSA8 DQSB1 MB_DQS_L(2) DQSB8
-DQSA[0..8] <8> E19 MA_DQS_H(1) MA_DQS_H(8) J28 D17 MB_DQS_H(1) MB_DQS_H(8) J31
-DQSA1 F19 J27 -DQSA8 -DQSB1 C17 J30 -DQSB8

n
MA_DQS_L(1) MA_DQS_L(8) MB_DQS_L(1) MB_DQS_L(8)

g
DQSA[0..8] DQSA0 F15 DQSB0 C14
DQSA[0..8] <8> MA_DQS_H(0) MB_DQS_H(0)
-DQSA0 G15 J25 DMA8 -DQSB0 C13 J29 DMB8
MA_DQS_L(0) MA_DM(8) MB_DQS_L(0) MB_DM(8)

i
MA_CK[0..7]
MA_CK[0..7] <8>
DMA7 AF15 K25 MA_CK7 DMB7 AJ14 K29 MB_CK7
DMA[0:8] DMA6 MA_DM(7) MA_CHECK(7) MA_CK6 DMB6 MB_DM(7) MB_CHECK(7) MB_CK6
AF19 J26 AH17 K31

G Do
DMA[0..8] <8> MA_DM(6) MA_CHECK(6) MB_DM(6) MB_CHECK(6)
DMA5 AJ25 G28 MA_CK5 DMB5 AJ23 G30 MB_CK5
DMA4 MA_DM(5) MA_CHECK(5) MA_CK4 DMB4 MB_DM(5) MB_CHECK(5) MB_CK4
AH29 MA_DM(4) MA_CHECK(4) G27 AK29 MB_DM(4) MB_CHECK(4) G29
DMA3 B29 L24 MA_CK3 DMB3 C30 L29 MB_CK3
DMA2 MA_DM(3) MA_CHECK(3) MA_CK2 DMB2 MB_DM(3) MB_CHECK(3) MB_CK2
E24 MA_DM(2) MA_CHECK(2) K27 A23 MB_DM(2) MB_CHECK(2) L28
DMA1 E18 H29 MA_CK1 DMB1 B17 H31 MB_CK1
DMA0 MA_DM(1) MA_CHECK(1) MA_CK0 DMB0 MB_DM(1) MB_CHECK(1) MB_CK0
H15 MA_DM(0) MA_CHECK(0) H27 B13 MB_DM(0) MB_CHECK(0) G31

CPU-SK/941AM3/S/15u/[10SC1-A01942-01R_10SC1-A01942-02R] CPU-SK/941AM3/S/15u/[10SC1-A01942-01R_10SC1-A01942-02R]

-DQSB[0..8]
-DQSB[0..8] <8>
DQSB[0..8] DQSB[0..8] <8>
MB_CK[0..7]
MB_CK[0..7] <8>
DMB[0..8]
DMB[0..8] <8>

Title
CPU DDRII MEMORY
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 5 of 27
VCC
SB600
DDR15V
CPU_PWR / DDR18V

-CPURST R26 300/4 BC132


0.1U/4/Y5V/16V/Z
-LDT_STOP R36 300/4 Q62
3
C74 150P/4/NPO/50V/J/X -CPURST VDDA25 4 2
250mA VDDA25
1

C1798 L1117LG/N/SOT223/1A R394


100P/4/NPO/50V/J 1.25*(1+100/100)=2.5V 100/4/1 BC18
22U/8/X5R/6.3V/M

BC2 R395
VDDA25 0.1U/4/Y5V/16V/Z/X 100/4/1

l
DDR15V Asus-used
C3 C13 C4

a
4.7u/8/Y5V/10V/Z 0.22u/6/X7R/16V/K
3.3n/4/X7R/50V/K M2CPUD

ti
VCORE MISC
C10 R2555 R2557 R57 R60 R87 3VDUAL
3.9n/4/X7R/50V/K VDDA1 1K/4/1 1K/4/1 300/4 300/4 1K/4/X
D10 VDDA2
<12> CPUCLK0_H CPUCLK0_H C1
BC1 CLKIN_H A8
0.01U/4/X7R/25V/K R5 CLKIN_L CLKIN_H R59
B8

n
CPUCLK0_L C2 169/4/1 CLKIN_L 8.2K/4/1
<12> CPUCLK0_L
CPU_PW RGD C9 D2
PW ROK VID(5)

e
3.9n/4/X7R/50V/K -LDT_STOP D8 D1
<10,13> -LDT_STOP LDTSTOP_L VID(4)
<10,13> -CPURST -CPURST C7 C1 THERMTRIP_CPU_L
3VDUAL VCC3 RESET_L VID(3) VID3 <24> THERMTRIP_CPU_L <14>
VID(2) E3 VID2 <24>

3
R49 1K/4/1 CPU_PRESENT_L AL3 E2

d
DDR15V CPU_PRESENT_L VID(1) VID1 <24>
E1 Q9
VID(0) VID0 <24>
R17 1K/4/1 MMBT2222A/SOT23/600mA/40

i
DDR15V
R2506 R2507 SI_CLK AL6 AK7 THERMTRIP_L
<22> SI_CLK SIC THERMTRIP_L SOT23
8.2K/4/1 8.2K/4/1 SI_DAT AK6 AL7 -PROCHOT_CPU

f
<22> SI_DAT SID PROCHOT_L
R19 1K/4/1 DDR15V R176 1K/4/1

1
DDR15V
CPU_TDI AL10 AK10
PW M_PW RGD <24> <14> CPU_TDI TDI TDO

3
DDR15V R75 1K/4/1 CPU_TRSTL AJ10
DDR15V TRST_L
3

n y
CPU_TCK AH10 Q10
<14> CPU_TCK TCK
Q309 Q310 C1752 CPU_TMS AL9 R2556 R2558
D D <14> CPU_TMS TMS
0.1u/4/Y5V/16V/Z/X 1K/4/X 1K/4/X
R2756 R35 1K/4/1 CPU_DBREQL SOT23

o
DDR15V A5 DBREQ_L DBRDY B6
300/4 G S G S R174 1K/4/1

1
G2 AK11 MMBT2222A/SOT23/600mA/40
<24> COREFB+ VDD_FB_H VDDIO_FB_H
R1 1K/4/1
2

<13> CPU_PG_SB <24> COREFB- G1 VDD_FB_L VDDIO_FB_L AL11


-PROCHOT_CPU <13,26> Erratum 133, Revision Guide for

C
MMBT2222A/SOT23/600mA/40 2N7002/SOT23/25pF/5 E12 F1

p
VTT_SENSE PSI_L AMD NPT 0Fh Processors
DDR15V F12 V8 R53 44.2/4/1
CPU_M_VREF M_VREF HTREF1 VCC_SB

e o
R11 39.2/4/1 M_ZN AH11 V7 R54 44.2/4/1
DDR15V M_ZN HTREF0
PWROK > R12 39.2/4/1 M_ZP AJ11 M_ZP

t
SVC/SVD(CPU_PWROK) R2754 R42 510/4/1 CPU_TEST25_H A10 R55 80.6/4/1/X
TEST25_H TEST29_H C11
10 uS 300/4 R43 510/4/1 CPU_TEST25_L B10 D11 Route as 80-Ohm differential impedance

C
DDR15V TEST25_L TEST29_L
R13 300/4 CPU_TEST18 F10

y
CPU_PW RGD R14 300/4 CPU_TEST19 TEST19
E9
AJ7
TEST18 Keep trace to resistor less than 1" from CPU pin
TEST13
3

t
F6 TEST9

b
Q355 C1790
D 0.1u/4/Y5V/16V/Z/X CPU_TEST24 CPU_TEST24 R2731 1K/4/1
D6 TEST17 TEST24 AK8
C1791 CPU_TEST23 CPU_TEST23 R44 1K/4/1

o
E7 TEST16 TEST23 AH8
G S

a
0.01U/4/X7R/25V/K/X F8 AJ9 CPU_TEST22 CPU_TEST22 R2730 1K/4/1
TEST15 TEST22 CPU_TEST21 CPU_TEST21 R47 1K/4/1
C5 TEST14 TEST21 AL8
R2727 1K/4/1 CPU_TEST12 AH9 CPU_TEST20 CPU_TEST20 R2729 1K/4/1
2

AJ8

n
TEST12 TEST20

g
2N7002/SOT23/25pF/5 E5 J10
TEST7 TEST28_H

i
AJ5 TEST6 TEST28_L H9
AG9 AK9 CPU_TEST27 CPU_TEST27 R2728 1K/4/1 DDR15V
<22> GNDA THERMDC TEST27 CPU_TEST26 CPU_TEST26 R37 1K/4/1
AG8 AK5

G Do
<22> TMPIN2 THERMDA TEST26
AH7 TEST3 TEST10 G7
AJ6 TEST2 TEST8 D4

CPU-SK/941AM3/S/15u/[10SC1-A01942-01R_10SC1-A01942-02R]

M2CPUE AM3 only


INTERNAL MISC
L25 RSVD1 MA_RESET- E20 MA_RESET_L MA_RESET_L <8>
L26 RSVD2 MB_RESET- B19 MB_RESET_L MB_RESET_L <8>
L31 RSVD3
L30 RSVD4 RSVD19 AL4 CPU_ALERT- R16 1K/4/1 DDR15V
AK4 R21 1K/4/1
RSVD20
RSVD21 AK3
DDR15V
CPUVREF RSVD22 F2
CPU_IDLEEXIT- R10 1K/4/1
M_VDDIO_PW RGD F3 DDR15V
W 26 DCLKA2
40 MILS WIDTH AM3 only W 25 DCLKA2- COREFB_NB+ G4 COREFB_NB+ <24>
SR19 AE27 G3
MODT_A3 COREFB_NB- COREFB_NB- <24>
CPU_M_VREF 16.9/4/1 A01P DCLKA1 U24 G5 CORE_TYPE_DET R2448 300/4
<8> DCLKA1 DCLKA1 CORE_TYP_DET DDR15V
A01N -DCLKA1 V24
<8> -DCLKA1 DCLKA1-
MODT_A1 AE28 AD25 AM2: high, AM2R2: low
<8> MODT_A1 MODT_A1 RSVD27
RSVD28 AE24
RSVD29 AE25
RSVD30 AJ18
RSVD31 AJ20
1

SBC12 SBC31 C18


SC35 SR20 RSVD32
Y31 DCLKB2 RSVD33 C20 AM3 =>DRAM Thermal Event Status
1U/6/X7R/16V/K 16.9/4/1 AM3 only Y30 G24
1N/4/X7R/50V/K DCLKB2- RSVD34 R104 1K/4/1
2

AG31 MODT_B3 RSVD35 G25 DDR15V


B01P DCLKB1 V31 H25
<8> DCLKB1 DCLKB1 RSVD36
B01N -DCLKB1 W 31 V29 MB_EVENT_L Layout: Route as 60 ohms
<8> -DCLKB1 DCLKB1- MB_EVENT_L MB_EVENT_L <8> Title
MODT_B1 AF31 W 30 MA_EVENT_L
<8> MODT_B1 MODT_B1 MA_EVENT_L MA_EVENT_L <8> with 5/10 W/S from CPU pins.
0.1u/4/X7R/16V/K
R105 1K/4/1
CPU CONTROL
DDR15V Size Document Number Rev
EVENT pins are for future AM3r2 Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 6 of 27
VCORE_NB
VLDT_RUN_B is connected to the VLDT_RUN power
supply through the package or on the die. It is only connected
on the board to decoupling near the CPU package. C1344 C1343 C1342 C1345 C1346
M2CPUF VCC_SB 22u/8/X5R/6.3V/M 0.1U/4/Y5V/16V/Z 180P/4/NPO/50V/J
VDD1 VCORE VCORE M2CPUI HT12B 1U/6/Y5V/10V/Z 0.01U/4/X7R/25V/K
A4 A3 M2CPUG M2CPUH VDDIO
VDD1 VSS1
VCORE_NB A6 VDD2 VSS2 A7 VDD2 VDD3 AJ4 VLDT_A1 VLDT_B1 H6
VCORE AA8 VDD3 VSS3 A9 L14 VDD1 VSS1 AK20 AA20 VDD1 VSS1 N17 AJ3 VLDT_A2 VLDT_B2 H5
AA10 A11 L16 AK22 AA22 N19 AJ2 H2 BC795
VDD4 VSS4 VDD2 VSS2 VDD2 VSS2 VLDT_A3 VLDT_B3 4.7u/8/Y5V/10V/Z
AA12 VDD5 VSS5 AA4 L18 VDD3 VSS3 AK24 AB13 VDD3 VSS3 N21 AJ1 VLDT_A4 VLDT_B4 H1
AA14 AA5 M2 AK26 AB15 N23 VCC_SB VCC_SB
VDD6 VSS6 VDD4 VSS4 VDD4 VSS4

l
AA16 VDD7 VSS7 AA7 M3 VDD5 VSS5 AK28 AB17 VDD5 VSS5 P2 D12 VDDR_4 VDDR_5 AG12
AA18 AA9 M7 AK30 AB19 P3 C12 AH12 DDR15V
AB7
VDD8 VSS8
AA11 M9
VDD6 VSS6
AL5 AB21
VDD6 VSS6
P8 B12
VDDR_3 VDDR_6
AJ12
BUTTOM SIDE
VDD9 VSS9 VDD7 VSS7 VDD7 VSS7 DDR15V VDDR_2 VDDR_7

a
AB9 VDD10 VSS10 AA13 M11 VDD8 VSS8 B4 AB23 VDD8 VSS8 P10 A12 VDDR_1 VDDR_8 AK12
AB11 VDD11 VSS11 AA15 M13 VDD9 VSS9 B9 AC12 VDD9 VSS9 P12 VDDR_9 AL12

i
AC4 VDD12 VSS12 AA17 M15 VDD10 VSS10 B11 AC14 VDD10 VSS10 P14 AB24 VDDIO1
AC5 AA19 M17 B14 AC16 P16 AB26 K24 SC2 SC4 SC5 SC6
VDD13 VSS13 VDD11 VSS11 VDD11 VSS11 VDDIO2 VSS1

t
AC8 AA21 M19 B16 AC18 P18 AB28 K26 0.22u/6/X7R/16V/K 0.01U/4/X7R/25V/K
VDD14 VSS14 VDD12 VSS12 VDD12 VSS12 VDDIO3 VSS2 0.22u/6/X5R/10V/K/X 180P/4/NPO/50V/J
AC10 VDD15 VSS15 AA23 N8 VDD13 VSS13 B18 AC20 VDD13 VSS13 P20 AB30 VDDIO4 VSS3 K28
AD2 VDD16 VSS16 AB2 N10 VDD14 VSS14 B20 AC22 VDD14 VSS14 P22 AC24 VDDIO5 VSS4 K30
AD3 AB3 N12 B22 AD11 R7 AD26 L7

n
VDD17 VSS17 VDD15 VSS15 VDD15 VSS15 VDDIO6 VSS5
AD7 VDD18 VSS18 AB8 N14 VDD16 VSS16 B24 AD23 VDD16 VSS16 R9 AD28 VDDIO7 VSS6 L9
AD9 VDD19 VSS19 AB10 N16 VDD17 VSS17 B26 AE12 VDD17 VSS17 R11 AD30 VDDIO8 VSS7 L11

e
AE10 AB12 N18 B28 AF11 R13 AF30 L13 DDR15V
VDD20 VSS20 VDD18 VSS18 VDD18 VSS18 VDDIO29 VSS8
AF7 VDD21 VSS21 AB14 P7 VDD19 VSS19 B30 L20 VDD19 VSS19 R15 M24 VDDIO9 VSS9 L15
AF9 VDD22 VSS22 AB16 P9 VDD20 VSS20 C3 L22 VDD20 VSS20 R17 M26 VDDIO10 VSS10 L17
AG4 AB18 P11 D14 M21 R19 M28 L19

d
VDD23 VSS23 VDD21 VSS21 VDD21 VSS21 VDDIO11 VSS11
AG5 VDD24 VSS24 AB20 P13 VDD22 VSS22 D16 M23 VDD22 VSS22 R21 M30 VDDIO12 VSS12 L21
AG7 AB22 P15 D18 N20 R23 P24 L23 SC9 SC10 SC7 SC8 SC31

i
VDD25 VSS25 VDD23 VSS23 VDD23 VSS23 VDDIO13 VSS13 22u/8/X5R/6.3V/M/X 4.7u/8/Y5V/10V/Z 180P/4/NPO/50V/J/X
AH2 VDD26 VSS26 AC7 P17 VDD24 VSS24 D20 N22 VDD24 VSS24 T8 P26 VDDIO14 VSS14 M8
AH3 AC9 P19 D22 P21 T10 P28 M10 22u/8/X5R/6.3V/M 4.7u/8/Y5V/10V/Z/X

f
VDD27 VSS27 VDD25 VSS25 VDD25 VSS25 VDDIO15 VSS15
B3 VDD28 VSS28 AC11 R4 VDD26 VSS26 D24 P23 VDD26 VSS26 T12 P30 VDDIO16 VSS16 M12
B5 VDD29 VSS29 AC13 R5 VDD27 VSS27 D26 R22 VDD27 VSS27 T14 T24 VDDIO17 VSS17 M14
VCORE_NB B7 VDD30 VSS30 AC15 R8 VDD28 VSS28 D28 T23 VDD28 VSS28 T16 T26 VDDIO18 VSS18 M16

n y
VCORE C2 VDD31 VSS31 AC17 R10 VDD29 VSS29 D30 U22 VDD29 VSS29 T18 T28 VDDIO19 VSS19 M18
C4 VDD32 VSS32 AC19 R12 VDD30 VSS30 E11 V23 VDD30 VSS30 T20 T30 VDDIO20 VSS20 M20
C6 VDD33 VSS33 AC21 R14 VDD31 VSS31 F4 W 22 VDD31 VSS31 T22 V25 VDDIO21 VSS21 M22

o
VCORE_NB C8 VDD34 VSS34 AC23 R16 VDD32 VSS32 F14 Y23 VDD32 VSS32 U4 V26 VDDIO22 VSS22 N4
VCORE D3 VDD35 VSS35 AD8 R18 VDD33 VSS33 F16 VSS33 U5 V28 VDDIO23 VSS23 N5
D5 VDD36 VSS36 AD10 R20 VDD34 VSS34 F18 VSS34 U7 V30 VDDIO24 VSS24 N7

VCORE_NB
D7
D9
VDD37 VSS37 AD12
AD14
T2
T3
VDD35 VSS35 F20
F22
VSS35 U9
U11
Y24
Y26
VDDIO25 VSS25 N9
N11 VCORE BUTTOM SIDE

C
VDD38 VSS38 VDD36 VSS36 VSS36 VDDIO26 VSS26
VCORE E4 AD16 T7 F24 U13 Y28 N13

p
VDD39 VSS39 VDD37 VSS37 VSS37 VDDIO27 VSS27
E6 VDD40 VSS40 AD20 T9 VDD38 VSS38 F26 VSS38 U15 Y29 VDDIO28 VSS28 N15
E8 VDD41 VSS41 AD22 T11 VDD39 VSS39 F28 VSS39 U17
VCORE_NB E10 VDD42 VSS42 AD24 T13 VDD40 VSS40 F30 VSS40 U19

e o
F5 AE4 T15 G9 U21 SC11 SC12 SC13 SC14 SC15
VCORE VDD43 VSS43 VDD41 VSS41 VSS41
F7 AE5 T17 G11 U23 0.22u/6/X7R/16V/K 0.22u/6/X5R/10V/K/X 180P/4/NPO/50V/J
VDD44 VSS44 VDD42 VSS42 VSS42 0.22u/6/X5R/10V/K/X 0.01U/4/X7R/16V/K/X

t
F9 VDD45 T19 VDD43 VSS43 H8 VSS43 V2
VCORE_NB F11 VDD46 VSS46 AE11 T21 VDD44 VSS44 H10 VSS44 V3
G6 AF2 U8 H12 V10

C
VCORE VDD47 VSS47 VDD45 VSS45 VSS45
G8 AF3 U10 H14 B2 V12

y
VDD48 VSS48 VDD46 VSS46 NB/RSVD VSS46
G10 VDD49 VSS49 AF8 U12 VDD47 VSS47 H16 VSS47 V14
VCORE_NB G12 VDD50 VSS50 AF10 U14 VDD48 VSS48 H18 VSS48 V16

t
VCORE H7 VDD51 VSS51 AF12 U16 VDD49 VSS49 V18

b
H11
H23
VDD52 VSS52 AF14
AF16
U18
U20
VDD50 VSS50 H24
H26
H20
AE7
NP/VSS1 VSS50 V20
V22
BUTTOM SIDE
VDD53 VSS53 VDD51 VSS51 NP/VSS2 VSS51

o
J8 VDD54 VSS54 AF18 V9 VDD52 VSS52 H28 VSS52 W9

a
J12 AF20 V11 H30 W 11 VCORE
VDD55 VSS55 VDD53 VSS53 VSS53
J14 VDD56 VSS56 AF22 V13 VDD54 VSS54 J4 VSS54 W 13
J16 AF24 V15 J5 W 15

n
VDD57 VSS57 VDD55 VSS55 VSS55

g
J18 VDD58 VSS58 AF26 V17 VDD56 VSS56 J7 VSS56 W 17
J20 VDD59 VSS59 AF28 V19 VDD57 VSS57 J9 VSS57 W 19

i
J22 AG10 V21 J11 W 21 SC16 SC17 SC18 SC19 SC20 SC21 SC22 SC23
VDD60 VSS61 VDD58 VSS58 VSS58 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M
J24 VDD61 VSS62 AG11 W4 VDD59 VSS59 J13 VSS59 W 23
K7 AH14 W5 J15 Y8 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M/X

G Do
VDD62 VSS63 VDD60 VSS60 VSS60
K9 VDD63 VSS64 AH16 W8 VDD61 VSS61 J17 VSS61 Y10
K11 VDD64 VSS65 AH18 W 10 VDD62 VSS62 J19 VSS62 Y12
K13 VDD65 VSS66 AH20 W 12 VDD63 VSS63 J21 VSS63 W7
K15 AH22 W 14 J23 Y20 VCORE
VDD66 VSS67 VDD64 VSS64 VSS64
K17 VDD67 VSS68 AH24 W 16 VDD65 VSS65 K2 VSS65 Y22
K19 VDD68 VSS69 AH26 W 18 VDD66 VSS66 K3
K21 VDD69 VSS70 AH28 W 20 VDD67 VSS67 K8
K23 VDD70 VSS71 AH30 Y2 VDD68 VSS68 K10
L4 AK2 Y3 K12 SC24 SC25 SC26 SC27 SC28 SC29 SC30
VDD71 VSS72 VDD69 VSS69 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M
L5 VDD72 VSS73 AK14 Y7 VDD70 VSS70 K14
L8 AK16 Y9 K16 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M
VDD73 VSS74 VDD71 VSS71
L10 VDD74 VSS75 AK18 Y11 VDD72 VSS72 K18
L12 VDD75 VSS240 Y14 Y13 VDD73 VSS73 K20
Y17 VDD150 VSS241 Y16 Y15 VDD74 VSS74 K22
Y19 VDD151 Y21 VDD75 VSS75 Y18

VCC_SB VCC_SB

1021 EMI

C1316 C1317 C1318 C1320 C1321 C1322 C1323


DDR15V 4.7u/8/Y5V/10V/Z 0.22u/6/X7R/16V/K 1N/4/X7R/50V/K 180P/4/NPO/50V/J BC24 BC25
VCC_SB 4.7u/8/Y5V/10V/Z 180P/4/NPO/50V/J 180P/4/NPO/50V/J 180P/4/NPO/50V/J
1N/4/X7R/50V/K

C1324 C1326 C1327 VCC_SB


C1328 C1329 C1330 C1331 C1332 C1333 4.7u/8/Y5V/10V/Z 22U/8/X5R/6.3V/M 22U/8/X5R/6.3V/M
4.7u/8/Y5V/10V/Z 4.7u/8/Y5V/10V/Z 0.22u/6/X7R/16V/K0.22u/6/X7R/16V/K 180P/4/NPO/50V/J180P/4/NPO/50V/J

C1334 C1335 C1336 C1338 C1339 C1340 C1341


4.7u/8/Y5V/10V/Z 22u/8/X5R/6.3V/M 0.22u/6/X7R/16V/K 1N/4/X7R/50V/K 1N/4/X7R/50V/K 100P/4/NPO/50V/J100P/4/NPO/50V/J
Title
CPU POWER & GND
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 7 of 27
8 7 6 5 4 3 2 1

DDR3_2
DDRVTT DDR3_1
DDRVTT 120 48
VTT FREE
120 48 240 49
VTT FREE VTT FREE MB_EVENT_L
240 49 187 MB_EVENT_L <6>
VTT FREE MA_EVENT_L FREE
187 MA_EVENT_L <6> 2 198
FREE VSS FREE
2 198 5
VSS FREE VSS
5 8 79
VSS VSS RSVD
8 79 11
VSS RSVD VSS MODT_B1
11 14 77 MODT_B1 <6>
VSS MODT_A1 VSS ODT1 MODT_B0
14 77 MODT_A1 <6> 17 195 MODT_B0 <5>
VSS ODT1 MODT_A0 VSS ODT0
17 195 MODT_A0 <5> 20
VSS ODT0 VSS
20 23 68
VSS VSS NC/PAR_IN
23 68 26 53
VSS NC/PAR_IN VSS NC/ERR_OUT
26 53 29 167
VSS NC/ERR_OUT VSS NC/TEST4
29 167 32
VSS NC/TEST4 VSS MB_CK0 -DQSB[0..8]
32 35 39 -DQSB[0..8] <5>
VSS MA_CK0 VSS CB0 MB_CK1
35 39 38 40
D
-DQSA[0..8]
-DQSA[0..8] <5> 38
VSS
VSS
CB0
CB1
40 MA_CK1 DDR15V Decouple 41
VSS
VSS
CB1
CB2
45 MB_CK2
D
41 45 MA_CK2 44 46 MB_CK3 DQSB[0..8]
VSS CB2 VSS CB3 DQSB[0..8] <5>
DQSA[0..8] 44 46 MA_CK3 47 158 MB_CK4
DQSA[0..8] <5> VSS CB3 DDR15V VSS CB4
47 158 MA_CK4 80 159 MB_CK5
DMA[0..8] VSS CB4 MA_CK5 VSS CB5 MB_CK6 DMB[0..8]
DMA[0..8] <5> 80 159 83 164 DMB[0..8] <5>
VSS CB5 MA_CK6 BC4 VSS CB6 MB_CK7
83 164 86 165
MA_CK[0..7] VSS CB6 MA_CK7 0.1u/4/Y5V/16V/Z VSS CB7
86 165 89

l
MA_CK[0..7] <5> VSS CB7 VSS
89 92
VSS BC8 VSS DQSB0
92 95 7
VSS DQSA0 0.1u/4/Y5V/16V/Z VSS DQS0 -DQSB0
95 7 98 6
VSS DQS0 -DQSA0 VSS DQS0* MB_CK[0..7]
98 6 101 MB_CK[0..7] <5>

a
VSS DQS0* BC6 VSS DQSB1
101 104 16
VSS DQSA1 0.1u/4/Y5V/16V/Z VSS DQS1 -DQSB1
104 16 107 15
VSS DQS1 VSS DQS1*

i
107 15 -DQSA1 110
VSS DQS1* VSS DQSB2
110 113 25
VSS DQSA2 VSS DQS2 -DQSB2
113 25 116 24

t
VSS DQS2 -DQSA2 VSS DQS2*
116 24 119
VSS DQS2* VSS DQSB3
119 121 34
VSS DQSA3 VSS DQS3 -DQSB3
121 34 124 33
VSS DQS3 -DQSA3 VSS DQS3*
124 33 127
VSS DQS3* VSS

n
127 130 85 DQSB4
VSS DQSA4 VSS DQS4 -DQSB4
130 85 133 84
133
VSS
VSS
DQS4
DQS4*
84 -DQSA4
DDR15V
136
VSS
VSS
DQS4* DDR15V Decouple
136 139 94 DQSB5

e
VSS DQSA5 VSS DQS5 -DQSB5 DDR15V
139 94 142 93
VSS DQS5 -DQSA5 VSS DQS5*
142 93 145
VSS DQS5* VSS DQSB6 BC131
145 148 103
VSS DQSA6 R106 VSS DQS6 -DQSB6 0.1u/4/Y5V/16V/Z
148 103 151 102
VSS DQS6 VREFDQ_A VSS DQS6*

d
151 102 -DQSA6 15/4/1 154
VSS DQS6* VSS DQSB7 BC129
154 157 112
VSS DQSA7 VREFDQ_A VSS DQS7 -DQSB7 0.1u/4/Y5V/16V/Z
157 112 160 111

i
VSS DQS7 -DQSA7 VSS DQS7*
160 111 163
VSS DQS7* VSS
163
VSS Trace min 10/10 166
VSS DQS8
43 DQSB8 BC125

f
166 43 DQSA8 R107 199 42 -DQSB8 0.1u/4/Y5V/16V/Z
VSS DQS8 -DQSA8 15/4/1 VSS DQS8*
199 42 202
VSS DQS8* VSS DMB0
202 205 125
VSS DMA0 VSS DM0/DQS9
205 125 208 126
VSS DM0/DQS9 VSS NC/DQS9* DDRVTT
208 126 211

n y
VSS NC/DQS9* VSS DMB1
211 214 134
VSS DMA1 VSS DM1/DQS10
214 134 217 135
VSS DM1/DQS10 VSS NC/DQS10*
C 217 135 220 C
VSS NC/DQS10* DDR15V VSS DMB2 BC118
220 223 143

o
VSS DMA2 VSS DM2/DQS11 22U/8/X5R/6.3V/M
223 143 226 144
VSS DM2/DQS11 VSS NC/DQS11*
226 144 229
VSS NC/DQS11* R52 VSS DMB3
229 232 152
VSS DMA3 15/4/1 VSS DM3/DQS12
232 152 235 153
VSS DM3/DQS12 VSS NC/DQS12*
235 153 239
VSS NC/DQS12* VREFCA_A VSS DMB4
239 203

C
VSS DMA4 DM4/DQS13
203 204

p
DM4/DQS13 VREFCA_A NC/DQS13*
204
NC/DQS13* DMB5 DDRVTT
51 212
DMA5 VDD DM5/DQS14
51
VDD DM5/DQS14
212 Trace min 10/10 54
VDD NC/DQS14*
213
54 213 57
VDD NC/DQS14* VDD

e o
57 R56 60 221 DMB6
VDD DMA6 15/4/1 VDD DM6/DQS15
60 221 62 222
VDD DM6/DQS15 VDD NC/DQS15* BC9
62 222 65

t
VDD NC/DQS15* VDD DMB7 0.1u/4/Y5V/16V/Z
65 66 230
VDD DMA7 DDR15V VDD DM7/DQS16
66 230 69 231
DDR15V VDD DM7/DQS16 VDD NC/DQS16*
69 231 72

C
VDD NC/DQS16* VDD DMB8
72 75 161
VDD

y
DMA8 VDD DM8/DQS17
75 161 78 162
VDD DM8/DQS17 VDD NC/DQS17*
78 162 170
VDD NC/DQS17* VDD
170 173
VDD VDD MDB0
173 176 3

t
VDD MDA0 VDD DQ0 MDB1

b
176 3 MDA[0..63] <5> 179 4
VDD DQ0 MDA1 VDD DQ1 MDB2 MDB[0..63] <5>
179 4 182 9
VDD DQ1 MDA2 VDD DQ2 MDB3
182 9 183 10
VDD DQ2 MDA3 VDD DQ3 MDB4
183 10 186 122

o
VDD DQ3 MDA4 VDD DQ4 MDB5

a
186 122 189 123
VDD DQ4 MDA5 VDD DQ5 MDB6
189 123 191 128
VDD DQ5 MDA6 VDD DQ6 MDB7
191 128 194 129
194
VDD
VDD
DQ6
DQ7
129 MDA7 197
VDD
VDD
DQ7
DQ8
12 MDB8 DDRVTT Decouple

n
197 12 MDA8 13 MDB9

g
C275 0.1u/4/Y5V/16V/Z VDD DQ8 MDA9 DQ9 MDB10
13 VCC3 236 18
DQ9 MDA10 VDDSPD DQ10 MDB11
236 18 19

i
VCC3 VDDSPD DQ10 DQ11
19 MDA11 131 MDB12
DQ11 MDA12 C284 0.1u/4/Y5V/16V/Z VREFCA_A DQ12 MDB13
131 67 132
C283 0.1u/4/Y5V/16V/ZVREFCA_A DQ12 MDA13 C285 0.1u/4/Y5V/16V/Z VREFDQ_A VREFCA DQ13 MDB14
67 132 1 137
VREFCA DQ13 VREFDQ DQ14

G Do
C282 0.1u/4/Y5V/16V/ZVREFDQ_A 1 137 MDA14 138 MDB15 DDRVTT
VREFDQ DQ14 MDA15 DQ15 MDB16
138 21
B DQ15 MDA16 SMBCLK DQ16 MDB17 BC149 0.1u/4/Y5V/16V/Z
B
21 <12,14,24> SMBCLK 118 22
SMBCLK DQ16 MDA17 SMBDATA SCL DQ17 MDB18
<12,14,24> SMBCLK 118 22 <12,14,24> SMBDATA 238 27
SMBDATA SCL DQ17 MDA18 SDA DQ18 MDB19
<12,14,24> SMBDATA 238 27 237 28
SDA DQ18 MDA19 SA1 DQ19 MDB20
237 28 VCC3 117 140
SA1 DQ19 MDA20 SA0 DQ20 MDB21
117 140 141
SA0 DQ20 MDA21 SBAB2 DQ21 MDB22
141 <5> SBAB2 52 146
SBAA2 DQ21 MDA22 SBAB1 BA2 DQ22 MDB23
<5> SBAA2 52 146 <5> SBAB1 190 147
SBAA1 BA2 DQ22 MDA23 SBAB0 BA1 DQ23 MDB24
<5> SBAA1 190 147 71 30
SBAA0 BA1 DQ23 MDA24 <5> SBAB0 BA0 DQ24 MDB25
<5> SBAA0 71 30 31
BA0 DQ24 MDA25 CKEB1 DQ25 MDB26
31 <5> CKEB1 169 36
CKEA1 DQ25 MDA26 CKEB0 CKE1 DQ26 MDB27
<5> CKEA1 169 36 <5> CKEB0 50 37
CKEA0 CKE1 DQ26 MDA27 CKE0 DQ27 MDB28
<5> CKEA0 50 37 149
CKE0 DQ27 MDA28 -CSB1 DQ28 MDB29
149 <5> -CSB1 76 150
DQ28 MDA29 -CSB0 S1* DQ29 MDB30
<5> -CSA1 76 150 <5> -CSB0 193 155
-CSA0 S1* DQ29 MDA30 S0* DQ30 MDB31
<5> -CSA0 193 155 156
S0* DQ30 MDA31 -DCLKB1 DQ31 MDB32
156 <6> -DCLKB1 64 81
-DCLKA1 DQ31 MDA32 DCLKB1 CK1/NU* DQ32 MDB33
<6> -DCLKA1 64 81 <6> DCLKB1 63 82
DCLKA1 CK1/NU* DQ32 MDA33 CK1/NU DQ33 MDB34
<6> DCLKA1 63 82 87
CK1/NU DQ33 MDA34 -DCLKB0 DQ34 MDB35
87 <5> -DCLKB0 185 88
-DCLKA0 DQ34 MDA35 DCLKB0 CK0* DQ35 MDB36
<5> -DCLKA0 185 88 <5> DCLKB0 184 200
DCLKA0 CK0* DQ35 MDA36 CK0 DQ36 MDB37
<5> DCLKA0 184 200 201
CK0 DQ36 MDA37 MAAB0 DQ37 MDB38
201 <5> MAAB[0..15] 188 206
MAAA0 DQ37 MDA38 MAAB1 A0 DQ38 MDB39
188 206 181 207
MAAA1 A0 DQ38 MDA39 MAAB2 A1 DQ39 MDB40
<5> MAAA[0..15] 181 207 61 90
MAAA2 A1 DQ39 MDA40 MAAB3 A2 DQ40 MDB41
61 90 180 91
MAAA3 A2 DQ40 MDA41 MAAB4 A3 DQ41 MDB42
180 91 59 96
MAAA4 A3 DQ41 MDA42 MAAB5 A4 DQ42 MDB43
59 96 58 97
MAAA5 A4 DQ42 MDA43 MAAB6 A5 DQ43 MDB44
58 97 178 209
MAAA6 A5 DQ43 MDA44 MAAB7 A6 DQ44 MDB45
178 209 56 210
MAAA7 A6 DQ44 MDA45 MAAB8 A7 DQ45 MDB46
56 210 177 215
MAAA8 A7 DQ45 MDA46 MAAB9 A8 DQ46 MDB47
177 215 175 216
MAAA9 A8 DQ46 MDA47 MAAB10 A9 DQ47 MDB48
175 216 70 99
MAAA10 A9 DQ47 MDA48 MAAB11 A10/AP DQ48 MDB49
70 99 55 100
MAAA11 A10/AP DQ48 MDA49 MAAB12 A11 DQ49 MDB50
55 100 174 105
MAAA12 A11 DQ49 MDA50 MAAB13 A12 DQ50 MDB51
174 105 196 106
MAAA13 A12 DQ50 MDA51 MAAB14 A13 DQ51 MDB52
196 106 172 218
MAAA14 A13 DQ51 MDA52 MAAB15 A14 DQ52 MDB53
172 218 171 219
MAAA15 A14 DQ52 MDA53 A15 DQ53 MDB54
171 219 224
A15 DQ53 MDA54 MB_RESET_L DQ54 MDB55
224 <6> MB_RESET_L 168 225
MA_RESET_L DQ54 MDA55 -SCASB RESET* DQ55 MDB56
A
<6> MA_RESET_L 168 225 <5> -SCASB 74 108 A
-SCASA RESET* DQ55 MDA56 -SRASB CAS* DQ56 MDB57
<5> -SCASA 74 108 <5> -SRASB 192 109
-SRASA CAS* DQ56 MDA57 -SWEB RAS* DQ57 MDB58
<5> -SRASA 192 109 <5> -SWEB 73 114
-SWEA RAS* DQ57 MDA58 WE* DQ58 MDB59
<5> -SWEA 73 114 115
WE* DQ58 MDA59 DQ59 MDB60
115 227
DQ59 MDA60 DQ60 MDB61
227 228
DQ60 MDA61 DQ61 MDB62
228 233
DQ61 MDA62 DQ62 MDB63
233 234
DQ62 MDA63 DQ63
234
DQ63
DDR3/240/BU/VA/D
DDR3/240/BU/VA/D
Title
GIGABYTE
DDRII CHANNEL A
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: Sheet 8 of 27
8 7 6 5 4 3 2 1
5 4 3 2 1

EXP_A_RXP[0..15] EXP_A_TXP[0..15]
EXP_A_RXP[0..15] <17> EXP_A_TXP[0..15] <17>
L0_CADIN_L[0..15] EXP_A_RXN[0..15] EXP_A_TXN[0..15]
L0_CADIN_L[0..15] <4> EXP_A_RXN[0..15] <17> EXP_A_TXN[0..15] <17>
L0_CADIN_H[0..15]
L0_CADIN_H[0..15] <4>

U3B
L0_CADOUT_L[0..15] EXP_A_RXP0 D4 A5 EXP_A_TXP0
L0_CADOUT_L[0..15] <4> GFX_RX0P GFX_TX0P
EXP_A_RXN0 C4 PART 2 OF 6 B5 EXP_A_TXN0
L0_CADOUT_H[0..15] EXP_A_RXP1 GFX_RX0N GFX_TX0N EXP_A_TXP1
D L0_CADOUT_H[0..15] <4> A3 GFX_RX1P GFX_TX1P A4 D
EXP_A_RXN1 B3 B4 EXP_A_TXN1
EXP_A_RXP2 GFX_RX1N GFX_TX1N EXP_A_TXP2
C2 GFX_RX2P GFX_TX2P C3
U3A EXP_A_RXN2 C1 B2 EXP_A_TXN2
L0_CADOUT_H0 L0_CADIN_H0 EXP_A_RXP3 GFX_RX2N GFX_TX2N EXP_A_TXP3
Y25 HT_RXCAD0P HT_TXCAD0P D24 E5 GFX_RX3P GFX_TX3P D1

l
L0_CADOUT_L0 Y24 PART 1 OF 6 D25 L0_CADIN_L0 EXP_A_RXN3 F5 D2 EXP_A_TXN3
L0_CADOUT_H1 HT_RXCAD0N HT_TXCAD0N L0_CADIN_H1 EXP_A_RXP4 GFX_RX3N GFX_TX3N EXP_A_TXP4
V22 HT_RXCAD1P HT_TXCAD1P E24 G5 GFX_RX4P GFX_TX4P E2
L0_CADOUT_L1 V23 E25 L0_CADIN_L1 EXP_A_RXN4 G6 E1 EXP_A_TXN4
HT_RXCAD1N HT_TXCAD1N GFX_RX4N GFX_TX4N

a
L0_CADOUT_H2 V25 F24 L0_CADIN_H2 EXP_A_RXP5 H5 F4 EXP_A_TXP5
L0_CADOUT_L2 HT_RXCAD2P HT_TXCAD2P L0_CADIN_L2 EXP_A_RXN5 GFX_RX5P GFX_TX5P EXP_A_TXN5
V24 HT_RXCAD2N HT_TXCAD2N F25 H6 GFX_RX5N GFX_TX5N F3

i
L0_CADOUT_H3 U24 F23 L0_CADIN_H3 EXP_A_RXP6 J6 F1 EXP_A_TXP6
L0_CADOUT_L3 HT_RXCAD3P HT_TXCAD3P L0_CADIN_L3 EXP_A_RXN6 GFX_RX6P GFX_TX6P EXP_A_TXN6
U25 HT_RXCAD3N HT_TXCAD3N F22 J5 GFX_RX6N GFX_TX6N F2

t
L0_CADOUT_H4 T25 H23 L0_CADIN_H4 EXP_A_RXP7 J7 H4 EXP_A_TXP7
L0_CADOUT_L4 HT_RXCAD4P HT_TXCAD4P L0_CADIN_L4 EXP_A_RXN7 GFX_RX7P GFX_TX7P EXP_A_TXN7
T24 HT_RXCAD4N HT_TXCAD4N H22 J8 GFX_RX7N GFX_TX7N H3
L0_CADOUT_H5 P22 J25 L0_CADIN_H5 EXP_A_RXP8 L5 H1 EXP_A_TXP8
L0_CADOUT_L5 HT_RXCAD5P HT_TXCAD5P L0_CADIN_L5 EXP_A_RXN8 GFX_RX8P GFX_TX8P EXP_A_TXN8

HYPER TRANSPORT CPU


P23 J24 L6 H2

n
L0_CADOUT_H6 HT_RXCAD5N HT_TXCAD5N L0_CADIN_H6 EXP_A_RXP9 GFX_RX8N GFX_TX8N EXP_A_TXP9
P25 HT_RXCAD6P HT_TXCAD6P K24 M8 GFX_RX9P GFX_TX9P J2
L0_CADOUT_L6 P24 K25 L0_CADIN_L6 EXP_A_RXN9 L8 J1 EXP_A_TXN9
L0_CADOUT_H7 HT_RXCAD6N HT_TXCAD6N L0_CADIN_H7 EXP_A_RXP10 GFX_RX9N GFX_TX9N EXP_A_TXP10

e
N24 HT_RXCAD7P HT_TXCAD7P K23 P7 GFX_RX10P GFX_TX10P K4

PCIE I/F
L0_CADOUT_L7 N25 K22 L0_CADIN_L7 EXP_A_RXN10 M7 K3 EXP_A_TXN10
HT_RXCAD7N HT_TXCAD7N EXP_A_RXP11 GFX_RX10N GFX_TX10N EXP_A_TXP11
P5 GFX_RX11P GFX_TX11P K1
L0_CADOUT_H8 AC24 F21 L0_CADIN_H8 EXP_A_RXN11 M5 K2 EXP_A_TXN11

d
L0_CADOUT_L8 HT_RXCAD8P HT_TXCAD8P L0_CADIN_L8 EXP_A_RXP12 GFX_RX11N GFX_TX11N EXP_A_TXP12
AC25 G21 R8 M4

GFX
L0_CADOUT_H9 HT_RXCAD8N HT_TXCAD8N L0_CADIN_H9 EXP_A_RXN12 GFX_RX12P GFX_TX12P EXP_A_TXN12
AB25 G20 P8 M3

i
L0_CADOUT_L9 HT_RXCAD9P HT_TXCAD9P L0_CADIN_L9 EXP_A_RXP13 GFX_RX12N GFX_TX12N EXP_A_TXP13
AB24 HT_RXCAD9N HT_TXCAD9N H21 R6 GFX_RX13P GFX_TX13P M1
L0_CADOUT_H10 AA24 J20 L0_CADIN_H10 EXP_A_RXN13 R5 M2 EXP_A_TXN13

f
L0_CADOUT_L10 HT_RXCAD10P HT_TXCAD10P L0_CADIN_L10 EXP_A_RXP14 GFX_RX13N GFX_TX13N EXP_A_TXP14
AA25 HT_RXCAD10N HT_TXCAD10N J21 P4 GFX_RX14P GFX_TX14P N2
L0_CADOUT_H11 Y22 J18 L0_CADIN_H11 EXP_A_RXN14 P3 N1 EXP_A_TXN14
L0_CADOUT_L11 HT_RXCAD11P HT_TXCAD11P L0_CADIN_L11 EXP_A_RXP15 GFX_RX14N GFX_TX14N EXP_A_TXP15
Y23 HT_RXCAD11N HT_TXCAD11N K17 T4 GFX_RX15P GFX_TX15P P1

n y
L0_CADOUT_H12 W 21 L19 L0_CADIN_H12 EXP_A_RXN15 T3 P2 EXP_A_TXN15
L0_CADOUT_L12 HT_RXCAD12P HT_TXCAD12P L0_CADIN_L12 GFX_RX15N GFX_TX15N
W 20 HT_RXCAD12N HT_TXCAD12N J19
C L0_CADOUT_H13 V21 M19 L0_CADIN_H13 AE3 AC1 PLACE CAP CLOSE C
L0_CADOUT_L13 HT_RXCAD13P HT_TXCAD13P L0_CADIN_L13 GPP_RX0P GPP_TX0P TO CONNECTOR

o
V20 HT_RXCAD13N HT_TXCAD13N L18 AD4 GPP_RX0N GPP_TX0N AC2
L0_CADOUT_H14 U20 M21 L0_CADIN_H14 AE2 AB4 GPP_TX1P_C C130 0.1U/4/X7R/16V/K
HT_RXCAD14P HT_TXCAD14P <17> PCIE2_IP GPP_RX1P GPP_TX1P PCIE2_OP <17>
L0_CADOUT_L14 U21 P21 L0_CADIN_L14 AD3 AB3 GPP_TX1N_C C129 0.1U/4/X7R/16V/K
HT_RXCAD14N HT_TXCAD14N <17> PCIE2_IN GPP_RX1N GPP_TX1N PCIE2_ON <17>
L0_CADOUT_H15 U19 P18 L0_CADIN_H15 AD1 AA2 GPP_TX2P_C C136 0.1U/4/X7R/16V/K
HT_RXCAD15P HT_TXCAD15P <19> ML_IP GPP_RX2P GPP_TX2P ML_OP <19>
L0_CADOUT_L15 U18 M18 L0_CADIN_L15 AD2 PCIE I/F GPP AA1 GPP_TX2N_C C137 0.1U/4/X7R/16V/K
<19> ML_IN ML_ON <19>

C
HT_RXCAD15N HT_TXCAD15N GPP_RX2N GPP_TX2N
V5 Y1

p
L0_CLKOUT_H0 L0_CLKIN_H0 GPP_RX3P GPP_TX3P
T22 H24 W6 Y2
I/F

<4> L0_CLKOUT_H0 HT_RXCLK0P HT_TXCLK0P L0_CLKIN_H0 <4> GPP_RX3N GPP_TX3N


L0_CLKOUT_L0 T23 H25 L0_CLKIN_L0 U5 Y4
<4> L0_CLKOUT_L0 HT_RXCLK0N HT_TXCLK0N L0_CLKIN_L0 <4> GPP_RX4P GPP_TX4P
L0_CLKOUT_H1 AB23 L21 L0_CLKIN_H1 U6 Y3
<4> L0_CLKOUT_H1 HT_RXCLK1P HT_TXCLK1P L0_CLKIN_H1 <4> GPP_RX4N GPP_TX4N

e o
L0_CLKOUT_L1 AA22 L20 L0_CLKIN_L1 U8 V1
<4> L0_CLKOUT_L1 HT_RXCLK1N HT_TXCLK1N L0_CLKIN_L1 <4> GPP_RX5P GPP_TX5P
U7 GPP_RX5N GPP_TX5N V2
L0_CTLOUT_H0 L0_CTLIN_H0

t
<4> L0_CTLOUT_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 L0_CTLIN_H0 <4>
L0_CTLOUT_L0 M23 M25 L0_CTLIN_L0 A_RX0P AA8 AD7 A_TX0P_C C138 0.1U/4/X7R/16V/K
<4> L0_CTLOUT_L0 HT_RXCTL0N HT_TXCTL0N L0_CTLIN_L0 <4> <13> A_RX0P SB_RX0P SB_TX0P A_TX0P <13>
L0_CTLOUT_H1 R21 P19 L0_CTLIN_H1 A_RX0N Y8 AE7 A_TX0N_C C139 0.1U/4/X7R/16V/K

C
<4> L0_CTLOUT_H1 HT_RXCTL1P HT_TXCTL1P L0_CTLIN_H1 <4> <13> A_RX0N SB_RX0N SB_TX0N A_TX0N <13>
L0_CTLOUT_L1 R20 R18 L0_CTLIN_L1 A_RX1P AA7 AE6 A_TX1P_C C140 0.1U/4/X7R/16V/K

y
<4> L0_CTLOUT_L1 HT_RXCTL1N HT_TXCTL1N L0_CTLIN_L1 <4> <13> A_RX1P SB_RX1P SB_TX1P A_TX1P <13>
A_RX1N Y7 AD6 A_TX1N_C C141 0.1U/4/X7R/16V/K
<13> A_RX1N SB_RX1N SB_TX1N A_TX1N <13>
R267 301/4/1 HT_RXCALP C23 B24 HT_TXCALP R268 301/4/1 A_RX2P AA5 PCIE I/F SB AB6 A_TX2P_C C142 0.1U/4/X7R/16V/K
HT_RXCALP HT_TXCALP <13> A_RX2P SB_RX2P SB_TX2P A_TX2P <13>

t
HT_RXCALN A24 B25 HT_TXCALN A_RX2N AA6 AC6 A_TX2N_C C143 0.1U/4/X7R/16V/K
HT_RXCALN HT_TXCALN <13> A_RX2N SB_RX2N SB_TX2N A_TX2N <13>

b
A_RX3P W5 AD5 A_TX3P_C C144 0.1U/4/X7R/16V/K
<13> A_RX3P SB_RX3P SB_TX3P A_TX3P <13>
RS780L/FCBGA528/A13/[10HB1-06760G-20R] A_RX3N Y5 AE5 A_TX3N_C C145 0.1U/4/X7R/16V/K
<13> A_RX3N SB_RX3N SB_TX3N A_TX3N <13>

a o
AC8 R210 1.27K/4/1
PCE_CALRP(PCE_BCALRP) R212 2K/4/1
PCE_CALRN(PCE_BCALRN) AB8 NB_VCC

g n
RS780L/FCBGA528/A13/[10HB1-06760G-20R]

i
VCORE

G Do
B B

BC14 BC7
0.1U/4/X7R/16V/K 0.1U/4/X7R/16V/K

1
NB_HS

1
A A

2
Title

2
RS780 HT-LINK I/F
NB_HS/[12SP2-SA0701-01R_12SP2-SA0701-02R] Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 9 of 27
5 4 3 2 1
5 4 3 2 1

EMI 20080103
RS740/RX780/RS780 STRAPS
Note: for RS780, change R232 to 150R as AUX_CAL,
SR4 0/6/SHT/X
place close to pin C8
VCC3 RS740_DFT_GPIO1 R272 150/4/1

SBC34 Note: for RX780, R217 (RX780_DFT_GPIO1) to 3K accordingly


1U/6/Y5V/10V/Z
U3C
F12 A22 TXD0+
AVDD1(NC) TXOUT_L0P(NC) TXD0- R276 3K/4/1
E12 AVDD2(NC) PART 3 OF 6 TXOUT_L0N(NC) B22 VCC18 <21> DAC_VSYNC VCC3
D VCC18 F14 A21 TXD1+ D
AVDDDI(NC) TXOUT_L1P(NC) TXD1- SBC15
G15 AVSSDI(NC) TXOUT_L1N(NC) B21
H15 B20 TXD2+ SBC35 BC143 SBC36 0.1u/4/Y5V/16V/Z
BC139 SBC29 AVDDQ(NC) TXOUT_L2P(NC) TXD2- 10U/8/X5R/6.3V/K 1U/6/Y5V/10V/Z 1U/6/Y5V/10V/Z
H14 AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) A20
TXOUT_L3P(NC) A19

l
1U/6/Y5V/10V/Z Note: for RX780, change following

CRT/TVOUT
E17 C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) B19
F17 Y(DFT_GPIO2) pull-down resistor to 3K accordingly
F15 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) B18

a
1U/6/Y5V/10V/Z A18 R912 (RX780_DFT_GPIO5)
TXOUT_U0N(NC)
G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17

i
<21> DAC_RED
G17 REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) B17
<21> DAC_GREEN E18 GREEN(DFT_GPIO1) TXOUT_U2P(NC) D20

t
F18 GREENb(NC) TXOUT_U2N(NC) D21 Note: for RX780, change following
<21> DAC_BLUE E19 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) D18 pull-down resistor to 3K accordingly
F19 BLUEb(NC) TXOUT_U3N(NC) D19
R913 (RX780_DFT_GPIO4)

n
SR1~SR3 PLACED SR3 SR2 SR1 DAC_HSYNC A11 B16 TXC+ R218 (RX780_DFT_GPIO3)
WITHIN 1' OF NB <21> DAC_HSYNC DAC_HSYNC(PW M_GPIO4) TXCLK_LP(DBG_GPIO1)
150/4/1 150/4/1 140/4/1 DAC_VSYNC B11 A16 TXC- R911 (RX780_DFT_GPIO2)
<21> DAC_VSYNC DAC_VSYNC(PW M_GPIO6) TXCLK_LN(DBG_GPIO3) VCC18
DDCDATA

e
<21> DDCDATA E8 DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4) D16
<21> DDCCLK DDCCLK F8 D17
DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
R132 715/4/1 G14 R285 3K/4/1 VCC3

d
DAC_RSET(PW M_GPIO1) <21> DAC_HSYNC
NB_PW ROK A13
EMI ESD ISSUE VDDLTP18(NC) BC150 BC151
A12 B13

i
NB_VCC PLLVDD(NC) VSSLTP18(NC)
D14 1U/6/Y5V/10V/Z Q74

LVTM
VCC18 PLLVDD18(NC)
C7 VDDLT18 0.1U/4/Y5V/16V/Z Note: for RX780, change following

PM PLL PWR
B12 A15 1

S
f
PLLVSS(NC) VDDLT18_1(NC) VCC18
100P/4/NPO/50V/J/X B15 3
VDDLT18_2(NC) R156 8.2K/4/1
pull-down resistor to 3K accordingly

D
VCC18 H17 VDDA18HTPLL VDDLT33_1(NC) A14 2 +12V
B14 R219 (RX780_DFT_GPIO0)

G
VDDLT33_2(NC)

n y
VCC18 D7 P8503BMG/SOT23/450pF/85m
VDDA18PCIEPLL1

M1
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
C D15 BC145 SHIELD1 C
-CPURST R271 0/4/SHT/X -NB_RST_C VSSLT2(VSS)

o
<6,13> -CPURST D8 C16 0.1U/4/Y5V/16V/Z BC146 DVI
NB_PW ROK SYSRESETb VSSLT3(VSS) 1U/6/Y5V/10V/Z TXD0- TX0-
<25> NB_PW ROK A10 POW ERGOOD VSSLT4(VSS) C18 17
-LDT_STOP C10 C20 TXD0+ 18 TX0+
NB_VCC <6,13> -LDT_STOP LDTSTOPb VSSLT5(VSS) TX1-
C12 E20 TXD1- 9
<13> ALLOW _LDTSTOP ALLOW _LDTSTOP VSSLT6(VSS) TX1+ 17 9 1 DVI-30P-2
C22 FUSEVCC TXD1+ 10

C
VSSLT7(VSS) TXD2- TX2- COMMON
<12> NBHT_REFCLKP C25 1

p
HT_REFCLKP TXD2+ TX2+
<12> NBHT_REFCLKN C24 HT_REFCLKN 2
R159 3 SHLD24
150/4/1 BC678 SHLD13

CLOCKs
<12> OSC_14M_NB E11 REFCLK_P/OSCIN(OSCIN) 11

o
SHLD05

e
REFCLKN F11 E9 0.1U/4/Y5V/16V/Z 19
REFCLKN REFCLK_N(PW M_GPIO3) LVDS_DIGON(PCE_TCALRP) TX3-
LVDS_BLON(PCE_RCALRP) F7 12
TX3+

t
<12> NBSRC_CLKP T2 GFX_REFCLKP LVDS_ENA_BL(PW M_GPIO2) G12 13
R158 T1 4 TX4-
<12> NBSRC_CLKN GFX_REFCLKN TX4+
150/4/1 5

C
U1 R2128 4.7K/4 20 TX5-

y
GPP_REFCLKP VCC TX5+
U2 GPP_REFCLKN 21
I2C_CLK 6 DDCC
DDCD

t
V4 I2C_DATA 7
<12> SBLINK_CLKP GPPSB_REFCLKP(SB_REFCLKP)

b
V3 14 VDDC
<12> SBLINK_CLKN GPPSB_REFCLKN(SB_REFCLKN) FUSEVCC GND
VCC R2127 4.7K/4 15
I2C_DATA SHLDC

o
NB_VCC A9 I2C_DATA 22

a
I2C_CLK D9 TMDS_HPD TXC- TXC-
B9
B8
I2C_CLK MIS. TMDS_HPD(NC)
D10 TXC+
24
23 TXC+
BC141 DDC_DATA/AUX0P(NC) HPD(NC) VSYNC
A8 DDC_CLK/AUX0N(NC) 8

n
HPD

g
1U/6/Y5V/10V/Z B7 D12 -SUS_STAT TMDS_HPD R312 33/4 DVI_HPD 16
AUX1P(NC) TVCLKIN(PW M_GPIO5) -SUS_STAT <14> 24 16 8
A7 AUX1N(NC)

2
i
THERMALDIODE_P AE8
VCC3 R265 8.2K/4/1 STRP_DATA B10 AD8 D9 R331
STRP_DATA THERMALDIODE_N 100K/4/1
3

G Do
G11 RSVD TESTMODE D13 TEST_EN R279 1.8K/4/1 AME385BEETZ/SOT23/2.5V
B B
RS740_DFT_GPIO1 C8

1
AUX_CAL(NC)
RS780L/FCBGA528/A13/[10HB1-06760G-20R] SHIELD2
M2

DVI-D/24P/SC/RA/D

U3D
PAR 4 OF 6 I2C_DATA TXD1+ TXD2- TXC+ TXD0-
AB12 AA18 I2C_CLK TMDS_HPD TXD1- TXD2+ TXC- TXD0+
MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC)
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
AE15 Y19
10

10

10
MEM_A3(NC) MEM_DQ3/DVO_D0(NC)
9

6
AA12 V17 ESD1 ESD2 ESD3
MEM_A4(NC) MEM_DQ4(NC)
AB16 AA17
NC

NC

GND

NC

NC

NC

NC

GND

NC

NC

NC

NC

GND

NC

NC
MEM_A5(NC) MEM_DQ5/DVO_D1(NC)
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20
AD15 AD19
SBD_MEM/DVO_I/F

MEM_A9(NC) MEM_DQ9/DVO_D5(NC) 11 11 11
AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
Y14 AD22
GND

GND

GND
MEM_A13(NC) MEM_DQ13/DVO_D9(NC)
D1+

D2+

D1+

D2+

D1+

D2+
D1-

D2-

D1-

D2-

D1-

D2-
MEM_DQ14/DVO_D10(NC) AC22
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
AE17 AZ1045-04F/MSOP10 AZ1045-04F/MSOP10 AZ1045-04F/MSOP10
MEM_BA1(NC)
AD17 Y17
1

5
MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC) W 18
A W 12 AD20 I2C_CLK TMDS_HPD TXD1- TXD2+ TXC- TXD0+ A
MEM_RASb(NC) MEM_DQS1P(NC) I2C_DATA TXD1+ TXD2- TXC+ TXD0-
Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
AD18 MEM_W Eb(NC)
AB13 MEM_CSb(NC) MEM_DM0(NC) W 17
AB18 AE19 VCC18 NB_VCC
MEM_CKE(NC) MEM_DM1/DVO_D8(NC)
V14 MEM_ODT(NC)
IOPLLVDD18(NC) AE23
V15 MEM_CKP(NC) IOPLLVDD(NC) AE24
W 14 MEM_CKN(NC)
AD23 BC61 Title
IOPLLVSS(NC)
AE12
AD12
MEM_COMPP(NC)
AE18
BC60 0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
RS780 SYSTEM I/F,STRAP
MEM_COMPN(NC) MEM_VREF(NC) Size Document Number Rev
RS780L/FCBGA528/A13/[10HB1-06760G-20R] Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 10 of 27
5 4 3 2 1
5 4 3 2 1

RS740/RX780/RS780 POWER DIFFERENCE TABLE


PIN NAME RS740 RX780 RS780 PIN NAME RS740 RX780 RS780

AE14
AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
VDDHT NC +1.1V +1.1V IOPLLVDD +1.2V NC +1.1V
A2
B1

E4

P6

V7

V8
V6

Y6
L1
L2
L4
L7
J4
U3F VDDHTRX NC +1.1V +1.1V AVDD +3.3V NC +3.3V
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VDDHTTX +1.2V +1.2V +1.2V AVDDDI +1.8V NC +1.8V

VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V

VDD18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V


PART 6/6

GROUND VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V


D D
VDDPCIE +1.2V +1.1V +1.1V VDDA18PCIEPLL +1.2V +1.8V +1.8V

VDDC +1.2V +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V +1.8V


VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9

l
VDD_MEM +1.8V NC +1.8V(DDR2) VDDLTP18 +1.8V NC +1.8V

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
+1.5V(DDR3)
VDD33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V

AD25

a
AC12
AA14

AB11
AB15
AB17
AB19
AE20
AB21
W22
W24
W25

W11
W15
M20

M14
G22
G24
G25
D23

H19

N22

R19
R22
R24
R25
H20
U22

N13

R11
R14

U14
U11
U15
IOPLLVDD18 +1.8V NC +1.8V VDDLT33 +3.3V NC NC
A25

E22

P20

V19

Y21

P12
P15

V12

Y18

K11
T12
L17
L22
L24
L25

L12
J22

ti
RS780L/FCBGA528/A13/[10HB1-06760G-20R]

n
Please use 1mm pad size,

e
place all ELT test pads
on bottom side only

C
NB_VCC

SBC19 SBC14
1.1V J17
K16
L16
U3E

VDDHT_1
VDDHT_2
VDDHT_3

fi
n y d
PART 5/6
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
A6
B6
C6
SBC27 SBC6
1.1V
NB_VCC

o
M16 D6 BC88 BC69 BC54 BC83 BC43 BC94
0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z VDDHT_4 VDDPCIE_4 10u/8/X5R/6.3V/K
P16 VDDHT_5 VDDPCIE_5 E6
R16 F6 1U/6/Y5V/10V/Z
VDDHT_6 VDDPCIE_6 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z
T16 VDDHT_7 VDDPCIE_7 G7
H8 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z

C
1.1V VDDPCIE_8 0.1u/4/Y5V/16V/Z
H18 J9

p
VDDHTRX_1 VDDPCIE_9
G19 VDDHTRX_2 VDDPCIE_10 K9
F20 VDDHTRX_3 VDDPCIE_11 M9
BC31 BC68 BC70 E21 L9
VDDHTRX_4 VDDPCIE_12

e o
22U/8/X5R/6.3V/M 1U/6/Y5V/10V/Z 0.1u/4/Y5V/16V/Z D22 P9
VDDHTRX_5 VDDPCIE_13
B23 VDDHTRX_6 VDDPCIE_14 R9

t
A23 VDDHTRX_7 VDDPCIE_15 T9
VDDPCIE_16 V9
1.2V AE25 U9 NB_VCC

C
VCC_SB VDDHTTX_1 VDDPCIE_17
AD24

y
VDDHTTX_2 1.1V
AC23 VDDHTTX_3 VDDC_1 K12
BC32 BC91 SBC25 SBC18 SBC22 AB22 J14
VDDHTTX_4 VDDC_2

t
10u/8/X5R/6.3V/K 0.1u/4/Y5V/16V/Z AA21 U16
VDDHTTX_5 VDDC_3

b
Y20 J11 SBC9 SBC10 SBC11 SBC13 SBC8 SBC7 SBC4 SBC2
0.1u/4/Y5V/16V/Z VDDHTTX_6 VDDC_4 10u/8/X5R/6.3V/K
W 19 K15
POWER
0.1u/4/Y5V/16V/Z VDDHTTX_7 VDDC_5

o
V18 VDDHTTX_8 VDDC_6 M12

a
0.1u/4/Y5V/16V/Z U17 L14 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z 10u/8/X5R/6.3V/K
VDDHTTX_9 VDDC_7 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z
T17 VDDHTTX_10 VDDC_8 L11
R17 M13 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z
VDDHTTX_11 VDDC_9

g n
P17 VDDHTTX_12 VDDC_10 M15
M17 VDDHTTX_13 VDDC_11 N12

i
VDDC_12 N14
VCC18 J10 VDDA18PCIE_1 VDDC_13 P11
P10 P13

G Do
VDDA18PCIE_2 VDDC_14 BC65 BC56 SBC16 SBC17
K10 VDDA18PCIE_3 VDDC_15 P14
B BC33 BC37 BC58 SBC26 SBC23 SBC24 0.1u/4/Y5V/16V/Z B
M10 VDDA18PCIE_4 VDDC_16 R12
22u/8/X5R/6.3V/M L10 R15
1U/6/Y5V/10V/Z 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z VDDA18PCIE_5 VDDC_17
W9 VDDA18PCIE_6 VDDC_18 T11
0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z H9 T15 0.1u/4/Y5V/16V/Z
VDDA18PCIE_7 VDDC_19 0.1u/4/Y5V/16V/Z
T10 VDDA18PCIE_8 VDDC_20 U12
R10 T14 0.1u/4/Y5V/16V/Z
VDDA18PCIE_9 VDDC_21 VCC18
Y9 VDDA18PCIE_10 VDDC_22 J16
AA9 VDDA18PCIE_11
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11
AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
VCC18 U10 AD10 SBC32 SBC33 BC55
VDDA18PCIE_15 VDD_MEM4(NC) 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z 10u/8/X5R/6.3V/K
VDD_MEM5(NC) AB10
F9 VDDG18_1(VDD18_1) VDD_MEM6(NC) AC10
G9 VDDG18_2(VDD18_2)
AE11 VDD18_MEM1(NC) VDDG33_1(NC) H11 VCC3
BC42 BC34 AD11 H12
1U/6/Y5V/10V/Z 1u/4/X5R/6.3V/K VDD18_MEM2(NC) VDDG33_2(NC)
RS780L/FCBGA528/A13/[10HB1-06760G-20R] BC53 SBC30
1U/6/Y5V/10V/Z 0.1u/4/Y5V/16V/Z

A A

Title
RS780 POWER & GND
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 11 of 27
5 4 3 2 1
5 4 3 2 1
NB CLOCK INPUT TABLE
VCC3 NB CLOCKS RS740 RX780 RS780

HT_REFCLKP
66M SE(SE) 100M DIFF 100M DIFF
BC903 HT_REFCLKN NC 100M DIFF 100M DIFF
BC892 BC893 BC894 BC895 BC896 BC897 BC898 BC899 BC36 0.1U/4/Y5V/16V/Z
1U/6/Y5V/10V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 22u/8/X5R/6.3V/M REFCLK_P
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) 100M DIFF
REFCLK_N NC NC vref
100M DIFF
GFX_REFCLK* 100M DIFF 100M DIFF 100M DIFF

GPP_REFCLK NC 100M DIFF 100M DIFF(OUT)


D D
GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF

1- PLACE ALL THE SERIES TERMINATION


RESISTORS AS CLOSE TO U800 AS * the GFX_REFCLK input is required for all cases

l
POSSIBLE
2- ROUTE ALL SRCCLKTx AND SRCCLKCx

a
AS DIFFERENT PAIR RULE

i
3- PUT DECOUPLING CAPS CLOSE TO U800
POWER PIN

t
U4

VCC3 1 VDDHTT CPUK8_0T 51 CPUCLK0_H <6>


5 50

n
VDDREF CPUK8_0C CPUCLK0_L <6>
20 VDDSRC CPUK8_1T 47
21 VDDSRC CPUK8_1C 46

e
30 VDDSB
37 VDDATIG
42 VDD ATIG0T 41 NBSRC_CLKP <10>
45 40

d
VDDA ATIG0C NBSRC_CLKN <10>
49 VDDCPU ATIG1T 39 SRCCLK_3GIO_A <17>
9 38

i
VDD48 ATIG1C -SRCCLK_3GIO_A <17>
ATIG2T 35
34

f
ATIG2C
6 GNDREF
12 GND48 SB_SRC0T 32 PCIE2_CLK <17>

n y
19 GNDSRC SB_SRC0C 31 -PCIE2_CLK <17>
22 GNDSRC SB_SRC1T 28
C 29 27 C
GNDSB SB_SRC1C

o
33 GNDATIG
36 GNDATIG
43 GND SRC0T 26
44 GNDA SRC0C 25
C9 22P/4/NPO/50V/J 48 24 SRCCLK_LAN <19>

C
GNDCPU SRC1T
54 23 -SRCCLK_LAN <19>

p
GNDHTT SRC1C
SRC2T 18 SBSRC_CLKP <13>
X7 9LPRS482 / RTM880T-792 17
SRC2C SBSRC_CLKN <13>
SRC3T 16 SBLINK_CLKP <10>

e o
14.318M/16p/20ppm/49US/40/D 7 15
X1 SRC3C SBLINK_CLKN <10>
C10 22P/4/NPO/50V/J 8 X2

t
HTT0T/66M 56 NBHT_REFCLKP <10>
55

C
HTT0C/66M NBHT_REFCLKN <10>
<8,14,24> SMBCLK 13

y
<8,14,24> SMBDATA SMBCLK
14 SMBDAT
watch dog -- 48Mz_0 11 SIO_CLOCK_R R51 22/4
LPC48 <22>

t
10 48M_USB_R R61 22/4
RESTORE# 接 RESET 48Mz_1 USB48M <14>

b
R74 1K/4/1/X
R62 1K/4/1 52 R73 1K/4/1
VCC3 *PD# R71 1K/4/1/X

o
**SEL_HTT66/REF0 4 VCC3

a
3 R68 1K/4/1/X
REF1 VCC3
R63 22/4 53 2 R65 158/4/1
<23,25> RESET *RESTORE# REF2 OSC_14M_NB <10>
R64 1K/4/1/X
VCC3

g n
RS740 Stuff 33ohm
RS780 Stuff 158ohm

i
R66
90.9/4/1
OSC_14M_NB ★ RS780 Stuff only

G Do
RTM880T-792/S
B B
RS740 3.3V 33R serial
RX780 1.8V 82.5R/130R
RS780 1.1V 158R/90.9R
(Single-ended)
**SEL_HTT66/REF0 OUT 3.3V 14.318MHz REF output.

Low 100MHz differential HT clock, (Internal 120KΩ pull-down)


IN
High 66MHz 3.3V single ended HT clock.

A A

Title
RTM880T-792
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 12 of 27
5 4 3 2 1
5 4 3 2 1

U2A
PLACE THESE PCIE AC COUPLING SB700
CAPS CLOSE TO U600 <22> -A_RST R283 33/4 N2 P4
A_RST# PCICLK0 PCLK1 R251 22/4 LPC33
Part 1 of 5 P3

PCI CLKS
PCICLK1 LPC33 <22>
C218 0.1U/4/X7R/16V/K V23 P1 PCLK2 R160 22/4 PCICLK1
<9> A_RX0P PCIE_TX0P PCICLK2 PCICLK1 <18>
C219 0.1U/4/X7R/16V/K V22 P2 PCLK3
<9> A_RX0N PCIE_TX0N PCICLK3
C220 0.1U/4/X7R/16V/K V24 T4
<9> A_RX1P PCIE_TX1P PCICLK4
C221 0.1u/4/X7R/16V/K V25 T3 PCLK2 R126 8.2K/4/1
<9> A_RX1N PCIE_TX1N PCICLK5/GPIO41
C222 0.1U/4/X7R/16V/K U25
<9> A_RX2P PCIE_TX2P
C224 0.1U/4/X7R/16V/K U24 PCLK3 R124 8.2K/4/1
<9> A_RX2N PCIE_TX2N
C226 0.1U/4/X7R/16V/K T23
<9> A_RX3P PCIE_TX3P
C227 0.1U/4/X7R/16V/K T22 N1 R165 33/4 -PPCIRST -PPCIRST <18>
D <9> A_RX3N PCIE_TX3N PCIRST# D

PCI EXPRESS INTERFACE


S.B HEATSINK <9>
<9>
A_TX0P
A_TX0N
U22
U21
PCIE_RX0P
PCIE_RX0N AD0 U2 AD0
AD[0..31] <18>

<9> A_TX1P U19 P7 AD1


PCIE_RX1P AD1 AD2

l
<9> A_TX1N V19 PCIE_RX1N AD2 V4 PCLK2 PCLK3
<9> A_TX2P R20 T1 AD3
PCIE_RX2P AD3 AD4
<9> A_TX2N R21 PCIE_RX2N AD4 V3 PULL WATCHDOG TIMER USE
AD5

a
<9> A_TX3P R18 U1 ON NB_PWRGD DEBUG
R17
PCIE_RX3P AD5
V1 AD6 HIGH
<9> A_TX3N PCIE_RX3N AD6
1

ENABLED STRAPS

ti
V2 AD7
SB_HS R226 562/4/1 AD7 AD8
T25 T2
1

R241 2.05K/4/1 PCIE_CALRP AD8 AD9


VCC_SB T24
PCIE_CALRN AD9
W1 PULL WATCHDOG TIMER IGNORE
T9 AD10
AD10 AD11 LOW ON NB_PWRGD DEBUG
VCC_SB P24 R6
PCIE_PVDD AD11 AD12 DISABLED STRAPS
R7

n
AD12 AD13 DEFAULT DEFAULT
P25 R5
BC815 BC816 PCIE_PVSS AD13 AD14
U8
AD14

e
1U/6/Y5V/10V/Z 10U/8/X5R/6.3V/K U5 AD15
AD15 AD16
Y7
AD16 AD17
W8
AD17
2

V9 AD18

d
AD18 AD19
Y8
AD19 AD20

i
AA8
2

AD20 AD21
Y4
AD21 AD22

f
Y3
SB_HS/[12SP2-030005-42R_12SP2-030005-43R] AD22 AD23
AD23
Y2 BIOS after boot setting
AA2 AD24 LPC_CLK0 R121 8.2K/4/1
AD24
AB4 AD25 EC AOD-ACC

n y
AD25 AD26 LPC_CLK1 R115 8.2K/4/1
<12> SBSRC_CLKP N25 AA1
PCIE_RCLKP/NB_LNK_CLKP AD26 AD27
<12> SBSRC_CLKN N24 AB3
C PCIE_RCLKN/NB_LNK_CLKN AD27 AD28 C
AB2

o
AD28 AD29
K23 AC1

PCI INTERFACE
NB_DISP_CLKP AD29 AD30
K22 AC2
NB_DISP_CLKN AD30 AD31
AD1
AD31 -C_BE0
M24 W2 -C_BE0 <18>
NB_HT_CLKP CBE0#

C
M25 U7 -C_BE1 LPC_CLK0 LPC_CLK1
NB_HT_CLKN CBE1# -C_BE1 <18>

p
AA7 -C_BE2
CBE2# -C_BE2 <18>
P17 Y1 -C_BE3
CPU_HT_CLKP CBE3# -C_BE3 <18>
M18 AA6 -FRAME PULL IMC CLKGEN
CPU_HT_CLKN FRAME# -FRAME <18>

o
W5 -DEVSEL

e
DEVSEL# -IRDY
-DEVSEL <18> HIGH ENABLED ENABLED
M23 AA5 -IRDY <18>
SLT_GFX_CLKP IRDY# -TRDY AOD Extreme
M22 Y5

t
SLT_GFX_CLKN TRDY# -TRDY <18>
U6 PAR PULL IMC CLKGEN
PAR PAR <18>
J19 W6 -STOP
DISABLED DISABLED

C
J18
GPP_CLK0P STOP#
W4 -PERR
-STOP <18> LOW

y
GPP_CLK0N PERR# -PERR <18>
V7 -SERR DEFAULT DEFAULT
SERR# -SERR <18>
L20 AC3 -REQ0
GPP_CLK1P REQ0# -REQ0 <18>

t
L19 AD4
GPP_CLK1N REQ1#

b
AB7

CLOCK GENERATOR
REQ2#
M19 AE6
GPP_CLK2P REQ3#/GPIO70

o
M20 AB6
GPP_CLK2N REQ4#/GPIO71

a
AD2 -GNT0
GNT0# -GNT0 <18>
N22 AE4
GPP_CLK3P GNT1#
P22 AD5

n
GPP_CLK3N GNT2#

g
AC6
GNT3#/GPIO72 -GNT4
L18 AE5

i
25M_48M_66M_OSC GNT4#/GPIO73 -PCI_CLKRUN -GNT4 <18>
AD6
CLKRUN# -PLOCK
V5
LOCK# -PLOCK <18>

G Do
J21
25M_X1 -INTA
AD3 -INTA <18>
B INTE#/GPIO33 -INTB B
AC4 -INTB <18>
INTF#/GPIO34 -INTC
AE2 -INTC <18>
INTG#/GPIO35 -INTD
J20 AE3 -INTD <18>
25M_X2 INTH#/GPIO36

RTC_XI G22 R253 22/4 LPC_CLK0


LPCCLK0 R254 22/4 LPC_CLK1
E22
RTC_XI LPCCLK1 LAD0
A3
X1 LAD0
H24 LAD0 <22> 20mil 20mil
RTC XTAL

H23 LAD1
R166 20M/4 RTC_XO LAD1 LAD2 LAD1 <22> Q4 RTCVDD
J25
LAD2 LAD3 LAD2 <22>
J24
LPC

LAD3 LAD3 <22> 3VDUAL_SB


RTC_XO B3 H25 -LFRAME R163 1K/4/1
X2 LFRAME# -LFRAME <22>
H22 -LDRQ0
LDRQ0# -LDRQ0 <22> <22> VBAT
4

X4 AB8 -LDRQ1 R76 8.2K/4/X VBAT_2 RB 1K/4/1


LDRQ1#/GNT5#/GPIO68 VCC3
1 2 32.768K/12.5p/20ppm/TF38/35K/D AD7 R2710 8.2K/4/1 BAT54C/SOT23/200mA BC783 BC22
BMREQ#/REQ5#/GPIO65 VCC3
R169 8.2K/4/1 SERIRQ 0.1U/4/X7R/16V/K 1U/6/Y5V/10V/Z
VCC18 SERIRQ
V15 SERIRQ <22> 20mil

1
ALLOW_LDTSTOP F23 BAT
3

<10> ALLOW_LDTSTOP ALLOW_LDTSTP


-PROCHOT_CPU F24 C3 RTC_CLK BAT-SK/BK/P/S/D/SN
<6,26> -PROCHOT_CPU PROCHOT# RTCCLK
C93 C92 CPU_PG_SB F22 C2 -INTR_ALERT R255 100K/4/1 RTCVDD CLR_CMOS
<6> CPU_PG_SB LDT_PG INTRUDER_ALERT#
CPU

18P/4/NPO/50V/J 18P/4/NPO/50V/J -LDT_STOP G25 B2 RTCVDD


RTC

<6,10> -LDT_STOP LDT_STP# VBAT RTCVDD


-CPURST G24

2
<6,10> -CPURST LDT_RST#
X4 Note: LDT_PG, LDT_STP# & LDT_RST# are OD BC21 PH/1*2/BK/2.54/VA/D
SB710/FCBGA528/A14/[10HB1-06B710-11R] 0.1U/4/X7R/16V/K CR2032 BATTERY
and require a PU to the CPU I/O rail. They are CR2032
SHW/D0.64*5.08*6.74 also in the S5 domain to prevent glitching at + CLR_CMOS
power up. SHORT CLEAR CMOS
A VCC3
OPEN NORMAL A

-PCI_CLKRUN R172 8.2K/4/X NOT ADD ICT FOR RTCVDD PIN


3VDUAL_SB

RTC_CLK R171 8.2K/4/1


Title
ATI SB710 PCIE/PCI/CPU/LPC
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: Wednesday, December 28, 2011 Sheet 13 of 27
5 4 3 2 1
5 4 3 2 1

-SLP_S5 R229 8.2K/4/X


SB_TEST2 R69 8.2K/4/1 U2D
SB_TEST1 R70 8.2K/4/1
SB_TEST0 R72 8.2K/4/1 Part 4 of 5
E1
SB700
<18> -PCIPME PCI_PME#/GEVENT4#
-RI E2 C8 USB11 FRONT PANEL
<21> -RI RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC USB48M <12>
H7 SLP_S2/GPM9#
<22,25> -SLP_S3 F5 SLP_S3# USB_RCOMP G8 R67 11.8K/4/1 USB10 FRONT PANEL

USB MISC
-SLP_S5 G1 SLP_S5# USB9 FRONT PANEL

ACPI / WAKE UP EVENTS


VCC3 R50 0/4/SHT/X-PW RBTN H2
<22> -PSOUT PW R_BTN#
<25> SB_PW ROK H1 PW R_GOOD USB8 FRONT PANEL
D -SUS_STAT R208 8.2K/4/1 -SUS_STAT K3 D
SMBCLK R78 1K/4/1
<10> -SUS_STAT
SB_TEST2 H5
SUS_STAT#
E6 USB7 FRONT PANEL
SMBDATA R79 1K/4/1 SB_TEST1 TEST2 USB_FSD13P
H4 TEST1 USB_FSD13N E7 USB6 FRONT PANEL
W D_PW RGD R81 8.2K/4/1 SB_TEST0 H3 TEST0 USB5 FRONT PANEL

USB 1.1
MOS_OT R86 8.2K/4/1 Y15 F7
<22> A20GATE GA20IN/GEVENT0# USB_FSD12P

l
<22> -KBRST W 15 KBRST#/GEVENT1# USB_FSD12N E8 USB4 FRONT PANEL
-LPCPME K4
<22> -LPCPME LPC_PME#/GEVENT3#
<22> GP53 K24 LPC_SMI#/EXTEVNT1# USB_HSD11P H11 +USBP11
+USBP11 <21> USB3 REAR PANEL
3VDUAL_SB

a
F1 J10 -USBP11
R164 22/4
<25> S3_STATE
J2
S3_STATE/GEVENT5# USB_HSD11N -USBP11 <21> USB2 REAR PANEL
<23> -SYS_RST SYS_RESET#/GPM7#

ti
-RI R187 8.2K/4/1
<17,19> -PCIE_W AKE
-PCIE_W AKE H6 W AKE#/GEVENT8# USB_HSD10P E11 +USBP10
+USBP10 <21> USB1 REAR PANEL
SMBCLK1 R173 2.2K/4/1 C108 22P/4/N/50V/X F2 F11 -USBP10
<23> SB_BLINK BLINK/GPM6# USB_HSD10N -USBP10 <21> USB0 REAR PANEL
SMBDATA1 R181 2.2K/4/1 THERMTRIP_CPU_L J6
<6> THERMTRIP_CPU_L SMBALERT#/THRMTRIP#/GEVENT2#
-PCIPME R209 2.2K/4/1 W D_PW RGD W 14 A11 +USBP9
NB_PW RGD USB_HSD9P +USBP9 <21>
-PCIE_W AKE R211 2.2K/4/1 B11 -USBP9
USB_HSD9N -USBP9 <21>
-RSMRST D3 either HWM inputs or PWR_GD signals

n
RSMRST# +USBP8
USB_HSD8P C10 +USBP8 <21> can be used for power-up sequencer
D10 -USBP8
USB_HSD8N -USBP8 <21> 3VDUAL_SB
SB_PW ROK

e
AE18 G11 +USBP7
SATA_IS0#/GPIO10 USB_HSD7P +USBP7 <21>
AD18 H12 -USBP7 IMC_GPIO17 R112 2.2K/4/1
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N -USBP7 <21>
C1064 AA19

d
100P/4/NPO/50V/J SMATVOLT1/SATA_IS2#/GPIO4 +USBP6 IMC_GPIO16 R83 2.2K/4/1
W 17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 +USBP6 <21>
V17 E14 -USBP6

i
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N -USBP6 <21>
W 20 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 IMC_GPIO17 IMC_GPIO16
SPKR W 21 C12

USB 2.0
<23> SPKR SPKR/GPIO2 USB_HSD5P
SMBCLK AA18 D12 ROM TYPE:
<8,12,24> SMBCLK SCL0/GPOC0# USB_HSD5N
SMBDATA W 18
<8,12,24> SMBDATA SDA0/GPOC1#
<17> SMBCLK1 SMBCLK1 K1 B12 H, H = Reserved
SCL1/GPOC2# USB_HSD4P

n y
<17> SMBDATA1 SMBDATA1 K2 A12
SDA1/GPOC3# USB_HSD4N

GPIO
AA20 H, L = SPI ROM DEFAULT
C R194 15K/4/1 P66DET DDC1_SCL/GPIO9 C
Y18 DDC1_SDA/GPIO8 USB_HSD3P G12

o
C1 LLB#/GPIO66 USB_HSD3N G14 L, H = LPC ROM
SMBCLK1 Y19
SMBDATA1 SMARTVOLT2/SHUTDOW N#/GPIO5
G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 L, L = FWH ROM
USB_HSD2N H15

C
C1052 C1053 A13 +USBP1
+USBP1 <19>

p
100P/4/N/50V/X 100P/4/N/50V/X USB_HSD1P -USBP1
USB_HSD1N B13 -USBP1 <19>
B14 +USBP0
USB_HSD0P +USBP0 <19>

e o
MOS_OT B9 A14 -USBP0
<26> MOS_OT USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N -USBP0 <19>
B8 USB_OC5#/IR_TX0/GPM5#

t
A8 A18

USB OC
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
A9 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9 B18
AZ_BIT_CLK E5 F21

C
<19> -USBOC_R1 USB_OC2#/GPM2# IMC_PW M0/IMC_GPIO10
F8 D21 R90 8.2K/4/1

y
USB_OC1#/GPM1# SCL2/IMC_GPIO11 3VDUAL_SB
E4 F19 R95 8.2K/4/1
<21> -USBOC_F1 USB_OC0#/GPM0# SDA2/IMC_GPIO12
C1063 E20
SCL3_LV/IMC_GPIO13

t
22P/4/NPO/50V/J/X <20> AZ_BIT_CLK R170 22/4 M1 E21
AZ_BITCLK SDA3_LV/IMC_GPIO14

b
<20> AZ_SDATA_OUT R184 22/4 M2 E19
AZ_SDOUT IMC_PW M1/IMC_GPIO15 IMC_GPIO16
<20> AZ_SDATA_IN0 J7 AZ_SDIN0/GPIO42 IMC_PW M2/IMC_GPO16 D19
IMC_GPIO17

o
J8 E18

HD AUDIO
AZ_SDIN1/GPIO43 IMC_PW M3/IMC_GPO17

a
L8 AZ_SDIN2/GPIO44
M3 AZ_SDIN3/GPIO46 IMC_GPIO18 G20
<20> AZ_SYNC R202 22/4 L6 G21
AZ_SYNC IMC_GPIO19

g n
<20> -AZ_RST R204 22/4 M4 D25 Q47
AZ_RST# IMC_GPIO20

INTEGRATED uC
L5 D24 VCC18 R259 8.2K/4/1 2
AZ_DOCK_RST#/GPM8# IMC_GPIO21

i
AZ_RST# C25 3 CPU_TDI
IMC_GPIO22 CPU_TDI <6>
C24 IMC_TDO 1
IMC_GPIO23
PULL ENABLE PCI B25

G Do
IMC_GPIO24 MMBT3904/SOT23/200mA/30
C23
B HIGH MEM BOOT IMC_GPIO25 B

SOT23
-AZ_RST R77 8.2K/4/1
IMC_GPIO26 B24
PULL DISABLE PCI B23 IMC_TDO
IMC_GPIO27
A23
LOW MEM BOOT IMC_GPIO28
C22 IMC_TMS VCC18
DEFAULT IMC_GPIO29 IMC_TCK
IMC_GPIO30 A22
IMC_GPIO31 B22
IMC_GPIO32 B21
A21 R287
IMC_GPIO33 8.2K/4/1
H19 IMC_GPIO0 IMC_GPIO34 D20

INTEGRATED uC
3VDUAL_SB R82 20K/4/1 -RSMRST H20 C20 Q49
IMC_GPIO1 IMC_GPIO35
H21 SPI_CS2#/IMC_GPIO2 IMC_GPIO36 A20 2
VCC3 R221 8.2K/4/1 IDE_RST F25 B20 3 CPU_TMS
IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 CPU_TMS <6>
BC28 B19 IMC_TMS 1
2.2u/8/X5R/10V/K IMC_GPIO38
D22 IMC_GPIO4 IMC_GPIO39 A19
E24 D18 MMBT3904/SOT23/200mA/30
IMC_GPIO5 IMC_GPIO40

SOT23
E25 IMC_GPIO6 IMC_GPIO41 C18
D23 IMC_GPIO7

VCC18
SB710/FCBGA528/A14/[10HB1-06B710-11R]

R290
8.2K/4/1
Q50
2
3 CPU_TCK
CPU_TCK <6>
IMC_TCK 1
A A
MMBT3904/SOT23/200mA/30

SOT23
Title
ATI SB710 ACPI/USB/GPIO/AUDIO
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 14 of 27
5 4 3 2 1
5 4 3 2 1

PLACE SATA AC COUPLING


CAPS CLOSE TO SB600

U2B

SP_TX0P_C AD9
SB700 AA24
SP_TX0M_C SATA_TX0P IDE_IORDY
AE9 SATA_TX0N Part 2 of 5 IDE_IRQ AA25
IDE_A0 Y22
D SP_RX0M_C AB10 AB23 D
SP_RX0P_C SATA_RX0N IDE_A1
AC10 SATA_RX0P IDE_A2 Y23
IDE_DACK# AB24
SP_TX1P_C AE10 AD25
SP_TX1M_C SATA_TX1P IDE_DRQ
AD10 SATA_TX1N IDE_IOR# AC25

l
IDE_IOW # AC24
SP_RX1M_C AD11 Y25
SP_RX1P_C SATA_RX1N IDE_CS1#
AE11 SATA_RX1P IDE_CS3# Y24

a
SP_TX2P_C AB12 AD24
SATA_TX2P IDE_D0/GPIO15

i
SP_TX2M_C AC12 AD23
SATA_TX2N IDE_D1/GPIO16

ATA 66/100/133
IDE_D2/GPIO17 AE22

t
SP_RX2M_C AE12 AC22
SP_RX2P_C SATA_RX2N IDE_D3/GPIO18
AD12 SATA_RX2P IDE_D4/GPIO19 AD21
IDE_D5/GPIO20 AE20
SP_TX3P_C AD13 AB20

n
SATA_TX3P IDE_D6/GPIO21

SERIAL ATA
SP_TX3M_C AE13 AD19 PDD7 R189 8.2K/4/1
SATA_TX3N IDE_D7/GPIO22
IDE_D8/GPIO23 AE19
SP_RX3M_C

e
AB14 SATA_RX3N IDE_D9/GPIO24 AC20
SP_RX3P_C AC14 AD20
SATA_RX3P IDE_D10/GPIO25
IDE_D11/GPIO26 AE21
SP_TX4P_C AE14 AB22

d
SP_TX4M_C SATA_TX4P IDE_D12/GPIO27
AD14 SATA_TX4N IDE_D13/GPIO28 AD22
AE23

i
SP_RX4M_C IDE_D14/GPIO29
AD15 SATA_RX4N IDE_D15/GPIO30 AC23
SP_RX4P_C AE15

f
SATA_RX4P
SP_TX5P_C AB16
SP_TX5M_C SATA_TX5P
AC16 SATA_TX5N

n y
G6 SB_SPI_DI_R R101 22/4 SB_SPI_DI
SP_RX5M_C SPI_DI/GPIO12 SB_SPI_DO_R R102 22/4 SB_SPI_DO
AE16 SATA_RX5N SPI_DO/GPIO11 D2
C SP_RX5P_C AD16 D1 SB_SPI_CLK_R R92 22/4 SB_SPI_CLK C
SATA_RX5P SPI_CLK/GPIO47

o
F4

SPI ROM
SR6 1K/4/1 SATA_CAL SPI_HOLD#/GPIO31 -SB_SPI_CS R103 22/4 -SB_SPI_CS_ITE
PLACE SATA_CAL V12 SATA_CAL SPI_CS1#/GPIO32 F3 -SB_SPI_CS_ITE <22>
RES VERY CLOSE SATA_X1 Y12 U15
SATA_X1 LAN_RST#/GPIO13
TO BALL OF U600 J1

C
SATA_X2 ROM_RST#/GPIO14
AA12

p
SATA_X2
FANOUT0/GPIO3 M8
-SATA_LED
NOTE: <23> -SATA_LED W 11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5
M7
FANOUT2/GPIO49

e o
R650 IS 1K 1% FOR 25MHz
VCC_SB AA11 P5
XTAL, 4.99K 1% FOR 100MHz

SATA PWR
PLLVDD_SATA FANIN0/GPIO50

t
FANIN1/GPIO51 P8
INTERNAL CLOCK VCC3 W 12 XTLVDD_SATA FANIN2/GPIO52 R8

C
C6 VCC3

y
TEMP_COMM M_BIOS
TEMPIN0/GPIO61 B6
SATA_X2 A6
TEMPIN1/GPIO62 VCC_SB_OV2 <26>

t HW MONITOR
R168 SATA_X1 A5 -ITE_SPI_CS 1 8 BC203 0.1U/4/Y5V/16V/Z
TEMPIN2/GPIO63 VCC_SB_OV1 <26> <22> -ITE_SPI_CS CS# VDD

b
10M/4 B5
TEMPIN3/TALERT#/GPIO64 SB_SPI_DI -SPI_HOLD0
2 SO HOLD# 7

o
VIN0/GPIO53 A4
X6

a
B4 -BIOS_W P 3 6 SB_SPI_CLK
VIN1/GPIO54 W P# SCK
1 2 VIN2/GPIO55 C4 NB_VCC_OV2 <26>
D4 4 5 SB_SPI_DO
VIN3/GPIO56 NB_VCC_OV1 <26> VSS SI

g n
25M/20p/30ppm/49US/20/D D5
VIN4/GPIO57
VIN5/GPIO58 D6

i
A7 16M/SPI/SO8/200mil/S
C115 C119 VIN6/GPIO59
VIN7/GPIO60 B7
10P/4/NPO/50V/J 10P/4/NPO/50V/J

G Do
B_BIOS VCC3
B B
VCC3
F6 3VDUAL_SB -ITE_SPI_CS1 1 8
AVDD <22> -ITE_SPI_CS1 CS# VDD
BC112
1u/4/X5R/6.3V/K SBC1 SBC3 G7 BC117 SB_SPI_DI 2 7 -SPI_HOLD0
0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z AVSS BC119 1U/6/Y5V/10V/Z SO HOLD#
0.1u/4/Y5V/16V/Z -BIOS_W P 3 6 SB_SPI_CLK
SB710/FCBGA528/A14/[10HB1-06B710-11R] W P# SCK
4 5 SB_SPI_DO
VSS SI

16M/SPI/SO8/200mil/S
SATA2_0 SATA2_1
1 GND GND 7
SP_TX0P_C C1310 0.01U/4/X7R/25V/K 2 TX+ C1307 0.01U/4/X7R/25V/K SP_RX1P_C
SP_TX0M_C C1309 0.01U/4/X7R/25V/K RX+ 6 C1311 0.01U/4/X7R/25V/K SP_RX1M_C
3 TX- RX- 5
4 GND GND 4
SP_RX0M_C C1308 0.01U/4/X7R/25V/K 5 RX- C1300 0.01u/4/X7R/25V/K SP_TX1M_C
SP_RX0P_C C1302 0.01U/4/X7R/25V/K TX- 3 C1286 0.01U/4/X7R/25V/K SP_TX1P_C
6 RX+ TX+ 2
7 GND GND 1 VCC3
SATA2/7/BU/H/OP/VA/D/1/B
SATA2/7/BU/H/OP/VA/D/1/B -SPI_HOLD0 R29 1K/4/1
SATA2_2 SB_SPI_DO R34 1K/4/X
1 GND SATA2_3 -BIOS_W P R38 1K/4/1
SP_TX2P_C C1279 0.01u/4/X7R/25V/K 2 TX+ SB_SPI_DI R39 1K/4/X
SP_TX2M_C C1278 0.01U/4/X7R/25V/K GND 7 C1284 0.01U/4/X7R/25V/K SP_RX3P_C
3 TX- RX+ 6
4 GND C1285 0.01U/4/X7R/25V/K SP_RX3M_C -ITE_SPI_CS R28 220/4
SP_RX2M_C C1282 0.01U/4/X7R/25V/K RX- 5
5 RX- GND 4
SP_RX2P_C C1283 0.01U/4/X7R/25V/K 6 RX+ C1281 0.01U/4/X7R/25V/K SP_TX3M_C -ITE_SPI_CS1 R33 220/4
TX- 3 C1280 0.01U/4/X7R/25V/K SP_TX3P_C
7 GND TX+ 2
A GND 1 A

SATA2/7/BU/H/OP/VA/D/1/B
SATA2/7/BU/H/OP/VA/D/1/B
SATA2_4 SATA2_5
1 GND GND 7
SP_TX4P_C C1313 0.01U/4/X7R/25V/K 2 TX+ C1319 0.01U/4/X7R/25V/K SP_RX5P_C
SP_TX4M_C C1314 0.01U/4/X7R/25V/K RX+ 6 C1312 0.01U/4/X7R/25V/K SP_RX5M_C
3 TX- RX- 5
4 GND GND 4
SP_RX4M_C C1315 0.01U/4/X7R/25V/K 5 RX- C1301 0.01U/4/X7R/25V/K SP_TX5M_C Title
TX- 3
SP_RX4P_C C1303 0.01U/4/X7R/25V/K 6 RX+
7 GND
TX+ 2
C1296 0.01u/4/X7R/25V/K SP_TX5P_C ATI SB710 SATA/IDE/HWM/SPI
GND 1 Size Document Number Rev
Custom GA-78LMT-S2P 5.02
SATA2/7/BU/H/OP/VA/D/1/B SATA2/7/BU/H/OP/VA/D/1/B
Date: W ednesday, December 28, 2011 Sheet 15 of 27
5 4 3 2 1
5 4 3 2 1

PLACE ALL THE DECOUPLING CAPS ON VCC_SB


THIS SHEET CLOSE TO SB AS POSSIBLE.
SBC67 SBC65 BC792
0.1U/4/Y5V/16V/Z 1U/6/Y5V/10V/Z 10u/8/X5R/6.3V/K

VCC3 U2C
U2E
D L9
SB700 L15 D
VDDQ_1 VDD_1
M9 VDDQ_2 Part 3 of 5 VDD_2 M12 SB700
T15 VDDQ_3 VDD_3 M14 VSS_1 A2
BC802 U9 N13 SBC54 SBC63 SBC64 A25

CORE S0
BC793 1u/4/X5R/6.3V/K SBC68 SBC60 SBC48 SBC74 VDDQ_4 VDD_4 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 1U/6/Y5V/10V/Z VSS_2
U16 VDDQ_5 VDD_5 P12 VSS_3 B1

PCI/GPIO I/O
10u/8/X5R/6.3V/K 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z U17 P14 D7
VDDQ_6 VDD_6 VSS_4
V8 VDDQ_7 VDD_7 R11 T10 AVSS_SATA_1 VSS_5 F20
W7 VDDQ_8 VDD_8 R15 U10 AVSS_SATA_2 VSS_6 G19

a
Y6 VDDQ_9 VDD_9 T16 U11 AVSS_SATA_3 VSS_7 H8
AA4 VDDQ_10 U12 AVSS_SATA_4 VSS_8 K9

ti
VCC3 AB5 V11 K11
VDDQ_11 AVSS_SATA_5 VSS_9
AB21 VDDQ_12 V14 AVSS_SATA_6 VSS_10 K16
W9 AVSS_SATA_7 VSS_11 L4
Y9 AVSS_SATA_8 VSS_12 L7
Y11 AVSS_SATA_9 VSS_13 L10
SBC49 SBC47 Y14 L11

n
0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z AVSS_SATA_10 VSS_14
Y20 VDD33_18_1 CKVDD_1.2V_1 L21 VCC_SB Y17 AVSS_SATA_11 VSS_15 L12
AA21 L22 AA9 L14

IDE/FLSH I/O

CLKGEN I/O
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_12 VSS_16

e
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 AB9 AVSS_SATA_13 VSS_17 L16
AE25 L25 BC776 BC731 BC797 AB11 M6
VDD33_18_4 CKVDD_1.2V_4 0.1U/4/Y5V/16V/Z 1u/4/X5R/6.3V/K 10u/8/X5R/6.3V/K AVSS_SATA_14 VSS_18
AB13 AVSS_SATA_15 VSS_19 M10
1.8V: Flash module mode AB15 M11

d
AVSS_SATA_16 VSS_20
3.3V: IDE mode AB17 AVSS_SATA_17 VSS_21 M13
AC8 M15

i
AVSS_SATA_18 VSS_22
AD8 AVSS_SATA_19 VSS_23 N4
AE8 N12

f
3VDUAL_SB AVSS_SATA_20 VSS_24
N14
POWER VSS_25
VSS_26 P6
VSS_27 P9

n y
VSS_28 P10
VCC_SB P18 PCIE_VDDR_1 A15 AVSS_USB_1 VSS_29 P11
C P19 SBC77 BC813 BC798 B15 P13 C
PCIE_VDDR_2 AVSS_USB_2 VSS_30

o
P20 1U/6/Y5V/10V/Z 1U/6/Y5V/10V/Z 10u/8/X5R/6.3V/K C14 P15

A-LINK I/O
BC771 BC729 SBC66 SBC62 BC93 PCIE_VDDR_3 AVSS_USB_3 VSS_31
P21 PCIE_VDDR_4 S5_3.3V_1 A17 D8 AVSS_USB_4 VSS_32 R1
1U/6/Y5V/10V/Z 1U/6/Y5V/10V/Z 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z R22 A24 D9 R2
PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_5 VSS_33
R24 PCIE_VDDR_6 S5_3.3V_3 B17 D11 AVSS_USB_6 VSS_34 R4

3.3V_S5 I/O
R25 J4 D13 R9

C
PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_7 VSS_35

GROUND
J5 D14 R10

p
S5_3.3V_5 AVSS_USB_8 VSS_36
S5_3.3V_6 L1 D15 AVSS_USB_9 VSS_37 R12
L2 SBC57 SBC78 SBC76 E15 R14
S5_3.3V_7 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z AVSS_USB_10 VSS_38
F12 AVSS_USB_11 VSS_39 T11

e o
F14 AVSS_USB_12 VSS_40 T12
VCC_SB AA14 AVDD_SATA_1 G9 AVSS_USB_13 VSS_41 T14

t
AB18 AVDD_SATA_4 H9 AVSS_USB_14 VSS_42 U4
BC772 AA15 H17 U14
AVDD_SATA_2 AVSS_USB_15 VSS_43

SATA I/O
1u/4/X5R/6.3V/K BC85 SBC61 SBC52 SBC73 AA17 G2 J9 V6

C
VCC12_DUAL

CORE S5
0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z 10u/8/X5R/6.3V/K AVDD_SATA_3 S5_1.2V_1 AVSS_USB_16 VSS_44
AC18 G4 J11 Y21

y
AVDD_SATA_5 S5_1.2V_2 AVSS_USB_17 VSS_45
AD17 AVDD_SATA_6 J12 AVSS_USB_18 VSS_46 AB1
AE17 AVDD_SATA_7 J14 AVSS_USB_19 VSS_47 AB19

t
J15 AVSS_USB_20 VSS_48 AB25

b
USB_PHY_1.2V_1 A10 K10 AVSS_USB_21 VSS_49 AE1
USB_PHY_1.2V_2 B10 K12 AVSS_USB_22 VSS_50 AE24

o
K14 AVSS_USB_23

a
K15 AVSS_USB_24
PCIE_CK_VSS_9 P23
PCIE_CK_VSS_10 R16

g n
AVDD_USB R19
PCIE_CK_VSS_11
PCIE_CK_VSS_12 T17

i
3VDUAL_SB A16 AE7 V5_VREF R88 1K/4/1 VCC U18
AVDDTX_0 V5_VREF PCIE_CK_VSS_13
B16 AVDDTX_1 H18 PCIE_CK_VSS_1 PCIE_CK_VSS_14 U20
BC137 C16 J16 BC128 Q8 J17 V18

G Do
AVDDTX_2 AVDDCK_3.3V VCC3 VCC3 PCIE_CK_VSS_2 PCIE_CK_VSS_15
BC775 BC135 1u/4/X5R/6.3V/K SBC79 SBC70 SBC71 D16 1u/4/X5R/6.3V/K J22 V20
B 10u/8/X5R/6.3V/K 1U/6/Y5V/10V/Z 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z 0.1u/4/Y5V/16V/Z AVDDTX_3 PCIE_CK_VSS_3 PCIE_CK_VSS_16 B
D17 K17 K25 V21

PLL
AVDDTX_4 AVDDCK_1.2V VCC_SB PCIE_CK_VSS_4 PCIE_CK_VSS_17
E17 AVDDTX_5 M16 PCIE_CK_VSS_5 PCIE_CK_VSS_18 W 19
USB I/O
F15 AVDDRX_0 AVDDC E9 3VDUAL_SB M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W 22
BAT54C/SOT23/200mA
F17 AVDDRX_1 M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W 24
F18 AVDDRX_2 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W 25
G15 AVDDRX_3
G17 AVDDRX_4 F9 AVSSC AVSSCK L17
G18 AVDDRX_5 Part 5 of 5
SB710/FCBGA528/A14/[10HB1-06B710-11R]
SB710/FCBGA528/A14/[10HB1-06B710-11R] VCC3
BC126
1u/4/X5R/6.3V/K

VCC12_DUAL

BC794 BC811 SBC58 SBC59 BC812 BC814 SBC75 VCC_SB


10u/8/X5R/6.3V/K 1U/6/Y5V/10V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 1U/6/Y5V/10V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z

BC127
1U/6/Y5V/10V/Z

A A

3VDUAL_SB

BC134 BC133
1U/6/Y5V/10V/Z 0.1u/4/Y5V/16V/Z
Title
ATI SB700 POWER & GND
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 16 of 27
5 4 3 2 1
8 7 6 5 4 3 2 1

EXP_A_TXP0 C1644 0.1U/4/X7R/16V/K EXP_A_TXP0C


EXP_A_RXP[0..15] EXP_A_TXP[0..15] EXP_A_TXN0 C1645 0.1U/4/X7R/16V/K EXP_A_TXN0C PCIE_RST-
EXP_A_RXP[0..15] <9> EXP_A_TXP[0..15] <9>
EXP_A_TXP1 C1646 0.1U/4/X7R/16V/K EXP_A_TXP1C
EXP_A_RXN[0..15] EXP_A_TXN[0..15] EXP_A_TXN1 C1647 0.1U/4/X7R/16V/K EXP_A_TXN1C
EXP_A_RXN[0..15] <9> EXP_A_TXN[0..15] <9>
EXP_A_TXP2 C1648 0.1U/4/X7R/16V/K EXP_A_TXP2C
EXP_A_TXN2 C1649 0.1U/4/X7R/16V/K EXP_A_TXN2C C1643
+12V EXP_A_TXP3 C1650 0.1U/4/X7R/16V/K EXP_A_TXP3C 100P/4/N/50V/X
+12V 3GIO_*16 EXP_A_TXN3 C1651 0.1U/4/X7R/16V/K EXP_A_TXN3C
PCIEX16 EXP_A_TXP4 C1652 0.1U/4/X7R/16V/K EXP_A_TXP4C
B1 A1 EXP_A_TXN4 C1653 0.1U/4/X7R/16V/K EXP_A_TXN4C
12V PRSNT1* EXP_A_TXP5 C1654 0.1u/4/X7R/16V/K EXP_A_TXP5C
B2 12V 12V A2
B3 A3 EXP_A_TXN5 C1655 0.1U/4/X7R/16V/K EXP_A_TXN5C
R6 0/4/SHT/X RSVD 12V R58 0/4/SHT/X EXP_A_TXP6 C1656 0.1U/4/X7R/16V/K EXP_A_TXP6C
B4 GND GND A4
<14> SMBCLK1 SMBCLK1 B5 A5 EXP_A_TXN6 C1657 0.1U/4/X7R/16V/K EXP_A_TXN6C
SMBDATA1 SMCLK JTAG2 EXP_A_TXP7 C1658 0.1U/4/X7R/16V/K EXP_A_TXP7C
D <14> SMBDATA1 B6 SMDAT JTAG3 A6 D
B7 A7 EXP_A_TXN7 C1659 0.1U/4/X7R/16V/K EXP_A_TXN7C PCIE_RST-
GND JTAG4 EXP_A_TXP8 C1660 0.1U/4/X7R/16V/K EXP_A_TXP8C
VCC3 B8 3.3V JTAG5 A8
B9 A9 EXP_A_TXN8 C1661 0.1U/4/X7R/16V/K EXP_A_TXN8C
JTAG1 3.3V VCC3
3VDUAL B10 A10 EXP_A_TXP9 C1662 0.1U/4/X7R/16V/K EXP_A_TXP9C
3.3VAUX 3.3V

l
-PCIE_W AKE B11 A11 PCIE_RST- PCIE_RST- <19,22> EXP_A_TXN9 C1663 0.1U/4/X7R/16V/K EXP_A_TXN9C C1746
<14,19> -PCIE_W AKE W AKE* PW RGD
KEY EXP_A_TXP10 C1664 0.1U/4/X7R/16V/K EXP_A_TXP10C 100P/4/N/50V/X
VCC3 EXP_A_TXN10 C1665 0.1U/4/X7R/16V/K EXP_A_TXN10C

a
B12 A12 EXP_A_TXP11 C1666 0.1U/4/X7R/16V/K EXP_A_TXP11C
RSVD GND EXP_A_TXN11 C1667 0.1U/4/X7R/16V/K EXP_A_TXN11C
B13 GND REFCLK+ A13 SRCCLK_3GIO_A <12>

i
R2400 EXP_A_TXP0C B14 A14 EXP_A_TXP12 C1668 0.1U/4/X7R/16V/K EXP_A_TXP12C
HSOP0 REFCLK- -SRCCLK_3GIO_A <12>
8.2K/4/1 EXP_A_TXN0C B15 A15 EXP_A_TXN12 C1669 0.1U/4/X7R/16V/K EXP_A_TXN12C
HSON0 GND

t
B16 A16 EXP_A_RXP0 EXP_A_TXP13 C1670 0.1U/4/X7R/16V/K EXP_A_TXP13C
PE0_PRSNT- GND HSIP0 EXP_A_RXN0 EXP_A_TXN13 C1671 0.1U/4/X7R/16V/K EXP_A_TXN13C
B17 PRSNT2* HSIN0 A17
B18 A18 EXP_A_TXP14 C1672 0.1U/4/X7R/16V/K EXP_A_TXP14C
GND GND EXP_A_TXN14 C1673 0.1U/4/X7R/16V/K EXP_A_TXN14C

n
EXP_A_TXP15 C1674 0.1U/4/X7R/16V/K EXP_A_TXP15C
EXP_A_TXP1C B19 A19 EXP_A_TXN15 C1675 0.1U/4/X7R/16V/K EXP_A_TXN15C
EXP_A_TXN1C HSOP1 RSVD

e
B20 HSON1 GND A20
B21 A21 EXP_A_RXP1
GND HSIP1 EXP_A_RXN1
B22 GND HSIN1 A22
EXP_A_TXP2C B23 A23

d
EXP_A_TXN2C HSOP2 GND
B24 HSON2 GND A24
B25 A25 EXP_A_RXP2

i
GND HSIP2 EXP_A_RXN2
B26 GND HSIN2 A26
EXP_A_TXP3C B27 A27

f
EXP_A_TXN3C HSOP3 GND
B28 HSON3 GND A28
B29 A29 EXP_A_RXP3
GND HSIP3 EXP_A_RXN3
B30 RSVD HSIN3 A30

n y
B31 PRSNT2* GND A31
B32 GND RSVD A32
C C
EXP_A_TXP4C

o
B33 HSOP4 RSVD A33
EXP_A_TXN4C B34 A34
HSON4 GND EXP_A_RXP4
B35 GND HSIP4 A35
B36 A36 EXP_A_RXN4
EXP_A_TXP5C GND HSIN4
B37 A37

C
EXP_A_TXN5C HSOP5 GND
B38 A38

p
HSON5 GND EXP_A_RXP5
B39 GND HSIP5 A39
B40 A40 EXP_A_RXN5
EXP_A_TXP6C GND HSIN5
B41 HSOP6 GND A41

e o
EXP_A_TXN6C B42 A42
HSON6 GND EXP_A_RXP6
B43 GND HSIP6 A43
EXP_A_RXN6

t
B44 GND HSIN6 A44
EXP_A_TXP7C B45 A45
EXP_A_TXN7C HSOP7 GND
B46 A46

C
HSON7 GND EXP_A_RXP7
B47 A47

y
GND HSIP7 EXP_A_RXN7
B48 PRSNT2* HSIN7 A48
B49 GND GND A49

b t
EXP_A_TXP8C

o
B50 HSOP8 RSVD A50

a
EXP_A_TXN8C B51 A51
HSON8 GND EXP_A_RXP8
B52 GND HSIP8 A52
B53 A53 EXP_A_RXN8
GND HSIN8

g n
EXP_A_TXP9C B54 A54
EXP_A_TXN9C HSOP9 GND
B55 HSON9 GND A55

i
B56 A56 EXP_A_RXP9
GND HSIP9 EXP_A_RXN9
B57 GND HSIN9 A57
EXP_A_TXP10C B58 A58

G Do
HSOP10 GND +12V
B
EXP_A_TXN10C B59 HSON10 GND A59
+12V PCIEX1 3GIO_X1 B
B60 A60 EXP_A_RXP10
GND HSIP10 EXP_A_RXN10
B61 GND HSIN10 A61
EXP_A_TXP11C B62 A62 B1 A1
EXP_A_TXN11C HSOP11 GND 12V PRSNT1*
B63 HSON11 GND A63 B2 12V 12V A2
B64 A64 EXP_A_RXP11 B3 A3
GND HSIP11 EXP_A_RXN11 R91 0/4/SHT/X RSVD 12V R94 0/4/SHT/X
B65 GND HSIN11 A65 B4 GND GND A4
EXP_A_TXP12C B66 A66 SMBCLK1 B5 A5
HSOP12 GND <14> SMBCLK1 SMCLK JTAG2
EXP_A_TXN12C B67 A67 SMBDATA1 B6 A6
HSON12 GND <14> SMBDATA1 SMDAT JTAG3
B68 A68 EXP_A_RXP12 B7 A7
GND HSIP12 EXP_A_RXN12 GND JTAG4
B69 GND HSIN12 A69 VCC3 B8 3.3V JYAG5 A8
EXP_A_TXP13C B70 A70 B9 A9
HSOP13 GND JTAG1 3.3V VCC3
EXP_A_TXN13C B71 A71 3VDUAL B10 A10
HSON13 GND EXP_A_RXP13 -PCIE_W AKE 3.3VAUX 3.3V PCIE_RST-
B72 GND HSIP13 A72 <14,19> -PCIE_W AKE B11 W AKE* PW RGD A11 PCIE_RST- <19,22>
B73 A73 EXP_A_RXN13
GND HSIN13
EXP_A_TXP14C B74 HSOP14 GND A74 KEY
EXP_A_TXN14C B75 A75 B12 A12
HSON14 GND EXP_A_RXP14 RVSD GND
B76 GND HSIP14 A76 B13 GND REFCLK+ A13 PCIE2_CLK <12>
B77 A77 EXP_A_RXN14 B14 A14
GND HSIN14 <9> PCIE2_OP HSOP0 REFCLK- -PCIE2_CLK <12>
EXP_A_TXP15C B78 A78 B15 A15
HSOP15 GND <9> PCIE2_ON HSON0 GND
EXP_A_TXN15C B79 A79 B16 A16
HSON15 GND GND HSIP0 PCIE2_IP <9>
B80 A80 EXP_A_RXP15 VCC3 R40 8.2K/4/1PE2_PRSNT- B17 A17
GND HSIP15 PRSNT2* HSIN0 PCIE2_IN <9>
B81 A81 EXP_A_RXN15 B18 A18
PRSNT2* HSIN15 GND GND
B82 RSVD GND A82

PCI-E/1X-36P/W H/OL

PCI-E/16X-164P/BU/LOW R EJECTOR
A A

+12V VCC3 3VDUAL +12V

1
BC833 BC834 BC835 BC838 BC837 BC840 + EC167
0.1U/4/X7R/16V/K 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z/X 0.1U/4/X7R/16V/K 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 270u/FP/D/16V/8C/A/10m/X Title
PCI EXPRESS X 16 ,X1
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 17 of 27
8 7 6 5 4 3 2 1
5 4 3 2 1

PCI SLOT 1,2 AD[0..31]


<13> AD[0..31]

PCICLK1 BC861 10P/4/N/50V/X


VCC3

PCI SLOT
VCC -12V +12V VCC

PCI
B1 -12V TRST A1
D B2 TCK +12V A2 D
B3 GND TMS A3
B4 A4 -PPCIRST
TDO TDI
B5 +5V +5V A5
B6 A6 C1745
+5V INTA -INTA <13>

l
B7 A7 100P/4/N/50V/X
<13> -INTB INTB INTC -INTC <13>
<13> -INTD B8 INTD +5V A8
B9 PRSNT1 RESERVED A9

a
B10 RESERVED +5V A10
B11 PRSNT2 RESERVED A11

i
B12 GND GND A12
B13 GND GND A13

t
B14 RESERVED 3.3V_AUX A14
3VDUAL
B15 GND RST A15 -PPCIRST <13>
<13> PCICLK1 B16 CLK +5V A16
B17 A17

n
GND GNT -GNT0 <13>
<13> -REQ0 B18 REQ GND A18
B19 +5V PME A19 -PCIPME <14>
AD31 AD30

e
B20 AD31 AD30 A20
AD29 B21 A21 VCC3
AD29 +3.3V AD28
B22 GND AD28 A22
AD27 B23 A23 AD26

d
AD25 AD27 AD26
B24 AD25 GND A24
B25 A25 AD24

i
+3.3V AD24 AD22
<13> -C_BE3 B26 C/BE3 IDSEL A26
AD23 B27 A27

f
AD23 +3.3V AD22
B28 GND AD22 A28
AD21 B29 A29 AD20
AD19 AD21 AD20
B30 AD19 GND A30

n y
B31 A31 AD18
AD17 +3.3V AD18 AD16
B32 AD17 AD16 A32
C B33 A33 C
<13> -C_BE2 C/BE2 +3.3V

o
B34 GND FRAME A34 -FRAME <13>
<13> -IRDY B35 IRDY GND A35
B36 +3.3V TRDY A36 -TRDY <13>
B37 DEVSEL GND A37
<13> -DEVSEL
B38 A38 -STOP <13>

C
-PLOCK GND STOP
<13> -PLOCK B39 A39

p
LOCK +3.3V
<13> -PERR B40 PERR SDONE A40
B41 +3.3V SBO A41
<13> -SERR B42 SERR GND A42

e o
B43 +3.3V PAR A43 PAR <13>
B44 A44 AD15
<13> -C_BE1 C/BE1 AD15
AD14

t
B45 AD14 +3.3V A45
B46 A46 AD13
AD12 GND AD13 AD11
B47 A47

C
AD10 AD12 AD11
B48 A48

y
AD10 GND AD9
B49 GND AD9 A49

b t
AD8 B52 A52
AD8 C/BE0 -C_BE0 <13>
AD7 B53 A53
AD7 +3.3V AD6

o
B54 +3.3V AD6 A54

a
AD5 B55 A55 AD4
AD3 AD5 AD4
B56 AD3 GND A56
B57 A57 AD2
GND AD2

g n
AD1 B58 A58 AD0
AD1 AD0
B59 +5V +5V A59

i
-ACK64 B60 A60 -P1REQ64
ACK64 REQ64
B61 +5V +5V A61
B62 A62

G Do
+5V +5V
B PCI/120/P/IV/VA B

IDSEL[AD22],
GNT/REQ[0],
INT[A]

VCC3
VCC3
3VDUAL -ACK64 R3 8.2K/4/1
-P1REQ64 R7 8.2K/4/1
BC869 0.1U/4/Y5V/16V/Z C1743 0.1U/4/Y5V/16V/Z
-STOP RN257 1 2 8.2K/8P4R/4
BC871 0.1U/4/Y5V/16V/Z C1744 0.1U/4/Y5V/16V/Z -PLOCK 3 4
-PERR 5 6
BC872 0.1U/4/Y5V/16V/Z -SERR 7 8

BC878 0.1U/4/Y5V/16V/Z EMI, Oct.19,2010 -FRAME RN258 1 2 8.2K/8P4R/4


-IRDY 3 4
EC13 560u/FP/D/6.3V/69/A/11m/X BC868 0.01U/4/X7R/25V/K -TRDY 5 6
1

VCC3 VCC
-DEVSEL 7 8
+

-INTD RN259 1 2 8.2K/8P4R/4


VCC -INTA 3 4
-INTC 5 6
-INTB 7 8
EC11 560u/FP/D/6.3V/69/A/11m +12V
1

A A
-12V
+

BC865 0.1U/4/Y5V/16V/Z

BC867 0.1U/4/Y5V/16V/Z
BC863 BC864 BC874
0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z/X

R2746 8.2K/4/1
<13> -GNT4 Title
PCI SLOT 1
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 18 of 27
5 4 3 2 1
5 4 3 2 1

LAN:AR8151/AR8161 LAN POWER NEW DESIGN ONLY FOR INTERNAL SWR


AR8151:LAR3(O),LAR5(X) EMI Request
離IC要
要近近 歐歐:[15/5/5/5/15]
LA_ ML-->80歐 AR8161:LAR5(O),LAR3/LAR4(X) Put on LAR4
LAL1 LA_LX_OUT
<12> -SRCCLK_LAN
<12> SRCCLK_LAN 歐歐:[18/4/10/4/18]
SRCCLK-->50歐 4.7uH/1A/[10LC4-5A470B-01R]
LA_LX_OUT LA_LX
ML_OP

1
<9> ML_OP
<9> ML_ON
ML_ON CLOSE LAESD2
LABC5 LA_LX 200mil
0.1u/4/X7R/16V/K
D LABC1 LABC2 AZ2225-01L/SOD323/X D
LABC4 10u/8/X5R/6.3V/K 0.1u/4/X7R/16V/K
1u/4/X5R/6.3V/K LA_AVDDVCO
LABC3 LABC6
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K

l
AR8161-->N/A LA_VDDCT AR8161-->N/A

LA_LED_ACT_TXRX
(LABC6) LABC7 LABC8 LAR3 0/4
(LAR3,LAR4) AR8151 POWER

LA_LED_LINK100
0.1u/4/X7R/16V/K/X 4.7u/6/X5R/6.3V/K/X
3VDUAL

LA_AVDDVCO
a
LABC11
LABC10 0.1u/4/X7R/16V/K LA_AVDD_CEN

LA_DVDDL

LA_AVDDL
ti
LABC9 1u/4/X5R/6.3V/K LAR4 0/4
10u/8/X5R/6.3V/K AR8161-->(O)

LA_LX
LAU1 LA_DVDDL LA_AVDDL LA_AVDDVCO

41

40
39
38
37
36
35
34
33
32
31
n
AR8161 POWER
歐歐:[15/5/5/5/15]
LA_ ML-->80歐 LAR5 0/6/X LAFB2 0/6/X LAFB3 0/6

DVDDL_REG
LED1
LED0

AVDDL
LX

RX_P

REFCLKP
EGND

RX_N

REFCLKN
AVDDL/NC
AR8161-->(O) AR8161-->BEAD AR8161-->BEAD

e
3VDUAL LAC33 AR8151-->N/A AR8151-->0/6
100p/4/NPO/50V/J/X
離IC要
要近近

d
LAR6
8.2K/4 LA_VDD33 LA_ML_IP_C LAC12 0.1u/4/X7R/16V/K
1 30
Power domain chart

i
VDD3V TX_P ML_IP <9>
<17,22> PCIE_RST- 2 PERST# Atheros TX_N 29 LA_ML_IN_C
ML_IN <9> AR8161-->(O)
3 28 LAC13 0.1u/4/X7R/16V/K LA_LED_ACT_TXRX

f
<14,17> -PCIE_W AKE W AKE# NC LA_AVDDH
LA_-CLKREQ 4 27 LAR7 8.2K/4/X AR8151 AR8161
CLKREQ# TESTMODE
AR8161-->N/A LABC12 LA_VDDCT 5 VDDCT/ISOLAT SMDATA 26 LAR9 LABC14
(LABC12) 1u/4/X5R/6.3V/K LA_AVDDL 6 AVDDL_REG SMCLK 25 0/4 0.1u/4/X7R/16V/K AR8161-->N/A LA_LED_LINK100

n y
LA_XTALO 7 XTLO AR8151/AR8161DVDDL/PPS 24 LA_PPS LA_DVDDL
(LAR9,LAC18) LAR8 8.2K/4/X AVDD33 N/A 3.3V
LA_XTALI 8 23 LA_LED_LINK1000
C LA_AVDDH XTLI LED2 LA_AVDDH C
9 22

AVDDH/AVDD33
AVDDH_REG AVDDH LA_MDI3-

o
10 RBIAS TRXN3 21
VCC3 VDD33 3.3V 3.3V
LABC17 AR8161-->(O)
LA_RBIAS

AVDDL/NC
LABC15 0.1u/4/X7R/16V/K
1u/4/X5R/6.3V/K AVDDH 2.7V 2.7V

AVDDL
TRXN0

TRXN1

TRXN2
TRXP0

TRXP1

TRXP2

TRXP3
LABC16 LAR1

C
0.1u/4/X7R/16V/K LABC18 30K/4/X

p
1u/4/X5R/6.3V/K LAR2 AVDDL/DVDDL 1.1V 1.1V
LABC19 AR8151-BL1A-R/S 0/4/X
11
12
13
14
15
16
17
18
19
20
0.1u/4/X7R/16V/K LAR10 LA_VDDCT
N_ISOLATEB <22>

e o
LAX1 2.37K/4/1 VDDCT 1.7V
LA_AVDD33

25M/20p/30ppm/49US/20/D
LA_AVDDL

LA_AVDDL
LA_MDI0+

LA_MDI1+

LA_MDI3+
LA_MDI2+
LA_MDI0-

LA_MDI1-

LA_MDI2-

t
LA_XTALI

C
MDI : AR8161-->N/A

y
LA_XTALO

t
LA_MDI0+ LA_MDI1+ LA_MDI2+ LA_MDI3+

b
LA_MDI0- LA_MDI1- LA_MDI2- LA_MDI3-
LAC31 LAC32 LABC20 LABC21
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K LAR11 LAR12 LAR13 LAR14 LAR15 LAR16 LAR17 LAR18

o
27p/4/NPO/50V/J 27p/4/NPO/50V/J

a
AR8161-->N/A 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1 49.9/4/1
LAR19 0/4/X
(LABC20) LAR20 0/4
3VDUAL
LA_MDI_RC0 LA_MDI_RC1 LA_MDI_RC2 LA_MDI_RC3
LA_AVDDH

g n
二二二二二)
SCH BOM OPT:(二 AR8151:LA_AVDDH(LAR20) LAC26 LAC27 LAC28 LAC29

i
0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K 0.1u/4/X7R/16V/K
有CLK GEN 25M
-->(LAC30):M/B有 AR8161:3VDUAL(LAR19)
無CLK GEN 25M
-->(LAX1,LAC31,LAC32):M/B無 LABC22 CLOSE LAN CHIP

G Do
1u/4/X5R/6.3V/K
B B

USB_LAN CONNECTOR

3VDUAL
LAESD1 5VDUAL F6 SMD1812P260/6V
FUSEVCC
LA_LED_LINK100 1 6 LA_LED_ACT_TXRX
0.1u/4/X7R/16V/K USB_LAN LFB4
LABC23 LA_AVDD_CEN L1 D1 LA_LED_ACT_TXRX 0/6/SHT/X 2 5 LAN_3VDUAL_LED FUSEVCC R3161 150K/4
-USBOC_R1 <14>
LA_MDI0+ L2
LA_MDI0- L3 D2 LA_LED_D2 LR13 150/4/1 LAN_3VDUAL_LED LA_LED_LINK1000 3 4 LA_LED_D2
LA_MDI1+ L4 SU1 R3162
LA_MDI1- L5 270K/4
A
LA_MDI2+ L6 D3 LA_LED_LINK100 LR21 150/4/1 LBC33 AOZ8902CIL/SOT23-6 -USBP0 1 6 -USBP1 A
LA_MDI2- L7 0.1U/4/Y5V/25V/Z/X
LA_MDI3+ L8 D4 LA_LED_LINK1000 LR22 150/4/1 2 5 FUSEVCC
LA_MDI3- L9 FUSEVCC
GND_L10 L10 U1 +USBP0 3 4 +USBP1
FUSEVCC
U2 -USBP0
-USBP0 <14> USB_LAN
LABC25 U3 +USBP0 1
+USBP0 <14>
0/4/SHT/M/X UP U4 LBC26 + LEC4 AOZ8902CIL/SOT23-6
U5 FUSEVCC 0.1U/4/Y5V/25V/Z/X 560u/FP/D/6.3V/69/A/11m
U6 -USBP1 Title
-USBP1 <14>
U7 +USBP1
+USBP1 <14> EMI AR8151
DOWN U8 LBC29
0.1U/4/Y5V/25V/Z/X
LR28 0/6/SHT/X
Size Document Number Rev
要要要USB_PORT的
EC要 的FUSEVCC Custom GA-78LMT-S2P 5.02
USB+LAN/1G/GO,Y/OS/RA/D/8C/[11NR6-702009-0ER]
Date: W ednesday, December 28, 2011 Sheet 19 of 27
5 4 3 2 1
5 4 3 2 1

LINE OUT
FRONT OUT
CR2 20K/4/1 CR59
AVDD LINE_O_R CEC17 100u/OS/D/6.3V/66/A/35m 75/4/1 AJ_B5

1
+
CR60
LINE_O_L CEC19 100u/OS/D/6.3V/66/A/35m 75/4/1 AJ_B2

1
+
CBC2
0.1u/4/X7R/16V/K CR3 CR4
D CR7 2.2/6 CR32 47/4/1 FAUDIO_JD 22K/4 22K/4 D
VCC3
CBC21 CBC22

48
47
46
45
44
43
42
41
40
39
38
37
CU1 180P/4/NPO/50V/J
CBC48 CBC20

SPDIFO

SURBACK-R/XTALSEL
SURBACK-L/JD0 GPIO0

AVSS2

JDREF (NC)/JD3
SURR-L
AVDD2
LINE1-VREFOR/VREFO3
SPDIF/EAPD

LFE
CEN

SURR-R
22u/8/X5R/6.3V/M ALC880/CMI9880 1N/4/X7R/50V/K

l
180P/4/NPO/50V/J
CBC42 10u/8/X5R/6.3V/K 1 36 LINE_O_R
DVDD1 FRONT-R

a
CR16 8.2K/4/X 2 35 LINE_O_L
CR27 8.2K/4/X GPIO0/XTALI FRONT-L
3 GPIO1/XTALO SENSE B (JD2)/FMIC1 34 LINE-IN

ti
CR26 0/4/X 4 33
DVS1 DCVOL/VREFVOUT2 VODR CR13 8.2K/4/1 MIC22
<14> AZ_SDATA_OUT 5 SDATA_OUT MIC1-VREFO-R/FMIC2 32
CR14 22/4 6 31 LINE2_VREFO LINE_IN_R CR61 75/4/1 LINE_IN_RR
<14> AZ_BIT_CLK BIT_CLK LINE2-VREFO/JD4
7 30 MIC2_VREFO
CR15 22/4 DVSS2 MIC2-VREFO/AFILT2 892W OR

SENSE A(JD1)/PHONE JD5


<14> AZ_SDATA_IN0 8 SDATA-IN LINE1-VREFO-L/AFILT1 29
9 28 VOBR CR17 8.2K/4/1 MIC11 LINE_IN_L CR62 75/4/1 LINE_IN_LL

n
VCC3 DVDD2 MIC1-VREFO-L/VREFOUT
<14> AZ_SYNC 10 SYNC VREF 27
11 26 AVDD
<14> -AZ_RST RESET#

MIC2-R/JD1 GPIO1
AVSS1

e
12 PC_BEEP AVDD1 25

LINE2-R/AUX-R
LINE2-L/AUX-L

MIC1-R/MIC2
CBC4 CBC5 CBC6 892W OR CR35 0/6 CBC26 CBC27

MIC1-L/MIC1
5VDUAL

MIC2-L/JD2
22p/4/NPO/50V/J

d
CD_GND

LINE1-R
CBC7 CBC8 For 892 with LDO

LINE1-L
CD_R
0.1U/4/X7R/16V/K 0.1U/4/X7R/16V/K 0.1u/4/X7R/16V/K

CD_L
22U/8/X5R/6.3V/M

i
CBC49 180P/4/NPO/50V/J

1
22u/8/X5R/6.3V/M For 892 with LDO CD4 180P/4/NPO/50V/J

f
ALC887-VD2-CG/LQFP48/S MIC

13
14
15
16
17
18
19
20
21
22
23
24
FRONT_JD CR19 5.1K/4/1
For 892 with LDO AZ2225-01L/SOD323

n y
LINE1_JD CR20 10K/4/1

C MIC1_JD CR21 20K/4/1 CBC10 22U/8/X5R/6.3V/M LINE_IN_R C

o
CBC11 22U/8/X5R/6.3V/M LINE_IN_L

CBC12 10U/8/X5R/6.3V/K MIC2 MIC2 CR63 75/4/1 MIC22

C
LINE2_L CBC13 10U/8/X5R/6.3V/K MIC1

p
MIC1 CR64 75/4/1 MIC11
LINE2_R
Can Support Amp Out

e o
MIC2_L CBC29
CBC28 180P/4/NPO/50V/J
MIC2_R

y t C
180P/4/NPO/50V/J
+12V

t
CODEC POWER/EMI PAD

4
CQ3
CD2

a o
CD4148W P/1206/300mA/X
5VDUAL AVDD USB_LAN

g n
CD1 CD4148W P/1206/300mA/X

1
2
3
CESD1

i
USB
LINE2_R 1 6 LINE2_L 78L05/SOT89/0.1A/X CBC30

1
CD3 0.1u/4/Y5V/16V/Z/X

G Do
2 5 AVDD AZ2225-01L/SOD323/X CBC31
B CR1 0/SHT/X 22u/8/X5R/6.3V/M B
MIC2_R 3 4 MIC2_L
CBC59
0.1u/4/Y5V/16V/Z
AOZ8902CIL/SOT23-6

SSOP6-1
AUDIO
C4 C4
LINE1_JD
LINE_IN_RR
C3
C5
C3 BLUE
C5
LINE-IN
SOT23

LINE_IN_LL C2 C2 GND

CQ8 CR74 8.2K/4 B4 B4


LINE2_VREFO
CR75 8.2K/4
INTEL FRONT AUDIO FRONT_JD
AJ_B5
B3 B3
B5 B5 GREEN
SOT23

BAT54A/SOT23/200mA AJ_B2 B2 B2 GND LINE-OUT

CQ9 CR76 8.2K/4 A4


MIC2_VREFO VCC3 MIC1_JD A4
A3 A3
CR77 8.2K/4 MIC22 A5 A5 PINK
BAT54A/SOT23/200mA MIC11 A2 A2 GND MIC-IN
CR45 22K/4 CR78 A1
F_AUDIO A1
8.2K/4 MH1 MH1
CR46 22K/4 MH4 MH2
MIC2_L CBC46 10U/8/X5R/6.3V/K CR24 75/4/1 MH4 MH2
A 1 2 MH5 MH5 MH3 MH3 A
MIC2_R CBC44 10U/8/X5R/6.3V/K CR25 75/4/1 3 4 -ACZ_DET
LINE2_R CEC9 100u/OS/D/6.3V/66/A/35m
CR18 75/4/1 5 6 BACK_R CR79 20K/4/1 A3RP/13P/BL,LI,PK/RA/D/1/B
1

FAUDIO_JD 7
+

LINE2_L CEC10 100u/OS/D/6.3V/66/A/35m


CR23 75/4/1 9 10 BACK_L CR80 39.2K/4/1
1
+

PH/2*5K8/GED/2.54/VA/D

CC1 CC2 CC3 CC4


SR5 0/6/SHT/X Title
180P/4/NPO/50V/J 180P/4/NPO/50V/J 180P/4/NPO/50V/J 180P/4/NPO/50V/J UR6 0.01U/4/X7R/25V/K
Fix AP issue
ALC887-VD2
Realtek recommand for AP Size Document Number Rev
0713 realtek fix 0 ohm Custom
Put on Codec Bottom side GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 20 of 27
5 4 3 2 1
5 4 3 2 1

VCC COM AU1


NDCDA- NSINA 19 2 NRIA-

14
1 2 <22> RI1- RY1 RA1
U13-1 NSOUTA NDTRA- 18 3 NCTSA-
3 4 <22> CTS1- RY2 RA2
1 DAC_HSYNC NDSRA- 17 4 NDSRA-
DAC_HSYNC <10> 5 6 <22> DSR1- RY3 RA3
HSYNC R2107 22/4 3 NRTSA- NCTSA- 16 5 NRTSA-
7 8 <22> RTS1- DA1 DY1
2 NRIA- 15 6 NDTRA-
9 10 <22> DTR1- DA2 DY2
14 7 NSINA
<22> RXD1 RY4 RA4
C1287 74HCT32DT/SO14 PH/2*5K10/W H/2.54/VA/D 13 8 NSOUTA
<22> TXD1 DA3 DY3
47P/4/N/50V/X NDCDA-

7
12 9

14
U13-2 <22> DCD1- RY5 RA5
4 DAC_VSYNC -RI 11 20 VCC
DAC_VSYNC <10> -RI <14> GND 5V
VSYNC R2108 22/4 6 -12V 10 1 +12V
-12V 12V
5

3
D C1288 74HCT32DT/SO14 Q110 GD75232/TSSOP20 ABC2 ABC3 D

SOT23
47P/4/N/50V/X MMBT2222A/SOT23/600mA/40 ABC1 0.1U/4/Y5V/16V/Z/X 0.1U/4/Y5V/16V/Z/X

14 7
0.1U/4/Y5V/16V/Z/X
U13-3 D22
9 R474 75K/4/1

1
l
8 NRIA-
10
R475 BC929 BC27

a
74HCT32DT/SO14 BAT54A/SOT23/200mA 8.2K/4/1 0.1U/4/Y5V/16V/Z
Negitive voltage, diode can't remove.

7
14

ti
U13-4 22u/8/X5R/6.3V/M/X
12
11
13 C1289
0.1U/4/Y5V/16V/Z
UR1 5.1K/4/1

n
FUSEVCC2 -USBOC_F1 <14>
74HCT32DT/SO14

7
VCC

e
UR2
FUSEVCC 10K/4/1
U11

d
R2121 FUSEVCC2
4.7K/4 HSYNC 1 6 VGADDCDATA

i
BC675
<10> DDCDATA DDCDATA R2113 33/4 VGADDCDATA 2 5 0.1U/4/Y5V/16V/Z

f
VCC
UBC3
VSYNC 3 4 VGADDCCLK 0.1U/4/Y5V/16V/Z
C1298 F_USB2

n y
VCC 470P/4/X/25V/X VGA 1 2
AOZ8902CIL/SOT23-6 -USBP6 3 4 -USBP7
<14> -USBP6 -USBP7 <14> C
C 16 +USBP6 5 6 +USBP7
<14> +USBP6 +USBP7 <14>

o
U10 6 7 8
R2120 VGA_R 1 11 10
4.7K/4 VGA_R 1 6 VGA_B 7
VGA_G 2 12 VGADDCDATA PH/2*5K9/BU/2.54/VA/D
<10> DDCCLK DDCCLK R2114 33/4 VGADDCCLK 2 5 VCC 8

C
VGA_B 3 13 HSYNC

p
VGA_G 3 4 9
BC676 4 14 VSYNC
C1297 0.1U/4/Y5V/16V/Z 10 U14

e o
470P/4/X/25V/X AOZ8902CIL/SOT23-6 5 15 VGADDCCLK
17 -USBP6 1 6 -USBP7

t
2 5 FUSEVCC2
VGA/BU/SC-11/RA/D/L/[11NR6-101015-3FR]

C
+USBP6 3 4 +USBP7

y
DAC_RED FB36 68nH/6/300mA/0.8/S VGA_R
<10> DAC_RED DAC_GREEN FB37 68nH/6/300mA/0.8/S VGA_G
<10> DAC_GREEN

t
DAC_BLUE FB38 68nH/6/300mA/0.8/S VGA_B AOZ8902CIL/SOT23-6
<10> DAC_BLUE

b
R32 R30 R25

o
U15

a
140/4/1 150/4/1 150/4/1
-USBP8 1 6 +USBP9

g n
2 5 FUSEVCC2
C1290 C1291 C1292 C1293 C1294 C1295

i
10P/4/NPO/50V/J/X 10P/4/NPO/50V/J/X 10P/4/NPO/50V/J 10P/4/NPO/50V/J 10P/4/NPO/50V/J +USBP8 3 4 -USBP9
10P/4/NPO/50V/J/X
ESD5 5VDUAL

G Do
AOZ8902CIL/SOT23-6
B -USBP10 -USBP11 B
1 6
1
2 5 + LEC5
FUSEVCC
560u/FP/D/6.3V/69/A/11m
+USBP10 3 4 +USBP11
FUSEVCC2 FUSEVCC2

AOZ8902CIL/SOT23-6
F_USB1
1 2
<14> -USBP8 3 4 -USBP9 <14>
<14> +USBP8 5 6 +USBP9 <14>
7 8
10

PH/2*5K9/BU/2.54/VA/D

CPU_FAN R_USB
FUSEVCC 1 2 FUSEVCC
SYSTEM FAN <14> -USBP11 -USBP11
+USBP11
3
5
75 3 1 4
6
-USBP10
+USBP10
-USBP10 <14> 5VDUAL F2 SMD1812P260/6V FUSEVCC2
+12V <14> +USBP11 +USBP10 <14>
+12V 7 8
+12V 86 4 2 EC49
100u/OS/D/6.3V/66/A/35m/X

12
11
10
9
R2221 USB/A/O/BLACK/GF/2/RA/D
3.3K/4/1
R2234 3.3K/4/1
A A
R2235 15K/4/1 FANIO_1 +12V
FANIO_1 <22>
R2222 15K/4/1 FANIO_2
FANIO_2 <22>
BC790 VCC R2231
0.1U/4/Y5V/25V/Z/X 6.2K/4/1 R2218
1
2
3
4

C1304 6.2K/4/1
1
2
3

R340 3.3N/4/X7R/50V/K/X
8.2K/4/1
R342 100/4/1
G
V
S
C

FANPW M3 <22> Title


CPU_FAN
C
V
S

FAN/1*4/W H/A3/PA66 SYS_FAN


FAN/1*3/W H/A3/PA66
RGB ,TV CONNECTOR
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 21 of 27
5 4 3 2 1
8 7 6 5 4 3 2 1

EUP control by PCH IT_AVCC


<21> RTS1- JP2 RTS1-
3VDUAL_SB
OR36 100/4/1 28_3VSB
DSR1-
<21> DSR1-

3
<21> TXD1 JP3 TXD1 GP66 <24>
OR13 8.2K/4/1 GP66 RXD1 Internal power pin OQ1
VCC3 <21> RXD1 D
<21> DTR1- JP4 DTR1-

GP66
OR9 8.2K/4/1 -PCIE_RST DCD1-
OR10 8.2K/4/X -THRMO <21> DCD1- RI1- G S 2N7002/SOT23/25pF/5
OR12 8.2K/4/1 <21> RI1- SIO_18V SOT23
-ATX_PSON

1
THROM SPARE GPIO

31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
OU1 OR35
D OBC13 D

RI1#/GP32
DCD1#/GP33
DTR1#/JP4
SIN1/GP41
SOUT1#/JP3
DSR1#/GP45
RTS1#/JP2
VCORE_EN/PCH_C0/FAN_CTRL4
VLDT_EN/PCH_D0/GP65
GP66
GP67

PD7/GP77/BUSSO2
PD6/GP76/BUSSO1
PD5/GP75/BUSSO0
PD4/GP74/BUSSI2
PD3/GP73/BUSSI1
PD2/GP72/BUSSI0
PD1/GP71
PD0/GP70
STB#/GP87/SMBC_M1
AFD#/GP86/SMBC_R1
ERR#
INIT#/GP85/SMBD_M1
SLIN#/GP84/SMBD_R1
ACK#/GP83
GNDD
0.1U/4/X7R/16V/K 510/4/1
32 CTS1#/GP31 BUSY/GP82 5
<21> CTS1- OR42 8.2K/4/1 BEEP_GB
VCC3 33 BEEP_GB PE/GP81 4
<19> N_ISOLATEB 34 PCIRSTIN#/CIRTX2/GP15 SLCT/GP80 3 OBC13=>0.1U confirm by Tom. For IT8721 Power leakage

l
IT_VCCH 35 3VSB AVCC3 2 IT_AVCC
36 1 VIN0
HOLD_M#/GP64 VIN0/VCORE(1.1V) VIN1 IT_VCCH
37 HOLD_B#/GP63 VIN1/VDIMM_STR(1.5V) 128

a
FANIO_1 38 127 VIN2
<21> FANIO_1 OR7 1K/4/1 FANCTL1 FAN_TAC1 VIN2(+12V) VIN3
VCC 39 FAN_CTL1 VIN3(+5V) 126

ti
FANIO_2 40 125 VIN4
<21> FANIO_2 OR8 1K/4/1 FANCTL2 FAN_TAC2/GP52 VIN4/VLDT_12 OBC1 OBC2
VCC 41 FAN_CTL2/GP51 VIN5 124
42 123 1u/4/X5R/6.3V/K 1u/4/X5R/6.3V/K
FANPW M3 FAN_TAC3/GP37 VIN6 VREF
<21> FANPW M3 43 FAN_CTL3/GP36 VREF 122 Power issue
44 121 TMPIN1 BC885 2.2n/4/X7R/50V/K
BEEP- RSTCONOUT/GP35 TMPIN1 0415
45 120

n
<23> BEEP- RSTCONIN/GP34 TMPIN2 TMPIN2 <6>
46 119 Close to super i/o
OR41 1K/4/1/X 5VSB_CTRL- GNDD TMPIN3 OR22 0/4/SHT/X
3VDUAL 47 5VSB_CTRL#
IT8728F(GB) TS_D- 118
OR23 0/4/SHT/X
GNDA <6>

e
48 5VAUX_SW GNDA 117
49 PW RGD2_50ms RSMRST#/CIRRX1/GP55 116
PW OK 50 115 -THRMO RTCVDD
<23,25,27> PW OK ATXPG/GP30 PCIRST3#/GP10
51 114 MCLK ITE Recommend :

d
GP27/SIN2 MCLK/GP56 MDAT COPEN- OR27 1M/4
52 GP26/SOUT2 MDAT/GP57 113 MCLK/DAT not use 8.2K Pull to VCC3 <23> COPEN-
53 112 KCLK

i
FAN_TAC4/GP25/DSR2# KCLK/GP60 KDAT OBC7
54 FAN_TAC5/GP24/RTS2# KDAT/GP61 111
55 110 1U/4/X5R/6.3V/K

f
-SB_SPI_CS_ITE GP23/CPU_PG 3VSBSW #/GP40
<15> -SB_SPI_CS_ITE 56 GP22 PW RGD3_150ms 109
EUP_N 57 108 GP53
<27> EUP_N GP21/DCD2# SUSC#/GP53 GP53 <14>
58 GP20/CTS2# PSON#/GP42 107 -ATX_PSON <23>

n y
59 GP17/RI2# PANSW H#/GP43 106 -PW RBTSW <23>
DTR2- JP6 60 DTR2# GNDD 105

SST/AMDTSI_D/PCH_D1/MTRB#
C -ITE_SPI_CS OR21 22/4 61 104 C
<15> -ITE_SPI_CS CIRTX1/CE_N PME#/GP54 -LPCPME <14>

o
62 PCH_C1/GP14 PW RON#GP44 103 -PSOUT <14>
63 PW RGD1_30ms SUSB# 102 -SLP_S3 <14,25>
-PCIE_RST 64 101 CEB_N OR25 22/4 -ITE_SPI_CS1 OBC4

PECI/AMDTSI_C/DRVB#
PCIRST1#/GP12 CE2_N/GP47 -ITE_SPI_CS1 <15>
65 100 1U/4/X5R/6.3V/K OR26
PCIRST2#/GP11 VBAT VBAT <13>
99 COPEN- 8.2K/4/1

SMBD_M2/WGATE#
IT_VCCH 66

SMBD_R2/HDSEL#
C
3VSB COPEN#

SMBC_M2/STEP#
SIO_18V 67 98 IT_VCCH OBC5

p
VCORE 3VSB

SMBC_R2/DIR#
-A_RST 68 97 28_3VSB 1u/4/X5R/6.3V/K
<13> -A_RST LRESET# SYS_3VSB
JP1

KRST#/GP62
-LDRQ0 69 96

CE_IN/GP50
<13> -LDRQ0 LDRQ# DSKCHG# ACN3
OBC10 3VDUAL_SB
LFRAME#

DENSEL#
GA20/JP5

WDATA#

RDATA#
e o
SERIRQ

OBC8 10u/8/X5R/6.3V/K KBDAT

INDEX#
1 2

PCICLK

MTRA#

DRVA#

TRK0#
CLKIN
GNDD

WPT#
3.9N/4/X7R/50V/K/X MSDAT
LAD0
LAD1
LAD2
LAD3
3 4
KBCLK

t
Power issue 5 6
MSCLK 7 8
0415 IT8728F/EX (GB)/QFP128

C
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
OR24 0/6/SHT/X

y
IT_VCCH 3VDUAL_SB
180P/8P4C/6/NPO/50V/K
-PCIE_RST OR19 0/4/SHT/X VCC3 OR6 1K/4/1 IT_AVCC OR30 0/6/SHT/X VCC3
PCIE_RST- <17,19>
LAD0
LAD1
LAD2
LAD3

t
RN4 RN5

b
SI_CLK FUSEVCC 1 2 MCLK 1 2 MSCLK
<13> SERIRQ SI_CLK <6>
3 4 KCLK 3 4 KBCLK
<13> -LFRAME SI_DAT MDAT MSDAT

o
SI_DAT <6> 5 6 5 6

a
LAD[0..3] 7 8 KDAT 7 8 KBDAT
<13> LAD[0..3]
OR20 0/4/SHT/X IO_KBRST- IO_KBRST- OR18 0/4/SHT/X DBIOS_RST- 1K/8P4R/4 82/8P4R/4
<14> -KBRST DBIOS_RST- <23>

n
JP5

g
<14> A20GATE
<13> LPC33

i
DSW _EUP
3VDUAL IT_AVCC FUSEVCC
<12> LPC48

G Do
OBC11 KB_MS
B OBC19 OBC3 10N/4/X7R/50V/K/X MSDAT B
7 10
10u/8/X5R/6.3V/K 22u/8/X5R/6.3V/M DSW _EUP OR50 8.2K/4 8
IT_VCCH
ite recommand MSCLK 11
12 BC124
MS 9 0.1U/4/Y5V/16V/Z
KBDAT 1 4
2
KBCLK 5
6 3
KB

KB/MS/6P/PC99/OS/RA/D/2/[11NR6-802006-19R_11NR6-802006-1ER]

OR47 8.2K/4/1 -SB_SPI_CS_ITE


VCC3
OR49 8.2K/4/1 GP53

VCORE DDR15V VCC3 VCC +12V

-LDRQ0 OR39 1K/4/1


VCC3

JP2 RTS1- OR0 8.2K/4/1


VCC3
Hardware Monitor circuits R20
8.2K/4
R196
8.2K/4
R200
10K/4/1
R215
15K/4/1
R213
10K/4/1

VREF VIN0
JP3 TXD1 OR1 8.2K/4/1
VCC3
VIN1
A O: EN SPI, I:DIS SPI VIN4 A
R218 VIN2
JP4 DTR1- OR2 8.2K/4/1
VCC3
10K/4/1 VIN3
TMPIN1

JP5 A20GATE OR3 1K/4/1


VCC3
R217 BC123 R216
BC116 BC121 BC120 15K/4/1 10K/4/1 BC122 R214
JP6 C117 RS2 0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K/X 0.1u/4/X7R/16V/K/X 2K/4/1
DTR2- OR4 1K/4/1/X C118 0.1u/4/X7R/16V/K 10K/1/4/S
IT_VCCH SYSTEM Title
OR37 1K/4/1/X 1U/6/Y5V/10V/Z
DTR2- ite recommand change to
JP7 IT_VCCH
Thermister 1U/4/X5R/6.3V/K ITE 8728DX ,Dual_BIOS
0.1U/4/Y5V/16V/Z Size Document Number Rev
CEB_N OR5 1K/4/1 Custom GA-78LMT-S2P 5.02
VCC3
Date: W ednesday, December 28, 2011 Sheet 22 of 27
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VCC

R446 BC171 5VSB


330/6 0.01U/4/X7R/25V/K 3VDUAL_SB
F_PANEL
+HD 1 HD+ MSG/PD+ 2 +MPD1
R449
-HDLED 3 4 -MPD1 8.2K/4/1 R471
HD- MSG/PD- 1K/4/1
5 6 -PW RBTSW Q350
GND PW + -PW RBTSW <22>
R2705 33/4
<14> -SYS_RST
D RESET 7 8 RESET D
RESET PW - RESET <12,25>

3
C200
9 0.01U/4/X7R/25V/K Q97
CI-

3
BAV99/SOT23/300mA BAT54C/SOT23/200mA C199
COPEN- 11 Q1
<22> COPEN- CI+

l
0.01u/4/X7R/25V/K BAV99/SOT23/300mA
14

1
SP+ VCC 5VSB

a
R463 330/6 +MPD1 15 16

1
VCC PW R+ NC 5VSB

i
-MPD1 17 18 -MPD1
PW R- NC

3
t
-MPD1 19 20 -SP
PW R- SP- Q106
BH/2*10K10,12,13/W H/2.54/VA/PA MMBT2222A/SOT23/600mA/40 RESET
3VDUAL

n
SOT23

3
2

1
R41 0/4/SHT/X -HDLED Q11

e
<15> -SATA_LED
R99 MMBT2222A/SOT23/600mA/40
1K/4/1
R466 1K/4/1 SOT23

d
VCC SB_BLINK <14> 3VDUAL

1
i

3
SOT23

D20 Q7

f
1N4148W /SOD123/300mA R15 MMBT2222A/SOT23/600mA/40
8.2K/4/1
Q98 1 SOT23
S

n y
-SP R455 75/6/1 3 R100 1K/4/1

1
<22> DBIOS_RST-
R456 75/6/1 R457 1K/4/1
D

2 SPKR <14>
C C
G
3

2N7002/SOT23/25pF/5

o
Q108
MMBT2222A/SOT23/600mA/40
VCC
SOT23

C
2

p
R460 1K/4/1
3

e o
R461 Q107
8.2K/4/1

t
SOT23
MMBT2222A/SOT23/600mA/40
2

C
<22> BEEP-

y
5VSB

b o t
1
a
D_5VSB

g n
AZ2225-01L/SOD323

i
G Do
B MH1 MH8 B

2
6
3

2
6
3
8 4 8 4
12 5 12 5
7 1 7 1
ATX POWER CONNECTOR
HOLE_3/X HOLE_3/X

11
10

11
10
5VSB VCC3

9
ATX
VCC3 13 3.3V 3.3V 1

R416 -12V 14 2 BC154 MH2 MH4


22K/4 -12V 3.3V 0.1U/4/X7R/16V/K VIN12

2
6
3

2
6
3
15 3 ATX_12V
GND GND
8 4 8 4
-ATX_PSON 16 4 VCC 4 1 12 5 12 5
<22> -ATX_PSON PSON 5V +12V GND
7 1 7 1
17 GND GND 5 3 +12V GND 2
BC155 HOLE_3/X HOLE_3/X

11
10

11
10
0.1U/4/X7R/16V/K 18 6 BC164

9
GND 5V 0.1U/4/Y/25V/X BC832
19 7 0.1u/4/X7R/16V/K
GND GND APW /2*2/IV/P/4.2/SN/PA66
20 8 PW OK MH3 MH5
-5V POK PW OK <22,25,27>

2
6
3

2
6
3
VCC 21 9 5VSB
5V 5VSB
8 4 8 4
22 5V 12V 10 +12V 12 5 12 5
BC159 BC166 7 1 7 1
A
0.1U/4/Y/25V/X BC160 23 11 0.1U/4/X7R/16V/K A
10U/8/X5R/6.3V/K 5V 12V K1 K2 K3 HOLE_3/X HOLE_3/X

11
10

11
10
24 12 VCC3

9
GND 3.3V BC165
0.1U/4/X7R/16V/K
APW/2*12/IV/VA/SN/2SHK/PA66
K1_ICT/X K1_ICT/X K1_ICT/X
COUPON1 COUPON1 1 2 COUPON/X VCC
C190
1

1
22U/8/X5R/6.3V/M COUPON2 COUPON2 1 2 COUPON/X K4 K5 K6 Title
ATX, FRONT PANEL
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
K1_ICT/X K1_ICT/X K1_ICT/X
Date: W ednesday, December 28, 2011 Sheet 23 of 27
8 7 6 5 4 3 2 1
1

1
5 4 3 2 1

VIN12 VIN12
VIN12
VIN12

DQ0

D1
D2
D3
D4
D5
VCORE_ADJ DR201 0/4/SHT/X DBC15 BAT54A/SOT23/200mA DBC24 1
DR193 100/4/1 DR191 2K/4/1 DR91 1u/6/X7R/16V/K 1U/6/X7R/16V/K DQ20 1 1 + DEC17
VCORE + DEC8 +
2.2/6 SOT23 DEC25
DR178 51/4/1 DC79 680P/4/X7R/50V/K DC82 68P/4/NPO/50V/J SIR428DP/N/7.5m/PPAKSO-8270u/FP/D/16V/88/12m 270u/FP/D/16V/88/12m 270u/FP/D/16V/88/12m
<6> COREFB+ BOOT1 0/6/SHT/M/X UGATE1 DR132 2.2/6 G
DR194 0/4/SHT/X DR190 12.4K/4/1 DC85 3.3N/4/X7R/50V/K DR79
DC39
DR25 1.78K/4/1 0.1U/6/X7R/25V/K

S3
S2
S1
DRS1 10K/1/4/S/X UGATE1 DR179 10K/4/1

3
D PHASE1 VCORE D
VCC3 DQ25 DR160 100/4/1 LGATE1
D DR198 0/4/SHT/X BOOT2 DR78 0/6/SHT/M/X PHASE1 DL8 0.6uH/42A/IMD0814/R/D
<6> COREFB-

D1
D2
D3
D4
D5

D1
D2
D3
D4
D5
G S 2N7002/SOT23/25pF/5

FBRNT
DR176 UGATE2

COMP
8.2K/4 DC40 DR138 1 1

ADJ

FB
PHASE2 0.1U/6/X7R/25V/K DQ19 DQ17 1/6 + DEC13 + DEC24

l
2

1
3

560u/FP/D/6.3V/69/A/11m560u/FP/D/6.3V/69/A/11m
DQ27 LGATE1 G G DR140 DR166

49

11

12

31

35

34

33

32

27

28

29
3

9
D DU1 0/4/SHT/X
0/4/SHT/X

a
DC58

COMP

FB
GND

FBRTN

ADJ

VCC12

BOOT1

UGATE1

PHASE1

LGATE1

BOOT2

UGATE2

PHASE2
2N7002/SOT23/25pF/5 G S VCC5 SIR840DP/N/5.4m/PPAKSO-8 4.7n/4/X7R/50V/K

S3
S2
S1

S3
S2
S1
SIR840DP/N/5.4m/PPAKSO-8
PH1
2

<22> GP66

t
VCC5 24 30 LGATE2 ISEN1
DR104 40.2K/4/1 DC55 1u/4/X5R/6.3V/K VCC5 LGATE2
VCC
DR131 30K/4/1/X DR134 1K/4/1/X 10 26 PWM3
DC74 0.1u/4/X7R/16V/K/X OFS PWM3
Disable PWM4 Use 3 Phase only

n
DR112 49.9K/4/1 2 25
RT PWM4 PH1 DR93 9.31K/4/1 DC41 0.1U/4/X7R/16V/K
DR129 34K/4/1 IMAX 14 16 ISP1

e
DC72 0.1u/4/X7R/16V/K IMAX ISP[1]
46 15 ISN1 DR94 470/4/1 ISEN1 DC42 0.1U/4/X7R/16V/K
VID5 ISN[1]
GND PH2
ISP2
DR95 9.31K/4/1 DC43 0.1U/4/X7R/16V/K

d
45 VID4 ISP[2] 18

i
PWM_VID3 44 17 ISN2 DR96 470/4/1 ISEN2 DC44 0.1U/4/X7R/16V/K
VCC3 VID3/SVC ISN[2] PH3 DR97 9.31K/4/1 DC45 0.1U/4/X7R/16V/K
PWM_VID2 ISP3 VIN12

f
43 20
VID2/SVD ISP[3]

RT8868
PWM_VID1 42 19 ISN3 DR98 470/4/1 ISEN3 DC46 0.1U/4/X7R/16V/K
C DC51 DR106 VID1/PVI ISN[3] C

n y
0.1U/4/X7R/16V/K/X 8.2K/4/1 PWM_VID0

D1
D2
D3
D4
D5
41 VID0/VFIXEN ISP[4] 22
Disable PWM4 Use 3 Phase only DBC26
<25> VCORE_PWOK VCORE_PWOK 47 21 VCC5 1U/6/X7R/16V/K DQ10
PGOOD ISN[4]

UGATE_NB

PHASE_NB
FBRTN_NB

LGATE_NB
VCC12_NB
COMP_NB

BOOT_NB
o
CPUVDD_EN DR107 0/4/SHT/X 8868_EN IMAX_NB PS DR111 1K/4/1 VCC5
PWROK

48 23

ISN_NB

ISP_NB
<25> CPUVDD_EN

FB_NB
EN PS UGATE2 DR142 2.2/6 G
DC53 0.1U/4/X7R/16V/K SIR428DP/N/7.5m/PPAKSO-8
DR110 DC52
1K/4/X 0.1U/4/X7R/16V/K/X

S3
S2
S1
13

40

36

37

38

39
RT8868/[10TA1-608868-01R ] DR181 10K/4/1
1

p
VCORE
PWM_PWRGD LGATE_NB
IMAX_NB

COMP_NB

<6> PWM_PWRGD

BOOT_NB
PHASE_NB PHASE2 DL6 0.6uH/42A/IMD0814/R/D

o
ISN_NB

e
ISP_NB

DR1 0/4/X UGATE_NB


FB_NB

D1
D2
D3
D4
D5

D1
D2
D3
D4
D5
<6> COREFB_NB- DR163 100/4/1
DQ1
1 1

t
DR80 0/6/SHT/M/X DC38 0.1U/4/X7R/16V/K DR148
DRN9 DC47 0.015u/4/X7R/16V/K DQ18 DQ12 1/6 + DEC22 + DEC26
1 2 PWM_VID0 DR99 38.3K/4/1 560u/FP/D/6.3V/69/A/11m560u/FP/D/6.3V/69/A/11m

C
<6> VID0 VIN12
3 4 PWM_VID1 LGATE2 G G DR150 DR168

y
<6> VID1
5 6 PWM_VID2 DBC14 1U/6/X7R/16V/K SIR840DP/N/5.4m/PPAKSO-8 0/4/SHT/X 0/4/SHT/X
<6> VID2
7 8 PWM_VID3 DR88 2.2/6 VIN12 SIR840DP/N/5.4m/PPAKSO-8 DC59
<6> VID3 BAT54A/SOT23/200mA

SOT23
4.7n/4/X7R/50V/K

S3
S2
S1

S3
S2
S1
1K/8P4R/4 PH2

b
DR105 6.34K/4/X ISEN2
DR100 15K/4/1 DC49 3.3N/4/X7R/50V/K

o
PH_NB DR114 9.31K/4/1 DC56 0.1u/4/X7R/16V/K

a
DR199 0/4/X DR102 51/4/1/X DC48 680P/4/X7R/50V/K/X DC50 100P/4/NPO/50V/J VIN12
<6> COREFB_NB+ DR113 470/4/1 ISEN_NB DC66 0.1u/4/X7R/16V/K
DR121 100/4/1 DR101 2K/4/1

n
VCORE_NB

g
VCORE_NB_ADJ DR200 0/4/SHT/X
B DBC25 B

D1
D2
D3
D4
D5
i
1U/6/X7R/16V/K
VIN12 DR116 0/6/SHT/M/X DC57 0.1U/6/X7R/25V/K DQ21

G Do
DU2
RT9612B UGATE3 DR151 2.2/6 G
DR85 BST 1 8 UGATE3 SIR428DP/N/7.5m/PPAKSO-8
2.2/6 BST UGATE
PWM3 2 7 PHASE3

S3
S2
S1
IN PHASE DR182 10K/4/1
3 6 VCORE
OD GND
4 5 LGATE3 PHASE3 DL7 0.6uH/42A/IMD0814/R/D
VCC LGATE

D1
D2
D3
D4
D5

D1
D2
D3
D4
D5
RT9612BGS/SOP8 DR154
DBC22 1/6 1 1
1U/6/X7R/16V/K DQ8 DQ16 + DEC28 + DEC15
VIN12 560u/FP/D/6.3V/69/A/11m560u/FP/D/6.3V/69/A/11m
LGATE3 G G DR155 DR169
SIR840DP/N/5.4m/PPAKSO-8 DC60 0/4/SHT/X 0/4/SHT/X
0.1u/4/X7R/16V/K SIR840DP/N/5.4m/PPAKSO-8 4.7n/4/X7R/50V/K
DBC2
D1
D2
D3
D4
D5

S3
S2
S1

S3
S2
S1
0x2A 0%VDD DBC19 PH3
DU3 1U/6/X7R/16V/K DQ22 ISEN3
3VDUAL 1 8 DDR15V_ADJ DDR15V_ADJ <27>
VDD VREF1
DR2 8.2K/4 2 7 VCORE_NB_ADJ G
B_SEL VREF2 SIR428DP/N/7.5m/PPAKSO-8
3 6 VCORE_ADJ
GND VREF3 UGATE_NB DR141 2.2/6 VCORE_NB
S3
S2
S1

DR3 10/4 UPSDA 4 5 UPSCK DR4 10/4 DR180 10K/4/1


A <8,12,14> SMBDATA SDA SCL SMBCLK <8,12,14> A
PHASE_NB DL9 0.6uH/42A/IMD0814/R/D
NCT3931U-2/SOT23-8
D1
D2
D3
D4
D5

D1
D2
D3
D4
D5

DQ23 DQ26 DR146 DR149 1 1


1/6 0/4/SHT/X + DEC30 + DEC29
DR167
LGATE_NB G G 0/4/SHT/X

DC61 Title
4.7n/4/X7R/50V/K 560u/FP/D/6.3V/69/A/11m
VCORE(RT8868+9612)
S3
S2
S1

S3
S2
S1

560u/FP/D/6.3V/69/A/11m
SIR840DP/N/5.4m/PPAKSO-8 PH_NB Size Document Number Rev
SIR840DP/N/5.4m/PPAKSO-8 ISEN_NB Custom GA-78LMT-S2P 5.02
Date: Wednesday, December 28, 2011 Sheet 24 of 27
5 4 3 2 1
5 4 3 2 1

5VSB DDR15V_EN VCC18


DDR15V_EN <27>

3
R382 D R361
22K/4 Q78 8.2K/4/1
G S 2N7002/SOT23/25pF/5
NB_PW ROK <10>

3
Q356

3
D
2N7002/SOT23/25pF/5 Q357
Q71 Q72 G S
D D
3VDUAL_SB
SOT23 SOT23 RESET <12,23>

1
R380 8.2K/4/1

1
<22,23,27> PW OK
BAT54C/SOT23/200mA

l
MMBT2222A/SOT23/600mA/40 R359
R381 8.2K/4/1 MMBT2222A/SOT23/600mA/40 8.2K/4/1
<14> S3_STATE

a
SB_PW ROK <14>
5VSB

3
VCC

t
D Q64
R360
R335 8.2K/4/1 G S
8.2K/4/1

1
CPUVDD_EN <24>

3
5VSB 2N7002/SOT23/25pF/5

e
3
Q63
Q431 MMBT2222A/SOT23/600mA/40
D C152

d
R334 2.2u/8/X5R/10V/K SOT23
22K/4 G S

1
i
VCC_SB R347 8.2K/4/1
2N7002/SOT23/25pF/5
2

f
3

C164
VCC18_EN <26>
Q54 4.7U/6/X5R/6.3V/K ( 1.8V , 1.2V , 1.1V ) > NB_PWRGD 前 1ms

n y
PWOK > NB_PWRGD / SB_PWRGD
3

C SOT23 Q432 D46 C


R333 8.2K/4/1 MMBT2222A/SOT23/600mA/40 D

o
2

<22,23,27> PW OK <12,23> RESET 2


3
3

G S
<14,22> -SLP_S3 1
Q59 2N7002/SOT23/25pF/5
BAT54A/SOT23/200mA
2

SOT23
p
SOT23
2

DDR15V R31 1K/4/1

e o
MMBT2222A/SOT23/600mA/40

C154

t
0.1U/4/X7R/16V/K

y t C
NB_VCC_EN <26>

b
3

5VSB

o
D

a
Q279
2N7002/SOT23/25pF/5
R343 G S

g n
8.2K/4/1
2

SB_VCC_EN <26>

i
3
3

Q58

G Do
D Q278
B 2N7002/SOT23/25pF/5 B
G S
SOT23
R346 1K/4/1
2

<24> VCORE_PW OK
MMBT2222A/SOT23/600mA/40
C163
0.1U/4/X7R/16V/K

5VSB

R84 R85
330/6 330/6/X

For S28/S12 Can't PWR-ON issue

A A

Title
POWER SEQUENCE,EUP
Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 25 of 27
5 4 3 2 1
5 4 3 2 1

VCC3 VCC3

1 RS_PHOT CLOSE CPU VR MOSFET Deasserted at 116 degree


+ EC27 VIN12 VIN12
R154 35.7K/4/1 -PROCHOT_CPU
560u/FP/D/6.3V/69/A/11m -PROCHOT_CPU <6,13>
BC39 L27

3
0.1U/4/X7R/16V/K 1uH/30A/IMD0814/R/D VIN12
U5A Q6

8
R152 R153 D 2N7002/SOT23/25pF/5
3.3n/4/X7R/50V/K 3 10K/4/1 1.5K/4/1 U5B
+

8
C1394 R3197 27K/4/1 G S
1
1 TSM_5 SOT23

D1
D2
D3
D4
D5
2 - 5 +
C1395 22p/4/NPO/50V/J BC40 + EC35 7 TSM_7

1
D U97 PQ11 1U/6/Y5V/10V/Z 560u/FP/D/6.3V/69/A/11m LM358DR/SO8 TSM_6 6 D
-
8 1

4
R18 R23 PHASE BOOT LM358DR/SO8
0/4 0/4/X 7 2 R2763 2.2/6 NBVCCU_G G RS_PHOT R150

4
<25> NB_VCC_EN COMP/SD UG 100K/1/4/S 1K/4/1

l
NB_VCC_EN_W IN 6 3 SIR428DP/N/7.5m/PPAKSO-8 C62
FB GND R3198 C1397 0.1u/4/X7R/16V/K/X

S3
S2
S1
+12V R2773 2.2/6 5 4 8.2K/4/1 0.1u/6/X7R/25V/K NB_VCC MOS_OT
VCC LG/OCSET MOS_OT <14>

a
25V
1.1V@15.8A

3
NBVCCPHASE

D1
D2
D3
D4
D5
9 L2 1uH/30A/IMD0814/R/D CLOSE PWM HOT MOSFET
BGND

i
BC931 Q12
1U/6/X7R/16V/K RT8120DGS/SOP8 PQ12 1 1 D

t
R2774 R2775 + EC36 + EC21
39.2K/4/1 2.2/6 R22 R2778 G S 2N7002/SOT23/25pF/5
NBVCCL_G 10/4 1K/4/1 560u/FP/D/6.3V/69/A/11m SOT23
G
C1398 560u/FP/D/6.3V/69/A/11m TSM_7

1
n
1n/4/X7R/50V/K
BC5

S3
S2
S1
1.5n/4/X7R/50V/K

e
ISL6545 VREF IS 0.6V SIR428DP/N/7.5m/PPAKSO-8 RS740 Stuff 2K/4/1
RT8120DGS VREF is 0.8V

i d
D40
R3199 4.64K/4/1 2 R2783 0.8*(1+1K/2.61K)=1.10V

f
<15> NB_VCC_OV1
3 2.61K/4/1
<15> NB_VCC_OV2
R3200 2.37K/4/1 1 NB_VCC_OV1 NB_VCC_OV2 NB_VCC

n y
BAT54A/SOT23/200mA L X 1.20V

SOT23
C X L 1.30V C

o
L L 1.40V

5VSB 2_5LEVEL

te C o p
y C
VCC18 VCC3

t
R93

b
220/6 1
1

+ EC28
U148

a o
BAV99/SOT23/300mA
C8 C11
C

22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M/X

g n
Q2 560u/FP/D/6.3V/69/A/11m
3

ATI for vcc3/vcc18 power ramp-up 2.1V

i
AP431N/SOT23/150mA VCC3
A

G Do
2_5LEVEL +12V
B B
VCC18
U146B
D1
D2
D3
D4
D5

R515 C217
390/4/1 PQ13 1u/6/Y5V/10V/Z
8

1.8V
VCC18_EN 5
<25> VCC18_EN +
7 R510 100/4/1 G
6 -
R514 LM358DR/SO8 SIR428DP/N/7.5m/PPAKSO-8
1K/4/1 BC107 C5
S3
S2
S1

0.1U/4/Y5V/16V/Z 1n/4/X7R/50V/K
4

VCC18
R2/R517=2
R2
40.2K/4/1 3VDUAL_SB
R517 2K/4/1
For 1.2V Dual_Power.
DDR15V BC202 VCC12_DUAL
2_5LEVEL 1U/6/Y5V/10V/Z
VCC_SB +12V Q73
C223 3 600mA MAX
1u/6/Y5V/10V/Z
D1
D2
D3
D4
D5

VCC12_DUAL 4 2 VCC12_DUAL
R521 VCC_SB 1 R48
1.3K/4/1 U146A PQ10 10/6/X
1.2V@1.69A
8

1.2V
SB_VCC_EN 3 BC692 BC17
<25> SB_VCC_EN + 1 1 1
1 R511 100/4/1 G SIR428DP/N/7.5m/PPAKSO-8 1U/6/Y5V/10V/Z 22u/8/X5R/6.3V/M
2 + + EC25 + EC26
-
A
EC39 560u/FP/D/6.3V/69/A/11m 560u/FP/D/6.3V/69/A/11m A
R520 BC108 LM358DR/SO8 C6 560u/FP/D/6.3V/69/A/11m AZ1117H-1.2TR/SOT223/1A
S3
S2
S1

1.24K/4/1 0.1U/4/Y5V/16V/Z 1n/4/X7R/50V/K


4

VCC_SB
R4/R519=2
R4
D42 40.2K/4/1 VCC_SB_OV1 VCC_SB_OV2 VCC_SB
R3203 20K/4/1 2
<15> VCC_SB_OV1 Title
3 R519 2K/4/1 L X 1.30V
R3204 10K/4/1 1
<15> VCC_SB_OV2
X L 1.40V NB/SB POWER,VCC12HT,VDDA25,
Size Document Number Rev
Custom
SOT23

BAT54A/SOT23/200mA L L 1.50V GA-78LMT-S2P 5.02


Date: W ednesday, December 28, 2011 Sheet 26 of 27
5 4 3 2 1
5 4 3 2 1

Q14
1 P_GATE
3 5VDUAL
5VSB 5VSB 5VSB +12V D72 2 3VDUAL 3VDUAL

3
5VDUAL BAT54C/SOT23/200mA 5VSB Q358
ErP 1 BAT54A/SOT23/200mA
R341 3 C234
<22> EUP_N
R98 8.2K/4 2 0.1u/4/Y5V/16V/Z

8
U9A U9B R2855 SOT23 1
8.2K/4

8
R344 0/4/SHT/X 3 8.2K/4/1 MMBT2907A/SOT23/-600mA/50 C236 + EC40

1
<22,23,25> PW OK + 5VDUAL 5VSB
1 5VDL_G1 5 Q36 R1735 560u/FP/D/6.3V/69/A/11m

G
+
R351 10K/4/1 2 7 5V_DRV R2858 1K/4/1 5VSB 3 301/4/1
5VSB -
KA393D/SO8 5VDL_G2 6 Q32 D1 3VDUAL 2 0.1u/4/Y5V/16V/Z
-

3
KA393D/SO8 S3 D2 Q361 1
R339 C172 S2 D3 R2856

4
D D
10K/4/1 68K/4/1 L1085DG/TO252/5A

4
VCC S1 D4
D5 MMBT2222A/SOT23/600mA/40 R1737
SIR428DP/N/7.5m/PPAKSO-8 3V SOT23 BC3 510/4/1 1.25*(1+169/100)=3.36V
0.1U/4/Y5V/16V/Z/X

1
l
0.1u/4/X7R/16V/K Q31
R113 1K/4/1 P_GATE 1 5VDUAL
2 R2857 C216

a
3 100K/4/1 1u/6/Y5V/10V/Z
5VSB 1 EC24

ti
1 P2003ED/P/TO252/30m + 560u/FP/D/6.3V/69/A/11m
EC31 +
100u/OS/D/6.3V/66/A/35m 3VDUAL_SB

ErP 5VSB
KQ1

n
3
3VDUAL_SB 4 2 KR6

+
301/4/1 KEC1

e
1
100u/OS/D/6.3V/66/A/35m
L1117LG/N/SOT223/1A

d
KBC1
KR5 0.1u/4/X7R/16V/K

i
510/4/1

o f
n y
C

te C o p
b y o t C DDR15V

a
BC98 BC102

g n
0.1U/4/Y5V/16V/Z 4.7U/8/Y5V/10V/Z

i
DDR15V
VCC
U199

G Do
B B
1 VIN VREF2 8
R3186
1K/4/1
ISL6545 R9=>0 , R8=>NC 5VDUAL
2 GND ENABLE 7

RT8120 R9=>NC, R8=>0 3 VREF1 VCNTL 6

4 5

GND
DDRVTT VOUT BOOT_SEL
R3187
L3 1K/4/1 BC99
BC29 1uH/30A/IMD0814/R/D RT9199PSP/SO8/1.8A
0.1u/4/X7R/16V/K BC100 4 VIA to GND 0.1U/4/Y5V/16V/Z

9
3.3n/4/X7R/50V/K 0.1U/4/Y5V/16V/Z
C1401 R2794 27K/4/1
1
22p/4/NPO/50V/J C1402 BC44 + EC45
D1
D2
D3
D4
D5

1U/6/Y5V/10V/Z 560u/FP/D/6.3V/69/A/11m
U99 Q25
R8 R9 8 1
0/4 0/4/X PHASE BOOT
7 2 PW M18_1 2.2/6 DDR18VU_G G Default: 1.60V
<25> DDR15V_EN COMP/SD UG SIR428DP/N/7.5m/PPAKSO-8
R2799
+12V
6 FB GND 3
C1404 1.5V@20A
S3
S2
S1

R2802 2.2/6 5 4 R2803 0.1u/6/X7R/25V/K DDR15V


5VDUAL VCC LG/OCSET 8.2K/4/1 25V
9 DDR18V_PHASE L4 1uH/30A/IMD0814/R/D
BAT54C/SOT23/200mA BC933 BGND R2804
D1
D2
D3
D4
D5

Q394 1U/6/X7R/16V/K RT8120DGS/SOP8 49.9K/4/1 R2805 R2807 R2806 1 1


Q26 2.2/6 10/4 1K/4/1 W C18+ EC46 + EC47
560u/FP/D/6.3V/69/A/11m 560u/FP/D/6.3V/69/A/11m
A A
DDR18VL_G G
C1405 BC934
ISL6545 VREF IS 0.6V 1n/4/X7R/50V/K 1.5n/4/X7R/50V/K 0.01U/4/X7R/25V/K

RT8120DGS VREF is 0.8V


S3
S2
S1

SIR428DP/N/7.5m/PPAKSO-8 R2810 0.8*(1+1K/1.14K)=1.5V


1.13K/4/1
Title

DDR15V_ADJ R219 0/4/SHT/X


DDRII POWER , VCC18
<24> DDR15V_ADJ Size Document Number Rev
Custom GA-78LMT-S2P 5.02
Date: W ednesday, December 28, 2011 Sheet 27 of 27
5 4 3 2 1

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