1 2 3 4

JA1 R1 R2 JA7 JC1 R3 R4 JC7

Pmod 2x6 Pmod 2x6
200 R5 1 7 R6 200 200 R7 1 7 R8 200
JA2 JA8 JC2 JC8
2 8 2 8
R9 200 3 9 200 R10 R11 200 3 9 200 R12
JA3 JA9 JC3 JC9
4 10 4 10
GND GND GND GND
200 R13 5 11 R14 200 200 R15 5 11 R16 200
JA4 JA10 JC4 JC10
A 6 12 6 12 A
200 JA 200 200 JC 200
D1 D2 D3 D4
GND VCC3V3 GND GND VCC3V3 GND

JB1 R17 R18 JB7 XADC1_P XADC1_N

Pmod 2x6 Pmod 2x6
200 R19 1 7 R20 200 1 7
JB2 JB8 XADC2_P XADC2_N
2 8 2 8
JB3 R21 200 3 9 200 R22
JB9 XADC3_P
3 9
XADC3_N
4 10 4 10
GND GND GND GND
200 R23 5 11 R24 200 5 11
JB4 JB10 XADC4_P XADC4_N
6 12 6 12
200 JB 200 JXADC
D5 D6 D7 D8
GND VCC3V3 GND GND VCC3V3 GND

B B

VCC3V3 VCC3V3 BTNL R25 BTNL

10K
R26 SW0 BTNR PTA-142 R27 BTNR
SW0
R28 10K SW1
10K
SW1 BTNU PTA-142 R29 BTNU
10K R30
SW2
10K
SW2
R31 10K SW3 BTND PTA-142 R32 BTND
SW3 10K R33 10K
SW4
SW4 BTNC PTA-142 R34 BTNC
R35 10K SW5
10K
SW5 10K R36 PTA-142
SW6 R37 R38 R39 R40
R41
SW6 10K 10K 10K 10K 10K
R42 10K SW7
SW7 10K GND
C C
GND

VCC3V3

R43 SW8
SW8
R44 10K SW9
SW9 10K R45
SW10
SW10
R46 10K SW11
SW11 10K R47
SW12
SW12
R48 10K

ddddd
SW13 Title Rev

D
SW13

SW14
10K R49
SW14 F1
Foot C.0
Copyright 2014 D
R50 10K SW15 F2 Circuit
Foot
SW15 10K PMOD, I/O
F3 Doc#
Foot 500-183
GND
F4 Engineer MTA
Foot
Author GMA
Date 5/21/2014
Digilent Inc. CE ROHS Chinese ROHS Basys 3 XUP Linear Tech Sheet# 1 out of 8
1 2 3 4
 1 2 3 4

VGA_R0 R51
C1
4K R52 R53
VGA_R1 LED0
2K 1nF/250V 330
A VGA_R2 R54 LD0 A
VGA_SHIELD R55 GND LED1 R56
1K R57
VGA_R3
1MEG 330 LD1
510 J1
VGA_G0 R58 LED2 R59
S1
RED
4K R60 1 330 LD2
VGA_G1 GREEN
2 R61
BLUE LED3
R62 2K 3
VGA_G2
4 330 LD3
1K R63 5 R64
VGA_G3 LED4
6
R65 510 7 330 LD4

DB15F
VGA_B0
8 R66
LED5
4K R67 9
VGA_B1
10 330 LD5
R68 2K 11 R69
VGA_B2 LED6
12
1K R70 13 330 LD6
VGA_B3
14 R71
LED7
R72 510 15
VGA_HS HS
S2 330 LD7
B B
100 R73 R74
VGA_VS VS 1-1734530-3 LED8
GND
100 330 LD8
LED9 R75
330 LD9
LED10 R76
330 LD10
LED11 R77
330 LD11
LED12 R78
330 LD12
LED13 R79
330 LD13
CA R80 LED14 R81

R82 100 330 LD14

C CB VCC3V3 C
R84 LED15 R83 GND
100 R85
CC DISP1 Q1A AN3
330
TOF-2481BE-N LD15
R86 100 2.2K
CD 11
CA
7 Q1B R87
7 Segment Display

AN2
100 R88 CB
CE 4 12 2.2K
CC A1
100 2 9
R89 CD A2
CF 1 8 Q2A R90 AN1
CE A3
100 10 6 2.2K
R91 CF A4
CG 5
CG
100 3 Q2B R92 AN0
R93 DP
DP
2.2K
100 KW4-281ASB

Title Rev

D
Basys 3
Circuit
C.0
Copyright 2014 D
7 SEG, VGA, LEDs
Doc#
500-183
Engineer MTA
Author GMA
Date 5/21/2014
Sheet# 2 out of 8
1 2 3 4
 1 2 3 4

A A
IC2A
PORT B IC2F USB A
16 PIC_BUSY R94 VCC3V3 PORT G GND 4 S1
PGED1/AN0/VREF+/RP0/PMA6/CN2/RB0 G S1
15 PS2_CLK 37 D+/RG2 3
PGEC1/AN1/VREF-/RP1/CN3/RB1
14 LD16 470 D+/RG2
36 D-/RG3 2
D+
AN2/C2INB/VMIO/RP13/CN4/RB2 D-/RG3 D-
13 4 1 S2 SHIELD
AN3/C2INA/VPIO/CN5/RB3 C1IND/RP21/PMA5/CN8/RG6 V S2
12 PS2_DATA 5
PGED3/AN4/C1INB/USBOEN/RP28/CN6/RB4 R95 C1INC/RP26/PMA4/CN9/RG7 C2
11 INIT 6 J2
PGEC3/AN5/C1INA/VBUSON/RP18/CN7/RB5 C2IND/RP19/PMA3 /CN10/RG8 1uF
17 PIC_PGC2 8 GND
PGEC2/AN6/RP6/CN24/RB6 100 RP27/PMA2/C2INC/CN11/RG9 10V
18 PIC_PGD2
PGED2/AN7/RP7/RCV/CN25/RB7
21 PIC24FJ128GB106-I/MR
AN8/RP8/CN26/RB8
22 R97 100 MODE1
AN9/RP9/PMA7/CN27/RB9 R96
23 R98 100 MODE2
TMS/CVREF/AN10/PMA13/CN28/RB10
24 NL
TDO/AN11/PMA12/CN29/RB11
27 R99 100 DONE FDN338P
TCK/AN12/PMA11/CTED2/CN30/RB12 VU
28 R100 100 PROG 2 3
TDI/AN13/PMA10/CTED1/CN31/RB13
29 R101 100 QSPI_DQ1
AN14/CTPLS/RP14/PMA1/CN32/RB14
30 R102 100 QSPI_SCK Q6
AN15/RP29/REFO/PMA0/CN12/RB15 C66 R113

1
1% R114 16V
100nF 47K
PIC24FJ128GB106-I/MR 100K
B GND B

1% R185
10K

3
IC2B
PORT C EN 1
39 R111 0 USB_12MHZ Q7
OSCI/CLKI/CN23/RC12
47 FDV301N
SOSCI/C3IND/CN1/RC13

2
48 X1 GND
SOSCO/T1CK/C3INC/RPI37/CN0/RC14
40
OSCO/CLKO/CN22/RC15
C4
PIC24FJ128GB106-I/MR C3 8MHz 20pF
20pF No Load No Load
No Load GND

IC2D
PORT E
60
PMD0/CN58/RE0
VCC3V3 61
PMD1/CN59/RE1
C 62 C
PMD2/CN60/RE2
63
C5 C6 C7 C8 C9 C10 PMD3/CN61/RE3
IC2G 64
19

10
26
38

100nF 100nF 100nF 100nF 100nF 100nF PMD4/CN62/RE4

GND 1
PMD5/CN63/RE5
2
SCL3/PMD6/CN64/RE6
AVDD

VDD
VDD
VDD

3
SDA3/PMD7/CN65/RE7
34 PIC24FJ128GB106-I/MR
VBUS
35 VCC3V3
VUSB
PIC24FJ128GB106-I/MR

VCC3V3
56
VCAP/VDDCORE
R103
57 10K R104
ENVREG 1x6
7 PIC_MCLR PIC_MCLR
MCLR 1
2 100
AVSS

3 R105 PIC_PGD2
VSS
VSS
VSS
VSS

4
5 100
Title Rev

dddd3
C11 C12 6
C.0
R106 PIC_PGC2
20

25
41
P
9

10uF 100nF J3
100
D GND GND Copyright 2014 D
Circuit
USB HID
Doc#
500-183
Engineer MTA
Author GMA
Date 5/21/2014
Sheet# 3 out of 8
1 2 3 4
 1 2 3 4

1x6 R131
TMS_JTAG TMS
1
TDI_JTAG
2 100 R132
TDO_JTAG TDI_FPGA
3
TCK_JTAG
4 R133 100
GND TCK
A 5 A
VCC3V3
6 100
J5 D9
No Load GND
VCC3V3
R134 TDO_FPGA
100 C32
QSPI_DQ0
100nF
GND
R135
IC6 No Load 4.7K
VCC3V3 100 R136 5 8
SDI/DQ0 VCC
IC7F
R137 2 6 QSPI_SCK
SDO/DQ1 SCK
1K D18 W9 TMS
IO_L1P_T0_D00_MOSI_14 TMS_0
E18 C8 TCK VCC3V3 3 1 QSPI_CS
LED1 IO_L3P_T0_DQS_PUDC_B_14 TCK_0 WP/DQ2 CS
E19 W10 TDI_FPGA
IO_L3N_T0_DQS_EMCCLK_14 TDI_0
R138 LED2 U19 W8 TDO_FPGA 7 4
IO_L15P_T2_DQS_RDWR_B_14 TDO_0 HOLD/DQ3 VSS
1K LED4 W18
IO_L16P_T2_CSI_B_14
GND No Load V12 MODE0 R139 R140 R141 R142 R143 R144 S25FL032P0XNFI00
M0_0
W11 MODE1 100 200 4.7K 4.7K 1.8K 1.8K
B M1_0 B
A11 U10 MODE2 No Load GND
DXP_0 M2_0
GND B11
DXN_0 CONFIG C11 QSPI_SCK Load either the MLP8 or the
CCLK_0
A13 U12 DONE SOIC16 package, not both.
VREFN_0 DONE_0
B12 V10 PROG
VREFP_0 PROGRAM_B_0
U11 INIT
INIT_B_0
A12
XADCGND VP_0
B13 D19 QSPI_DQ1
VN_0 IO_L1N_T0_D01_DIN_14 LED3
V19
R145 IO_L15N_T2_DQS_DOUT_CSO_B_14
VCC3V3 V11 K19 QSPI_CS VCC3V3
CFGBVS_0 IO_L6P_T0_FCS_B_14
4.7K G18 QSPI_DQ2
IO_L2P_T0_D02_14
F18 QSPI_DQ3 IC8
IO_L2N_T0_D03_14
15 2
SDI/DQ0 VCC
XC7A35T-1CPG236C 100 R146 8 16 QSPI_SCK
SDO/DQ1 SCK
R147 R148
100 100 100 R149 9 7 QSPI_CS
WP/DQ2 CS
No Load BTNPROG
PTA-142 Red Knob 100 R150 1 10
HOLD/DQ3 VSS
LD19 S25FL032P0XMFI00
C C
GND GND

VCC3V3

R151 VCC3V3
1x4
GND Title Rev

Basys 3
1K
Slave Serial

1
C.0
Master SPI

MODE2
JTAG

2
VCC3V3 R152
3
D MODE1 1K Copyright 2014 D
4
Circuit
JP1 MODE0 CONFIG, SPI FLASH
R153
1K Doc#
500-183
GND
Engineer MTA
Author GMA
Date 5/21/2014
Sheet# 5 out of 8
1 2 3 4
 1 2 3 4

IC7A IC7C

BANK 14 BANK 34 XADC1_P R154 XA1_P

VGA_G3 D17 H19 VGA_R1 R2 SW15 100
IO_0_14 IO_L4P_T0_D04_14 IO_L1P_T0_34
LED6 U14 G19 VGA_R0 T2 SW10 C33
IO_25_14 IO_L4N_T0_D05_14 VGA_G1 IO_L1N_T0_34 SW11
H17 R3 1nF No Load
IO_L5P_T0_D06_14 VGA_G2 IO_L2P_T0_34 SW9 XADC1_N XA1_N
G17 T3 R155
A IO_L5N_T0_D07_14 VGA_R2 IO_L2N_T0_34 SW14 A
J19 T1 100
IO_L6N_T0_D08_VREF_14 VGA_G0 IO_L3P_T0_DQS_34
IO_L3P_T0_DQS_
_
_DQS_34 SW13 XADC2_P XA2_P
J17 U1 R156
IO_L7P_T1_D09_14 VGA_B3 IO_L3N_T0_DQS_34
IO_L3N_T0_DQS_
_
_DQS_34 SW8
J18 V2 100
IO_L7N_T1_D10_14 VGA_B1 IO_L5P_T0_34 SW12
L18 W2 C34
IO_L8P_T1_D11_14 IO_L5N_T0_34
K18 VGA_B2 V3 LED9 1nF No Load
IO_L8N_T1_D12_14 IO_L6P_T0_34
N18 VGA_B0 W3 LED10 XADC2_N R157 XA2_N
IO_L9P_T1_DQS_14 IO_L6N_T0_VREF_34
IO_L6N_T0_VREF_
_
_VREF_ 34
N19 VGA_R3 U3 LED11 100
IO_L9N_T1_DQS_D13_14 IO_L9P_T1_DQS_34
IO_L9P_T1_DQS_
_
_DQS_34
P19 VGA_HS U2 AN0 XADC3_P R158 XA3_P
IO_L10P_T1_D14_14 IO_L9N_T1_DQS_34
IO_L9N_T1_DQS_
_
_DQS_34
R19 VGA_VS U4 AN1 100
IO_L10N_T1_D15_14 IO_L11P_T1_SRCC_34
M18 JC2 V4 AN2 C35
IO_L11P_T1_SRCC_14 IO_L11N_T1_SRCC_34
M19 JC8 W5 CLK100MHZ 1nF No Load
IO_L11N_T1_SRCC_14 JC7 IO_L12P_T1_MRCC_34 AN3 XADC3_N XA3_N
L17 W4 R159
IO_L12P_T1_MRCC_14 JC1 IO_L12N_T1_MRCC_34 CA
K17 W7 100
IO_L12N_T1_MRCC_14 JC3 IO_L13P_T2_MRCC_34 CB XADC4_P XA4_P
N17 W6 R160
IO_L13P_T2_MRCC_14 JC9 IO_L13N_T2_MRCC_34 CC
P17 U8 100
IO_L13N_T2_MRCC_14 JC4 IO_L14P_T2_SRCC_34 CD
P18 V8 C36
IO_L14P_T2_SRCC_14 JC10 IO_L14N_T2_SRCC_34 CE
R18 U5 1nF No Load
IO_L14N_T2_SRCC_14 IO_L16P_T2_34
W19 BTNL V5 CF XADC4_N R161 XA4_N
IO_L16N_T2_A15_D31_14 IO_L16N_T2_34
T17 BTNR U7 CG 100
IO_L17P_T2_A14_D30_14 IO_L19P_T3_34
T18 BTNU V7 DP
IO_L17N_T2_A13_D29_14 IO_L19N_T3_VREF_34
IO_L19N_T3_VREF_
_
_VREF_ 34
U17 BTND
B IO_L18P_T2_A12_D28_14 B
U18 BTNC
IO_L18N_T2_A11_D27_14
V16 SW1 XC7A35T-1CPG236C
IO_L19P_T3_A10_D26_14
V17 SW0
IO_L19N_T3_A09_D25_VREF_14 SW2
W16 IC7D
IO_L20P_T3_A08_D24_14 SW3
W17
IO_L20N_T3_A07_D23_14 SW5 BANK 35
V15
IO_L21P_T3_DQS_14 SW4 JA10
W15 G3
IO_L21N_T3_DQS_A06_D22_14 SW7 IO_L1P_T0_AD4P_35 JA4
W13 G2
IO_L22P_T3_A05_D21_14 SW6 IO_L1N_T0_AD4N_35 JA9
W14 H2
IO_L22N_T3_A04_D20_14 IO_L2P_T0_AD12P_35
U15 LED5 J2 JA3
IO_L23P_T3_A03_D19_14 IO_L2N_T0_AD12N_35
U16 LED0 H1 JA7
IO_L23N_T3_A02_D18_14 IO_L3P_T0_DQS_AD5P_35
IO_L3P_T0_DQS_
_DQS_AD5
_DQS_
DQS_AD5P_35
V13 LED8 J1 JA1
IO_L24P_T3_A01_D17_14 IO_L3N_T0_DQS_AD5N_35
IO_L3N_T0_DQS_
_DQS_AD5
_DQS_
DQS_AD5N_35
V14 LED7 K2 JA8
IO_L24N_T3_A00_D16_14 IO_L5P_T0_AD13P_35
L2 JA2
IO_L5N_T0_AD13N_35
L1 LED15
IO_L6N_T0_VREF_35
IO_L6N_T0_VREF_
_
_VREF_35
XC7A35T-1CPG236C J3 XA1_P
IO_L7P_T1_AD6P_35 XA1_N
K3
IO_L7N_T1_AD6N_35 XA2_P
L3
IO_L8P_T1_AD14P_35 XA2_N
IC7B M3
IO_L8N_T1_AD14N_35 XA3_P
M2
BANK 16 IO_L9P_T1_DQS_AD7P_35
IO_L9P_T1_DQS_
_DQS_AD7
_DQS_
DQS_AD7P_35 XA3_N
M1
JB1 IO_L9N_T1_DQS_AD7N_35
IO_L9N_T1_DQS_
_DQS_AD7
_DQS_
DQS_AD7N_35 XA4_P
C A14 N2 C
IO_L6P_T0_16 IO_L10P_T1_AD15P_35
A15 JB7 N1 XA4_N
IO_L6N_T0_VREF_
IO_L6N_T0_VREF_16
_
_VREF_ 16 IO_L10N_T1_AD15N_35
C15 JB9 N3 LED13
IO_L11P_T1_SRCC_16 IO_L12P_T1_MRCC_35
B15 JB3 P3 LED12
IO_L11N_T1_SRCC_16 IO_L12N_T1_MRCC_35
A16 JB2 P1 LED14
IO_L12P_T1_MRCC_16 IO_L19N_T3_VREF_35
IO_L19N_T3_VREF_
_
_VREF_35
A17 JB8
IO_L12N_T1_MRCC_16
C16 JB10
IO_L13P_T2_MRCC_16 JB4
B16 XC7A35T-1CPG236C
IO_L13N_T2_MRCC_16 PS2_CLK
C17
IO_L14P_T2_SRCC_16 PS2_DATA
B17
IO_L14N_T2_SRCC_16 UART_TXD_IN
B18 IC7E
IO_L19P_T3_16 UART_RXD_OUT
A18
IO_L19N_T3_VREF_16
IO_L19N_T3_VREF_
_
_VREF_ 16
C7
MGTRREF_216
D2
MGTPTXP0_216
XC7A35T-1CPG236C D1
MGTPTXN0_216
B2
MGTPTXP1_216
BANK 216

A2
MGTPTXN1_216
B8
MGTREFCLK0P_216
A8 Title Rev

Basys 3
MGTREFCLK0N_216

D
VCC3V3

IC9
MGTREFCLK1P_216
MGTREFCLK1N_216
B10
A10
B4
C.0
Copyright 2014 D
CLK100MHZ MGTPRXP0_216
4 3 A4 Circuit
VDD OUT MGTPRXN0_216
C37 MGTPRXP1_216
B6 FPGA BANKS
1 2 A6 GND Doc#
100nF STBY GND MGTPRXN1_216 500-183
DSC1033CC1-100.0000T Engineer MTA
GND XC7A35T-1CPG236C Author GMA
Date 5/21/2014
Sheet# 6 out of 8
1 2 3 4
 1 2 3 4

A A

FB3
VCC1V8 IC7G VCC3V3
600Ohm/100MHz V9
POWER VCCO_0
G12
C38 C26 VCCO_0 C39 C40 C41
C13
470nF 10nF VCCADC 47nF 470nF 4.7uF
GND F17 GND
VCCO_14
XADCGND VCC1V8 C9 K12
VCCBATT VCCO_14
K13 VCC3V3
VCCO_14
C1 L12
MGTAVCC VCCO_14
E1 L13
MGTAVCC VCCO_14 C42 C43 C44 C45 C46 C47 C48 C49 C50 C51
F3 M12
MGTAVCC VCCO_14 47nF 47nF 47nF 470nF 470nF 470nF 470nF 4.7uF 4.7uF 100uF
G9 M17 GND
MGTAVCC VCCO_14
GND H9 R17
MGTAVCC VCCO_14
U13
VCCO_14
VCC1V0 B1 B19 VCC3V3
MGTAVTT VCCO_16
C5 C14
MGTAVTT VCCO_16
E2 C18
C52 C53 C54 C55 C56 C57 MGTAVTT VCCO_16 C58 C59 C60 C61 C62 C63 C64 C65
GND G7 G13
B 100uF 4.7uF 4.7uF 470nF 470nF 470nF MGTAVTT VCCO_16 47nF 47nF 470nF 470nF 470nF 470nF 4.7uF 4.7uF B
GND GND
M8
VCCO_34
VCC1V0 G10 N7
VCCINT VCCO_34
H10 N8 VCC3V3
VCCINT VCCO_34
J10 R1
C67 C68 C69 C70 VCCINT VCCO_34
L10 V1
47nF 47nF 47nF 47nF VCCINT VCCO_34 C73 C74 C75 C76 C77 C78 C79 C80 C81 C82
GND M10 V6
VCCINT VCCO_34 47nF 47nF 47nF 470nF 470nF 470nF 470nF 4.7uF 4.7uF 100uF
N10 GND
VCCINT
H3
VCCO_35
VCC1V8 H13 J7
VCCAUX VCCO_35
J13 K1 VCC3V3
VCCAUX VCCO_35
K7
C83 C84 C85 C86 C87 C88 C89 C90 VCCO_35
M11 L7
47uF 4.7uF 4.7uF 470nF 470nF 470nF 47nF 47nF VCCBRAM VCCO_35 C91 C92 C93 C94 C95 C96 C97 C98 C99
GND N11 M7
VCCBRAM VCCO_35 47nF 47nF 47nF 470nF 470nF 470nF 470nF 4.7uF 4.7uF
GND
VCC1V0 XC7A35T-1CPG236C

C101 C102 C103 C104 C105

47uF 4.7uF 470nF 47nF 47nF
GND

C C

FB4
GND XADCGND GND
600Ohm/100MHz
W12
M13
H11
H12
H18

N12
N13

V18

C12
L11
L19

T19

W1
J11
J12

M9
H7
H8

K8

N9

U6
U9
L8
L9

P2
J8
J9

IC7H
GNDADC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

XC7A35T-1CPG236C
Title Rev

D
GND
ddd3 C.0
Copyright 2014 D
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

Circuit
FPGA POWER
Doc#
500-183
A1
A3
A5
A7
A9
A19
B3
B5
B7
B9
B14
C2
C3
C4
C6
C10
C19
D3
E3
E17
F1
F2
F19
G1
G8
G11

GND Engineer MTA

Author GMA
Date 5/21/2014
Sheet# 7 out of 8
1 2 3 4
 1 2 3 4

1x2
VEXT VEXT
1
C27 VU
2
10uF VBUS
J6 10V JP2
GND

A A
VU
INT3V3

No Load C106 C107 C108

21
22

19

15
16
C109
10uF 2.2uF 2.2uF
2.2uF
GND 10V 10V 10V

INTVCC
VIN1
VIN1

VIN2
VIN2
18 20 C110 VCC3V3
V2P5 BOOST1
100nF L1 NR5040T1R5N 1A
GND R162 5 23 35V VCC1V0 R164
RT SW1
1% 576K 24 C111 1.5uH 680
SW1
EN 3 27 GND R163
R165 RUN1 TRACK/SS1 C112 C113 C114 C115
INT3V3 1 1% 59K R166
PGOOD1 10nF 56pF 100uF 47uF 100nF
100K PGOOD1V0 25 10K LD20
VON1
26 28
ITH1 VFB1
LTC3633EUFD#PBF R167
C116

3
PGOOD1V8 1% 88.7K FDV301N
13pF
6 17 C117 GND PGOOD 1
RUN2 BOOST2
PGOOD 8 100nF L2 NR5040T2R2N 2A Q3
PGOOD2
13 35V VCC3V3
SW2

2
11 14 2.2uH GND
B ITH2 SW2 B
10 R168
TRACK/SS2 C118 C119 C120 C121
R169 R170 4 1% 60.4K
MODE/SYNC 56pF 100uF 47uF 100nF
1% 1% R171 12
VON2

SGND

PGND
9.31K 32.4K 0 2 PHMODE VFB2
9
R172
C122 C123 C124 C125 R173 C126
1% 13.3K
470pF 62pF 180pF 18pF 0 R174 C127 160pF
0 IC10
22nF

P
No Load GND

VU

C128
2.2uF
GND 10V
2

L3 NRS4018T3R3MDGJ 300mA
PGOOD1V0 3 1 VCC1V8
RUN SW
VIN

3.3uH
C GND 1%R175 7 R176 C129 C
MODE C130 C131 C132
10K 1% 5 1% 619K 22uF
FB 6.2pF 47uF 100nF
R177 6 No Load
C133 INTVCC
SGND

10K
GND

1uF
4 R178
PGOOD C134
1% 309K
6.2pF
IC11 LTC3621EMS8E#PBF VCC3V3
R179 1
P
8

GND W1
10K
PGOOD1V8 VCC1V8
1
W2
VCC1V0
1
W3
VCC3V3

R180 VU
1/4W Title Rev

ddd3
100
R181 VU
C.0
3

1% 10K POWER
D FDV301N 1 R182 SWITCH Copyright 2014 D
1% 4.7K SW16 Circuit
POWER
3

Q4 R183 FDV301N
R18610K
2

1% 10K 1 PGOOD1V8 EN Doc#

500-183
R184 1%
Q5 1% 10K Engineer MTA
C71
2

GND GND Author GMA

100nF
Date 5/21/2014
Sheet# 8 out of 8
1 2 3 4