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  • Z8H - ZGH - Z8HA - ZGHA CML-H +N18P-G61/G62/N19P-Q1 Block Diagram: Intel Comet Lake H

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    Ahmad
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    The document contains a block diagram of a laptop that includes an Intel Comet Lake H processor, NVIDIA graphics with 4GB of GDDR6 VRAM, up to 32GB of DDR4 memory, M.2 NVMe SSD storage, and various display and connectivity ports including HDMI, USB Type-C, and Thunderbolt. Key specifications are listed such as the processor being a 6-core + 2-core 45W chip and the laptop dimensions being 42x28x1.5mm. The diagram shows the connections between the various components in the laptop including the processor, PCH chipset, storage, memory, graphics card

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    Original Title

    Z8H-Vinafix

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    The document contains a block diagram of a laptop that includes an Intel Comet Lake H processor, NVIDIA graphics with 4GB of GDDR6 VRAM, up to 32GB of DDR4 memory, M.2 NVMe SSD storage, and various display and connectivity ports including HDMI, USB Type-C, and Thunderbolt. Key specifications are listed such as the processor being a 6-core + 2-core 45W chip and the laptop dimensions being 42x28x1.5mm. The diagram shows the connections between the various components in the laptop including the processor, PCH chipset, storage, memory, graphics card

    Copyright:

    © All Rights Reserved
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    216 views77 pages

    Z8H - ZGH - Z8HA - ZGHA CML-H +N18P-G61/G62/N19P-Q1 Block Diagram: Intel Comet Lake H

    Uploaded by

    Ahmad
    The document contains a block diagram of a laptop that includes an Intel Comet Lake H processor, NVIDIA graphics with 4GB of GDDR6 VRAM, up to 32GB of DDR4 memory, M.2 NVMe SSD storage, and various display and connectivity ports including HDMI, USB Type-C, and Thunderbolt. Key specifications are listed such as the processor being a 6-core + 2-core 45W chip and the laptop dimensions being 42x28x1.5mm. The diagram shows the connections between the various components in the laptop including the processor, PCH chipset, storage, memory, graphics card

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    of 77

    1 2 3 4 5 6 7 8

    Z8H_ZGH_Z8HA_ZGHA CML-H +N18P-G61/G62/N19P-Q1 Block Diagram 01


    2400MT/s PEG NVIDIA 1.2V
    VRAM GDDR6 * 4 pcs
    DDR4-Memory Down DDR4
    X16 Lanes N18P-G61/G62
    N19P-Q1 Max-Q 35W 256M x 32 P29~P32
    A

    P17
    Channel A INTEL Package 29 x 29mm SPI ROM(VBIOS)
    A

    IFPA IFPE IFPC P19~P28 P21

    2400MT/s
    Comet Lake H DDI3
    27MHz
    Processor : 6+2
    DDR4-Memory Down DDR4 Power : 45 (Watt)
    DDI2
    HDMI2.0 reTimer
    Channel B Package : BGA1440 eDP PS8409A HDMI2.0
    Size : 42 x 28 x 1.5 (mm) P37
    P18 P37
    DDI1
    P1~P8 DP MUX Min DP
    (2 in 1) reTimer P36
    DMI PS8461 P35

    14"/15.6"
    eDP Panel UHD P34

    U2-P9
    PCIE-P15 PCIE by 1 X2
    CIO_TX_RX (DP/USB3.1)
    B
    DP MUX B

    U2-P14
    CNVI
    CML PCH (2 in 1) reTimer
    PS8461 P38~P39
    JHL-xxxx USB type C PD CC1/CC2
    USB TypeC X1
    WLAN +BT I2C SBU1/SBU2
    AUX /LS/SPI
    P54 TBT(T.R) P44
    PCIE 4 Lanes TI
    TPS65987 for TR/MR
    Single port
    PCIE x 4
    PCIE-P9~12 / SATA-P1
    NGFF SSD #1
    PCIE1x4 LR + SATAx1
    SATA 6GB/s
    Package : FCBGA837 P43
    P53

    Size : 23 x 23 (mm) P40~P42 PD F/W


    U2-P6
    P41
    CCD
    P34
    G sensor Board
    PCIE-P13 LAN for 15" only
    U2-P7 G Sensor
    Finger print I219V
    P58 P47

    C C

    USB3.0 Port
    U3-P2/U2-P2
    U3 10G re-timer LED Board
    HID-I2C PS8817 P49
    Touch Pad LED
    P59

    PS2 USB3.0 Port


    LPC U3-P1/U2-P1 BC1.2
    KBC SLGC55544CVTR
    From Hall Sensor IT8987E/CX P48 P48
    P57

    SPI Card Reader


    CPU FAN ROM
    PCIE
    RTS5261
    GPU FAN P55
    P12
    IO Board Combo Jack
    dTPM
    P51 P50

    D POA-Like U2-P3 D

    P59 Audio CODEC


    HDA
    P9~P15 ALC295-CG
    P50 Speaker P50
    Quanta Computer Inc.
    PROJECT : Z8H_ZGH_Z8HA_ZGHA
    Size Document Number Rev
    1A
    BLOCK DIAGRAM
    Date: Tuesday, June 23, 2020 Sheet 1 of 77
    1 2 3 4 5 6 7 8
    5 4 3 2 1

    CATERR# +3V

    R587
    CFL-H Processor (CLK,MISC,JTAG)
    DCI DEBUG
    +VCCST +VCCSTG
    02
    *Debug@360_1%_6
    +3V

    R566 R562
    *0_5%_4 *Short_4

    2
    R586
    *Debug@4.7K_1%_2 LED1
    *Debug@White_19-113/T1D-CP2Q2HY/3T U21E

    H_TDO R564 51_1%_2


    B31 BN25
    [11] CLK_CPU_BCLKP TP78

    6 1
    A32 BCLKP CFG_0 BN27 H_TMS R565 *51_1%_2
    [11] CLK_CPU_BCLKN

    3
    D BCLKN CFG_1 BN26 CFG2 D
    D35 CFG_2 BN28 H_TDI R567 *51_1%_2
    [11] CPU_PCI_BCLKP PCI_BCLKP CFG_3 TP77
    CATERR# 5 2 C36 BR20 CFG4
    [11] CPU_PCI_BCLKN PCI_BCLKN CFG_4 BM20 H_PREQ#
    Q45A Q45B CFG5 R563 *56.2_1%_2
    E31 CFG_5 BT20 CFG6
    *Debug@PJX138K *Debug@PJX138K [11] CLK_DPLL_NSCCLKP CLK24P CFG_6
    D31 BP20
    [11] CLK_DPLL_NSCCLKN TP53
    4

    1
    CLK24N CFG_7 BR23 H_TCK R561 51_1%_2
    CFG_8 BR22
    CFG_9 BT23 H_TRST# R558 *51_1%_2
    CFG_10 BT22
    CFG_11 BM19
    CFG_12 BR19
    CFG_13 BP19
    VCCST PG LEVEL SHIFT (VCCST/VDDQ) H_CPU_SVIDALRT# BH31 CFG_14 BT19
    VR_SVID_CLK_R BH32 VIDALERT# CFG_15
    H_CPU_SVIDDAT BH29 VIDSCK BN23
    R569 100K_1%_2 H_PROCHOT#_CPU BR30 VIDSOUT CFG_17 BP23
    +3V_DEEP_SUS +VCCST PROCHOT# CFG_16 BP22

    [57] HWPG R578 *0_5%_4


    DDR_PG_CNTL BT13
    DDR_VTT_CNTL
    CFG_19
    CFG_18
    BN22 CPU STRAPPING
    EC8 10p/25V_2 VCCST_PWRGD
    R575 BR27 XDP_BPM0
    +3V_DEEP_SUS H_VCCST_PWRGD BPM#_0 XDP_BPM1 TP71
    R577 1K_1%_2 R574 60.4_1%_2 BT27
    BPM#_1 BM31 XDP_BPM2 TP79
    4.7K_1%_2 BPM#_2 TP70
    H13 BT30 XDP_BPM3
    H_VCCST_PWRGD VCCST_PWRGD BPM#_3 TP69
    C579 0.1u/6.3V_2 C561 220p/25V_2
    BT31
    [10] PROCPWRGD PROCPWRGD

    6
    BP35 BT28 H_TDO
    [11] CPU_PLTRST#R H_TDO [10]
    5

    U20 BM34 RESET# PROC_TDO BL32 H_TDI


    [11] PM_SYNC H_PM_DOWN_R PM_SYNC PROC_TDI H_TMS H_TDI [10]
    1 2 C581 R557 20_1%_2 BP31 BP28 H_TMS [10] INTERNAL PU; NC =1
    [11] H_PM_DOWN PM_DOWN PROC_TMS H_TCK
    4 5 Q42B 0.1u/6.3V_2 PECI BT34 BR28
    2 J31 PECI PROC_TCK H_TCK [10]
    [10,41,57,62,64] SUSB# Q42A PJX138K THERMTRIP#
    MC74VHC1G08DFT2G THERMTRIP# BP30 H_TRST#
    PJX138K H_TRST# [15]
    1
    R556 *Short_4 SKTOCC_N BR33 PROC_TRST# BL30 H_PREQ#
    [13] SKTOCC_N_R H_PREQ# [15] Stall reset sequence after PCU PLL
    3

    PROC_SEL# BN1 SKTOCC# PROC_PREQ# BP27


    PROC_SELECT# PROC_PRDY# H_PRDY# [15] lock until de-asserted
    R576 *0_5%_4 R585 49.9_1%_4 CATERR# BM30 CFG[0]
    +VCCIO +VCCST CATERR# CFG_RCOMP
    C BT25 R570 49.9_1%_4 C
    AT13 CFG_RCOMP
    AW13 ZVM# 1: NO STALL
    FOR OPC CPU MSM# 0: STALL
    PECI Connect PECI to PCH too while C10 support (UHD support C10?) AU13
    AY13 RSVD#AU13
    RSVD#AY13
    5 OF 13

    CPU_CFL-H_1440P PCI Express* Static x16 Lane


    PECI R554 13_1%_2 Numbering Reversal.
    PCH_PECI [11]
    CFG[2]
    1: Normal, no reversal
    R555 *Short_4 EC_PECI [57] 0: Reversal
    CFG2 R568 1K_1%_2

    SVID THERMTRIP VTT CONTROL LEVEL SHIFT Close to CPU eDP enable
    +1.2VSUS

    C232 0.1u/6.3V_2
    CFG[4]
    1: Disable
    Layout note: C233 *0.1u/6.3V_2
    +VCCST 0: Enablel
    1.Need routing together
    2.ALERT need between CLK and DATA. CFG4 R573 1K_1%_2
    +3V_DEEP_SUS +3V_DEEP_SUS
    3

    2 Q41
    [10,64] IMVP_PWRGD
    +VCCST
    DMG301NU-7
    R582 R581
    PCI Express* Bifurcation
    B B
    Close to CPU
    1

    10K_1%_2 10K_1%_2
    R543 *100K_1%_2

    R544 R537 00: 1x8, 2x4 10: 2x8


    R546 1K_1%_2 1K_1%_2 CFG[6:5]
    DDR_VTTT_PG_CTRL [63] 01: reservedl 11: 1x16

    3
    *54.9_1%_4
    2 Q44
    SVID CLK ME2N70028D2-G R580
    2

    3
    100K_1%_2 CFG6 R571 *1K_1%_2
    VR_SVID_CLK_R R550 *Short_4 DDR_PG_CNTL R583 10K_1%_2 2 Q43

    1
    VR_SVID_CLK [64]
    3 1 THERMTRIP# METR3904-G CFG5 R572 *1K_1%_2
    [57,61,67] SYS_SHDN#
    Q40

    1
    METR3904-G LOW WHILE C8

    [11,71] PM_THRMTRIP# R538 *Short_4 R584 PEG Training


    100K_1%_2
    +VCCST
    Close to CPU CFG[7]
    TO
    PCH/DDR/THERMAL SENSOR 1: Trainign after reset
    R542
    56.2_1%_2
    0: Wait BIOS
    SVID ALERT
    H_CPU_SVIDALRT# R547 220_5%_2 VR_SVID_ALERT# [64]

    INTEL RESERVE PROCHOT


    C556
    *0.1u/6.3V_2

    +VCCST +VCCST
    Close to CPU
    A +VCCSTG R560 1K_1%_2 A

    R553
    100_1%_2 R601 R559 499_1%_2 H_PROCHOT#_CPU
    [57,60,64] H_PROCHOT#
    *10K_1%_2

    SVID DATA PROC_SEL#


    H_CPU_SVIDDAT R549 *Short_4 VR_SVID_DATA [64]
    C565
    R600 0.1u/6.3V_2
    *0_5%_4 Quanta Computer Inc.
    EMI RESERVE
    EC7 *10p/25V_2 H_PROCHOT#_CPU PROJECT : ZGI
    Size Document Number Rev
    1A
    CML 1/7 (JTAG/MISC)
    Date: Tuesday, June 23, 2020 Sheet 2 of 77
    5 4 3 2 1
    5 4 3 2 1

    CFL Processor (DMI,PEG,FDI)


    03
    U21C
    E25 B25 C_PEG_TXP15 C560 0.22u/6.3V_2
    [19] PEG_RXP15 PEG_RXP_0 PEG_TXP_0 C_PEG_TXN15 PEG_TXP15 [19]
    D25 A25 C559 0.22u/6.3V_2
    [19] PEG_RXN15 PEG_RXN_0 PEG_TXN_0 PEG_TXN15 [19]
    E24 B24 C_PEG_TXP14 C562 0.22u/6.3V_2
    [19] PEG_RXP14 PEG_RXP_1 PEG_TXP_1 C_PEG_TXN14 PEG_TXP14 [19]
    [19] PEG_RXN14 F24 C24 C563 0.22u/6.3V_2 PEG_TXN14 [19]
    PEG_RXN_1 PEG_TXN_1
    E23 B23 C_PEG_TXP13 C566 0.22u/6.3V_2
    [19] PEG_RXP13 PEG_RXP_2 PEG_TXP_2 C_PEG_TXN13 PEG_TXP13 [19]
    [19] PEG_RXN13 D23 A23 C564 0.22u/6.3V_2 PEG_TXN13 [19]
    PEG_RXN_2 PEG_TXN_2
    E22 B22 C_PEG_TXP12 C567 0.22u/6.3V_2
    D [19] PEG_RXP12 PEG_RXP_3 PEG_TXP_3 C_PEG_TXN12 PEG_TXP12 [19] D
    F22 C22 C568 0.22u/6.3V_2
    [19] PEG_RXN12 PEG_RXN_3 PEG_TXN_3 PEG_TXN12 [19]
    E21 B21 C_PEG_TXP11 C570 0.22u/6.3V_2
    [19] PEG_RXP11 PEG_RXP_4 PEG_TXP_4 C_PEG_TXN11 PEG_TXP11 [19]
    D21 A21 C569 0.22u/6.3V_2
    [19] PEG_RXN11 PEG_RXN_4 PEG_TXN_4 PEG_TXN11 [19]
    E20 B20 C_PEG_TXP10 C571 0.22u/6.3V_2
    [19] PEG_RXP10 PEG_TXP10 [19]

    Vinafix.com
    F20 PEG_RXP_5 PEG_TXP_5 C20 C_PEG_TXN10 C572 0.22u/6.3V_2
    [19] PEG_RXN10 PEG_RXN_5 PEG_TXN_5 PEG_TXN10 [19]
    E19 B19 C_PEG_TXP9 C574 0.22u/6.3V_2
    [19] PEG_RXP9 PEG_TXP9 [19]
    LANE REVERSAL

    D19 PEG_RXP_6 PEG_TXP_6 A19 C_PEG_TXN9 C573 0.22u/6.3V_2


    [19] PEG_RXN9 PEG_RXN_6 PEG_TXN_6 PEG_TXN9 [19]
    E18 B18 C_PEG_TXP8 C575 0.22u/6.3V_2
    [19] PEG_RXP8 PEG_RXP_7 PEG_TXP_7 C_PEG_TXN8 PEG_TXP8 [19]
    [19] PEG_RXN8 F18 C18 C576 0.22u/6.3V_2 PEG_TXN8 [19]
    PEG_RXN_7 PEG_TXN_7
    D17 A17 C_PEG_TXP7 C577 0.22u/6.3V_2
    [19] PEG_RXP7 PEG_RXP_8 PEG_TXP_8 C_PEG_TXN7 PEG_TXP7 [19]
    E17 B17 C578 0.22u/6.3V_2
    [19] PEG_RXN7 PEG_RXN_8 PEG_TXN_8 PEG_TXN7 [19]
    F16 C16 C_PEG_TXP6 C582 0.22u/6.3V_2
    [19] PEG_RXP6 PEG_RXP_9 PEG_TXP_9 C_PEG_TXN6 PEG_TXP6 [19]
    E16 B16 C580 0.22u/6.3V_2
    [19] PEG_RXN6 PEG_RXN_9 PEG_TXN_9 PEG_TXN6 [19]
    D15 A15 C_PEG_TXP5 C583 0.22u/6.3V_2
    [19] PEG_RXP5 PEG_RXP_10 PEG_TXP_10 C_PEG_TXN5 PEG_TXP5 [19]
    E15 B15 C585 0.22u/6.3V_2
    [19] PEG_RXN5 PEG_RXN_10 PEG_TXN_10 PEG_TXN5 [19]
    F14 C14 C_PEG_TXP4 C587 0.22u/6.3V_2
    [19] PEG_RXP4 PEG_RXP_11 PEG_TXP_11 C_PEG_TXN4 PEG_TXP4 [19]
    [19] PEG_RXN4 E14 B14 C586 0.22u/6.3V_2 PEG_TXN4 [19]
    PEG_RXN_11 PEG_TXN_11
    D13 A13 C_PEG_TXP3 C588 0.22u/6.3V_2
    [19] PEG_RXP3 PEG_RXP_12 PEG_TXP_12 C_PEG_TXN3 PEG_TXP3 [19]
    [19] PEG_RXN3 E13 B13 C590 0.22u/6.3V_2 PEG_TXN3 [19]
    PEG_RXN_12 PEG_TXN_12
    F12 C12 C_PEG_TXP2 C592 0.22u/6.3V_2
    [19] PEG_RXP2 PEG_RXP_13 PEG_TXP_13 C_PEG_TXN2 PEG_TXP2 [19]
    E12 B12 C591 0.22u/6.3V_2
    [19] PEG_RXN2 PEG_RXN_13 PEG_TXN_13 PEG_TXN2 [19]
    D11 A11 C_PEG_TXP1 C593 0.22u/6.3V_2
    [19] PEG_RXP1 PEG_RXP_14 PEG_TXP_14 C_PEG_TXN1 PEG_TXP1 [19]
    E11 B11 C594 0.22u/6.3V_2
    [19] PEG_RXN1 PEG_RXN_14 PEG_TXN_14 PEG_TXN1 [19]
    F10 C10 C_PEG_TXP0 C596 0.22u/6.3V_2
    [19] PEG_RXP0 PEG_RXP_15 PEG_TXP_15 C_PEG_TXN0 PEG_TXP0 [19]
    E10 B10 C595 0.22u/6.3V_2
    [19] PEG_RXN0 PEG_RXN_15 PEG_TXN_15 PEG_TXN0 [19]
    C C

    R608 24.9_1%_2 PEG_COMP G2


    +VCCIO PEG_RCOMP

    D8 B8
    [9] DMI_RXP0 DMI_RXP_0 DMI_TXP_0 DMI_TXP0 [9]
    E8 A8
    [9] DMI_RXN0 DMI_RXN_0 DMI_TXN_0 DMI_TXN0 [9]
    E6 C6
    [9] DMI_RXP1 F6 DMI_RXP_1 DMI_TXP_1 B6 DMI_TXP1 [9]
    [9] DMI_RXN1 DMI_RXN_1 DMI_TXN_1 DMI_TXN1 [9]
    DMI RX [9] DMI_RXP2
    D5
    E5 DMI_RXP_2 DMI_TXP_2
    B5
    A5 DMI_TXP2 [9]
    DMI TX
    [9] DMI_RXN2 DMI_RXN_2 DMI_TXN_2 DMI_TXN2 [9]
    J8 D4
    [9] DMI_RXP3 DMI_RXP_3 DMI_TXP_3 DMI_TXP3 [9]
    J9 B4
    [9] DMI_RXN3 DMI_RXN_3 3 OF 13 DMI_TXN_3 DMI_TXN3 [9]

    CPU_CFL-H_1440P

    PEG RCOMP [PEG/DMI]


    Trace length < 400 MILS
    Trace width = 12 MILS
    Trace spacing = 15 MILS
    U21D

    DDI1_TXP0 K36 D29 INT_EDP_TXP0 C549 0.1u/6.3V_2


    [38] DDI1_TXP0 DDI1_TXN0 DDI1_TXP_0 EDP_TXP_0 INT_EDP_TXN0 EDP_TXP0_C [34]
    K37 E29 C548 0.1u/6.3V_2
    [38] DDI1_TXN0 DDI1_TXP1 DDI1_TXN_0 EDP_TXN_0 INT_EDP_TXP1 EDP_TXN0_C [34]
    J35 F28 C550 0.1u/6.3V_2
    [38] DDI1_TXP1 DDI1_TXN1 DDI1_TXP_1 EDP_TXP_1 INT_EDP_TXN1 EDP_TXP1_C [34]
    J34 E28 C551 0.1u/6.3V_2
    For Taiten [38] DDI1_TXN1 DDI1_TXP2 H37 DDI1_TXN_1 EDP_TXN_1 A29 INT_EDP_TXP2 C552 0.1u/6.3V_2
    EDP_TXN1_C [34]

    B
    Ridge to MUX
    [38]
    [38]
    DDI1_TXP2
    DDI1_TXN2
    DDI1_TXN2
    DDI1_TXP3
    H36
    J37
    DDI1_TXP_2
    DDI1_TXN_2
    EDP_TXP_2
    EDP_TXN_2
    B29
    C28
    INT_EDP_TXN2
    INT_EDP_TXP3
    C553
    C554
    0.1u/6.3V_2
    0.1u/6.3V_2
    EDP_TXP2_C
    EDP_TXN2_C
    [34]
    [34] For B
    [38]
    [38]
    DDI1_TXP3
    DDI1_TXN3
    DDI1_TXN3 J38 DDI1_TXP_3
    DDI1_TXN_3
    EDP_TXP_3
    EDP_TXN_3
    B28 INT_EDP_TXN3 C555 0.1u/6.3V_2
    R530 *100K_1%_2
    EDP_TXP3_C
    EDP_TXN3_C
    [34]
    [34]
    eDP
    DDI1_AUXP D27 C26 INT_EDP_AUXP C546 0.1u/6.3V_2
    [38] DDI1_AUXP DDI1_AUXN DDI1_AUXP EDP_AUXP INT_EDP_AUXN EDP_AUX_C [34]
    E27 B26 C547 0.1u/6.3V_2
    [38] DDI1_AUXN DDI1_AUXN EDP_AUXN EDP_AUX#_C [34]
    DDI2_TXP0 H34
    +3V
    [35] DDI2_TXP0 R531 *100K_1%_2
    DDI2_TXN0 H33 DDI2_TXP_0
    [35] DDI2_TXN0 DDI2_TXP1 DDI2_TXN_0 EDP_DISP_UTIL
    F37 A33
    [35] DDI2_TXP1 DDI2_TXN1 DDI2_TXP_1 EDP_DISP_UTIL TP68
    [35] DDI2_TXN1 G38
    DDI2_TXP2 F34 DDI2_TXN_1
    For Min DP [35]
    [35]
    DDI2_TXP2
    DDI2_TXN2
    DDI2_TXN2
    DDI2_TXP3
    F35
    E37
    DDI2_TXP_2
    DDI2_TXN_2 DISP_RCOMP
    D37 EDP_RCOMP R535 24.9_1%_2 +VCCIO
    [35] DDI2_TXP3 DDI2_TXP_3
    DDI2_TXN3 E36
    [35] DDI2_TXN3 DDI2_TXN_3
    DDI2_AUXP F26
    eDP_RCOMP (DISP_RCOMP)
    [35] DDI2_AUXP DDI2_AUXN E26 DDI2_AUXP Trace length < 100 Mils
    [35] DDI2_AUXN DDI2_AUXN Trace Width 5 Mils Trace Spacing 25 Mils
    DDI3_TXP0 C34
    [37] DDI3_TXP0 DDI3_TXN0 DDI3_TXP_0
    D34
    [37] DDI3_TXN0 DDI3_TXP1 DDI3_TXN_0
    B36
    [37] DDI3_TXP1 DDI3_TXN1 DDI3_TXP_1
    B34
    For [37]
    [37]
    DDI3_TXN1
    DDI3_TXP2
    DDI3_TXP2
    DDI3_TXN2
    F33
    E33
    DDI3_TXN_1
    DDI3_TXP_2
    HDMI [37]
    [37]
    DDI3_TXN2
    DDI3_TXP3
    DDI3_TXP3
    DDI3_TXN3
    C33
    B33
    DDI3_TXN_2
    DDI3_TXP_3
    [37] DDI3_TXN3 DDI3_TXN_3 AUD_AZACPU_SCLK
    G27
    A27 PROC_AUDIO_CLK G25 AUD_AZACPU_SDO_R AUD_AZACPU_SCLK [10]
    DDI3_AUXP PROC_AUDIO_SDI AUD_AZACPU_SDI_R AUD_AZACPU_SDO_R [10]
    B27 G29 R548 20_1%_2
    DDI3_AUXN PROC_AUDIO_SDO AUD_AZACPU_SDI [10]
    4 of 13

    CPU_CFL-H_1440P

    A A
    AUD_AZACPU_SCLK
    AUD_AZACPU_SDO_R

    R102 R103
    *2K_1%_2 *2K_1%_2

    Quanta Computer Inc.


    DISABLE INTEL AUDIO (FOR HDMI/DP)
    PROJECT : ZGI
    Size Document Number Rev
    1A
    CML 2/7 (DMI/EDP/PEG)
    Date: Tuesday, June 23, 2020 Sheet 3 of 77
    5 4 3 2 1
    5 4 3 2 1

    04
    CFL Processor (DDR4) / IL

    D [17] M_A_DQ[15:0] [18] M_B_DQ[15:0] D


    [17] M_A_DQ[31:16] [18] M_B_DQ[31:16]
    [17] M_A_DQ[47:32] [18] M_B_DQ[47:32]
    [17] M_A_DQ[63:48] [18] M_B_DQ[48:63]

    U21B
    U21A
    IL(DDR4) / NIL(DDR4/DDR3) LPDDR3 / DDR4
    IL(DDR4) / NIL(DDR4/DDR3) LPDDR3 / DDR4 M_A_DQ16 BT11 AM9
    M_A_DQ0 M_A_DQ17 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKP_0/DDR1_CKP_0 M_B_DIM0_CLKP0 [18]
    BR6 AG1 M_A_DIM0_CLKP0 [17] BR11 AN9 M_B_DIM0_CLKN0 [18]
    M_A_DQ1 BT6 DDR0_DQ_0/DDR0_DQ_0 DDR0_CKP_0/DDR0_CKP_0 AG2 M_A_DQ18 BT9 DDR1_DQ_1/DDR0_DQ_17 DDR1_CKN_0/DDR1_CKN_0 AM7
    M_A_DQ2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0/DDR0_CKN_0 M_A_DIM0_CLKN0 [17] M_A_DQ19 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKP_1/DDR1_CKP_1
    BP3 AK2 BR8 AM8
    M_A_DQ3 BR3 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_1/DDR0_CKP_1 AK1 M_A_DQ20 BP11 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKN_1/DDR1_CKN_1 AM11
    M_A_DQ4 BN5 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1/DDR0_CKN_1 AL3 M_A_DQ21 BN11 DDR1_DQ_4/DDR0_DQ_20 NC/DDR1_CKP_2 AM10
    M_A_DQ5 BP6 DDR0_DQ_4/DDR0_DQ_4 NC/DDR0_CKP_2 AK3 M_A_DQ22 BP8 DDR1_DQ_5/DDR0_DQ_21 NC/DDR1_CKN_2 AJ10
    M_A_DQ6 BP2 DDR0_DQ_5/DDR0_DQ_5 NC/DDR0_CKN_2 AL2 M_A_DQ23 BN8 DDR1_DQ_6/DDR0_DQ_22 NC/DDR1_CKP_3 AJ11
    M_A_DQ7 BN3 DDR0_DQ_6/DDR0_DQ_6 NC/DDR0_CKP_3 AL1 M_A_DQ24 BL12 DDR1_DQ_7/DDR0_DQ_23 NC/DDR1_CKN_3
    M_A_DQ8 BL4 DDR0_DQ_7/DDR0_DQ_7 NC/DDR0_CKN_3 M_A_DQ25 BL11 DDR1_DQ_8/DDR0_DQ_24 AT8
    M_A_DQ9 DDR0_DQ_8/DDR0_DQ_8 M_A_DQ26 DDR1_DQ_9/DDR0_DQ_25 DDR1_CKE_0/DDR1_CKE_0 M_B_CKE0 [18]
    BL5 AT1 BL8 AT10
    M_A_DQ10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_0/DDR0_CKE_0 M_A_CKE0 [17] M_A_DQ27 DDR1_DQ_10/DDR0_DQ_26 DDR1_CKE_1/DDR1_CKE_1
    BL2 AT2 BJ8 AT7
    M_A_DQ11 BM1 DDR0_DQ_10/DDR0_DQ_10 DDR0_CKE_1/DDR0_CKE_1 AT3 M_A_DQ28 BJ11 DDR1_DQ_11/DDR0_DQ_27 DDR1_CKE_2/DDR1_CKE_2 AT11
    M_A_DQ12 BK4 DDR0_DQ_11/DDR0_DQ_11 DDR0_CKE_2/DDR0_CKE_2 AT5 M_A_DQ29 BJ10 DDR1_DQ_12/DDR0_DQ_28 DDR1_CKE_3/DDR1_CKE_3
    M_A_DQ13 BK5 DDR0_DQ_12/DDR0_DQ_12 DDR0_CKE_3/DDR0_CKE_3 M_A_DQ30 BL7 DDR1_DQ_13/DDR0_DQ_29 AF11
    M_A_DQ14 DDR0_DQ_13/DDR0_DQ_13 M_A_DQ31 DDR1_DQ_14/DDR0_DQ_30 DDR1_CS#_0/DDR1_CS#_0 M_B_CS#0 [18]
    BK1 AD5 BJ7 AE7
    M_A_DQ15 DDR0_DQ_14/DDR0_DQ_14 DDR0_CS#_0/DDR0_CS#_0 M_A_CS#0 [17] M_A_DQ48 DDR1_DQ_15/DDR0_DQ_31 DDR1_CS#_1/DDR1_CS#_1
    BK2 AE2 BG11 AF10
    M_A_DQ32 BG4 DDR0_DQ_15/DDR0_DQ_15 DDR0_CS#_1/DDR0_CS#_1 AD2 M_A_DQ49 BG10 DDR1_DQ_16/DDR0_DQ_48 NC/DDR1_CS#_2 AE10
    M_A_DQ33 BG5 DDR0_DQ_16/DDR0_DQ_32 NC/DDR0_CS#_2 AE5 M_A_DQ50 BG8 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_CS#_3
    M_A_DQ34 BF4 DDR0_DQ_17/DDR0_DQ_33 NC/DDR0_CS#_3 M_A_DQ51 BF8 DDR1_DQ_18/DDR0_DQ_50 AF7
    M_A_DQ35 DDR0_DQ_18/DDR0_DQ_34 M_A_DQ52 DDR1_DQ_19/DDR0_DQ_51 DDR1_ODT_0/DDR1_ODT_0 M_B_ODT0 [18]
    BF5 AD3 BF11 AE8
    M_A_DQ36 DDR0_DQ_19/DDR0_DQ_35 DDR0_ODT_0/DDR0_ODT_0 M_A_ODT0 [17] M_A_DQ53 DDR1_DQ_20/DDR0_DQ_52 NC/DDR1_ODT_1
    BG2 AE4 BF10 AE9
    M_A_DQ37 BG1 DDR0_DQ_20/DDR0_DQ_36 NC/DDR0_ODT_1 AE1 M_A_DQ54 BG7 DDR1_DQ_21/DDR0_DQ_53 NC/DDR1_ODT_2 AE11
    M_A_DQ38 BF1 DDR0_DQ_21/DDR0_DQ_37 NC/DDR0_ODT_2 AD4 M_A_DQ55 BF7 DDR1_DQ_22/DDR0_DQ_54 NC/DDR1_ODT_3
    M_A_DQ39 BF2 DDR0_DQ_22/DDR0_DQ_38 NC/DDR0_ODT_3 M_A_DQ56 BB11 DDR1_DQ_23/DDR0_DQ_55 AH10 M_B_A16
    M_A_DQ40 DDR0_DQ_23/DDR0_DQ_39 M_A_DQ57 DDR1_DQ_24/DDR0_DQ_56 DDR1_CAB_3/DDR1_MA_16 M_B_A16 [18]
    BD2 AH5 BC11 AH11 M_B_A14
    M_A_DQ41 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAB_4/DDR0_BA_0 M_A_BS#0 [17] M_A_DQ58 DDR1_DQ_25/DDR0_DQ_57 DDR1_CAB_2/DDR1_MA_14 M_B_A14 [18]
    C BD1 AH1 M_A_BS#1 [17] BB8 AF8 M_B_A15 M_B_A15 [18] C
    M_A_DQ42 BC4 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAB_6/DDR0_BA_1 AU1 M_A_DQ59 BC8 DDR1_DQ_26/DDR0_DQ_58 DDR1_CAB_1/DDR1_MA_15
    M_A_DQ43 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAA_5/DDR0_BG_0 M_A_BG#0 [17] M_A_DQ60 DDR1_DQ_27/DDR0_DQ_59
    BC5 M_A_A[16:0] [17] BC10 AH8 M_B_BS#0 [18]
    M_A_DQ44 BD5 DDR0_DQ_27/DDR0_DQ_43 AH4 M_A_A16 M_A_DQ61 BB10 DDR1_DQ_28/DDR0_DQ_60 DDR1_CAB_4/DDR1_BA_0 AH9
    M_A_DQ45 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAB_3/DDR0_MA_16 DDR1_DQ_29/DDR0_DQ_61 DDR1_CAB_6/DDR1_BA_1 M_B_BS#1 [18]
    BD4 AG4 M_A_A14 M_A_DQ62 BC7 AR9
    M_A_DQ46 DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_2/DDR0_MA_14 DDR1_DQ_30/DDR0_DQ_62 DDR1_CAA_5/DDR1_BG_0 M_B_BG#0 [18]
    BC1 AD1 M_A_A15 M_A_DQ63 BB7 M_B_A[13:0] [18]
    M_A_DQ47 BC2 DDR0_DQ_30/DDR0_DQ_46 DDR0_CAB_1/DDR0_MA_15 M_B_DQ16 AA11 DDR1_DQ_31/DDR0_DQ_63 AJ9 M_B_A0
    M_B_DQ0 AB1 DDR0_DQ_31/DDR0_DQ_47 AH3 M_A_A0 M_B_DQ17 AA10 DDR1_DQ_32/DDR1_DQ_16 DDR1_CAB_9/DDR1_MA_0 AK6 M_B_A1
    M_B_DQ1 AB2 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_9/DDR0_MA_0 AP4 M_A_A1 M_B_DQ18 AC11 DDR1_DQ_33/DDR1_DQ_17 DDR1_CAB_8/DDR1_MA_1 AK5 M_B_A2
    M_B_DQ2 AA4 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_8/DDR0_MA_1 AN4 M_A_A2 M_B_DQ19 AC10 DDR1_DQ_34/DDR1_DQ_18 DDR1_CAB_5/DDR1_MA_2 AL5 M_B_A3
    M_B_DQ3 AA5 DDR0_DQ_34/DDR1_DQ_2 DDR0_CAB_5/DDR0_MA_2 AP5 M_A_A3 M_B_DQ20 AA7 DDR1_DQ_35/DDR1_DQ_19 NC/DDR1_MA_3 AL6 M_B_A4
    M_B_DQ4 AB5 DDR0_DQ_35/DDR1_DQ_3 NC/DDR0_MA_3 AP2 M_A_A4 M_B_DQ21 AA8 DDR1_DQ_36/DDR1_DQ_20 NC/DDR1_MA_4 AM6 M_B_A5
    M_B_DQ5 AB4 DDR0_DQ_36/DDR1_DQ_4 NC/DDR0_MA_4 AP1 M_A_A5 M_B_DQ22 AC8 DDR1_DQ_37/DDR1_DQ_21 DDR1_CAA_0/DDR1_MA_5 AN7 M_B_A6
    M_B_DQ6 AA2 DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_0/DDR0_MA_5 AP3 M_A_A6 M_B_DQ23 AC7 DDR1_DQ_38/DDR1_DQ_22 DDR1_CAA_2/DDR1_MA_6 AN10 M_B_A7
    M_B_DQ7 AA1 DDR0_DQ_38/DDR1_DQ_6 DDR0_CAA_2/DDR0_MA_6 AN1 M_A_A7 DDR1_DQ_39/DDR1_DQ_23 DDR1_CAA_4/DDR1_MA_7
    M_B_DQ8 V5 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_4/DDR0_MA_7 AN3 M_A_A8 M_B_DQ24 W8 AN8 M_B_A8
    M_B_DQ9 V2 DDR0_DQ_40/DDR1_DQ_8 DDR0_CAA_3/DDR0_MA_8 AT4 M_A_A9 M_B_DQ25 W7 DDR1_DQ_40/DDR1_DQ_24 DDR1_CAA_3/DDR1_MA_8 AR11 M_B_A9
    M_B_DQ10 U1 DDR0_DQ_41/DDR1_DQ_9 DDR0_CAA_1/DDR0_MA_9 AH2 M_A_A10 M_B_DQ26 V10 DDR1_DQ_41/DDR1_DQ_25 DDR1_CAA_1/DDR1_MA_9 AH7 M_B_A10
    M_B_DQ11 U2 DDR0_DQ_42/DDR1_DQ_10 DDR0_CAB_7/DDR0_MA_10 AN2 M_A_A11 M_B_DQ27 V11 DDR1_DQ_42/DDR1_DQ_26 DDR1_CAB_7/DDR1_MA_10 AN11 M_B_A11
    M_B_DQ12 V1 DDR0_DQ_43/DDR1_DQ_11 DDR0_CAA_7/DDR0_MA_11 AU4 M_A_A12 M_B_DQ28 W11 DDR1_DQ_43/DDR1_DQ_27 DDR1_CAA_7/DDR1_MA_11 AR10 M_B_A12
    M_B_DQ13 V4 DDR0_DQ_44/DDR1_DQ_12 DDR0_CAA_6/DDR0_MA_12 AE3 M_A_A13 M_B_DQ29 W10 DDR1_DQ_44/DDR1_DQ_28 DDR1_CAA_6/DDR1_MA_12 AF9 M_B_A13
    M_B_DQ14 U5 DDR0_DQ_45/DDR1_DQ_13 DDR0_CAB_0/DDR0_MA_13 AU2 M_B_DQ30 V7 DDR1_DQ_45/DDR1_DQ_29 DDR1_CAB_0/DDR1_MA_13 AR7
    M_B_DQ15 DDR0_DQ_46/DDR1_DQ_14 DDR0_CAA_9/DDR0_BG_1 M_A_BG#1 [17] M_B_DQ31 DDR1_DQ_46/DDR1_DQ_30 DDR1_CAA_9/DDR1_BG_1 M_B_BG#1 [18]
    U4 AU3 DDRA_ACT# [17] V8 AT9 DDRB_ACT# [18]
    M_B_DQ32 R2 DDR0_DQ_47/DDR1_DQ_15 DDR0_CAA_8/DDR0_ACT# M_B_DQ48 R11 DDR1_DQ_47/DDR1_DQ_31 DDR1_CAA_8/DDR1_ACT#
    M_B_DQ33 P5 DDR0_DQ_48/DDR1_DQ_32 AG3 M_B_DQ49 P11 DDR1_DQ_48/DDR1_DQ_48 AJ7
    M_B_DQ34 DDR0_DQ_49/DDR1_DQ_33 NC/DDR0_PAR DDR0_PAR [17] M_B_DQ50 DDR1_DQ_49/DDR1_DQ_49 NC/DDR1_PAR DDR1_PAR [18]
    R4 AU5 DDR0_ALERT# [17] P7 AR8 DDR1_ALERT# [18]
    M_B_DQ35 P4 DDR0_DQ_50/DDR1_DQ_34 NC/DDR0_ALERT# M_B_DQ51 R8 DDR1_DQ_50/DDR1_DQ_50 NC/DDR1_ALERT#
    M_B_DQ36 R5 DDR0_DQ_51/DDR1_DQ_35 IL(DDR4) / NIL(DDR4/DDR3) M_B_DQ52 R10 DDR1_DQ_51/DDR1_DQ_51 IL(DDR4) / NIL(DDR4/DDR3)
    M_B_DQ37 P2 DDR0_DQ_52/DDR1_DQ_36 BR5 M_A_DQSN0 M_B_DQ53 P10 DDR1_DQ_52/DDR1_DQ_52 BN9 M_A_DQSN2
    M_B_DQ38 DDR0_DQ_53/DDR1_DQ_37 DDR0_DQSN_0/DDR0_DQSN_0 M_A_DQSN1 M_A_DQSN0 [17] M_B_DQ54 DDR1_DQ_53/DDR1_DQ_53 DDR1_DQSN_0/DDR0_DQSN_2 M_A_DQSN3 M_A_DQSN2 [17]
    R1 BL3 R7 BL9
    M_B_DQ39 DDR0_DQ_54/DDR1_DQ_38 DDR0_DQSN_1/DDR0_DQSN_1 M_A_DQSN4 M_A_DQSN1 [17] M_B_DQ55 DDR1_DQ_54/DDR1_DQ_54 DDR1_DQSN_1/DDR0_DQSN_3 M_A_DQSN6 M_A_DQSN3 [17]
    P1 BG3 M_A_DQSN4 [17] P8 BG9 M_A_DQSN6 [17]
    M_B_DQ40 M4 DDR0_DQ_55/DDR1_DQ_39 DDR0_DQSN_2/DDR0_DQSN_4 BD3 M_A_DQSN5 M_B_DQ56 L11 DDR1_DQ_55/DDR1_DQ_55 DDR1_DQSN_2/DDR0_DQSN_6 BC9 M_A_DQSN7
    M_B_DQ41 DDR0_DQ_56/DDR1_DQ_40 DDR0_DQSN_3/DDR0_DQSN_5 M_B_DQSN0 M_A_DQSN5 [17] M_B_DQ57 DDR1_DQ_56/DDR1_DQ_56 DDR1_DQSN_3/DDR0_DQSN_7 M_B_DQSN2 M_A_DQSN7 [17]
    M1 AA3 M_B_DQSN0 [18] M11 AC9 M_B_DQSN2 [18]
    M_B_DQ42 L4 DDR0_DQ_57/DDR1_DQ_41 DDR0_DQSN_4/DDR1_DQSN_0 U3 M_B_DQSN1 M_B_DQ58 L7 DDR1_DQ_57/DDR1_DQ_57 DDR1_DQSN_4/DDR1_DQSN_2 W9 M_B_DQSN3
    M_B_DQ43 DDR0_DQ_58/DDR1_DQ_42 DDR0_DQSN_5/DDR1_DQSN_1 M_B_DQSN4 M_B_DQSN1 [18] M_B_DQ59 DDR1_DQ_58/DDR1_DQ_58 DDR1_DQSN_5/DDR1_DQSN_3 M_B_DQSN6 M_B_DQSN3 [18]
    L2 P3 M8 R9
    M_B_DQ44 DDR0_DQ_59/DDR1_DQ_43 DDR0_DQSN_6/DDR1_DQSN_4 M_B_DQSN5 M_B_DQSN4 [18] M_B_DQ60 DDR1_DQ_59/DDR1_DQ_59 DDR1_DQSN_6/DDR1_DQSN_6 M_B_DQSN7 M_B_DQSN6 [18]
    M5 L3 M_B_DQSN5 [18] L10 M9 M_B_DQSN7 [18]
    M_B_DQ45 M2 DDR0_DQ_60/DDR1_DQ_44 DDR0_DQSN_7/DDR1_DQSN_5 M_B_DQ61 M10 DDR1_DQ_60/DDR1_DQ_60 DDR1_DQSN_7/DDR1_DQSN_7
    M_B_DQ46 L5 DDR0_DQ_61/DDR1_DQ_45 BP5 M_A_DQSP0 M_B_DQ62 M7 DDR1_DQ_61/DDR1_DQ_61 BP9 M_A_DQSP2
    B M_B_DQ47 DDR0_DQ_62/DDR1_DQ_46 DDR0_DQSP_0/DDR0_DQSP_0 M_A_DQSP1 M_A_DQSP0 [17] M_B_DQ63 DDR1_DQ_62/DDR1_DQ_62 DDR1_DQSP_0/DDR0_DQSP_2 M_A_DQSP3 M_A_DQSP2 [17] B
    L1 BK3 L8 BJ9
    DDR0_DQ_63/DDR1_DQ_47 DDR0_DQSP_1/DDR0_DQSP_1 M_A_DQSP4 M_A_DQSP1 [17] DDR1_DQ_63/DDR1_DQ_63 DDR1_DQSP_1/DDR0_DQSP_3 M_A_DQSP6 M_A_DQSP3 [17]
    BF3 BF9
    DDR0_DQSP_2/DDR0_DQSP_4 M_A_DQSP5 M_A_DQSP4 [17] DDR1_DQSP_2/DDR0_DQSP_6 M_A_DQSP7 M_A_DQSP6 [17]
    BA2 BC3 M_A_DQSP5 [17] AW11 BB9 M_A_DQSP7 [17]
    BA1 NC/DDR0_ECC_0 DDR0_DQSP_3/DDR0_DQSP_5 AB3 M_B_DQSP0 AY11 NC/DDR1_ECC_0 DDR1_DQSP_3/DDR0_DQSP_7 AA9 M_B_DQSP2
    NC/DDR0_ECC_1 DDR0_DQSP_4/DDR1_DQSP_0 M_B_DQSP1 M_B_DQSP0 [18] NC/DDR1_ECC_1 DDR1_DQSP_4/DDR1_DQSP_2 M_B_DQSP3 M_B_DQSP2 [18]
    AY4 V3 AY8 V9
    ECC DATA

    ECC DATA
    NC/DDR0_ECC_2 DDR0_DQSP_5/DDR1_DQSP_1 M_B_DQSP4 M_B_DQSP1 [18] NC/DDR1_ECC_2 DDR1_DQSP_5/DDR1_DQSP_3 M_B_DQSP6 M_B_DQSP3 [18]
    AY5 R3 AW8 P9
    ECC STROBE

    ECC STROBE
    NC/DDR0_ECC_3 DDR0_DQSP_6/DDR1_DQSP_4 M_B_DQSP5 M_B_DQSP4 [18] NC/DDR1_ECC_3 DDR1_DQSP_6/DDR1_DQSP_6 M_B_DQSP7 M_B_DQSP6 [18]
    BA5 M3 AY10 L9
    NC/DDR0_ECC_4 DDR0_DQSP_7/DDR1_DQSP_5 M_B_DQSP5 [18] NC/DDR1_ECC_4 DDR1_DQSP_7/DDR1_DQSP_7 M_B_DQSP7 [18]
    BA4 AW10
    AY1 NC/DDR0_ECC_5 AY3 AY7 NC/DDR1_ECC_5 AW9
    AY2 NC/DDR0_ECC_6 DDR0_DQSP_8/DDR0_DQSP_8 BA3 AW7 NC/DDR1_ECC_6 DDR1_DQSP_8/DDR1_DQSP_8 AY9
    1 OF 13
    NC/DDR0_ECC_7 DDR0_DQSN_8/DDR0_DQSN_8 NC/DDR1_ECC_7 DDR1_DQSN_8/DDR1_DQSN_8
    DDR CHANNEL A
    CPU_CFL-H_1440P

    R605 121_1%_2 SM_RCOMP_0 G1 BN13 SMDDR_VREF_CA


    SM_RCOMP_1 DDR_RCOMP_0 DDR_VREF_CA SMDDR_VREF_CA [17]
    R611 75_1%_2 H1 BP13 SMDDR_VREF_DQ0_M3
    SM_RCOMP_2 DDR_RCOMP_1 DDR0_VREF_DQ TP76
    R614 100_1%_2 J2 2 OF 13 BR13 SMDDR_VREF_DQ1_M3 SMDDR_VREF_DQ1_M3 [18]
    DDR_RCOMP_2 DDR1_VREF_DQ
    DDR CHANNEL B
    CPU_CFL-H_1440P

    A
    Vinafix.com A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    CML 3/7 (DDR4 I/F)
    Date: Tuesday, June 23, 2020 Sheet 4 of 77
    5 4 3 2 1
    5 4 3 2 1

    +VCC_GT +VCC_GT
    CFL Processor (POWER)
    05
    U21K
    AT14 BD35
    AT31 VCCGT1 VCCGT80 BD36
    AT32 VCCGT2 VCCGT81 BE31
    45W(GT2): +VCCGT=32A AT33 VCCGT3
    VCCGT4
    VCCGT82
    VCCGT83
    BE32
    AT34 BE33
    AT35 VCCGT5 VCCGT84 BE34
    AT36 VCCGT6 VCCGT85 BE35
    Close to CPU AT37 VCCGT7 VCCGT86 BE36
    AT38 VCCGT8 VCCGT87 BE37
    D AU14 VCCGT9 VCCGT88 BE38 D
    AU29 VCCGT10 VCCGT89 BF13
    C173 C144 C212 C214 C213 C215 C197 C584 C70 C77 AU30 VCCGT11 VCCGT90 BF14
    AU31 VCCGT12 VCCGT91 BF29
    22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 VCCGT13 VCCGT92
    AU32 BF30
    AU35 VCCGT14 VCCGT93 BF31
    AU36 VCCGT15 VCCGT94 BF32
    AU37 VCCGT16 VCCGT95 BF35
    AU38 VCCGT17 VCCGT96 BF36
    Under CPU AV29 VCCGT18 VCCGT97 BF37
    C136 C137 C135 C129 AV30 VCCGT19 VCCGT98 BF38
    VCCGT 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AV31 VCCGT20
    VCCGT21
    VCCGT99
    VCCGT100
    BG29
    AV32 BG30
    AV33 VCCGT22 VCCGT101 BG31
    AV34 VCCGT23 VCCGT102 BG32
    Edge cap AV35 VCCGT24
    VCCGT25
    VCCGT103
    VCCGT104
    BG33
    AV36 BG34
    3x 47uF 0805 AW14 VCCGT26
    VCCGT27
    VCCGT105
    VCCGT106
    BG35
    C130 C131 C133 C132 C96 C204 AW31 BG36
    7x 22uF 0603 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AW32 VCCGT28
    VCCGT29
    VCCGT107
    VCCGT108
    BH33
    AW33 BH34
    AW34 VCCGT30 VCCGT109 BH35
    VCCGT31 VCCGT110

    C
    Backside cap AW35
    AW36 VCCGT32 VCCGT111
    BH36
    BH37
    C
    VCCGT33 VCCGT112
    10x 10uF 0402 AW37
    AW38 VCCGT34 VCCGT113
    BH38
    BJ16
    VCCGT35 VCCGT114
    12x 1uF 0201 C88 C94 C87 C120 C101 C107 C86
    AY29
    AY30 VCCGT36 VCCGT115
    BJ17
    BJ19
    AY31 VCCGT37 VCCGT116 BJ20
    1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 VCCGT38 VCCGT117
    AY32 BJ21
    AY35 VCCGT39 VCCGT118 BJ23
    AY36 VCCGT40 VCCGT119 BJ24
    AY37 VCCGT41 VCCGT120 BJ26
    AY38 VCCGT42 VCCGT121 BJ27
    BA13 VCCGT43 VCCGT122 BJ37
    BA14 VCCGT44 VCCGT123 BJ38
    C110 C114 C109 C100 C99 BA29 VCCGT45 VCCGT124 BK16
    BA30 VCCGT46 VCCGT125 BK17
    1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 VCCGT47 VCCGT126
    BA31 BK19
    BA32 VCCGT48 VCCGT127 BK20
    BA33 VCCGT49 VCCGT128 BK21
    BA34 VCCGT50 VCCGT129 BK23
    BA35 VCCGT51 VCCGT130 BK24
    BA36 VCCGT52 VCCGT131 BK26
    BB13 VCCGT53 VCCGT132 BK27
    BB14 VCCGT54 VCCGT133 BL15
    BB31 VCCGT55 VCCGT134 BL16
    C68 C589 C75 C65 BB32 VCCGT56 VCCGT135 BL17
    B B
    BB33 VCCGT57 VCCGT136 BL23
    *47u/6.3V_8 *47u/6.3V_8 *47u/6.3V_8 *47u/6.3V_8 VCCGT58 VCCGT137
    BB34 BL24
    BB35 VCCGT59 VCCGT138 BL25
    BB36 VCCGT60 VCCGT139 BL26
    BB37 VCCGT61 VCCGT140 BL27
    BB38 VCCGT62 VCCGT141 BL28
    BC29 VCCGT63 VCCGT142 BL36
    BC30 VCCGT64 VCCGT143 BL37
    BC31 VCCGT65 VCCGT144 BM15
    BC32 VCCGT66 VCCGT145 BM16
    BC35 VCCGT67 VCCGT146 BM17
    BC36 VCCGT68 VCCGT147 BM36
    BC37 VCCGT69 VCCGT148 BM37
    BC38 VCCGT70 VCCGT149 BN15
    BD13 VCCGT71 VCCGT150 BN16
    BD14 VCCGT72 VCCGT151 BN17
    BD29 VCCGT73 VCCGT152 BN36
    BD30 VCCGT74 VCCGT153 BN37
    BD31 VCCGT75 VCCGT154 BN38
    BD32 VCCGT76 VCCGT155 BP15
    BD33 VCCGT77 VCCGT156 BP16
    BD34 VCCGT78 VCCGT157 BP17
    BP37 VCCGT79 VCCGT158 BR37
    A BP38 VCCGT159 VCCGT164 BT15 A
    BR15 VCCGT160 VCCGT165 BT16
    BR16 VCCGT161 VCCGT166 BT17
    BR17 VCCGT162 VCCGT167 BT37
    VCCGT163 VCCGT168 Quanta Computer Inc.
    AH37
    VSSGT_SENSE AH38
    VCCGT_VSSSENSE [64] PROJECT : ZGI
    11 OF 13 VCCGT_SENSE VCCGT_VCCSENSE [64]
    Size Document Number Rev
    1A
    CPU_CFL-H_1440P CML 4/7 (POWER)
    Date: Tuesday, June 23, 2020 Sheet 5 of 77
    5 4 3 2 1
    5 4 3 2 1

    45W(GT2): VCCSA=11.1A

    Close to CPU +VCC_SA


    U21L
    +1.2VSUS
    45W: VDDQ=3.3A (DDR4) 06
    Under CPU
    VDDQ
    J30 AA6
    K29 VCCSA1 VDDQ1 AE12
    +VCC_SA C190 C198 C205 C218 K30 VCCSA2 11.1 A VDDQ2 AF5 C255 C240 C241 C256
    D 22u/6.3V_6 22u/6.3V_6 47u/6.3V_8 47u/6.3V_8 K31 VCCSA3
    VCCSA4
    VDDQ3
    VDDQ4
    AF6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 Backside cap D
    K32 AG5
    K33 VCCSA5 VDDQ5 AG9 4x 22uF 0603
    Edge cap K34 VCCSA6
    VCCSA7
    VDDQ6
    VDDQ7
    AJ12
    11x 10uF 0402
    K35 AL11
    2x 47uF 0805 L31 VCCSA8
    VCCSA9
    3.3 A VDDQ8
    VDDQ9
    AP6
    L32 AP7
    2x 22uF 0805 C168 C182 C176 C158 C151 L35 VCCSA10
    VCCSA11
    VDDQ10
    VDDQ11
    AR12 C243 C239 C230 C228 C229
    10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 L36 AR6 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
    L37 VCCSA12 VDDQ12 AT12
    VCCSA13 VDDQ13
    Backside cap L38
    M29 VCCSA14
    VCCSA15
    VDDQ14
    VDDQ15
    AW6
    AY6
    7x 10uF 0402 M30
    M31 VCCSA16 VDDQ16
    J5
    J6
    VCCSA17 VDDQ17
    1X1uF 0201 Under CPU C113
    1u/10V_2
    C128
    10u/6.3V_4
    C146
    10u/6.3V_4
    M32
    M33 VCCSA18 VDDQ18
    K12
    K6
    C246
    10u/6.3V_4
    C238
    10u/6.3V_4
    C237
    10u/6.3V_4
    C227
    10u/6.3V_4
    C231
    10u/6.3V_4
    C236
    10u/6.3V_4
    M34 VCCSA19 VDDQ19 L12
    M35 VCCSA20 VDDQ20 L6
    M36 VCCSA21 VDDQ21 R6
    VCCSA22 VDDQ22 T6
    +VCCIO VDDQ23 W6
    VDDQ24 Y12
    AG12 VDDQ25
    G15 VCCIO1
    C
    G17 VCCIO2 6.4 A C

    C193 C211 C186 G19 VCCIO3 BH13 130mA +VCCST VCC_PLL_OC


    Follow CFL H EDS P128 to 45W: 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 G21 VCCIO4 VCCPLL_OC1
    0.13 AVCCPLL_OC2 BJ13
    +VCCPLL_OC
    VCCIO5
    VCCIO, H15
    H16 VCCIO6 VCCPLL_OC3
    G11

    +VCCIO = 6.4A Under CPU H17 VCCIO7


    VCCIO8 0.06 A VCCST H30 60mA Backside cap
    H19
    H20 VCCIO9
    VCCIO10 VCCSTG2
    H29
    +VCCSTG 20mA
    2x 1uF 0201
    H21 0.02 A C111
    H26 VCCIO11 G30 1u/10V_2
    H27 VCCIO12 VCCSTG1
    +VCC_IO J15 VCCIO13
    VCCIO14 VCCPLL1
    H28 +VCCPLL 150mA VCC_ST
    J16 0.15 A VCCPLL2 J28
    J17 VCCIO15
    J19 VCCIO16
    Backside cap J20 VCCIO17
    VCCIO18 VCCSA_SENSE
    M38
    VCCSA_VCCSENSE [64]
    Backside cap
    J21 M37
    3x 10uF 0402 J26 VCCIO19
    VCCIO20
    VSSSA_SENSE VCCSA_VSSSENSE [64] 1x 1uF 0201
    J27 H14 VCCIO_VCCSENSE
    VCCIO21 VCCIO_SENSE VSSIO_VCCSENSE TP19
    J14
    12 OF 13 VSSIO_SENSE TP18
    VccSTG
    B
    Vinafix.com CPU_CFL-H_1440P
    B

    Backside cap
    1x 1uF 0201
    POWER RAIL (Volume)
    [VCCPLL, VCCST, VCCSTG, +1V_SUS +VCCPLL
    +1V_SUS +VCCSTG +1.2VSUS +VCCPLL_OC
    VCC_PLL
    VCCPLL_OC] R552 *Short_6
    R540 *0_5%_6 R84 *Short_6
    +VCCST Backside cap
    +VCCIO
    R539 *Short_6 C55 4x 22uF 0603
    R541 *Short_6 22u/6.3V_6
    11x 10uF 0404
    C557 C558
    22u/6.3V_6 22u/6.3V_6

    A +VCCPLL +VCCIO +VCCSTG +VCCPLL_OC A


    Under CPU

    C148 C165 C216 C201 C203 C108 C224 C242 C223


    Quanta Computer Inc.
    1u/10V_2 1u/10V_2 *1u/10V_2 *1u/10V_2 1u/10V_2 22u/6.3V_6 1u/10V_2 1u/10V_2
    22u/6.3V_6 PROJECT : ZGI
    Size Document Number Rev
    1A
    CML 5/7 (POWER&GND )
    Date: Tuesday, June 23, 2020 Sheet 6 of 77
    5 4 3 2 1
    5 4 3 2 1

    07

    +VCC_CORE +VCC_CORE
    45W(GT2): VCC_CORE=140A
    +VCC_CORE +VCC_CORE
    D Close to CPU D
    U21I
    Under CPU U21J
    AA13 AH13
    AA31 VCC#AA13 VCC#AH13 AH14 K14 W35
    AA32 VCC#AA31 VCC#AH14 AH29 L13 VCC#K14 VCC#W35 W36
    C222 C208 C206 C221 C219 C195 C220 AA33 VCC#AA32 VCC#AH29 AH30 C141 C95 C245 C139 C124 C91 C226 C97 C126 L14 VCC#L13 VCC#W36 W37
    47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 AA34 VCC#AA33 VCC#AH30 AH31 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 N13 VCC#L14 VCC#W37 W38
    VCC#AA34 VCC#AH31 1u/10V_2 VCC#N13 VCC#W38
    AA35 AH32 N14 Y29
    AA36 VCC#AA35 VCC#AH32 AJ14 N30 VCC#N14 VCC#Y29 Y30
    AA37 VCC#AA36 VCC#AJ14 AJ29 N31 VCC#N30 VCC#Y30 Y31
    AA38 VCC#AA37 VCC#AJ29 AJ30 N32 VCC#N31 VCC#Y31 Y32
    AB29 VCC#AA38 VCC#AJ30 AJ31 N35 VCC#N32 VCC#Y32 Y33
    AB30 VCC#AB29 VCC#AJ31 AJ32 N36 VCC#N35 VCC#Y33 Y34
    C199 C188 C202 C192 C200 C185 C184 C72 AB31 VCC#AB30 VCC#AJ32 AJ33 C106 C123 C163 C166 C104 C167 C103 C118 C112 N37 VCC#N36 VCC#Y34 Y35
    47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 AB32 VCC#AB31 VCC#AJ33 AJ34 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 N38 VCC#N37 VCC#Y35 Y36
    VCC#AB32 VCC#AJ34 1u/10V_2 1u/10V_2 1u/10V_2 VCC#N38 VCC#Y36
    AB35 AJ35 P13
    AB36 VCC#AB35 VCC#AJ35 AJ36 P14 VCC#P13
    AB37 VCC#AB36 VCC#AJ36 AK31 P29 VCC#P14
    AB38 VCC#AB37 VCC#AK31 AK32 P30 VCC#P29
    AC13 VCC#AB38 VCC#AK32 AK33 P31 VCC#P30
    AC14 VCC#AC13 VCC#AK33 AK34 P32 VCC#P31
    C74 C73 C191 C175 AC29 VCC#AC14 VCC#AK34 AK35 C140 C138 C150 C89 C102 C125 C145 C117 C119 P33 VCC#P32
    22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 AC30 VCC#AC29 VCC#AK35 AK36 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 P34 VCC#P33
    VCC#AC30 VCC#AK36 1u/10V_2 1u/10V_2 VCC#P34
    AC31 AK37 P35
    AC32 VCC#AC31 VCC#AK37 AK38 P36 VCC#P35
    AC33 VCC#AC32 VCC#AK38 AL13 R13 VCC#P36
    AC34 VCC#AC33 VCC#AL13 AL29 R31 VCC#R13
    AC35 VCC#AC34 VCC#AL29 AL30 R32 VCC#R31
    AC36 VCC#AC35 VCC#AL30 AL31 R33 VCC#R32
    C78 C194 C161 C171 C121 C225 C172 C159 AD13 VCC#AC36 VCC#AL31 AL32 R34 VCC#R33
    10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AD14 VCC#AD13 VCC#AL32 AL35 R35 VCC#R34
    AD31 VCC#AD14 VCC#AL35 AL36 C162 C235 C244 C90 C116 C149 C105 C127 C92 R36 VCC#R35
    AD32 VCC#AD31 VCC#AL36 AL37 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 R37 VCC#R36
    VCC#AD32 VCC#AL37 1u/10V_2 1u/10V_2 VCC#R37
    AD33 AL38 R38
    AD34 VCC#AD33 VCC#AL38 AM13 T29 VCC#R38
    AD35 VCC#AD34 VCC#AM13 AM14 T30 VCC#T29
    AD36 VCC#AD35 VCC#AM14 AM29 T31 VCC#T30
    C80 C153 C164 C187 C143 C169 C170 C183 AD37 VCC#AD36 VCC#AM29 AM30 T32 VCC#T31
    C C
    10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AD38 VCC#AD37 VCC#AM30 AM31 T35 VCC#T32
    AE13 VCC#AD38 VCC#AM31 AM32 T36 VCC#T35
    AE14 VCC#AE13 VCC#AM32 AM33 T37 VCC#T36
    AE30 VCC#AE14 VCC#AM33 AM34 C93 C156 C157 C122 C115 T38 VCC#T37
    AE31 VCC#AE30 VCC#AM34 AM35 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 U29 VCC#T38
    VCC#AE31 VCC#AM35 1u/10V_2 VCC#U29
    AE32 AM36 U30
    AE35 VCC#AE32 VCC#AM36 AN13 U31 VCC#U30
    C177 C152 C155 C178 C180 C79 C174 C234 AE36 VCC#AE35 VCC#AN13 AN14 U32 VCC#U31
    10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 *CML@10u/6.3V_4 10u/6.3V_4 *CML@10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AE37 VCC#AE36 VCC#AN14 AN31 U33 VCC#U32
    AE38 VCC#AE37 VCC#AN31 AN32 U34 VCC#U33
    AF29 VCC#AE38 VCC#AN32 AN33 U35 VCC#U34
    AF30 VCC#AF29 VCC#AN33 AN34 U36 VCC#U35
    AF31 VCC#AF30 VCC#AN34 AN35 V13 VCC#U36
    AF32 VCC#AF31 VCC#AN35 AN36 V14 VCC#V13
    AF33 VCC#AF32 VCC#AN36 AN37 V31 VCC#V14
    AF34 VCC#AF33 VCC#AN37 AN38 V32 VCC#V31
    C154 C181 C98 C134 C147 C160 C142 C189 AF35 VCC#AF34 VCC#AN38 AP13 V33 VCC#V32
    10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AF36 VCC#AF35 VCC#AP13 AP30 V34 VCC#V33
    AF37 VCC#AF36 VCC#AP30 AP31 V35 VCC#V34
    AF38 VCC#AF37 VCC#AP31 AP32 V36 VCC#V35
    AG14 VCC#AF38 VCC#AP32 AP35 Sense resistor should be placed within 2 V37 VCC#V36
    VCC#AG14 VCC#AP35 +VCC_CORE VCC#V37
    AG31
    AG32 VCC#AG31 VCC#AP36
    AP36
    AP37
    inches (50.8 mm) of the processor socket V38
    W13 VCC#V38
    AG33 VCC#AG32 VCC#AP37 AP38 W14 VCC#W13
    AG34 VCC#AG33 VCC#AP38 K13 Trace Impendence 50 ohm W29 VCC#W14
    C217 C179 AG35 VCC#AG34 VCC#K13 R533 W30 VCC#W29
    *CML@10u/6.3V_4 *CML@10u/6.3V_4 AG36 VCC#AG35 W31 VCC#W30 10 OF 13
    VCC#AG36 *100_1%_2 VCC#W31
    W32
    VCC#W32

    AG37 VCCSENSE CPU_CFL-H_1440P


    9 OF 13 VCC_SENSE VCCSENSE [64]
    AG38 VSSSENSE VSSSENSE [64]
    VSS_SENSE

    CPU_CFL-H_1440P R534
    *100_1%_2
    B B

    Vinafix.com

    TOP
    +VCC_CORE +VCC_CORE
    Backside

    A A
    C66 C207 C58 C196 C209 C76 C71 C69
    47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8

    C67 C210 C63 C57 C64


    47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    CML 6/7 (POWER&GND )
    Date: Tuesday, June 23, 2020 Sheet 7 of 77
    5 4 3 2 1
    5 4 3 2 1

    08

    CFL-H Processor (GND) CFL-H Processor (RESERVED, CFG)


    D D
    U21F U21G U21H
    A10 AK4 AW5 BJ15 BN4 F15
    A12 VSS_1 VSS_82 AL10 AY12 VSS_163 VSS_244 BJ18 BN7 VSS_325 VSS_409 F17
    A16 VSS_2 VSS_83 AL12 AY33 VSS_164 VSS_245 BJ22 BP12 VSS_326 VSS_410 F19 U21M
    A18 VSS_3 VSS_84 AL14 AY34 VSS_165 VSS_246 BJ25 BP14 VSS_327 VSS_411 F2
    A20 VSS_4 VSS_85 AL33 B9 VSS_166 VSS_247 BJ29 BP18 VSS_328 VSS_412 F21
    A22 VSS_5 VSS_86 AL34 BA10 VSS_167 VSS_248 BJ30 BP21 VSS_329 VSS_413 F23 E2
    VSS_6 VSS_87 VSS_168 VSS_249 VSS_330 VSS_414 TP83 IST_TRIG RSVD_TP5
    A24 AL4 BA11 BJ31 BP24 F25 E3
    VSS_7 VSS_88 VSS_169 VSS_250 VSS_331 VSS_415 TP81 IST_TRIG
    A26 AL7 BA12 BJ32 BP25 F27 TP85 E1
    A28 VSS_8 VSS_89 AL8 BA37 VSS_170 VSS_251 BJ33 BP26 VSS_332 VSS_416 F29 D1 RSVD_TP4
    VSS_9 VSS_90 VSS_171 VSS_252 VSS_333 VSS_417 TP84 RSVD_TP3
    A30 AL9 BA38 BJ34 BP29 F3
    A6 VSS_10 VSS_91 AM1 BA6 VSS_172 VSS_253 BJ35 BP33 VSS_334 VSS_418 F31 BR1 BK28
    VSS_11 VSS_92 VSS_173 VSS_254 VSS_335 VSS_419 TP82 RSVD_TP1 RSVD11
    A9 AM12 BA7 BJ36 BP34 F36 BT2 BJ28
    VSS_12 VSS_93 VSS_174 VSS_255 VSS_336 VSS_420 TP80 RSVD_TP2 RSVD10
    AA12 AM2 BA8 BK13 BP7 F4
    AA29 VSS_13 VSS_94 AM3 BA9 VSS_175 VSS_256 BK14 BR12 VSS_337 VSS_421 F5 BN35
    AA30 VSS_14 VSS_95 AM37 BB1 VSS_176 VSS_257 BK15 BR14 VSS_338 VSS_422 F8 RSVD15
    AB33 VSS_15 VSS_96 AM38 BB12 VSS_177 VSS_258 BK18 BR18 VSS_339 VSS_423 F9 J24
    AB34 VSS_16 VSS_97 AM4 BB2 VSS_178 VSS_259 BK22 BR21 VSS_340 VSS_424 G10 H24 RSVD28
    AB6 VSS_17 VSS_98 AM5 BB29 VSS_179 VSS_260 BK25 BR24 VSS_341 VSS_425 G12 BN33 RSVD27
    AC1 VSS_18 VSS_99 AN12 BB3 VSS_180 VSS_261 BK29 BR25 VSS_342 VSS_426 G14 BL34 RSVD14
    AC12 VSS_19 VSS_100 AN29 BB30 VSS_181 VSS_262 BK6 BR26 VSS_343 VSS_427 G16 RSVD13
    AC2 VSS_20 VSS_101 AN30 BB4 VSS_182 VSS_263 BL13 BR29 VSS_344 VSS_428 G18 N29
    AC3 VSS_21 VSS_102 AN5 BB5 VSS_183 VSS_264 BL14 BR34 VSS_345 VSS_429 G20 R14 RSVD30
    AC37 VSS_22 VSS_103 AN6 BB6 VSS_184 VSS_265 BL18 BR36 VSS_346 VSS_430 G22 AE29 RSVD31
    AC38 VSS_23 VSS_104 AP10 BC12 VSS_185 VSS_266 BL19 BR7 VSS_347 VSS_431 G23 AA14 RSVD#AE29
    AC4 VSS_24 VSS_105 AP11 BC13 VSS_186 VSS_267 BL20 BT12 VSS_348 VSS_432 G24 AP29 RSVD1
    AC5 VSS_25 VSS_106 AP12 BC14 VSS_187 VSS_268 BL21 BT14 VSS_349 VSS_433 G26 AP14 RSVD5
    AC6 VSS_26 VSS_107 AP33 BC33 VSS_188 VSS_269 BL22 BT18 VSS_350 VSS_434 G28 A36 RSVD4
    AD10 VSS_27 VSS_108 AP34 BC34 VSS_189 VSS_270 BL29 BT21 VSS_351 VSS_435 G4 VSS_A36
    AD11 VSS_28 VSS_109 AP8 BC6 VSS_190 VSS_271 BL33 BT24 VSS_352 VSS_436 G5 A37
    AD12 VSS_29 VSS_110 AP9 BD10 VSS_191 VSS_272 BL35 BT26 VSS_353 VSS_437 G6 VSS_A37
    AD29 VSS_30 VSS_111 AR1 BD11 VSS_192 VSS_273 BL38 BT29 VSS_354 VSS_438 G8 H23
    VSS_31 VSS_112 VSS_193 VSS_274 VSS_355 VSS_439 [15] PCH_2_CPU_TRIG CPU_2_PCH_TRIG_R PROC_TRIGIN
    AD30 AR13 BD12 BL6 BT32 G9 R551 *Short_4 J23
    VSS_32 VSS_113 VSS_194 VSS_275 VSS_356 VSS_440 [15] CPU_2_PCH_TRIG PROC_TRIGOUT
    AD6 AR14 BD37 BM11 BT5 H11
    AD8 VSS_33 VSS_114 AR2 BD6 VSS_195 VSS_276 BM12 C11 VSS_357 VSS_441 H12 R545 R536 F30
    AD9 VSS_34 VSS_115 AR29 BD7 VSS_196 VSS_277 BM13 C13 VSS_358 VSS_442 H18 RSVD24
    VSS_35 VSS_116 VSS_197 VSS_278 VSS_359 VSS_443 *Short_4 *Short_4
    C AE33 AR3 BD8 BM14 C15 H22 C
    AE34 VSS_36 VSS_117 AR30 BD9 VSS_198 VSS_279 BM18 C17 VSS_360 VSS_444 H25 E30
    AE6 VSS_37 VSS_118 AR31 BE1 VSS_199 VSS_280 BM2 C19 VSS_361 VSS_445 H32 RSVD23
    AF1 VSS_38 VSS_119 AR32 BE2 VSS_200 VSS_281 BM21 C21 VSS_362 VSS_446 H35
    AF12 VSS_39 VSS_120 AR33 BE29 VSS_201 VSS_282 BM22 C23 VSS_363 VSS_447 J10 B30 BL31
    AF13 VSS_40 VSS_121 AR34 BE3 VSS_202 VSS_283 BM23 C25 VSS_364 VSS_448 J18 C30 RSVD7 RSVD12 AJ8
    AF14 VSS_41 VSS_122 AR35 BE30 VSS_203 VSS_284 BM24 C27 VSS_365 VSS_449 J22 RSVD21 RSVD3 G13
    AF2 VSS_42 VSS_123 AR36 BE4 VSS_204 VSS_285 BM25 C29 VSS_366 VSS_450 J25 RSVD25
    AF3 VSS_43 VSS_124 AR37 BE5 VSS_205 VSS_286 BM26 C31 VSS_367 VSS_451 J32 G3
    AF4 VSS_44 VSS_125 AR38 BE6 VSS_206 VSS_287 BM27 C37 VSS_368 VSS_452 J33 J3 RSVD26 C38
    AG10 VSS_45 VSS_126 AR4 BF12 VSS_207 VSS_288 BM28 C5 VSS_369 VSS_453 J36 RSVD29 RSVD22 C1
    AG11 VSS_46 VSS_127 AR5 BF33 VSS_208 VSS_289 BM29 C8 VSS_370 VSS_454 J4 RSVD20 BR2
    AG13 VSS_47 VSS_128 AT29 BF34 VSS_209 VSS_290 BM3 C9 VSS_371 VSS_455 J7 BR35 RSVD17 BP1
    AG29 VSS_48 VSS_129 AT30 BF6 VSS_210 VSS_291 BM33 D10 VSS_372 VSS_456 K1 BR31 RSVD19 RSVD16 B38
    AG30 VSS_49 VSS_130 AT6 BG12 VSS_211 VSS_292 BM35 D12 VSS_373 VSS_457 K10 BH30 RSVD18 RSVD8 B2
    AG6 VSS_50 VSS_131 AU10 BG13 VSS_212 VSS_293 BM38 D14 VSS_374 VSS_458 K11 RSVD9 RSVD6
    AG7 VSS_51 VSS_132 AU11 BG14 VSS_213 VSS_294 BM5 D16 VSS_375 VSS_459 K2 13 OF 13
    AG8 VSS_52 VSS_133 AU12 BG37 VSS_214 VSS_295 BM6 D18 VSS_376 VSS_460 K3
    AH12 VSS_53 VSS_134 AU33 BG38 VSS_215 VSS_296 BM7 D20 VSS_377 VSS_461 K38
    AH33 VSS_54 VSS_135 AU34 BG6 VSS_216 VSS_297 BM8 D22 VSS_378 VSS_462 K4 CPU_CFL-H_1440P
    AH34 VSS_55 VSS_136 AU6 BH1 VSS_217 VSS_298 BM9 D24 VSS_379 VSS_463 K5
    AH35 VSS_56 VSS_137 AU7 BH10 VSS_218 VSS_299 BN12 D26 VSS_380 VSS_464 K7
    AH36 VSS_57 VSS_138 AU8 BH11 VSS_219 VSS_300 BN14 D28 VSS_381 VSS_465 K8
    AH6 VSS_58 VSS_139 AU9 BH12 VSS_220 VSS_301 BN18 D3 VSS_382 VSS_466 K9
    AJ1 VSS_59 VSS_140 AV37 BH14 VSS_221 VSS_302 BN19 D30 VSS_383 VSS_467 L29
    AJ13 VSS_60 VSS_141 AV38 BH2 VSS_222 VSS_303 BN2 D33 VSS_384 VSS_468 L30
    AJ2 VSS_61 VSS_142 AW1 BH3 VSS_223 VSS_304 BN20 D6 VSS_385 VSS_469 L33
    AJ3 VSS_62 VSS_143 AW12 BH4 VSS_224 VSS_305 BN21 D9 VSS_386 VSS_470 L34
    AJ37 VSS_63 VSS_144 AW2 BH5 VSS_225 VSS_306 BN24 E34 VSS_387 VSS_471 M12
    AJ38 VSS_64 VSS_145 AW29 BH6 VSS_226 VSS_307 BN29 E35 VSS_388 VSS_472 M13
    AJ4 VSS_65 VSS_146 AW3 BH7 VSS_227 VSS_308 BN30 E38 VSS_389 VSS_473 N10
    AJ5 VSS_66 VSS_147 AW30 BH8 VSS_228 VSS_309 BN31 E4 VSS_390 VSS_474 N11
    AJ6 VSS_67 VSS_148 AW4 BH9 VSS_229 VSS_310 BN34 E9 VSS_391 VSS_475 N12
    W4 VSS_68 VSS_149 U6 T2 VSS_230 VSS_311 P38 N3 VSS_392 VSS_476 N2
    W5 VSS_69 VSS_150 V12 T3 VSS_231 VSS_312 P6 N33 VSS_393 VSS_477 BT8
    Y10 VSS_70 VSS_151 V29 T33 VSS_232 VSS_313 R12 N34 VSS_394 VSS_478 BR9
    Y11 VSS_71 VSS_152 V30 T34 VSS_233 VSS_314 R29 N4 VSS_395 VSS_479
    Y13 VSS_72 VSS_153 A14 T4 VSS_234 VSS_315 AY14 N5 VSS_396 A3
    B
    Y14 VSS_73 VSS_154 AD7 T5 VSS_235 VSS_316 BD38 N6 VSS_397 VSS_A3 A34 B
    Y37 VSS_74 VSS_155 V6 T7 VSS_236 VSS_317 R30 N7 VSS_398 VSS_A34 A4
    Y38 VSS_75 VSS_156 W1 T8 VSS_237 VSS_318 T1 N8 VSS_399 VSS_A4 B3
    Y7 VSS_76 VSS_157 W12 T9 VSS_238 VSS_319 T10 N9 VSS_400 VSS_B3 B37
    Y8 VSS_77 VSS_158 W2 U37 VSS_239 VSS_320 T11 P12 VSS_401 VSS_B37 BR38
    Y9 VSS_78 VSS_159 W3 U38 VSS_240 VSS_321 T12 P37 VSS_402 VSS_BR38 BT3
    AK29 VSS_79 VSS_160 W33 BJ12 VSS_241 VSS_322 T13 M14 VSS_403 VSS_BT3 BT35
    AK30 VSS_80 VSS_161 W34 BJ14 VSS_242 VSS_323 T14 M6 VSS_404 VSS_BT35 BT36
    VSS_81 VSS_162 VSS_243 VSS_324 N1 VSS_405 VSS_BT36 BT4
    F11 VSS_406 VSS_BT4 C2
    6 OF 13 7 OF 13
    F13 VSS_407 VSS_C2 D38
    CPU_CFL-H_1440P CPU_CFL-H_1440P VSS_408 VSS_D38

    8 OF 13
    CPU_CFL-H_1440P

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    CML 7/7 (GND)
    Date: Tuesday, June 23, 2020 Sheet 8 of 77
    5 4 3 2 1
    5 4 3 2 1

    USB OC
    +3V_DEEP_SUS
    09
    USB_OC0# R259 10K_1%_2
    U27B
    K34 J3 USB_OC1# R302 10K_1%_2
    [3] DMI_TXN0 DMI0_RXN USB2N_1 USBP1- [48]
    [3] DMI_TXP0 J35
    DMI0_RXP USB2P_1
    J2 USBP1+ [48] USB3.0 with BC1.2
    C33 N13
    [3] DMI_RXN0 DMI0_TXN USB2N_2 USBP2- [58]
    [3] DMI_RXP0 B33
    DMI0_TXP USB2P_2
    N15 USBP2+ [58] USB3.0
    G33 K4
    [3] DMI_TXN1 DMI1_RXN USB2N_3 USBP3- [59]
    F34 K3 POA-Like
    [3] DMI_TXP1 DMI1_RXP USB2P_3 USBP3+ [59]
    [3] DMI_RXN1 C32 M10 USBP4- [34]
    B32 DMI1_TXN USB2N_4 L9 Touch Panel
    D
    DMI [3]
    [3]
    DMI_RXP1
    DMI_TXN2 K32
    J32
    DMI1_TXP
    DMI2_RXN
    USB2P_4
    USB2N_5
    M1
    L2
    USBP5-
    USBP5+
    USBP4+
    TP88
    [34]
    D
    [3] DMI_TXP2 DMI2_RXP USB2P_5 TP90
    C31 K7
    [3] DMI_RXN2 DMI2_TXN USB2N_6 USBP6- [34]
    [3] DMI_RXP2 B31 K6 USBP6+ [34] CCD
    G30 DMI2_TXP USB2P_6 L4
    [3] DMI_TXN3 DMI3_RXN USB2N_7 USBP7- [58]
    [3] DMI_TXP3 F30 L3 USBP7+ [58] Finger print
    C29 DMI3_RXP USB2P_7 G4 USBP8-
    [3] DMI_RXN3 DMI3_TXN USB2N_8 TP87
    B29 G5 USBP8+
    [3] DMI_RXP3 DMI3_TXP USB2P_8 TP29
    A25 M6 USBP9- [43,44]
    B25 DMI7_TXP /RSVD USB2N_9 N8 USB_OC0# C372 0.1u/6.3V_2
    P24 DMI7_TXN /RSVD USB2P_9 H3
    USBP9+ [43,44] TBT TypeC1
    R24 DMI7_RXP /RSVD USB2N_10 H2 USB_OC1# C391 0.1u/6.3V_2
    C26 DMI7_RXN /RSVD USB2P_10 R10
    B26 DMI6_TXP /RSVD USB2N_11 P9
    F26 DMI6_TXN /RSVD USB2P_11 G1
    G26 DMI6_RXP /RSVD USB2N_12 G2
    B27 DMI6_RXN /RSVD USB2P_12 N3
    C27 DMI5_TXP /RSVD USB2N_13 N2
    L26 DMI5_TXN /RSVD USB2P_13 E5
    DMI5_RXP /RSVD USB2N_14 USBP14- [54]
    M26 F6 BT
    DMI5_RXN /RSVD USB2P_14 USBP14+ [54]
    D29
    E28 DMI4_TXP /RSVD AH36 USB_OC0#
    K29
    M29
    DMI4_TXN /RSVD
    DMI4_RXP /RSVD
    GPP_E9/USB2_OC0#
    GPP_E10/USB2_OC1#
    AL40 USB_OC1#
    AJ44 USB_OC2#
    USB_OC0#
    USB_OC1#
    TP6
    [48]
    [49] PU/PD
    DMI4_RXN /RSVD GPP_E11/USB2_OC2# AL41 USB_OC3# +3V
    GPP_E12/USB2_OC3# TP5
    G17 AV47 USB_OC4#
    PCIE1_RXN/USB31_7_RXN GPP_F15/USB2_OC4# TP4
    F16 AR35 USB_OC5#
    A17 PCIE1_RXP/USB31_7_RXP GPP_F16/USB2_OC5# AR37 USB_OC6# TP3
    SERIRQ R261 10K_1%_2
    PCIE1_TXN/USB31_7_TXN GPP_F17/USB2_OC6# TP2
    B17 AV43 USB_OC7#
    R21 PCIE1_TXP/USB31_7_TXP GPP_F18/USB2_OC7# TP1 SIO_RCIN# R799 10K_1%_2
    P21 PCIE2_RXN/USB31_8_RXN F4 USB2_COMP R655 113_1%_2
    B18 PCIE2_RXP/USB31_8_RXP USB2_COMP F3 R654 1K_1%_2
    C18 PCIE2_TXN/USB31_8_TXN USB2_VBUSSENSE U13
    K18 PCIE2_TXP/USB31_8_TXP RSVD1 G3 R656 1K_1%_2
    J18 PCIE3_RXN/USB31_9_RXN USB2_ID CLK_PCI_EC EC5 *10p/25V_2
    B19 PCIE3_RXP/USB31_9_RXP BE41 PCH_GPD7
    PCIE3_TXN/USB31_9_TXN GPD7 PCH_GPD7 [12] EC_RST#
    C19 C696 *0.33u/25V_2
    N18 PCIE3_TXP/USB31_9_TXP G45
    R18 PCIE4_RXN/USB31_10_RXN PCIE24_TXP G46
    C C
    D20 PCIE4_RXP/USB31_10_RXP PCIE24_TXN Y41
    C20 PCIE4_TXN/USB31_10_TXN PCIE24_RXP Y40 +3V
    F20 PCIE4_TXP/USB31_10_TXP PCIE24_RXN G48
    G20 PCIE5_RXN PCIE23_TXP G49
    B21 PCIE5_RXP PCIE23_TXN W44 LPC_PIRQAB R250 10K_1%_2
    A22 PCIE5_TXN PCIE23_RXP W43
    K21 PCIE5_TXP PCIE23_RXN H48
    J21 PCIE6_RXN PCIE22_TXP H47
    D21 PCIE6_RXP PCIE22_TXN U41 DEVSLP1_SSD1 R249 *100K_1%_2
    C21 PCIE6_TXN PCIE22_RXP U40
    B23 PCIE6_TXP PCIE22_RXN F46
    C23 PCIE7_TXP PCIE21_TXP G47
    J24 PCIE7_TXN PCIE21_TXN R44 EXT_SMI# R857 *100K_1%_2
    L24 PCIE7_RXP PCIE21_RXP T43
    F24 PCIE7_RXN PCIE21_RXN
    G24 PCIE8_RXN R854 *10K_1%_2
    PCIE8_RXP +3V_DEEP_SUS
    B24
    C24 PCIE8_TXN
    PCIE8_TXP 2 OF 13

    PCH_CFL-H_874P

    TBT_WAKE (RTD3)
    +3V_DEEP_SUS

    Vinafix.com S5 R837
    *10K_1%_2
    S5

    2
    B B
    PCH_TBT_WAKE# 1 3 PCH_WAKE# [40]
    U27F Q57
    F9 *2N7002K
    [58] USB30_TX1- USB31_1_TXN ESPI_EC_IO0
    F7 BB39 R278 *Short_4
    [58] USB30_TX1+ USB31_1_TXP GPP_A1/LAD0/ESPI_IO0 ESPI_EC_IO1 LPC_LAD0 [54,57]
    D11 AW37 R281 *Short_4
    USB3.0 with BC1.2
    [58] USB30_RX1-
    C11 USB31_1_RXN GPP_A2/LAD1/ESPI_IO1 AV37 ESPI_EC_IO2 R294 *Short_4
    LPC_LAD1
    LPC_LAD2
    [54,57]
    [54,57] R871 *Short_4
    [58] USB30_RX1+ USB31_1_RXP GPP_A3/LAD2/ESPI_IO2 BA38 ESPI_EC_IO3 R286 *Short_4 LPC_LAD3 [54,57]
    C3 GPP_A4/LAD3/ESPI_IO3
    [58] USB30_TX2- USB31_2_TXN
    D4 BE38
    USB3.0 [58] USB30_TX2+ B9 USB31_2_TXP GPP_A5/LFRAME#/ESPI_CS0# AW35 SERIRQ
    LPC_LFRAME#
    SERIRQ [57]
    [54,57]
    [58] USB30_RX2- USB31_2_RXN GPP_A6/SERIRQ/ESPI_CS1# LPC_PIRQAB
    C9 BA36
    [58] USB30_RX2+ USB31_2_RXP GPP_A7/PIRQA#/ESPI_ALERT0# BE39 SIO_RCIN#
    C17 GPP_A0/RCIN#/ESPI_ALERT1# BF38 EC_RST# SIO_RCIN# [57]
    USB31_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# TP101
    C16 USB 2.0 PORT USB 3.0 PORT
    G14 USB31_6_TXP C376 18p/50V_4
    F14 USB31_6_RXN BB36 CLK_PCI_EC_R R260 22_5%_2
    USB31_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK BB34 CLK_PCI_LPC_R R248 22_5%_2
    CLK_PCI_EC [57] PORT1 USB3.0 with BC1.2 PORT1 USB3.0 with BC1.2
    GPP_A10/CLKOUT_LPC1 CLK_PCI_LPC [54]
    C15 C370 18p/50V_4 PORT2 USB3.0 PORT2 USB3.0
    B15 USB31_5_TXN T48 EXT_SMI#
    J13 USB31_5_TXP GPP_K19/SMI# T47 PCH_TBT_WAKE# TP107
    K13 USB31_5_RXN GPP_K18/NMI# PORT3 POA-Like PORT3 NC
    USB31_5_RXP
    G12 AH40
    PORT4 Touch Panel PORT4 NC
    F11 USB31_3_TXP GPP_E6/SATA_DEVSLP2 AH35 DEVSLP1_SSD1
    C10 USB31_3_TXN GPP_E5/SATA_DEVSLP1 AL48 DEVSLP0
    DEVSLP1_SSD1 SSD1/SATA MODE
    [53] PORT5 Sensor Hub PORT5~6 NC
    USB31_3_RXP GPP_E4/SATA_DEVSLP0 TP105
    B10 AP47 DEVSLP7 TP45 PORT6 CCD PORT7 NC
    USB31_3_RXN GPP_F9/SATA_DEVSLP7 AN37
    C14 GPP_F8/SATA_DEVSLP6 AN46
    B14 USB31_4_TXP GPP_F7/SATA_DEVSLP5 AR47 DEVSLP4
    PORT7 Card Reader PORT8~10 NC
    USB31_4_TXN GPP_F6/SATA_DEVSLP4 TP48
    J15 AP48 PORT8 NC
    K16 USB31_4_RXP 6 OF 13 GPP_F5/SATA_DEVSLP3
    USB31_4_RXN
    PORT9 TBT TypeC1
    PCH_CFL-H_874P PORT10 TBT TypeC2
    A PORT11 NC A

    PORT12 NC
    PORT13 NC
    PORT14 BT( CNVi )

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    PCH 1/7 (DMI/USB/PCIE)
    Date: Tuesday, June 23, 2020 Sheet 9 of 77
    5 4 3 2 1
    5 4 3 2 1

    PU
    C676 *22p/50V_4
    U27D
    HDA Bus(CLG)
    DDR_DRAMRST#_L R867 470_1%_2
    +1.2VSUS
    10
    R696 33_1%_2 ACZ_BCLK BD11 BF36 +3V_DEEP_SUS
    [50] PCH_AZ_CODEC_BITCLK ACZ_SDIN0_R HDA_BCLK/I2S0_SCLK GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
    R688 *Short_4 BE11 AV32 CLKRUN#
    [50] PCH_AZ_CODEC_SDIN0 ACZ_SDO HDA_SDI0/I2S0_RXD GPP_A8/CLKRUN# CLKRUN# [57]
    R699 33_1%_2 BF12
    [50] PCH_AZ_CODEC_SDOUT HDA_SDO/I2S0_TXD LAN_DIS#
    [12] ACZ_SDO BG13 BF41 LAN_DIS# [47]
    R703 33_1%_2 ACZ_SYNC HDA_SYNC/I2S0_SFRM GPD11/LANPHYPC
    [50] PCH_AZ_CODEC_SYNC HDA_RST# SLP_WLAN# GPP_B2
    BE10 BD42 SLP_WLAN# [54] C734 *0.1u/6.3V_2 R761 4.7K_1%_2
    TP92 HDA_RST#/I2S1_SCLK GPD9/SLP_WLAN#
    BF10
    BE12 HDA_SDI1/I2S1_RXD BB46 DDR_DRAMRST#_L R847 *Short_4 MPHY_EXT_PWR_GATE R211 *200K_1%_2
    I2S1_SFRM I2S1_TXD/SNDW2_DATA DRAM_RESET# GPP_B2 DDR_DRAMRST# [17,18]
    BD12 BE32 R759 *0_5%_4 UART_WAKE_N [54]
    TP95 I2S1_SFRM/SNDW2_CLK GPP_B2/VRALERT# BF33 PCH_WAKE#_L R848 1K_1%_2
    GPP_B1/GSPI1_CS1#/TIME_SYNC1 BE29
    D AUD_AZACPU_SDO GPP_B0/GSPI0_CS1# PIRQ# [51] SLP_LAN# D
    R661 30_1%_2 AM2 R47 R89 *VPRO@10K_1%_2
    [3] AUD_AZACPU_SDO_R AN3 HDACPU_SDO GPP_K17/ADR_COMPLETE AP29 MPHY_EXT_PWR_GATE
    [3] AUD_AZACPU_SDI AUD_AZACPU_SCLK_R HDACPU_SDI GPP_B11/I2S_MCLK SYS_PWROK_R SYS_PWROK TP36 PCH_SLP_S0ix#_L
    R662 30_1%_2 AM3 AU3 R312 *Short_4 R210 *100K_1%_2
    [3] AUD_AZACPU_SCLK HDACPU_SCLK SYS_PWROK
    BB47 PCH_WAKE#_L R868 *Short_4 SUSCLK32 R309 *10K_1%_2
    I2S2_SCLK WAKE# SLP_A#_L PCIE_WAKE# [40,54]
    R173 *0_5%_4 AV18 BE40 R803 0_5%_4

    +3V_DEEP_SUS
    [54] PCM_CLK
    R166 *0_5%_4 I2S2_RXD AW18 GPP_D8/I2S2_SCLK GPD6/SLP_A# BF40 SLP_LAN# SLP_A# [56] Vpro to EC reserve BATLOW# R824 10K_1%_2
    [54] PCM_IN MODEM_CLKREQ_C GPP_D7/I2S2_RXD SLP_LAN# PCH_SLP_S0ix#_L SLP_LAN# [47]
    R172 71.5K_1%_2 BA17 BC28 R207 *Short_4
    CNV_RF_RESET#_C BE16 GPP_D6/I2S2_TXD/MODEM_CLKREQ GPP_B12/SLP_S0# BF42 SLP_S3#_L PCH_SLP_S0ix# [51]
    R718 75K_1%_2 R813 *Short_4 SUSB# [2,41,57,62,64] SUSACK# R770 *10K_1%_2
    BF15 GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPD4/SLP_S3# BE42 SLP_S4#_L R821 *Short_4
    GPP_D20/DMIC_DATA0/SNDW4_DATA GPD5/SLP_S4# SLP_S5#_L SUSC# [57]
    BD16 BC42 R283 0_5%_4 SLP_S5# [56] Vpro to EC reserve SUSPWRDNACK R772 VPRO@10K_1%_2
    AV16 GPP_D19/DMIC_CLK0/SNDW4_CLK GPD10/SLP_S5#
    AW15 GPP_D18/DMIC_DATA1/SNDW3_DATA BE45 SUSCLK32 R296 *0_5%_4
    GPP_D17/DMIC_CLK1/SNDW3_CLK GPD8/SUSCLK SUSCLK [54]
    BF44 BATLOW#
    GPD0/BATLOW# BATLOW# [41]
    BE35 SUSACK# R771 *0_5%_4 ACPRESENT R809 *100K_1%_2
    RTC_RST# BE47 GPP_A15/SUSACK# BC37 SUSPWRDNACK
    RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUSPWRDNACK [56]
    SRTC_RST# BD46 XDP_DBRESET# R653 10K_1%_2
    SRTCRST#
    SYS_PWROK R326 *0_5%_4 EC_PWROK_R AY42 BG44 LANWAKE_N R2597 *Short_4
    PCH_RSMRST# PCH_PWROK GPD2/LAN_WAKE# LANWAKE# [47] SMB_PCH_CLK
    [57] RSMRST# R318 *Short_4 BA47 BG42 ACPRESENT ACPRESENT [57] R747 2.2K_5%_2
    RSMRST# GPD1/ACPRESENT BD39 PCH_SLP_SUS# SMB_PCH_DAT R746 2.2K_5%_2
    SLP_SUS# TP40
    BE46

    +3V_DEEP_SUS
    PCH_RSMRST# DPWROK_R GPD3/PWRBTN# XDP_DBRESET# DNBSWON# [57] SMB_ME0_CLK
    R287 *Short_4 AW41 AU2 R2598 499_1%_2
    SMBALERT# BE25 DSW_PWROK SYS_RESET# AW29 ACZ_SPKR SMB_ME0_DAT R2599 499_1%_2
    [12] SMBALERT# SMB_PCH_CLK GPP_C2/SMBALERT# GPP_B14/SPKR ACZ_SPKR [12,50]
    BE26 AE3 PROCPWRGD [2]
    SMB_PCH_DAT BF26 GPP_C0/SMBCLK CPUPWRGD SMB_ME1_CLK R751 *2.2K_5%_2
    SML0ALERT# BF24 GPP_C1/SMBDATA AL3 ITP_PMODE SMB_ME1_DAT R749 *2.2K_5%_2
    [12] SML0ALERT# SMB_ME0_CLK GPP_C5/SML0ALERT# ITP_PMODE PCH_JTAGX TP27
    BF25 AH4 R638 *Short_4 H_TCK [2]
    [47] SMB_ME0_CLK SMB_ME0_DAT BE24 GPP_C3/SML0CLK PCH_JTAGX AJ4 PCH_TMS +1V_S5
    R639 *Short_4
    INTEL PHY [47]
    [12]
    SMB_ME0_DAT
    SMB1ALERT# SMB1ALERT# BD33 GPP_C4/SML0DATA PCH_JTAG_TMS AH3 PCH_TDO R645 *Short_4
    H_TMS
    H_TDO
    [2]
    [2]
    SMB_ME1_CLK BF27 GPP_B23/SML1ALERT#/PCHHOT# PCH_JTAG_TDO AH2 PCH_TDI R646 *Short_4 PCH_TDO R672 *51_1%_2
    SMB_ME1_DAT GPP_C6/SML1CLK PCH_JTAG_TDI PCH_TCK H_TDI [2]
    BE27 AJ3 R674 *51_1%_2
    GPP_C7/SML1DATA 4 OF 13 PCH_JTAG_TCK +3V

    PCH_CFL-H_874P CLKRUN# R234 8.2K_5%_2

    C C

    SMBUS (LEVEL SHIFT) CNVI (LEVEL SHIFT) PWROK (SYSTEM/PCH)


    +3V_DEEP_SUS

    S5 S5 +3V_DEEP_SUS +1.8V_DEEP_SUS

    TO EC/TBT PD From PCH


    5

    Q50A +3V_DEEP_SUS
    *2N7002KDW R151 R165
    3 4 SMB_ME1_DAT 10K_1%_2 4.7K_1%_2
    [43,57] 2ND_MBDATA
    C399 *0.1u/6.3V_2

    R748 *Short_4
    CNV_RF_RESET# [54]

    5
    3

    6
    1 EC_PWROK
    SYS_PWROK EC_PWROK [57]
    4
    Q50B CNV_RF_RESET#_C 5 2 2
    IMVP_PWRGD [2,64]
    2

    *2N7002KDW
    Q17A Q17B U13

    3
    6 1 SMB_ME1_CLK C309 PJX138K PJX138K *MC74VHC1G08DFT2G
    [43,57] 2ND_MBCLK

    1
    *0.33u/25V_2 R338
    R329 *0_5%_4 *10K_1%_2
    R750 *Short_4

    R327 *Short_4

    +3V +3V_DEEP_SUS +1.8V_DEEP_SUS

    S0 S5
    To STYLUS(Wacom) From PCH R145 R164
    Q20A 10K_1%_2 4.7K_1%_2
    5

    +3V R187 4.7K_1%_2 2N7002KDW


    EC_PWROK_R R333 *Short_4
    B PEN_I2C_SDA_Q PCH_PWROK [57] B
    4 3
    [34] PEN_I2C_SDA_Q PEN_I2C_SDA [13,34] MODEM_CLKREQ [54]
    3

    R334 *0_5%_4
    Q20B
    2

    R167 4.7K_1%_2 2N7002KDW MODEM_CLKREQ_C 5 2


    +3V SYS_PWROK_R EC_PWROK
    R311 *0_5%_4
    PEN_I2C_SCL_Q 1 6 Q16A Q16B
    [34] PEN_I2C_SCL_Q PEN_I2C_SCL [13,34]
    C307 PJX138K PJX138K
    4

    *0.33u/25V_2

    38.4MHz

    RTC Power trace width 20mils. 30mils


    RTC Circuitry(RTC) D16 +3V_RTC
    +3VPCU
    2
    3
    R523 RTC_RST#
    EC RESET RTC PD DPWROK_R R297 100K_1%_2

    +3V_RTC_1 1 SYS_PWROK_R R313 10K_1%_2


    20K_1%_2
    1

    J1 SRTC_RST# PCH_RSMRST# R298 10K_1%_2


    BAT54CW C539 *SHORT_PAD
    1u/10V_2 ACZ_BCLK R695 100K_1%_2
    2

    HDA_RST#

    3
    R680 100K_1%_2
    +3V_RTC_0 R524 SRTC_RST# 2 Q48
    [57] CLR_CMOS I2S1_SFRM
    *2N7002K R700 100K_1%_2
    20K_1%_2
    R522 1K_1%_4 C545 (20mils) ACPRESENT R808 10K_1%_2

    1
    C540 R691
    1u/10V_2 1u/10V_2 100K_1%_2

    SLP_S3#_L C707 0.33u/25V_2


    SLP_S4#_L C710 0.33u/25V_2
    A SLP_A#_L C701 0.33u/25V_2 A
    SLP_WLAN# C386 0.33u/25V_2
    SLP_LAN# C56 0.33u/25V_2
    RTC_RST# PCH_SLP_SUS# C375 0.33u/25V_2
    SLP_S5#_L C388 0.33u/25V_2
    1
    2

    3 4
    3

    CLR_CMOS 2 Q49
    ME2N70028D2-G
    CN28
    50281-0020L-V01 Quanta Computer Inc.
    1

    PROJECT : ZGI
    Size Document Number Rev
    1A
    PCH 2/7 (HDA/SMBUS)
    Date: Tuesday, June 23, 2020 Sheet 10 of 77
    5 4 3 2 1
    5 4 3 2 1

    VPRO_CLINK_RESET R2653 CL_CLK


    U27C
    PU/PD +3V

    11
    VPRO@0_5%_4 AR2
    [54]
    [54]
    [54]
    VPRO_CLINK_RESET
    VPRO_CLINK_DATA
    VPRO_CLINK_CLK
    VPRO_CLINK_DATA R2654
    VPRO_CLINK_CLK R2655
    VPRO@0_5%_4
    VPRO@0_5%_4
    CL_DATA
    CL_RST#
    AT5
    AU4
    CL_CLK
    CL_DATA PCIE9_RXN
    G36
    F36 PCIE_RXN9_SSD
    PCIE_RXP9_SSD
    [53]
    [53]
    NGFF1_DET1 R305 10K_1%_2
    Place at BOT +3V_DEEP_SUS BOARD ID TABLE
    CL_RST# PCIE9_RXP C34
    BOARD_ID8 P48 PCIE9_TXN D34 PCIE_TXN9_SSD [53]
    BOARD_ID9 V47 GPP_K8 PCIE9_TXP PCIE_TXP9_SSD [53]
    BOARD_ID10 V48 GPP_K9 K37 SSD1 PCIE 1,2/4 PCIE_CLKREQ_NGFF1# R758 10K_1%_2 R829 NMDB@10K_1%_2 BOARD_ID0 R851 MDB@10K_1%_2
    BOARD_ID11 GPP_K10 PCIE10_RXN PCIE_RXN10_SSD [53]
    W47
    GPP_K11 PCIE10_RXP
    J37
    C35
    PCIE_RXP10_SSD [53] [LR] PCIE_CLKREQ_VGA# R760 10K_1%_2
    BOARD_ID0 L47 PCIE10_TXN B35 PCIE_TXN10_SSD [53] ID.NO Function Low High
    BOARD_ID1 L46 GPP_K0 PCIE10_TXP PCIE_TXP10_SSD [53] PCIE_CLKREQ2# BOARD_ID1
    R233 *10K_1%_2 R828 10K_1%_2 R850 *10K_1%_2
    BOARD_ID2 U48 GPP_K1 F44
    BOARD_ID3 U47 GPP_K2 PCIE15_RXN/SATA2_RXN E45
    PCIE_RXN15_WLAN [54] PCIE_CLKREQ_LAN# R235 10K_1%_2
    BOARD_ID0 B channel No B channel Had B channel
    BOARD_ID4 N48 GPP_K3 PCIE15_RXP/SATA2_RXP B40
    PCIE_RXP15_WLAN
    PCIE_TXN15_WLAN
    [54]
    [54]
    DISCRETE WLAN (NMDB@) (MDB@-Default)
    BOARD_ID5 N47 GPP_K4 PCIE_15_SATA_2_TXN C40 PCIE_CLKREQ_WLAN# R231 10K_1%_2 R844 14@10K_1%_2 BOARD_ID2 R859 15@10K_1%_2
    BOARD_ID6 P47 GPP_K5 PCIE15_TXP/SATA2_TXP PCIE_TXP15_WLAN [54] BOARD_ID1 (Default)
    BOARD_ID7 R46 GPP_K6 L41 PCIE_CLKREQ_CR# R1098 10K_1%_2
    GPP_K7 PCIE16_RXN/SATA3_RXN PCIE_RXN16_CR [58]
    M40
    C36 PCIE16_RXP/SATA3_RXP B41
    PCIE_RXP16_CR [58] Card Reader PCIE_CLKREQ_TBT# R863 *10K_1%_2 R843 *10K_1%_2 BOARD_ID3 R858 10K_1%_2
    BOARD_ID2 14"/15"(LAN) 14" 15"(LAN)
    [53] PCIE_TXP11_SSD PCIE11_TXP/SATA0A_TXP PCIE16_TXN/SATA3_TXN PCIE_TXN16_CR [58]
    B36 C41
    SSD1 PCIE 3/4 [53]
    [53]
    PCIE_TXN11_SSD
    PCIE_RXP11_SSD
    F39 PCIE11_TXN/SATA0A_TXN PCIE16_TXP/SATA3_TXP PCIE_TXP16_CR [58] PCIE_CLKREQ7# R861 *10K_1%_2 BOARD_ID3 dTPM (Default)
    PCIE11_RXP/SATA0A_RXP
    D
    [LR] [53] PCIE_RXN11_SSD
    G38
    PCIE11_RXN/SATA0A_RXN PCIE17_RXN/SATA4_RXN
    K43
    K44 PCIE_RXN17_TBT [40] PCIE_CLKREQ8# R285 *10K_1%_2 R830 10K_1%_2 BOARD_ID4 R852 *10K_1%_2
    D

    PCIE17_RXP/SATA4_RXP PCIE_RXP17_TBT [40]


    AR42 A42
    GPP_F11 AR48 GPP_F10/SATA_SCLOCK PCIE17_TXN/SATA4_TXN B42
    PCIE_TXN17_TBT [40] PCIE_CLKREQ9# R841 *10K_1%_2
    BOARD_ID4 (Default)
    GPP_F13 AU47 GPP_F11/SATA_SLOAD PCIE17_TXP/SATA4_TXP PCIE_TXP17_TBT [40]
    GPP_F12 AU46 GPP_F13/SATA_SDATAOUT0 P41 TBT PCIE 1,2/4 PCIE_CLKREQ10# R282 *10K_1%_2 R712 QS@10K_1%_2 BOARD_ID5 R711 MP@10K_1%_2
    GPP_F12/SATA_SDATAOUT1 PCIE18_RXN/SATA5_RXN R40 PCIE_RXN18_TBT [40] BOARD_ID5 PCH QS/MP QS@ MP@
    PCIE18_RXP/SATA5_RXP PCIE_RXP18_TBT [40] PCIE_CLKREQ11#
    C39 C42 R263 *10K_1%_2 BOARD_ID6 [34]
    PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN PCIE_TXN18_TBT [40]
    D39 D42 Convertible
    D46 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP PCIE_TXP18_TBT [40] PCIE_CLKREQ12# BOARD_ID6
    TP106 R262 *10K_1%_2 R708 *10K_1%_2 R707 10K_1%_2 BOARD_ID6 Convertible / Clamshell TOUCH+G Sensor+ Clamshell
    C47 PCIE14_RXN/SATA1B_RXN AK48 R842 *10K_1%_2
    PCIE14_RXP/SATA1B_RXP GPP_E8/SATA_LED# +3V PCIE_CLKREQ13# STYLUS(Wacom) (Default)
    R838 *10K_1%_2
    B38 AH41
    [58] PCIE_TXN13_LAN PCIE13_TXN/SATA0B_TXN GPP_E0/SATAXPCIE0/SATAGP0 NGFF1_DET1 PCIE_CLKREQ14# BOARD_ID7
    C38 AJ43 R289 *10K_1%_2 R271 10K_1%_2 R272 *10K_1%_2
    INTEL LAN [58]
    [58]
    PCIE_TXP13_LAN
    PCIE_RXN13_LAN
    C45 PCIE13_TXP/SATA0B_TXP GPP_E1/SATAXPCIE1/SATAGP1 AK47
    NGFF1_DET1 [53] SSD SATA I/F --> H BOARD_ID7 (Default)
    PCIE13_RXN/SATA0B_RXN GPP_E2/SATAXPCIE2/SATAGP2 PCIE_CLKREQ15#
    [58] PCIE_RXP13_LAN
    C46
    PCIE13_RXP/SATA0B_RXPGPP_F0/SATAXPCIE3/SATAGP_3
    AN47
    AM46
    SSD PCIE I/F --> L R274 *10K_1%_2

    E37 GPP_F1/SATAXPCIE4/SATAGP4 AM43 PCH_TBT_PLTRST# R293 10K_1%_2 R232 10K_1%_2 BOARD_ID8 R273 *10K_1%_2
    [53] PCIE_TXP12_SSD
    D38 PCIE12_TXP/SATA1A_TXP GPP_F2/SATAXPCIE5/SATAGP5 AM47
    BOARD_ID8 (Default)
    SSD1 PCIE 4/4 [53]
    [53]
    PCIE_TXN12_SSD
    PCIE_RXP12_SSD
    J41 PCIE12_TXN/SATA1A_TXN GPP_F3/SATAXPCIE6/SATAGP6 AM48 PCH_TBT_PLTRST#
    PCH_TBT_PLTRST# [13]
    PCIE12_RXP/SATA_1A_RXPGPP_F4/SATAXPCIE7/SATAGP7
    [LR] [53] PCIE_RXN12_SSD
    H42
    PCIE12_RXN/SATA1A_RXN AU48 PCH_DPST_PWM +1V_S5 R243 10K_1%_2 BOARD_ID9 R244 *10K_1%_2
    BOARD_ID9 (Default)
    GPP_F21/EDP_BKLTCTL PCH_DPST_PWM [34]
    B44 AV46
    [40] PCIE_TXP20_TBT A44 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN AV44
    PCH_LVDS_BLON [34] EDP CONTROL
    [40] PCIE_TXN20_TBT
    R37 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN PCH_DISP_ON [34] PM_THRMTRIP#_L R132 *2K_1%_2
    BOARD_ID10 (Default)
    [40] PCIE_RXP20_TBT PCIE20_RXP/SATA7_RXP PM_THRMTRIP#_L BOARD_ID10
    R35 AD3 R131 620_1%_2 PM_THRMTRIP# [2,71] R766 10K_1%_2 R767 *10K_1%_2
    [40] PCIE_RXN20_TBT D43 PCIE20_RXN/SATA7_RXN THRMTRIP# AF2 PCH_PECI C290 *1000p/25V_2 BOARD_ID11 (Default)
    TBT PCIE 3,4/4 [40]
    [40]
    PCIE_TXP19_TBT
    PCIE_TXN19_TBT
    C44 PCIE19_TXP/SATA6_TXP PECI AF3 PM_SYNC_R R670 30_1%_2
    PCH_PECI
    PM_SYNC
    [2]
    [2]
    N42 PCIE19_TXN/SATA6_TXN PM_SYNC AG5 CPU_PLTRST# R160 *Short_4
    [40] PCIE_RXP19_TBT PCIE19_RXP/SATA6_RXP PLTRST_CPU# H_PM_DOWN CPU_PLTRST#R [2] BOARD_ID11
    M44 AE2 H_PM_DOWN [2] R763 10K_1%_2 R764 *10K_1%_2
    [40] PCIE_RXN19_TBT PCIE19_RXN/SATA6_RXN3 OF 13 PM_DOWN

    PCH_CFL-H_874P +1.8V_DEEP_SUS

    U27G
    BE33 CNV_RGI_RSP R658 *20K_1%_2
    TP37 GPP_A16/CLKOUT_48 Y3
    D7 CLKOUT_ITPXDP Y4 CNV_BRI_RSP R659 *20K_1%_2
    [2] CLK_DPLL_NSCCLKP CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_P
    C6
    CPU-24M [2] CLK_DPLL_NSCCLKN CLKOUT_CPUNSSC B6
    CLKOUT_CPUPCIBCLK CPU_PCI_BCLKN [2]
    B8 A6 CPU-PCIE-100M
    [2] CLK_CPU_BCLKP CLKOUT_CPUBCLK_P
    CLKOUT_CPUPCIBCLK_P CPU_PCI_BCLKP [2]
    C8
    CPU-100M [2] CLK_CPU_BCLKN CLKOUT_CPUBCLK AJ6
    XTAL24_OUT CLKOUT_PCIE_N0 CLK_PCIE_SSD1N [53] PCH_DPST_PWM
    U9 AJ7 R866 100K_1%_2
    XTAL24_IN U10 XTAL_OUT CLKOUT_PCIE_P0 CLK_PCIE_SSD1P [53] SSD1
    XTAL_IN AH9 R669 *100K_1%_2 H_PM_DOW N
    CLKOUT_PCIE_N1 CLK_VGA_N [19]
    R665 60.4_1%_2 XCLK_RBIAS T3 AH10
    CLK_VGA_P [19] GFX
    XCLK_BIASREF CLKOUT_PCIE_P1 R671 *100K_1%_2 PCH_PECI
    RTC_X1 BA49 AE14
    RTC_X2 BA48 RTCX1 CLKOUT_PCIE_N2 AE15 R666 *48.7_1%_4 CLKOUT_SRC_N15
    C RTCX2 CLKOUT_PCIE_P2 C
    PCIE_CLKREQ_NGFF1# BF31 AE6 R664 *48.7_1%_4 CLKOUT_SRC_P15
    SSD1 [53] PCIE_CLKREQ_NGFF1# PCIE_CLKREQ_VGA# BE31 GPP_B5/SRCCLKREQ0# CLKOUT_PCIE_N3 AE7
    CLK_PCIE_LANN [58]
    GFX [19] PCIE_CLKREQ_VGA# PCIE_CLKREQ2# AR32 GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_P3 CLK_PCIE_LANP [58] LAN
    PCIE_CLKREQ_LAN# BB30 GPP_B7/SRCCLKREQ2# AC2
    LAN [47] PCIE_CLKREQ_LAN# PCIE_CLKREQ_WLAN# BA30 GPP_B8/SRCCLKREQ3# CLKOUT_PCIE_N4 AC3
    CLK_PCIE_WLANN [54] +3V
    WLAN [54] PCIE_CLKREQ_WLAN# PCIE_CLKREQ_CR# AN29 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_P4 CLK_PCIE_WLANP [54] WLAN
    Card Reader
    [58] PCIE_CLKREQ_CR# PCIE_CLKREQ_TBT# AE47 GPP_B10/SRCCLKREQ5# AB2
    TBT [40] PCIE_CLKREQ_TBT# PCIE_CLKREQ7# AC48 GPP_H0/SRCCLKREQ6# CLKOUT_PCIE_N5 AB3
    CLK_PCIE_CRN [58] GPP_F11 R864
    CLK_PCIE_CRP [58] Card Reader *100K_1%_2
    PCIE_CLKREQ8# AE41 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_P5
    PCIE_CLKREQ9# AF48 GPP_H2/SRCCLKREQ8# W4 R833 *100K_1%_2 GPP_F12 R865 *100K_1%_2
    PCIE_CLKREQ10# GPP_H3/SRCCLKREQ9# CLKOUT_PCIE_N6 CLK_PCIE_TBTN [40]

    Vinafix.com
    AC41 W3
    PCIE_CLKREQ11# AC39 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_P6 CLK_PCIE_TBTP [40] TBT R834 *100K_1%_2 GPP_F13 R856 *100K_1%_2
    PCIE_CLKREQ12# AE39 GPP_H5/SRCCLKREQ11# W7
    GPP_H6/SRCCLKREQ12# CLKOUT_PCIE_N7 TP30
    PCIE_CLKREQ13# AB48 W6
    GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_P7 TP28
    PCIE_CLKREQ14# AC44
    PCIE_CLKREQ15# AC43 GPP_H8/SRCCLKREQ14# AC14
    GPP_H9/SRCCLKREQ15# CLKOUT_PCIE_N8 TP31
    AC15 TP32
    CLKOUT_SRC_N15 V2 CLKOUT_PCIE_P8
    CLKOUT_SRC_P15 V3 CLKOUT_PCIE_N15 U2
    CLKOUT_PCIE_P15 CLKOUT_PCIE_N9 U3
    T2 CLKOUT_PCIE_P9
    T1 CLKOUT_PCIE_N14 AC9
    CLKOUT_PCIE_P14 CLKOUT_PCIE_N10 AC11
    AA1
    Y2 CLKOUT_PCIE_N13
    CLKOUT_PCIE_P10
    AE9
    RTC Clock 32.768KHz
    CLKOUT_PCIE_P13 CLKOUT_PCIE_N11 AE11
    AC7 CLKOUT_PCIE_P11
    AC6 CLKOUT_PCIE_N12 R6
    CLKOUT_PCIE_P127 OF 13 CLKIN_XTAL CLKIN_XTAL [54] FROM CNVI C729 18p/50V_4 RTC_X1
    R140 10K_1%_2 (38.4MHz)

    1
    PCH_CFL-H_874P

    R831
    Y3 10M_5%_2
    U27M 32.768KHZ/20ppm

    AW13 BD4
    CNV_W R_CLKN [54]
    LEVEL SHIFT (VCCIO GATE#)

    2
    BE9 GPP_G0/SD_CMD CNV_WR_CLKN BE3 C728 18p/50V_4 RTC_X2
    BF8 GPP_G1/SD_D0 CNV_WR_CLKP CNV_W R_CLKP [54] RX CLK
    TP93 GPP_G3 BF9 GPP_G2/SD_D1 BB3
    GPP_G3/SD_D2 CNV_WR_D0N CNV_W RXN0 [54]
    BG8 BB4
    GPP_G4/SD_D3 CNV_WR_D0P CNV_W RXP0 [54]
    BE8 BA3 CNV RX
    GPP_G5/SD_CD# CNV_WR_D1N CNV_W RXN1 [54]
    BD8 BA2
    GPP_G6/SD_CLK CNV_WR_D1P CNV_W RXP1 [54]
    AV13
    GPP_G7/SD_WP BC5

    TBT_DP_HPD AP3
    CNV_WT_CLKN
    CNV_WT_CLKP
    BB6
    CNV_WT_CLKN
    CNV_WT_CLKP
    [54]
    [54] TX CLK PCH XTAL 24MHz
    [21,38] TBT_DP_HPD GPU_DP_HPD AP2 GPP_I11/M2_SKT2_CFG0 BE6
    [21,35] GPU_DP_HPD HDMI_HPD_PCH_R GPP_I12/M2_SKT2_CFG1 CNV_WT_D0N CNV_WTXN0 [54] +1.8V_DEEP_SUS +3V_DEEP_SUS
    AN4 BD7
    B [13] HDMI_HPD_PCH_R GPP_I13/M2_SKT2_CFG2 CNV_WT_D0P CNV_WTXP0 [54] B
    AM7 BG6 CNV TX
    GPP_I14/M2_SKT2_CFG3 CNV_WT_D1N CNV_WTXN1 [54] XTAL24_IN_L XTAL24_IN
    BF6 C287 33p/25V_2 R135 0_5%_2
    CNV_WT_D1P CNV_WTXP1 [54]
    BA1 CNV_RCOMP
    CNV_WT_RCOMP R663 150_1%_2
    +1.8V

    2
    1
    R129 *0_5%_4 GPP_J0 AV6 B12 PCIECOMP_N R719 100_1%_2
    [54] CNV_PA_BLANKING GPP_J1 GPP_J0/CNV_PA_BLANKING PCIE_RCOMPN
    AY3 A13 PCIECOMP_P R127
    R2649 75K_1%_2 GPP_J11 AR13 GPP_J1/CPU_VCCIO_PWR_GATE# PCIE_RCOMPP BE5 R141 200_1%_2 R676 Y1
    GPP_J11/A4WP_PRESENT SD_RCOMP_1P8 200K_1%_2
    R150 *0_5%_4 GPP_J10 AV7 BE4 R136 200_1%_2 R637 *10K_1%_2 24MHZ/20ppm
    [43] HRESET_PCH AW3 GPP_J10 SD_RCOMP_3P3 BD1 *10K_1%_2

    4
    3
    AT10 GPP_J_2 GPPJ_RCOMP_1P81 BE1 R677 200_1%_2 R660
    GPP_J_3 GPPJ_RCOMP_1P82 CPU_VCCIO_PWR_GATE [62]
    [12,54] CNV_BRI_DT R642 22_5%_2 CNV_BRI_DT_R AV4 BE2 *10K_1%_2 C286 33p/25V_2 XTAL24_OUT_L R130 0_5%_2 XTAL24_OUT
    CNV_BRI_RSP AY2 GPP_J_4_CNV_BRI_DT_UART0_RTSBGPPJ_RCOMP_1P83
    3

    BRI (TX/RX) [54] CNV_BRI_RSP


    22_5%_2 CNV_RGI_DT_R BA4 GPP_J5/CNV_BRI_RSP/UART0_RXD 2
    3

    R133 Y35
    [12,54] CNV_RGI_DT CNV_RGI_RSP AV3 GPP_J6/CNV_RGI_DT/UART0_TXD RSVD2 GPP_J1
    Y36 2
    RGI (TX/RX) [54] CNV_RGI_RSP
    R651 *0_5%_4 GPP_J8 AW2 GPP_J7/CNV_RGI_RSP/UART0_CTS# RSVD3 Q47
    [54] CNV_MFUART2_RXD GPP_J9 GPP_J8/CNV_MFUART2_RXD
    R115 *0_5%_4 AU9 BC1 Q46 *PJA138K
    1

    [54] CNV_MFUART2_TXD GPP_J9/CNV_MFUART2_TXD RSVD#BC1 TP89


    AL35 *PJA138K
    1

    [12] GPP_J9 TP TP38


    13 OF 13

    PCH_CFL-H_874P

    NOTE: GPP_J4/GPP_J6 was CNVi Strap

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    PCH 3/7 (SATA/LPC/CLK)
    Date: Tuesday, June 23, 2020 Sheet 11 of 77
    5 4 3 2 1
    5 4 3 2 1

    EMI RESERVE U27A


    AV29 PCI_PLTRST#
    PCH SPI ROM(CLG)
    PCH SPI ROM(CLG) For VPRO
    12
    PCH_SPI1_CLK GPP_B13/PLTRST# PCI_PLTRST# [13]
    EC11 *10p/25V_2 BE36
    GPP_A11/PME#/SD_VDD2_PWR_EN#
    Vender Size P/N SOP8 Vender Size P/N WSON8
    R15 Y47
    R13 RSVD#R15 GPP_K16/GSXCLK Y46
    RSVD#R13 GPP_K12/GSXDOUT Y48
    Winbond 16M AKE3DF-KN01 W25Q128JVSIQ CML Winbond 32M AKE3JF00N00 W25Q256JVEIQ
    GPP_K13/GSXSLOAD W46
    CML
    R258 *Short_4 AL37 GPP_K14/GSXDIN AA45
    XMC 16M AKE3DGN0X00 XM25QH128AHIGT CFL GigaDevice 32M AKE3JZ00Q02 GD25B256DYIGR
    AN35 VSS GPP_K15/GSXSRESET#
    TP39 TP#AN35 GigaDevice 16M AKE3DZN0Q02 GD25B127DSIGR
    PCH_SPI1_SI R315 33_1%_2 PCH_SPI1_SI_L AU41 AL47
    CFL
    PCH_SPI1_SO R846 33_1%_2 PCH_SPI1_SO_L BA45 SPI0_MOSI GPP_E3/CPU_GP0 AM45 +3V_DEEP_SUS MAX 16M AKE3DZN0Z03 MX25L12873FM2I-10G
    PCH_SPI_CS0# R849 *Short_4 PCH_SPI_CS0#_L AY47 SPI0_MISO GPP_E7/CPU_GP1 BF32
    PCH_SPI1_CLK PCH_SPI1_CLK_L SPI0_CS0# GPP_B3/CPU_GP2 BT_PCH [54] +SPI_VCC
    R853 33_1%_2 AW47 BC33 R776 *Short_4 Socket:DG008000011
    AW48 SPI0_CLK GPP_B4/CPU_GP3
    TP109 SPI0_CS1# AE44
    SPI1_IO2
    SPI1_IO3
    AY48
    BA46 SPI0_IO2
    GPP_H18/SML4ALERT#
    GPP_H17/SML4DATA
    AJ46
    AE43
    SMB_ME4_DAT
    SMB_ME4_CLK R310
    TP42
    *Short_4
    C697
    R789
    R878
    *2.55K_1%_4
    WSON8 32M
    U6529
    8x6
    SPI0_IO3 GPP_H16/SML4CLK RTD3_CIO_PWR_EN [41] 1u/10V_2
    D SPI_TPM_CS#_L AT40 AC47 PCH_GPP_H15 4.7K_1%_2 +SPI_VCC PCH_SPI1_SI 5 8 D
    SPI0_CS2# GPP_H15/SML3ALERT# AD48 SMB_ME3_DAT PCH_SPI1_SO 2 DI(IO0) VCC 3 PCH_SPI_IO2 +SPI_VCC
    TS_SPI1_CLK TS_SPI1_CLK_R GPP_H14/SML3DATA SMB_ME3_CLK U29 PCH_SPI_CS0# DO(IO1) WP(IO2) PCH_SPI_IO3
    R714 *33_1%_2 BE19 AF47 1 7
    TP97 TS_SPI1_CS# TS_SPI1_CS#_R GPP_D1/SPI1_CLK/SBK1_BK1 GPP_H13/SML3CLK PCH_SPI1_SI PCH_SPI1_CLK CS HOLD(IO3)
    R716 *33_1%_2 BF19 AB47 SML2ALERT# 5 8 6 4
    TP98 TS_SPI1_MISO TS_SPI1_MOSI_R GPP_D0/SPI1_CS#/SBK0_BK0 GPP_H12/SML2ALERT# SMB_ME2_DAT PCH_SPI1_SO DI(IO0) VCC PCH_SPI_IO2 CLK GND
    R710 *33_1%_2 BF18 AD47 2 3 9
    TP96 TS_SPI1_MOSI TS_SPI1_MISO_R GPP_D3/SPI1_MOSI/SBK3_BK3 GPP_H11/SML2DATA SMB_ME2_CLK PCH_SPI_CS0# DO(IO1) WP(IO2) PCH_SPI_IO3 TPAD
    R715 *33_1%_2 BE18 AE48 1 7
    TP94 GPP_D2/SPI1_MISO/SBK2_BK2 GPP_H10/SML2CLK PCH_SPI1_CLK CS HOLD(IO3)
    BC17 6 4 *SP@W25Q256JVEIQ
    BD17 GPP_D22/SPI1_IO3 BB44 SM_INTRUDER# R292 1M_1%_2 CLK GND
    GPP_D21/SPI1_IO2 1 OF 13 INTRUDER# +3V_RTC
    PCH_CFL-H_874P W25Q128JVSIQ C735
    0.1u/6.3V_2

    TPM PCH_SPI1_SI_L SPI1_IO2 R778 33_1%_2 PCH_SPI_IO2


    [51] PCH_SPI1_SI_L PCH_SPI1_SO_L
    [51] PCH_SPI1_SO_L PCH_SPI1_CLK_L Quad IO SPI1_IO3 R875 33_1%_2 PCH_SPI_IO3
    [51] PCH_SPI1_CLK_L

    R314 0_5%_2 SPI_TPM_CS#_L R779 *1K_1%_2


    [51] SPI_TPM_CS# +SPI_VCC
    R874 *1K_1%_2

    PCH STRAP PCH_SPI1_SI


    [57] PCH_SPI_SI_EC R877 33_1%_2
    R782 33_1%_2 PCH_SPI1_SO
    [57] PCH_SPI_SO_EC PCH_SPI_CS0#
    SIGNAL USAGE WHEN SAMPLED COMMENT SETTING R775 *Short_4
    TO EC [57]
    [57]
    SPI_CS0#_UR_ME
    PCH_SPI_CLK_EC R876 33_1%_2 PCH_SPI1_CLK

    ACZ_SPKR [10,50]
    0 = Disable
    GPP_B14 / SPKR Top Swap Override Rising edge of 1 = Enable R237 20K_1%_2 R239 *150K_5%_4 +3V
    PCH_PWROK
    iPD +3V_DEEP_SUS

    SMB_ME4_CLK R291 *1K_1%_2 PCH_SPI1_CLK_L R836 *100K_1%_2


    PCI_PLTRST# R702 100K_1%_2
    GSPI0_MOSI [13] SMB_ME4_DAT
    Rising edge of 0 = Disable R304 *1K_1%_2
    GPP_B18 / No Reboot PCH_PWROK 1 = Enable R757 *100K_1%_2 R756 *1K_1%_2 SMB_ME3_CLK R303 *1K_1%_2
    GSPIO0_MOSI +3V
    iPD SMB_ME3_DAT R862 *1K_1%_2
    SMB_ME2_CLK R840 *1K_1%_2
    SMBALERT# [10] SMB_ME2_DAT
    Rising edge of 0 = Disable R839 *1K_1%_2
    GPP_C2 / TLS Confi- RSMRST# 1 = Enable R744 *20K_1%_2 R745 2.2K_5%_2
    SMBALERT# dentiality +3V_DEEP_SUS
    iPD
    C PCH STRAP C

    GSPI1_MOSI [13]
    Rising edge of 0 = SPI
    GPP_B22 / Boot BIOS PCH_PWROK 1 = LPC R197 100K_1%_2 R198 *150K_5%_4+3V
    SIGNAL USAGE WHEN SAMPLED COMMENT SETTING
    GSPI1_MOSI Strap Bit
    iPD
    Display 0 = Not detected
    GPP_I6 / Rising edge of R138 IV@2.2K_5%_2 +3V
    SML0ALERT# [10] Port B 1 = Detected [13] DDPB_DATA
    eSPI or LPC Rising edge of 0 = LPC DDPB_CTRLDATA PCH_PWROK
    GPP_C5 / Detected iPD
    (FOR EC) RSMRST# 1 = eSPI R740 100K_1%_2 R741 *4.7K_1%_2
    SML0ALERT# +3V_DEEP_SUS
    iPD
    PCH_SPI1_SI_L
    Display Rising edge of 0 = Not detected
    Rising edge of GPP_I8 / Port C PCH_PWROK 1 = Detected R148 IV@2.2K_5%_2
    SPI0_MOSI Reserved RSMRST# PU is required DDPC_CTRLDATA [13,35] DDPC_DATA +3V
    R300 *4.7K_1%_2 R316 100K_1%_2 +3V_DEEP_SUS Detected iPD

    PCH_GPP_H15
    Display
    Rising edge of GPP_I10 / Port D Rising edge of 0 = Not detected R657 IV@2.2K_5%_2
    GPP_H15 / Reserved RSMRST# PU is required DDPD_CTRLDATA PCH_PWROK 1 = Detected [13,37] DDPD_DATA +3V
    SML3ALERT#
    R290 *100K_1%_2 R308 100K_1%_2 +3V_DEEP_SUS Detected
    iPD

    SMB1ALERT# [10] Display


    GPP_B23 / Rising edge of 0 = Disable Port F Rising edge of 0 = Not detected
    SML1ALERT# / Intel RSMRST# 1 = Enable GPP_F23 PCH_PWROK 1 = Detected
    R762 *20K_1%_2 R765 *150K_1%_4 +3V_DEEP_SUS Detected R306 *10K_1%_2 +3V
    PCHHOT# DCI-OOB [13] DDPF_DATA
    iPD iPD
    SPI1_IO2
    CNV_BRI_DT [11,54]
    GPP_J4 / XTAL Rising edge of 0 = 38.4MHz
    SPI0_IO2 Reserved Rising edge of PU is required R869 *4.7K_1%_2 R881 100K_1%_2 CNV_BRI_DT / Frequency RSMRST# 1 = 24MHzI R641 *4.7K_1%_2 R640 10K_1%_2
    RSMRST# +3V_DEEP_SUS +1.8V_DEEP_SUS
    UART0_RTS# Select iPD

    SPI1_IO3 CNV_RGI_DT [11,54]


    GPP_J6 / M.2 CNV Rising edge of 0 = iCNVi ENABLE
    CNV_RGI_DT / Mode RSMRST# 1 = iCNVi DISABLE R125 *100K_1%_2 R126 20K_1%_2
    SPI0_IO3 Reserved Rising edge of PU is required +1.8V_DEEP_SUS
    R870 *100_1%_2 R880 100K_1%_2 +3V_DEEP_SUS UART0_TXD Select PD by CNVi module
    RSMRST#
    B B
    GPP_J9 [11]
    Rising edge of 0 = VCCSPI = 3.3V
    R704 1K_1%_2
    GPP_J19 1.8V RSMRST# 1 = VCCSPI = 1.8V R159 10K_1%_2 R114 *4.7K_1%_2
    [57] ME_WR# ACZ_SDO [10] VCCSPI +1.8V_DEEP_SUS
    HDA_SDO / Flash Descriptor Rising edge of 0 = Enable
    I2S0_TXD Security Overried PCH_PWROK 1 = Disable
    iPD R698 *1K_1%_2 R694 *1K_1%_2 +3V_DEEP_SUS PCH_GPD7 [9]
    GPD7 Rising edge of
    Reserved DSW_PWROK PU is required R804 *100K_1%_2 R805 100K_1%_2 +3V_DEEP_SUS
    SML2ALERT#
    0 = Enable
    GPP_H12 / eSPI Flash Rising edge of 1 = Disable R845 *30K_5%_4 R860 *4.7K_1%_2
    SML2ALERT# Sharing Mode RSMRST# +3V_DEEP_SUS
    iPD

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    PCH 4/7 (GPIO/MISC)
    Date: Tuesday, June 23, 2020 Sheet 12 of 77
    5 4 3 2 1
    5 4 3 2 1

    +3V_DEEP_SUS

    U27K
    I2C0_SCL
    I2C0_SDA
    ISH_I2C0_SCL
    ISH_I2C0_SDA
    R184
    R742
    R879
    R319
    2.2K_5%_2
    2.2K_5%_2
    2.2K_5%_2
    2.2K_5%_2
    RAM ID
    R2581 SP@10K_5%_4 RAM_ID0 R2580 SP@10K_5%_4
    +3V_S5
    13
    GSPI1_MOSI BA26 PEN_I2C_SCL R91 2.2K_5%_2 R2583 SP@10K_5%_4 RAM_ID1 R2582 SP@10K_5%_4
    [12] GSPI1_MOSI GPP_B22/GSPI1_MOSI TBT_FORCE_PWR_R PEN_I2C_SDA RAM_ID2
    BD30 BA20 R178 *Short_4 R93 2.2K_5%_2 R2585 SP@10K_5%_4 R2584 SP@10K_5%_4
    GPP_B21/GSPI1_MISO GPP_D9/ISH_SPI_CS#/GSPI2_CS0# TBT_FORCE_PWR [41] PEN_I2C_IRQ RAM_ID3
    AU26 BB20 R191 10K_1%_2 R2587 SP@10K_5%_4 R2586 SP@10K_5%_4
    DGPU_PWROK_Q GPP_B20/GSPI1_CLK GPP_D10/ISH_SPI_CLK/GSPI2_CLK PEN_FWE_OUT [34]
    AW26 BB16
    [24] DGPU_PWROK_Q GPP_B19/GSPI1_CS0# GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO AN18 CNVI_EN# TP200
    PEN_PDCT_IN [34] EMR
    GSPI0_MOSI BE30 GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI GPP_C11 R188 *100K_1%_2
    [12] GSPI0_MOSI DGPU_PW R_EN GPP_B18/GSPI0_MOSI UART2_CTS#
    BD29 BF14 R185 *49.9K_1%_4 ID3 ID2 ID1 ID0 Vendor Vendor PN Quanta PN
    [24] DGPU_PW R_EN DGPU_HOLD_RST# GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#/CNV_WCEN PEN_GPIO0 [34]
    BF29 AR18
    [19] DGPU_HOLD_RST# DGPU_PW _CTRL# GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN PEN_GPIO1 [34] UART2_RTS#
    BB26 BF17 R182 2.2K_5%_2 0 0 0 0 Hynix 8Gb H5AN8G6NCJR-VKC AKD5QGSTW13
    GPP_B15/GSPI0_CS0# GPP_D14/ISH_UART0_TXD/I2C2_SCL
    GPP_D13/ISH_UART0_RXD/I2C2_SDA
    BE17 TBT_HTPLG
    TP35 BB24
    EMI RESERVE UART2_TXD R717 *49.9K_1%_4 PCH PD 20K 0 0 0 1 Micron 8Gb MT40A512M16TB-062E:J AKD5QGSTL23
    TP100 GPP_C8 BE23 GPP_C9/UART0_TXD EC12 10p/25V_2 ISH_I2C0_SCL UART2_RXD R175 *49.9K_1%_4
    GPP_C11 AP24 GPP_C8/UART0_RXD ISH_GP0_GSENSOR 0 0 1 0 HYNIX 16Gb H5ANAG6NCMR-VKC AKD5RGUTW08
    +3V_DEEP_SUS R190 10K_1%_2 R90 10K_1%_2
    BA24 GPP_C11/UART0_CTS# +3V
    [57,59] TPD_INT# GPP_C10/UART0_RTS# AG45
    0 0 1 1 SAMSUNG 16Gb K4AAG165WA-BCWE AKD5RGUT511
    GPP_H20/ISH_I2C0_SCL ISH_I2C0_SCL [58] DDPB_CLK
    BD21 AH46 R154 IV@2.2K_5%_2
    D PEN_I2C_IRQ AW24 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H19/ISH_I2C0_SDA ISH_I2C0_SDA [58] G SENSOR DDPC_CLK R143 IV@2.2K_5%_2 D
    [34] PEN_I2C_IRQ GPP_C14/UART1_RTS#/ISH_UART1_RTS# DDPD_CLK
    AP21 R137 IV@2.2K_5%_2
    AU24 GPP_C13/UART1_TXD/ISH_UART1_TXD AH47 ISH_I2C1_SCL TP121 DDPF_CLK R835 *10K_1%_2
    GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL AH48 ISH_I2C1_SDA TP122
    UART2_CTS# AV21 GPP_H21/ISH_I2C1_SDA For Debug
    R181 *Short_4 UART2_RTS# AW21 GPP_C23/UART2_CTS# SKTOCC_N_R R307 *100K_1%_2
    [41] TBT_HTPLG UART2_TXD BE20 GPP_C22/UART2_RTS# AV34
    TP33 S_GPIO R174 *Short_4 UART2_RXD BD20 GPP_C21/UART2_TXD GPP_A23/ISH_GP5 AW32
    GPP_C20/UART2_RXD GPP_A22/ISH_GP4 BA33 TP123
    BE21 GPP_A21/ISH_GP3 BE34
    GPP_C19/I2C1_SCL GPP_A20/ISH_GP2 SENSOR_MODE2_PCH [58]
    BF21 BD34
    I2C0_SCL GPP_C18/I2C1_SDA GPP_A19/ISH_GP1 ISH_GP0_GSENSOR SENSOR_MODE1_PCH [58] +3V
    BC22 BF35
    [59] I2C0_SCL I2C0_SDA GPP_C17/I2C0_SCL GPP_A18/ISH_GP0 ISH_GP0_GSENSOR [58]
    BF23 BD38
    TPD [59] I2C0_SDA GPP_C16/I2C0_SDA GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
    PEN_I2C_SDA BE15 R144 *1K_1%_2 EDP_HPD_CPU R147 100K_1%_2
    [10,34] PEN_I2C_SDA PEN_I2C_SCL GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
    11 OF 13
    BE14
    EMR [10,34] PEN_I2C_SCL GPP_D23/ISH_I2C2_SCL/I2C3_SCL R753 *10K_1%_2 DGPU_PWR_EN R752 10K_1%_2
    PCH_CFL-H_874P

    R755 *10K_1%_2 DGPU_HOLD_RST# R754 10K_1%_2


    TP99 UART2_TXD
    TP34 UART2_RXD R209 10K_1%_2 DGPU_PW ROK_Q R208 *10K_1%_2

    U27E
    AL13 DDPB_CLK
    GPP_I5/DDPB_CTRLCLK AR8 DDPB_DATA
    GPP_I6/DDPB_CTRLDATA DDPB_DATA [12]
    R149 *Short_4 DDPB_HPD0 AT6 AN13 DDPC_CLK
    TBT [38] TBT_DDPB_HPD0 DP_HPD_PCH_R AN10 GPP_I0/DDPB_HPD0/DISP_MISC0 GPP_I7/DDPC_CTRLCLK AL10 DDPC_DATA DDPC_CLK [35]
    HDMI_HPD_PCH_R GPP_I1/DDPC_HPD1/DISP_MISC1 GPP_I8/DDPC_CTRLDATA DDPD_CLK DDPC_DATA [12,35] +3V
    AP9 AL9
    [57] SIO_EXT_SCI#
    R177 SIO_EXT_SCI# AL15 GPP_I2/DPPD_HPD2/DISP_MISC2
    GPP_I3/DPPE_HPD3/DISP_MISC3
    GPP_I9/DDPD_CTRLCLK
    GPP_I10/DDPD_CTRLDATA
    AR3 DDPD_DATA
    DDPF_DATA
    DDPD_CLK
    DDPD_DATA
    [37]
    [12,37]
    BACKDRIVE PROTECT
    AN40
    +3V_DEEP_SUS GPP_F23/DDPF_CTRLDATA DDPF_CLK DDPF_DATA [12]
    AT49
    GPP_F22/DDPF_CTRLCLK
    10K_1%_2 AP41
    EDP_HPD_CPU AN6 GPP_F14/EXT_PWR_GATE#/PS_ON# SKTOCC_N_R [2]
    R119
    GPP_I4/EDP_HPD/DISP_MISC4

    5
    [34] EDP_HPD_CPU M45 RAM_ID3
    GPP_K23/IMGCLKOUT1 1M_1%_2
    L48 RAM_ID2
    GPP_K22/IMGCLKOUT0 T45 RAM_ID1 3 4 DP_HPD_PCH_R
    GPP_K21 T46 RAM_ID0 DP [35] DP_HPD_PCH
    GPP_K20 AJ47 R118 *100K_1%_2 Q14A
    5 OF 13 GPP_H23/TIME_SYNC0 PJX138K
    PCH_CFL-H_874P
    +3V

    C C

    R120

    2
    1M_1%_2
    6 1 HDMI_HPD_PCH_R
    HDMI [21,37] HDMI_HPD_PCH HDMI_HPD_PCH_R [11]
    R123 *100K_1%_2 Q14B
    PJX138K

    PLTRST#(CLG) TBT_PLTRST# (RTD3)


    high UMA Only
    DGPU_PW_CTRL# GPU power is control by PCH
    R883 *0_5%_2 low GPIO (Discrete, SG or Optimize)
    +3V_DEEP_SUS [13,19,47,51,53,54,57] PLTRST#

    C695 0.1u/6.3V_2 +VCC3P3_SX +3V


    5

    [13,19,47,51,53,54,57] PLTRST# R886 *Short_2

    5
    1
    4 PLTRST# R884 *0_5%_2 1 R94 EV@100K_1%_4 DGPU_PW_CTRL# R92 IV@1K_1%_4
    PCI_PLTRST# PLTRST# [13,19,47,51,53,54,57] [12,13] PCI_PLTRST#
    2 4
    [12,13] PCI_PLTRST# TBT_PLTRST# [40]
    2
    [11] PCH_TBT_PLTRST#
    U26 R743 DGPU_PWROK PD on GPU side
    3

    MC74VHC1G08DFT2G 100K_1%_2 U30

    3
    MC74VHC1G08DFT2G R873
    R882 100K_1%_2
    *100K_1%_2
    DGPU_PW_CTRL# VGA H/W Setup
    Signal Menu

    UMA Only 1 UMA Hidden UMA boot

    SG/Optimise 0 GPU Hidden GPU boot

    B B

    Vinafix.com

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    PCH 5/7 (GPIO)
    Date: Tuesday, June 23, 2020 Sheet 13 of 77
    5 4 3 2 1
    5 4 3 2 1

    +1V_S5

    AA22
    AA23
    AB20
    U27H
    VCCPRIM_1P051
    VCCPRIM_1P052
    VCCPRIM_3P32
    AW9

    BF47 DCPRTC C716 0.1u/6.3V_2


    +3V_DEEP_SUS
    +VCCPGPPA
    +1.8V_DEEP_SUS +3V_DEEP_SUS
    14
    C338 C359 C328 AB22 VCCPRIM_1P053 DCPRTC1 BG47 C715 0.1u/6.3V_2 R216 *0_5%_6
    1u/10V_2 1u/10V_2 AB23 VCCPRIM_1P054 DCPRTC2
    22u/6.3V_6 VCCPRIM_1P055
    AB27 V23 R224 *Short_6
    VCCPRIM_1P056 VCCPRIM_3P35 +3V_DEEP_SUS
    AB28
    AB30 VCCPRIM_1P057 AN44 +3V_VCCSPI R280 *Short_4
    D AD20 VCCPRIM_1P058 VCCSPI C364 D
    AD23 VCCPRIM_1P059 BC49 10mils +3V_RTC 0.1u/6.3V_2
    AD27 VCCPRIM_1P0510 VCCRTC1 BD49 C731 0.1u/6.3V_2
    AD28 VCCPRIM_1P0511 VCCRTC2 C727 0.1u/6.3V_2
    AD30 VCCPRIM_1P0512 AN21 C724 1u/10V_2
    AF23 VCCPRIM_1P0513 VCCPGPPG_3P3 C733 0.1u/6.3V_2
    AF27 VCCPRIM_1P0516 AY8
    AF30 VCCPRIM_1P0517 VCCPRIM_3P33 BB7 C361 4.7u/6.3V_4
    VCCPRIM_1P0518 VCCPRIM_3P34 +3V_S5 +3V_DEEP_SUS
    U26 AC35
    VCCPRIM_1P0523 VCCPGPPHK1 +3V_DEEP_SUS
    U29 AC36
    V25 VCCPRIM_1P0524 VCCPGPPHK2 AE35 R128 *Short_6
    V27 VCCPRIM_1P0525 VCCPGPPEF1 AE36
    V28 VCCPRIM_1P0526 VCCPGPPEF2 R124 *Short_6
    V30 VCCPRIM_1P0527 AN24
    V31 VCCPRIM_1P0528 VCCPGPPD AN26
    EC2 0.1u/6.3V_2 VCCPRIM_1P0529 VCCPGPPBC1 AP26 C302
    AD31 VCCPGPPBC2
    VCCPRIM_1P0514 0.1u/6.3V_2
    +1V_S5 R176 *Short_4 AN32 +VCCPGPPA
    AE17 VCCPGPPA
    VCCPRIM_1P0515
    +VCCDUSB W22 AT44 +3V_DEEP_SUS
    R826 *0_5%_4 W23 VCCDUSB_1P051 VCCPRIM_3P31
    VCCDUSB_1P052 BE48 R832 *Short_4
    VCCDSW_3P31 +3V_DEEP_SUS
    C712 1u/10V_2 +VCCDSW_1.05V BG45 BE49 C721 0.1u/6.3V_2
    C VCCDSW_1P051 VCCDSW_3P32 C
    C362 1u/10V_2 BG46
    VCCDSW_1P052 BB14 +V3.3DX_ADO R162 2 1 BLM15AG121SN1D_0.5A
    VCCHDA +3V_DEEP_SUS +1.8V_S5 +1.8V_DEEP_SUS
    R245 *Short_6 +VCCPRIM_MPHY W31
    +1V_S5 VCCPRIM_MPHY_1P05
    C662 0.1u/6.3V_2 AG19 C306 0.1u/6.3V_2
    D1 VCCPRIM_1P83 AG20
    +1V_S5 VCCPRIM_1P0521 VCCPRIM_1P84
    C674 1u/10V_2 E1 AN15 R163 *0_5%_6

    1.8V LDO OUTPUT


    VCCPRIM_1P0522 VCCPRIM_1P85 AR15
    VCCPRIM_1P86 +1.8V_DEEP_SUS
    R872 *Short_8 +VCCAMPHYPLL C49 BB11 C308 0.1u/6.3V_2 NC [LDO MODE]
    +1V_S5 VCCAMPHYPLL_1P051 VCCPRIM_1P87
    C719 22u/6.3V_6 D49 C318 4.7u/6.3V_4 C297
    C725 1u/10V_2 C730 22u/6.3V_6 E49 VCCAMPHYPLL_1P052 AF19
    VCCAMPHYPLL_1P053 VCCPRIM_1P81 *0.1u/6.3V_2
    AF20 VCCPHVLDO_1P8 R171 *Short_4
    R183 *Short_6 +VCCA_XTAL P2 VCCPRIM_1P82 C319 1u/10V_2
    +1V_S5 VCCA_XTAL_1P051
    C288 22u/6.3V_6 P3 AG31
    VCCA_XTAL_1P052 VCCPRIM_1P0520 +1V_S5
    C310 22u/6.3V_6 W19 AF31
    EC9 *10p/25V_2 W20 VCCA_SRC_1P051 VCCPRIM_1P0519
    VCCA_SRC_1P052 AK22 +VCCDPHY R195 *CNVI@0_5%_6
    VCCPRIM_1P241 +1.2VSUS
    +VCCAPLL_1 C1 AK23
    +1V_S5 VCCAPLL_1P054 VCCPRIM_1P242 +1.2VSUS +3V_S5
    C665 *47u/6.3V_8 C660 1u/10V_2 C2
    VCCAPLL_1P055 AJ22 C333 1u/10V_2
    R186 *Short_6 +VCCA_BCLK V19 VCCDPHY_1P241 AJ23
    +1V_S5 VCCA_BCLK_1P05 VCCDPHY_1P242
    C325 1u/10V_2 BG5 C663 4.7u/6.3V_4
    EC10 *10p/25V_2 B1 VCCDPHY_1P243 C337 C283
    B2 VCCAPLL_1P051 K47 VCCMPHY_SENSE
    VCCAPLL_1P052 VCCMPHY_SENSE TP49 0.1u/6.3V_2 0.1u/6.3V_2
    B +VCCAPLL_2 B3 K46 VSSMPHY_SENSE B
    +1V_S5 VCCAPLL_1P053 8 OF 13 VSSMPHY_SENSE TP44
    C673 1u/10V_2

    C669 *47u/6.3V_8 PCH_CFL-H_874P

    +3V_DEEP_SUS
    +1V_S5 +VCCAPLL_1
    +VCCAPLL_2
    +VCCPRIM_MPHY
    +VCCAMPHYPLL

    C332 C327 C371 C331 C387 C339 C346 C366 C345 C358 C341 C357 C342 C336 C720 C373 C672 C661
    1u/10V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 4.7u/6.3V_4 0.1u/6.3V_2 0.1u/6.3V_2 10u/6.3V_4 10u/6.3V_4 4.7u/6.3V_4 1u/10V_2 2.2u/10V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    PCH 6/7 (POWER)
    Date: Tuesday, June 23, 2020 Sheet 14 of 77
    5 4 3 2 1
    5 4 3 2 1

    U27I

    15
    A2 AL12 U27L
    A28 VSS_1 VSS_73 AL17 BG3 M24
    A3 VSS_2 VSS_74 AL21 BG33 VSS_145 VSS_196 M32
    A33 VSS_3 VSS_75 AL24 BG37 VSS_146 VSS_197 M34
    A37 VSS_4 VSS_76 AL26 BG4 VSS_147 VSS_198 M49
    A4 VSS_5 VSS_77 AL29 BG48 VSS_148 VSS_199 M5
    A45 VSS_6 VSS_78 AL33 C12 VSS_149 VSS_200 N12
    A46 VSS_7 VSS_79 AL38 C25 VSS_150 VSS_201 N16
    A47 VSS_8 VSS_80 AM1 C30 VSS_151 VSS_202 N34
    D A48 VSS_9 VSS_81 AM18 C4 VSS_152 VSS_203 N35 D
    A5 VSS_10 VSS_82 AM32 C48 VSS_153 VSS_204 N37
    A8 VSS_11 VSS_83 AM49 C5 VSS_154 VSS_205 N38
    AA19 VSS_12 VSS_84 AN12 D12 VSS_155 VSS_206 P26 U27J
    AA20 VSS_13 VSS_85 AN16 D16 VSS_156 VSS_207 P29 Y14 PGDMON
    AA25 VSS_14 VSS_86 AN34 D17 VSS_157 VSS_208 P4 RSVD#Y14 Y15
    AA27 VSS_15 VSS_87 AN38 D30 VSS_158 VSS_209 P46 RSVD#Y15
    AA28 VSS_16 VSS_88 AP4 D33 VSS_159 VSS_210 R12 U37 R161
    AA30 VSS_17 VSS_89 AP46 D8 VSS_160 VSS_211 R16 RSVD#U37 U35 *1K_1%_2
    AA31 VSS_18 VSS_90 AR12 E10 VSS_161 VSS_212 R26 RSVD#U35
    AA49 VSS_19 VSS_91 AR16 E13 VSS_162 VSS_213 R29 N32
    AA5 VSS_20 VSS_92 AR34 E15 VSS_163 VSS_214 R3 RSVD#N32 R32
    AB19 VSS_21 VSS_93 AR38 E17 VSS_164 VSS_215 R34 RSVD#R32
    AB25 VSS_22 VSS_94 AT1 E19 VSS_165 VSS_216 R38 AH15
    AB31 VSS_23 VSS_95 AT16 E22 VSS_166 VSS_217 R4 RSVD#AH15 AH14
    AC12 VSS_24 VSS_96 AT18 E24 VSS_167 VSS_218 T17 RSVD#AH14
    AC17 VSS_25 VSS_97 AT21 E26 VSS_168 VSS_219 T18
    AC33 VSS_26 VSS_98 AT24 E31 VSS_169 VSS_220 T32 10 OF 13 AL2 H_PREQ#_L R648 *Short_4
    VSS_27 VSS_99 VSS_170 VSS_221 PREQ# H_PREQ# [2]
    AC38 AT26 E33 T4 AM5 H_PRDY#_L R649 *Short_4
    VSS_28 VSS_100 VSS_171 VSS_222 PRDY# H_PRDY# [2]
    AC4 AT29 E35 T49 AM4 H_TRST#_L R650 *Short_4
    VSS_29 VSS_101 VSS_172 VSS_223 CPU_TRST# H_TRST# [2]
    AC46 AT32 E40 T5 AK3 PCH_2_CPU_TRIG_R R647 *Short_4
    VSS_30 VSS_102 VSS_173 VSS_224 TRIGGER_OUT PCH_2_CPU_TRIG [8]
    AD1 AT34 E42 T7 AK2
    VSS_31 VSS_103 VSS_174 VSS_225 TRIGGER_IN CPU_2_PCH_TRIG [8]
    AD19 AT45 E8 U12
    AD2 VSS_32 VSS_104 AV11 F41 VSS_175 VSS_226 U15 PCH_CFL-H_874P
    C VSS_33 VSS_105 VSS_176 VSS_227 C
    AD22 AV39 F43 U17
    AD25 VSS_34 VSS_106 AW10 F47 VSS_177 VSS_228 U21
    AD49 VSS_35 VSS_107 AW4 G44 VSS_178 VSS_229 U24 H_PRDY#_L R673 *51_1%_2
    AE12 VSS_36 VSS_108 AW40 G6 VSS_179 VSS_230 U33 H_TRST#_L R675 *51_1%_2
    AE33 VSS_37 VSS_109 AW46 H8 VSS_180 VSS_231 U38
    AE38 VSS_38 VSS_110 B47 J10 VSS_181 VSS_232 V20
    AE4 VSS_39 VSS_111 B48 J26 VSS_182 VSS_233 V22
    AE46 VSS_40 VSS_112 B49 J29 VSS_183 VSS_234 V4
    AF22 VSS_41 VSS_113 BA12 J4 VSS_184 VSS_235 V46
    AF25
    AF28
    VSS_42
    VSS_43
    VSS_114
    VSS_115
    BA14
    BA44
    J40
    J46
    VSS_185
    VSS_186
    VSS_236
    VSS_237
    W25
    W27
    Vinafix.com
    AG1 VSS_44 VSS_116 BA5 J47 VSS_187 VSS_238 W28
    AG22 VSS_45 VSS_117 BA6 J48 VSS_188 VSS_239 W30
    AG23 VSS_46 VSS_118 BB41 J9 VSS_189 VSS_240 Y10
    AG25 VSS_47 VSS_119 BB43 K11 VSS_190 VSS_241 Y12
    AG27 VSS_48 VSS_120 BB9 K39 VSS_191 VSS_242 Y17
    AG28 VSS_49 VSS_121 BC10 M16 VSS_192 VSS_243 Y33
    AG30 VSS_50 VSS_122 BC13 M18 VSS_193 VSS_244 Y38
    AG49 VSS_51 VSS_123 BC15 M21 VSS_194 VSS_245 Y9
    AH12 VSS_52 VSS_124 BC19 VSS_195 VSS_246
    AH17 VSS_53 VSS_125 BC24 12 OF 13
    AH33 VSS_54 VSS_126 BC26 PCH_CFL-H_874P
    AH38 VSS_55 VSS_127 BC31
    AJ19 VSS_56 VSS_128 BC35
    B B
    AJ20 VSS_57 VSS_129 BC40
    AJ25 VSS_58 VSS_130 BC45
    AJ27 VSS_59 VSS_131 BC8
    AJ28 VSS_60 VSS_132 BD43
    AJ30 VSS_61 VSS_133 BE44
    AJ31 VSS_62 VSS_134 BF1
    AK19 VSS_63 VSS_135 BF2
    AK20 VSS_64 VSS_136 BF3
    AK25 VSS_65 VSS_137 BF48
    AK27 VSS_66 VSS_138 BF49
    AK28 VSS_67 VSS_139 BG17
    AK30 VSS_68 VSS_140 BG2
    AK31 VSS_69 VSS_141 BG22
    AK4 VSS_70 VSS_142 BG25
    AK46 VSS_71 9 OF VSS_143
    13 BG28
    VSS_72 VSS_144
    PCH_CFL-H_874P

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    PCH 7/7 (GND)
    Date: Tuesday, June 23, 2020 Sheet 15 of 77
    5 4 3 2 1
    5 4 3 2 1

    APS
    16
    D D

    C C

    B B

    A A
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    XDP & APS
    Date: Tuesday, June 23, 2020 Sheet 16 of 77
    5 4 3 2 1
    5 4 3 2 1

    M_A_DQ[63:0] [4]
    M_A_DQSP[7:0]
    M_A_DQSN[7:0]
    [4,17]
    [4,17]
    BYTE6_48-55 BYTE4_32-39 BYTE2_16-23 BYTE1_8-15

    +VREFCA_CHA_DIMM M1
    B1
    U23

    VREFCA DQL0
    BYTE7_56-63
    G2
    F7
    M_A_DQ52
    M_A_DQ54
    +VREFCA_CHA_DIMM M1
    B1
    U8

    VREFCA DQL0
    BYTE5_40-47
    G2
    F7
    M_A_DQ36
    M_A_DQ34
    +VREFCA_CHA_DIMM M1
    B1
    U22

    VREFCA DQL0
    BYTE3_24-31
    G2
    F7
    M_A_DQ22
    M_A_DQ17
    +VREFCA_CHA_DIMM M1
    B1
    U7

    VREFCA DQL0
    BYTE0_0-7
    G2
    F7
    M_A_DQ9
    M_A_DQ15
    17
    +2.5VSUS VPP#B1 DQL1 +2.5VSUS VPP#B1 DQL1 +2.5VSUS VPP#B1 DQL1 +2.5VSUS VPP#B1 DQL1
    R9 H3 M_A_DQ51 R9 H3 M_A_DQ37 R9 H3 M_A_DQ19 R9 H3 M_A_DQ12
    VPP#R9 DQL2 H7 M_A_DQ50 VPP#R9 DQL2 H7 M_A_DQ38 VPP#R9 DQL2 H7 M_A_DQ20 VPP#R9 DQL2 H7 M_A_DQ14
    C611 DQL3 H2 M_A_DQ53 C252 DQL3 H2 M_A_DQ32 C604 DQL3 H2 M_A_DQ23 C248 DQL3 H2 M_A_DQ8
    DQL4 H8 M_A_DQ48 DQL4 H8 M_A_DQ35 DQL4 H8 M_A_DQ21 DQL4 H8 M_A_DQ10
    [4] M_A_A[16:0] DQL5 DQL5 DQL5 DQL5
    68p/50V_4 M_A_A0 P3 J3 M_A_DQ55 68p/50V_4 M_A_A0 P3 J3 M_A_DQ33 68p/50V_4 M_A_A0 P3 J3 M_A_DQ18 68p/50V_4 M_A_A0 P3 J3 M_A_DQ13
    M_A_A1 P7 A0 DQL6 J7 M_A_DQ49 M_A_A1 P7 A0 DQL6 J7 M_A_DQ39 M_A_A1 P7 A0 DQL6 J7 M_A_DQ16 M_A_A1 P7 A0 DQL6 J7 M_A_DQ11
    M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7
    M_A_A3 N7 A2 SI1, 0427 RF M_A_A3 N7 A2 M_A_A3 N7 A2 SI1, 0427 RF M_A_A3 N7 A2
    D
    SI1, 0427 RF M_A_A4 N3 A3 A3 M_A_DQ58 M_A_A4 N3 A3 A3 M_A_DQ45 SI1, 0427 RF M_A_A4 N3 A3 A3 M_A_DQ27 M_A_A4 N3 A3 A3 M_A_DQ7
    D

    M_A_A5 P8 A4 DQU0 B8 M_A_DQ57 M_A_A5 P8 A4 DQU0 B8 M_A_DQ42 M_A_A5 P8 A4 DQU0 B8 M_A_DQ24 M_A_A5 P8 A4 DQU0 B8 M_A_DQ5
    M_A_A6 P2 A5 DQU1 C3 M_A_DQ63 M_A_A6 P2 A5 DQU1 C3 M_A_DQ40 M_A_A6 P2 A5 DQU1 C3 M_A_DQ31 M_A_A6 P2 A5 DQU1 C3 M_A_DQ1
    M_A_A7 R8 A6 DQU2 C7 M_A_DQ59 M_A_A7 R8 A6 DQU2 C7 M_A_DQ47 M_A_A7 R8 A6 DQU2 C7 M_A_DQ26 M_A_A7 R8 A6 DQU2 C7 M_A_DQ2
    M_A_A8 R2 A7 DQU3 C2 M_A_DQ56 M_A_A8 R2 A7 DQU3 C2 M_A_DQ41 M_A_A8 R2 A7 DQU3 C2 M_A_DQ29 M_A_A8 R2 A7 DQU3 C2 M_A_DQ3
    M_A_A9 R7 A8 DQU4 C8 M_A_DQ60 M_A_A9 R7 A8 DQU4 C8 M_A_DQ43 M_A_A9 R7 A8 DQU4 C8 M_A_DQ25 M_A_A9 R7 A8 DQU4 C8 M_A_DQ4
    M_A_A10 M3 A9 DQU5 D3 M_A_DQ61 M_A_A10 M3 A9 DQU5 D3 M_A_DQ44 M_A_A10 M3 A9 DQU5 D3 M_A_DQ28 M_A_A10 M3 A9 DQU5 D3 M_A_DQ6
    M_A_A11 T2 A10/AP DQU6 D7 M_A_DQ62 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQ46 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQ30 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQ0
    M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7
    M_A_A13 T8 A12/BC +1.2VSUS M_A_A13 T8 A12/BC +1.2VSUS M_A_A13 T8 A12/BC +1.2VSUS M_A_A13 T8 A12/BC +1.2VSUS
    M_A_A14 L2 A13 M_A_A14 L2 A13 M_A_A14 L2 A13 M_A_A14 L2 A13
    M_A_A15 M8 WE_n/A14 B3 M_A_A15 M8 WE_n/A14 B3 M_A_A15 M8 WE_n/A14 B3 M_A_A15 M8 WE_n/A14 B3
    M_A_A16 L8 CAS_n/A15 VDD#B3 B9 M_A_A16 L8 CAS_n/A15 VDD#B3 B9 M_A_A16 L8 CAS_n/A15 VDD#B3 B9 M_A_A16 L8 CAS_n/A15 VDD#B3 B9
    RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1
    VDD#D1 G7 VDD#D1 G7 VDD#D1 G7 VDD#D1 G7
    VDD#G7 J1 VDD#G7 J1 VDD#G7 J1 VDD#G7 J1
    M_A_BS#0 N2 VDD#J1 J9 M_A_BS#0 N2 VDD#J1 J9 M_A_BS#0 N2 VDD#J1 J9 M_A_BS#0 N2 VDD#J1 J9
    [4] M_A_BS#0 BA0 VDD#J9 BA0 VDD#J9 BA0 VDD#J9 BA0 VDD#J9
    M_A_BS#1 N8 L1 M_A_BS#1 N8 L1 M_A_BS#1 N8 L1 M_A_BS#1 N8 L1
    [4] M_A_BS#1 M_A_BG#0 BA1 VDD#L1 M_A_BG#0 BA1 VDD#L1 M_A_BG#0 BA1 VDD#L1 M_A_BG#0 BA1 VDD#L1
    [4] M_A_BG#0 M2 L9 M2 L9 M2 L9 M2 L9
    BG0 VDD#L9 R1 BG0 VDD#L9 R1 BG0 VDD#L9 R1 BG0 VDD#L9 R1
    VDD#R1 T9 VDD#R1 T9 VDD#R1 T9 VDD#R1 T9
    VDD#T9 VDD#T9 VDD#T9 VDD#T9
    M_A_DIM0_CLKP0 K7 A1 M_A_DIM0_CLKP0 K7 A1 M_A_DIM0_CLKP0 K7 A1 M_A_DIM0_CLKP0 K7 A1
    [4] M_A_DIM0_CLKP0 CK_t VDDQ#A1 CK_t VDDQ#A1 CK_t VDDQ#A1 CK_t VDDQ#A1
    M_A_DIM0_CLKN0 K8 A9 M_A_DIM0_CLKN0 K8 A9 M_A_DIM0_CLKN0 K8 A9 M_A_DIM0_CLKN0 K8 A9
    [4] M_A_DIM0_CLKN0 M_A_CKE0 CK_c VDDQ#A9 M_A_CKE0 CK_c VDDQ#A9 M_A_CKE0 CK_c VDDQ#A9 M_A_CKE0 CK_c VDDQ#A9
    [4] M_A_CKE0 K2 C1 K2 C1 K2 C1 K2 C1
    CKE VDDQ#C1 D9 CKE VDDQ#C1 D9 CKE VDDQ#C1 D9 CKE VDDQ#C1 D9
    VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2
    M_A_ODT0 K3 VDDQ#F2 F8 M_A_ODT0 K3 VDDQ#F2 F8 M_A_ODT0 K3 VDDQ#F2 F8 M_A_ODT0 K3 VDDQ#F2 F8
    [4] M_A_ODT0 M_A_CS#0 L7 ODT VDDQ#F8 G1
    0ohm for (SDP) M_A_CS#0 L7 ODT VDDQ#F8 G1
    0ohm for (SDP) M_A_CS#0 L7 ODT VDDQ#F8 G1
    0ohm for (SDP) M_A_CS#0 L7 ODT VDDQ#F8 G1
    0ohm for (SDP)
    [4] M_A_CS#0 CS VDDQ#G1 240ohm 1% for (DDP) CS VDDQ#G1 240ohm 1% for (DDP) CS VDDQ#G1 240ohm 1% for (DDP) CS VDDQ#G1 240ohm 1% for (DDP)
    G9 G9 G9 G9
    M_A_DQSP6 G3 VDDQ#G9 J2 M_A_DQSP4 G3 VDDQ#G9 J2 M_A_DQSP2 G3 VDDQ#G9 J2 M_A_DQSP1 G3 VDDQ#G9 J2
    [4,17] M_A_DQSP6 M_A_DQSP7 DQSL_t VDDQ#J2 [4,17] M_A_DQSP4 M_A_DQSP5 DQSL_t VDDQ#J2 [4,17] M_A_DQSP2 M_A_DQSP3 DQSL_t VDDQ#J2 [4,17] M_A_DQSP1 M_A_DQSP0 DQSL_t VDDQ#J2
    B7 J8 B7 J8 B7 J8 B7 J8
    [4,17] M_A_DQSP7 DQSU_t VDDQ#J8 [4,17] M_A_DQSP5 DQSU_t VDDQ#J8 [4,17] M_A_DQSP3 DQSU_t VDDQ#J8 [4,17] M_A_DQSP0 DQSU_t VDDQ#J8
    M_A_DQSN6 F3 B2 M_A_DQSN4 F3 B2 M_A_DQSN2 F3 B2 M_A_DQSN1 F3 B2
    [4,17] M_A_DQSN6 M_A_DQSN7 DQSL_c VSS#B2 [4,17] M_A_DQSN4 M_A_DQSN5 DQSL_c VSS#B2 [4,17] M_A_DQSN2 M_A_DQSN3 DQSL_c VSS#B2 [4,17] M_A_DQSN1 M_A_DQSN0 DQSL_c VSS#B2
    A7 E1 A7 E1 A7 E1 A7 E1
    [4,17] M_A_DQSN7 DQSU_c VSS#E1 [4,17] M_A_DQSN5 DQSU_c VSS#E1 [4,17] M_A_DQSN3 DQSU_c VSS#E1 [4,17] M_A_DQSN0 DQSU_c VSS#E1
    E9 R634 SP@0_5%_4 E9 R113 SP@0_5%_4 E9 R636 SP@0_5%_4 E9 R111 SP@0_5%_4
    VSS#E9 G8 VSS#E9 G8 VSS#E9 G8 VSS#E9 G8
    C VSS#G8 VSS#G8 VSS#G8 VSS#G8 C
    K1 K1 K1 K1
    VSS#K1 K9 VSS#K1 K9 VSS#K1 K9 VSS#K1 K9
    E7 VSS#K9 M9 M_A_BG#1_1 R621 M_A_BG#1 E7 VSS#K9 M9 M_A_BG#1_2 R108 M_A_BG#1 E7 VSS#K9 M9 M_A_BG#1_3 R625 M_A_BG#1 E7 VSS#K9 M9 M_A_BG#1_4 R107 M_A_BG#1
    DML_n/DBIL_n VSS#M9 M_A_BG#1 [4] DML_n/DBIL_n VSS#M9 DML_n/DBIL_n VSS#M9 DML_n/DBIL_n VSS#M9
    +1.2VSUS E2 N1 SP@0_5%_4 E2 N1 SP@0_5%_4 +1.2VSUS E2 N1 SP@0_5%_4 +1.2VSUS E2 N1 SP@0_5%_4
    DMU_n/DBIU_nVSS#N1 T1 DMU_n/DBIU_nVSS#N1 T1 DMU_n/DBIU_nVSS#N1 T1 DMU_n/DBIU_nVSS#N1 T1
    VSS#T1 VSS#T1 VSS#T1 VSS#T1

    C610 *0.1U/16V_4 NC for (SDP) +1.2VSUS NC for (SDP) NC for (SDP) NC for (SDP)
    DDR_DRAMRST# P1 A2 0ohm for (DDP) DDR_DRAMRST# P1 A2 0ohm for (DDP) DDR_DRAMRST# P1 A2 0ohm for (DDP) DDR_DRAMRST# P1 A2 0ohm for (DDP)
    [10,18] DDR_DRAMRST# RESET_n VSSQ#A2 RESET_n VSSQ#A2 RESET_n VSSQ#A2 RESET_n VSSQ#A2
    R633 240_1%_4 M_A1_ZQ0 F9 A8 R112 240_1%_4 M_A2_ZQ0 F9 A8 R635 240_1%_4 M_A3_ZQ0 F9 A8 R110 240_1%_4 M_A4_ZQ0 F9 A8
    N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9
    TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2
    VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8
    DDR0_ALERT# P9 VSSQ#D8 E3 DDR0_ALERT# P9 VSSQ#D8 E3 DDR0_ALERT# P9 VSSQ#D8 E3 DDR0_ALERT# P9 VSSQ#D8 E3
    [4] DDR0_ALERT# DDRA_ACT# ALERT_n VSSQ#E3 DDRA_ACT# ALERT_n VSSQ#E3 DDRA_ACT# ALERT_n VSSQ#E3 DDRA_ACT# ALERT_n VSSQ#E3
    L3 E8 L3 E8 L3 E8 L3 E8
    [4] DDRA_ACT# DDR0_PAR ACT_n VSSQ#E8 DDR0_PAR ACT_n VSSQ#E8 DDR0_PAR ACT_n VSSQ#E8 DDR0_PAR ACT_n VSSQ#E8
    T3 F1 T3 F1 T3 F1 T3 F1
    [4] DDR0_PAR PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1
    H1 H1 H1 H1
    VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9
    R597 SP@0_5%_4 T7 VSSQ#H9 R105 SP@0_5%_4 T7 VSSQ#H9 R595 SP@0_5%_4 T7 VSSQ#H9 R104 SP@0_5%_4 T7 VSSQ#H9
    NC NC NC NC
    96-BALL 96-BALL 96-BALL 96-BALL
    NC for (SDP) DDR4 NC for (SDP) DDR4 NC for (SDP) DDR4 NC for (SDP) DDR4
    0ohm for (DDP) SP@DDR4_96P 0ohm for (DDP) SP@DDR4_96P 0ohm for (DDP) SP@DDR4_96P 0ohm for (DDP) SP@DDR4_96P

    Hynix AKD5JGETW00--H5TC4G63AFR-PBA

    Place these Caps near Channel A


    M_A_BG#1_1 R624 SP@0_5%_4
    1uF/10uF 4pcs on each side of connector
    M_A_BG#1_2 R109 SP@0_5%_4
    M_A_BG#1_3 R628 SP@0_5%_4 +1.2VSUS
    M_A_BG#1_4 R106 SP@0_5%_4
    C261 1u/6.3V_4 DDR_VTT
    B
    0ohm for (SDP) C249 1u/6.3V_4 C612 1u/6.3V_4 +1.2VSUS B

    NC for (DDP) C281 1u/6.3V_4


    C613
    C597
    1u/6.3V_4
    1u/6.3V_4
    T7 SDP DDP
    C598 1u/6.3V_4
    C276 1u/6.3V_4 C601 1u/6.3V_4
    DDR_VTT C602 1u/6.3V_4 R620
    R124695 NC 0ohm Memory 8G(SDP) & Memory 16G(DDP) TABLE
    C632 1u/6.3V_4 C625 1u/6.3V_4 1.8K_1%_4
    Memory 8G(SDP) Memory 16G(DDP) C624 1u/6.3V_4
    C638 1u/6.3V_4 R612 2.7_1%_6 +VREFCA_CHA_DIMM
    M_A_BS#0 R124696 NC 0ohm [4] SMDDR_VREF_CA
    R606 36_1%_2 R124683 0Ω CS00002JB38 240Ω CS12402FB03
    M_A_BS#1 R609 36_1%_2 C652 1u/6.3V_4 C600 10u/6.3V_4 C609
    M_A_BG#0 R616 36_1%_2 R124697 NC 0ohm R124684 0Ω CS00002JB38 240Ω CS12402FB03 C599 10u/6.3V_4 0.022u/25V_4
    M_A_CKE0 R632 36_1%_2 C260 1u/6.3V_4 R617
    M_A_CS#0 R627 36_1%_2 1.8K_1%_4
    M_A_A0
    R124685 0Ω CS00002JB38 240Ω CS12402FB03
    R588 36_1%_2 R124698 NC 0ohm C279 1u/6.3V_4
    M_A_A1 R610 36_1%_2 R604
    M_A_A2
    R124686 0Ω CS00002JB38 240Ω CS12402FB03
    R589 36_1%_2 C608 1u/6.3V_4 24.9_1%_4
    M_A_A3 R602 36_1%_2
    M_A_A4
    R124687 UNINSTAL INSTAL
    R599 36_1%_2 C651 1u/6.3V_4
    M_A_A5 R598 36_1%_2 R124688 UNINSTAL INSTAL
    M_A_A6 R591 36_1%_2 C277 10u/6.3V_4
    M_A_A7 R603 36_1%_2 C262 10u/6.3V_4 +VREFCA_CHA_DIMM
    M_A_A8
    R124689 UNINSTAL INSTAL
    R592 36_1%_2 C619 10u/6.3V_4
    M_A_A9 R594 36_1%_2 C605 10u/6.3V_4 C617 0.1u/16V_4
    M_A_A10
    R124690 UNINSTAL INSTAL
    R619 36_1%_2 C621 10u/6.3V_4
    M_A_A11 R593 36_1%_2 C254 2.2u/6.3V_4
    M_A_A12
    R124699 INSTAL UNINSTAL
    R618 36_1%_2 C623 1u/6.3V_4
    M_A_A13 R607 36_1%_2 R124700 INSTAL UNINSTAL C633 1u/6.3V_4 C258 0.047u/25V_4
    M_A_A14 R622 36_1%_2 C259 1u/6.3V_4
    M_A_A15 R623 36_1%_2 R124701 INSTAL UNINSTAL C250 1u/6.3V_4 C263 0.047u/25V_4

    Vinafix.com
    M_A_A16 R626 36_1%_2 C646 1u/6.3V_4
    M_A_ODT0 R629 36_1%_2 C247 0.01u/50V_4 R124702 INSTAL UNINSTAL C616 0.047u/25V_4
    +1.2VSUS
    DDRA_ACT# R615 36_1%_2 C282 0.01u/50V_4
    DDR0_PAR R590 36_1%_2 C278 0.01u/50V_4 C618 0.047u/25V_4
    M_A_BG#1 R613 36_1%_2 +1.2VSUS C653 0.01u/50V_4
    C654 0.01u/50V_4
    A A

    C887
    Close memory 0.01u/50V_4
    M_A_DIM0_CLKP0 R630 36_1%_4 C280 1u/6.3V_4
    +2.5VSUS
    C272 1u/6.3V_4
    M_A_DIM0_CLKN0 R631 36_1%_4 C251 1u/6.3V_4 +VREFCA_CHA_DIMM +1.2VSUS
    C615 1u/6.3V_4 SI1, 0417 RF SI1, 0417 RF
    +1.2VSUS C614 1u/6.3V_4
    C636 1u/6.3V_4
    DDR0_ALERT# R596 51_1%_4 C635 1u/6.3V_4
    C607
    C640
    1u/6.3V_4
    10u/6.3V_4
    C269 C253 C620 C271 C603 C606 C270 Quanta Computer Inc.
    3.3p/50V_4 68p/50V_4 2200p/50V_4 68p/50V_4 2200p/50V_4 0.1u/16V_4 3.3p/50V_4
    C644 10u/6.3V_4
    DDR_VTT
    +1.2VSUS
    [18,63]
    [2,6,10,14,18,48,63,72] C257 68p/50V_4 PROJECT : ZGH_Z8H_ZGHA_Z8HA
    +2.5VSUS [18,63] Size Document Number Rev
    1A
    Close memory DDR4 Memory Down (CH. A)
    Date: Tuesday, June 23, 2020 Sheet 17 of 77
    5 4 3 2 1
    5 4 3 2 1

    M_B_DQ[63:0] [4] BYTE6_48-55 BYTE4_32-39 BYTE2_16-23 BYTE1_8-15


    M_B_DQSP[7:0]
    M_B_DQSN[7:0]
    [4,18]
    [4,18]

    +VREFCA_CHB_DIMM M1
    U25
    BYTE7_56-63
    G2 M_B_DQ49 +VREFCA_CHB_DIMM M1
    U10
    BYTE5_40-47
    G2 M_B_DQ32 +VREFCA_CHB_DIMM M1
    U24
    BYTE3_24-31
    G2 M_B_DQ17 +VREFCA_CHB_DIMM M1
    U9

    G2
    BYTE0_0-7
    M_B_DQ13
    18
    B1 VREFCA DQL0 F7 M_B_DQ54 B1 VREFCA DQL0 F7 M_B_DQ37 B1 VREFCA DQL0 F7 M_B_DQ19 B1 VREFCA DQL0 F7 M_B_DQ14
    +2.5VSUS VPP#B1 DQL1 +2.5VSUS VPP#B1 DQL1 +2.5VSUS VPP#B1 DQL1 +2.5VSUS VPP#B1 DQL1
    R9 H3 M_B_DQ55 R9 H3 M_B_DQ38 R9 H3 M_B_DQ21 R9 H3 M_B_DQ9
    VPP#R9 DQL2 H7 M_B_DQ51 VPP#R9 DQL2 H7 M_B_DQ39 VPP#R9 DQL2 H7 M_B_DQ22 VPP#R9 DQL2 H7 M_B_DQ15
    C634 DQL3 H2 M_B_DQ53 C273 DQL3 H2 M_B_DQ33 C637 DQL3 H2 M_B_DQ16 C639 DQL3 H2 M_B_DQ8
    DQL4 H8 M_B_DQ48 DQL4 H8 M_B_DQ34 DQL4 H8 M_B_DQ18 DQL4 H8 M_B_DQ10
    [4] M_B_A[16:0] DQL5 DQL5 DQL5 DQL5
    MDB@68p/50V_4 M_B_A0 P3 J3 M_B_DQ50 MDB@68p/50V_4 M_B_A0 P3 J3 M_B_DQ36 MDB@68p/50V_4 M_B_A0 P3 J3 M_B_DQ20 MDB@68p/50V_4 M_B_A0 P3 J3 M_B_DQ12
    M_B_A1 P7 A0 DQL6 J7 M_B_DQ52 M_B_A1 P7 A0 DQL6 J7 M_B_DQ35 M_B_A1 P7 A0 DQL6 J7 M_B_DQ23 M_B_A1 P7 A0 DQL6 J7 M_B_DQ11
    M_B_A2 R3 A1 DQL7 M_B_A2 R3 A1 DQL7 M_B_A2 R3 A1 DQL7 M_B_A2 R3 A1 DQL7
    M_B_A3 N7 A2 SI1, 0427 RF M_B_A3 N7 A2 M_B_A3 N7 A2 SI1, 0427 RF M_B_A3 N7 A2
    D
    SI1, 0427 RF M_B_A4 N3 A3 A3 M_B_DQ60 M_B_A4 N3 A3 A3 M_B_DQ45 SI1, 0427 RF M_B_A4 N3 A3 A3 M_B_DQ31 M_B_A4 N3 A3 A3 M_B_DQ5
    D
    M_B_A5 P8 A4 DQU0 B8 M_B_DQ57 M_B_A5 P8 A4 DQU0 B8 M_B_DQ42 M_B_A5 P8 A4 DQU0 B8 M_B_DQ28 M_B_A5 P8 A4 DQU0 B8 M_B_DQ3
    M_B_A6 P2 A5 DQU1 C3 M_B_DQ63 M_B_A6 P2 A5 DQU1 C3 M_B_DQ40 M_B_A6 P2 A5 DQU1 C3 M_B_DQ30 M_B_A6 P2 A5 DQU1 C3 M_B_DQ1
    M_B_A7 R8 A6 DQU2 C7 M_B_DQ59 M_B_A7 R8 A6 DQU2 C7 M_B_DQ47 M_B_A7 R8 A6 DQU2 C7 M_B_DQ25 M_B_A7 R8 A6 DQU2 C7 M_B_DQ2
    M_B_A8 R2 A7 DQU3 C2 M_B_DQ56 M_B_A8 R2 A7 DQU3 C2 M_B_DQ41 M_B_A8 R2 A7 DQU3 C2 M_B_DQ27 M_B_A8 R2 A7 DQU3 C2 M_B_DQ4
    M_B_A9 R7 A8 DQU4 C8 M_B_DQ61 M_B_A9 R7 A8 DQU4 C8 M_B_DQ46 M_B_A9 R7 A8 DQU4 C8 M_B_DQ29 M_B_A9 R7 A8 DQU4 C8 M_B_DQ6
    M_B_A10 M3 A9 DQU5 D3 M_B_DQ58 M_B_A10 M3 A9 DQU5 D3 M_B_DQ44 M_B_A10 M3 A9 DQU5 D3 M_B_DQ26 M_B_A10 M3 A9 DQU5 D3 M_B_DQ0
    M_B_A11 T2 A10/AP DQU6 D7 M_B_DQ62 M_B_A11 T2 A10/AP DQU6 D7 M_B_DQ43 M_B_A11 T2 A10/AP DQU6 D7 M_B_DQ24 M_B_A11 T2 A10/AP DQU6 D7 M_B_DQ7
    M_B_A12 M7 A11 DQU7 M_B_A12 M7 A11 DQU7 M_B_A12 M7 A11 DQU7 M_B_A12 M7 A11 DQU7
    M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS
    M_B_A14 L2 A13 M_B_A14 L2 A13 M_B_A14 L2 A13 M_B_A14 L2 A13
    M_B_A15 M8 WE_n/A14 B3 M_B_A15 M8 WE_n/A14 B3 M_B_A15 M8 WE_n/A14 B3 M_B_A15 M8 WE_n/A14 B3
    M_B_A16 L8 CAS_n/A15 VDD#B3 B9 M_B_A16 L8 CAS_n/A15 VDD#B3 B9 M_B_A16 L8 CAS_n/A15 VDD#B3 B9 M_B_A16 L8 CAS_n/A15 VDD#B3 B9
    RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1
    VDD#D1 G7 VDD#D1 G7 VDD#D1 G7 VDD#D1 G7
    VDD#G7 J1 VDD#G7 J1 VDD#G7 J1 VDD#G7 J1
    M_B_BS#0 N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9
    [4] M_B_BS#0 BA0 VDD#J9 BA0 VDD#J9 BA0 VDD#J9 BA0 VDD#J9
    M_B_BS#1 N8 L1 M_B_BS#1 N8 L1 M_B_BS#1 N8 L1 M_B_BS#1 N8 L1
    [4] M_B_BS#1 BA1 VDD#L1 BA1 VDD#L1 BA1 VDD#L1 BA1 VDD#L1
    M_B_BG#0 M2 L9 M_B_BG#0 M2 L9 M_B_BG#0 M2 L9 M_B_BG#0 M2 L9
    [4] M_B_BG#0 BG0 VDD#L9 BG0 VDD#L9 BG0 VDD#L9 BG0 VDD#L9
    R1 R1 R1 R1
    VDD#R1 T9 VDD#R1 T9 VDD#R1 T9 VDD#R1 T9
    VDD#T9 VDD#T9 VDD#T9 VDD#T9
    M_B_DIM0_CLKP0 K7 A1 M_B_DIM0_CLKP0 K7 A1 M_B_DIM0_CLKP0 K7 A1 M_B_DIM0_CLKP0 K7 A1
    [4] M_B_DIM0_CLKP0 M_B_DIM0_CLKN0 K8 CK_t VDDQ#A1 M_B_DIM0_CLKN0 K8 CK_t VDDQ#A1 M_B_DIM0_CLKN0 K8 CK_t VDDQ#A1 M_B_DIM0_CLKN0 K8 CK_t VDDQ#A1
    [4] M_B_DIM0_CLKN0 A9 A9 A9 A9
    M_B_CKE0 K2 CK_c VDDQ#A9 C1 M_B_CKE0 K2 CK_c VDDQ#A9 C1 M_B_CKE0 K2 CK_c VDDQ#A9 C1 M_B_CKE0 K2 CK_c VDDQ#A9 C1
    [4] M_B_CKE0 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1
    D9 D9 D9 D9
    VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2
    M_B_ODT0 K3 VDDQ#F2 F8 M_B_ODT0 K3 VDDQ#F2 F8 M_B_ODT0 K3 VDDQ#F2 F8
    0ohm for (SDP) M_B_ODT0 K3 VDDQ#F2 F8
    [4] M_B_ODT0 M_B_CS#0 L7 ODT VDDQ#F8 G1
    0ohm for (SDP) M_B_CS#0 L7 ODT VDDQ#F8 G1
    0ohm for (SDP) M_B_CS#0 L7 ODT VDDQ#F8 G1 240ohm 1% for (DDP) M_B_CS#0 L7 ODT VDDQ#F8 G1
    0ohm for (SDP)
    [4] M_B_CS#0 CS VDDQ#G1 G9 240ohm 1% for (DDP) CS VDDQ#G1 G9 240ohm 1% for DDP) CS VDDQ#G1 G9 CS VDDQ#G1 G9 240ohm 1% for (DDP)
    M_B_DQSP6 G3 VDDQ#G9 J2 M_B_DQSP4 G3 VDDQ#G9 J2 M_B_DQSP2 G3 VDDQ#G9 J2 M_B_DQSP1 G3 VDDQ#G9 J2
    [4,18] M_B_DQSP6 M_B_DQSP7 DQSL_t VDDQ#J2 [4,18] M_B_DQSP4 M_B_DQSP5 DQSL_t VDDQ#J2 [4,18] M_B_DQSP2 M_B_DQSP3 DQSL_t VDDQ#J2 [4,18] M_B_DQSP1 M_B_DQSP0 DQSL_t VDDQ#J2
    B7 J8 B7 J8 B7 J8 B7 J8
    [4,18] M_B_DQSP7 DQSU_t VDDQ#J8 [4,18] M_B_DQSP5 DQSU_t VDDQ#J8 [4,18] M_B_DQSP3 DQSU_t VDDQ#J8 [4,18] M_B_DQSP0 DQSU_t VDDQ#J8
    M_B_DQSN6 F3 B2 M_B_DQSN4 F3 B2 M_B_DQSN2 F3 B2 M_B_DQSN1 F3 B2
    [4,18] M_B_DQSN6 M_B_DQSN7 DQSL_c VSS#B2 [4,18] M_B_DQSN4 M_B_DQSN5 DQSL_c VSS#B2 [4,18] M_B_DQSN2 M_B_DQSN3 DQSL_c VSS#B2 [4,18] M_B_DQSN1 M_B_DQSN0 DQSL_c VSS#B2
    A7 E1 A7 E1 A7 E1 A7 E1
    [4,18] M_B_DQSN7 DQSU_c VSS#E1 [4,18] M_B_DQSN5 DQSU_c VSS#E1 [4,18] M_B_DQSN3 DQSU_c VSS#E1 [4,18] M_B_DQSN0 DQSU_c VSS#E1
    E9 R644 SP@0_5%_4 E9 R117 SP@0_5%_4 E9 R643 SP@0_5%_4 E9 R116 SP@0_5%_4
    VSS#E9 G8 VSS#E9 G8 VSS#E9 G8 VSS#E9 G8
    VSS#G8 K1 VSS#G8 K1 VSS#G8 K1 VSS#G8 K1
    C VSS#K1 VSS#K1 VSS#K1 VSS#K1 C
    K9 K9 K9 K9
    E7 VSS#K9 M9 M_B_BG#1_1 R689 M_B_BG#1 E7 VSS#K9 M9 M_B_BG#1_2 R134 SP@0_5%_4 M_B_BG#1 E7 VSS#K9 M9 M_B_BG#1_3 R686 M_B_BG#1
    SP@0_5%_4 E7 VSS#K9 M9 M_B_BG#1_4 R146 M_B_BG#1
    DML_n/DBIL_n VSS#M9 M_B_BG#1 [4] DML_n/DBIL_n VSS#M9 DML_n/DBIL_n VSS#M9 DML_n/DBIL_n VSS#M9
    +1.2VSUS E2 N1 SP@0_5%_4 E2 N1 +1.2VSUS E2 N1 +1.2VSUS E2 N1 SP@0_5%_4
    DMU_n/DBIU_nVSS#N1 T1 DMU_n/DBIU_nVSS#N1 T1 DMU_n/DBIU_nVSS#N1 T1 DMU_n/DBIU_nVSS#N1 T1
    VSS#T1 VSS#T1 VSS#T1 VSS#T1
    +1.2VSUS NC for (SDP) NC for (SDP)
    C684 *MDB@0.1U/16V_4 NC for (SDP) 0ohm for (DDP) 0ohm for (DDP)
    DDR_DRAMRST# P1 A2 0ohm for (DDP) DDR_DRAMRST# P1 A2 DDR_DRAMRST# P1 A2 DDR_DRAMRST# P1 A2
    NC for (SDP)
    [10,17] DDR_DRAMRST#
    R668 MDB@240_1%_4 M_B1_ZQ0 F9 RESET_n VSSQ#A2 A8 R122 M_B2_ZQ0
    MDB@240_1%_4 F9 RESET_n VSSQ#A2 A8 R667 MDB@240_1%_4 M_B3_ZQ0 F9 RESET_n VSSQ#A2 A8 R121 M_B4_ZQ0 F9
    MDB@240_1%_4 RESET_n VSSQ#A2 A8 0ohm for (DDP)
    N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9
    TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2
    VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8
    DDR1_ALERT# P9 VSSQ#D8 E3 DDR1_ALERT# P9 VSSQ#D8 E3 DDR1_ALERT# P9 VSSQ#D8 E3 DDR1_ALERT# P9 VSSQ#D8 E3
    [4] DDR1_ALERT# DDRB_ACT# ALERT_n VSSQ#E3 DDRB_ACT# ALERT_n VSSQ#E3 DDRB_ACT# ALERT_n VSSQ#E3 DDRB_ACT# ALERT_n VSSQ#E3
    L3 E8 L3 E8 L3 E8 L3 E8
    [4] DDRB_ACT# DDR1_PAR ACT_n VSSQ#E8 DDR1_PAR ACT_n VSSQ#E8 DDR1_PAR ACT_n VSSQ#E8 DDR1_PAR ACT_n VSSQ#E8
    T3 F1 T3 F1 T3 F1 T3 F1
    [4] DDR1_PAR PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1
    H1 H1 H1 H1
    VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9
    R739 SP@0_5%_4 T7 VSSQ#H9 R170 SP@0_5%_4 T7 VSSQ#H9 R738 SP@0_5%_4 T7 VSSQ#H9 R169 SP@0_5%_4 T7 VSSQ#H9
    NC NC NC NC
    96-BALL 96-BALL 96-BALL 96-BALL
    DDR4 DDR4 DDR4 DDR4
    NC for (SDP) NC for (SDP) NC for (SDP) NC for (SDP)
    0ohm for (DDP) SP@DDR4_96P 0ohm for (DDP) SP@DDR4_96P 0ohm for (DDP) SP@DDR4_96P 0ohm for (DDP) SP@DDR4_96P

    Hynix AKD5JGETW00--H5TC4G63AFR-PBA

    Place these Caps near Channel A


    Vendor P/N Vendor P/N 1uF/10uF 4pcs on each side of connector
    M_B_BG#1_1 R697 SP@0_5%_4 Check location
    MIC 16G AKD5EG0TL00 MT40A1G16HBA-083E:A M_B_BG#1_2 R142 SP@0_5%_4 +1.2VSUS
    M_B_BG#1_3 R693 SP@0_5%_4
    M_B_BG#1_4 R158 SP@0_5%_4 C630 MDB@1u/6.3V_4 DDR_VTT
    Elpida Place these Caps near So-Dimm1.
    C626 MDB@1u/6.3V_4 C694 MDB@1u/6.3V_4
    B
    0ohm for 8Gb(SDP) C681 MDB@1u/6.3V_4
    B

    SAMSUNG NC for 16Gb(DDP) C266 MDB@1u/6.3V_4 C668 MDB@1u/6.3V_4 1uF/10uF 4pcs on each side of connector
    T7 SDP DDP C689 MDB@1u/6.3V_4
    C650 MDB@1u/6.3V_4 C690 MDB@1u/6.3V_4 +1.2VSUS
    DDR_VTT C693 MDB@1u/6.3V_4
    R124748 NC 0ohm C628 MDB@1u/6.3V_4 C688 MDB@1u/6.3V_4 VREF DQ1 M1 Solution
    Memory 8G(SDP) & Memory 16G(DDP) TABLE C691 MDB@1u/6.3V_4
    C627 MDB@1u/6.3V_4
    M_B_BS#0 R713 MDB@36_1%_2 R685
    M_B_BS#1 R724 R124749 NC 0ohm Memory 8G(SDP) Memory 16G(DDP)
    MDB@36_1%_2 C631 MDB@1u/6.3V_4 C679 MDB@10u/6.3V_4 MDB@1.8K_1%_4
    M_B_BG#0 R705 MDB@36_1%_2 C692 MDB@10u/6.3V_4
    M_B_CKE0 R683
    R124736 0Ω CS00002JB38 240Ω CS12402FB03
    MDB@36_1%_2 R124750 NC 0ohm C267 MDB@1u/6.3V_4 R682 MDB@2.7_1%_6 +VREFCA_CHB_DIMM
    M_B_CS#0 R731 MDB@36_1%_2 [4] SMDDR_VREF_DQ1_M3
    M_B_A0 R737
    R124737 0Ω CS00002JB38 240Ω CS12402FB03 DB1 Intel
    MDB@36_1%_2 C265 MDB@1u/6.3V_4
    M_B_A1 R728 MDB@36_1%_2 R124751 NC 0ohm R124738 0Ω CS00002JB38 240Ω CS12402FB03 C657
    M_B_A2 R735 MDB@36_1%_2 C268 MDB@1u/6.3V_4 MDB@0.022u/25V_4 R684
    M_B_A3 R730 MDB@36_1%_2 R124739 0Ω CS00002JB38 240Ω CS12402FB03 MDB@1.8K_1%_4
    M_B_A4 R709 MDB@36_1%_2 C264 MDB@1u/6.3V_4 R652
    M_B_A5 R721 MDB@36_1%_2
    M_B_A6 R736
    R124740 UNINSTAL INSTAL MDB@24.9_1%_4
    MDB@36_1%_2 C643 MDB@10u/6.3V_4 +VREFCA_CHB_DIMM
    M_B_A7 R722 MDB@36_1%_2 C649 MDB@10u/6.3V_4
    M_B_A8 R734
    R124741 UNINSTAL INSTAL SI1B, 0603
    MDB@36_1%_2 C629 MDB@10u/6.3V_4
    M_B_A9 R729 MDB@36_1%_2 R124742 UNINSTAL INSTAL C656 MDB@10u/6.3V_4 C675 MDB@0.1u/16V_4
    M_B_A10 R701 MDB@36_1%_2 C274 MDB@10u/6.3V_4
    M_B_A11 R732 MDB@36_1%_2 R124743 C671 MDB@2.2u/6.3V_4
    M_B_A12 R726
    UNINSTAL INSTAL
    MDB@36_1%_2 C655 MDB@1u/6.3V_4
    M_B_A13 R723 MDB@36_1%_2 R124752 C284 MDB@1u/6.3V_4 C677 MDB@0.047u/25V_4
    M_B_A14 R690
    INSTAL UNINSTAL
    MDB@36_1%_2 C285 MDB@1u/6.3V_4
    M_B_A15 R725 MDB@36_1%_2 C664 MDB@1u/6.3V_4 C289 MDB@0.047u/25V_4
    M_B_A16 R727
    R124753 INSTAL UNINSTAL
    MDB@36_1%_2 C667 MDB@1u/6.3V_4
    M_B_ODT0 R681 MDB@36_1%_2 C678 MDB@0.01u/50V_4 C670 MDB@0.047u/25V_4
    DDRB_ACT# R687 +1.2VSUS R124754 INSTAL UNINSTAL
    MDB@36_1%_2 C685 MDB@0.01u/50V_4
    DDR1_PAR R733 MDB@36_1%_2 C687 MDB@0.01u/50V_4 C666 MDB@0.047u/25V_4
    M_B_BG#1
    R124755 INSTAL UNINSTAL SI1, 0421 add
    R720 MDB@36_1%_2 C682 MDB@0.01u/50V_4
    +1.2VSUS C299 MDB@0.01u/50V_4
    DB1 Intel
    A A

    C888
    DB1 12/11, close memory MDB@0.01u/50V_4
    +2.5VSUS C295 MDB@1u/6.3V_4
    M_B_DIM0_CLKP0 R679 MDB@36_1%_4 C641 MDB@1u/6.3V_4
    C275 MDB@1u/6.3V_4 +VREFCA_CHB_DIMM +1.2VSUS
    M_B_DIM0_CLKN0 R678 MDB@36_1%_4 C304 MDB@1u/6.3V_4 SI1, 0417 RF SI1, 0417 RF
    C647 MDB@1u/6.3V_4
    +1.2VSUS C683 MDB@1u/6.3V_4
    C680 MDB@1u/6.3V_4
    DDR1_ALERT# R706 MDB@51_1%_4 C645 MDB@1u/6.3V_4 C292 C293 C658 C317 C316 C315 C314
    C642
    C648
    MDB@10u/6.3V_4
    MDB@10u/6.3V_4
    MDB@3.3p/50V_4MDB@68p/50V_4 MDB@2200p/50V_4 MDB@68p/50V_4 MDB@2200p/50V_4 MDB@0.1u/16V_4MDB@3.3p/50V_4 Quanta Computer Inc.
    C686 MDB@68p/50V_4
    DDR_VTT
    +1.2VSUS
    [17,63]
    [2,6,10,14,17,48,63,72]
    DB1 RF DB1 RF PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    +2.5VSUS [17,63] DB1 12/11, close memory 1A
    DDR4 Memory Down (CH. B)
    Date: Tuesday, June 23, 2020 Sheet 18 of 77
    5 4 3 2 1
    5 4 3 2 1

    +1.8V_AON
    +1V_GFX
    +1.8V_MAIN
    [21,23,24,25,26,68,70,72]
    [21,72]
    [20,21,22,24,37,72] +1V_GFX
    PEX_DVDD/PEX_CVDD
    UNDER GPU: [0.47uFx12 + 4.7uFx3]
    NEAR GPU: [10uFx3 + 22uFx2]
    19
    DG:1.8V
    +1.8V_AON UG10A EV@4.7U/6.3V_4 CG144 EV@10u/6.3V_4 CG116
    EV@4.7U/6.3V_4 CG150 EV@10u/6.3V_4 CG117
    1/17 PCI_EXPRESS
    EV@4.7U/6.3V_4 CG220 EV@10u/6.3V_4 CG118

    EV@0.47u/6.3V_2 CG422
    1.0V EV@0.47u/6.3V_2 CG423 EV@22u/6.3V_6 CG114
    [24] DGPU_PWROK RG71 AJ11 PEX_WAKE EV@0.47u/6.3V_2 CG424 EV@22u/6.3V_6 CG115
    QG5 EV@10K_1%_2 PEX_DVDD AG21 EV@0.47u/6.3V_2 CG425
    EV@DMG1012T-7 PEGX_RST# AJ12 AG22 EV@0.47u/6.3V_2 CG426

    2
    D
    PEX_RST PEX_DVDD D
    PEX_DVDD AG24 EV@0.47u/6.3V_2 CG427
    3 1 PEX_CLKREQ AK12 PEX_CLKREQ PEX_DVDD AH25 EV@0.47u/6.3V_2 CG137
    [11] PCIE_CLKREQ_VGA#
    PEX_CVDD AG19 EV@0.47u/6.3V_2 CG224
    AL13 PEX_REFCLK PEX_CVDD AH21 EV@0.47u/6.3V_2 CG158
    [11] CLK_VGA_P
    [11] CLK_VGA_N AK13 PEX_REFCLK EV@0.47u/6.3V_2 CG165
    EV@0.47u/6.3V_2 CG173
    CG297 PEG_RXP0_C
    EV@0.22u/6.3V_2 AK14 PEX_TX0 EV@0.47u/6.3V_2 CG138
    [3] PEG_RXP0 PEG_RXN0_C
    [3] PEG_RXN0 CG291 EV@0.22u/6.3V_2 AJ14 PEX_TX0

    [3] PEG_TXP0 AN12 PEX_RX0


    1.8V +1.8V_MAIN
    UNDER GPU: [0.47uFx13 + 4.7uFx3]
    AM12 PEX_RX0 PEX_HVDD AG13 NEAR GPU: [10uFx3 + 22uFx2]
    [3] PEG_TXN0
    PEX_HVDD AG15
    CG289 PEG_RXP1_C
    EV@0.22u/6.3V_2 AH14 PEX_TX1 PEX_HVDD AG16 EV@4.7U/6.3V_4 CG181 EV@22u/6.3V_6 CG103
    [3] PEG_RXP1 PEG_RXN1_C
    CG290 EV@0.22u/6.3V_2 AG14 PEX_TX1 PEX_HVDD AG18 EV@4.7U/6.3V_4 CG195 EV@22u/6.3V_6 CG102
    [3] PEG_RXN1
    PEX_HVDD AG25 EV@4.7U/6.3V_4 CG188
    AN14 PEX_RX1 PEX_HVDD AH15 EV@10u/6.3V_4 CG106
    [3] PEG_TXP1
    AM14 PEX_RX1 PEX_HVDD AH18 EV@0.47u/6.3V_2 CG206 EV@10u/6.3V_4 CG104
    [3] PEG_TXN1
    PEX_HVDD AH26 EV@0.47u/6.3V_2 CG123 EV@10u/6.3V_4 CG105
    CG288 PEG_RXP2_C
    EV@0.22u/6.3V_2 AK15 PEX_TX2 PEX_HVDD AH27 EV@0.47u/6.3V_2 CG124
    [3] PEG_RXP2 PEG_RXN2_C
    [3] PEG_RXN2 CG287 EV@0.22u/6.3V_2 AJ15 PEX_TX2 PEX_HVDD AJ27 EV@0.47u/6.3V_2 CG125
    PEX_HVDD AK27 EV@0.47u/6.3V_2 CG134
    AP14 PEX_RX2 PEX_HVDD AL27 EV@0.47u/6.3V_2 CG132
    [3] PEG_TXP2
    [3] PEG_TXN2 AP15 PEX_RX2 PEX_HVDD AM28 EV@0.47u/6.3V_2 CG133
    PEX_HVDD AN28 EV@0.47u/6.3V_2 CG435
    CG286 PEG_RXP3_C
    EV@0.22u/6.3V_2 AL16 PEX_TX3 EV@0.47u/6.3V_2 CG436
    [3] PEG_RXP3 PEG_RXN3_C
    CG281 EV@0.22u/6.3V_2 AK16 PEX_TX3 EV@0.47u/6.3V_2 CG437
    [3] PEG_RXN3
    EV@0.47u/6.3V_2 CG438
    [3] PEG_TXP3 AN15 PEX_RX3 EV@0.47u/6.3V_2 CG439
    AM15 PEX_RX3 EV@0.47u/6.3V_2 CG440
    [3] PEG_TXN3
    CG280 PEG_RXP4_C
    EV@0.22u/6.3V_2 AK17 PEX_TX4
    [3] PEG_RXP4
    CG279 EV@0.22u/6.3V_2 PEG_RXN4_C AJ17
    [3] PEG_RXN4 PEX_TX4
    PEX_HVDD/PEX_PLL_HVDD
    AN17 PEX_RX4
    [3] PEG_TXP4
    [3] PEG_TXN4 AM17 PEX_RX4

    CG271 PEG_RXP5_C
    EV@0.22u/6.3V_2 AH17 PEX_TX5 +1.8V_MAIN
    [3] PEG_RXP5 PEG_RXN5_C
    C [3] PEG_RXN5 CG270 EV@0.22u/6.3V_2 AG17 PEX_TX5 C
    PEX_PLL_HVDD AH12 PEX_PLL_HVDD RG33 *EV@Short_2
    [3] PEG_TXP5 AP17 PEX_RX5
    AP18 PEX_RX5
    [3] PEG_TXN5
    CG269 PEG_RXP6_C
    EV@0.22u/6.3V_2 AK18 PEX_TX6 CG216
    [3] PEG_RXP6 PEG_RXN6_C
    CG262 EV@0.22u/6.3V_2 AJ18 PEX_TX6 EV@1u/6.3V_2
    [3] PEG_RXN6
    AN18 PEX_RX6
    [3] PEG_TXP6
    AM18 PEX_RX6
    [3] PEG_TXN6
    CG258 PEG_RXP7_C
    EV@0.22u/6.3V_2 AL19 PEX_TX7
    [3] PEG_RXP7 PEG_RXN7_C
    [3] PEG_RXN7 CG261 EV@0.22u/6.3V_2 AK19 PEX_TX7

    AN20 PEX_RX7
    [3] PEG_TXP7
    [3] PEG_TXN7 AM20 PEX_RX7

    CG256 PEG_RXP8_C
    EV@0.22u/6.3V_2 AK20 PEX_TX8
    [3] PEG_RXP8 PEG_RXN8_C
    CG251 EV@0.22u/6.3V_2 AJ20 PEX_TX8
    [3] PEG_RXN8

    [3] PEG_TXP8 AP20 PEX_RX8


    AP21 PEX_RX8
    [3] PEG_TXN8
    CG246 PEG_RXP9_C
    EV@0.22u/6.3V_2 AH20 PEX_TX9
    [3] PEG_RXP9 PEG_RXN9_C
    CG240 EV@0.22u/6.3V_2 AG20 PEX_TX9
    [3] PEG_RXN9
    AN21 PEX_RX9
    [3] PEG_TXP9
    [3] PEG_TXN9 AM21 PEX_RX9

    CG236 PEG_RXP10_C
    EV@0.22u/6.3V_2 AK21 PEX_TX10
    [3] PEG_RXP10 PEG_RXN10_C
    [3] PEG_RXN10 CG234 EV@0.22u/6.3V_2 AJ21 PEX_TX10

    [3] PEG_TXP10 AN23 PEX_RX10


    AM23 PEX_RX10
    [3] PEG_TXN10
    CG228 PEG_RXP11_C
    EV@0.22u/6.3V_2 AL22 PEX_TX11
    [3] PEG_RXP11 PEG_RXN11_C
    CG226 EV@0.22u/6.3V_2 AK22 PEX_TX11
    [3] PEG_RXN11
    B B
    AP23 PEX_RX11
    [3] PEG_TXP11
    AP24 PEX_RX11
    [3] PEG_TXN11
    CG221 PEG_RXP12_C
    EV@0.22u/6.3V_2 AK23 PEX_TX12
    [3] PEG_RXP12 PEG_RXN12_C
    [3] PEG_RXN12 CG219 EV@0.22u/6.3V_2 AJ23 PEX_TX12

    [3]
    [3]
    PEG_TXP12
    PEG_TXN12
    AN24
    AM24
    PEX_RX12
    PEX_RX12
    Vinafix.com
    CG213 PEG_RXP13_C AH23
    EV@0.22u/6.3V_2 PEX_TX13
    [3] PEG_RXP13 PEG_RXN13_C AG23
    [3] PEG_RXN13 CG209 EV@0.22u/6.3V_2 PEX_TX13

    [3] PEG_TXP13 AN26 PEX_RX13


    AM26 PEX_RX13
    [3] PEG_TXN13
    CG201 PEG_RXP14_C
    EV@0.22u/6.3V_2 AK24 PEX_TX14
    [3] PEG_RXP14 PEG_RXN14_C
    CG194 EV@0.22u/6.3V_2 AJ24 PEX_TX14
    [3] PEG_RXN14
    AP26 PEX_RX14
    [3] PEG_TXP14
    [3] PEG_TXN14 AP27 PEX_RX14

    CG180 PEG_RXP15_C
    EV@0.22u/6.3V_2 AL25 PEX_TX15
    [3] PEG_RXP15 PEG_RXN15_C
    [3] PEG_RXN15 CG175 EV@0.22u/6.3V_2 AK25 PEX_TX15

    AN27 PEX_RX15 PEX_TERMP AP29 PEX_TERMP RG82 EV@2.49K_1%_2


    [3] PEG_TXP15
    AM27 PEX_RX15
    [3] PEG_TXN15

    EV@N18P/GB4D-128_960P

    GPU PEX RST#


    +1.8V_AON

    A A
    CG420 EV@0.1U/16V_4

    UG11
    5

    EV@NL17SZ08EDFT2G
    [13] DGPU_HOLD_RST# 1
    4 RG134 *EV@Short_4 PEGX_RST#
    PEGX_RST# [21,24]
    [13,47,51,53,54,57] PLTRST# 2
    3

    RG133
    EV@100K_1%_2 Quanta Computer Inc.
    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    N18P-G62-1/8 (PCIE)
    Date: Tuesday, June 23, 2020 Sheet 19 of 77
    5 4 3 2 1
    5 4 3 2 1

    UG10C
    +1.8V_MAIN [19,21,22,24,37,72] UG10B
    FBVDDQ_MEM [22,23,25,26,70] 3/17 FBB
    2/17 FBA

    [25] VMA_DQ[63:0]
    VMA_DQ[63:0]

    VMA_DQ0
    VMA_DQ1
    VMA_DQ2
    L28
    M29
    L29
    FBA_D0
    FBA_D1
    FBA_D2 0.4A
    [26] VMB_DQ[63:0]

    VMB_DQ0
    VMB_DQ1
    VMB_DQ2
    VMB_DQ3
    G9
    E9
    G8
    F9
    FBB_D0
    FBB_D1
    FBB_D2
    FBB_D3
    20
    VMA_DQ3
    VMA_DQ4
    M28
    N31
    FBA_D3
    FBA_D4
    1.8V Under GPU VMB_DQ4
    VMB_DQ5
    F11
    G11
    FBB_D4
    FBB_D5
    VMA_DQ5 P29 FBA_D5 FB_REFPLL_AVDD K27 +FBx_PLL_AVDD VMB_DQ6 F12 FBB_D6
    VMA_DQ6 R29 FBA_D6
    VMB_DQ7 G12 FBB_D7
    VMA_DQ7 P28 VMB_DQ8 G6
    FBA_D7 FBB_D8
    VMA_DQ8 J28 FBA_D8 C83 VMB_DQ9 F5 FBB_D9
    VMA_DQ9 H29 FBA_D9 EV@1u/6.3V_2 VMB_DQ10 E6 FBB_D10
    VMA_DQ10 J29 FBA_D10
    VMB_DQ11 F6 FBB_D11
    D VMA_DQ11 VMB_DQ12 D
    H28 FBA_D11 F4 FBB_D12
    VMA_DQ12 G29 FBA_D12
    VMB_DQ13 G4 FBB_D13

    FBB_CH0
    VMA_DQ13 E31 FBA_D13 VMB_DQ14 E2 FBB_D14

    FBA_CH0
    VMA_DQ14 E32 FBA_D14
    VMB_DQ15 F3 FBB_D15
    VMA_DQ15 F30 FBA_D15
    VMB_DQ16 C2 FBB_D16
    VMA_DQ16 C34 FBA_D16 VMB_DQ17 D4 FBB_D17
    VMA_DQ17 D32 FBA_D17
    VMB_DQ18 D3 FBB_D18
    VMA_DQ18 B33 FBA_D18 VMB_DQ19 C1 FBB_D19
    VMA_DQ19 C33 FBA_D19
    VMB_DQ20 B3 FBB_D20
    VMA_DQ20 F33 FBA_D20
    VMB_DQ21 C4 FBB_D21
    VMA_DQ21 F32 FBA_D21 VMB_DQ22 B5 FBB_D22
    VMA_DQ22 H33 VMB_DQ23 C5
    FBA_D22 FBB_D23
    VMA_DQ23 H32 FBA_D23 VMB_DQ24 A11 FBB_D24
    VMA_DQ24 P34 VMB_DQ25 C11
    FBA_D24 FBB_D25
    VMA_DQ25 P32 FBA_D25
    VMB_DQ26 D11 FBB_D26
    VMA_DQ26 P31 FBA_D26
    VMB_DQ27 B11 FBB_D27
    VMA_DQ27 P33 FBA_D27
    VMB_DQ28 D8 FBB_D28
    VMA_DQ28 L31 FBA_D28 VMB_DQ29 A8 FBB_D29
    VMA_DQ29 L34 FBA_D29
    VMB_DQ30 C8 FBB_D30
    VMA_DQ30 L32 VMB_DQ31 B8
    FBA_D30 FBB_D31
    VMA_DQ31 L33 FBA_D31 VMB_DQ32 F24 FBB_D32
    VMA_DQ32 AG28 VMB_DQ33 G23 CA0_A/ D13 FBB_CMD0
    FBA_D32 FBB_D33 FBB_CMD0 FBB_CMD[33:0] [26]
    VMA_DQ33 AF29 FBA_D33 FBA_CMD0 U30 FBA_CMD0 VMB_DQ34 E24 FBB_D34 CA9_A;CA9_B/ FBB_CMD1 E14 FBB_CMD1
    CA0_A/ FBA_CMD[33:0] [25]
    VMA_DQ34 AG29 T31 FBA_CMD1 VMB_DQ35 G24 RST* F14 FBB_CMD2
    FBA_D34 CA9_A;CA9_B/ FBA_CMD1 FBB_D35 FBB_CMD2
    VMA_DQ35 AF28 FBA_D35 RST* FBA_CMD2 U29 FBA_CMD2 VMB_DQ36 D21 FBB_D36 CA8_A;CA8_B/ FBB_CMD3 A12 FBB_CMD3
    VMA_DQ36 AD30 FBA_D36 CA8_A;CA8_B/ FBA_CMD3 R34 FBA_CMD3 VMB_DQ37 E21 FBB_D37 CA0_B/ FBB_CMD4 B12 FBB_CMD4
    VMA_DQ37 AD29 FBA_D37 FBA_CMD4 R33 FBA_CMD4 VMB_DQ38 G21 FBB_D38 CA2_B/ FBB_CMD5 C14 FBB_CMD5
    CA0_B/
    VMA_DQ38 AC29 FBA_D38 CA2_B/ FBA_CMD5 U32 FBA_CMD5 VMB_DQ39 F21 FBB_D39 CABI_A;CABI_B/ FBB_CMD6 B14 FBB_CMD6
    VMA_DQ39 AD28 FBA_D39 FBA_CMD6 U33 FBA_CMD6 VMB_DQ40 G27 FBB_D40 CA4_A/CA4_B/ FBB_CMD7 G15 FBB_CMD7
    CABI_A;CABI_B/
    VMA_DQ40 AJ29 FBA_D40 CA4_A/CA4_B FBA_CMD7 U28 FBA_CMD7 VMB_DQ41 D27 FBB_D41 CA2_A/ FBB_CMD8 F15 FBB_CMD8
    VMA_DQ41 AK29 FBA_D41 CA2_A/ FBA_CMD8 V28 FBA_CMD8 VMB_DQ42 G26 FBB_D42 CA1_A/ FBB_CMD9 E15 FBB_CMD9
    VMA_DQ42 AJ30 FBA_D42 FBA_CMD9 V29 FBA_CMD9 VMB_DQ43 E27 FBB_D43 CKE*_A;CKE*_B/ FBB_CMD10 D15 FBB_CMD10
    CA1_A/
    VMA_DQ43 AK28 FBA_D43 CKE*_A;CKE*_B/ FBA_CMD10 V30 FBA_CMD10 VMB_DQ44 E29 FBB_D44 CA5_A;CA5_B/ FBB_CMD11 A14 FBB_CMD11
    VMA_DQ44 AM29 FBA_D44 FBA_CMD11 U34 FBA_CMD11 VMB_DQ45 F29 FBB_D45 CA1_B/ FBB_CMD12 D14 FBB_CMD12
    CA5_A;CA5_B/

    FBB_CH1
    VMA_DQ45 AM31 FBA_D45 CA1_B/ FBA_CMD12 U31 FBA_CMD12 VMB_DQ46 E30 FBB_D46 CA3_B/ FBB_CMD13 A15 FBB_CMD13

    FBA_CH1
    VMA_DQ46 AN29 FBA_D46 CA3_B/ FBA_CMD13 V34 FBA_CMD13 VMB_DQ47 D30 FBB_D47 CA7_A;CA7_B/ FBB_CMD14 B15 FBB_CMD14
    VMA_DQ47 AM30 FBA_D47 FBA_CMD14 V33 FBA_CMD14 VMB_DQ48 A32 FBB_D48 CA6_A;CA6_B/ FBB_CMD15 C17 FBB_CMD15
    CA7_A;CA7_B/
    VMA_DQ48 AN31 FBA_D48 CA6_A;CA6_B/ FBA_CMD15 Y32 FBA_CMD15 VMB_DQ49 C31 FBB_D49 CA0_B/ FBB_CMD16 D18 FBB_CMD16
    VMA_DQ49 AN32 FBA_D49 FBA_CMD16 AA31 FBA_CMD16 VMB_DQ50 C32 FBB_D50 CA9_A;CA9_B/ FBB_CMD17 E18 FBB_CMD17
    CA0_B/
    C VMA_DQ50 AP30 FBA_D50 FBA_CMD17 AA29 FBA_CMD17 VMB_DQ51 B32 FBB_D51 RST* FBB_CMD18 F18 FBB_CMD18 C
    CA9_A;CA9_B/
    VMA_DQ51 AP32 FBA_D51 FBA_CMD18 AA28 FBA_CMD18 VMB_DQ52 D29 FBB_D52 CA8_A;CA8_B/ FBB_CMD19 A20 FBB_CMD19
    RST*
    VMA_DQ52 AM33 FBA_D52 FBA_CMD19 AC34 FBA_CMD19 VMB_DQ53 A29 FBB_D53 CA0_A/ FBB_CMD20 B20 FBB_CMD20
    CA8_A;CA8_B/
    VMA_DQ53 AL31 FBA_D53 FBA_CMD20 AC33 FBA_CMD20 VMB_DQ54 C29 FBB_D54 CA2_A/ FBB_CMD21 C18 FBB_CMD21
    CA0_A/
    VMA_DQ54 AK33 FBA_D54 FBA_CMD21 AA32 FBA_CMD21 VMB_DQ55 B29 FBB_D55 CABI_A;CABI_B/ FBB_CMD22 B18 FBB_CMD22
    CA2_A/
    VMA_DQ55 AK32 FBA_D55 CABI_A;CABI_B/ FBA_CMD22 AA33 FBA_CMD22 VMB_DQ56 B21 FBB_D56 CA4_A;CA4_B/ FBB_CMD23 G18 FBB_CMD23
    VMA_DQ56 AD34 FBA_D56 FBA_CMD23 Y28 FBA_CMD23 VMB_DQ57 C23 FBB_D57 C2_B/ FBB_CMD24 G17 FBB_CMD24
    CA4_A;CA4_B/
    VMA_DQ57 AD32 Y29 FBA_CMD24 VMB_DQ58 A21 CA1_B/ F17 FBB_CMD25
    FBA_D57 CA2_B/ FBA_CMD24 FBB_D58 FBB_CMD25
    VMA_DQ58 AC30 FBA_D58 FBA_CMD25 W31 FBA_CMD25 VMB_DQ59 C21 FBB_D59 CKE*_A;CKE*_B/ FBB_CMD26 D16 FBB_CMD26
    CA1_B/
    VMA_DQ59 AD33 Y30 FBA_CMD26 VMB_DQ60 B24 CA5_A;CA5_B/ A18 FBB_CMD27
    FBA_D59 CKE*_A;CKE*_B/ FBA_CMD26 FBB_D60 FBB_CMD27
    VMA_DQ60 AF31 FBA_D60 CA5_A;CA5_B/ FBA_CMD27 AA34 FBA_CMD27 VMB_DQ61 C24 FBB_D61 CA1_A/ FBB_CMD28 D17 FBB_CMD28
    VMA_DQ61 AG34 FBA_D61 CA1_A/ FBA_CMD28 Y31 FBA_CMD28 VMB_DQ62 B26 FBB_D62 CA3_A/ FBB_CMD29 A17 FBB_CMD29
    VMA_DQ62 AG32 FBA_D62 FBA_CMD29 Y34 FBA_CMD29 VMB_DQ63 C26 FBB_D63 CA6_A;CA6_B/ FBB_CMD30 B17 FBB_CMD30
    CA3_A/
    VMA_DQ63 AG33 FBA_D63 FBA_CMD30 Y33 FBA_CMD30 CA7_A;CA7_B/ FBB_CMD31 E17 FBB_CMD31
    CA6_A;CA6_B/
    CA7_A;CA7_B/ FBA_CMD31 V31 FBA_CMD31 CA3_A/ FBB_CMD32 G14 FBB_CMD32
    CA3_A/ FBA_CMD32 R28 FBA_CMD32 FBB_DBI0 E11 FBB_DQM0 CA3_B/ FBB_CMD33 G20 FBB_CMD33
    FBA_DBI0 [26] FBB_DBI[7:0]
    P30 FBA_DQM0 CA3_B/ FBA_CMD33 AC28 FBA_CMD33 FBB_DBI1 E3 FBB_DQM1 DEBUG0 FBB_CMD34 C12 FBB_DEBUG0 TP59
    [25] FBA_DBI[7:0]

    DBI[0~7]
    FBA_DBI1 F31 FBA_DQM1 DEBUG0 FBA_CMD34 R32 FBA_DEBUG0 FBB_DBI2 A3 FBB_DQM2
    DEBUG1
    FBB_CMD35 C20 FBB_DEBUG1 TP61
    DBI[0~7]

    FBA_DBI2 F34 FBA_DQM2 DEBUG1 FBA_CMD35 AC32 FBA_DEBUG1 TP60 FBB_DBI3 C9 FBB_DQM3
    FBA_DBI3 M32 FBA_DQM3 TP17 FBB_DBI4 F23 FBB_DQM4
    FBA_DBI4 AD31 FBA_DQM4
    FBB_DBI5 F27 FBB_DQM5
    FBA_DBI5 AL29 FBA_DQM5 FBB_DBI6 C30 FBB_DQM6
    FBA_DBI6 AM32 FBA_DQM6
    FBB_DBI7 A24 FBB_DQM7
    FBA_DBI7 AF34 FBA_DQM7

    FBB_EDC0 D10 FBB_DQS_WP0


    FBA_EDC0 [26] FBB_EDC[7:0] FBB_EDC1
    M31 FBA_DQS_WP0 D5 FBB_DQS_WP1
    [25] FBA_EDC[7:0]

    EDC[0~7]
    FBA_EDC1 G31 FBA_DQS_WP1
    FBB_EDC2 C3 FBB_DQS_WP2 FBB_CLK0 D12 VMB_CLK0 [26]
    EDC[0~7]

    FBA_EDC2 E33 FBA_DQS_WP2 FBA_CLK0 R30 FBB_EDC3 B9 FBB_DQS_WP3 CH0 FBB_CLK0 E12
    FBA_EDC3 VMA_CLK0 [25] FBB_EDC4 VMB_CLK0# [26]
    M33 FBA_DQS_WP3 CH0 FBA_CLK0 R31 VMA_CLK0# [25]
    E23 FBB_DQS_WP4 FBB_CLK1 E20 VMB_CLK1 [26]
    FBA_EDC4 AE31 FBA_DQS_WP4 FBA_CLK1 AB31 FBB_EDC5 E28 FBB_DQS_WP5 CH1 FBB_CLK1 F20
    VMA_CLK1 [25] VMB_CLK1# [26]
    FBA_EDC5 AK30 FBA_DQS_WP5 CH1 FBA_CLK1 AC31 FBB_EDC6 B30 FBB_DQS_WP6
    FBA_EDC6 VMA_CLK1# [25] FBB_EDC7
    AN33 FBA_DQS_WP6 A23 FBB_DQS_WP7
    FBA_EDC7 AF33 FBA_DQS_WP7

    FBB_WCK01 F8
    VMB_WCK01 [26]
    FBA_WCK01 K31 CH0 BYTE0 FBB_WCK01 E8
    VMA_WCK01 [25] VMB_WCK01# [26]
    CH0 BYTE0 FBA_WCK01 L30 FBB_WCK23 A5
    VMA_WCK01# [25] VMB_WCK23 [26]
    FBA_WCK23 H34 CH0 BYTE2 FBB_WCK23 A6
    VMA_WCK23 [25] VMB_WCK23# [26]
    CH0 BYTE2 FBA_WCK23 J34 FBB_WCK45 D24
    B VMA_WCK23# [25] VMB_WCK45 [26] B
    FBA_WCK45 AG30 CH1 BYTE0 FBB_WCK45 D25
    VMA_WCK45 [25] VMB_WCK45# [26]
    CH1 BYTE0 FBA_WCK45 AG31 FBB_WCK67 B27
    VMA_WCK45# [25] VMB_WCK67 [26]
    FBA_WCK67 AJ34 CH1 BYTE2 FBB_WCK67 C27
    VMA_WCK67 [25] VMB_WCK67# [26]
    CH1 BYTE2 FBA_WCK67 AK34
    VMA_WCK67# [25]
    D6
    J30 FBB CKE* PULL UP FBVDDQ_MEM FBVDDQ_MEM CH0 BYTE1
    FBB_WCKB01
    D7
    VMB_WCKB01 [26]
    FBA CKE* PULL UP FBVDDQ_MEM FBVDDQ_MEM
    CH0 BYTE1
    FBA_WCKB01
    FBA_WCKB01 J31
    VMA_WCKB01
    VMA_WCKB01#
    [25]
    [25]
    FBB_WCKB01
    FBB_WCKB23 C6
    VMB_WCKB01#
    VMB_WCKB23
    [26]
    [26]
    FBA_WCKB23 J32 CH0 BYTE3 FBB_WCKB23 B6
    VMA_WCKB23 [25] VMB_WCKB23# [26]
    CH0 BYTE3 FBA_WCKB23 J33 FBB_WCKB45 F26
    VMA_WCKB23# [25] VMB_WCKB45 [26]
    FBA_WCKB45 AH31 CH1 BYTE1 FBB_WCKB45 E26
    VMA_WCKB45 [25] VMB_WCKB45# [26]
    CH1 BYTE1 FBA_WCKB45 AJ31 R493 R97 FBB_WCKB67 A26
    VMA_WCKB45# [25] +FBx_PLL_AVDD +1.8V_MAIN VMB_WCKB67 [26]
    FBA_WCKB67 AJ32 EV@10K_1%_2 EV@10K_1%_2 CH1 BYTE3 FBB_WCKB67 A27
    VMA_WCKB67 [25] VMB_WCKB67# [26]
    R494 R491 CH1 BYTE3 FBA_WCKB67 AJ33
    VMA_WCKB67# [25] L1 FBB_CMD7
    EV@10K_1%_2 EV@10K_1%_2 FBB_PLL_AVDD H17 +FBx_PLL_AVDD
    R96 FB_VREF H31
    EV@1K_1%_2 FB_VREF FBA_PLL_AVDD U27 +FBx_PLL_AVDD 1 2 FBB_CMD33
    FBA_CMD7 EV@HCB1005KF-330T30
    FBA_CMD33

    EV@N18P/GB4D-128_960P
    0.4A EV@N18P/GB4D-128_960P C85
    EV@1u/6.3V_2
    C60 C59 C61 C62 FBB RESET PULL DOWN
    FBA RESET PULL DOWN EV@4.7U/6.3V_6 EV@4.7U/6.3V_6EV@22u/6.3V_6 EV@1u/6.3V_2 FBB_CMD2
    FBB_CMD18
    FBA_CMD2
    FBA_CMD18
    Under GPU

    R95 R495 C81 C82


    +FBx_PLL_AVDD

    C84
    Near GPU R532
    EV@10K_1%_2
    R492
    EV@10K_1%_2
    EV@10K_1%_2 EV@10K_1%_2 EV@0.47u/6.3V_2 EV@0.47u/6.3V_2 EV@0.47u/6.3V_2

    A A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    N18P-G62-2/8 (Memory)
    Date: Tuesday, June 23, 2020 Sheet 20 of 77
    5 4 3 2 1
    5 4 3 2 1

    UG10K UG10N
    UG10M
    5/17 IFPAB 8/17 IFPE

    21
    6/17 IFPC
    IFPE_RSET AD6 IFPE_RSET
    DVI DP IFPC_RSET AF8 RG70 EV@1K_1%_2 +1.8V_MAIN +3V +3V
    IFPCD_RSET
    SL/DL RG34 EV@1K_1%_2 HDMI DP
    IFPA_L3 AN6 HDMI DP
    TXC/TXC GPU_TBT_D3# [38]
    IFPA_L3 AM6 IFPE_AUX_SDA AB4 INT_DP_AUXN
    IFPAB_RSET AJ8 TXC/TXC GPU_TBT_D3 [38] CORE_PLLVDD
    AG2 AB8 AB3 INT_DP_AUXP
    RG39 EV@1K_1%_2
    IFPAB_RSET
    0.4A 1.8V IFPC_AUX_SDA
    IFPC_AUX_SCL AG3
    GPU_DDCDATA
    GPU_DDCCLK
    [37]
    [37] CG235 EV@1u/6.3V_2
    IFPE_PLLVDD IFPE_AUX_SCL
    RG135 RG139 RG136
    AN3 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2
    CORE_PLLVDD TXD0/0
    TXD0/0
    IFPA_L2
    IFPA_L2 AP3
    GPU_TBT_D2#
    GPU_TBT_D2
    [38]
    [38]
    GPU_TBT_AUXN Under GPU Under GPU IFPE_L3 AC5 DP_D3# [35]

    6
    GPU_TBT_AUXP TXC
    IFPC_L3 AG4 IFPE_L3 AC4
    TXC GPU_CLK# [37] TXC DP_D3 [35]

    IFPE HDMI/DP
    CORE_PLLVDD AH8 CORE_PLLVDD AF7 AG5 QG13B
    IFPAB_PLLVDD IFPCD_PLLVDD IFPC_L3 GPU_CLK [37]

    TBT DP1
    TXC
    AM5 AC3 2
    1.8V EV@PJT138K

    HDMI
    TXD1/1 IFPA_L1 GPU_TBT_D1# [38] TXD0 IFPE_L2 DP_D2# [35]

    3
    IFPA_L1 AN5 CG241 IFPC_L2 AH4 IFPE_L2 AC2

    Min DP
    TXD1/1 GPU_TBT_D1 [38] TXD0 GPU_D0# [37] TXD0 DP_D2 [35]
    CG239 RG73 RG72 EV@1u/6.3V_2 AH3 QG13A
    102mA EV@1u/6.3V_2 EV@100K_1%_2EV@100K_1%_2
    TXD0 IFPC_L2 GPU_D0 [37]
    IFPE_L1 AC1
    DP_D1# [35]
    5 EV@PJT138K

    1
    AK6 IFPC AJ2 TXD1
    AD1 CG421
    TXD2/2
    TXD2/2
    IFPA_L0
    IFPA_L0 AL6
    GPU_TBT_D0#
    GPU_TBT_D0
    [38]
    [38] HDMI TXD1
    TXD1
    IFPC_L1
    IFPC_L1 AJ3
    GPU_D1#
    GPU_D1
    [37]
    [37]
    TXD1 IFPE_L1 DP_D1 [35]
    EV@0.01u/50V_4
    IFPE_L0 AD3
    TXD2 DP_D0# [35]

    4
    TXD2 IFPC_L0 AJ1 GPU_D2# [37] TXD2 IFPE_L0 AD2 DP_D0 [35]
    IFPA_AUX_SDA AH6 IFPC_L0 AK1
    GPU_TBT_AUXN [38] +1V_GFX
    TXD2 GPU_D2 [37] +1V_GFX
    AJ6
    Under GPU IFPA_AUX_SCL GPU_TBT_AUXP [38]
    1.0V AF6 IFP_IOVDD
    AC7
    +1V_GFX TXC IFPB_L3 AH9 0.4A GPU_DDCDATA
    GPU_DDCCLK
    AC8
    IFP_IOVDD
    IFP_IOVDD
    TXC IFPB_L3 AJ9 AG6 IFP_IOVDD
    QG14A QG14B

    2
    D AG8 EV@N18P/GB4D-128_960P EV@2N7002KDW EV@2N7002KDW D
    1.0V IFP_IOVDD
    TXD0/3 IFPB_L2 AP5
    INT_DP_AUXN
    AG9 AP6 CG253 CG249 CG321 CG320 RG68 RG69 CG250 CG242 CG325 CG314 4 3 1[35] 6
    118mA IFP_IOVDD TXD0/3 IFPB_L2
    *EV@0.1U/10V_2 EV@1u/6.3V_2 EV@4.7U/6.3V_4 EV@1u/6.3V_2 EV@N18P/GB4D-128_960P *EV@100K_1%_2 *EV@100K_1%_2 *EV@0.1U/10V_2 EV@1u/6.3V_2 EV@4.7U/6.3V_4 EV@1u/6.3V_2
    INT_DP_AUXN_Q INT_DP_AUXP_Q [35]

    TBT DP2
    CG315 CG319 AL7 UG10L
    TXD1/4 IFPB_L1
    EV@4.7U/6.3V_4 EV@1u/6.3V_2 TXD1/4 IFPB_L1 AM7 7/17 IFPD
    RG138
    EV@100K_1%_2
    AM8
    TXD2/5
    TXD2/5
    IFPB_L0
    IFPB_L0 AN8 Under GPU HDMI DP
    Under GPU
    IFPD_AUX_SDA AK2
    CG225 CG229 AL8 AK3 INT_DP_AUXP
    IFPB_AUX_SDA IFPD_AUX_SCL
    *EV@0.1U/10V_2 EV@1u/6.3V_2 IFPB_AUX_SCL AK8

    IFPD_L3 AK5
    TXC
    IFPD

    IFPD EDP ONLY


    TXC IFPD_L3 AK4 RG137
    IFPAB EV@100K_1%_2
    AL4
    Under GPU EV@N18P/GB4D-128_960P
    TXD0
    TXD0
    IFPD_L2
    IFPD_L2 AL3

    TXD1 IFPD_L1 AM4


    TXD1 IFPD_L1 AM3

    IFPD_L0 AM2
    TXD2
    IFPD_L0 AM1
    TXD2

    EV@N18P/GB4D-128_960P

    I2C LEVEL SHIFT &PEGX_RST#


    GATE(OVR PMBus)
    I2C LEVEL SHIFT & GATE(TO EC) PEGX_RST# [19,21,24]

    PEGX_RST# +1.8V_AON RG101 EV@2K_1%_2


    PEGX_RST# [19,21,24]
    GFx SMBus
    VRAM Table for G1/G2 GDDR6 Isolation(for EC)

    RAMCFG [2:0] STRAP2 STRAP1 STRAP0 Vendor Vendor P/N QPN RG102 RG130

    5
    0x0 0 0 0 Samsung K4Z80325BC-HC14 AKG58G0T519 EV@2K_1%_2 EV@2K_1%_2

    3 4 GFx_SCL
    0x1 0 0 1 Micron MT61K256M32JE-14:A AKG5QGDTL08 [57] GPUT_CLK
    QG12A EV@PJT138K

    5
    2
    +1.8V_AON
    To EC 3 4 I2CC_SCL_GFX
    C GFx_SDA [68] MBCLK1_GPU C
    6 1 QG11A EV@PJT138K
    [57] GPUT_DATA
    QG12B EV@PJT138K

    2
    To Power
    6 1 I2CC_SDA_GFX
    [68] MBDATA1_GPU
    RG62 RG66 RG64 RG67 RG65 RG63 QG11B EV@PJT138K
    SP@100K_1%_2 EV@100K_1%_2 *EV@100K_1%_2 *EV@100K_1%_2
    SP@100K_1%_2 SP@100K_1%_2 3.3V 1.8V
    STRAP0
    STRAP1
    STRAP2
    STRAP3
    STRAP4
    STRAP5

    RG55 RG60 RG57 RG59 RG58 RG56


    SP@100K_1%_2 *EV@100K_1%_2 EV@100K_1%_2 EV@100K_1%_2
    SP@100K_1%_2 SP@100K_1%_2

    Check with Nvidia


    UG10P
    +1.8V_AON PU/PD +1.8V_AON
    VBIOS +1.8V_AON
    12/17 MISC2

    VGA Description Size P/N GPUEVENT# RG129 EV@10K_1%_2


    GC6_1V8_MAIN_EN RG126 EV@10K_1%_2
    +1.8V_AON FRM_LCK# RG100 EV@10K_1%_2
    N18P-G1 GD25LQ80CTIGR 8Mb AKE5GF00Q01 NVVDD_PSI
    RG44 RG50 RG48 RG128 EV@10K_1%_2
    H6 ROM_CS *EV@100K_1%_2 *EV@100K_1%_2
    *EV@100K_1%_2 THER_ALERT# RG107 EV@10K_1%_2
    ROM_CS N18P-G2 MX25U8033EM1I-12G 8Mb AKE5GFP0Z02 UG10O PWR_LEVEL RG123 EV@10K_1%_2
    H5 ROM_SI ROM_SI RG52 FBVDD_PSI RG121 EV@10K_1%_2
    ROM_SI
    ROM_SO ROM_SO N19P-Q1 W25Q80EWSNIG 8Mb AKE5GGN0N02 10/17 MISC1
    ROM_SO H7 EV@10K_1%_2 CG409 RG113 RG106 +1.8V_AON
    STRAP0 J2 H4 ROM_SCLK ROM_SCLK EV@1u/6.3V_2 EV@2K_1%_2 GPIO28_OC_WARN# RG112 EV@10K_1%_2
    STRAP0 ROM_SCLK EV@2K_1%_2
    STRAP1 J7 STRAP1
    +1.8V_AON
    STRAP2 J6 T4 GFx_SCL
    STRAP2 UG8 I2CS_SCL
    STRAP3 J5 RG49 EV@0_5%_2 RG92 TS_AVDD AG10 Internal Thermal Sensor T3 GFx_SDA GPIO22_SWAPRDY_IN RG110 EV@2.2K_5%_2
    STRAP3 +1.8V_AON TS_AVDD I2CS_SDA
    J3 RG42 ROM_SI ROM_SI_R 5 8 GPU_GPIO24_IFPF_HPD
    STRAP4 STRAP4 EV@10K_1%_2RG46 EV@33.2_1%_2RG43 RG109 EV@10K_1%_2
    STRAP5 J1 EV@100K_1%_2 EV@100K_1%_2 ROM_SO 2 SPI_SI VCC OVERT# M1 R2 I2CC_SCL_GFX RG124 RG108 HPD_IFPD RG127 EV@10K_1%_2
    STRAP5 OVERT I2CC_SCL
    ROM_CS EV@33.2_1%_2RG54 ROM_CS_R 1 SPI_SO +1.8V_AON OVR PMBus only R3 I2CC_SDA_GFX EV@2K_1%_2
    I2CC_SDA EV@2K_1%_2
    ROM_SCLK EV@33.2_1%_2RG47 ROM_SCLK_R 6 CS# 3 WP#_3 RG45 EV@10K_1%_2 TP72 TS_VREF AP9 GPIO23_RASTER_SYNC1 RG93 EV@100K_1%_2
    TS_VREF
    SPI_SCK WP# RG86 JTAG_TMS
    *EV@10K_1%_2 R7 I2CB_SCL_G
    I2CB_SCL
    E1 BUFRST RG85 JTAG_TDI
    *EV@10K_1%_2 TP74 THERMDN K4 Avaliable Partner Use R6 I2CB_SDA_G
    BUFRST TP73 TP20 *
    THERMDN I2CB_SDA
    4 7 Hold#_7 RG51 EV@10K_1%_2
    TP24 GND SPI_HOLD JTAG_TCK
    TP25 RG88 *EV@10K_1%_2 TP75 THERMDP K3 THERMDP
    EV@SPI_FLASH RG95 EV@10K_1%_2
    Check with Nvidia TP21
    sop8-5_99-1_27
    TP22
    TP23 CG303
    EV@0.1U/10V_2
    JTAG_TCK AM10 JTAG_TCK
    NVVDD_PWM_VID/GPIO0
    GC6_FB_EN GPIO1
    P6
    M3
    NVVDD_PWM_GPU
    GC6FBEN
    NVVDD_PWM_GPU [68]
    AKE5GFP0Z02 TPG28 JTAG_TMS GC6FBEN [24]
    AP11 JTAG_TMS GPU_EVENT GPIO2 L6 GPUEVENT#
    IC FLASH (8P) MX25U8033EM1I-12G (8-SOP) TPG27 JTAG_TDI AM11 JTAG_TDI UNUSED GPIO3 P5
    TPG26 JTAG_TDO GC6_1V8_MAIN_EN
    AP12 JTAG_TDO 1V8_MAIN_EN GPIO4 P7 GC6_1V8_MAIN_EN [24]
    TPG25 JTAG_TRST# FRM_LCK#
    RG87 EV@10K_1%_2 AN11 JTAG_TRST FRAME_LOCK GPIO5 L7
    RG89 EV@10K_1%_2 JTAG_SEL AK11 NVVDD_PSI M7 NVVDD_PSI
    NVJTAG_SEL GPIO6 NVVDD_PSI [68]
    LCD_BL_PWM N8 LCD_BL_PWM RG99 EV@100K_1%_2 RG98 EV@10K_1%_2
    GPIO7
    B EV@N18P/GB4D-128_960P EV@0_5%_2 RG90 GPU_ADC_INP_R AN9 MEM_VDD_CTL L3 MEM_VDD_CTRL B
    [73] GPU_ADC_INP ADC_IN GPIO8 MEM_VDD_CTRL [70]
    EV@0_5%_2 RG91 GPU_ADC_INN_R AM9 M2 THER_ALERT# RG96 EV@100K_1%_2
    [73] GPU_ADC_INN ADC_IN THERM_ALERT#/ GPIO9
    MEM_VREF_CTL GPIO10 L1 MEM_VREF_CTL TP120
    LCD_VDD M5 LCD_VDD RG125 EV@100K_1%_2
    GPIO11
    PWR_LEVEL N3 PWR_LEVEL
    GPIO12
    UNUSED M4 GPIO22_SWAPRDY_IN
    GPIO13
    HPD_IFPA N4 HPD_TBT
    GPIO14
    HPD_IFPB UNUSED
    GPIO15 P2
    IDLE_IN_SW UNUSED R8 GPIO29_IDLE_IN_SW RG94 EV@10K_1%_2
    GPIO16
    HPD_IFPD M6 HPD_IFPD
    GPIO17
    HPD_IFPE R1 GPIO18_IFPE_HPD
    GPIO18
    +1.8V_AON RESERVED P3
    GPIO19
    NB_GC6 P4 NB_FGC6 TP119
    GPIO20
    LCD_BLEN P1 LCD_BLEN RG105 EV@100K_1%_2 RG122 EV@10K_1%_2
    GPIO21
    ADC_MUX_SEL UNUSED P8 GPIO28_OC_WARN#
    GPIO22 GPIO23_RASTER_SYNC1 GPIO28_OC_WARN# [73]
    RG117 UNUSED GPIO23
    T8
    L2 GPU_GPIO24_IFPF_HPD
    EV@10K_1%_2 HPD_IFPF GPIO24
    FBVDD_PSI R4 FBVDD_PSI
    GPIO25
    GPIO26_FP_FUSE FBVDD_PSI [70]
    R5
    HPD_TBT
    TBT HPD1 FP_FUSE
    HPD_IFPC
    GPIO26
    GPIO27 U3 GPIO27_IFPC_HPD GPIO26_FP_FUSE [23]

    EV@N18P/GB4D-128_960P
    3

    QG9 2 DP_HPD_TBT_Q RG116 EV@100K_1%_2TBT_DP_HPD


    TBT_DP_HPD [11,38]
    Over Temp. to turn off NVVDD
    EV@DMG1012T-7 PEGX_RST# [19,21,24] +1.8V_AON
    RG143 EV@10K_5%_2
    1

    RG115 CG418
    +1.8V_AON
    RG144 EV@10K_5%_2 +1.8V_AON
    POWER CHANGE NOTICE

    3
    EV@100K_1%_2 *EV@220p/25V_2
    2 QG17

    2
    OVERT#
    DGPU_OVT# [24] PWR_LEVEL
    EV@DMG1012T-7 1 3
    DGPU_OPP#_PROCHOT# [57]

    1
    RG145 *EV@0_5%_2 QG15
    EV@DMG1012T-7
    +1.8V_AON +1.8V_AON RG141
    *EV@0_5%_4

    RG120 RG114 GPU EVENT PWR_LEVEL DG6 2 1 *EV@SDM20U30-7 GPU_THROTTING# [60]


    EV@10K_1%_2 EV@10K_1%_2

    RG140 EV@0_5%_2
    Mini DP HPD
    GPIO27_IFPC_HPD HDMI-HPD GPIO18_IFPE_HPD
    3

    QG10 2 GPIO27_IFPC_HPD_Q RG119 HDMI_HPD_PCH


    EV@100K_1%_2 QG8 2 GPIO18_IFPE_HPD_Q RG104 EV@100K_1%_2GPU_DP_HPD GC6_FB_EN TO NOTIFY PCH
    EV@DMG1012T-7
    HDMI_HPD_PCH [13,37]
    EV@DMG1012T-7
    GPU_DP_HPD [11,35]
    THERM ALERT
    1

    RG118 CG419 RG97 CG417


    EV@100K_1%_2 *EV@220p/25V_2 EV@100K_1%_2 *EV@220p/25V_2

    A
    Vinafix.com A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    N18P-G62-3/8 (Display)
    Date: Tuesday, June 23, 2020 Sheet 21 of 77
    5 4 3 2 1
    5 4 3 2 1

    UG10F

    22
    UG10D 16/17 GND_2/2
    UG10E FBVDDQ_MEM [23,68,69] NVVDD
    15/17 GND_1/2 [20,23,25,26,70] FBVDDQ_MEM
    9/17 XVDD AG11 GND GND AL18 G25 GND GND P18 [19,20,21,24,37,72] +1.8V_MAIN
    A2 GND GND AL2 G28 GND GND P20 UNDER GPU: [0.47uFx12 + 10uFx4] Near GPU: [22uFx5 + 10uFx2]
    CONFIGURABLE A30 GND GND AL20 G3 GND GND P22
    POWER NVVDD A33 GND GND AL21 G30 GND GND P24
    CHANNELS A9 GND GND AL23 G32 GND GND R12
    XVDD U4 AA11 GND GND AL24 G33 GND GND R14 CG135 EV@10u/6.3V_4 CG168 EV@10u/6.3V_4
    XVDD U5 AA13 GND GND AL26 G5 GND GND R16 CG189 EV@10u/6.3V_4 CG88 EV@10u/6.3V_4
    XVDD U6 AA15 GND GND AL28 G7 GND GND R19
    XVDD U7 AA17 GND GND AL30 H30 GND GND R21
    XVDD U8 AA18 GND GND AL32 K2 GND GND R23 CG936 EV@0.47u/6.3V_2 CG27 EV@22u/6.3V_6
    XVDD V1 AA20 GND GND AL33 K28 GND GND T11 CG937 EV@0.47u/6.3V_2 CG272 EV@22u/6.3V_6
    XVDD V2 AA22 GND GND AL5 K30 GND GND T13 CG938 EV@0.47u/6.3V_2 CG276 EV@22u/6.3V_6
    XVDD V3 AA24 GND GND AM13 K32 GND GND T15 CG939 EV@0.47u/6.3V_2 CG273 EV@22u/6.3V_6
    D D
    XVDD V4 AB12 GND GND AM16 K33 GND GND T17 CG940 EV@0.47u/6.3V_2 CG87 EV@22u/6.3V_6
    AB14 GND GND AM19 K5 GND GND T18 CG941 EV@0.47u/6.3V_2
    AB16 GND GND AM22 K7 GND GND T2 CG942 EV@0.47u/6.3V_2
    XVDD V5 AB19 GND GND AM25 L12 GND GND T20 CG943 EV@0.47u/6.3V_2
    XVDD V6 AB2 GND GND AM34 L14 GND GND T22 CG944 EV@0.47u/6.3V_2
    XVDD V7 AB21 GND GND AN1 L16 GND GND T24 CG945 EV@0.47u/6.3V_2
    XVDD V8 AB23 GND GND AN10 L19 GND GND T28 CG946 EV@0.47u/6.3V_2
    XVDD W2 AB28 GND GND AN13 L21 GND GND T32 CG947 EV@0.47u/6.3V_2
    XVDD W3 AB30 GND GND AN16 L23 GND GND T5
    XVDD W4 AB32 GND GND AN19 M11 GND GND T7
    XVDD W5 AB5 GND GND AN22 M13 GND GND U12 CG174 EV@10u/6.3V_4
    XVDD W7 AB7 GND GND AN25 M15 GND GND U14 CG210 EV@10u/6.3V_4
    AC11 GND GND AN30 M17 GND GND U16
    AC13 GND GND AN34 M18 GND GND U19
    XVDD W8 AC15 GND GND AN4 M20 GND GND U21 CG948 EV@0.47u/6.3V_2
    XVDD Y1 AC17 GND GND AN7 M22 GND GND U23 CG949 EV@0.47u/6.3V_2
    XVDD Y2 AC18 GND GND AP2 Y23 GND GND V12 CG950 EV@0.47u/6.3V_2
    XVDD Y3 AC20 GND GND AP33 M24 GND GND V14 CG951 EV@0.47u/6.3V_2
    XVDD Y4 AC22 GND GND B1 M30 GND GND V16 CG952 EV@0.47u/6.3V_2
    XVDD Y5 AC24 GND GND B10 M34 GND GND V19 CG953 EV@0.47u/6.3V_2
    XVDD Y6 AD12 GND GND B2 N12 GND GND V21 CG954 EV@0.47u/6.3V_2
    XVDD Y7 AD14 GND GND B22 N14 GND GND V23 CG955 EV@0.47u/6.3V_2
    XVDD Y8 AD16 GND GND B23 N16 GND GND W11 CG956 EV@0.47u/6.3V_2
    AD19 GND GND B25 N19 GND GND W13 CG957 EV@0.47u/6.3V_2
    AD21 GND GND B28 N2 GND GND W15 CG958 EV@0.47u/6.3V_2
    XVDD AA1 AD23 GND GND B31 N21 GND GND W17 CG959 EV@0.47u/6.3V_2
    XVDD AA2 AE2 GND GND B34 N23 GND GND W18
    XVDD AA3 AE28 GND GND B4 N28 GND GND W20
    XVDD AA4 AE30 GND GND B7 N30 GND GND W22
    XVDD AA5 AE32 GND GND C10 N32 GND GND W24
    XVDD AA6 AE33 GND GND C13 N33 GND GND W28
    XVDD AA7 AE5 GND GND C19 N5 GND GND Y12
    XVDD AA8 AE7 GND GND C22 N7 GND GND Y14
    AF30 GND GND C25 P11 GND GND Y16
    AF32 GND GND C28 P13 GND GND Y19
    AH10 GND GND C7 P15 GND GND Y21
    AH13 GND GND D2 P17 GND
    C AH16 GND GND D22 C
    AH19 GND GND D28 GND_OPT C16
    AH2 GND GND D31 GND_OPT W32
    AH22 GND GND D33
    EV@N18P/GB4D-128_960P AH24 GND GND D9
    AH28 GND GND E10 Optional CMD GNDs (2)
    AH29 GND GND E22 NC for 4-Lyr cards
    AH30 GND GND E25
    AH32 GND GND E34 EV@N18P/GB4D-128_960P
    AH33 GND GND E4
    AH5 GND GND E5
    AH7 GND GND E7
    AJ7 GND GND F28
    AK10 GND GND F7
    AK31 GND GND G10
    AK7 GND GND G13
    AL12 GND GND G16
    AL14 GND GND G19
    AL15 GND GND G2
    AL17 GND GND G22

    EV@N18P/GB4D-128_960P

    UG10Q
    +1.8V_MAIN CORE_PLLVDD 11/17 XTAL_PLL

    UG10J LG1 1 2EV@HCB1005KF-330T30 CORE_PLLVDD AD8 XSN_PLLVDD


    H26
    B
    AC6
    4/17 NC

    AK9
    0.4A AE8
    GPCPLL_AVDD
    SP_PLLVDD
    B

    NC NC CG231 CG232 CG326 CG327


    AD4 NC NC AL10 *EV@0.1U/10V_2 EV@1u/6.3V_2EV@4.7U/6.3V_4
    EV@22u/6.3V_6 AD7 VID_PLLVDD
    AD5 NC NC AL11
    AE3 NC NC AL9
    AE4 NC NC AN2 CG243 CG248
    AF1 NC NC AP8 *EV@0.1U/10V_2 EV@1u/6.3V_2
    AF2 NC NC C15
    AF3 NC NC D19 XTALSSIN H1 EXT_REFCLK_FL XTAL_OUTBUFF J4 XTALOUTBUFF
    AF4 NC NC D20
    AF5 NC NC D23
    AG1
    AG26
    NC NC D26
    L8
    Under GPU VGA_XTALIN H3 XTAL_IN XTAL_OUT H2 VGA_XTALOUT
    NC NC
    AG7 M8 EV@N18P/GB4D-128_960P
    AH11
    AJ26
    NC
    NC
    NC
    NC V32
    U2
    Under GPU
    NC NC
    AJ28 NC NC U1
    AJ4 NC
    AJ5 NC 90 ohms +/- 15%
    AK26 NC
    Differential Impedance
    VGA_XTALIN

    VGA_XTALOUT XTALOUTBUFF
    XTALSSIN
    YG1
    2 4
    1 3

    EV@N18P/GB4D-128_960P
    EV@27MHZ/10ppm RG40 RG41
    CG411 CG410 EV@10K_1%_2 EV@10K_1%_2
    EV@10P/50V_4 EV@12P/50V_4

    A A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    N18P-G62-4/8 (MISC)
    Date: Tuesday, June 23, 2020 Sheet 22 of 77
    5 4 3 2 1
    5 4 3 2 1

    NVVDD

    AA12
    AA14
    AA16
    AA19
    UG10G
    13/17 NVVDD
    VDD
    VDD
    VDD
    VDD
    VDD
    VDD
    VDD
    VDD
    P12
    P14
    P16
    P19
    NVVDD

    FBVDDQ_MEM UG10H
    NVVDD

    CG143
    Under GPU: [10ux32 + 0.47uFx26 + 4.7uFx2]

    EV@10u/6.3V_4 CG223 EV@0.47u/6.3V_2 EV@4.7U/6.3V_4 CG473


    Near GPU: [22ux10 + 47uFx30 + 330uFx2 + 220ux1]

    CG317 EV@22u/6.3V_6 CG736 EV@47u/6.3V_8


    23
    AA21 VDD VDD P21 14/17 FBVDDQ CG140 EV@10u/6.3V_4 CG207 EV@0.47u/6.3V_2 EV@4.7U/6.3V_4 CG474 CG312 EV@22u/6.3V_6 CG907 EV@47u/6.3V_8
    AA23 VDD VDD P23 CG190 EV@10u/6.3V_4 CG172 EV@0.47u/6.3V_2 CG313 EV@22u/6.3V_6 CG908 EV@47u/6.3V_8
    AB11 VDD VDD R11 AA27 FBVDDQ CG152 EV@10u/6.3V_4 CG139 EV@0.47u/6.3V_2 CG311 EV@22u/6.3V_6 CG960 EV@22u/6.3V_6
    AB13 VDD VDD R13 AA30 FBVDDQ CG218 EV@10u/6.3V_4 CG198 EV@0.47u/6.3V_2 CG215 EV@22u/6.3V_6 CG961 EV@22u/6.3V_6
    AB15 VDD VDD R15 AB27 FBVDDQ CG199 EV@10u/6.3V_4 CG182 EV@0.47u/6.3V_2 CG324 EV@22u/6.3V_6 CG962 EV@22u/6.3V_6
    AB17 VDD VDD R17 AB33 FBVDDQ CG154 EV@10u/6.3V_4 CG208 EV@0.47u/6.3V_2 CG322 EV@22u/6.3V_6 CG963 EV@22u/6.3V_6
    AB18 VDD VDD R18 AC27 FBVDDQ CG185 EV@10u/6.3V_4 CG164 EV@0.47u/6.3V_2 CG222 EV@22u/6.3V_6 CG964 EV@22u/6.3V_6
    AB20 VDD VDD R20 AD27 FBVDDQ CG146 EV@10u/6.3V_4 CG214 EV@0.47u/6.3V_2 CG309 EV@22u/6.3V_6 CG965 EV@22u/6.3V_6
    AB22 VDD VDD R22 AE27 FBVDDQ CG156 EV@10u/6.3V_4 CG212 EV@0.47u/6.3V_2 CG310 EV@22u/6.3V_6 CG966 EV@22u/6.3V_6
    D D
    AB24 VDD VDD R24 AF27 FBVDDQ CG148 EV@10u/6.3V_4 CG217 EV@0.47u/6.3V_2
    AC12 VDD VDD T12 AG27 FBVDDQ CG167 EV@10u/6.3V_4 CG211 EV@0.47u/6.3V_2 CG967 EV@22u/6.3V_6
    AC14 VDD VDD T14 B13 FBVDDQ CG205 EV@10u/6.3V_4 CG230 EV@0.47u/6.3V_2 CG227 *EV@330u/2.5V_3528 CG968 EV@22u/6.3V_6
    AC16 VDD VDD T16 B16 FBVDDQ CG183 EV@10u/6.3V_4 CG969 EV@22u/6.3V_6

    +
    AC19 VDD VDD T19 B19 FBVDDQ CG162 EV@10u/6.3V_4 CG460 EV@0.47u/6.3V_2 CG970 EV@22u/6.3V_6
    AC21 VDD VDD T21 E13 FBVDDQ CG193 EV@10u/6.3V_4 CG461 EV@0.47u/6.3V_2 CG971 EV@22u/6.3V_6
    AC23 VDD VDD T23 E16 FBVDDQ CG204 EV@10u/6.3V_4 CG462 EV@0.47u/6.3V_2 CG972 EV@22u/6.3V_6
    AD11 VDD VDD U11 E19 FBVDDQ CG161 EV@10u/6.3V_4 CG463 EV@0.47u/6.3V_2 CG973 EV@22u/6.3V_6
    AD13 VDD VDD U13 H10 FBVDDQ CG141 EV@10u/6.3V_4 CG464 EV@0.47u/6.3V_2 CG974 EV@22u/6.3V_6
    AD15 VDD VDD U15 H11 FBVDDQ CG192 EV@10u/6.3V_4 CG465 EV@0.47u/6.3V_2 CG975 EV@22u/6.3V_6
    AD17 VDD VDD U17 H12 FBVDDQ CG163 EV@10u/6.3V_4 CG466 EV@0.47u/6.3V_2 CG986 EV@22u/6.3V_6
    AD18 VDD VDD U18 H13 FBVDDQ CG179 EV@10u/6.3V_4 CG467 EV@0.47u/6.3V_2
    AD20 VDD VDD U20 H14 FBVDDQ CG155 EV@10u/6.3V_4 CG468 EV@0.47u/6.3V_2 CG977 EV@22u/6.3V_6
    AD22 VDD VDD U22 H15 FBVDDQ CG147 EV@10u/6.3V_4 CG469 EV@0.47u/6.3V_2 CG978 EV@22u/6.3V_6
    AD24 VDD VDD U24 H16 FBVDDQ CG203 EV@10u/6.3V_4 CG470 EV@0.47u/6.3V_2 CG979 EV@22u/6.3V_6
    L11 VDD VDD V11 H18 FBVDDQ CG177 EV@10u/6.3V_4 CG471 EV@0.47u/6.3V_2 CG980 EV@22u/6.3V_6
    L13 VDD VDD V13 H19 FBVDDQ CG184 EV@10u/6.3V_4 CG472 EV@0.47u/6.3V_2 CG981 EV@22u/6.3V_6
    L15 VDD VDD V15 H20 FBVDDQ CG153 EV@10u/6.3V_4 CG982 EV@22u/6.3V_6
    L17 VDD VDD V17 H21 FBVDDQ CG187 EV@10u/6.3V_4 CG983 EV@22u/6.3V_6
    L18 VDD VDD V18 H22 FBVDDQ CG178 EV@10u/6.3V_4 CG984 EV@22u/6.3V_6
    L20 VDD VDD V20 H23 FBVDDQ CG170 EV@10u/6.3V_4 CG985 EV@22u/6.3V_6
    L22 VDD VDD V22 H24 FBVDDQ CG171 EV@10u/6.3V_4 CG987 EV@22u/6.3V_6
    L24 VDD VDD V24 H8 FBVDDQ
    M12 VDD VDD W12 H9 FBVDDQ
    M14 VDD VDD W14 L27 FBVDDQ
    M16 VDD VDD W16 M27 FBVDDQ
    M19 VDD VDD W19 N27 FBVDDQ
    M21 VDD VDD W21 P27 FBVDDQ
    M23 VDD VDD W23 R27 FBVDDQ
    N11 VDD VDD Y11 T27 FBVDDQ
    N13 VDD VDD Y13 T30 FBVDDQ
    N15 VDD VDD Y15 T33 FBVDDQ
    N17 VDD VDD Y17 V27 FBVDDQ
    N18 VDD VDD Y18 W27 FBVDDQ
    N20 VDD VDD Y20 W30 FBVDDQ
    N22 VDD VDD Y22 W33 FBVDDQ
    N24 VDD VDD Y24 Y27 FBVDDQ

    Vinafix.com
    C C

    FBVDDQ_SENSE F1 FBVDDQ_SENSE
    FBVDDQ_SENSE [70]
    PROBE_FB_GND F2 FB_GND_SENSE RG103 EV@1K_1%_2

    FB_CAL_PD_VDDQ J27 FB_CAL_PD_VDDQ RG30 EV@40.2_1%_2


    FBVDDQ_MEM

    FB_CAL_PU_GND H27 FB_CAL_PU_GND RG31 EV@40.2_1%_2

    FB_CALTERM_GND H25 FB_CAL_TERM_GND RG32 EV@40.2_1%_2

    EV@N18P/GB4D-128_960P

    VDD_SENSE L4
    VGPU_CORE_SENSE [68]

    GND_SENSE L5
    VSS_GPU_SENSE [68]

    EV@N18P/GB4D-128_960P

    +1.8V_AON
    UNDER GPU: [0.47uFx3]
    B UG10I B
    +1.8V_AON 17/17 1V8_AON CG442 EV@0.47u/6.3V_2
    CG441 EV@0.47u/6.3V_2
    CG295 EV@0.47u/6.3V_2
    UG9 CG294 EV@0.47u/6.3V_2
    CG300 1 6 FP_FUSE_GPU 1V8_AON J8
    2 IN#1 OUT K8
    EV@2.2U/10V_4 IN#2 1V8_AON
    9
    +3V_S5 IN#3/EPAD CG299 RG53 AG12 FP_FUSE_GPU
    3 EV@2.21K_1%_2
    FP_FUSE_SRC Near GPU: [0.47uFx6]
    VBIAS EV@2.2U/10V_4
    CG293 EV@0.47u/6.3V_2
    4 5 CG292 EV@0.47u/6.3V_2
    CG304 ON GND CG296 EV@0.47u/6.3V_2
    EV@0.1u/16V_4 EV@AOZ1335DI_2 CG446 EV@0.47u/6.3V_2
    CG447 EV@0.47u/6.3V_2
    CG448 EV@0.47u/6.3V_2

    [21] GPIO26_FP_FUSE

    Near GPU: [4.7uFx3]


    EV@N18P/GB4D-128_960P CG302 EV@4.7U/6.3V_4
    RG61 CG301 EV@4.7U/6.3V_4
    EV@10K_1%_2 CG298 EV@4.7U/6.3V_4

    A A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    N18P-G62-5/8 (Power)
    Date: Tuesday, June 23, 2020 Sheet 23 of 77
    5 4 3 2 1
    5 4 3 2 1

    24
    D D

    1V8_AON ENABLE 1V8_MAIN ENABLE


    GC6_1V8_MAIN_EN GC6FBEN NB_FGC6 +1.8V_AON +1.8V_MAIN NVVDD +1V_GFX FBVDDQ RG21 *EV@Short_2 +1.8V
    +1.8V
    0 RG9 *EV@0_5%_2 +1.8V_AON
    POWER ON 1 0 ON ON ON ON ON

    GC6 0 1 0 ON OFF OFF OFF ON

    5
    DGPU_PWR_EN 2
    [13] DGPU_PWR_EN 4 DGPU_PWR_EN 1
    FGC6 0 1 1 ON ON OFF ON ON PS_FBVDD_PGOOD 1
    1V8_AON_EN [72]
    4
    1V8_MAIN_EN_U 2 1V8_MAIN_EN [72]
    UG2 UG6

    3
    EV@74LVC1G32GW EV@NL17SZ08EDFT2G

    3
    1V88_AON-->1V8_MAIN-->NVVDD-->PEX_VDD-->FBVDD(Q)-->PEGX_RST#

    C C

    NVVDD --> 1V_GFX FBVDDQ ENABLE


    RG3 *EV@0_5%_4 RG4 *EV@0_5%_4
    +1.8V_AON +1.8V
    +1.8V_AON +1.8V
    RG24 *EV@0_5%_2

    RG19 *EV@Short_2

    *EV@0_5%_2

    *EV@Short_2
    +1.8V_AON +1.8V

    *EV@0_5%_2

    *EV@Short_2

    RG16

    RG22
    +1.8V_AON +1.8V
    5

    2 +1.8V_MAIN
    [21] GC6_1V8_MAIN_EN
    4 1V8_MAIN_EN_U CG4
    1 +1.8V_AON

    *EV@0_5%_2

    *EV@Short_2
    RG17

    RG23
    EV@0.1u/6.3V_2
    UG5 RG10 RG15 *EV@10K_1%_2
    3

    EV@74LVC1G32GW EV@10K_1%_2

    5
    5

    2
    [72] +1V_GFX_PG
    1 2 1V8_MAIN_PG 1 4
    4 NVVDD_CORE1 1 FBVDD_EN [70]
    DG4 EV@RB500V-40 GC6FBEN

    RG26

    RG20
    2 UG1
    UG7 EV@74LVC1G32GW

    3
    EV@NL17SZ08EDFT2G
    3

    5
    PEXVDD_EN_U 2
    4
    1 +1V_GFX_EN [72]

    B B
    UG4

    3
    EV@74LVC1G32GW
    +1.8V_AON

    Ra POWER GOOD
    RG18
    EV@100K_1%_2 RG25
    +1.8V_AON EV@10K_1%_2
    +1.8V_AON

    DGPU_PWROK
    DGPU_PWROK [19]
    RG7
    NVVDD_CORE1 RG27 EV@10K_1%_2
    Ra: NC while FGC6

    6
    EV@10K_1%_2
    QG1B
    2 EV@PJX138K
    NVVDD_CORE1_EN [68]
    OVER TEMP.

    3
    NVVDDPG 1 CG3

    1
    DG5 1 2 EV@RB500V-40 DG2 2 1 EV@RB500V-40 3 5 *EV@0.1u/6.3V_2
    [21] DGPU_OVT#
    2
    [70] PS_FBVDD_PGOOD
    QG1A
    RG14 EV@20.5K_1%_2 DG1 EV@PJX138K

    4
    EV@BAT54AW-L
    [19,21] PEGX_RST#
    RG5 CG1
    *EV@1.2K_1%_4 EV@0.1u/50V_4
    RG11
    EV@10K_1%_2
    +1.8V_AON
    +1.8V +1.8V_AON
    3

    NVVDD_PG_LOOP_OVT 2 QG4
    EV@DMG1012T-7
    DG3 1 2 EV@RB500V-40 PEXVDD_EN_U
    R85 R86
    1
    6

    RG6 *EV@Short_2 *EV@0_5%_2


    3

    *EV@10K_1%_2 RG8 EV@1K_1%_2


    2 RG2 CG2
    A 5 *EV@12.1K_1%_4 EV@820p/50V_4 A
    [68] NVVDDPG
    QG2A QG2B R88 *EV@Short_2
    EV@PJX138K EV@PJX138K

    2
    1
    4

    DGPU_PWROK R87 *EV@0_5%_2 1 3 DGPU_PWROK_Q


    DGPU_PWROK_Q [13]
    QG3 EV@DMG1012T-7
    [21] GC6FBEN

    Quanta Computer Inc.


    NVVDD POWER GOOD LOOPBACK PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    [make sure PEX_VDD ramp down before NVVDD] N18P-G62-6/8 (POWER SEQ) 1A

    Date: Tuesday, June 23, 2020 Sheet 24 of 77


    5 4 3 2 1
    5 4 3 2 1

    MEMORY: FBA Partition 31..0


    FBVDDQ_MEM
    +1.8V_AON
    [20,22,23,26,70]
    [19,21,23,24,26,68,70,72]
    Reference X3BA schematic [20,25] FBA_DBI[7:0]
    40OHM_NETCLASS1

    FBA_DBI0
    FBA_DBI1
    [20,25] FBA_EDC[7:0]
    40OHM_NETCLASS1

    FBA_EDC0
    FBA_EDC1
    FBVDDQ_MEM FBVDDQ_MEM

    25
    FBA_DBI2 FBA_EDC2 CG35 CG80 CG47 CG61 CG26 CG52 CG65 CG59 CG31 CG75 CG60 CG53
    FBA_DBI3 FBA_EDC3 *EV@0.47u/6.3V_2*EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 *EV@0.47u/6.3V_2 EV@1u/6.3V_2
    FBA_DBI4 FBA_EDC4
    FBVDDQ_MEM FBA_DBI5 FBA_EDC5
    VRAM2A FBA_DBI6 FBA_EDC6 VREFC_VMA1 0.4MM=16mils
    A11 FBA_DBI7 FBA_EDC7
    A13 VSS#A11 FBA_VREFC
    VSS#A13 FBA_VREFC [25]
    A2 A1
    A4 VSS#A2 VDD#A1 A14 [20,25] FBA_CMD[33:0]
    B1 VSS#A4 VDD#A14 E10 RG76
    B14 VSS#B1 VDD#E10 E5
    C10 VSS#B14 VDD#E5 H13 EV@1K_1%_2
    C12 VSS#C10 VDD#H13 H2
    C3 VSS#C12 VDD#H2 L13
    D VSS#C3 VDD#L13 [20] VMA_DQ[31:0] D
    C5 L2
    D1 VSS#C5 VDD#L2 P10
    D12
    D14
    D3
    VSS#D1
    VSS#D12
    VSS#D14
    VSS#D3
    VDD#P10
    VDD#P5
    VDD#V1
    VDD#V14
    P5
    V1
    V14
    M3 JS-N18-0709 swap
    VRAM2C FBA_CMD13
    VRAM2D

    FBA_VREFC
    E11 H3 K1 FBVDDQ_MEM FBVDDQ_MEM
    E4 VSS#E11 VRAM2B FBA_CMD15 G11 CA0_A VREFC FBA_VREFC [25]
    VSS#E4 CA1_A Around DRAM Around DRAM
    F1 B10 NORMAL FBA_CMD0 G4
    F12 VSS#F1 VDDQ#B10 B5 NORMAL VMA_DQ24 N2 FBA_CMD9 H12 CA2_A
    F14 VSS#F12 VDDQ#B5 C1 VMA_DQ12 G2 VMA_DQ26 P3 DQ0_B/DQ6_B FBA_CMD11 H5 CA3_A CG8 CG9 CG66
    F3 VSS#F14 VDDQ#C1 C11 VMA_DQ9 B3 DQ0_A/DQ7_A VMA_DQ25 M2 DQ1_B/DQ4_B FBA_CMD12 H10 CA4_A CG67 CG10 CG49
    G1
    G12
    G14
    VSS#F3
    VSS#G1
    VSS#G12
    VSS#G14
    VDDQ#C11
    VDDQ#C14
    VDDQ#C4
    VDDQ#E1
    C14
    C4
    E1 QD8~15
    VMA_DQ13
    VMA_DQ15
    VMA_DQ11
    VMA_DQ10
    F2
    E3
    B4
    DQ1_A/DQ2_A
    DQ2_A/DQ6_A
    DQ3_A/DQ4_A
    DQ4_A/DQ0_A
    QD24~31 VMA_DQ27
    VMA_DQ30
    VMA_DQ31
    VMA_DQ29
    P2
    U3
    V3
    DQ2_B/DQ7_B
    DQ3_B/DQ5_B
    DQ4_B/DQ2_B
    DQ5_B/DQ1_B
    FBA_CMD3
    FBA_CMD4
    FBA_CMD6
    FBA_CMD5
    J12
    J11
    J4
    CA5_A
    CA6_A
    CA7_A
    CA8_A
    EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6
    EV@22u/6.3V_6
    EV@22u/6.3V_6
    EV@22u/6.3V_6

    G3 E14 B2 U4 J3
    H11 VSS#G3 VDDQ#E14 F11 VMA_DQ14 E2 DQ5_A/DQ3_A VMA_DQ28 U2 DQ6_B/DQ0_B FBA_CMD8 J5 CA9_A
    H4 VSS#H11 VDDQ#F11 F4 VMA_DQ8 A3 DQ6_A/DQ5_A DQ7_B/DQ3_B FBA_CMD7 G10 CABI_n_A N5 SNN_FBA_TCK0 TPG5
    L11 VSS#H4 VDDQ#F4 H1 DQ7_A/DQ1_A FBA_EDC3 T2 CKE_n_A TCK F10 SNN_FBA_TDI0 TPG10
    L4 VSS#L11 VDDQ#H1 H14 FBA_EDC1 C2 FBA_DBI3 R2 EDC0_B TDI N10 SNN_FBA_TDO0 TPG11
    M1 VSS#L4 VDDQ#H14 J13 FBA_DBI1 D2 EDC0_A DBI0_N_B FBA_CMD10 L3 TDO F5 SNN_FBA_TMS0 TPG3
    M12 VSS#M1 VDDQ#J13 J2 DBI0_N_A VMA_WCKB23 R4 FBA_CMD1 M11 CA0_B TMS
    M14 VSS#M12 VDDQ#J2 K13 VMA_WCKB01 D4 [20] VMA_WCKB23 VMA_WCKB23# R5 WCK_t_B/NC FBA_CMD32 M4 CA1_B FBVDDQ_MEM FBVDDQ_MEM
    VSS#M14 VDDQ#K13 [20] VMA_WCKB01 VMA_WCKB01# WCK_t_A [20] VMA_WCKB23# WCK_c_B/NC FBA_CMD14 CA2_B
    M3 K2 D5 L12 Close to DRAM Close to DRAM
    N1 VSS#M3 VDDQ#K2 L1 [20] VMA_WCKB01# WCK_c_A FBA_CMD11 L5 CA3_B
    N12 VSS#N1 VDDQ#L1 L14 FBA_CMD12 L10 CA4_B
    N14 VSS#N12 VDDQ#L14 N11 X16 X8 VMA_DQ20 P13 FBA_CMD3 K12 CA5_B J14 FBA_ZQ_1_A EV@121_1%_2 RG28 CG19 CG20 CG18 CG48 CG41 CG64
    N3 VSS#N14 VDDQ#N11 N4 VMA_DQ6 B11 VMA_DQ17 U13 DQ8_B/DQ13_B FBA_CMD4 K11 CA6_B ZQ_A K14
    P11 VSS#N3 VDDQ#N4 P1 VMA_DQ2 G13 DQ8_A NC VMA_DQ22 M13 DQ9_B/DQ11_B FBA_CMD6 K4 CA7_B ZQ_B EV@10u/6.3V_6
    EV@10u/6.3V_6
    EV@10u/6.3V_6 EV@10u/6.3V_6
    EV@10u/6.3V_6
    EV@10u/6.3V_6
    P4
    R1
    R12
    VSS#P11
    VSS#P4
    VSS#R1
    VSS#R12
    VDDQ#P1
    VDDQ#P14
    VDDQ#T1
    VDDQ#T11
    P14
    T1
    T11 QD0~7
    VMA_DQ1
    VMA_DQ0
    VMA_DQ3
    VMA_DQ7
    E13
    F13
    E12
    DQ9_A/DQ15_A
    DQ10_A/DQ13_A
    DQ11_A/DQ14_A
    DQ12_A
    NC
    NC
    NC
    QD16~23 VMA_DQ23
    VMA_DQ16
    VMA_DQ21
    VMA_DQ19
    N13
    U12
    P12
    DQ10_B/DQ15_B
    DQ11_B/DQ14_B
    DQ12_B/DQ10_B
    DQ13_B/DQ12_B
    FBA_CMD5
    FBA_CMD8
    FBA_CMD7
    K3
    K5
    M10
    CA8_B
    CA9_B
    CABI_n_B
    CKE_n_B
    FBA_ZQ_1_B EV@121_1%_2 RG29

    R14 T14 B12 NC V12


    R3 VSS#R14 VDDQ#T14 T4 VMA_DQ4 B13 DQ13_A/DQ10_A NC VMA_DQ18 U11 DQ14_B/DQ9_B
    T10 VSS#R3 VDDQ#T4 U10 VMA_DQ5 A12 DQ14_A/DQ11_A NC DQ15_B/DQ8_B FBA_CMD2 J1
    T12 VSS#T10 VDDQ#U10 U5 DQ15_A/DQ9_A NC FBA_EDC2 T13 RESET_n G5 SNN_FBA_RFU_G5 TPG7
    T3 VSS#T12 VDDQ#U5 FBA_EDC0 C13 FBA_DBI2 R13 EDC1_B NC#G5 M5 SNN_FBA_RFU_M5 TPG1
    T5 VSS#T3 +1.8V_AON FBA_DBI0 D13 EDC1_A GND DBI1_n_B VMA_CLK0# K10 NC#M5
    VSS#T5 DBI1_n_A VMA_WCK23 R11 [20] VMA_CLK0# VMA_CLK0 CK_c +1.8V_AON
    U1 NC J10
    U14 VSS#U1 A10 VMA_WCK01 D11 [20] VMA_WCK23 VMA_WCK23# R10 WCK1_t_B [20] VMA_CLK0 CK_t
    VSS#U14 VPP#A10 [20] VMA_WCK01 WCK1_t_A [20] VMA_WCK23# WCK1_c_B option
    V11 A5 VMA_WCK01# D10 NC
    VSS#V11 VPP#A5 [20] VMA_WCK01# WCK1_c_A EV@K4Z80325BC-HC14(DC2001)
    V13 V10 NC
    VSS#V13 VPP#V10 EV@K4Z80325BC-HC14(DC2001)
    V2 V5 EV@K4Z80325BC-HC14(DC2001)
    V4 VSS#V2 VPP#V5 CG353 CG363 CG359 CG357 CG361
    VSS#V4
    EV@4.7u/6.3V_6 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2

    EV@K4Z80325BC-HC14(DC2001)
    CHANGE FBVDDQ TO FBVDDQ_MEM
    C C

    FBVDDQ_MEM FBVDDQ_MEM
    FBVDDQ_MEM FBVDDQ_MEM

    Vinafix.com
    Right under DRAM Right under DRAM
    Close to DRAM Close to DRAM

    CG50 CG46 CG72 CG69 CG70 CG55 CG63 CG32 CG22 CG81 CG79 CG71
    EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 CG350 CG338 CG331 CG352 CG342 CG348 CG347 CG341 CG351 CG340 CG339 CG330
    EV@1u/6.3V_2 *EV@0.47u/6.3V_2EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2

    MEMORY: FBA Partition 63..32


    FBVDDQ_MEM FBVDDQ_MEM
    40OHM_NETCLASS1 40OHM_NETCLASS1
    [20,25] FBA_DBI[7:0] [20,25] FBA_EDC[7:0]
    FBA_DBI0 FBA_EDC0
    FBVDDQ_MEM FBA_DBI1 FBA_EDC1
    VRAM1A FBA_DBI2 FBA_EDC2
    A11 FBA_DBI3 FBA_EDC3 CG349 CG356 CG328 CG30 CG62 CG58 CG336 CG38 CG329 CG56 CG57 CG54
    A13 VSS#A11 FBA_DBI4 FBA_EDC4
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2
    A2 VSS#A13 A1 FBA_DBI5 FBA_EDC5
    A4 VSS#A2 VDD#A1 A14 FBA_DBI6 FBA_EDC6
    B1 VSS#A4 VDD#A14 E10 FBA_DBI7 FBA_EDC7
    B14 VSS#B1 VDD#E10 E5
    C10 VSS#B14 VDD#E5 H13
    C12 VSS#C10 VDD#H13 H2
    C3 VSS#C12 VDD#H2 L13 [20,25] FBA_CMD[33:0]
    B C5 VSS#C3 VDD#L13 L2 B
    D1 VSS#C5 VDD#L2 P10
    [20] VMA_DQ[63:32]
    D12 VSS#D1 VDD#P10 P5
    D14 VSS#D12 VDD#P5 V1
    D3 VSS#D14 VDD#V1 V14
    E11 VSS#D3 VDD#V14
    E4 VSS#E11
    F1 VSS#E4
    F12 VSS#F1 VDDQ#B10 B5
    B10 M4
    F14 VSS#F12 VDDQ#B5 C1 VRAM1C VRAM1D VREFC_VMA1 0.4MM=16mils
    F3 VSS#F14 VDDQ#C1 C11 FBVDDQ_MEM FBVDDQ_MEM
    G1 VSS#F3 VDDQ#C11 C14 VRAM1B NORMAL FBA_CMD29 H3 K1 FBA_VREFC Around DRAM Around DRAM
    FBA_VREFC [25]
    G12 VSS#G1 VDDQ#C14 C4 VMA_DQ55 N2 FBA_CMD31 G11 CA0_A VREFC
    G14 VSS#G12 VDDQ#C4 E1 NORMAL VMA_DQ52 P3 DQ0_B/DQ6_B FBA_CMD16 G4 CA1_A
    G3 VSS#G14 VDDQ#E1 E14 VMA_DQ34 G2 VMA_DQ54 M2 DQ1_B/DQ4_B FBA_CMD25 H12 CA2_A CG28 CG51 CG6
    H11 VSS#G3
    H4 VSS#H11
    VDDQ#E14 F11
    VDDQ#F11 F4
    VMA_DQ38
    VMA_DQ33
    B3
    F2
    DQ0_A/DQ7_A
    DQ1_A/DQ2_A QD56~63 VMA_DQ53
    VMA_DQ49
    P2
    U3
    DQ2_B/DQ7_B
    DQ3_B/DQ5_B
    FBA_CMD22
    FBA_CMD21
    H5
    H10
    CA3_A
    CA4_A EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6
    CG7 CG16 CG11

    L11 VSS#H4
    L4 VSS#L11
    M1 VSS#L4
    VDDQ#F4 H1
    VDDQ#H1 H14
    VDDQ#H14 J13
    QD40~47 VMA_DQ32
    VMA_DQ37
    VMA_DQ36
    E3
    B4
    B2
    DQ2_A/DQ6_A
    DQ3_A/DQ4_A
    DQ4_A/DQ0_A
    VMA_DQ48
    VMA_DQ50
    VMA_DQ51
    V3
    U4
    U2
    DQ4_B/DQ2_B
    DQ5_B/DQ1_B
    DQ6_B/DQ0_B
    FBA_CMD24
    FBA_CMD23
    FBA_CMD26
    J12
    J11
    J4
    CA5_A
    CA6_A
    CA7_A
    EV@22u/6.3V_6
    EV@22u/6.3V_6
    EV@22u/6.3V_6

    M12 VSS#M1 VDDQ#J13 J2 VMA_DQ35 E2 DQ5_A/DQ3_A DQ7_B/DQ3_B FBA_CMD17 J3 CA8_A


    M14 VSS#M12 VDDQ#J2 K13 VMA_DQ39 A3 DQ6_A/DQ5_A FBA_EDC6 T2 FBA_CMD30 J5 CA9_A
    M3 VSS#M14 VDDQ#K13 K2 DQ7_A/DQ1_A FBA_DBI6 R2 EDC0_B FBA_CMD33 G10 CABI_n_A N5 SNN_FBA_TCK1 TPG9
    N1 VSS#M3 VDDQ#K2 L1 FBA_EDC4 C2 DBI0_N_B CKE_n_A TCK F10 SNN_FBA_TDI1 TPG2
    N12 VSS#N1 VDDQ#L1 L14 FBA_DBI4 D2 EDC0_A VMA_WCK67 R4 TDI N10 SNN_FBA_TDO1 TPG6
    [20] VMA_WCK67
    N14 VSS#N12 VDDQ#L14 N11 DBI0_N_A VMA_WCK67# R5 WCK_t_B/NC FBA_CMD27 L3 TDO F5 SNN_FBA_TMS1 TPG8 FBVDDQ_MEM FBVDDQ_MEM
    N3 EV@K4Z80325BC-HC14(DC2001)
    VSS#N14 VDDQ#N11 N4 VMA_WCK45 D4 [20] VMA_WCK67# WCK_c_B/NC FBA_CMD28 M11 CA0_B TMS
    [20] VMA_WCK45 Close to DRAM Close to DRAM
    P11 VSS#N3 VDDQ#N4 P1 VMA_WCK45# D5 WCK_t_A FBA_CMD19 M4 CA1_B
    P4 VSS#P11 VDDQ#P1 P14 [20] VMA_WCK45# WCK_c_A FBA_CMD20 L12 CA2_B
    R1 VSS#P4 VDDQ#P14 T1 VMA_DQ60 P13 FBA_CMD22 L5 CA3_B CG13 CG5 CG17 CG14 CG29 CG12
    R12 VSS#R1 VDDQ#T1 T11 X16 X8 VMA_DQ63 U13 DQ8_B/DQ13_B FBA_CMD21 L10 CA4_B
    R14 VSS#R12 VDDQ#T11 T14 VMA_DQ41 B11 VMA_DQ59 M13 DQ9_B/DQ11_B FBA_CMD24 K12 CA5_B J14 FBA_ZQ_2_A EV@121_1%_2 RG75 EV@10u/6.3V_6
    EV@10u/6.3V_6
    EV@10u/6.3V_6 EV@10u/6.3V_6
    EV@10u/6.3V_6
    EV@10u/6.3V_6
    R3 VSS#R14
    T10 VSS#R3
    VDDQ#T14 T4
    VDDQ#T4 U10
    VMA_DQ44
    VMA_DQ47
    G13
    E13
    DQ8_A
    DQ9_A/DQ15_A
    NC
    NC QD48~55 VMA_DQ56
    VMA_DQ58
    N13
    U12
    DQ10_B/DQ15_B
    DQ11_B/DQ14_B
    FBA_CMD23
    FBA_CMD26
    K11
    K4
    CA6_B
    CA7_B
    ZQ_A
    ZQ_B
    K14

    T12 VSS#T10
    T3 VSS#T12
    T5 VSS#T3
    VSS#T5
    VDDQ#U10 U5
    VDDQ#U5
    +1.8V_AON
    QD32~39 VMA_DQ46
    VMA_DQ45
    VMA_DQ40
    VMA_DQ43
    F13
    E12
    B12
    DQ10_A/DQ13_A
    DQ11_A/DQ14_A
    DQ12_A
    DQ13_A/DQ10_A
    NC
    NC
    NC
    VMA_DQ61
    VMA_DQ57
    VMA_DQ62
    P12
    V12
    U11
    DQ12_B/DQ10_B
    DQ13_B/DQ12_B
    DQ14_B/DQ9_B
    DQ15_B/DQ8_B
    FBA_CMD17
    FBA_CMD30
    FBA_CMD33
    K3
    K5
    M10
    CA8_B
    CA9_B
    CABI_n_B
    CKE_n_B
    FBA_ZQ_2_B EV@121_1%_2 RG74

    U1 B13 NC
    U14 VSS#U1 A10 VMA_DQ42 A12 DQ14_A/DQ11_A NC FBA_EDC7 T13
    V11 VSS#U14 VPP#A10 A5 DQ15_A/DQ9_A NC FBA_DBI7 R13 EDC1_B FBA_CMD18 J1
    V13 VSS#V11 VPP#A5 V10 FBA_EDC5 C13 DBI1_n_B RESET_n G5 SNN_FBA_RFU_G5_1 TPG12
    V2 VSS#V13 VPP#V10 V5 FBA_DBI5 D13 EDC1_A GND VMA_WCKB67 R11 NC#G5 M5 SNN_FBA_RFU_M5_1 TPG4
    [20] VMA_WCKB67
    V4 VSS#V2 VPP#V5 DBI1_n_A NC VMA_WCKB67# R10 WCK1_t_B VMA_CLK1# K10 NC#M5
    VSS#V4 VMA_WCKB45 D11 [20] VMA_WCKB67# WCK1_c_B [20] VMA_CLK1# VMA_CLK1 J10 CK_c +1.8V_AON
    [20] VMA_WCKB45 VMA_WCKB45# D10 WCK1_t_A NC [20] VMA_CLK1 CK_t
    [20] VMA_WCKB45# WCK1_c_A EV@K4Z80325BC-HC14(DC2001) option
    NC
    EV@K4Z80325BC-HC14(DC2001)
    EV@K4Z80325BC-HC14(DC2001)

    CG366 CG358 CG360 CG362 CG364

    A EV@4.7u/6.3V_6 EV@1u/6.3V_2 *EV@0.47u/6.3V_2


    EV@1u/6.3V_2 *EV@0.47u/6.3V_2 A

    FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM


    Right under DRAM Right under DRAM Close to DRAM Close to DRAM

    CG23 CG33 CG40 CG36 CG37 CG21 CG39 CG25 CG34 CG42 CG45 CG44 CG337 CG346 CG333 CG15 CG345 CG334 CG335 CG344 CG24 CG343 CG43 CG332

    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    N18P-G62-7/8 (GDDR6)
    Date: Tuesday, June 23, 2020 Sheet 25 of 77
    5 4 3 2 1
    5 4 3 2 1

    MEMORY: FBB Partition 31..0


    FBVDDQ_MEM
    +1.8V_AON
    [20,22,23,25,70]
    [19,21,23,24,25,68,70,72]
    Reference X3BA schematic [20,26] FBB_DBI[7:0]
    40OHM_NETCLASS1

    FBB_DBI0
    FBB_DBI1
    FBB_DBI2
    [20,26] FBB_EDC[7:0]
    40OHM_NETCLASS1

    FBB_EDC0
    FBB_EDC1
    FBB_EDC2
    FBVDDQ_MEM FBVDDQ_MEM

    26
    FBB_DBI3 FBB_EDC3 CG398 CG400 CG404 CG408 CG406 CG405 CG407 CG397 CG399 CG403 CG402 CG401
    FBVDDQ_MEM FBB_DBI4 FBB_EDC4
    VRAM4A *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2 EV@1u/6.3V_2
    FBB_DBI5 FBB_EDC5
    A11 FBB_DBI6 FBB_EDC6
    A13 VSS#A11 FBB_DBI7 FBB_EDC7
    A2 VSS#A13 A1
    A4 VSS#A2 VDD#A1 A14
    B1 VSS#A4 VDD#A14 E10
    VREFC_VMA1 0.4MM=16mils
    [20,26] FBB_CMD[33:0]
    B14 VSS#B1 VDD#E10 E5
    C10 VSS#B14 VDD#E5 H13 FBB_VREFC
    FBB_VREFC [26]
    C12 VSS#C10 VDD#H13 H2
    C3 VSS#C12 VDD#H2 L13
    C5 VSS#C3 VDD#L13 L2 RG77
    [20] VMB_DQ[31:0]
    D D1 VSS#C5 VDD#L2 P10 EV@1K_1%_2 D
    D12 VSS#D1 VDD#P10 P5
    D14 VSS#D12
    D3 VSS#D14
    E11 VSS#D3
    VDD#P5 V1
    VDD#V1 V14
    VDD#V14
    M1 VRAM4D
    E4 VSS#E11
    F1 VSS#E4 B10 VRAM4B VRAM4C FBB_CMD13 H3 K1 FBB_VREFC
    FBB_VREFC [26]
    F12 VSS#F1 VDDQ#B10 B5 FBB_CMD15 G11 CA0_A VREFC
    F14 VSS#F12 VDDQ#B5 C1 NORMAL NORMAL FBB_CMD0 G4 CA1_A FBVDDQ_MEM FBVDDQ_MEM
    F3 VSS#F14 VDDQ#C1 C11 VMB_DQ13 G2 VMB_DQ26 N2 FBB_CMD9 H12 CA2_A
    Around DRAM Around DRAM
    G1 VSS#F3 VDDQ#C11 C14 VMB_DQ8 B3 DQ0_A/DQ7_A VMB_DQ27 P3 DQ0_B/DQ6_B FBB_CMD11 H5 CA3_A
    G12 VSS#G1 VDDQ#C14 C4 VMB_DQ15 F2 DQ1_A/DQ2_A VMB_DQ25 M2 DQ1_B/DQ4_B FBB_CMD12 H10 CA4_A
    G14 VSS#G12
    G3 VSS#G14
    H11 VSS#G3
    VDDQ#C4
    VDDQ#E1 E14
    VDDQ#E14 F11
    E1
    QD8~15 VMB_DQ9
    VMB_DQ10
    VMB_DQ14
    E3
    B4
    B2
    DQ2_A/DQ6_A
    DQ3_A/DQ4_A
    DQ4_A/DQ0_A
    QD24~31 VMB_DQ24
    VMB_DQ31
    VMB_DQ30
    P2
    U3
    V3
    DQ2_B/DQ7_B
    DQ3_B/DQ5_B
    DQ4_B/DQ2_B
    FBB_CMD3
    FBB_CMD4
    FBB_CMD6
    J12
    J11
    J4
    CA5_A
    CA6_A
    CA7_A
    CG275 CG200 CG197

    EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6


    CG267 CG244 CG237

    H4 VSS#H11 VDDQ#F11 F4 VMB_DQ12 E2 DQ5_A/DQ3_A VMB_DQ29 U4 DQ5_B/DQ1_B FBB_CMD5 J3 CA8_A EV@22u/6.3V_6


    EV@22u/6.3V_6
    EV@22u/6.3V_6
    L11 VSS#H4 VDDQ#F4 H1 VMB_DQ11 A3 DQ6_A/DQ5_A VMB_DQ28 U2 DQ6_B/DQ0_B FBB_CMD8 J5 CA9_A
    L4 VSS#L11 VDDQ#H1 H14 DQ7_A/DQ1_A DQ7_B/DQ3_B FBB_CMD7 G10 CABI_n_A N5 FBB_FB_TCK0 TPG23
    M1 VSS#L4 VDDQ#H14 J13 FBB_EDC1 C2 FBB_EDC3 T2 CKE_n_A TCK F10 FBB_FB_TDI0 TPG19
    M12 VSS#M1 VDDQ#J13 J2 FBB_DBI1 D2 EDC0_A FBB_DBI3 R2 EDC0_B TDI N10 FBB_FB_TDO0 TPG22
    M14 VSS#M12 VDDQ#J2 K13 DBI0_N_A DBI0_N_B FBB_CMD10 L3 TDO F5 FBB_FB_TMS0 TPG21
    M3 VSS#M14 VDDQ#K13 K2 VMB_WCKB01 D4 VMB_WCKB23 R4 FBB_CMD1 M11 CA0_B TMS
    [20] VMB_WCKB01 [20] VMB_WCKB23
    N1 VSS#M3 VDDQ#K2 L1 VMB_WCKB01# D5 WCK_t_A VMB_WCKB23# R5 WCK_t_B/NC FBB_CMD32 M4 CA1_B FBVDDQ_MEM FBVDDQ_MEM
    N12 VSS#N1 VDDQ#L1 L14 [20] VMB_WCKB01# WCK_c_A [20] VMB_WCKB23# WCK_c_B/NC FBB_CMD14 L12 CA2_B
    Close to DRAM Close to DRAM
    N14 VSS#N12 VDDQ#L14 N11 FBB_CMD11 L5 CA3_B
    VSS#N14 VDDQ#N11 N4
    N3 EV@K4Z80325BC-HC14(DC2001) X16 X8 FBB_CMD12 L10 CA4_B
    P11 VSS#N3 VDDQ#N4 P1 VMB_DQ5 B11 VMB_DQ20 P13 FBB_CMD3 K12 CA5_B J14 FBB_ZQ_1_A EV@121_1%_2 RG36 CG278 CG265 CG238 CG277 CG266 CG233
    P4 VSS#P11 VDDQ#P1 P14 VMB_DQ2 G13 DQ8_A NC VMB_DQ16 U13 DQ8_B/DQ13_B FBB_CMD4 K11 CA6_B ZQ_A K14
    R1 VSS#P4 VDDQ#P14 T1 VMB_DQ3 E13 DQ9_A/DQ15_A NC VMB_DQ22 M13 DQ9_B/DQ11_B FBB_CMD6 K4 CA7_B ZQ_B EV@10u/6.3V_6
    EV@10u/6.3V_6
    EV@10u/6.3V_6 EV@10u/6.3V_6
    EV@10u/6.3V_6
    EV@10u/6.3V_6
    R12 VSS#R1
    R14 VSS#R12
    R3 VSS#R14
    VSS#R3
    VDDQ#T1 T11
    VDDQ#T11 T14
    VDDQ#T14 T4
    VDDQ#T4 U10
    QD0~7 VMB_DQ1
    VMB_DQ4
    VMB_DQ6
    VMB_DQ0
    F13
    E12
    B12
    DQ10_A/DQ13_A
    DQ11_A/DQ14_A
    DQ12_A
    DQ13_A/DQ10_A
    NC
    NC
    NC
    QD16~23 VMB_DQ23
    VMB_DQ19
    VMB_DQ17
    VMB_DQ18
    N13
    U12
    P12
    DQ10_B/DQ15_B
    DQ11_B/DQ14_B
    DQ12_B/DQ10_B
    DQ13_B/DQ12_B
    FBB_CMD5
    FBB_CMD8
    FBB_CMD7
    K3
    K5
    M10
    CA8_B
    CA9_B
    CABI_n_B
    CKE_n_B
    FBB_ZQ_1_B EV@121_1%_2 RG37

    T10 B13 NC V12


    T12 VSS#T10 VDDQ#U10 U5 VMB_DQ7 A12 DQ14_A/DQ11_A NC VMB_DQ21 U11 DQ14_B/DQ9_B
    T3 VSS#T12 VDDQ#U5 DQ15_A/DQ9_A NC DQ15_B/DQ8_B FBB_CMD2 J1
    T5 VSS#T3 +1.8V_AON FBB_EDC0 C13 FBB_EDC2 T13 RESET_n G5 SNN_FBB_RFU_G5 TPG20
    U1 VSS#T5 FBB_DBI0 D13 EDC1_A GND FBB_DBI2 R13 EDC1_B NC#G5 M5 SNN_FBB_RFU_M5 TPG24
    U14 VSS#U1 A10 DBI1_n_A NC DBI1_n_B VMB_CLK0# K10 NC#M5
    V11 VSS#U14 VPP#A10 A5 VMB_WCK01 D11 VMB_WCK23 R11 [20] VMB_CLK0# VMB_CLK0 J10 CK_c +1.8V_AON
    V13 VSS#V11 VPP#A5 V10 [20] VMB_WCK01 VMB_WCK01# D10 WCK1_t_A NC [20] VMB_WCK23 VMB_WCK23# R10 WCK1_t_B [20] VMB_CLK0 CK_t
    [20] VMB_WCK01# [20] VMB_WCK23# option
    V2 VSS#V13 VPP#V10 V5 WCK1_c_A NC WCK1_c_B
    EV@K4Z80325BC-HC14(DC2001)
    V4 VSS#V2 VPP#V5 EV@K4Z80325BC-HC14(DC2001)
    VSS#V4 EV@K4Z80325BC-HC14(DC2001)
    CG416 CG415 CG414 CG412 CG413

    EV@4.7u/6.3V_6 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2

    C C

    FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM


    Right under DRAM Right under DRAM Close to DRAM Close to DRAM

    CG260 CG268 CG247 CG264 CG257 CG274 CG259 CG263 CG254 CG252 CG255 CG245 CG202 CG389 CG91 CG78 CG391 CG373 CG376 CG390 CG386 CG388 CG372 CG387

    EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 EV@1u/6.3V_2

    MEMORY: FBB Partition 63..32


    FBVDDQ_MEM FBVDDQ_MEM

    40OHM_NETCLASS1 40OHM_NETCLASS1
    [20,26] FBB_DBI[7:0] [20,26] FBB_EDC[7:0]
    FBB_DBI0 FBB_EDC0
    FBVDDQ_MEM FBB_DBI1 FBB_EDC1
    VRAM3A FBB_DBI2 FBB_EDC2 CG119 CG110 CG111 CG120 CG100 CG82 CG83 CG84 CG107 CG99 CG90 CG108
    A11 FBB_DBI3 FBB_EDC3
    EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2
    A13 VSS#A11 FBB_DBI4 FBB_EDC4
    A2 VSS#A13 A1 FBB_DBI5 FBB_EDC5
    A4 VSS#A2 VDD#A1 A14 FBB_DBI6 FBB_EDC6
    B1 VSS#A4 VDD#A14 E10 FBB_DBI7 FBB_EDC7
    B14 VSS#B1 VDD#E10 E5
    C10 VSS#B14 VDD#E5 H13
    C12 VSS#C10 VDD#H13 H2
    C3 VSS#C12 VDD#H2 L13
    C5 VSS#C3 VDD#L13 L2 [20,26] FBB_CMD[33:0]
    D1 VSS#C5 VDD#L2 P10
    D12 VSS#D1 VDD#P10 P5
    D14 VSS#D12 VDD#P5 V1 [20] VMB_DQ[63:32]
    B D3 VSS#D14 VDD#V1 V14 B
    E11 VSS#D3 VDD#V14
    E4 VSS#E11
    F1 VSS#E4
    F12 VSS#F1
    F14 VSS#F12
    VDDQ#B10 B5
    VDDQ#B5 C1
    B10
    M2 JS-N18-0709 swap VRAM3D
    VREFC_VMA1 0.4MM=16mils
    F3 VSS#F14 VDDQ#C1 C11 VRAM3C
    G1 VSS#F3 VDDQ#C11 C14 VRAM3B FBB_CMD29 H3 K1 FBB_VREFC
    G12 VSS#G1 VDDQ#C14 C4 NORMAL FBB_CMD31 G11 CA0_A VREFC FBB_VREFC [26]
    G14 VSS#G12 VDDQ#C4 E1 NORMAL VMB_DQ55 N2 FBB_CMD16 G4 CA1_A FBVDDQ_MEM FBVDDQ_MEM
    G3 VSS#G14 VDDQ#E1 E14 VMB_DQ32 G2 VMB_DQ49 P3 DQ0_B/DQ6_B FBB_CMD25 H12 CA2_A
    Around DRAM Around DRAM
    H11 VSS#G3 VDDQ#E14 F11 VMB_DQ39 B3 DQ0_A/DQ7_A VMB_DQ54 M2 DQ1_B/DQ4_B FBB_CMD22 H5 CA3_A
    H4 VSS#H11 VDDQ#F11 F4 VMB_DQ35 F2 DQ1_A/DQ2_A VMB_DQ53 P2 DQ2_B/DQ7_B FBB_CMD21 H10 CA4_A
    L11 VSS#H4
    L4 VSS#L11
    M1 VSS#L4
    VDDQ#F4 H1
    VDDQ#H1 H14
    VDDQ#H14 J13
    QD32~39
    VMB_DQ36
    VMB_DQ33
    VMB_DQ37
    E3
    B4
    B2
    DQ2_A/DQ6_A
    DQ3_A/DQ4_A
    DQ4_A/DQ0_A
    QD56~63 VMB_DQ51
    VMB_DQ50
    VMB_DQ52
    U3
    V3
    U4
    DQ3_B/DQ5_B
    DQ4_B/DQ2_B
    DQ5_B/DQ1_B
    FBB_CMD24
    FBB_CMD23
    FBB_CMD26
    J12
    J11
    J4
    CA5_A
    CA6_A
    CA7_A
    CG112 CG74 CG77

    EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6


    CG382 CG379 CG94

    M12 VSS#M1 VDDQ#J13 J2 VMB_DQ34 E2 DQ5_A/DQ3_A VMB_DQ48 U2 DQ6_B/DQ0_B FBB_CMD17 J3 CA8_A EV@22u/6.3V_6
    EV@22u/6.3V_6
    EV@22u/6.3V_6
    M14 VSS#M12 VDDQ#J2 K13 VMB_DQ38 A3 DQ6_A/DQ5_A DQ7_B/DQ3_B FBB_CMD30 J5 CA9_A
    M3 VSS#M14 VDDQ#K13 K2 DQ7_A/DQ1_A FBB_EDC6 T2 FBB_CMD33 G10 CABI_n_A N5 SNN_FBB_TCK1 TPG13
    N1 VSS#M3 VDDQ#K2 L1 FBB_EDC4 C2 FBB_DBI6 R2 EDC0_B CKE_n_A TCK F10 SNN_FBB_TDI1 TPG16
    N12 VSS#N1 VDDQ#L1 L14 FBB_DBI4 D2 EDC0_A DBI0_N_B TDI N10 SNN_FBB_TDO1 TPG17
    N14 VSS#N12 VDDQ#L14 N11 DBI0_N_A VMB_WCK67 R4 FBB_CMD27 L3 TDO F5 SNN_FBB_TMS1 TPG18
    [20] VMB_WCK67
    N3 VSS#N14 VDDQ#N11 N4 VMB_WCK45 D4 VMB_WCK67# R5 WCK_t_B/NC FBB_CMD28 M11 CA0_B TMS
    VSS#N3 VDDQ#N4 P1
    P11 EV@K4Z80325BC-HC14(DC2001) [20] VMB_WCK45 VMB_WCK45# D5 WCK_t_A [20] VMB_WCK67# WCK_c_B/NC FBB_CMD19 M4 CA1_B FBVDDQ_MEM FBVDDQ_MEM
    P4 VSS#P11 VDDQ#P1 P14 [20] VMB_WCK45# WCK_c_A FBB_CMD20 L12 CA2_B
    Close to DRAM Close to DRAM
    R1 VSS#P4 VDDQ#P14 T1 FBB_CMD22 L5 CA3_B
    R12 VSS#R1 VDDQ#T1 T11 X16 X8 VMB_DQ58 P13 FBB_CMD21 L10 CA4_B
    R14 VSS#R12 VDDQ#T11 T14 VMB_DQ40 B11 VMB_DQ62 U13 DQ8_B/DQ13_B FBB_CMD24 K12 CA5_B J14 FBB_ZQ_2_A EV@121_1%_2 RG84 CG92 CG113 CG73 CG76 CG367 CG365
    R3 VSS#R14 VDDQ#T14 T4 VMB_DQ46 G13 DQ8_A NC VMB_DQ59 M13 DQ9_B/DQ11_B FBB_CMD23 K11 CA6_B ZQ_A K14
    T10 VSS#R3 VDDQ#T4 U10 VMB_DQ47 E13 DQ9_A/DQ15_A NC VMB_DQ56 N13 DQ10_B/DQ15_B FBB_CMD26 K4 CA7_B ZQ_B EV@10u/6.3V_6
    EV@10u/6.3V_6
    EV@10u/6.3V_6 EV@10u/6.3V_6
    EV@10u/6.3V_6
    EV@10u/6.3V_6
    T12 VSS#T10
    T3 VSS#T12
    T5 VSS#T3
    VDDQ#U10 U5
    VDDQ#U5
    +1.8V_AON
    QD40~47 VMB_DQ45
    VMB_DQ44
    VMB_DQ43
    F13
    E12
    B12
    DQ10_A/DQ13_A
    DQ11_A/DQ14_A
    DQ12_A
    NC
    NC
    NC
    QD48~55 VMB_DQ61
    VMB_DQ63
    VMB_DQ57
    U12
    P12
    V12
    DQ11_B/DQ14_B
    DQ12_B/DQ10_B
    DQ13_B/DQ12_B
    FBB_CMD17
    FBB_CMD30
    FBB_CMD33
    K3
    K5
    M10
    CA8_B
    CA9_B
    CABI_n_B
    FBB_ZQ_2_B EV@121_1%_2 RG83

    U1 VSS#T5 VMB_DQ41 B13 DQ13_A/DQ10_A NC VMB_DQ60 U11 DQ14_B/DQ9_B CKE_n_B


    U14 VSS#U1 A10 VMB_DQ42 A12 DQ14_A/DQ11_A NC DQ15_B/DQ8_B
    V11 VSS#U14 VPP#A10 A5 DQ15_A/DQ9_A NC FBB_EDC7 T13 FBB_CMD18 J1
    V13 VSS#V11 VPP#A5 V10 FBB_EDC5 C13 FBB_DBI7 R13 EDC1_B RESET_n G5 SNN_FBB_RFU_G5_1 TPG15
    V2 VSS#V13 VPP#V10 V5 FBB_DBI5 D13 EDC1_A GND DBI1_n_B NC#G5 M5 SNN_FBB_RFU_M5_1 TPG14
    V4 VSS#V2 VPP#V5 DBI1_n_A NC VMB_WCKB67 R11 VMB_CLK1# K10 NC#M5
    VSS#V4 VMB_WCKB45 D11 [20] VMB_WCKB67 VMB_WCKB67#R10 WCK1_t_B [20] VMB_CLK1# VMB_CLK1 J10 CK_c
    [20] VMB_WCKB45 VMB_WCKB45# D10 WCK1_t_A NC [20] VMB_WCKB67# WCK1_c_B [20] VMB_CLK1 CK_t +1.8V_AON
    [20] VMB_WCKB45# WCK1_c_A NC
    EV@K4Z80325BC-HC14(DC2001) EV@K4Z80325BC-HC14(DC2001) option
    EV@K4Z80325BC-HC14(DC2001)

    CG396 CG393 CG392 CG395 CG394

    EV@4.7u/6.3V_6 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2

    A A

    FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM


    Right under DRAM Right under DRAM Close to DRAM Close to DRAM

    CG98 CG121 CG96 CG86 CG122 CG109 CG97 CG93 CG95 CG101 CG89 CG85 CG380 CG368 CG383 CG378 CG377 CG370 CG375 CG374 CG371 CG381 CG369 CG384

    *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 EV@1u/6.3V_2 *EV@0.47u/6.3V_2
    *EV@0.47u/6.3V_2 *EV@0.47u/6.3V_2

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    N18P-G62-8/8 (GDDR6)
    Date: Tuesday, June 23, 2020 Sheet 26 of 77
    5 4 3 2 1
    5 4 3 2 1

    27

    D D

    Vinafix.com

    Vinafix.com
    C C

    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 27 of 77
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 28 of 77
    5 4 3 2 1
    5 4 3 2 1

    29

    D D

    C C

    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 29 of 77
    5 4 3 2 1
    5 4 3 2 1

    30

    D D

    C C

    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 30 of 77
    5 4 3 2 1
    5 4 3 2 1

    31
    D D

    Vinafix.com

    C C

    B B

    Vinafix.com

    A A
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 31 of 77
    5 4 3 2 1
    5 4 3 2 1

    32
    D D

    C C

    B B

    A A
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 32 of 77
    5 4 3 2 1
    5 4 3 2 1

    Vinafix.com
    33
    D D

    Vinafix.com

    C C

    Vinafix.com
    B B

    A A
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 33 of 77
    5 4 3 2 1
    5 4 3 2 1

    LCD CONNECTOR
    LCDVCC MAX 1.2A
    CN8
    +3V
    TOUCH+G Sensor+STYLUS(Wacom)
    Convertible (Z8H/ZGH) only 34

    41
    DMIC_PW R CN45

    31
    1 R268 *Short_6
    2
    3 1
    EDP_AUX_C 4 +3V_CCD 2
    [3] EDP_AUX_C 5 3
    EDP_AUX#_C
    [3] EDP_AUX#_C 6 4
    R265 *Short_6
    FHD

    7 5
    D [3] EDP_TXP0_C 8 6 D
    [3] EDP_TXN0_C 9 7
    +5V_TP +5V
    10 8
    [3] EDP_TXP1_C 11 9 +5V_TP
    R802 *Short_6 USBP4-_C R800 *Short_4

    STYLUS(Wacom) GSENSOR TOUCH


    [3] EDP_TXN1_C 12 10 USBP4- [9]
    USBP4+_C R801 *Short_4
    UHD

    13 11 USBP4+ [9]
    [3] EDP_TXP2_C 14 12 TS_EN [57]
    [3] EDP_TXN2_C 15 13
    16 14
    [3] EDP_TXP3_C 17 15
    [3] EDP_TXN3_C 18 16 SCL_GSENSOR_DB [58]
    19 17 SDA_GSENSOR_DB [58]
    MIC_VCC 20 18 INT_GSENSOR_DB [58]
    DMIC_PW R R242 *Short_6 +SENSOR_POW ER
    21 19
    CCD+DMIC

    R791 *Short_4 DMIC_DATA_C 22 20 R790 *Short_2


    [50] DMIC_DAT 23 21 PEN_FW E_OUT [13]
    R792 *Short_4 DMIC_CLK_C
    [50] DMIC_CLK 24 22 PEN_I2C_SCL_Q [10]
    USBP6+_C 25 23 PEN_I2C_SDA_Q [10]
    [9] USBP6+ R794 *Short_4 R785 *0_5%_2
    USBP6-_C 26 24 PEN_PDCT_IN [13]
    [9] USBP6- R795 *Short_4 R786 *0_5%_2
    27 25 PEN_GPIO0 [13]
    R787 *0_5%_2
    CCD_PW R 28 26 PEN_I2C_IRQ_R R2679 PEN_GPIO1 [13]
    +3V_CCD R240 *Short_6 *Short_2
    EDP_HPD_R 29 27 PEN_I2C_IRQ [13]
    R788 *Short_2 PEN_RESET [57]
    30 28
    31 29 +3V_PEN
    BL_ON 32 30
    R796 *Short_4 LCD_BRIGHT 33

    32
    [11] PCH_DPST_PW M 34
    35 51519-03001-V01#_FFC/FPC PEN_I2C_IRQ
    +VIN_PANEL_R 36 TP102 PEN_I2C_SCL
    37 TP103 PEN_I2C_SCL [10,13]
    PEN_I2C_SDA
    38 TP104 PEN_I2C_SDA [10,13]
    C C
    39
    40
    BOARD_ID6 [11]

    42
    51693-04001-V01

    LCDVCC DECOUPLING
    Vinafix.com +VIN_PANEL_R

    +3V LCDVCC +VIN R230 *Short_6

    C305 R180
    1u/10V_2 U11
    *Short_6
    5 3 R152 100K_1%_2 +VIN_PANEL_R
    IN OCB +3V LCDVCC
    Inrush: 2A
    GND

    [11] PCH_DISP_ON R153 *Short_4 EDP_VDD_EN 4 1


    EN OUT
    B C324 C303 C320 C313 C326 C323 C698 C699 C365 C363 C368 B
    2

    SY6288C20AAC
    R157 0.1u/6.3V_2 100p/50V_2 22u/25V_8 0.1u/50V_4 100p/50V_2
    100K_1%_2 0.01u/50V_4 47u/6.3V_8 0.1u/6.3V_2 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6

    BACKLIGHT CONTROL
    HPD
    +3VPCU +3V
    R798 *Short_4 EDP_HPD_RR R774 33_1%_2 EDP_HPD_R
    [13] EDP_HPD_CPU
    LID2# [57,58]
    1

    R238
    10K_1%_2 D4 R793 C700
    R215 SDM20U30-7 *10K_1%_2 180p/50V_4
    10K_1%_2
    2

    BL_ON
    A A
    [57] PCH_BLON_EC R192 *Short_4
    3

    BL#
    3

    2
    EC_FPBACK# [57]

    [11] PCH_LVDS_BLON R193 *Short_4 5 2 Q24


    Q25A Q25B DDTC144EUA-7-F
    Quanta Computer Inc.
    1

    PJX8838 PJX8838
    R196
    4

    100K_1%_2
    PROJECT : ZGI
    Size Document Number Rev
    1A
    eDP Panel/CCD/Hall Sensor
    Date: Tuesday, June 23, 2020 Sheet 34 of 77
    5 4 3 2 1
    5 4 3 2 1

    DP MUX(PS8461) to Min DP
    +3V_DP +1.2V R509 *Short_8 R1053 *Short_4 +1.2VDD
    +1.2VDD +1.2VDDRx +1.2VDDA +1.2VDDTx
    35
    R1052 *Short_4 +1.2VDDRx
    C883 C886 C882 C880 C878 C881 C879
    C885 C884 R1041 *Short_4 +1.2VDDA 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2
    0.1U/16V_2 0.1U/16V_2

    R1051 *Short_4 +1.2VDDTx

    D D
    +1.2VDDRx +1.2VDDTx

    +1.2VDDA
    +3V_DP +1.2VDD

    U19

    29

    32
    56

    24

    43

    42
    55
    1

    3
    0.22uF/6.3V_2 C538 DP_TXP0_C 4

    VDD33_2
    VDD33_29

    VDD12_32
    VDD12_56

    VDDRX12_3
    VDDRX12_24

    VDDA12_43

    VDDTX12_42
    VDDTX12_55
    VDD_DDC
    From GPU IFPE

    [21] DP_D0 DP_TXN0_C IN1_D0p


    0.22uF/6.3V_2 C537 5 to connector Layout impedance 100ohm
    [21] DP_D0# DP_TXP1_C 7 IN1_D0n
    0.22uF/6.3V_2 C536 0.22u follow vendor reference design 4/23
    [21] DP_D1 DP_TXN1_C IN1_D1p
    0.22uF/6.3V_2 C535 8
    [21] DP_D1# DP_TXP2_C IN1_D1n
    0.22uF/6.3V_2 C534 10
    [21] DP_D2 DP_TXN2_C 11 IN1_D2p
    0.22uF/6.3V_2 C533
    [21] DP_D2# DP_TXP3_C IN1_D2n OUT_DP_TXP0
    0.22uF/6.3V_2 C532 12 54 C96369 0.22uF/6.3V_2
    [21] DP_D3 DP_TXN3_C 13 IN1_D3p OUT_D0p 53 OUT_DP_TXN0 C_OUT_DP_TXP0 [36]
    0.22uF/6.3V_2 C531 C96370 0.22uF/6.3V_2
    [21] DP_D3# INT_DP_AUXP_Q_C IN1_D3n OUT_D0n C_OUT_DP_TXN0 [36]
    0.1U/16V_2 C544 62
    [21] INT_DP_AUXP_Q INT_DP_AUXN_Q_C IN1_AUXp OUT_DP_TXP1
    0.1U/16V_2 C543 61 51 C96371 0.22uF/6.3V_2
    [21] INT_DP_AUXN_Q IN1_AUXn OUT_D1p 50 OUT_DP_TXN1 C_OUT_DP_TXP1 [36]
    C96372 0.22uF/6.3V_2
    OUT_D1n C_OUT_DP_TXN1 [36]
    65

    to Min DP
    66 IN1_SDA 48 OUT_DP_TXP2 C96373 0.22uF/6.3V_2
    GPU_DP_HPD IN1_SCL OUT_D2p OUT_DP_TXN2 C_OUT_DP_TXP2 [36]
    16 47 C96374 0.22uF/6.3V_2
    [11,21] GPU_DP_HPD IN1_HPD OUT_D2n C_OUT_DP_TXN2 [36]
    PS8461_1_IN2_EQ0 40 45 OUT_DP_TXP3 C96375 0.22uF/6.3V_2
    IN1_EQ0 C_OUT_DP_TXP3 [36]
    PS8461_1_IN2_EQ1 41 PS8461QFN66GTR-A4(QFN) OUT_D3p 44 OUT_DP_TXN3 C96376 0.22uF/6.3V_2
    IN1_EQ1 OUT_D3n C_OUT_DP_TXN3 [36]
    0.22uF/6.3V_2 C530 DDI2_TXP0_C 14 49 INT_ULT_DP_HPD R515 *Short_4
    From CPU DDI2

    [3] DDI2_TXP0 DDI2_TXN0_C IN2_D0p OUT_HPD DP_HPD_R [36]


    0.22uF/6.3V_2 C529 15
    [3] DDI2_TXN0 DDI2_TXP1_C 17 IN2_D0n 52 PS8461_1_DP_CADET PS8469 side have internal PD 150K
    0.22uF/6.3V_2 C528 R521 *Short_4
    [3] DDI2_TXP1 DDI2_TXN1_C IN2_D1p DP_CADET CAD_SNK [36]
    C 0.22uF/6.3V_2 C527 18 R1056 100K_1%_4 +3V_DP C
    [3] DDI2_TXN1 DDI2_TXP2_C 20 IN2_D1n 57 C_INT_DP_AUXN_R
    0.22uF/6.3V_2 C526 R1055 *Short_4
    [3] DDI2_TXP2 DDI2_TXN2_C IN2_D2p DP_AUXn_SDA C_INT_DP_AUXP_R C_INT_DP_AUXN [36]
    0.22uF/6.3V_2 C525 21 58 R1058 *Short_4
    [3] DDI2_TXN2 DDI2_TXP3_C IN2_D2n DP_AUXp_SCL C_INT_DP_AUXP [36]
    0.22uF/6.3V_2 C522 22 R1059 100K_1%_4
    [3] DDI2_TXP3 DDI2_TXN3_C 23 IN2_D3p
    0.22uF/6.3V_2 C521
    [3] DDI2_TXN3 DDI2_AUXP_C IN2_D3n
    0.1U/16V_2 C542 60
    [3] DDI2_AUXP DDI2_AUXN_C 59 IN2_AUXp
    0.1U/16V_2 C541
    [3] DDI2_AUXN IN2_AUXn
    DDPC_DATA 63 28 PS8461_1_CFG0
    [12,13] DDPC_DATA DDPC_CLK 64 IN2_SDA CFG0 27 PS8461_1_CFG1
    [13] DDPC_CLK DP_HPD_PCH IN2_SCL CFG1 PS8461_1_CFG2
    19 26

    Vinafix.com
    [13] DP_HPD_PCH IN2_HPD CFG2 25 PS8461_1_CFG3
    PS8461_1_IN1_EQ0 38 CFG3 46 PS8461_1_CFG4
    PS8461_1_IN1_EQ1 39 IN2_EQ0 CFG4
    R1050 *4.7K_1%_4 IN2_EQ1
    +3V_DP PS8461_1_I2C_ADDR
    R1049 *4.7K_1%_4 6
    I2C_ADDR

    +3V_DP R504 *4.7K_1%_4 33


    CSDA

    EPAD
    REXT

    RSV2
    RSV1
    RSV0
    R505 *4.7K_1%_4 34
    PD#

    R1045 *Short_4 PS8461_1_SW 9 CSCL


    [38] SEL_DP_MUX SW
    +3V_DP R1048 *4.7K_1%_4
    31

    30

    35
    36
    37

    67

    SW=
    L: Port1 is selected as the input port
    H: Port2 is selected as the input port R501
    4.99K_1%_4
    TP65
    Vendor request use 0402

    Auto EQ option for Port2 PS8461_1_IN2_EQ1 R1039 *4.7K_1%_4


    PS8461_1_CFG3 CFG3 = +3V_DP
    +3V_DP R502 *4.7K_1%_4
    L:Auto EQ enabled (default) R1040 4.7K_1%_4
    B EQ automatically adjusted based on link training. B
    H:Auto EQ disabled. PS8461_1_IN2_EQ0 R1037 *4.7K_1%_4 +3V_DP
    Auto EQ option for Port1 R1038 4.7K_1%_4
    CFG1 =
    R498 PS8461_1_CFG1
    *4.7K_1%_4 L:Auto EQ enabled (default) PS8461_1_IN1_EQ1 R1034 *4.7K_1%_4
    +3V_DP EQ automatically adjusted based on link training. +3V_DP
    H:Auto EQ disabled.
    R1035 4.7K_1%_4

    CFG2 = PS8461_1_IN1_EQ0 R1031 *4.7K_1%_4 +3V_DP


    +3V_DP R500 *4.7K_1%_4 PS8461_1_CFG2 L: DP output is dynamic adjusted based on link training (default)
    M: DP output is fixed to 800mV/3.5dB R1033 4.7K_1%_4
    R499 *4.7K_1%_4 H: DP output is fixed to 400mV/0dB

    CFG0 = Port y EQ Setting (y=1,2)


    +3V_DP R468 4.7K_1%_4 PS8461_1_CFG0 For Input Port1
    L:DP Port is configured to Auto jitter cleaning mode (default) [INy_EQ1,INy_EQ0] =
    R467 *4.7K_1%_4 M:DP Port is configured to Redriving mode LL:Compensate channel loss up to 11 dB @ HBR3
    H:DP Port is configured to Full jitter cleaning mode LM:Compensate channel loss up to 13 dB @ HBR3
    LH:Compensate channel loss up to 15 dB @ HBR3
    ML:Compensate channel loss up to 16 dB @ HBR3
    MM:Compensate channel loss up to 17 dB @ HBR3
    MH:Compensate channel loss up to 18 dB @ HBR3
    +3V_DP R1046 4.7K_1%_4 PS8461_1_CFG4 CFG4 = HL:Compensate channel loss up to 19 dB @ HBR3
    For Input Port2 HM:Compensate channel loss up to 20 dB @ HBR3
    R1047 *4.7K_1%_4 L:DP Port is configured to Auto jitter cleaning mode (default) HH:Compensate channel loss up to 21 dB @ HBR3
    M:DP Port is configured to Redriving mode
    H:DP Port is configured to Full jitter cleaning mode

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    DP MUX(PS8461) to Min DP
    Date: Tuesday, June 23, 2020 Sheet 35 of 77
    5 4 3 2 1
    5 4 3 2 1

    ESD
    DP CONN.
    C_OUT_DP_TXP0 D61 2 1 *PESD5V0H1BSF
    36
    CN27 C_OUT_DP_TXN0 D60 2 1 *PESD5V0H1BSF

    21

    22

    25
    22-M1080-1003-0
    C_OUT_DP_TXP1 D59 2 1 *PESD5V0H1BSF
    20
    D +3V_DP DP_PWR D
    19 C_OUT_DP_TXN1 D58 2 1 *PESD5V0H1BSF
    GND
    C_INT_DP_AUXN 18
    C852 [35] C_INT_DP_AUXN 17
    AUX_CH-
    C_OUT_DP_TXP2 D57 2 1 *PESD5V0H1BSF
    C853 [35] C_OUT_DP_TXN2 ML_L2-
    +3V_DP 10u/6.3V_4 0.1u/6.3V_2 C_INT_DP_AUXP 16
    [35] C_INT_DP_AUXP 15
    AUX_CH+
    C_OUT_DP_TXN2 D56 2 1 *PESD5V0H1BSF
    [35] C_OUT_DP_TXP2 ML_L2+
    14 GND
    13 C_OUT_DP_TXP3 D55 2 1 *PESD5V0H1BSF
    GND
    R1027 [35] C_OUT_DP_TXN3 12 ML_L3-
    *100K_1%_2 [35] C_OUT_DP_TXN1 11 C_OUT_DP_TXN3 D54 2 1 *PESD5V0H1BSF
    ML_L1-
    [35] C_OUT_DP_TXP3 10 ML_L3+
    C_INT_DP_AUXN [35] C_OUT_DP_TXP1 9 ML_L1+
    8 GND
    C_INT_DP_AUXP 7 GND
    R1032 5.1M_5%_2 6 Config2
    [35] C_OUT_DP_TXN0 5 ESD1
    ML_L0-
    R1005 CAD_SNK 4 C_INT_DP_AUXP 1 10 C_INT_DP_AUXP
    [35] CAD_SNK 3
    Config1 Line-1 NC#4
    *100K_1%_2 [35] C_OUT_DP_TXP0 ML_L0+
    R1028 *Short_2 DP_HPD 2 C_INT_DP_AUXN 2 9 C_INT_DP_AUXN
    [35] DP_HPD_R HPD Line-2 NC#3
    1 GND
    3
    CAD_SNK C859 GND#1
    220p/25V_2 DP_HPD 4 7 DP_HPD

    23

    24

    26
    Line-3 NC#2
    R1030 CAD_SNK 5 6 CAD_SNK
    C Line-4 NC#1 C
    1M_1%_2
    *AZ1045-04F.R7G

    FOR DP++ (DP/HDMII) DUAL MODE BUFFER

    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    Min DP CONN
    Date: Tuesday, June 23, 2020 Sheet 36 of 77
    5 4 3 2 1
    5 4 3 2 1

    HDMI Retimer(HDM) POWER


    GPU_DDCCLK_Q
    +1.2V

    R887 *Short_6
    +1.2V_HDMI

    PS8409 strap pin 37

    GPU_DDCDATA_Q
    GPU_DDCCLK_Q
    GPU_DDCDATA_Q

    HDMI_SEL#_A1
    I2C_SEL_PIN
    +1.2V_HDMI
    +3V +3V_HDMI

    HDMI_RST#
    SI DCIN_ENB

    PRE_SEL
    DC coupling enable; Internal pull up, 3.3V I/O. DCIN_ENB R344 4.7K_1%_2

    CSDA
    CSCL
    R378 R377 R909 *Short_6 L: DC coupling input
    *0_5%_4 *0_5%_4 H: Default,AC coupling input
    R376 4.99K_1%_4 C772
    C768 0.1u/6.3V_2
    Vendor request use 0402 1u/10V_2 I2C_SEL_PIN
    R374 *4.7K_1%_2 I2C_SEL_PIN

    36
    35
    34
    33
    32
    31
    30
    29
    28
    27
    26
    25
    U15
    I2C Slave Address selection; Internal pull down, 3.3V I/O. +3V_HDMI
    D
    PS8409AQFN48GTR2-A2(QFN) L: Default, Slave address 0x10-0x2F. D

    VDD12#2
    CSCL

    RSV2
    HDMI_ID
    I2C_ADDR
    REXT
    RESETB

    CSDA
    PRE
    H: Alternative salve address 0x90-0x9F, 0xD0-0xDF.

    SCL_SRC/AUXP

    NC
    SDA_SRC/AUXN
    HDMI_SEL#_A1
    HDMI_ID enable ; Internal pull down , 3.3V I/O.
    L: Default, HDMI ID enable R375 *4.7K_1%_2 HDMI_SEL#_A1
    T1 +3V_HDMI H: HDMI ID disable +3V_HDMI
    37 24
    POWERSWITCH VDD33#2
    From PCH or GPU

    HDMI_D2 38 23 C_TX2_HDMI+ R366 *Short_4 TX2_HDMI+


    HDMI_D2# 39 IN_D2p OUT_D2p 22 C_TX2_HDMI- R363 *Short_4 TX2_HDMI-
    HDMI_HPD_DC 40 IN_D2n OUT_D2n 21 HDMI_HPD
    HDMI_D1 41 HPD_SRC HPD_SNK 20 C_TX1_HDMI+ R357 *Short_4 TX1_HDMI+
    HDMI_D1# IN_D1p OUT_D1p C_TX1_HDMI- TX1_HDMI-
    EQ_SEL_A0 EQ_SEL_A0
    42 19 R354 *Short_4
    Receiver equalization setting; Internal pull up , 3.3V I/O.

    TO CONN.
    +1.2V_HDMI 43 IN_D1n OUT_D1n 18 +1.2V_HDMI
    HDMI_D0 44 VDDRX12#1 VDDTX12#1 17 C_TX0_HDMI+ R353 *Short_4 TX0_HDMI+ L: Compensaton for channel loss up to 13dB R342 *4.7K_1%_2 R343 *4.7K_1%_2
    HDMI_D0# IN_D0p OUT_D0p C_TX0_HDMI- TX0_HDMI- H: Default , Compensation for channel loss up to 17dB +3V_HDMI
    45 16 R352 *Short_4
    +1.2V_HDMI 46 IN_D0n OUT_D0n 15 +1.2V_HDMI L13 NFP0QHB372HS2D M: Compensation for channel loss up to 11dB
    HDMI_CLK 47 VDDRX12#2 VDDTX12#2 14 C_TXC_HDMI+ 1 2 TXC_HDMI+
    HDMI_CLK# 48 IN_CLKp OUT_CLKp 13 C_TXC_HDMI- 4 3 TXC_HDMI-
    IN_CLKn OUT_CLKn PRE_SEL PRE_SEL R371 *4.7K_1%_2
    Output pre-emphasis setting; Internal pull up, 3.3V I/O.
    49 L: Pre-emphasis =2.5dB
    EPAD H: Default, No Pre-emphasis
    TESTMODEB

    HDMI_CEC
    DCIN_ENB

    Vendor request use 0402


    SDA_SNK
    SCL_SNK
    VDD33#1

    VDD12#1

    CEC_EN
    VDDA12
    RSV1
    to connector Layout impedance 100ohm
    PDB
    EQ

    CLK Common chock CX372HS2001 NFG0QHB372HS2D(100M,0.1A)


    +3V_HDMI
    MSIC Optional
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12

    Reset Reserve +3V_HDMI


    R903 TXC_HDMI+
    10K_1%_2
    HDMI_SDATA
    +1.2V_HDMI

    +1.2V_HDMI
    HDMI_SCLK
    EQ_SEL_A0
    DCIN_ENB
    +3V_HDMI

    Vinafix.com
    HDMI_RST# C416 R373 R372
    C *3.3p/50V_4 *10K_1%_2 *10K_1%_2 C

    C453 TXC_HDMI-
    1u/10V_2 CSCL
    CSDA

    Option [3] DDI3_TXP0


    C436
    C432
    IV@0.1u/6.3V_2
    IV@0.1u/6.3V_2
    HDMI_D2
    HDMI_D2#
    HDMI HPD
    [3] DDI3_TXN0

    [3] DDI3_TXP1
    C430
    C427
    IV@0.1u/6.3V_2
    IV@0.1u/6.3V_2
    HDMI_D1
    HDMI_D1#
    DECOUPLING
    +1.2V_HDMI
    [3] DDI3_TXN1 Place Cp,Cq,Cr close to U34 pin15,18 HDMI_HPD_DC
    Place Cs,Ct close to U34 pin30 +3V_HDMI R899 *10K_1%_2
    C426 IV@0.1u/6.3V_2 HDMI_D0
    For CPU [3]
    [3]
    DDI3_TXP2
    DDI3_TXN2
    C421 IV@0.1u/6.3V_2 HDMI_D0#

    Cp

    Cq

    Cr

    Cs

    Ct
    [13,21] HDMI_HPD_PCH R895 *Short_4

    to HDMI2.0 re Timer
    C418 IV@0.1u/6.3V_2 HDMI_CLK
    [3] DDI3_TXP3 HDMI_CLK#
    C414 IV@0.1u/6.3V_2 C751 C748 C745 C766 C765
    [3] DDI3_TXN3
    0.01u/50V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.01u/50V_4 0.1u/6.3V_2

    R100 IV@0_5%_4 HDMI_DDCCLK


    [13] DDPD_CLK HDMI_DDCDATA
    R101 IV@0_5%_4
    [12,13] DDPD_DATA

    C23 EV@0.1u/6.3V_2 HDMI_D0


    [21] GPU_D0 HDMI_D0#
    C22 EV@0.1u/6.3V_2
    [21] GPU_D0# +3V_HDMI +1.2V_HDMI
    Place Cu,Cv close to U34 pin24 Place Ci,Cj,Ck close to U34 pin7,11
    C21 EV@0.1u/6.3V_2 HDMI_D1
    [21] GPU_D1 HDMI_D1# Place Cw close to U34 pin1 Place Cl,Cm,Cn,Co close to U34 pin46
    C20 EV@0.1u/6.3V_2
    [21] GPU_D1#

    Cu

    Cv

    Cw

    Ci

    Cj

    Ck

    Cl

    Cm

    Cn

    Co
    C19 EV@0.1u/6.3V_2 HDMI_D2
    For GPU [21]
    [21]
    GPU_D2
    GPU_D2#
    C18 EV@0.1u/6.3V_2 HDMI_D2#
    C449 C441 C411 C410 C739 C740 C741 C753 C750 C746 C742
    C17 EV@0.1u/6.3V_2 HDMI_CLK 0.01u/50V_4 0.1u/6.3V_2 0.1u/6.3V_2 10u/6.3V_4 0.01u/50V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.01u/50V_4 10u/6.3V_4
    B [21] GPU_CLK HDMI_CLK# B
    C16 EV@0.1u/6.3V_2
    [21] GPU_CLK#
    R98 EV@0_5%_4 HDMI_DDCCLK
    [21] GPU_DDCCLK HDMI_DDCDATA
    [21] GPU_DDCDATA R99 EV@0_5%_4

    +1.8V_MAIN +3V
    LEVEL SHIFT (DDC) R2650 EV@0_5%_4
    CONNECTOR TX2_HDMI+ 1
    U18
    10 TX2_HDMI+
    Line-1 NC#4
    R2651 IV@0_5%_4 TX2_HDMI- 2 9 TX2_HDMI-
    +5V_HDMIC Line-2 NC#3
    3

    R929 R925
    CO-LAYOUT CO-LAYOUT 20 21 TX1_HDMI+ 4
    GND#1
    7 TX1_HDMI+

    2.2K_5%_2

    2.2K_5%_2
    GND GND Line-3 NC#2
    10K_1%_2 10K_1%_2
    TX2_HDMI+ 1 D2+ CN19 TX1_HDMI- 5 6 TX1_HDMI-
    Line-4 NC#1

    R889

    R901
    2 D2_Shield
    5

    TX2_HDMI- 3 D2- *AZ1045-04F.R7G


    TX1_HDMI+ 4 D1+
    HDMI_DDCCLK 4 3 HDMI_SCLK_CR R927 *Short_4 HDMI_SCLK_C HDMI_SCLK_C 5 D1_shield
    SSM6N43FU Q64A HDMI_SDATA_C TX1_HDMI- 6 D1-
    R928 *Short_4 HDMI_SDATA_C TX0_HDMI+ 7 D0+
    2

    Q64B *TVM0G5R5M220R_22p 8 D0_shield

    *TVM0G5R5M220R_22p
    TX0_HDMI- 9 D0- U16
    HDMI_DDCDATA 1 6 HDMI_SDATA_CR TXC_HDMI+ 10 CLK+ TXC_HDMI- 1 10 TXC_HDMI-
    SSM6N43FU Line-1 NC#4
    11 CLK_shield
    TXC_HDMI- 12 CLK- TXC_HDMI+ 2 9 TXC_HDMI+
    *SSM6N43FU Line-2 NC#3
    13 CEC
    3
    RV1

    RV4
    Q65A 14 Utility
    4 3 GPU_DDCCLK_Q HDMI_SCLK R923 *Short_4 HDMI_SCLK_C GND#1
    15 SCL
    HDMI_SDATA_C 16 SDA TX0_HDMI- 4 7 TX0_HDMI-
    GPU_DDCDATA_Q HDMI_SDATA R924 *Short_4 Line-3 NC#2
    17 DDC/CEC GND
    U31 18 +5V TX0_HDMI+ 5 6 TX0_HDMI+
    5

    Line-4 NC#1
    19 HP_DET
    A 1 6 1 +5V_HDMIC *AZ1045-04F.R7G A
    40 mils OUT GND GND
    3 HDMI_HPD 22 23 HMRBS-AK120C
    Q65B +5V IN
    FROM RETIMER TO RETIMER C749 RV3
    2

    2 *220p/25V_2 *TVM0G5R5M220R_22p
    *SSM6N43FU GND RV2 C743
    +1.8V_MAIN *TVM0G5R5M220R_22p 220p/25V_2
    G5250Q1T73U

    Quanta Computer Inc.


    There have DDC compatibility issue between PS8409 with NV so DDC
    should directly to NV but PS8409A still need to monitor for HDMI2.0 PROJECT : ZGI
    Vinafix.com Size Document Number
    HDMI Re-driver(PS8409)
    Rev
    1A

    Date: Tuesday, June 23, 2020 Sheet 37 of 77


    5 4 3 2 1
    5 4 3 2 1

    DP MUX(PS8461) to TBT

    U6531
    +1.2V R496

    +3V_DP
    *Short_8 R956

    R1003
    *Short_4

    *Short_4
    +1.2VDD

    +1.2VDDRx
    +1.2VDD +1.2VDDRx +1.2VDDA +1.2VDDTx

    38
    C805 C804 C848 C850 C501 C808 C809
    5 1 R439 *Short_4 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2 0.1U/16V_2
    +3V IN#2 OUT +1.2VDDA
    C806 0.1U/16V_2 4 2
    IN#1 GND C810 R955 *Short_4 +1.2VDDTx
    3 0.1U/16V_2
    +3V EN

    G5245AT11U +1.2VDDRx +1.2VDDTx


    D D

    +1.2VDDA
    +3V_DP +1.2VDD

    U33

    29

    32
    56

    24

    43

    42
    55
    1

    3
    0.22uF/6.3V_2 C811 GPU_TBT_D0_C 4

    VDD33_2
    VDD33_29

    VDD12_32
    VDD12_56

    VDDRX12_3
    VDDRX12_24

    VDDA12_43

    VDDTX12_42
    VDDTX12_55
    VDD_DDC
    From GPU IFPA

    [21] GPU_TBT_D0 GPU_TBT_D0#_C IN1_D0p


    0.22uF/6.3V_2 C812 5
    [21] GPU_TBT_D0# GPU_TBT_D1_C 7 IN1_D0n
    0.22uF/6.3V_2 C814
    [21] GPU_TBT_D1 GPU_TBT_D1#_C IN1_D1p
    0.22uF/6.3V_2 C816 8 Layout impedance follow TBT
    [21] GPU_TBT_D1# GPU_TBT_D2_C 10 IN1_D1n
    0.22uF/6.3V_2 C817
    [21] GPU_TBT_D2 GPU_TBT_D2#_C IN1_D2p
    0.22uF/6.3V_2 C819 11
    [21] GPU_TBT_D2# GPU_TBT_D3_C IN1_D2n DDI1_TX0_DP_R
    0.22uF/6.3V_2 C823 12 54 R960 *Short_2
    [21] GPU_TBT_D3 GPU_TBT_D3#_C 13 IN1_D3p OUT_D0p 53 DDI1_TX0_DN_R DDI1_TX0_DP [40]
    0.22uF/6.3V_2 C825 R963 *Short_2
    [21] GPU_TBT_D3# GPU_TBT_AUXP_C IN1_D3n OUT_D0n DDI1_TX0_DN [40]
    0.1U/16V_2 C803 62
    [21] GPU_TBT_AUXP GPU_TBT_AUXN_C 61 IN1_AUXp 51 DDI1_TX1_DP_R
    0.1U/16V_2 C802 R965 *Short_2
    [21] GPU_TBT_AUXN IN1_AUXn OUT_D1p DDI1_TX1_DN_R DDI1_TX1_DP [40]
    50 R967 *Short_2
    OUT_D1n DDI1_TX1_DN [40]
    65

    To TBT3 DP1
    66 IN1_SDA 48 DDI1_TX2_DP_R R970 *Short_2
    TBT_DP_HPD IN1_SCL OUT_D2p DDI1_TX2_DN_R DDI1_TX2_DP [40]
    16 47 R977 *Short_2
    [11,21] TBT_DP_HPD IN1_HPD OUT_D2n DDI1_TX2_DN [40]
    PS8461_2_IN2_EQ0 40 45 DDI1_TX3_DP_R R980 *Short_2
    IN1_EQ0 DDI1_TX3_DP [40]
    PS8461_2_IN2_EQ1 41 PS8461QFN66GTR-A4(QFN) OUT_D3p 44 DDI1_TX3_DN_R R982 *Short_2
    IN1_EQ1 OUT_D3n DDI1_TX3_DN [40]
    0.22uF/6.3V_2 C828 DDI1_TXP0_C 14 49 CTL1_TBT_HPDIN R427 *Short_4
    From CPU DDI1

    [3] DDI1_TXP0 DDI1_TXN0_C 15 IN2_D0p OUT_HPD TBT_HPD [40]


    0.22uF/6.3V_2 C830
    [3] DDI1_TXN0 DDI1_TXP1_C IN2_D0n PS8461_2_DP_CADET
    0.22uF/6.3V_2 C832 17 52 R419 *Short_4 R420 1M_1%_2 PS8469 side have internal PD 150K
    [3] DDI1_TXP1 DDI1_TXN1_C IN2_D1p DP_CADET
    0.22uF/6.3V_2 C834 18 R940 100K_1%_4
    [3] DDI1_TXN1 DDI1_TXP2_C IN2_D1n C_GPU_TBT_AUXN_R +3V_DP
    0.22uF/6.3V_2 C836 20 57 R933 *Short_4
    [3] DDI1_TXP2 DDI1_TXN2_C IN2_D2p DP_AUXn_SDA C_GPU_TBT_AUXP_R C_GPU_TBT_AUXN [40]
    C 0.22uF/6.3V_2 C840 21 58 R934 *Short_4 C
    [3] DDI1_TXN2 DDI1_TXP3_C 22 IN2_D2n DP_AUXp_SCL C_GPU_TBT_AUXP [40]
    0.22uF/6.3V_2 C842 R941 100K_1%_4
    [3] DDI1_TXP3 DDI1_TXN3_C IN2_D3p
    0.22uF/6.3V_2 C844 23
    [3] DDI1_TXN3 DDI1_AUXP_C IN2_D3n
    0.1U/16V_2 C801 60
    [3] DDI1_AUXP DDI1_AUXN_C 59 IN2_AUXp
    0.1U/16V_2 C800
    [3] DDI1_AUXN IN2_AUXn
    63 28 PS8461_2_CFG0
    64 IN2_SDA CFG0 27 PS8461_2_CFG1
    TBT_DDPB_HPD0 19 IN2_SCL CFG1 26 PS8461_2_CFG2
    [13] TBT_DDPB_HPD0 IN2_HPD CFG2 25 PS8461_2_CFG3
    PS8461_2_IN1_EQ0 38 CFG3 46 PS8461_2_CFG4
    PS8461_2_IN1_EQ1 39 IN2_EQ0 CFG4
    R425 *4.7K_1%_4 IN2_EQ1
    +3V_DP PS8461_2_I2C_ADDR
    R418 *4.7K_1%_4 6
    I2C_ADDR
    +3V_DP R994 *4.7K_1%_4 33
    CSDA

    EPAD
    REXT

    RSV2
    RSV1
    RSV0
    R990 *4.7K_1%_4 34
    PD#

    R432 *Short_4 PS8461_2_SW 9 CSCL


    [35] SEL_DP_MUX SW
    +3V_DP R429 *4.7K_1%_4
    31

    30

    35
    36
    37

    67

    SW=
    L: Port1 GPU is selected as the input port
    H: Port2 UMA is selected as the input port R998
    4.99K_1%_4
    TP118
    Vendor request use 0402

    Auto EQ option for Port2 PS8461_2_IN2_EQ1 R436 *4.7K_1%_4


    PS8461_2_CFG3 CFG3 = +3V_DP
    +3V_DP R489 *4.7K_1%_4
    L:Auto EQ enabled (default) R434 4.7K_1%_4
    EQ automatically adjusted based on link training.
    H:Auto EQ disabled. PS8461_2_IN2_EQ0 R446 *4.7K_1%_4 +3V_DP
    B B
    Auto EQ option for Port1 R443 4.7K_1%_4
    CFG1 =
    R488 PS8461_2_CFG1
    *4.7K_1%_4 L:Auto EQ enabled (default) PS8461_2_IN1_EQ1 R450 *4.7K_1%_4
    +3V_DP EQ automatically adjusted based on link training. +3V_DP
    H:Auto EQ disabled.
    R448 4.7K_1%_4

    CFG2 = PS8461_2_IN1_EQ0 R457 *4.7K_1%_4


    PS8461_2_CFG2 L: DP output is dynamic adjusted based on link training (default) +3V_DP
    +3V_DP R490 4.7K_1%_4
    M: DP output is fixed to 800mV/3.5dB R454 4.7K_1%_4
    R456 *4.7K_1%_4 H: DP output is fixed to 400mV/0dB

    CFG0 = Port y EQ Setting (y=1,2)


    +3V_DP R487 4.7K_1%_4 PS8461_2_CFG0 For Input Port1
    L:DP Port is configured to Auto jitter cleaning mode (default) [INy_EQ1,INy_EQ0] =
    R455 4.7K_1%_4 M:DP Port is configured to Redriving mode LL:Compensate channel loss up to 11 dB @ HBR3
    H:DP Port is configured to Full jitter cleaning mode LM:Compensate channel loss up to 13 dB @ HBR3
    LH:Compensate channel loss up to 15 dB @ HBR3
    ML:Compensate channel loss up to 16 dB @ HBR3
    MM:Compensate channel loss up to 17 dB @ HBR3
    MH:Compensate channel loss up to 18 dB @ HBR3
    +3V_DP R433 4.7K_1%_4 PS8461_2_CFG4 CFG4 = HL:Compensate channel loss up to 19 dB @ HBR3
    For Input Port2 HM:Compensate channel loss up to 20 dB @ HBR3
    R431 4.7K_1%_4 L:DP Port is configured to Auto jitter cleaning mode (default) HH:Compensate channel loss up to 21 dB @ HBR3
    M:DP Port is configured to Redriving mode
    H:DP Port is configured to Full jitter cleaning mode

    R1147 IV@4.7K_1%_4 SEL_DP_MUX SW=


    +3V_DP H: Port2 UMA is selected as the input port
    R1148 EV@4.7K_1%_4 L: Port1 GPU is selected as the input port

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    DP MUX(PS8461) to TBT
    Date: Tuesday, June 23, 2020 Sheet 38 of 77
    5 4 3 2 1
    5 4 3 2 1

    TBT DP2 Redriver


    39

    D D

    C C

    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    TBT DP2 Re-driver(TUSB546)
    Date: Tuesday, June 23, 2020 Sheet 39 of 77
    5 4 3 2 1
    5 4 3 2 1

    [11] PCIE_TXP17_TBT C874


    C875
    0.22u/6.3V_2
    0.22u/6.3V_2
    PCIE_TXP17_TBT_R
    PCIE_TXN17_TBT_R
    R1025
    R1026
    2.2_1%_2
    2.2_1%_2
    PCIE_TXP17_TBT_C
    PCIE_TXN17_TBT_C
    Y23
    Y22 PCIE_RX0_P
    U34B
    PCIE_TX0_P
    V23
    V22
    PCIE_RXP17_TBT_C
    PCIE_RXN17_TBT_C
    R1023
    R1024
    2.2_1%_2
    2.2_1%_2
    PCIE_RXP17_TBT_R
    PCIE_RXN17_TBT_R
    C872
    C873
    0.22u/6.3V_2
    0.22u/6.3V_2
    PCIE_RXP17_TBT [11]
    40
    [11] PCIE_TXN17_TBT PCIE_RX0_N PCIE_TX0_N PCIE_RXN17_TBT [11]

    PCIE RX
    C871 0.22u/6.3V_2 PCIE_TXP18_TBT_R R1022 2.2_1%_2 PCIE_TXP18_TBT_C T23 P23 PCIE_RXP18_TBT_C R1020 2.2_1%_2 PCIE_RXP18_TBT_R C869 0.22u/6.3V_2
    PCIE TX [11]
    [11]
    PCIE_TXP18_TBT
    PCIE_TXN18_TBT C870 0.22u/6.3V_2 PCIE_TXN18_TBT_R R1021 2.2_1%_2 PCIE_TXN18_TBT_C T22 PCIE_RX1_P
    PCIE_RX1_N PCIe PCIE_TX1_P
    PCIE_TX1_N
    P22 PCIE_RXN18_TBT_C R1019 2.2_1%_2 PCIE_RXN18_TBT_R C868 0.22u/6.3V_2
    PCIE_RXP18_TBT
    PCIE_RXN18_TBT
    [11]
    [11]
    C867 0.22u/6.3V_2 PCIE_TXP19_TBT_R R1018 2.2_1%_2 PCIE_TXP19_TBT_C M23 K23 PCIE_RXP19_TBT_C R1016 2.2_1%_2 PCIE_RXP19_TBT_R C860 0.22u/6.3V_2
    [11] PCIE_TXP19_TBT PCIE_TXN19_TBT_R PCIE_TXN19_TBT_C PCIE_RX2_P PCIE_TX2_P PCIE_RXN19_TBT_C PCIE_RXN19_TBT_R PCIE_RXP19_TBT [11]
    C866 0.22u/6.3V_2 R1017 2.2_1%_2 M22 K22 R1015 2.2_1%_2 C865 0.22u/6.3V_2
    [11] PCIE_TXN19_TBT PCIE_RX2_N PCIE_TX2_N PCIE_RXN19_TBT [11]
    C864 0.22u/6.3V_2 PCIE_TXP20_TBT_R R1014 2.2_1%_2 PCIE_TXP20_TBT_C H23 F23 PCIE_RXP20_TBT_C R1012 2.2_1%_2 PCIE_RXP20_TBT_R C862 0.22u/6.3V_2
    [11] PCIE_TXP20_TBT PCIE_TXN20_TBT_R PCIE_TXN20_TBT_C PCIE_RX3_P PCIE_TX3_P PCIE_RXN20_TBT_C PCIE_RXN20_TBT_R PCIE_RXP20_TBT [11]
    [11] PCIE_TXN20_TBT C863 0.22u/6.3V_2 R1013 2.2_1%_2 H22 F22 R1011 2.2_1%_2 C861 0.22u/6.3V_2 PCIE_RXN20_TBT [11]
    D PCIE_RX3_N PCIE_TX3_N D
    TBT_WAKE# Y2 T4
    PEWAKE# PERST# PCIE_CLKREQ_TBT# TBT_PLTRST# [13]
    Y6
    PCIE_CLKREQ# PCIE_CLKREQ_TBT# [11]
    R444 3.01K_1%_2 PCIE_RBIAS N16 V19
    PCIE_RBIAS REFCLK_100_IN_P CLK_PCIE_TBTP [11]
    T19
    REFCLK_100_IN_N CLK_PCIE_TBTN [11]

    Y Titan_Ridge_Host
    Place as close to the ball as possible

    U34E

    [44] TBTA_CA2HD_1_RX_P C510 0.33u/25V_2 TBTA_RX1_P R449 2.2_1%_2 TBTA_RX1_P_R B21


    TBT PORTS DP
    C505 0.33u/25V_2 TBTA_RX1_N R447 2.2_1%_2 TBTA_RX1_N_R A21 ASSRXp1 AC7 DPSNK1_ML0_P C813 0.22u/6.3V_2
    [44] TBTA_CA2HD_1_RX_N ASSRXn1 DPSNK1_ML0_P DDI1_TX0_DP [38]
    AB7 DPSNK1_ML0_N C815 0.22u/6.3V_2
    DPSNK1_ML0_N DDI1_TX0_DN [38]

    DP From GPU To P1
    C837 0.22u/6.3V_2 TBTA_TX1_P R986 2.2_1%_2 TBTA_TX1_P_R A19
    [44] TBTA_HD2CA_1_TX_P
    TBT PORT A

    C835 0.22u/6.3V_2 TBTA_TX1_N R983 2.2_1%_2 TBTA_TX1_N_R B19 ASSTXp1 AB9 DPSNK1_ML1_P C818 0.22u/6.3V_2
    [44] TBTA_HD2CA_1_TX_N ASSTXn1 DPSNK1_ML1_P DDI1_TX1_DP [38]
    AC9 DPSNK1_ML1_N C820 0.22u/6.3V_2
    DPSNK1_ML1_N DDI1_TX1_DN [38]

    Sink Port 1
    C826 0.33u/25V_2 TBTA_RX2_P R975 2.2_1%_2 TBTA_RX2_P_R A15 AC11 DPSNK1_ML2_P C824 0.22u/6.3V_2
    [44] TBTA_CA2HD_2_RX_P TBTA_RX2_N R978 TBTA_RX2_N_R ASSRXp2 DPSNK1_ML2_P DDI1_TX2_DP [38]
    [44] TBTA_CA2HD_2_RX_N C829 0.33u/25V_2 2.2_1%_2 B15 AB11 DPSNK1_ML2_N C827 0.22u/6.3V_2
    ASSRXn2 DPSNK1_ML2_N DDI1_TX2_DN [38]

    Port A
    C491 0.22u/6.3V_2 TBTA_TX2_P R435 2.2_1%_2 TBTA_TX2_P_R A17 AB13 DPSNK1_ML3_P C831 0.22u/6.3V_2
    [44] TBTA_HD2CA_2_TX_P TBTA_TX2_N R437 TBTA_TX2_N_R ASSTXp2 DPSNK1_ML3_P DDI1_TX3_DP [38]
    C499 0.22u/6.3V_2 2.2_1%_2 B17 AC13 DPSNK1_ML3_N C833 0.22u/6.3V_2
    [44] TBTA_HD2CA_2_TX_N ASSTXn2 DPSNK1_ML3_N DDI1_TX3_DN [38]
    C R402 *Short_2 TBTA_SBU1_R H4 N1 DPSNK1_AUX_P C797 0.22u/6.3V_2 C
    [44] TBTA_SBU1 TBTA_SBU2_R ASBU1 DPSNK1_AUX_P DPSNK1_AUX_N C_GPU_TBT_AUXP [38]
    R396 *Short_2 J4 N2 C798 0.22u/6.3V_2
    [44] TBTA_SBU2 ASBU2 DPSNK1_AUX_N C_GPU_TBT_AUXN [38]
    E20 AA2 TBT_HPD
    PA_USB2_D_P DPSNK1_HPD TBT_HPD [38]
    D20
    PA_USB2_D_N
    T2
    [43] TBTA_HPD TBTA_I2C_INT#_R PA_HPD
    M4 A5
    TBT_PA_USB2_MXCTL R2 PA_I2C_INT DPSNK2_ML0_P B5
    PA_USB2_MXCTL DPSNK2_ML0_N
    R461 200_1%_2 PA_USB2_RBIAS H19 B3
    PA_USB2_RBIAS DPSNK2_ML1_P A3
    DPSNK2_ML1_N
    A13 C2

    Sink Port 2
    B13 BSSRXp1 DPSNK2_ML2_P C1
    BSSRXn1 DPSNK2_ML2_N
    A11 E2
    B11 BSSTXp1 DPSNK2_ML3_P E1
    BSSTXn1 DPSNK2_ML3_N
    P1
    B7 DPSNK2_AUX_P P2
    A7 BSSRXp2 DPSNK2_AUX_N
    BSSRXn2 Y4 100K_1%_2 R2604
    A9 DPSNK2_HPD
    B9 BSSTXp2

    Port B
    BSSTXn2
    L4 AB21
    L5 BSBU1 DPSRC_ML0_P AC21

    E19
    D19
    BSBU2

    PB_USB2_D_P
    DPSRC_ML0_N

    DPSRC_ML1_P
    AC19
    AB19
    PCIE_WAKE#
    PB_USB2_D_N DPSRC_ML1_N

    Source Port
    R2600 100K_1%_2 T1 AB17
    R2601 100K_1%_2 M5 PB_HPD DPSRC_ML2_P AC17
    R2602 100K_1%_2 R1 PB_I2C_INT DPSRC_ML2_N
    PB_USB2_MXCTL AC15 +VCC3P3_SX
    R2603 200_1%_2 F19 DPSRC_ML3_P AB15
    PB_USB2_RBIAS DPSRC_ML3_N
    B B
    N4 Q63
    AC3 DPSRC_AUX_P N5 S5 *2N7002K S5

    2
    AB3 U0_SSRXp1 DPSRC_AUX_N
    Port USB
    U0_SSRXn1 R5 DPSRC_HPD R421 100K_1%_2 TBT_WAKE# 1 3
    DPSRC_HPD PCIE_WAKE# [10,54]
    AC5
    AB5 U0_SSTXp1
    U0_SSTXn1 R397 *0_5%_4

    Titan_Ridge_Host Y
    R398 *Short_4
    PCH_WAKE# [9]

    R579 *Short_4
    TBT_WAKE_EC# [57]

    High Speed Protect U2 Default by PCH PULL UP/DOWN INT (I2C) FROM PD
    (Bleeding Resistor)
    +VCC3P3_SX

    R952 10K_1%_2 TBT_WAKE#

    R451 221K_1%_2 TBTA_CA2HD_1_RX_P


    R423 10K_1%_2 PCIE_CLKREQ_TBT# R406 *Short_2 TBTA_I2C_INT#_R
    [43] TBTA_I2C_INT
    R445 221K_1%_2 TBTA_CA2HD_1_RX_N
    R946 100K_1%_2 TBT_PA_USB2_MXCTL
    R987 221K_1%_2 TBTA_HD2CA_1_TX_P R400 10K_1%_2 TBTA_I2C_INT#_R R405 *Short_2 TBTB_I2C_INT#_R

    A R981 221K_1%_2 TBTA_HD2CA_1_TX_N A


    R399 10K_1%_2 TBTB_I2C_INT#_R
    R962 221K_1%_2 TBTA_CA2HD_2_RX_P

    R964 221K_1%_2 TBTA_CA2HD_2_RX_N

    R417 221K_1%_2 TBTA_HD2CA_2_TX_P R416 *100K_1%_2 TBT_HPD

    R426 221K_1%_2 TBTA_HD2CA_2_TX_N

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    TBT/Titan Ridge _TBT
    Date: Tuesday, June 23, 2020 Sheet 40 of 77
    5 4 3 2 1
    5 4 3 2 1

    U34A
    41

    SPI Flash
    TBT_EE_DI Y18 W1 TBT_GPIO0
    [43] TBT_EE_DI TBT_EE_DO EE_DI GPIO_0 TBT_GPIO1
    W16 W2

    FLASH

    LC GPIO
    [43] TBT_EE_DO TBT_EE_CS_N EE_DO GPIO_1 TBT_TMU_CLK_OUT D34
    W18 Y1

    LC
    [43] TBT_EE_CS_N TBT_EE_CLK EE_CS# GPIO_3 TBT_CIO_PLUG_EVENT
    Y16 TMU CLK IN AA1 1 2
    [43] TBT_EE_CLK TBT_EE_WP_N W4 EE_CLK CIO_PLUG_EVENT# W6 TBT_GPIO8 TBT_HTPLG [13] To PCH SCI Pin
    EE_WP# TMU CLK OUT GPIO_8

    DEBUG
    RB500V-40

    MISC &
    TBT_TDI W20
    TP57 TBT_TMS Y20 TDI

    JTAG
    TP58 TBT_TCK TMS TBT_I2C_SCL
    W19 V2
    To PD

    LC
    D TP55 TBT_TDO TCK I2C_SCL TBT_I2C_SDA TBT_I2C_SCL [43] D
    Y19 V1

    JTAG
    TP56 TDO I2C_SDA V5 TBT_USB_FORCE_PWR TBT_I2C_SDA [43]

    POC GPIO
    USB_FORCE_PWR FORCE_PWR TP54
    V4
    V8 FORCE_PWR U2 TBT_BATLOW# TBT_FORCE_PWR [13]
    R935 *0_5%_2
    THERMDA BATLOW# U1 TBT_SLP_S3# R947 *Short_2
    BATLOW# [10] MISC To/From PCH
    SLP_S3# RTD3_CIO_PWR_EN_R SUSB# [2,10,57,62,64]
    D4 T5 R394 *Short_2
    L8 TEST_EDM RTD3_PWR_EN RTD3_CIO_PWR_EN [12]
    FUSE_VQPS_64
    R469 *Short_2 NCTF_TBT_A23 A23
    R412 *Short_2 NCTF_TBT_A1 A1 PA_MONDC E5 TBT_RESET# R415 *Short_2
    R1007 *Short_2 NCTF_TBT_AC23 AC23 PB_MONDC POC RESET# TBT_RST_EC# [43,57] Power Reset From EC
    Debug

    R959 *Short_2 NCTF_TBT_AC1 AC1 PC_MONDC D22 TBT_XTAL_25_IN

    DEBUG

    Main
    D5 USB_MONDC XTAL_25_IN D23 TBT_XTAL_25_OUT
    MONDC_SVR XTAL_25_OUT
    +/-0.5%
    TBT_PWR_GOOD W5 J5 TBT_RSENSE R422 4.75K_0.5%_2
    R403 *Short_2 TBT_TEST_EN R4 TEST_PWR_GOOD RSENSE J6 TBT_RBIAS
    B23 TEST_EN RBIAS
    AB23 USB2_ATEST
    R407 J9 PCIE_ATEST
    *100_1%_2 J11 ATEST_P
    H5 ATEST_N
    VGA_RES
    Titan_Ridge_Host Y

    "Confirm Intel why these debug I/F different with CRB"

    C
    JTAG (DEBUG) PU/PD +VCC3P3_SX +3V_AR
    FLASH POWER C

    [POC: Power On Control Power Domain] -->Sx


    R393 R401
    [LC: Link Controller Power Domain] -->S0 *0_5%_4 *Short_4

    +VCC3P3_LC

    10K_1%_2 R485 TBT_TDI


    10K_1%_2 R486 TBT_TMS TBT_GPIO1 R939 100K_1%_2
    10K_1%_2 R452 TBT_TCK TBT_CIO_PLUG_EVENT R953 10K_1%_2
    10K_1%_2 R460 TBT_TDO TBT_TMU_CLK_OUT R951 100K_1%_2 +VCC3P3_SX VCC3V3_FLASH VCC3V3_TBT_FLASH
    TBT_SLP_S3# R395 *10K_1%_2
    TBT_USB_FORCE_PWR R413 100K_1%_2 R390 *Short_4
    RTD3_CIO_PWR_EN_R R408 10K_1%_2

    R404 *100K_1%_2
    TBT_PWR_GOOD R424 100_1%_2 R389 *0_5%_4

    DEBUG OPTIONS
    +VCC3P3_SX

    +VCC3P3_SX TBT_I2C_SDA R949 2.2K_5%_2

    R428 *2.2K_5%_2 TBT_GPIO8 R430 2.2K_5%_2 TBT_I2C_SCL R937 2.2K_5%_2

    B TBT_RESET# B
    R1151 *10K_1%_2
    R950 100K_1%_2 TBT_GPIO0 R938 *10K_1%_2

    TBT_BATLOW# R936 10K_1%_2

    +3V_AR
    R948 *2.2K_5%_2
    CRYSTAL
    R409 100K_1%_2 FORCE_PWR R410 *10K_1%_2

    25MHz, 10ppm, 10pF TR Crystal

    C843 8.2p/50V_4

    XTAL_25_IN R993 33_1%_2 TBT_XTAL_25_IN

    2
    1
    Y4
    25MHZ/10ppm

    SPI FLASH XTAL_25_OUT R995 33_1%_2 TBT_XTAL_25_OUT

    4
    3
    C847 12p/50V_4

    VCC3V3_TBT_FLASH VCC3V3_TBT_FLASH
    8Mbit Flash (Mutual for TR and ACE)
    C851 0.1u/6.3V_2

    U36
    A 8 5 TBT_EE_DI A
    R1044 3.32K_1%_2 TBT_EE_WP_N 3 VCC DI(IO0) 2 TBT_EE_DO R1042 2.2K_5%_2
    R1000 3.32K_1%_2 TBT_HOLD_N 7 WP(IO2) DO(IO1) 1 TBT_EE_CS_N R1043 2.2K_5%_2
    4 HOLD(IO3) CS 6 TBT_EE_CLK
    9 GND CLK
    TPAD
    W25Q80DVZPIG

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    TBT/MISC teknisi indonesia 1A

    Date: Tuesday, June 23, 2020 Sheet 41 of 77


    5 4 3 2 1
    5 4 3 2 1

    +VCC0V9_SVR
    H9
    U34C
    G1 3.3V@?mA
    +3V_AR
    42
    VCC0P9_SVR_PAB_ANA#6 VCC3P3_SVR#1

    MAIN PWR SVR 3.3V


    H11 G2

    Pin E6

    Pin L6
    H12 VCC0P9_SVR_PAB_ANA#1 VCC3P3_SVR#3 H2 C474 C473 C471 C472 C476 C475 EC6
    H13 VCC0P9_SVR_PAB_ANA#2 VCC3P3_SVR#2 E6 1u/10V_2 1u/10V_2 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 68p/25V_2

    PWR OUT 0.9V


    H15 VCC0P9_SVR_PAB_ANA#3 VCC3P3A
    H16 VCC0P9_SVR_PAB_ANA#4 L6
    VCC0P9_SVR_PAB_ANA#5 VCC3P3_S0
    T12 F18
    VCC0P9_SVR_PC_ANA#1 VCC3P3_SX#1 +VCC3P3_SX +VCC0V9_SVR
    T13 R6
    D
    T15 VCC0P9_SVR_PC_ANA#2 VCC3P3_SX#2 D

    T9
    VCC0P9_SVR_PC_ANA#3
    VCC0P9_SVR#1
    J13
    L11
    +VCC0V9_SVR 0.9V@?mA
    T11 VCC0P9_SVR_USB_ANA#1 VCC0P9_SVR#2 L13

    Pin E8

    Pin L11

    Pin R8
    Pin H11

    Pin H13

    Pin H16

    Pin J13
    C482 C492 C500 C503 C496 C487 C489 C488 C493 C494

    Pin M11

    Pin N6

    Pin N11
    VCC0P9_SVR_USB_ANA#2 VCC0P9_SVR#3 M8
    N6 VCC0P9_SVR#4 M11 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2
    VCC0P9_SVR_DPAUX_ANA VCC0P9_SVR#5 M13
    J18 VCC0P9_SVR#6 N8

    SVR 0.9V
    +VCC0V9_PCIE VCC0P9_PCIE VCC0P9_SVR#7

    PCIe 0.9v
    L19 N11
    M19 VCC0P9_ANA_PCIE_1#1 VCC0P9_SVR#8 N13
    L18 VCC0P9_ANA_PCIE_1#2 VCC0P9_SVR#9 R8
    M16 VCC0P9_ANA_PCIE_2#1 VCC0P9_SVR#10 R11
    0.9V@?mA M18 VCC0P9_ANA_PCIE_2#2
    VCC0P9_ANA_PCIE_2#3
    VCC0P9_SVR#11
    VCC0P9_SVR#12
    R13
    R16
    +VCC0V9_LC J8 VCC0P9_SVR#13 T8
    +VCC0V9_LC VCC0P9_LC VCC0P9_SVR#14 Share Same GND
    T16
    H8 VCC0P9_SVR#15 E8
    +VCC0V9_LVR_OUT VCC0P9_LVR VCC0P9_SVR_BRD_SENSE L8
    H6 0.68uH_4x4x1.2
    VCC0P9_LVR_SENSE K1 +TBT_SVR_IND 1 2
    VCC3V3_ANA_USB2 H18 SVR_IND#1 K2
    VCC3V3_ANA_PCIE L16 VCC3P3_ANA_USB2 SVR_IND#2 L1
    VCC3V3_ANA VCC3P3_ANA_PCIE SVR_IND#3 PCMB041B-R68MS
    E16 L2

    Pin R16

    Pin T13

    Pin T16
    C485 C509 C506 C490 C502 C483

    Pin T8
    VCC3P3_ANA SVR_IND#4 C792 C799 C807
    1u/10V_2 1u/10V_2 V6 H1 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2
    +VCC3P3_LC VCC3P3_LC SVR_VSS#1
    Pin J8 Pin H18 J1
    SVR_VSS#2 J2
    SVR_VSS#3
    Titan_Ridge_Host Y
    R438 C507 C504 C478
    10K_1%_2
    1u/10V_2 1u/10V_2 1u/10V_2
    <Ra> Pin L16 Pin E16 Close Pin V6

    Ra shoould be AR workaround for VCC3P3_Sx inrush current


    C C

    Wake Support:
    Power Domain Setting +3VPCU +VCC3P3_SX
    R387 *0.01_1%_6
    Titan Ridge DP - GND Symbol
    U34D Titan_Ridge_Host Y
    +3V_S5 A2 E15
    R391 A4 VSS_ANA#41 VSS_ANA#67 E18
    R388 *Short_6 A6 VSS_ANA#42 VSS_ANA#68 E22
    *Short_6 VSS_ANA#40 VSS_ANA#69
    A8 E23
    A10 VSS_ANA#45 VSS_ANA#70 F1
    <R1> VSS_ANA#43 VSS_ANA#71
    <R3> A12 F2
    +3V +3V_AR A14 VSS_ANA#44 VSS_ANA#72 F5
    R392 *0.01_1%_6 A16 VSS_ANA#39 VSS_ANA#73 F6
    A18 VSS_ANA#38 VSS_ANA#112 F8
    A20 VSS_ANA#37 VSS_ANA#113 F9
    A22 VSS_ANA#36 VSS_ANA#114 F11
    <R2> VSS_ANA#35 VSS_ANA#118
    Option 1 for wake support over TBT: AA22 F12
    AA23 VSS_ANA#33 VSS_ANA#117 F13
    1. Connect 0Ohm to <R1> and <R3>. Keep <R2> empty. AB1 VSS_ANA#34 VSS_ANA#116 F15
    2. Make sure VCC3v3_SX_SYS can support AR maximum power consumption. AB2 VSS_ANA#111 VSS_ANA#115 F16
    VSS_ANA#32 VSS_ANA#74
    3. Simple Bios implementation AB4
    VSS_ANA#31 VSS_ANA#75
    F20
    Option 2 for wake support over TBT: AB6 G22
    AB8 VSS_ANA#30 VSS_ANA#76 G23
    1. Connect 0Ohm to <R1> and <R2>. Keep <R3> empty. AB10 VSS_ANA#29 VSS_ANA#77 H20
    2. Bios need to implement Sx entry pre-notice flow by PCIe2TBT. AB12 VSS_ANA#28 VSS_ANA#78 J12
    AB14 VSS_ANA#27 VSS_ANA#79 J15

    No wake support at all from AR


    AB16
    AB18
    VSS_ANA#26
    VSS_ANA#25 GND VSS_ANA#80
    VSS_ANA#131
    J16
    J19
    AB20 VSS_ANA#24 VSS_ANA#81 J20
    1. Connect 0Ohm to <R2> and <R3>. Keep <R1> empty. AB22 VSS_ANA#23 VSS_ANA#82 J22
    B
    AC2 VSS_ANA#22 VSS_ANA#83 J23 B
    AC4 VSS_ANA#21 VSS_ANA#84 L20
    AC6 VSS_ANA#20 VSS_ANA#85 L22
    AC8 VSS_ANA#19 VSS_ANA#86 L23
    AC10 VSS_ANA#18 VSS_ANA#87 M6
    AC12 VSS_ANA#17 VSS_ANA#119 M20
    Decoupling AC14
    AC16
    AC18
    VSS_ANA#16
    VSS_ANA#15
    VSS_ANA#14
    VSS_ANA#88
    VSS_ANA#121
    VSS_ANA#120
    N18
    N19
    N20
    AC20 VSS_ANA#13 VSS_ANA#89 N22
    AC22 VSS_ANA#12 VSS_ANA#90 N23
    B1 VSS_ANA#11 VSS_ANA#91 R18
    B2 VSS_ANA#10 VSS_ANA#92 R19
    B4 VSS_ANA#9 VSS_ANA#93 R20
    B6 VSS_ANA#8 VSS_ANA#94 R22
    B8 VSS_ANA#46 VSS_ANA#95 R23
    B10 VSS_ANA#7 VSS_ANA#96 T20
    B12 VSS_ANA#6 VSS_ANA#63 U22
    B14 VSS_ANA#5 VSS_ANA#62 U23
    B16 VSS_ANA#4 VSS_ANA#61 V9
    B18 VSS_ANA#3 VSS_ANA#60 V11
    B20 VSS_ANA#2 VSS_ANA#59 V12
    +VCC0V9_LVR_OUT 0.9V@?mA B22
    C22
    VSS_ANA#1
    VSS_ANA#47
    VSS_ANA#58
    VSS_ANA#97
    V13
    V15
    Pin H6 Pin H8 VSS_ANA#48 VSS_ANA#98
    C23 V20
    D1 VSS_ANA#49 VSS_ANA#99 W8
    D2 VSS_ANA#50 VSS_ANA#105 W9
    C495 C486 C481 C484 D6 VSS_ANA#51 VSS_ANA#106 W11
    10u/6.3V_4 10u/6.3V_4 D8 VSS_ANA#52 VSS_ANA#107 W12
    1u/10V_2 1u/10V_2 VSS_ANA#53 VSS_ANA#108
    D9 W13
    D11 VSS_ANA#54 VSS_ANA#109 W15
    D12 VSS_ANA#55 VSS_ANA#110 W22
    D13 VSS_ANA#56 VSS_ANA#122 W23
    D15 VSS_ANA#57 VSS_ANA#123 Y5
    D16 VSS_ANA#100 VSS_ANA#124 Y8
    D18 VSS_ANA#101 VSS_ANA#125 Y9
    E4 VSS_ANA#102 VSS_ANA#126 Y11
    E9 VSS_ANA#103 VSS_ANA#127 Y12
    A A
    E11 VSS_ANA#104 VSS_ANA#128 Y13

    +VCC0V9_PCIE
    0.9V@?mA +VCC3P3_SX
    E12
    E13
    VSS_ANA#64
    VSS_ANA#65
    VSS_ANA#129
    VSS_ANA#130
    Y15
    VSS#10
    VSS#11
    VSS#12
    VSS#13
    VSS#14
    VSS#15
    VSS#16
    VSS#17
    VSS#18
    VSS#19
    VSS#9
    VSS#8
    VSS#7
    VSS#6
    VSS#5
    VSS#4
    VSS#3
    VSS#2
    VSS#1

    VSS_ANA#66
    Pin L19 Pin M19 Pin L18 Pin M16 Pin F18 Pin R6
    F4
    L9
    L12
    L15
    M1
    M2
    M9
    M12
    M15
    N9
    N12
    N15
    R9
    R12
    R15
    T6
    T18
    V16
    V18

    C515 C513 C514 C512 C508 C511 C477


    10u/6.3V_4 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    TBT/Power
    Date: Tuesday, June 23, 2020 Sheet 42 of 77
    5 4 3 2 1
    5 4 3 2 1

    TPS65987DDJRSHR(VQFN)

    VCC3V3_FLASH C96349
    PN: AL065987004
    120MIL U4C
    43
    4.7u/6.3V_4 U4B TBTA_VBUS_L
    PD_LDO_1V8 35 S2 60 82
    LDO_1V8 13 61 DRAIN2#5 GND#14 81
    LDO_3V3 VBUS1 3A DRAIN2#6 GND#13
    R2613 *Short_4 9 62 80
    LDO_3V3 120MIL 66 DRAIN2#7 GND#12 79
    TP194 TP195 TP196 TP197 TP198 TP199
    +5V_S5_TYPEC 25 67 DRAIN2#8 GND#11 78
    600mA PP1_CABLE DRAIN2#9 GND#10
    68 77
    46 3 DRAIN2#10 GND#9 76
    PP2_CABLE VBUS2 GND#8 75 EC_TBT_I2C_SCL TBT_I2C_SCL
    VIA HOLE 60~82 GND#7
    S1 58 74 EC_TBT_I2C_SDA TBT_I2C_SDA
    D
    8 DRAIN1#4 +5V_S5_TYPEC S1 69 GND#6 73 PDEC_I2C_IRQ TBTA_I2C_INT D

    22u/6.3V_6
    15 DRAIN1#1 70 DRAIN1#8 GND#5 72

    C96352

    C96350
    10u/6.3V_4
    19 DRAIN1#2 11 71 DRAIN1#9 GND#4

    C96351
    3A

    22u/6.3V_6
    DRAIN1#3 PP_HV1 63 DRAIN1#10
    S2 57 64 DRAIN1#5
    DRAIN2#4 3A DRAIN1#6
    7 C96353 65
    52 DRAIN2#1 1 10u/6.3V_4 DRAIN1#7
    56 DRAIN2#2 PP_HV2
    DRAIN2#3 +3V3PD C96354 TPS65987DDJRSHR
    59 10u/6.3V_4
    51 GND#3 5
    20 GND#2 VIN_3V3
    GND#1
    TPS65987DDJRSHR C96355
    10u/6.3V_4

    Vinafix.com LEVEL SHIFT

    U4A
    +3V3PD +1.8V_DEEP_SUS

    R2614 *0_5%_4 PD_GPIO0 16 24 3V 1.8V


    [41,57] TBT_RST_EC# PD_GPIO1 17 GPIO0 C1_CC1 TBTA_CC1 [44]
    C96356 220p/25V_2
    PD_GPIO2 18 GPIO1 26 PORT A
    GPIO2 C1_CC2 TBTA_CC2 [44]
    30 C96357 220p/25V_2 R2615
    [40] TBTA_HPD TBTB_HPD 31 GPIO3/HPD1 27 EC_TBT_I2C_SCL *10K_1%_2
    GPIO4/HPD2 I2C1_SCL

    2
    PA_DP_MODE 21 28 EC_TBT_I2C_SDA
    PA_POL 22 GPIO5 I2C1_SDA 29 PDEC_I2C_IRQ TO EC
    PA_TBT_MODE GPIO6 I2C1_IRQ PDEC_I2C_IRQ [57]
    23 HRESET 3 1
    SPI FLASH

    PD_EE_DO_R GPIO7 HRESET_PCH [11]


    36
    PD_EE_DI_R 37 SPI_MISO/GPIO8 45 Q127
    PD_EE_CLK_R 38 SPI_MOSI/GPIO9 C2_CC1 *METR3904-G
    C C
    PD_EE_CS_N_R 39 SPI_CLK/GPIO10 47
    NBSWON1# 40 SPI_SS/GPIO11 C2_CC2
    PB_DP_MODE 41 GPIO12 32 TBT_I2C_SCL
    PB_POL 42 GPIO13 I2C2_SCL 33 TBT_I2C_SDA TBT_I2C_SCL [41]
    PB_TBT_MODE 43 GPIO14/PWM I2C2_SDA 34 TBTA_I2C_INT TBT_I2C_SDA [41] TO TBT
    PA_PPEXT_EN 48 GPIO15/PWM I2C2_IRQ TBTA_I2C_INT [40]
    PB_PPEXT_EN 49 GPIO16/PP_EXT1
    50 GPIO17/PP_EXT2 44 HRESET R2616 *Short_2
    BC1.2

    [9,44] USBP9+ 53 C1_USB_P/GPIO18 HRESET EC_HRST [43,57]


    [9,44] USBP9- C1_USB_N/GPIO19 +3V_S5
    54
    55 C2_USB_P/GPIO20 6
    C2_USB_N/GPIO21 ADCIN1 R2617 *Short_2 R2618 *100K_1%_2
    10
    VCC3V3_FLASH S5 S5
    ADCIN2 R2619 100K_1%_2 R2620 10K_1%_2 VCC3V3_FLASH
    TPS65987DDJRSHR

    5
    Q128A
    Ra R2616 *2N7002KDW
    3 4 EC_TBT_I2C_SDA
    [10,57] 2ND_MBDATA

    R2621 *Short_4

    ADCIN1 DIV=Ra/(Ra+Rb) = 0.00-0.18 Boot up until VIN_3V3 PRESENT


    Q128B

    2
    *2N7002KDW
    ADCIN2 DIV=Ra/(Ra+Rb) = 0.6-1 I2C1=0x23; I2C2=0x27 6 1 EC_TBT_I2C_SCL
    [10,57] 2ND_MBCLK

    R2622 *Short_4

    B B

    TCPC POWER S5
    SPI FLASH PU/PD +3V_S5 DOCK WAKE
    PDEC_I2C_IRQ R2623 10K_1%_2
    +3V3PD
    [Share ROM]

    +3V_S5 +3VPCU EC_TBT_I2C_SCL R2624 *4.7K_1%_2

    R2625 *0_5%_6 EC_TBT_I2C_SDA R2626 *4.7K_1%_2


    To TBT

    R2628 *Short_6 R2627 *Short_6 R2629 *Short_2


    [41] TBT_EE_DI
    R2630 *Short_2
    [41] TBT_EE_DO
    R2631 *Short_2
    [41] TBT_EE_CS_N
    R2632 *Short_2
    [41] TBT_EE_CLK
    +3V3PD R2633 *10K_1%_2
    PD Dedicate ROM

    3 1
    R2634 1M_1%_2 PD_GPIO0
    Q130 PD_EE_DI_R
    C96358 *DMG1012T-7 PD_EE_DO_R R2635 1M_1%_2 PD_GPIO1 D115 2 1 *RB500V-40 NBSWON1#
    2

    PD_EE_CS_N_R [57,58] NBSWON#


    *0.1u/6.3V_2
    PD_EE_CLK_R R2636 1M_1%_2 PD_GPIO2

    R2637 100K_1%_2 TBTA_HPD

    R2638 100K_1%_2 TBTB_HPD


    +5VPCU
    R2639 1M_1%_2 PA_DP_MODE
    R2640 *10K_1%_2
    R2641 1M_1%_2 PA_POL

    R2642 1M_1%_2 PA_TBT_MODE

    PB_DP_MODE
    3

    R2643 1M_1%_2
    A 2 Q131 C96359 A
    [43,57] EC_HRST PB_POL
    *0.1u/6.3V_2 R2644 1M_1%_2
    *DMG1012T-7
    R2645 1M_1%_2 PB_TBT_MODE
    1

    R2646 1M_1%_2 PA_PPEXT_EN

    R2647 1M_1%_2 PB_PPEXT_EN

    R2648 100K_1%_2 HRESET

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    USB PD / TPS65988DJ
    Date: Tuesday, June 23, 2020 Sheet 43 of 77
    5 4 3 2 1
    5 4 3 2 1

    Power Capacitance
    TBTA_VBUS_L
    44
    200mil
    D D
    C480 C479 C497 C498
    0.47u/25V_4 0.47u/25V_4 0.47u/25V_4 0.47u/25V_4

    200mil
    USB Type-C Port A CN25 TBTA_VBUS_L

    A2 A4 1
    D33
    2 P4SMAFJ20A
    ESD
    [40] TBTA_HD2CA_1_TX_P SSTXp1 VBUS_1
    A3 B4
    [40] TBTA_HD2CA_1_TX_N SSTXn1 VBUS_3
    [40] TBTA_CA2HD_1_RX_P B11 A9
    SSRXp1 VBUS_2
    [40] TBTA_CA2HD_1_RX_N B10 B9
    SSRXn1 VBUS_4
    C C
    B2 A1
    [40] TBTA_HD2CA_2_TX_P SSTXp2 GND_1 USB2_DP9_R
    B3 A12 D43 2 1 PESD5V0F1BSF
    [40] TBTA_HD2CA_2_TX_N SSTXn2 GND_2
    [40] TBTA_CA2HD_2_RX_P A11 B1
    SSRXp2 GND_3 USB2_DN9_R 2 1 PESD5V0F1BSF
    [40] TBTA_CA2HD_2_RX_N A10 B12 D41
    SSRXn2 GND_4
    R974 *Short_4 USB2_DP9_R A6 1
    [9,43] USBP9+ USB2_DN9_R Dp1 GND_5
    R969 *Short_4 A7 2
    [9,43] USBP9- Dn1 GND_6
    B6 3
    Dp2 GND_7
    B7 4
    Dn2 GND_8 TBTA_CC1
    5 D44 2 1 PESD5V0F1BSF
    TBTA_CC1 A5 GND_9 6
    [43] TBTA_CC1 CC1 GND_10
    TBTA_CC2 B5 TBTA_CC2 D11 2 1 PESD5V0F1BSF
    [43] TBTA_CC2 CC2
    TBTA_SBU1 A8 TBTA_SBU1 D40 2 1 PESD5V0F1BSF
    [40] TBTA_SBU1 SBU1
    TBTA_SBU2 B8
    [40] TBTA_SBU2 SBU2 TBTA_SBU2 D12 2 1 PESD5V0F1BSF

    40-42356-A5101RHF-QD TBTA_HD2CA_1_TX_P D48 2 1 PESD5V0H1BSF

    B TBTA_HD2CA_1_TX_N D47 2 1 PESD5V0H1BSF B

    TBTA_CA2HD_1_RX_P D14 2 1 PESD5V0H1BSF

    TBTA_CA2HD_1_RX_N D13 2 1 PESD5V0H1BSF

    TBTA_HD2CA_2_TX_P D9 2 1 PESD5V0H1BSF

    TBTA_HD2CA_2_TX_N D10 2 1 PESD5V0H1BSF

    TBTA_CA2HD_2_RX_P D36 2 1 PESD5V0H1BSF

    TBTA_CA2HD_2_RX_N D38 2 1 PESD5V0H1BSF

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    USB Type C #1
    Date: Tuesday, June 23, 2020 Sheet 44 of 77
    5 4 3 2 1
    5 4 3 2 1

    45
    D D

    C C

    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZGH_Z8H_ZGHA_Z8HA
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 45 of 77
    5 4 3 2 1
    5 4 3 2 1

    46
    D D

    C C

    B B

    A A
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 46 of 77
    5 4 3 2 1
    5 4 3 2 1

    LEVEL SHIFT LANVCC

    Q118A
    S5
    47

    5
    R2588
    499_1%_2
    SMB_ME0_DAT_C 4 2 3
    [58] SMB_ME0_DAT_C N SMB_ME0_DAT [10]
    7
    0
    0
    2
    R2589 K
    *0_5%_4
    D

    TO SMLink0
    W

    LANVCC

    D D
    Q118B

    2
    R2590 2N7002KDW
    499_1%_2
    SMB_ME0_CLK_C 1 6
    [58] SMB_ME0_CLK_C SMB_ME0_CLK [10]

    R2591 *0_5%_4

    LANVCC

    S5
    Q119 R2592
    LANPHYPC PU on PCH 2N7002K

    2
    10K_1%_2

    Vinafix.com [10] LAN_DIS# 3 1 LAN_DIS#_R


    LAN_DIS#_R [58]
    R2593 *0_5%_4

    LANVCC

    S5
    Q120 R2594
    LAN_WAKE# PU on PCH 2N7002K

    2
    10K_1%_2

    3 1 LANWAKE#_R
    [10] LANWAKE# LANWAKE#_R [58]
    R2595 *0_5%_4

    C C
    LANVCC

    Q12 R76
    S0 *2N7002K

    2
    *10K_1%_2
    PCIE_CLKREQ_LAN# 1 3
    [11] PCIE_CLKREQ_LAN# PCIE_REQ_LAN#_R [58]
    R65 *Short_4

    LAN POWER +3V_S5


    LANVCC

    R47 *Short_6

    R46 *0_5%_8

    Q11
    40 mils (Iout=1A) 40 mils (Iout=1A)
    1 3
    DMP2130L-7

    R73
    2

    100K_1%_2 R74 C47 C34 LANVCC


    *100K_1%_2 0.1u/6.3V_2 22u/6.3V_6

    R75 10K_1%_2
    for Vpro Close to PHY S5 R78
    R2652 VPRO@0_5%_4 PU on PCH Q132

    2
    [10] SLP_LAN# 10K_1%_2
    3

    ME2N70028D2-G
    3 1
    R67 2 C42
    LANVCC [13,19,51,53,54,57] PLTRST# ALL_PCIE_RST#_C [58]
    [57,59]
    B LAN_PWR B
    NVPRO@0_5%_4 0.01u/50V_4 Trace width>60mil, R64 *0_5%_4
    Q13
    DDTC144EUA-7-F Trace length<200mil
    1

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    INTEL LAN (I29V)
    Date: Tuesday, June 23, 2020 Sheet 47 of 77
    5 4 3 2 1
    5 4 3 2 1

    USB Charger (UBC)_BC 1.2

    +5VPCU
    USB_BC_ON(Low)-->ILIM_L
    USB_BC_ON(High)-->ILIM_H
    +USBPWR_BC_PORT +USBPWR_BC_PORT
    USB3.0 (UB3)
    48
    U6
    120mil 120mil
    1 12
    VIN VOUT
    2 11

    PCH

    CONN.
    C49 C44 [9] USBP1- 3 DM_OUT DM_IN 10 USBP1-_C [58] C28 C43 C48
    [9] USBP1+ DP_OUT DP_IN USBP1+_C [58]
    1u/10V_2 10u/6.3V_4 100u/6.3V_12 470p/50V_4 0.1u/6.3V_2
    6 9
    [57] USB_CLT1 CTL2_3 CTL1 NC
    7

    FROM EC
    CTL3_3 8 CTL2 13
    CTL3 FAULT USB_OC0# [9]
    D USB_CHARGE_ON D
    5
    [57] USB_CHARGE_ON EN
    Part Number Description
    4 17
    [57] USB_BC_ON ILIM_SEL EPAD 14
    ILIM_LO3 15 GND
    ILIM_L
    AL002544001 TPS2544RTER
    ILIM_HI3 16
    ILIM_H

    SLGC55544CVTR
    AL055544001 SLGC55544CVTR

    DESCRIPTION SETTING DESCRIPTION SETTING


    USB_CHARGE_ON
    ILIM_LO3
    CTL1 CTL2 CTL3 ILIM_SEL MODE ILIM_HI3
    DCP AUTO; ILIM_H +5VPCU USB_CTL1=CTL1_3
    0 1 1 0
    ILIM_L ; RLIM_L=39K --> 1.2 A R80 R79 R81
    0 1 1 1 DCP AUTO; ILIM_H R82 10K_1%_2 CTL2_3 ILIM_H; RLIM_H=20K --> 2.3A 20K_1%_2 100K_1%_2
    SDP2; ILIM_L 39K_1%_2
    1 1 1 0
    R83 10K_1%_2 CTL3_3
    1 1 1 1 CDP; ILIM_H

    C C

    VDD_DCI = 1.8V/2.5V/3.3V

    POWER RAIL
    USB3.0 Rerimer (UB3)
    +3V_U3_2 +VDD_DCI_2

    R51 *Short_4

    +3V_SUS
    C50 C51
    1u/10V_2 1u/10V_2
    R49 *Short_6

    +1.2V_U3_2

    +1.2VSUS C343 C344


    0.1u/16V_4 10u/6.3V_4

    R35 *Short_6

    B B

    MODE SETTING LEVEL SHIFT


    S0 SUS/S0

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    USB3 (Re-Timer + BC)
    Date: Tuesday, June 23, 2020 Sheet 48 of 77
    5 4 3 2 1
    5 4 3 2 1

    POWER RAIL
    USB3.0 Rerimer (UB3)

    49
    D D

    Vinafix.com

    C C

    MODE SETTING LEVEL SHIFT

    B B

    USB3.0 (UB3) +5V_S5


    USB_OC1# [9]
    U2
    G524B2T11U
    5 3
    IN OCB
    C14 +USBPWR_2
    1u/10V_2
    4 1
    EN GND OUT
    2
    C8 C15 C7
    A *22u/6.3V_6 0.1u/6.3V_2 100u/6.3V_12 A

    [57] USB_P2_ON
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    USB3.0
    Date: Tuesday, June 23, 2020 Sheet 49 of 77
    5 4 3 2 1
    A B C D E

    Codec ALC295 (ADO) Mute(ADO)


    D31 2 1 RB500V-40 R386 20K_1%_2 C461 0.1u/6.3V_2 R384 *Short_4
    50
    [10,12] ACZ_SPKR +5VPCU
    D32 2 1 RB500V-40
    [57] PCBEEP_EC
    ADOGND ADOGND
    C465
    R383 100p/50V_2

    10u/6.3V_4

    MIC2-VREFO-R

    MIC2-VREFO-L
    10K_1%_2
    +3V_DVDD

    0603 package size

    SLEEVE
    LINE2-R
    LINE2-L

    RING2

    HP-R2
    HP-L2
    C463 for 16 Ohm THD+N

    C462
    2.2u/10V_6 R348
    performance. (X5R) 10K_1%_2
    R369 *Short_6 +1.8V

    C448 C447 PD# D23 2 1 RB500V-40

    36

    35

    34

    33

    32

    31

    30

    29

    28

    27

    26

    25
    AMP_MUTE# [57]
    U17 0.1u/6.3V_2 10u/6.3V_4
    0603 package size

    LINE2_L

    MIC2_L/RING2
    LINE2_R

    MIC2_VREFO-L

    HPOUT_L
    MIC2_VREFO-R

    HPOUT_R
    PCBEEP

    5VSTB_AUX MODE

    MIC2_CAP

    MIC2_R/SLEEVE

    CPVEE
    for 16 Ohm THD+N
    Place next to pin 40
    performance. (X5R) ANALOG
    C459 10u/6.3V_4 37 24 C771 2.2u/10V_6 ADOGND
    +5VA AVSS1 CBN
    C455 0.1u/6.3V_2 C773 2.2u/10V_4 38 23
    VREF CBP DIGITAL
    C458 10u/6.3V_4 39 22 R361 *Short_4
    LDO1_CAP AVSS2 +3V_DVDD_IO
    R380 100K_1%_2
    ANALOG ADOGND
    40 21 C454 10u/6.3V_4 ADOGND
    AVDD1 LDO2_CAP C435 C434
    L7 1 2 PBY160808T-600Y-N_3A +5V_PVDD 41 20 AVDD2 0.1u/6.3V_2 10u/6.3V_4
    +5V PVDD1 CPVDD_AVDD2
    DIGITAL L_SPK+ 42 19 C439 10u/6.3V_4

    C769
    10u/6.3V_4
    C767 L_SPK- 43
    SPK_OUT_L+

    SPK_OUT_L-
    LDO3_CAP

    DVDD-IO
    18 DVDD-IO GROUND MOAT
    0.1u/6.3V_2
    R_SPK- 44 17
    SPK_OUT_R- SDATA_OUT PCH_AZ_CODEC_SDOUT [10]

    I2S_EN/SPDIF_OUT/GPIO2
    R_SPK+ 45 16 R356 33_1%_2
    SPK_OUT_R+ SDATA_IN PCH_AZ_CODEC_SDIN0 [10]
    46 15

    GPIO0/DMIC_DATA12
    PVDD2 SYNC PCH_AZ_CODEC_SYNC [10]
    C764 0.1u/6.3V_2

    GPIO1/DMIC_CLK
    C763 10u/6.3V_4 47 14
    JD2 BCLK PCH_AZ_CODEC_BITCLK [10]
    HP_JD# R898 200K_1%_2 SENSEA 48 13 TPS9
    JD1 DC_DET/EAPD

    I2S_MCLK
    C429 22p/25V_2

    I2C_DATA

    I2S_LRCK
    I2S_BCLK
    I2S_OUT
    I2C_CLK
    +3V R897 100K_1%_2

    I2S_IN
    DVDD
    49 R2678 *0_5%_4

    PDB
    TPAD
    Place near Audio Codec
    R918 *Short_4
    ALC295-CG

    10

    11

    12
    R913 *Short_4

    PD#
    Vinafix.com R381
    R355 *0_5%_4

    *0_5%_4
    +3V_DVDD
    R382 *0_5%_4
    TPS8 TPS15 TPS10 TPS12
    R350 *Short_4 TPS11 TPS7 TPS14 TPS13 *1000p/25V_2
    C467
    *0.1u/6.3V_2
    DMIC_DAT_IC

    DMIC_CLK_IC C466
    C420 C419
    0.1u/6.3V_2 10u/6.3V_4 I2S
    AGND plane GND plane
    1 ADOGND 1

    [34] DMIC_DAT R902 *Short_4


    [34] DMIC_CLK R896 22_5%_2

    C754 C752
    *33p/50V_4 *33p/50V_4

    Codec PWR 5V(ADO) Universal Audio Jack (ADO)


    C452 *100p/50V_2
    ADOGND

    +5V D7 1 2 AZ5725-01F.R7G
    DIGITAL ANALOG +5VA MIC2-VREFO-L R370 2.2K_5%_2
    RING2

    R379 *Short_6 RING2 RING2 [58]


    C442 *100p/50V_2 HP-L2_R
    ADOGND HP-L2_R [58]
    LINE2-L C443 4.7u/6.3V_4
    HP-L2 R368 56.2_1%_2
    1

    C446 C456 C457 ADOGND [58]


    D8 C440 10u/6.3V_4 0.1u/6.3V_2 10u/6.3V_4 HP_JD#
    HP-R2_R HP_JD# [58]
    AZ5725-01F.R7G 0.1u/6.3V_2 HP-R2 R364 56.2_1%_2 HP-R2_R [58]
    LINE2-R C438 4.7u/6.3V_4 SLEEVE SLEEVE [58]
    2

    C437 *100p/50V_2 ADOGND


    Moat
    MIC2-VREFO-R R358 2.2K_5%_2
    ADOGND SLEEVE

    D6 1 2 AZ5725-01F.R7G

    ADOGND
    C431 *100p/50V_2
    ADOGND

    +3V +3V_DVDD
    Near Codec

    R888 *Short_6

    C737
    10u/6.3V_4
    C736
    0.1u/6.3V_2
    Internal Speaker (ADO)
    40mil for each signal
    R_SPK- ADOGND
    R_SPK+
    +3V +3V_DVDD_IO
    CN20
    Near Codec 5
    C445 C451
    1
    R362 *Short_6 1000p/25V_2 1000p/25V_2
    2
    3
    4
    C433 C428
    10u/6.3V_4 0.1u/6.3V_2 6
    L_SPK-
    L_SPK+ 51325-00401-001
    ADOGND
    Quanta Computer Inc.
    C444 C450
    1000p/25V_2 1000p/25V_2 PROJECT : ZGI
    Size Document Number Rev
    1A
    Azalia ALC295M
    Date: Tuesday, June 23, 2020 Sheet 50 of 77
    A B C D E
    5 4 3 2 1

    TPM NPCT750
    51
    D D
    +3V_S5 TPM_VDD
    10mil
    +3V_S5 R17 *Short_6
    R22 1 2 10K_1%_2 TPM_MISO

    R24 1 2 10K_1%_2 TPM_SCS# C13 C11 C12 C10 C9


    10u/6.3V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2
    R25 1 2 10K_1%_2 PIRQ#_C

    Layout Note:
    R1064 close to TPM IC

    TPM_VDD

    C C
    R18 *Short_4 TPM_VDD

    22
    8

    1
    VSB
    VHIO#2
    VHIO#1
    R29 *0_5%_4
    [10] PCH_SLP_S0ix#
    30 2
    29 SCL/GPIO1 NC#1 3
    PIRQ# R28 *Short_4 PIRQ#_C 18 SDA/GPIO0 NC#2 5
    [10] PIRQ# PIRQ/GPIO2 NC#3
    U1 7
    NPCT750AABYX NC#4 9
    PCH_SPI1_CLK_L R27 33_1%_2 19 NC#5 10
    [12] PCH_SPI1_CLK_L PCH_SPI1_SI_L 21 SCLK NC#6 11
    R26 33_1%_2
    FROM PCH

    [12] PCH_SPI1_SI_L PCH_SPI1_SO_L TPM_MISO 24 MOSI/GPIO7 NC#7 12


    R23 33_1%_2
    [12] PCH_SPI1_SO_L SPI_TPM_CS# TPM_SCS# MISO NC#8
    R19 *Short_4 20 14
    [12] SPI_TPM_CS# SCS/GPIO5 NC#9 15
    NC#11 25
    6 NC#12 26
    13 GPIO3 NC#13 27
    D1 1 2 *PESD5V0F1BSF R21 *1.2k_5%_4 PP 4 GPIO4 NC#14 28
    PP/GPIO6 NC#15 31
    NC#16 32

    GND#2
    GND#1
    NC#17

    EPAD
    PLTRST# R20 *Short_4 17
    [13,19,47,53,54,57] PLTRST# PLTRST
    B B

    33
    23
    16
    NOTE:
    - Place 0.1 uF capacitors as close as possible to the device power pins.
    - VHIO can be either +3.3V or +1.8V.
    A
    - It is recommended to connect VHIO to V_RUN. A
    - VALW can be either +3.3V or +1.8V.
    - VALW power rail should be powered whenever the system is powered
    by any power source. Quanta Computer Inc.
    - For details regarding the TPM power sequence, see the NPCT75x
    Datasheet and Board Design Guidelines. PROJECT : ZGI
    Size Document Number Rev
    1A
    dTPM (NPCT750)
    Date: Tuesday, June 23, 2020 Sheet 51 of 77
    5 4 3 2 1
    5 4 3 2 1

    52
    D D

    C C

    B B

    DECOUPLING

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 52 of 77
    5 4 3 2 1
    5 4 3 2 1

    NGFF_M.2 SSD #1 (NGF) PCIE 1X4 LR /SATA

    CN21
    +3V_SSD1
    53
    1
    NGFF MKEY 2
    3 GND#1 3.3Vaux_1 4 +3V_SSD1
    D PCIE_RXN9_SSD 5 GND#3 3.3Vaux_2 6 D
    [11] PCIE_RXN9_SSD PCIE_RXP9_SSD 7 PETN3 PERn3 NC#10 8
    [11] PCIE_RXP9_SSD 9 PETP3 PERp3 NC#11 10 TP52
    PCIE_TXN9_SSD C762 0.22u/6.3V_2 PCIE_TXN9_SSD_R 11 GND#7 DAS/DSS#(I)(OD) 12
    [11] PCIE_TXN9_SSD PCIE_TXP9_SSD PCIE_TXP9_SSD_R 13 PERN3 PETn3 3.3Vaux_3 14
    C761 0.22u/6.3V_2
    [11] PCIE_TXP9_SSD PERP3 PETp3 3.3Vaux_4
    15 16
    PCIE_RXN10_SSD 17 GND#8 3.3Vaux_5 18
    PCIE 1X4 LR

    [11] PCIE_RXN10_SSD PCIE_RXP10_SSD 19 PETN2 PERn2 3.3Vaux_6 20


    [11] PCIE_RXP10_SSD PETP2 PERp2 NC#12
    21 22
    PCIE_TXN10_SSD C760 0.22u/6.3V_2 PCIE_TXN10_SSD_R 23 GND#2 NC#13 24
    [11] PCIE_TXN10_SSD PCIE_TXP10_SSD PCIE_TXP10_SSD_R PERN2 PETn2 NC#14
    C759 0.22u/6.3V_2 25 26
    [11] PCIE_TXP10_SSD 27 PERP2 PETp2 NC#15 28
    PCIE_RXN11_SSD 29 GND#9 NC#16 30
    [11] PCIE_RXN11_SSD PCIE_RXP11_SSD PETN1 PERn1 NC#17
    31 32
    [11] PCIE_RXP11_SSD 33 PETP1 PERp1 NC#2 34 TO DEVSLP1
    PCIE_TXN11_SSD C758 0.22u/6.3V_2 PCIE_TXN11_SSD_R 35 GND#10 NC#3 36
    [11] PCIE_TXN11_SSD PCIE_TXP11_SSD PCIE_TXP11_SSD_R 37 PERN1 PETn1 NC#4 38 DEVSLP_N0
    C757 0.22u/6.3V_2 R932 *Short_4 DEVSLP1_SSD1 [9]
    [11] PCIE_TXP11_SSD 39 PERP1 PETp1 DEVSLP 40
    PCIE_RXP12_SSD 41 GND#11 NC#5 42 R930 *100K_1%_2
    SATA

    [11] PCIE_RXP12_SSD PCIE_RXN12_SSD 43 SATA B+/PETN0 PERn0 NC#6 44


    [11] PCIE_RXN12_SSD SATA B-/PETP0 PERp0 NC#7
    45 46
    PCIE_TXN12_SSD C756 0.22u/6.3V_2 PCIE_TXN12_SSD_R 47 GND#12 NC#8 48
    [11] PCIE_TXN12_SSD PCIE_TXP12_SSD PCIE_TXP12_SSD_R 49 SATA A-/PERN0 PETn0 NC#9 50 NGFF1_RST#
    C755 0.22u/6.3V_2 R931 *Short_4 PLTRST# [13,19,47,51,54,57]
    [11] PCIE_TXP12_SSD SATA A+/PERP0 PETp0
    PERST#/NC
    51 52 PCIE_CLKREQ_NGFF1# [11]
    C GND#13 CLKREQ#/NC C
    [11] CLK_PCIE_SSD1N 53 54
    55 REFCLKN PEWAKE#/NC 56 TP116
    [11] CLK_PCIE_SSD1P REFCLKP NC#18
    57 58 TP115
    +3V_SSD1 GND#14 NC#19

    R894 4.7K_1%_2
    67 68 +3V_SSD1
    R893 *100_1%_2 NGFF1_PEDET1 69 NC#1 SUSCLK
    71 PEDET(OC-PCIE/GND-SATA) 70
    73 GND#4 3.3Vaux_7 72
    [11] NGFF1_DET1 GND#5 3.3Vaux_8
    75 74
    R892 GND#6 3.3Vaux_9
    SSD SATA I/F --> H

    76
    77
    78
    79
    3
    *0_5%_4
    2
    SSD PCIE I/F --> L

    76
    77
    78
    79
    APCI0020-P002A
    Q59
    ME2N70028D2-G
    1

    Vinafix.com
    B B

    DECOUPLING
    +3V_SSD1 +3V

    C790 47u/6.3V_8 R385 *Short_6 C460 10u/6.3V_4

    C470 10u/6.3V_4 C464 0.1u/6.3V_2

    C468 0.1u/6.3V_2

    C469 0.1u/6.3V_2

    C794 0.1u/6.3V_2
    A A
    C793 0.1u/6.3V_2

    C796 *47u/6.3V_8

    C795 *47u/6.3V_8
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    NGFF SSD #1 / PCIE/STAT
    Date: Tuesday, June 23, 2020 Sheet 53 of 77
    5 4 3 2 1
    5 4 3 2 1

    NGFF_M.2 WiFi & BT (NGF) E-Key


    CN16 +WL_VDD
    RGI: Radio Generic Interface
    BRI: Bluetooth Radio Interface
    54
    1
    NGFF EKEY 2
    3 GND#3 3.3Vaux#1 4

    BT
    [9] USBP14+ USB_D+ 3.3Vaux#2 WIGIG_LED
    5 6 TP108
    [9] USBP14- 7 USB_D- LED#1 8
    D GND#4 PCM_CLK PCM_CLK [10] D
    [11] CNV_WRXN1 9 10 CNV_RF_RESET# [10]
    SDIO CLK(O) /WGR_D1N 1.8V/ RF_RESET_B PCM_SYNC
    11 12
    [11] CNV_WRXP1 SDIO CMD(IO) /WGR_D1P PCM_IN PCM_IN [10]
    13 14
    CNVi RX

    SDIO DAT0(IO) /GND 1.8V/ CLKREQ0/ PCM_OUT MODEM_CLKREQ [10]


    [11] CNV_WRXN0 15 16
    17 SDIO DAT1(IO) /WGR_D0N LED#2 18
    [11] CNV_WRXP0 SDIO DAT2(IO) /WGR_D0P GND#13
    19 20 UART_WAKE_N [10]
    21 SDIO DAT3(IO) /GND UART Wake 22 CNV_BRI_RSP_R R885 22_5%_2
    [11] CNV_WR_CLKN SDIO Wake(I) /WGR_CLKN 1.8V/ BRI_RSP(RX)/ UART Rx CNV_BRI_RSP [11]
    23
    [11] CNV_WR_CLKP SDIO Reset /WGR_CLKP

    32

    CNVI
    DISCRETE WIFI

    1.8V/ RGI_DT(TX)/ UART Tx CNV_RGI_DT [11,12]


    33 34 CNV_RGI_RSP_R R890 22_5%_2
    GND#5 1.8V/ RGI_RSP(RX)/ UART RTS CNV_RGI_RSP [11]
    C744 0.1u/6.3V_2 PCIE_TXP15_WLAN_C 35 1.8V/ BRI_DT(TX)/ UART CTS 36
    [11] PCIE_TXP15_WLAN PETp0 CNV_BRI_DT [11,12]
    C747 0.1u/6.3V_2 PCIE_TXN15_WLAN_C 37 38 VPRO_CLINK_RESET
    [11] PCIE_TXN15_WLAN PETn0 Clink RESET VPRO_CLINK_RESET [11]
    39 40 VPRO_CLINK_DATA

    DISCRETE
    GND#6 CLink DATA VPRO_CLINK_DATA [11]
    41 42 VPRO_CLINK_CLK
    [11] PCIE_RXP15_WLAN PERp0 CLink CLK VPRO_CLINK_CLK [11]
    43 44
    [11] PCIE_RXN15_WLAN PERn0 COEX3 CNV_PA_BLANKING [11]
    45 46 CNV_MFUART2_TXD [11]
    GND#7 COEX/RXD COEX2
    47 48
    [11] CLK_PCIE_WLANP REFCLKP0 COEX/TXD COEX1 CNV_MFUART2_RXD [11]
    [11] CLK_PCIE_WLANN 49 50 SUSCLK [10]
    REFCLKN0 C_P32K/ SUSCLK(32KHz)
    51 52 WLAN_RST# R900 *Short_4
    GND#8 PERST0# PLTRST# [13,19,47,51,53,57]
    WLAN_CLKREQ# 53 54 BT_EN_R
    WLAN_WAKE_R# 55 CLKREQ0# W_DISABLE2# 56 RF_EN
    C PEWake0# W_DISABLE1# RF_EN [57] C
    57 58 LPC_LAD0_C R904 *Short_4
    GND#9 NFC_I2C_SM_DATA CLK_PCI_LPC_C LPC_LAD0 [9,57]
    [11] CNV_WTXN1 59 60 R906 *Short_4 CLK_PCI_LPC [9]
    61 PETp1 /WT_D1N NFC_I2C_SM_CLK 62 LPC_LFRAME#_C R910 *Short_4
    CNVi TX

    [11] CNV_WTXP1 PETn1 /WT_D1P NFC_I2C_IRQ LPC_LFRAME# [9,57]


    63 64 R914 *Short_4
    GND#10 REFCLK0/ GPIO0_NFC_RESET# CLKIN_XTAL [11]
    65 66 LPC_LAD1_C R919 *Short_4
    [11] CNV_WTXN0 PERp1/WT_D0N UIM_SWP/PERST1# LPC_LAD1 [9,57]
    67 68 LPC_LAD2_C R921 *Short_4
    [11] CNV_WTXP0 PERn1/WT_D0P UIM_POWER_SNK LPC_LAD2 [9,57]
    69 70 LPC_LAD3_C R926 *Short_4
    71 GND#11 UIM_POWER_SRC 72 LPC_LAD3 [9,57]
    [11] CNV_WT_CLKN Reserved1/WT_CLKN 3.3Vaux#3
    73 74

    GND#1
    GND#2
    [11] CNV_WT_CLKP Reserved2 /WT_CLKP 3.3Vaux#4 +WL_VDD

    NC#2
    NC#1
    75 BT_EN_R R360 *Short_4
    GND#12 BT_EN [57]
    R359 *0_5%_4 BT_PCH [12]
    APCI0085- P005A

    79
    78
    76
    POWER SWITCH +3V_S5 77 +WL_VDD
    LEVEL SHIFT
    B B

    R2658 NVPRO@0_5%_8 R2657 *Short_6 +WL_VDD +WL_VDD

    Q133 VPRO@DMP2130L-7 +WL_VDD


    1 3 R905
    4.7K_1%_2

    2
    R2659 R2660 BT_EN_R R365 *10K_1%_2
    2

    VPRO@100K_1%_2 *VPRO@100K_1%_2 WLAN_CLKREQ# 1 3


    PCIE_CLKREQ_WLAN# [11]
    Q60
    R2661 2N7002K
    VPRO@10K_1%_2
    RF_EN R367 *10K_1%_2 R907
    *4.7K_1%_2
    3

    2
    for Vpro
    R2663 2 C96366 WLAN_WAKE_R# 1 3
    [10] SLP_WLAN# PCIE_WAKE# [10,40]
    VPRO@0_5%_4 VPRO@0.01u/50V_4
    Q134 Q62
    VPRO@DDTC144EUA-7-F *2N7002K
    1

    A A

    +WL_VDD
    Quanta Computer Inc.
    C778 C714
    C779 C782 C718 C717 C713 C704 C781 PROJECT : ZGI
    10u/6.3V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 10u/6.3V_4 47u/6.3V_8 0.1u/6.3V_2 0.1u/6.3V_2 Size Document Number Rev
    1A
    NGFF CNVi/(WiFi & BT)
    Date: Tuesday, June 23, 2020 Sheet 54 of 77
    5 4 3 2 1
    5 4 3 2 1

    CPU FAN (THM) GPU FAN (THM)


    +5V +5V

    +3V +5V
    +3V

    R11 +3V
    +3V

    R3
    +3V +5V
    +3V

    R5
    +3V
    +3V

    R10
    R2
    55
    *Short_4 *Short_4
    R12 *10K_1%_2

    2
    10K_1%_2 *10K_1%_2 R6 R9 10K_1%_2 C3

    2
    R8 R7 C6 10K_1%_2 0.1u/6.3V_2
    D 1K_1%_2 1 3 0.1u/6.3V_2 1K_1%_2 1 3 D
    10K_1%_2 [57] FAN1_RPM [57] FAN2_RPM
    Q1 *2N7002K 40mil
    Q2 *2N7002K CN4

    2
    R1 *Short_4 CN5 R4 *Short_4 +5V_FAN2
    1
    2

    +5V_FAN1
    1 1 3 FAN2_PWM_Q 2
    1 3 FAN1_PWM_Q 2 [57] FAN2_PWM 3 5
    [57] FAN1_PWM 3 5 4 6
    Q3 METR3904-G
    Q4 METR3904-G 4 6 50278-00401-V01
    50278-00401-V01
    C5 C4
    220p/25V_2 220p/25V_2 C2 C1
    *220p/25V_2 *220p/25V_2

    C
    Hole C

    Clip cap PAD1 HOLE4 HOLE5 HOLE6 HOLE7 HOLE8 HOLE9

    12
    11
    10
    *PAD-Z8H-10 *H-TC315IBC236D165P2 *H-TC315IBC236D165P2 *H-TC315IBC236D165P2 *H-TC315IBC236D165P2 *H-TC315IBC236D165P2 *H-TC315IBC236D165P2

    9
    HOLE1
    S1 S2 S3 S4 H-TC244I182BC220D142P2 13 8
    CLIP-39X35-100X18-3P *CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P 14 7
    15 6
    3 2 3 2 3 2 3 2 5

    1
    2
    3
    4

    1
    1
    1

    WiFi Nut

    HOLE12 HOLE13 HOLE14 HOLE15 HOLE16


    *HG-C315D157P2 *hg-z8h-1

    9
    HOLE10 HOLE11 *H-TC169IBC87D87P2 *H-TC169IBC87D87P2 *H-TC169IBC87D87P2
    S5 S6 S7 S8 *H-C315D118P2 *H-C315D118P2 8 8
    CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P 7 7
    6 6
    3 2 3 2 3 2 3 2 5 5

    1
    2
    3
    4

    1
    2
    3
    4
    1

    1
    B B
    1

    HOLE17 HOLE18 HOLE19 HOLE20 HOLE21


    *HG-C315D197P2 *HG-C315D197P2 *HG-C236D157P2 *HG-O307X276D189X157P2 *HG-O354X315D236X197P2
    9

    9
    S9 S10 S11 S12 8 8 8 8 8
    *CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P *CLIP-39X35-100X18-3P 7 7 7 7 7
    6 6 6 6 6 HOLE2
    3 2 3 2 3 2 3 2 5 5 5 5 5 2D *2D-BARCODE-8X8-S
    1
    2
    3
    4

    1
    2
    3
    4

    1
    2
    3
    4

    1
    2
    3
    4

    1
    2
    3
    4
    1

    1
    HOLE22 HOLE23 HOLE24 HOLE25 HOLE26 HOLE27 HOLE28 HOLE3
    *SPAD-Z8H-8 *SPAD-Z8H-9 *SPAD-RE354X157NP *SPAD-RE354X354NP *SPAD-Z8H-7 *NPHOLE-157_48-TB157_48 *SPAD-RE79X98NP *2D-BARCODE-8X8-S

    S13 S14 S15


    *CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P CLIP-39X35-100X18-3P

    3 2 3 2 3 2
    1

    1
    A A
    1

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    FAN,Thermal,FAN LED
    Date: Tuesday, June 23, 2020 Sheet 55 of 77
    5 4 3 2 1
    5 4 3 2 1

    PLACE CLOSED TO PIN


    +3VPCU +3VPCU
    IT8013/IT8011/IT8012 difference
    DEVICE PIN8 PIN18
    IT8013 NC VSTBY33
    IT8011 NC VSTBY18
    IT8012 VCOREI VSTBY33

    1
    C96368
    D D116 R2674 D
    VPRO@0.1u/6.3V_2
    VPRO@RB500V-40 VPRO@10K_1%_2

    TP201
    TP202
    TP203
    TP204
    2
    I2C SAD+Read/Write patterns
    A_WRST
    Command SAD[7:4],A[2],A[1],A[0],R/W= SAD+R/W
    Read 0100 0 0 0 1 01000001 (41h)
    Write 0100 0 0 0 01000000 (40h)
    Read
    0 SUSPWRDNACK [10]
    0100 0 0 1 1 01000011 (43h) C96367
    Write 0100 0 0 1 0 01000010 (42h) VPRO@1u/10V_2

    A_GP6
    A_GP5
    A_GP4
    A_GP3
    A_GP2
    Read 0100 1 1 1 1 01001111 (4Fh)
    Write 0100 1 1 1 0 01001110 (4Eh) All I/O Signals are 3.3V CMOS Level.

    15
    14
    13
    12
    11
    U6530
    +3VPCU

    GP6
    GP5
    GP4
    GP3
    GP2
    TP207 A_GP7 16
    IT8013 10 SLP_A#
    R2677
    VPRO@4.7K_1%_4
    GP7 GP1 SLP_A# [10]

    C
    +3VPCU 17
    18 VSS
    VSTBY33
    QFN-20 GP0
    NC#3
    9
    8
    SLP_S5#
    SLP_S5# [10]
    C
    IT8013_MBCLK 19 7 IT8013_INT# Interrupt output IT8013_INT#
    IT8013_MBDATA SCL INT IT8013_INT# [57]
    20 6
    SDA NC#2

    21

    WRST#
    EPAD

    NC#1
    +3VPCU

    A2
    A1
    A0
    VPRO@IT8013FN/CX

    1
    2
    3
    4
    5
    R2664 VPRO@2.2K_5%_2 IT8013_MBCLK
    R2665 VPRO@2.2K_5%_2 IT8013_MBDATA

    A_WRST
    Adjust by I2C Bus Frequency. Note:VCOREI power-up can't slow than VSTBY_3.3V.

    A_A2
    A_A1
    A_A0
    +3VPCU

    PCU from EC PCU to IT803


    I2C SLAVE ADDRESS:
    5

    Q136A
    B VPRO@2N7002KDW B
    3 4 IT8013_MBDATA
    [57,58,71] 3ND_MBDATA +3VPCU +3VPCU +3VPCU

    R2675 *VPRO@0_5%_4

    R2668 R2670 R2672


    *VPRO@4.7K_1%_4 *VPRO@4.7K_1%_4 *VPRO@4.7K_1%_4
    Q136B
    2

    VPRO@2N7002KDW
    A_A2 A_A1 A_A0
    6 1 IT8013_MBCLK
    [57,58,71] 3ND_MBCLK
    R2669 R2671 R2673
    R2676 *VPRO@0_5%_4 VPRO@4.7K_1%_4 VPRO@4.7K_1%_4 VPRO@4.7K_1%_4

    A A

    Quanta Computer Inc.


    PROJECT : Z8I
    Size Document Number Rev
    1A
    Extend IO IT8013
    Date: Tuesday, June 23, 2020 Sheet 56 of 77
    5 4 3 2 1
    5 4 3 2 1

    R189 *0_5%_4
    EC(KBC) +3V_LDO_EC
    L5 1 2 BLM15AG121SN1D_0.5A

    C401
    +A3VPCU

    VSTBY_FSPI +3VPCU_ECPLL

    C355 0.1u/6.3V_2
    L3 1 2
    (For PLL Power)
    BLM15AG121SN1D_0.5A +3VPCU_EC
    +3V_S5 R200 *Short_4 VSTBY_FSPI

    +3V_LDO_EC
    57
    0.1u/6.3V_2
    S5_ON R223 10K_1%_2 MAINON R336 100K_1%_2
    ECAGND
    R194
    ACPRESENT [10]
    12 mils 2.2_1%_6 NBSWON# R811 *100K_1%_2 SUSON R217 100K_1%_2
    +3VPCU_EC IT8013_INT# [56]
    +3V_LDO_EC R270 2.2_1%_6 R288 33_1%_2
    BT_EN [54]
    CLR_CMOS [10] VRON R331 100K_1%_2
    180p/50V_4 +3V
    C392
    SENSOR_MODE1 [58] PCH_SPI_SI_EC
    C356 C354 C405 C378 C347 C385 C417 R222 *10K_1%_2
    SENSOR_MODE2 [58] PRSNT#_R
    0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 R204 10K_1%_2
    TRI_EN# [73] PCH_SPI_SO_EC
    D
    C352 R212 *Short_4 PDEC_I2C_IRQ [43] R221 *10K_1%_2 D
    0.1u/6.3V_2
    C349 180p/50V_4
    R284 *2.2_1%_6 +3V_EC
    +3V
    USB_BC_ON [48]
    +3V_S5 R279 2.2_1%_6 USB_CHARGE_ON [48]
    C389
    0.1u/6.3V_2
    CLKRUN# [10] SM BUS PU(KBC) TPD_INT# R206 *10K_1%_2 +3VPCU

    114
    121

    106

    127
    R202 *Short_2 +3V_LDO_EC

    11
    26
    50
    92

    74

    84
    83
    82

    19
    20

    99
    98
    97
    96
    93
    GPUT_CLK [21]

    3
    R201 *Short_2 GPUT_DATA [21]
    10 110 MBCLK

    VSTBY#1
    VSTBY#2
    VSTBY#3
    VSTBY#4
    VSTBY#5

    L80LLAT/GPE7
    VSTBY(PLL)

    EGCLK/GPE3
    EGCS#/GPE2
    EGAD/GPE1

    GPH7
    ID6/GPH6
    ID5/GPH5
    ID4/GPH4
    ID3/GPH3
    CLKRUN#/ID0/GPH0
    L80HLAT/BAO/GPE0
    VCC

    AVCC
    VSTBY_FSPI
    [9,54] LPC_LAD0 LAD0/GPM0(3) SMCLK0/GPB3 MBCLK [60]
    9 111 MBDATA MBCLK R220 4.7K_1%_2
    [9,54] LPC_LAD1 LAD1/GPM1(3) SMDAT0/GPB4 2ND_MBCLK MBDATA [60]
    8 SM BUS 115 2ND_MBCLK [10,43] +3VPCU
    [9,54] LPC_LAD2 LAD2/GPM2(3) SMCLK1/GPC1 2ND_MBDATA
    7 116 2ND_MBDATA [10,43] MBDATA R219 4.7K_1%_2
    [9,54] LPC_LAD3 PLTRST#_EC 22 LAD3/GPM3(3) SMDAT1/GPC2 117 EC_PECR_R
    R320 *Short_4 R218 33_1%_2 EC_PECI [2]
    [13,19,47,51,53,54] PLTRST# 13 LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) 118 LID#_EC_L R205 33_1%_2 +3V_S5
    [9] CLK_PCI_EC LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) LID1# [58]
    6
    [9,54] LPC_LFRAME# LFRAME#/GPM5(3) 180p/50V_4 2ND_MBCLK 3ND_MBCLK
    C340 R226 4.7K_1%_2 R264 4.7K_1%_2
    PROCHOT_EC 17
    LPCPD#/GPE6 2 1 2ND_MBDATA R225 4.7K_1%_2 3ND_MBDATA R257 4.7K_1%_2
    R228 *Short_2 126 PS/2 D3 AZ5725-01F.R7G
    [58] PRSNT#_R GA20/GPB5(3)
    5 85
    [9] SERIRQ SERIRQ/GPM6(3) PS2CLK0/CEC/TMB0/GPF0
    15 LPC 86
    [58,59] KB_BL_LED 23 ECSMI#/GPD4(3) PS2DAT0/TMB1/GPF1 89
    [13] SIO_EXT_SCI# ECSCI#/GPD3 PS2CLK2/GPF4 SYS_SHDN# [2,61,67]
    WRST# 14 GPIO 90
    4 WRST# PS2DAT2/GPF5 EC_FPBACK# [34]
    [9] SIO_RCIN# KBRST#/GPB6(3) TPCLK [59] DGPU_OPP#_PROCHOT# [21]
    R301 *Short_4 16
    [47,59] LAN_PWR

    C348 180p/50V_4
    PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
    IT8987E/CX PWM0/GPA0
    PWM1/GPA1
    24
    25
    R321
    R328
    *Short_4
    *Short_4
    TPDATA

    PWRLED#
    TBT_RST_EC#
    [59]

    [58]
    [41,43]
    R324 *Short_4
    Q56
    H_PROCHOT# [2,60,64]

    LQFP 28

    3
    R332 *Short_4 DDR4_SUSON_2V5 [63]
    R199 33_1%_2 113 PWM2/GPA2 29 DGPU_OPP# 2 PROCHOT_EC 2 Q55
    [34] TS_EN CRX0/GPC0 PWM3/GPA3 BATLED0# [58] *
    123 CIR 30 MAINON 2 ME2N70028D2-G
    [10] DNBSWON# CTX0/TMA0/GPB2(3) PWM4/GPA4 MAINON [61,62,63,67] N
    31 7
    C [34] PEN_RESET PWM5/GPA5 FAN2_PWM [55] 0 C
    R325 C711 R825

    1
    [2,10,41,62,64] SUSB# 0
    2
    [10] EC_PWROK
    80
    PWM Vinafix.com C402
    *0.1u/6.3V_2
    *100K_1%_2 K 0.1u/6.3V_2 100K_1%_2
    [34] PCH_BLON_EC DAC4/DCD0#/GPJ4(3)
    119 47
    180p/50V_4 DSR0#/GPG6 TACH0A/GPD6(3) FAN1_RPM [55]
    C394 33 48
    GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) FAN2_RPM [55]
    88
    R299 33_1%_2 81 PS2DAT1/RTS0#/GPF3 120 SUSON
    [34,58] LID2# DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) SYS_HWPG SUSON [62,63]
    [58] EC_LED_ON 87 124
    109 PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3)
    [12] ME_WR# TXD/SOUT0/GPB1
    108
    [50] AMP_MUTE#
    DGPU_OPP# 71
    RXD/SIN0/GPB0
    107 NBSWON#
    HWPG(KBC) +3V
    ADC5/DCD1#/GPI5(3) PWRSW/GPE4 NBSWON# [43,58]
    [60] ACIN 72 UART port 18
    ADC6/DSR1#/GPI6(3) RI1#/GPD0(3) SUSC# [10]
    73 WAKE UP 21 HWPG
    [60] TEMP_MBAT# 35 ADC7/CTS1#/GPI7(3) RI2#/GPD1 HWPG [2]
    [40] TBT_WAKE_EC# R349 *Short_4
    34 RTS1#/GPE5
    [50] PCBEEP_EC PWM7/RIG1#/GPA7
    GPG1 122 112
    3ND_MBDATA 95 DTR1#/SBUSY/GPG1/ID7 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST# [10]
    [56,58,71] 3ND_MBDATA R827
    3ND_MBCLK 94 CTX1/SOUT1/GPH2/SMDAT3/ID2 R339 33_1%_2 10K_1%_2
    [56,58,71] 3ND_MBCLK CRX1/SIN1/SMCLK3/GPH1/ID1 RF_EN [54]
    105 C409 180p/50V_4 ICMNT
    [12] PCH_SPI_CLK_EC 101 FSCK/GPG7 ICMNT [60] 2 *SDM20U30-7 HWPG
    D22 1
    [12] SPI_CS0#_UR_ME FSCE#/GPG3 10u/6.3V_4 [63] HWPG_2.5V
    102 EXTERNAL SERIAL FLASH ECAGND C400
    [12] PCH_SPI_SI_EC FMOSI/GPG4
    103 66 D21 1 2 *SDM20U30-7
    [12] PCH_SPI_SO_EC FMISO/GPG5 ADC0/GPI0(3) [63] HWPG_VDDR
    67 R335 *Short_2
    ADC1/GPI1(3) IDCHG [60]
    [58] MY16 56 68 D19 1 2 SDM20U30-7
    57 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) 69 [62] HWPG_1VS5
    [58] MY17 KSO17/SMISO/GPC5(3) ADC3/GPI3(3) VRON [64]
    32 70 R330 33_1%_2 D18 1 2 *SDM20U30-7
    [55] FAN1_PWM PWM6/SSCK/GPA6 ADC4/GPI4(3) TPD_EN [59] [61] SYS_HWPG
    S5_ON 100 C404 180p/50V_4 D20 1 2 *SDM20U30-7
    [61,62,67] S5_ON EC_HRST SSCE0#/GPG2 A/D D/A [67] HWPG_1.8VS5
    125 SPI ENABLE
    [43] EC_HRST SSCE1#/GPG0 76
    TACH2/GPJ0(3) FP_PWR_NTFY [59]
    [58] MY0 36 77 R317 *Short_2
    KSO0/PD0 GPJ1(3) USB_P2_ON [49]
    B
    [58] MY1 37 78 B
    KSO1/PD1 DAC2/TACH0B/GPJ2(3) PCH_PWROK [10]
    [58] MY2 38 79
    KSO2/PD2 DAC3/TACH1B/GPJ3(3) USB_CLT1 [48]
    [58] MY3 39
    40 KSO3/PD3
    [58] MY4 KSO4/PD4
    [58] MY5 41 R823 *0_5%_4
    KSO5/PD5 +3V_LDO_EC +3V_RTC +3V_RTC
    42 KBMX
    [58]
    [58]
    MY6
    MY7 43 KSO6/PD6 H: 135W DIS (internal)
    [58]
    [58]
    MY8
    MY9
    44
    45
    KSO7/PD7
    KSO8/ACK#
    KSO9/BUSY
    L: 90W UMA Reset SW (FSW) R818 *0_5%_4 +3VPCU

    [58] MY10 46
    51 KSO10/PE 2 HWID_ADP R1146 IV@10K_1%_2
    [58] MY11 KSO11/ERR# GPJ7
    KSI3/SLIN#
    KSI1/AFD#

    52 128
    KSI0/STB#

    KSI2/INIT#

    [58] MY12 CLOCK R227 33_1%_2 R817


    53 KSO12/SLCT GPJ6 TPD_INT# [13,59]
    *10K_1%_2
    VCORE

    [58] MY13 KSO13


    VSS#1

    VSS#2
    VSS#3
    VSS#4
    VSS#5

    54
    AVSS

    [58] MY14 C353 180p/50V_4 R806 R822


    KSI4
    KSI5
    KSI6
    KSI7

    55 KSO14 WRST#
    [58] MY15 KSO15 *100K_1%_2 100K_1%_2
    R819 *Short_4
    [60] BI
    58
    59
    60
    61
    62
    63
    64
    65

    27
    49
    91
    104

    75

    12

    U12 C705
    IT8987E/CX *0.1u/6.3V_2
    [58] MX0
    ECAGND

    3
    [58]
    [58]
    MX1
    MX2
    C390 AJ089870F02 IT8987E/CX 2 BI_GATE
    [58] MX3 0.1u/6.3V_2
    Add 12/01 Q54
    [58] MX4 Vgs = 1.5V
    GPG1 R773 *Short_2 C708 SW1

    1
    [58] MX5 CAPSLED [58] PJA138K

    3
    4

    6
    1 2 *0.1u/6.3V_2
    [58] MX6 5
    [58] MX7
    R1150 *10K_1%_2 change BI SW 8/11
    L4 BLM15AG121SN1D_0.5A +3V_LDO_EC 5 2
    Q53A Q53B
    TP51
    *PJX8838 *PJX8838
    TP50 6

    1
    1

    TME-533B-Q-T/R

    2
    1
    A
    +3VPCU
    SM BUS ARRANGEMENT TABLE D17
    CLK_PCI_EC
    A
    R820
    Reserve switch for test 100K_1%_2
    RB500V-40

    (MP remove)
    2

    R203 SM Bus 0 GPU / BATTERY / CHARGER


    *10K_1%_2 SW2 R295
    WRST# *22_5%_2
    *DEBUG@T3AL-23S-Q-T/R SM Bus 1 PCH / TBT3 PD
    NBSWON# 1 3

    C351 2 4
    C709 Quanta Computer Inc.
    SM Bus 2 1u/10V_2
    C393
    *DEBUG@0.1u/6.3V_2
    *10p/25V_2
    PROJECT : ZGI
    SM Bus 3 U3 RE-TIMER / THERMAL SENSOR Size Document Number Rev
    1A
    KBC IT8987
    Date: Tuesday, June 23, 2020 Sheet 57 of 77
    5 4 3 2 1
    5 4 3 2 1

    Keyboard Conn
    G Sensor+Stylus 58 Sensor Level shift

    1
    +3V_S5
    D66
    CN36 C96347
    AZ5725-01F.R7G
    S5

    1
    +SENSOR_POWER
    *180p/50V_4
    S5

    2
    31
    NBSWON#_R R1100 33_5%_2 NBSWON# +3V +SENSOR_POWER R277

    5
    1 NBSWON# [43,57,58]
    R213 *0.01_1%_6 4.7K_1%_2
    2 MX7 Q21A

    2
    3 MX6 MX7 [57] 3 4
    4 MX6 [57] Prevent ESD/EOS [13] ISH_I2C0_SDA SDA_GSENSOR_DB [34]
    MX5 Layout near
    5 MX4 MX5 [57] +3V_S5
    device 2N7002KDW
    6 MX3 MX4 [57]
    +3V_S5
    7 MX2 MX3 [57]
    CN37 R214 *Short_6 R267 *0_5%_4
    8 MX1 MX2 [57]
    9 MX0 MX1 [57]
    31

    1
    10 MY15 MX0 [57] NBSWON#_R +SENSOR_POWER

    FROM DB
    TO CPU ISH GPIO
    11 MY14 MY15 [57] 1 +3V_PEN +3V
    12 MY13 MY14 [57] 2 MX7 R276

    2
    13 MY12 MY13 [57] 3 MX6 R236 *Short_6 4.7K_1%_2
    14 MY11 MY12 [57] 4 MX5 Q21B

    2
    15 MY10 MY11 [57] 5 MX4 6 1
    16 MY10 [57] 6 [13] ISH_I2C0_SCL SCL_GSENSOR_DB [34]
    MY9 MX3
    17 MY8 MY9 [57] 7 MX2 2N7002KDW
    18 MY7 MY8 [57] 8 MX1 S5 +3V_S5
    19 MY6 MY7 [57] 9 MX0 R255 *0_5%_4
    20 MY5 MY6 [57] 10 MY15

    1
    21 MY4 MY5 [57] 11 MY14 +SENSOR_POWER
    22 MY3 MY4 [57] 12 MY13
    23 MY2 MY3 [57] 13 MY12 +3V +5V R275
    24 MY1 MY2 [57] 14 MY11

    2
    4.7K_1%_2
    25 MY0 MY1 [57] 15 MY10 Q18

    2
    26 MY17 MY0 [57] 16 MY9 3 1 INT_GSENSOR_DB [34]
    27 MY16 MY17 [57] 17 MY8 [13] ISH_GP0_GSENSOR
    28 K_LED MY16 [57] 18 MY7
    +3V C383 C384 C381 C382 2N7002K
    29 CAPSLED_R R2607 470_1%_2 19 MY6
    30 CAPSLED [57] 20 MY5 0.1u/6.3V_2 *0.22u/6.3V_2 0.1u/6.3V_2 *0.22u/6.3V_2 R256 *0_5%_4
    D 32 21 MY4 D
    22 MY3
    23 MY2
    14@51643-0300N-V01 24 MY1 +SENSOR_POWER
    25 MY0 +SENSOR_POWER
    For 14"
    26 MY17 For EC detect
    27 MY16
    LDO S5

    5
    28 K_LED
    29 CAPSLED Q22A
    30 3 4
    [57] SENSOR_MODE1 SENSOR_MODE1_PCH [13]
    32 C380 C379 C377
    0.1u/6.3V_2 0.1u/6.3V_2 10u/6.3V_4 2N7002KDW

    From PCH
    15@51643-0300N-V01
    For 15"

    TO EC
    +SENSOR_POWER

    2
    Q23B
    6 1
    [57] SENSOR_MODE2 SENSOR_MODE2_PCH [13]
    2N7002KDW

    LED + Hall Sensor


    Keyboard Backlight Conn +3VPCU +3V

    CN2

    10
    C298 C296 C291 C294
    5

    8 +3VPCU
    7 PWRLED#_C 0.1u/6.3V_2 *0.22u/6.3V_2 0.1u/6.3V_2 *0.22u/6.3V_2
    1 6 BATLED0#_C
    2 5
    3 4
    +5V_KB 4 3 LID1# [57]
    2 LID2# [34,57]
    CN15
    1
    6

    C723 51653-00401-V01
    C722 9 51619-0080N-001 R139 *100K_1%_2
    10u/6.3V_4 0.1u/6.3V_2
    EC_LED_ON
    EC_LED_ON [57]

    5
    Q15A
    *PJX8838
    3 4
    PWRLED#_C R156 *Short_2
    PWRLED# [57]
    +5V +5V BATLED0#_C R155 *Short_2
    BATLED0# [57]
    confirm LID1# is for panel on/off 6 1
    C738 2.2u/10V_4
    R891 Q15B
    *PJX8838
    1

    2
    10K_1%_2 EC_LED_ON
    Q58
    2

    DMP2130L-7
    3

    Q61
    2 20mil +5V_KB
    [57,59] KB_BL_LED
    DDTC144EUA-7-F

    C726 C732
    1

    4.7u/6.3V_4 0.01u/50V_4

    Finger Button Finger print(reserve)


    C C

    +3VPCU
    TP128 USBP7+ [9]
    TP129 USBP7- [9]

    R269
    10K_1%_2
    NTC302-BA1G-A160T

    NBSWON# [43,57,58]
    2

    4
    SW3

    3
    1

    NBSWON# D5 1 2 *PESD5V0F1BSF

    To I/O DB (Audio Combo jack/Card Reader/LAN/USB3*2+BC 1.2)

    51695-0500M-001
    52 +USBPWR_BC_PORT +USBPWR_2 LANVCC

    50 ADOGND
    RING2 [50] CN6
    49
    48 HP-L2_R
    HP_JD#
    [50]
    [50]
    Audio 9
    47
    HP-R2_R [50] +USBPWR_BC_PORT C301 C300 C312 C311 C321 C322
    46 1
    SLEEVE [50] 0.1u/16V_4 10u/6.3V_4 0.1u/16V_4 10u/6.3V_4 0.1u/16V_4 10u/6.3V_4
    45 2
    44 ADOGND 3 +USBPWR_2
    43 PCIE_CLKREQ_CR# [11] 4
    42 5 LANVCC
    41 PCIE_TXP16_CR [11] 6 +3V
    40 PCIE_TXN16_CR [11] 7 +3V_U3_2
    39 Card Reader 8 +1.2V_U3_2
    38 PCIE_RXP16_CR
    PCIE_RXN16_CR
    [11]
    [11]
    10 Card Reader +3V_U3_2
    37 +3V
    50224-00801-001
    36
    35 CLK_PCIE_CRP [11]
    34 CLK_PCIE_CRN [11]
    33
    PCIE_RXP13_LAN [11] C334 C335
    32
    PCIE_RXN13_LAN [11] C329 C330 0.1u/16V_4 10u/6.3V_4
    31
    0.1u/16V_4 10u/6.3V_4
    30
    29 PCIE_TXP13_LAN [11]
    28 PCIE_TXN13_LAN [11]
    27
    CLK_PCIE_LANP [11]
    LAN
    26
    25 CLK_PCIE_LANN [11]
    24
    23 PCIE_REQ_LAN#_R [47]
    22 PRSNT#_R [57]
    21 ALL_PCIE_RST#_C [47]
    20 3ND_MBCLK [56,57,71]
    19 3ND_MBDATA [56,57,71]
    18
    B 17 USB30_TX1+ [9] Stylus Charger(15" only) B
    16 USB30_TX1- [9]
    15
    14 USB30_RX1+ [9]
    13 USB30_RX1- [9]
    12 USB3*2 + BC 1.2
    11 USB30_TX2+ [9]
    10 USB30_TX2- [9] CN30
    9
    8 USB30_RX2+ [9] 4
    7 USB30_RX2- [9] 2 +3V
    6 1
    3
    5 USBP1-_C [48]
    4 USBP1+_C [48]
    50224-00201-001
    3
    2 USBP2- [9]
    1 USBP2+ [9]
    51
    CN12

    USBP2- D24 1 2 PESD5V0H1BSF


    USBP2+ D25 1 2 PESD5V0H1BSF

    (15" only)
    50208-00401-V02
    6

    4 SMB_ME0_DAT_C [47]
    3 SMB_ME0_CLK_C [47]
    2 LAN_DIS#_R [47]
    1 LANWAKE#_R [47]
    5

    CN47

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    Keyboard / IO/B
    Date: Tuesday, June 23, 2020 Sheet 58 of 77
    5 4 3 2 1
    5 4 3 2 1

    TOUCH PAD
    +TPVDD

    From PCH S5
    +TPVDD

    S5 TO Touch Pad
    59

    5
    3 4 TP_I2C_SCL
    [13] I2C0_SCL
    C517 C516
    0.22u/6.3V_2 0.1u/6.3V_2 Q36A *SSM6N43FU

    9
    D D
    R463 *Short_4 +TPVDD
    TPCLK 1
    [57] TPCLK 2
    TPDATA R458 *Short_6
    [57] TPDATA 3 +TPVDD
    TP_I2C_SDA 4
    5 50mil

    2
    TP_I2C_SCL R459 *Short_6
    6 +3V_S5
    TPD_INT#_R
    7 6 1 TP_I2C_SDA
    [57] TPD_EN 8 [13] I2C0_SDA
    C518
    Q36B *SSM6N43FU 0.1u/6.3V_2

    10
    CN23
    51653-0080N-001 R464 *Short_4
    +TPVDD

    TPD_INT#_R R497 *10K_1%_2


    +TPVDD
    TP_I2C_SCL R472 *2.2K_5%_2 TP62 TP63 TP64

    2
    TP_I2C_SDA R473 *2.2K_5%_2
    TPD_INT#_R
    Vinafix.com
    3 1
    [13,57] TPD_INT#
    TP_I2C_SDA Q27 *2N7002K
    TPDATA R470 10K_1%_2 TP_I2C_SCL
    C TPD_INT#_R C
    R465 *Short_4
    TPCLK R471 10K_1%_2

    Discharge +VIN LANVCC

    POA LIKE R480 R441


    +3VPCU +3V_POA_PWR 1M_5%_2 22_5%_8

    R503 *Short_6

    C520 C524 C523

    3
    *22u/6.3V_6 10u/6.3V_4 0.1u/6.3V_2 R481
    2 Q32 1M_5%_2 2 Q30
    [47,57] LAN_PWR
    DDTC144EUA-7-F

    1
    1
    B ME2N70028D2-G B
    CN26 R482
    100K_1%_2
    9

    +3V_POA_PWR 1 +VIN +VIN


    R1001 *Short_4 USBP3+_R +TPVDD
    [9] USBP3+ 2
    R1004 *Short_4 USBP3-_R +5V_KB
    [9] USBP3- 3
    4
    TP67 5 R477 R440 R483
    [57] FP_PWR_NTFY FP_BTN_IGN 6 *1M_5%_2 *22_5%_8 1M_5%_2 R442
    7 22_5%_8
    TP66 8
    10

    FP_PWR_NTFY:Same as S0 status, to notify FP keep data or not 51530-00801-V01

    3
    FP_BTN_IGN:While Hi notify EC to keep power while FP is working

    3
    R478 R484
    PTP_PWR_EN# 2

    3
    1 3 *1M_5%_2 2 Q33 1M_5%_2
    [57,58] KB_BL_LED
    +3V_POA_PWR D15 1 2 AZ5725-01F.R7G Q29 2 Q31
    Q28 *2N7002KW DDTC144EUA-7-F
    *DDTC144EUA-7-F R466

    1
    USBP3-_R D51 1 2 PESD5V0F1BSF 100K_1%_2

    1
    R479 ME2N70028D2-G
    2

    *100K_1%_2
    A USBP3+_R A
    D52 1 2 PESD5V0F1BSF

    FP_PWR_NTFY D50 1 2 PESD5V0F1BSF


    +3V_S5 Quanta Computer Inc.
    FP_BTN_IGN D53 1 2 PESD5V0F1BSF
    PROJECT : ZGI
    Size Document Number Rev
    1A
    Touch / POA
    Date: Tuesday, June 23, 2020 Sheet 59 of 77
    5 4 3 2 1
    5 4 3 2 1

    ADP(MAX)=90W/135W
    PJ18
    VA
    PQ52
    AONS32310
    PQ53
    AONS32310 PR445
    0.005_1%_2037
    +VIN PQ54
    EMB02N03HR
    60

    D
    3 3 3

    S
    PIN(+)
    11 NC#1 1 5 2 2 5 5 2
    12 NC#2 1 1 1
    5 Spring(-)#1 2

    G
    Shield1

    G
    6 PC318 PC317 PC319 PC316 PC315
    7 Shield2 Spring(-)#2 3 PD6 PC164 PC165 PR257 *Short_0201 24780_ACN PC337 PC332

    4
    8 Shield3 0.1u/50V_4 2200p/50V_4 0.1u/50V_4 1000p/50V_4 680p/50V_4 1000p/50V_4 0.047u/50V_6 PC312 PC342 PC326
    9 Shield4 P4SMAFJ20A 1000p/50V_4 680p/50V_4 0.1u/50V_4 0.1u/50V_4 2200p/50V_4 PC343
    10 Shield5 PR258 *Short_0201 24780_ACP *0.01u/50V_4
    Detect

    2
    Shield6 4
    D ADP_ID [60] D

    2DC3207-001111F

    PR442 PR443
    4.02K_1%_4 4.02K_1%_4
    PR453
    *Short_0603

    D1A 0608
    VA
    BAT-V 24780_ACP
    PR175
    *Short_0201
    PR176 24780_ACDET 24780_ACN
    1M_5%_2

    1
    PR454
    D1A 0608 PC339 PC329 PC340 10_1%_6
    3

    PD7 0.1u/50V_4 0.1u/50V_4 0.1u/50V_4

    24780_CMSRC
    2 BAT54CW
    [60] ADP_ID PQ20

    3
    2N7002KW
    PR177
    1

    1
    1M_5%_2 PU28
    PR438 3 18 24780_BATDRV

    ACN
    ACP
    20_1%_6 CMSRC BATDRV
    17 24780_BATSRC +VIN
    BATSRC
    24780_ACDRV 4 REGN6V
    PR441 ACDRV
    REGN6V 866K_1%_4 24780_VCC 28
    VCC 24 PC306
    REGN 2.2u/10V_4
    PC324 PC341 PC310
    0.47u/25V_4 2200p/50V_4 10u/25V_8
    C
    PR449 PR423 D1A 0608 C
    PR450 137K_1%_4 *Short_0603
    100K_1%_2 24780_ACDET 6 25 24780_BST PQ49
    ACDET BTST

    5
    AONR32320C
    PR448 *Short_0201 5 PC314 D
    [57] ACIN ACOK 0.047u/50V_4
    MBDATA PR422 *Short_0201 11
    SDA HIDRV
    26 24780_DH 4 G PD=1W
    S
    PR452 MBCLK PR418 *Short_0201 12 PR451 BAT-V
    SCL

    1
    2
    3
    100K_1%_2 PL16 0.005_1%_2037
    ICMNT PR439 *Short_0201 7 6.8uH_7x7x3
    V_ PMON=K*Total*R [57] ICMNT IADP
    PHASE
    27 24780_LX 1 2
    D/C# PR434 *Short_0201 8
    1.2V=1uA*Total*R [57] IDCHG
    PR433 *Short_0201 9
    IDCHG
    PQ44
    PMON
    PMON

    5
    [64] PMON AONR36326C PR391
    D *4.7_5%_6 PC349 PC166 PC167 PC168 PC344
    PC323 PC327 PC336 D1A 0608 PR455 PR456
    PR446 100p/50V_2 100p/50V_2 100p/50V_2 23 24780_DL 4 G *Short_0201 *Short_0201 2200p/50V_4 22u/25V_8 22u/25V_8 *22u/25V_8 *22u/25V_8
    *22.6K_1%_2 LODRV S
    CS32262FB15RES CHIP 22.6K 1/16W +-1%(0402) for 180W/230W

    1
    2
    3
    24780_BM# 16 PC290
    +3VPCU TB_STAT 24780_SRP
    PR400 10K_1%_2 PR405 0.1u/25V_2 PC292
    PC347 24780_CMPOUT 14 *Short_0201 *680p/50V_6
    0.1u/50V_4 PR402 *10K_1%_2 CMPOUT 20 24780_SRP 24780_SRN
    24780_ILIM 21 SRP
    PR410 ILIM
    PC348 316K_1%_2 24780_CMPIN 13 CMPIN PR404 PC297
    REGN MAX voltage 6.5V

    PROCHOT
    *100p/50V_4 *Short_0201

    BATPRES
    0.1u/25V_2
    24780_SRN

    GND#10
    GND#11
    PJ21 19
    V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr

    GND#8
    GND#9

    GND#1
    GND#2
    GND#3
    GND#4
    GND#5
    GND#6
    GND#7
    50458-01001-V02 PR401 PC300 PR409 SRN
    100K_1%_2 PC289
    BAT-V 0.01u/50V_4 100K_1%_2 D1A 0608 0.1u/25V_2 =0.793V for 7.93A current limit
    BQ24780SRUYR
    12

    35
    36
    37
    38
    10

    15

    22
    29
    30
    31
    32
    33
    34
    BI
    BI [57] ILIM=0.793V
    10 PR459 *0_5%_2 Rsr = 0.01ohm
    9 +3VPCU
    B 8 B
    7 TEMP_MBAT#_Conn PR460 100_5%_2 TEMP_MBAT#
    6 MBCLK_Conn TEMP_MBAT# [57]
    5 MBDATA_Conn PR390 PR403
    4
    +3VPCU *Short_0201 *0_5%_2
    3 PR421 PR250
    2 PR461 *Short_0201
    1

    1
    1M_5%_2 10K_1%_2 H_PROCHOT# [2,57,64]
    11

    TEMP_MBAT#
    D1A 0608 2 PQ45
    PR458 PR457 PJA3411 D1A 0608
    100_5%_2 100_5%_2

    3
    1. 暫暫暫 (same as ZGI) 2
    2. Double Check BATT Connector with ME PQ27
    2N7002KW
    MBCLK [57] PR420

    1
    100K_1%_2
    MBDATA [57]
    H_PROCHOT#_R
    1

    PC350 PC346
    *47p/50V_4 *47p/50V_4 +3VPCU
    PR432
    2

    24780_CMPOUT

    PD5 PD4 *0_5%_2


    PDZ5.6B PDZ5.6B
    PR431 PR256
    PJ5 *Short_0201

    1
    50458-00801-V02 BAT-V 10K_1%_2 GPU_THROTTING# [21]
    BI 2 PQ50
    10

    A
    PJA3411 D1A 0608 A
    8

    3
    7

    3
    6 TEMP_MBAT#_Conn 2
    5 MBCLK_Conn PQ28
    4 MBDATA_Conn 2N7002KW
    3 PR430

    1
    2
    1 100K_1%_2

    Quanta Computer Inc.


    9

    PROJECT : ZGI
    Size Document Number Rev
    1A
    Charger (BQ24780S)
    Date: Tuesday, June 23, 2020 Sheet 60 of 77
    5 4 3 2 1
    5 4 3 2 1

    +VIN
    +5VPCU
    +3VPCU
    [34,59,60,62,63,64,65,66,67,70,72]

    SYS_SHDN#
    3V_LDO
    [43,48,50,62,72]
    [10,34,42,43,56,57,58,59,60,67,72]
    [2,57,67]
    [67,73]
    61
    PR243 D1A 0608
    *Short_0603

    +3VPCU VL
    PJ11 3V_LDO PJ20
    [57] SYS_HWPG

    +VIN +VIN
    SYS_SHDN# D1A 0608 PR239
    10K_1%_2
    + *short_0612 PR246 *short_0612
    D PC345 PC279 PC280 *Short_0201 PC162 PC328 D
    *33u/25V_D7H3 10u/25V_8 2200p/50V_4 PR235 PC146 PC149 PC148 2200p/50V_4 10u/25V_8
    *Short_0201 PR247
    10u/6.3V_4 10u/6.3V_4

    51225_VIN
    10K_1%_2 0.1u/50V_4

    +5VPCU
    D1A 0608
    +5VPCU +3VPCU
    5 Volt +/- 5% +3VPCU
    TDC : 11.16A PR245
    3.3 Volt +/- 5%

    13

    12
    TDC : 9.2A

    3
    PQ42 100K_1%_2 PQ47
    PJ12 PEAK : 15A AONY36356 AONY36356 PJ17
    PEAK : 12.27A

    VREG5

    VREG3
    VIN
    2

    2
    *short_0612 OCP : 22A *short_0612
    7 6 SYS_SHDN#
    OCP : 21A

    D1

    D1
    D1
    D1

    D1
    D1
    Width : 560mil PGOOD EN2
    51225_EN1 20
    EN1 DRVH2
    10 51225_DH2 Width : 520mil
    PR249 PC151
    PL13 G1 1 51225_DH1 16 9 51225_VBST2 1 G1 PL17
    2.2uH_10x10x3 PC145 PR234 DRVH1 VBST2 1.5uH_7x7x3
    1 2 51225_SW1 9 S1/D2 51225_VBST1 17 PU11 8 51225_SW2 1_1%_6 0.1u/50V_4 S1/D2 951225_SW2 1 2
    VBST1 TPS51225RUKR SW2
    0.1u/50V_4 1_1%_6 51225_SW1 18 11 51225_DL2
    G2 8 SW1 DRVL2 8 G2
    51225_DL1 15 4 51225_FB2
    PR375 PR376 DRVL1 VFB2 PR252 PR428
    *Short_0201 *Short_0201 PR244 51225_FB1 2 21 *4.7_5%_6 *Short_0201

    S2
    S2
    S2

    S2
    S2
    S2
    + *4.7_5%_6 VFB1 GND#1 +
    PC284 PC288 14 22 PC311 PC309

    GND#6

    GND#5

    GND#4

    GND#3
    5
    6
    7

    7
    6
    5
    VO1 GND#2

    VCLK
    150u/6.3V_3528H1.9 0.1u/50V_4 0.1u/50V_4 150u/6.3V_3528H1.9

    CS1

    CS2
    Rds(on)=4.7m ohm PC156
    PR238
    Rds(on)=4.7m ohm *680p/50V_6

    19

    26

    25

    24

    23
    15.8K_1%_2 PC150 PR241
    *680p/50V_6 6.49K_1%_2

    51225_CS1

    51225_CS2
    PR237
    10K_1%_2
    PR233
    Vinafix.com PR242
    C *Short_0603 C
    OCP:21A (For BAT 4S1P) 9.31K_1%_2
    OCP:22A (For BAT 4S1P) D1A 0608 L(ripple current)
    L(ripple current) PR236 PR248 =(12-3.3)*3.3/(1u*0.355M*12)
    =(12-5)*5/(2.2u*0.3M*12) 80.6K_1%_2 78.7K_1%_2 ~3.0633A
    =4.419A Iocp=21-(3.0633/2)=19.468A
    Iocp=22-(4.419/2)=19.79A Vth=(19.468A*4.7mOhm)+1mV=92.5mV
    Vth=(19.79A*4.7mOhm)+1mV=94.01mV R(Ilim)=(92.5mV*8)/10uA
    R(Ilim)=(94.01mV*8)/10uA Power auto recovery =74K
    ~75.21K D1A 0608
    3V_LDO PR259
    *Short_0603 +3V_LDO_EC
    +3VPCU
    +3V_LDO_EC
    +3V_LDO_EC [57]

    PR260
    *0_5%_6

    +5V_S5 [49,63,64,65,66,68,70,72]
    +5V [34,37,50,55,58,67,73]
    +5V_S5_TYPEC [43]
    +3V_S5 [13,14,23,42,43,47,51,54,57,58,59,63,68,73]
    +5VPCU +5VPCU +3V [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,62,63,64,67,68,69,70,71,72]

    TDC : 1.35A TDC : 2.16A


    PEAK : 1.8A PEAK : 2.9A
    Width : 80mil Width : 100mil
    PC191 PC190 +3VPCU +3VPCU
    1u/25V_4 1u/25V_4
    1

    +5V_S5 PR278 PR284 +5V TDC : 3.32A TDC : 4.46A


    VIN1

    VIN2

    *Short_0805 *Short_0805 PEAK : 4.42A PEAK : 5.95A


    B Width : 160mil Width : 200mil B
    PR287 PC201 PC200
    PC180 PC189 13 8 PC182 PC183 *Short_0805 1u/25V_4 1u/25V_4 C1A 0612

    6
    10u/6.3V_4 0.1u/50V_4 VOUT1 OUT2 0.1u/50V_4 10u/6.3V_4
    PU15 +3V_S5 PR304 +3V

    VIN1

    VIN2
    TPS22976DPUR *Short_0805
    +5VPCU 4 11
    VBIAS GND1
    PR292 15
    *Short_0402 GND2 PR303 PC204 PC205 13 8 PC210 PC209
    PC195 0.1u/50V_4 *Short_0805 10u/6.3V_4 0.1u/50V_4 VOUT1 OUT2 0.1u/50V_4 10u/6.3V_4
    S5_ON 3 5 MAINON PU16
    [57,62,67] S5_ON
    CT1

    CT2

    ON1 ON2 MAINON [57,62,63,67] TPS22976DPUR


    PR291 PR290 4 11
    +5VPCU VBIAS GND1
    *Short_0201 PC196 PC194 *Short_0201
    12

    10

    *0.1u/50V_4 *0.1u/50V_4 PR298 15


    *Short_0402 GND2
    D1A 0608 PC185 PC184
    D1A 0608 PC198 0.1u/50V_4
    S5_ON 3 5 MAINON

    CT1

    CT2
    1000p/50V_2 1000p/50V_2 ON1 ON2
    PR296 PR297
    *Short_0201 PC197 12 PC199 *Short_0201

    10
    *0.1u/50V_4 *0.1u/50V_4
    D1A 0608 PC207 PC211
    D1A 0608

    1000p/50V_2 1000p/50V_2
    +5VPCU

    TDC :6A +3VPCU

    PEAK : 8A +VIN +3V_S5


    Width : 240mil PC206 PC208
    1u/25V_4 1u/25V_4
    1

    PR293 PR294
    +5V_S5_TYPEC

    3
    PR300 *1M_5%_6 *22_5%_8
    VIN1

    VIN2

    *Short_0805 PQ55
    +5V_S5_TYPEC_R +5V_S5_TYPEC_R SUSD 2 AOSS32334C
    [62] SUSD
    PR299
    *Short_0805 PC203 PC202 13 8
    TDC : 0.08A
    3

    A 10u/6.3V_4 0.1u/50V_4 VOUT1 OUT2 A

    1
    PU17
    S5_ON
    PEAK : 0.1A
    3

    TPS22976DPUR 2 PR295
    +5VPCU
    4
    VBIAS GND1
    11 *1M_5%_6 2 +3V_SUS Width : 20mil
    PR184 15 PQ40 PQ41
    1

    *Short_0402 GND2 *DDTC144EUA-7-F *2N7002K


    1

    PC116 0.1u/50V_4
    S5_ON S5_ON_R 3 5 S5_ON_R
    CT1

    CT2

    ON1 ON2
    PR305
    *Short_0201 PC115
    12

    10

    *0.1u/50V_4
    D1A 0608 PC114 PC113
    Quanta Computer Inc.
    1000p/50V_2 1000p/50V_2 PROJECT : ZGI
    Size Document Number Rev
    1A
    SYSTEM 5V/3V (TPS51225R)
    Date: Tuesday, June 23, 2020 Sheet 61 of 77
    5 4 3 2 1
    5 4 3 2 1

    +VIN [34,59,60,61,63,64,65,66,67,70,72]
    +1V_S5
    +5VPCU
    +3V
    +1V_SUS
    +VCCIO
    [10,11,14]
    [43,48,50,61,72]
    [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,63,64,67,68,69,70,71,72]
    [6]
    [2,3,6,64,67]
    PJ19
    62
    *short_0612

    +1V_S5_VIN
    +VIN
    D +5VPCU D

    +3V PC333 PC325


    2200p/50V_4 10u/25V_8
    PC153
    1u/10V_4
    PR425 PQ46
    AONY36354

    2
    100K_1%_2 PU27 RT8237CZQW_2 D1A 0608

    D1
    VCC

    D1
    D1
    51211V_DRVH Isat=25A
    1 9 PR424 PC304 +1V_S5
    [57] HWPG_1VS5 PGOOD UGATE *Short_0603 0.1u/50V_4 PJ16
    51211V_EN 3 10 51211V_VBST 1 G1 PL15 *short_0612
    [57,61,67] S5_ON EN BOOT
    PR407 1K_1%_2 0.68uH/15.5A_7x7x3
    51211V_TRIP 2 8 51211V_SW S1/D2 951211V_SW 1 2 +1V_S5_SRC
    PR417 57.6K_1%_2 CS PHASE
    51211V_TST 5 6 51211V_DRVL
    PC303 PR399 470K_5%_2 RF LGATE 8 G2
    0.47u/6.3V_2 11 PR251
    GND#1
    *4.7_5%_6 + +1V_S5
    PR392 PC296 PC308 1.0 Volt +/- 5%

    S2
    S2
    S2
    *Short_0201 0.1u/50V_4 330u/2V_7343H1.9

    FB
    C
    TDC : 14.36A C

    7
    6
    5
    PC155
    PEAK : 19A

    4
    *680p/50V_6
    OCP : 23A

    51211V_FB
    OCP=23A RDSon=3.5mohm Width : 600mil
    L ripple current
    =(19-1)*1/(0.68u*290k*19)
    =4.804A PR395
    Vtrip=23-(4.804/2)*3.5mohm 4.75K_1%_2 VFB=0.7V
    =72.093mV
    Rlimit=72.093mV/10uA*8=57.67Kohm
    PR263
    PR408 *0_5%_2
    10K_1%_2 Vo=0.7*(1+R1/R2)=1.033V [63,67] MAIND
    +1V_S5
    [11] CPU_VCCIO_PWR_GATE
    PR264
    *0_5%_2

    +VIN +1V_SUS +3V_SUS

    5
    +VIN +1V_S5 +VIN
    B +VIN D B
    G
    PR268 PR266 PR159 4 PQ31
    1M_5%_6 22_5%_8 22_5%_8 PR267 PR91 S AONS32314
    1M_5%_6 PR89 1M_5%_6

    1
    2
    3
    +3V_DEEP_SUS 1M_5%_6

    3
    PQ33
    SUSD 2 AOSS32334C PC64 0.1u/6.3V_2
    3

    +VCCIO
    PC170

    PR270

    3
    5

    3
    2
    3

    2 PR265
    [57,63] SUSON 2 2
    3

    1M_5%_6 1

    1
    2 [57,61,63,67] MAINON
    4 2 PR90 TDC : 4.8A
    PQ32 PQ35 PQ34 2 1M_5%_6 PQ9 PEAK : 6.4A
    *2200p/50V_4

    TDC : 0.56A

    1
    [2,10,41,57,64] SUSB#
    1

    DDTC144EUA-7-F 2N7002K 2N7002K 2N7002K


    1

    PEAK : 0.75A Width : 200mil


    *1M_5%_6

    PQ30 PU5 PQ10


    1

    +1V_SUS

    1
    2N7002K MC74VHC1G08DFT2G DDTC144EUA-7-F
    Width : 40mil
    SUSD [61]

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    +1V_S5 (RT8237CZQW_2)
    Date: Tuesday, June 23, 2020 Sheet 62 of 77
    5 4 3 2 1
    5 4 3 2 1

    +3V
    +VIN
    +1.2VSUS
    DDR_VTT
    +5V_S5
    +3V
    [34,59,60,61,62,64,65,66,67,70,72]
    [2,6,10,14,17,18,48,72]
    [17,18]
    [49,61,64,65,66,68,70,72]
    [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,62,64,67,68,69,70,71,72]
    63
    PR413

    100K_1%_2

    PR414 *Short_0201
    [57] HWPG_VDDR
    HWPG_2.5V PR427 *0_5%_2
    PR426 *Short_0201
    [57,62] SUSON
    D D
    PC313
    OCP=16A
    D1A 0608
    *0.1u/50V_4
    +VIN
    PR436 PR411 +1.2VSUS
    *Short_0201 475K_1%_2 PJ8 1.2 Volt +/- 5%

    1P35V_PGOOD
    PR419 *short_0612

    1P35V_CS
    [57,61,62,67] MAINON
    499K_1%_4 TDC :10.07A

    1P35V_S3

    1P35V_S5
    1P35V_TON +1.2VSUS_VIN
    PC321
    PEAK : 13.42A
    *0.1u/50V_4 Fsw=500KHz OCP : 16A
    PC163 PC322 PC331 PC160 PC161 Width : 600mil
    0.1u/50V_4 10u/25V_8 10u/25V_8 2200p/50V_4 0.1u/50V_4

    10

    13
    7

    9
    TDC : 0.38A

    S3

    S5

    PGOOD

    TON
    CS
    PEAK : 0.5A DDR_VTT PQ51
    AONR32320C
    +1.2VSUS

    Width : 20mil C1A 0428

    5
    20
    VTT 17 1P35V_UGATE D
    2 UGATE PJ7
    PC334 VTTSNS PR429 PC307 4 G
    Isat=22A *short_0612
    10u/6.3V_4 18 1P35V_BOOT S
    TDC : 0.38A 1 BOOT PL18
    VTTGND

    1
    2
    3
    PEAK : 0.5A +VDDQ
    PR447 PU29 16 1P35V_PHASE
    2.2_5%_6 0.1u/50V_4 1uH/11A_7x7x3
    1 2 +1.2VSUS_TEMP
    Width : 20mil 100_5%_2 RT8231BGQW PHASE

    5
    4 15 1P35V_LGATE +
    VTTREF LGATE PR253 PC320 PC159 PC154 PC152 PC158 PC302
    D
    19 12 1P35V_VDD *4.7_5%_6 0.1u/50V_4 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 *220u/2V_7343H1.0
    VLDOIN VDD +5V_S5
    PC338 PC335 4 G PR255
    0.1u/50V_4 PC330 PR412 S *Short_0201
    0.047u/25V_4
    *Short_0402

    1
    2
    3
    *10u/6.3V_6 PC305 PQ48

    PGND

    VDDQ
    1u/6.3V_2 D1A 0608 AONR36326C PC157
    GND

    PAD
    VID
    *680p/50V_6

    FB
    C +1.2VSUS_TEMP C
    3

    11

    14

    21
    PR254 D1A 0608 PR444
    *0_5%_2 *Short_0201
    1P35V_S3 1P35V_S5
    1P35V_VID

    1P35V_FB Rds(on)=15.9m ohm


    PR437 PR415
    *0_5%_2 *Short_0201 1P35V_VDDQ
    1P35V_S3
    [2] DDR_VTTT_PG_CTRL +5V_S5 R1
    PR440
    PR416 *0_5%_2 +1.2VSUS

    8.2K_1%_2
    VID Ref. Voltage PR435 Vo=0.675*(1+R1/R2)=1.2285V
    R2 10K_1%_2
    High 0.675V

    3
    PQ29
    Low 0.75V MAIND 2 AOSS32334C
    [62,67] MAIND

    S3 S5 VDDQ VTTREF VTT

    1
    OCP=16A
    L ripple current S0 1 1 ON ON ON +1.2V
    =(19-1.2)*1.2/(1u*500k*19)
    =2.248A S3 (mainon off) 0 1 ON ON OFF +1.2V [35,37,38,67]
    Vtrip=16-(2.248/2)*15.9mohm DDR=1.2V
    =236.525mV R1=7.87K/F_4
    R2=10K/F_4 S4/S5 0 0 OFF OFF OFF TDC : 1.2A
    Rlimit=236.525mV/5uA*10=473.05Kohm
    PEAK : 1.5A
    B B
    Width : 60mil

    +2.5VSUS Power Rail For DDR4


    +3V_S5 [13,14,23,42,43,47,51,54,57,58,59,61,68,73]
    +2.5VSUS [17,18]
    +2.5VSUS
    PR394
    *Short_0603
    2.5Volt +/- 5%
    +3V_S5
    +3V_S5
    TDC : 0.22A
    PC301
    PEAK : 0.29A
    Width : 20mil
    D1A 0608 10u/6.3V_4
    PR388
    100K_1%_2
    +2.5VSUS
    4

    PR389 PL14
    PJ15
    *Short_0201 2.2uH_2.5x2.0x1.2
    VIN

    [57] HWPG_2.5V 5 3 G5719LX2.5V1 2


    PG LX
    PR383 PR385 PU26 *Short_0805
    *0_5%_2 *Short_0201 G5719CTB1U
    SUSON 1 2
    EN GND PR386 PC287 PC286 PC291
    VFB

    PR384 *Short_0201 10u/6.3V_6 *10u/6.3V_6 0.1u/50V_4


    *Short_0201 PC299
    *0.47u/6.3V_4
    [57] DDR4_SUSON_2V5
    6

    PR382
    47.5K_1%_2
    D1A 0608
    A R1 A
    PR381
    R2 15K_1%_2
    Vo=(0.6(R1+R2)/R2)
    =2.5V

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    DDR4_+1.2VSUS (RT8231BGQW)
    Date: Tuesday, June 23, 2020 Sheet 63 of 77
    5 4 3 2 1
    5 4 3 2 1

    +VCCST
    +VIN
    +VCC_CORE
    +VCC_GT
    +VCC_SA
    +5V_S5
    [34,59,60,61,62,63,65,66,67,70,72]
    [7,65]
    [5,66]
    [6,66]
    [49,61,63,65,66,68,70,72]
    Place close to VCCSA Inductor PR368
    100K_NTC_4_1%
    2 1
    PR137
    14K_1%_2
    PR118
    7.5K_1%_4 PR138
    D1A 0608
    64
    +3V [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,62,63,67,68,69,70,71,72] SW _1PH [66] *Short_0201
    +VCCST [2,6]
    +VCCIO [2,3,6,62,67]
    PC82 0.015u/25V_4

    For CML-H82 (45W, Baeline) SKU PC86

    PR108
    4700p/50V_4

    10_1%_4
    PR110
    100_1%_4
    PR111
    *110_1%_4
    PR109
    45.3_1%_4
    PC85
    1000p/50V_4
    [66] CSN_1PH
    PC94 D1A 0622
    1000p/50V_2 PC81 2200p/50V_4
    VR_SVID_DATA PR123 *0_5%_2
    D1A 0608 +3V VR_SVID_ALERT#
    VR_SVID_CLK +3V
    D PR134 100_1%_2 PR135 PR112 PR105 14.3K_1%_4 PC76 PR104 D
    +VCC_SA
    *Short_0201 2.61K_1%_4 470p/50V_4 41.2K_1%_4 PR136
    10K_1%_2 PC99 0.1u/6.3V_2
    [6] VCCSA_VCCSENSE
    PC96 1000p/50V_2
    PC87 D1A 0608

    5
    1000p/50V_4 PR141
    1K_1%_2 PR150 PC88 PR139 *Short_0201 1
    IMVP_PW RGD [2,10] VRON [57]
    1K_1%_2 0.01u/50V_4 4
    [6] VCCSA_VSSSENSE
    2
    PW M1_1PH [66] SUSB# [2,10,41,57,62]
    PR133 PC95
    PR148 100_1%_2 *Short_0201 1000p/50V_2 PR103 37.4K_1%_4 PU7

    3
    MC74VHC1G08DFT2G
    PC93 47p/50V_2
    PR140 *Short_0201 PR124 100K_1%_2
    +VCC_CORE PR353 100_1%_2 PR358 D1A 0608
    *Short_0201 PC97 *0.1u/25V_2 +VCC_GT
    VSP_1PH PR128 PR132 100_1%_2
    [7] VCCSENSE D1A 0608
    PC254 81215_SCLK PR119 49.9_1%_4 VCCGT_VCCSENSE [5]
    VSN_1PH VR_SVID_CLK [2]
    1000p/50V_4 PR359 *Short_0201
    1K_1%_2 PR129 PC75
    81215_ALERT PR142 *Short_0201 1K_1%_2 1000p/50V_4
    [7] VSSSENSE VR_SVID_ALERT# [2]
    81215_SDIO VCCGT_VSSSENSE [5]
    PR357 PC253 PR120 10_1%_4
    VR_SVID_DATA [2]
    PR354 100_1%_2 *Short_0201 1000p/50V_2 PR130
    D1A 0608 *Short_0201 PR131 100_1%_2
    PR143 *10K_1%_2 +VCCIO PC98
    PU23 PR144 1000p/50V_2

    53

    51
    52
    50
    49
    48
    47
    46
    45
    44
    43
    42
    41
    40
    PC247 PR346 PC246 D1A 0622 NCP81215PMNTXG *Short_0201 H_PROCHOT# [2,57,60]
    47p/50V_4 49.9_1%_2 470p/50V_4

    VR_RDY

    SCLK
    ALERT#
    SDIO
    PAD

    VSN_1PH
    VSP_1PH
    COMP_1PH
    ILIM_1PH
    CSN_1PH
    CSP_1PH
    IMON_1PH

    PWM_1PH/ICCMAX_1PH
    EN
    PR360
    28K_1%_4 PR126 PC71 PC73
    PR363 49.9_1%_2 330p/50V_4 47p/50V_4
    PR355 PC243 1K_1%_2
    PC127 VSP_4PH_A 1 39
    470p/50V_4 VSN_4PH_A 2 VSP_4PH VR_HOT# 38 PR96 27K_1%_4 PR95 PC78
    3K_1%_4 3300p/50V_4 3 VSN_4PH VSP_2PH 37
    D1A 0622 PR127
    DIFFOUT_4PH_A 4 IMON_4PH VSN_2PH 36 PC74 470p/50V_4 1K_1%_2
    FB_4PH_A 5 DIFFOUT_4PH IMON_2PH 35 3K_1%_4 3300p/50V_4
    COMP_4PH_A 6 FB_4PH DIFFOUT_2PH 34
    PR361 19.1K_1%_4 ILIM_4PH_A 7 COMP_4PH FB_2PH 33
    CSCOMP_4PH_A 8 ILIM_4PH COMP_2PH 32 PR117 11.8K_1%_4
    C CSSUM_4PH_A 9 CSCOMP_4PH ILIM_2PH 31
    Place close to C
    VCCGT Inductor
    1

    10 CSSUM_4PH CSCOMP_2PH 30

    1
    CSREF_4PH CSSUM_2PH 29

    75K_1%_2
    PR341 PR351 PC126 0.01u/50V_4 CSREF_GT [64,66]
    CSREF_2PH

    PWM1_4PH/ICCMAX_4PH

    PWM1_2PH/ICCMAX_2PH

    PR125
    100K_NTC_4_1% 75K_1%_2 PR94

    PWM4_4PH/ROSC_MPH
    PWM2_2PH/ROSC_1PH
    CSP1_3PH_A 11
    330p/50V_4

    680p/50V_4

    PC72 0.01u/50V_4 100K_NTC_4_1%


    CSP2_3PH_A 12 CSP1_4PH
    PC249

    PC252

    1000p/50V_4

    220p/50V_4
    Place close to

    PSYS/TSENSE_1PH
    2

    PWM3_4PH/VBOOT
    CSP3_3PH_A 13 CSP2_4PH 28

    PWM2_4PH/ADDR
    VCORE Inductor

    2
    CSP3_4PH CSP1_2PH

    PC79

    PC80
    27

    TSENSE_4PH

    TSENSE_2PH
    CSP2_2PH +5V_S5

    165K_1%_4
    PR350

    CSP4_4PH

    PR102
    150K_1%_4 PR145 PR101 4.64K_1%_4
    GT_SW 1_SRC [64,66]
    PR339 178K_1%_4 2K_1%_2

    DRON
    [64,65] SW 1_4PH_A

    VRMP
    PC77 0.047u/25V_4 PR93

    VCC
    +VIN CSREF_GT [64,66]
    PR336 178K_1%_4 60.4K_1%_4
    [64,65] SW 2_4PH_A
    GT_SW 1_SRC [64,66]
    PR338 178K_1%_4 D1A 0622

    14
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    [64,65] SW 3_4PH_A
    PR337 178K_1%_4 PR364
    D1A 0622
    [64,65] SW 4_4PH_A CSP4_4PH_A
    1K_1%_4 PC128 PR121 4.02K_1%_4
    SW 4_4PH_A [64,65]
    0.1u/50V_4
    TSENSE_4PH_A TSENSE_2PH_A PC69 PC83 0.047u/50V_4
    [64,65] CSREF_4PH_A CSREF_4PH_A [64,65]
    0.1u/50V_4
    Check Total Power
    Vinafix.com +5V_S5 PR114 20K_1%_4

    PR365
    PMON [60]
    PC129 2.2_5%_6 D1A 0608 PR146 *Short_0201
    PR362 4.02K_1%_4 0.01u/50V_4 PC125 PR190
    [64,65] SW 1_4PH_A
    1u/6.3V_4 *1K_1%_2
    PC251 0.047u/50V_4 PR100 25.5K_1%_4
    [64,65] CSREF_4PH_A
    PR106 GT_PW M1 [66]
    PR356 4.02K_1%_4 [65,66] DRVON 130K_1%_4
    [64,65] SW 2_4PH_A
    FSW for 1ph Rail
    PC248 0.047u/50V_4 PC84
    [64,65] CSREF_4PH_A
    *2200p/50V_4
    PR349 4.02K_1%_4 [65] PW M1_4PH_A
    [64,65] SW 3_4PH_A
    PC245 0.047u/50V_4 PR99 113K_1%_4 D1A 0622
    [64,65] CSREF_4PH_A

    B
    [65] PW M2_4PH_A Default Setting( CML-H82 ) B

    PR113 4.3K_1%_4

    PR115 PR92 Item Location CML-H82


    15K_1%_4 15K_1%_4 [65] PW M3_4PH_A
    PR147 PR122 PR107 24.9K_1%_4
    1 PR336,PR337,PR338,PR339 CS41782FB11 178K ohm
    PR116 PR97
    *Short_0201 *Short_0201
    TSENSE_4PH_A 1 2 TSENSE_2PH_A 1 2
    2 PR361 CS31912FB15 19.1K ohm
    [65] PW M4_4PH_A
    100K_NTC_4_1% 100K_NTC_4_1% PR98 130K_1%_4
    D1A 0608 D1A 0608 3 PR99 CS41132FB17 113K ohm
    Place close to Place close to
    VCORE Mosfet GT Mosfet
    4 PR360 CS32802FB10 28K ohm

    CML-H82 (45W,Baseline)
    (4+1+1 Phase)
    VCORE VCCGT VCCSA
    A
    Icc TDC：86A Icc TDC：25A Icc TDC：10A A

    Icc Max：140A Icc Max：32A Icc Max：11.1A


    OCP：185A OCP：43A OCP：20A

    VCORE L/L： VCORE L/L： VCORE L/L：


    R_DC_LL：1.1mV/A R_DC_LL：2.7mV/A R_DC_LL：10.3mV/A
    Quanta Computer Inc.
    R_AC_LL：1.1mV/A R_AC_LL：2.7mV/A R_AC_LL：10.3mV/A PROJECT : ZGI
    Size Document Number Rev
    1A
    CPU VR IC (NCP81215PMNTXG)
    Date: Tuesday, June 23, 2020 Sheet 64 of 77
    5 4 3 2 1
    5 4 3 2 1

    VCORE D1A 0608


    PR347
    +VIN

    +5V_S5
    [34,59,60,61,62,63,64,66,67,70,72]
    +VCC_CORE [7,64]
    [49,61,63,64,66,68,70,72] 65
    *Short_0402
    +VIN_VCC_CORE
    +5V_S5

    +VIN
    PC244 PR335
    2.2u/10V_4 2.2_1%_4
    + +
    PC120 PC227 PC220 PC91 PC65 PC356
    10u/25V_8 10u/25V_6 0.1u/50V_4 2200p/50V_4 33u/25V_7343H1.9 *33u/25V_7343H1.9

    PU19 NCP302045MNTWG
    PC237
    2.2u/10V_4 29 8
    3 VCCD VIN#1 9
    VCC VIN#2

    PR340 *Short_0201 2
    SMOD# PR328 PC233
    3.3_1%_6 0.22U/25V_6
    5
    PR343 *Short_0201 1 BOOT
    [64] PWM1_4PH_A PWM
    D PR348 *Short_0201 30 7 D
    [64,65,66] DRVON DISB# PHASE +VCC_CORE

    PL7
    D1A 0608 16 0.15uH/37A_7x7x3
    VSW
    SW
    24 1 2 DCR=0.9mOhm
    6 27 PR185
    31 nc GL#1 33 2.2_1%_6 + +
    THWN GL#2

    PGND#1
    PGND#2
    PC260 PC256 PC257 PC122 PC123

    CGND

    AGND
    0.1u/50V_4 22u/6.3V_8 22u/6.3V_8 330u/2V_7343H1.9 330u/2V_7343H1.9

    PR333 PR345
    *Short_0201 *Short_0201

    4
    12
    28
    32
    PC124
    1000p/50V_4

    PR187 10_1%_4 CSREF_4PH_A [64,65]

    SW1_4PH_A [64]

    D1A 0608
    PR311
    *Short_0402
    +VIN_VCC_CORE
    +5V_S5

    PC217 PR307
    2.2u/10V_4 2.2_1%_4

    PC214 PC117 PC216 PC215


    10u/25V_6 10u/25V_8 0.1u/50V_4 2200p/50V_4

    PU18 NCP302045MNTWG
    PC212
    2.2u/10V_4 29 8
    3 VCCD VIN#1 9
    VCC VIN#2

    PR306 *Short_0201 2
    SMOD# PR308 PC213
    3.3_1%_6 0.22U/25V_6
    5
    PR309 *Short_0201 1 BOOT
    [64] PWM2_4PH_A PWM +VCC_CORE
    PR310 *Short_0201 30 7
    [64,65,66] DRVON DISB# PHASE

    PL6
    C D1A 0608 16 0.15uH/37A_7x7x3 C
    VSW
    SW
    24 1 2 DCR=0.9mOhm
    6 27 PR314
    31 nc GL#1 33 2.2_1%_6 + +
    THWN GL#2
    PGND#1
    PGND#2

    PC261 PC255 PC258 PC130 PC131


    CGND

    AGND

    0.1u/50V_4 22u/6.3V_8 22u/6.3V_8 330u/2V_7343H1.9 330u/2V_7343H1.9

    PR332 PR344
    *Short_0201 *Short_0201
    4
    12
    28
    32

    PC232
    1000p/50V_4

    PR334 10_1%_4 CSREF_4PH_A

    SW2_4PH_A
    [64,65]

    [64]
    Vinafix.com
    D1A 0608
    PR330
    *Short_0402
    +VIN_VCC_CORE
    +5V_S5

    PC240 PR316
    2.2u/10V_4 2.2_1%_4

    PC118 PC218 PC236 PC228


    10u/25V_8 10u/25V_6 0.1u/50V_4 2200p/50V_4

    PU20 NCP302045MNTWG
    PC225
    2.2u/10V_4 29 8
    3 VCCD VIN#1 9
    VCC VIN#2

    PR319 *Short_0201 2
    SMOD# PR312 PC221
    3.3_1%_6 0.22U/25V_6
    5
    PR318 *Short_0201 1 BOOT
    [64] PWM3_4PH_A PWM
    PR326 *Short_0201 30 7 +VCC_CORE
    [64,65,66] DRVON DISB# PHASE

    PL8
    D1A 0608 16 0.15uH/37A_7x7x3
    VSW
    SW
    24 1 2 DCR=0.9mOhm
    6 27 PR186
    B 31 nc GL#1 33 2.2_1%_6 + B
    THWN GL#2
    PGND#1
    PGND#2

    PC259 PC262 PC269 PC70


    CGND

    AGND

    0.1u/50V_4 22u/6.3V_8 22u/6.3V_8 220u/2V_7343H1.0

    PR188 PR192
    *Short_0201 *Short_0201
    4
    12
    28
    32

    PC242
    1000p/50V_4

    PR366 10_1%_4 CSREF_4PH_A [64,65]

    SW3_4PH_A [64]

    D1A 0608
    PR331
    *Short_0402
    +VIN_VCC_CORE
    +5V_S5

    PC241 PR317
    2.2u/10V_4 2.2_1%_4

    PC219 PC119 PC229 PC235


    10u/25V_6 10u/25V_8 0.1u/50V_4 2200p/50V_4

    PU21 NCP302045MNTWG
    PC226
    2.2u/10V_4 29 8
    3 VCCD VIN#1 9
    VCC VIN#2

    PR321 *Short_0201 2
    SMOD# PR313 PC222
    3.3_1%_6 0.22U/25V_6
    5
    PR320 *Short_0201 1 BOOT
    [64] PWM4_4PH_A PWM
    PR327 *Short_0201 30 7 +VCC_CORE
    [64,65,66] DRVON DISB# PHASE

    PL9
    D1A 0608 16 0.15uH/37A_7x7x3
    VSW
    SW
    24 1 2 DCR=0.9mOhm
    6 27 PR352
    31 nc GL#1 33 2.2_1%_6 +
    THWN GL#2
    PGND#1
    PGND#2

    PC271 PC270 PC263 PC67


    CGND

    AGND

    0.1u/50V_4 22u/6.3V_8 22u/6.3V_8 220u/2V_7343H1.0

    PR189 PR193
    *Short_0201 *Short_0201
    4
    12
    28
    32

    A PC250 A
    1000p/50V_4

    PR367 10_1%_4 CSREF_4PH_A [64,65]

    SW4_4PH_A [64]

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    VCORE 4-Phase Power Stage
    Date: Tuesday, June 23, 2020 Sheet 65 of 77
    5 4 3 2 1
    5 4 3 2 1

    66
    +VIN [34,59,60,61,62,63,64,65,67,70,72]
    +VCC_GT [5,64]
    +VCC_SA [6,64]
    +5V_S5 [49,61,63,64,65,68,70,72]

    VCCGT
    D D

    D1A 0608
    PR374
    *Short_0402
    +5V_S5

    +VIN
    PC277 PR371
    2.2u/10V_4 2.2_1%_4

    PC132 PC272 PC276 PC275 + PC357 + PC358


    10u/25V_6 10u/25V_6 0.1u/50V_4 2200p/50V_4 *15u/25V_3528H1.9 15u/25V_3528H1.9

    PU24 NCP302045MNTW G
    PC274
    2.2u/10V_4 29 8
    3 VCCD VIN#1 9
    VCC VIN#2

    PR373 *Short_0201 2
    SMOD# PR370 PC273
    3.3_1%_6 0.22U/25V_6
    5
    PR372 *Short_0201 1 BOOT
    [64] GT_PW M1 PWM
    PR152 *Short_0201 30 7
    [64,65,66] DRVON DISB# PHASE +VCC_GT

    D1A 0608 PL11


    16 0.15uH_10x10x3
    VSW
    SW
    24 1 2 DCR=0.76mOhm

    470u/2V_7343H1.9

    220u/2V_7343H1.0
    6 27 PR195
    31 nc GL#1 33

    PC278

    PC66
    2.2_1%_6 + +
    PGND#1
    PGND#2

    C THWN GL#2 PC92 PC90 PC89 C


    CGND

    AGND

    0.1u/50V_4 22u/6.3V_8 22u/6.3V_8

    PR153 PR151
    *Short_0201 *Short_0201
    4
    12
    28
    32

    PC133
    1000p/50V_4

    PR149 10_1%_4 CSREF_GT [64]

    VCCSA GT_SW 1_SRC [64]

    D1A 0608
    PR329
    *Short_0402
    +5V_S5 D1A 0608

    PC239 PR322
    2.2u/10V_4 2.2_1%_4 +VIN

    PC121 PC234 PC223 PC231


    10u/25V_8 10u/25V_6 0.1u/50V_4 2200p/50V_4
    PC230
    B 2.2u/10V_4 PU22 NCP302045MNTW G B

    29 8
    3 VCCD VIN#1 9
    VCC VIN#2

    PR324 *Short_0201 2
    SMOD# PR315 PC224
    3.3_1%_6 0.22U/25V_6
    5
    PR323 *Short_0201 1 BOOT
    [64] PW M1_1PH PWM
    PR325 *Short_0201 30 7 Isat=26A
    [64,65,66] DRVON DISB# PHASE +VCC_SA

    D1A 0608 PL10


    VSW
    16 0.47uH/17.5A_7x7x3 DCR=4.2mOhm
    24 1 2
    SW

    6 27 PR342
    31 nc GL#1 33 2.2_1%_6 PC268 PC266 PC265 PC267 PC264
    PGND#1
    PGND#2

    THWN GL#2 0.1u/50V_4 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8


    CGND

    AGND

    PR191 PR194
    *Short_0201 *Short_0201
    4
    12
    28
    32

    PC238
    1000p/50V_4

    PR369 10_1%_4 CSN_1PH [64]

    SW _1PH [64]

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    VCCSA 1-Phase Power Stage
    Date: Tuesday, June 23, 2020 Sheet 66 of 77
    5 4 3 2 1
    5 4 3 2 1

    +3VPCU
    +1.8V_S5
    +1.8V
    [10,34,42,43,56,57,58,59,60,61,72]
    [14]
    [24,50]
    +VIN
    +5V
    +VCCIO
    [34,59,60,61,62,63,64,65,66,70,72]
    [34,37,50,55,58,61,73]
    [2,3,6,62,64]
    67
    +3V [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,62,63,64,68,69,70,71,72]
    3V_LDO [61,73]

    D D

    +1.8V_S5
    1.8Volt +/- 5%
    TDC : 0.8A
    PEAK : 3A
    Width : 40mil
    +3V

    +1.8V_S5 +1.8V_S5

    PR183
    100K_1%_2 PC147 PR240
    PJ13
    PR377 D1A 0608 *Short_0805
    *Short_0201 *2200p/50V_4 *2.2_5%_6
    8068PG_1.8V PU25

    3
    PL12
    [57] HWPG_1.8VS5 1uH_5x5x1.8 PQ43
    PJ14 4 1 8068LX_1.8V 1 2 MAIND 2 AOSS32334C
    C *Short_0805 POK NC#1 8068FB_1.8V_S C
    9 2
    +3VPCU VIN#1 SW#1 PC285 PR379
    10 3 *22p/50V_4 *Short_0201 PC282 PC281 PC352

    1
    VIN#2 SW#2 PR380 0.1u/50V_4 22u/6.3V_6 22u/6.3V_6
    PR462 7 20.5K_1%_2
    10_1%_6 NC#2 R1 +1.8V
    8 6 8068FB_1.8V
    VCC FB
    11 5 8068EN_1.8V TDC : 0.08A
    GND EN
    PC293
    PC294 PC351 PR378
    PR396
    10K_1%_2 Vo=0.6*(R1+R2)/R2 PEAK : 0.1A
    0.01u/50V_4 10u/6.3V_4 1u/6.3V_2 PC283 *Short_0201
    R2 Width : 20mil
    G2823DRE1U *0.1u/50V_4 =1.83V
    D1A 0608
    S5_ON [57,61,62]

    B B

    Thermal protection
    +VIN +3V +5V +VCCIO +1.2V +1.8V +VIN

    3V_LDO (1) Need fine tune


    PR269
    10K_5%_4
    for thermal protect point PR281 PR286 PR182 PR283 PR276 PR274 PR179
    1M_5%_6 *22_5%_8 *220_5%_8 22_5%_8 22_5%_8 22_5%_8 1M_5%_6
    (2) Note placement position
    PC169 TEMP=86.3C MAINON_ON_G MAIND
    0.1u/50V_4 PQ22 MAIND [62,63]
    DDTC144EUA-7-F
    5

    3
    PR262

    3
    *Short_0201 PR282
    VCC

    3 SYS_SHDN# MAINON 2 1M_5%_6 2 2 2 2 2 2 PR181


    OT SYS_SHDN# [2,57,61] [57,61,62,63] MAINON
    *1M_5%_6 PC112
    PU12 PQ39 PQ23 PQ38 PQ37 PQ36 2200p/50V_4
    PR261 TMP708AIDBVR D1A 0608 *2N7002K *2N7002K 2N7002K 2N7002K 2N7002K PQ24

    1
    1
    24K_1%_2 PR180 2N7002K
    1 *100K_1%_6
    SET
    HYST
    GND

    86.3 degree C
    A A
    2

    Rset(Kohm)=0.0012T*T-0.9308T+96.147 HYST=VCC for 10


    =25.699 K ohm degree Hys.
    HYST=GND for 30
    degree Hys.

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    +1.8V_S5/Thermal Protect
    Date: Tuesday, June 23, 2020 Sheet 67 of 77
    5 4 3 2 1
    5 4 3 2 1

    PD1
    *EV@RB500V-40
    Double Check Power On Sequence
    +1.8V_AON NTC close to hot area you concern
    68

    1
    1 2
    [24] NVVDD_CORE1_EN
    PR12
    PR24 EV@4.99K_1%_2 EV@10K_NTC_4_1%
    +3V
    PC31 B value=3435
    *EV@0.047u/25V_4 PR25 *Short_0201
    [21] MBDATA1_GPU

    2
    +1.8V_AON
    PR13 D1A 0608 PR26 EV@4.99K_1%_2
    *Short_0402 PR27 *Short_0201 PR30
    [21] MBCLK1_GPU
    EV@100_1%_2
    D
    PR28 PR29 EV@4.99K_1%_2
    Remote Sense Resistor PR6012/PR6015/PR6009/PR6019 D
    D1A 0608 *EV@10K_1%_2
    +3V
    PC32 EV@0.01u/50V_4 Close to GPU or Load Point

    PR31 *EV@0_5%_2
    [21] NVVDD_PSI
    PR33 *Short_0201
    PR34 EV@10K_1%_2 VSS_GPU_SENSE [23]
    +1.8V_AON
    PR32 [24] NVVDDPG PR35 *Short_0201 PR36 *Short_0201
    *EV@12K_1%_2 VGPU_CORE_SENSE [23]
    PR37 *Short_0201 MP2888A_PWMVID
    D1A 0608
    [21] NVVDD_PWM_GPU
    NVVDD
    D1A 0608

    MP2888A_VORTN

    MP2888A_VOSEN
    MP2888A_TSNS
    D1A 0608 PR38 *EV@0_5%_2 PR40

    MP2888A_SDA
    MP2888A_SCL
    MP2888A_PSI

    MP2888A_EN
    EV@100_1%_2
    PR39 *Short_0201 MP2888A_VTEMP
    [69] GPU_TEMP

    D1A 0608 PR41 PC24


    +3V EV@10K_1%_2 EV@0.01u/50V_4

    41

    40

    39

    38

    37

    36

    35

    34

    33

    32

    31
    PR42

    VTEMP

    PSI

    TSNS
    EN

    SCL

    SDA

    VOSEN
    PGOOD

    VORTN
    AGND

    PWMVID
    EV@10K_1%_2

    NVVDD_TALERT# 1 30
    TALERT# T5

    2 29 MP2888A_VFB
    T1 VFB

    3 28 MP2888A_VDIFF
    T2 VDIFF
    PR14 EV@150_1%_4
    C C
    4 27
    T3 T4 PC30
    EV@1000p/50V_4
    5 PU6 26 MP2888A_IREF PR43 EV@61.9K_1%_2
    NC_1 IREF
    EV@MP2884AGU-0138-Z
    PR44 PR45
    6 25 MP2888A_IMON EV@4.99K_1%_2 EV@402_1%_2
    NC_2 IMON
    PR46
    7 24 *EV@0_5%_2 MP2888A_VDD18
    NC_3 ADDR

    8 23 MP2888A_VDD18 PR47
    PWM4 VDD18
    *Short_0201

    PR48 *Short_0201 MP2888A_PWM3 9 22 PC25


    [69] GPU_PWM3 PWM3 VINSEN EV@1u/6.3V_4
    D1A 0608
    PR49 *Short_0201 MP2888A_PWM2 10 21
    [69] GPU_PWM2 PWM2 CSSUM
    PR15
    EV@15K_1%_4

    VDD33
    PWM1
    PR50 *Short_0201 MP2888A_PWM1 MP2888A_VINSEN

    NC_4

    NC_5

    NC_6

    NC_7
    [69] GPU_PWM1 VINSEN_NVVDD [69]

    CS4

    CS3

    CS2

    CS1
    D1A 0608 PC26 PR16
    11

    MP2888A_VDD33 12

    13

    14

    15

    16

    17

    18

    19

    20
    EV@1000p/50V_4 EV@1K_1%_4
    NVVDD

    MP2888A_CSSUM PR4
    *EV@22_5%_8 +5V_S5

    N18P-G61 MAXQ(40W)

    3 MP28EN_3A
    EV@1K_1%_2

    EV@1K_1%_2

    EV@1K_1%_2
    B +3V_S5 PR17 *EV@4.7_5%_4 B

    PR52

    PR51

    PR53
    PR18
    PR19 EV@4.7_5%_4 *EV@100K_1%_4
    NVVDD +3V

    EDP-Continous:38.2A PC27 GPU_CS1 PQ8 2 MP28EN_2A


    EV@4.7u/6.3V_4 *EV@2N7002K
    EDP-Peak:84A GPU_CS2

    3
    PR20 2 MP2888A_EN

    1
    OCP: 128A GPU_CS3 *EV@1M_5%_4
    PQ7
    *EV@PJA138K

    1
    N18P-G62 MAXQ(40W)
    NVVDD
    EDP-Continous:38.4A
    EDP-Peak:98.5A [69] GPU_CS3

    OCP: 128A [69] GPU_CS2

    [69] GPU_CS1

    N19P-Q1 MAXQ(40W)
    A NVVDD [22,23,69] A
    NVVDD +3V_S5 [13,14,23,42,43,47,51,54,57,58,59,61,63,73]
    +3V [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,62,63,64,67,69,70,71,72]
    EDP-Continous:38.9A +5V_S5 [49,61,63,64,65,66,70,72]
    +1.8V_AON [19,21,23,24,25,26,70,72]
    EDP-Peak:67.5A
    OCP: 128A
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    +VGACORE (MP2884A)
    Date: Tuesday, June 23, 2020 Sheet 68 of 77
    5 4 3 2 1
    5 4 3 2 1

    +VIN_GPU_TOTAL

    NVVDD
    +3V
    [22,23,68]
    [70]

    [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,62,63,64,67,68,70,71,72]

    D1A 0608
    Put the same side with Dr.MOS and near pin1 +VIN_VGACORE PR2 +VIN_GPU_TOTAL
    69
    PR23 EV@0.005_1%_2037
    *Short_0402
    [68] VINSEN_NVVDD

    EV@10u/25V_6

    EV@10u/25V_6

    EV@10u/25V_6

    EV@1u/25V_4

    EV@2200p/50V_4
    EV@0.1u/25V_4

    EV@33u/25V_7343H1.9
    PC11

    PC12

    PC13

    PC33

    PC34

    PC35

    PC1
    +
    +3V
    D
    D1A 0608 D
    PR54 PR55
    PU3 *Short_0201 *Short_0201
    EV@MP86903-CGLT-Z

    PC36 20 1 NVVDD_SENSE_V [73]


    EV@1u/6.3V_4 VCC VIN#1 14
    VIN#2 NVVDD_SENSE_I [73]
    Isat=41A
    19 21 GPU_BST1 PC37
    AGND BST DCR(Typ)=0.9mohm
    D1A 0608 EV@1u/25V_4
    NVVDD
    PR56 *Short_0201 15 2 GPU_SW1 PL2
    [68] GPU_PWM1 PWM SW#1 3 EV@0.15uH/37A_7x7x3
    PR57 *Short_0201 17 SW#2 4 1 2
    [68] GPU_TEMP VTEMP/FLT SW#3

    EV@330u/2V_7343H1.9
    *EV@220u/2V_7343H1.0
    PR58 *Short_0201 16 13
    +3V SYNC PGND#3 12
    PGND#2

    PC9

    PC3
    5 PR5 + +
    PR59 *Short_0201 18 PGND#1 *EV@2.2_5%_6
    [68] GPU_CS1 CS
    SN_GPU1

    PC56
    25A(con) 60A(OCP) *EV@2200p/25V_2

    Put the same side with Dr.MOS and near pin1


    +VIN_VGACORE Vinafix.com
    C C

    EV@1u/25V_4
    EV@10u/25V_6

    EV@10u/25V_6

    EV@10u/25V_6

    EV@2200p/50V_4
    EV@0.1u/25V_4
    +3V

    PC14

    PC15

    PC16

    PC38

    PC39

    PC40
    PU4
    EV@MP86903-CGLT-Z

    PC46 20 1
    EV@1u/6.3V_4 VCC VIN#1 14
    VIN#2
    Isat=41A
    19 21 GPU_BST2 PC41
    AGND BST DCR(Typ)=0.9mohm
    D1A 0608 EV@1u/25V_4
    NVVDD
    PR60 *Short_0201 15 2 GPU_SW2 PL3
    [68] GPU_PWM2 PWM SW#1 3 EV@0.15uH/37A_7x7x3
    GPU_TEMPPR61 *Short_0201 17 SW#2 4 1 2
    VTEMP/FLT SW#3

    EV@220u/2V_7343H1.0

    EV@220u/2V_7343H1.0
    PR62 *Short_0201 16 13
    +3V SYNC PGND#3 12
    PGND#2

    CG988

    PC4
    5 PR6 + +
    PR63 *Short_0201 18 PGND#1 *EV@2.2_5%_6
    [68] GPU_CS2 CS
    SN_GPU2

    PC57
    25A(con) 60A(OCP) *EV@2200p/25V_2

    B B

    Put the same side with Dr.MOS and near pin1


    +VIN_VGACORE

    EV@10u/25V_6

    EV@10u/25V_6

    EV@10u/25V_6

    EV@1u/25V_4

    EV@2200p/50V_4
    EV@0.1u/25V_4
    +3V
    PC17

    PC18

    PC19

    PC42

    PC43

    PC44
    PU1
    EV@MP86903-CGLT-Z

    PC47 20 1
    EV@1u/6.3V_4 VCC VIN#1 14
    VIN#2
    Isat=41A
    19 21 GPU_BST3 PC45
    AGND BST DCR(Typ)=0.9mohm
    D1A 0608 EV@1u/25V_4
    NVVDD
    PR64 *Short_0201 15 2 GPU_SW3 PL4
    [68] GPU_PWM3 PWM SW#1 3 EV@0.15uH/37A_7x7x3
    GPU_TEMPPR65 *Short_0201 17 SW#2 4 1 2
    VTEMP/FLT SW#3

    EV@220u/2V_7343H1.0
    *EV@220u/2V_7343H1.0
    PR66 *Short_0201 16 13
    +3V SYNC PGND#3 12
    PGND#2

    PC7

    PC6
    5 PR7 + +
    PR67 *Short_0201 18 PGND#1 *EV@2.2_5%_6
    [68] GPU_CS3 CS
    SN_GPU3

    PC58
    25A(con) 60A(OCP) *EV@2200p/25V_2

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    +VGACORE (MP2884A)
    Date: Tuesday, June 23, 2020 Sheet 69 of 77
    5 4 3 2 1
    5 4 3 2 1

    VGA Core -
    +VIN

    PR1
    EV@0.005_1%_2037
    +VIN_GPU_TOTAL

    70
    FBVDDQ_MEM PR81 PR80 D1A 0608
    *Short_0201 *Short_0201

    D D
    FVDDQ_SENSE_I
    +VIN [34,59,60,61,62,63,64,65,66,67,72] FVDDQ_SENSE_I [73]
    FVDDQ_SENSE_V
    +VIN_GPU_TOTAL [69] FVDDQ_SENSE_V [73]
    FBVDDQ_MEM [20,22,23,25,26]
    +5V_S5 [49,61,63,64,65,66,68,72]
    +1.8V_AON [19,21,23,24,25,26,68,72] +VIN_GPU_TOTAL
    +3V [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,62,63,64,67,68,69,71,72]

    PC20 PC10 PC28 PC55 PC52


    EV@10u/25V_6 EV@10u/25V_8 EV@0.1u/50V_4 EV@2200p/50V_4 EV@0.1u/50V_4

    PU2 EV@RT8816BGQW

    3
    4
    9

    3
    4
    9
    PQ2 PQ1
    PR10 PR8 D1 EV@AOE6936 D1 EV@AOE6936
    EV@1_5%_6 EV@0_1%_6
    8816APVCC 18 2 8816AUGATE1 8816AUGATE1_1 8816AUGATE1_1
    +5V_S5 PVCC UGATE1
    1 G1 1 G1 FBVDDQ_MEM
    PC51 PL1
    EV@2.2u/10V_4 D2/S1 5 D2/S1 5 EV@0.36uH/33A_10x10x3
    2 S1/D2 6 8816APHASE1 2 S1/D2 6 8816APHASE1 1 2

    EV@330u/2V_7343H1.9

    EV@220u/2V_7343H1.0
    PC50 7 7

    EV@47u/6.3V_6

    *EV@47u/6.3V_6

    *EV@47u/6.3V_6
    +3V PR79 EV@10K_1%_2 EV@0.22u/25V_4 Don't Connect Pin2 to Phase Don't Connect Pin2 to Phase
    1 + +

    PC2

    PC8
    8816ABOOT1 PR9

    PC22

    PC21

    PC23
    RT8816BGQW [24] PS_FBVDD_PGOOD PR78 *Short_0201 8816APG 13
    PGOOD
    BOOT1 *EV@2.2_5%_6

    20 8816APHASE1 8 G2 8 G2
    PSI Mode PHASE1
    D1A 0608 S2 S2 PC48
    C C
    1 Phase DCM PR73 *EV@2200p/50V_4
    0V-0.4V

    10

    10
    EV@15K_1%_2
    [24] FBVDD_EN 8816AEN 3
    EN 19 8816ALGATE1 8816ALGATE1
    0.7V-0.88V 1 Phase CCM LGATE1
    Rds(on)=3mohm(MAX)
    PC49
    2 Phase DCM *EV@820p/50V_4
    1.08V-1.35V
    for VGA sequence
    1.6V-5.5V 2 Phase CCM PSI=0.8V
    1 Phase CCM PR71
    *EV@10K_1%_2
    +1.8V_AON 8816APSI 4
    PSI

    MEM_VDD_CTRL FBVDDQ_MEM [21] FBVDD_PSI N18P-G61 MAXQ(40W)


    PSI PU High +1.8V_AON on EE Side PR70 14
    (Series R=10K) *Short_0201 PR72 UGATE2
    1 1.25V EV@8.06K_1%_2 1 Phase
    D1A 0608
    0 1.2V
    5 FBVDDQ_MEM
    VID
    15 EDP-Continous:15.2A
    FBVDDQ_MEM R1(PR76) R2 (PR21) BOOT2
    8816AVREF
    VREF=2V
    EDP-Peak:16.2A
    16
    16.9K 150K 8816AVREF 8 PHASE2 OCP:25A
    1.25V/1.2V (CS31691FE00) (CS41501FE06) VREF

    PC54
    PR77 EV@0.1u/25V_4
    17
    B EV@10K_1%_2 LGATE2 B
    N18P-G62 MAXQ(40W)
    6
    PR69 Staff Un-Staff
    +5V_S5
    R2 R1
    REFADJ 1 Phase
    N18P-G61/G62 1.2V PR69 PR21 PR76
    PC59 *EV@56p/25V_2
    FBVDDQ_MEM
    N19P-Q1 EV_SP@100K_1%_2 EV@150K_1%_2 EV@16.9K_1%_2
    1.25V 10 8816ARGDN PR86 *Short_0201 EDP-Continous:15.5A
    8816AREFIN 7 RGND
    REFIN EDP-Peak:16.6A
    PC63 *EV@56p/25V_2 PC60 D1A 0608 OCP:25A
    3

    PC53 *EV@56p/25V_2
    2 EV@100p/50V_4 11 8816AVSNS
    PR74 VSNS PR85 *Short_0201 FBVDDQ_SENSE [23]
    3

    EV@75K_1%_2 FBVDDQ_MEM +5V_S5


    2 PQ3
    1

    [21] MEM_VDD_CTRL
    PR68 EV@2N7002K FBVDDQ_MEM
    EV@1M_5%_2 12 8816ASS
    N19P-Q1 MAXQ(40W)
    1

    PQ4 OCSET PR87 PR3


    EV@METR3904-G EV@100_1%_2 EV@22_5%_8 PR83
    PR75 EV@100K_1%_2
    *EV@100K_1%_2
    Fsw : 400KHz PR88 PC61 1 Phase
    EV@41.2K_1%_4 *EV@56p/25V_2

    3
    PR22 D1A 0608
    8816ATON 9 2
    +VIN_GPU_TOTAL TON PQ6 PR84
    FBVDDQ_MEM

    3
    PR11 EV@402K_1%_4 PC62 EV@2N7002KTB *Short_0201
    EV@1_5%_6 PR82 2 8816AEN EDP-Continous:14.5A

    1
    PC29 *EV@0.1u/25V_2 EV@1M_5%_2
    EV@1u/25V_4
    OCP=25A @Rds(on)=3m/2 EDP-Peak:15.5A
    21 PQ5
    OCP:25A

    1
    GND EV@DMG1012T-7
    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    +FBVDDQ_MEM (RT8816BGQW)
    Date: Tuesday, June 23, 2020 Sheet 70 of 77
    5 4 3 2 1
    5 4 3 2 1

    71
    VRAM Thermal Sensor , Local VRAM Thermal Sensor
    D D

    +3V [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,62,63,64,67,68,69,70,72]

    +3V
    +3V
    PU8

    3ND_MBCLK_THM_VRAM 8 1 VRAM_THERMDA
    C SMBCLK VCC C

    3
    PR156 3ND_MBDATA_THM_VRAM 7 2
    4.7K_1%_2 SMBDATA DXP PC100 2 PQ11
    PQ12A
    5

    6 3 2200p/50V_4 METR3904-G
    PJX8838 ALERT DXN

    1
    3 4 4 5 VRAM_THERMDC
    [56,57,58] 3ND_MBCLK THERM GND

    +3V G781P8
    PR158 *0_5%_2

    PR155
    +3V PD2 *10K_1%_2
    *RB500V-40

    2 1 MB_THRMTRIP#_VRAM
    [2,11] PM_THRMTRIP#
    PR157
    4.7K_1%_2
    2

    PQ12B
    PJX8838
    B 6 1 B
    [56,57,58] 3ND_MBDATA

    PR154 *0_5%_2

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    VRAM Thermal
    Date: Tuesday, June 23, 2020 Sheet 71 of 77
    5 4 3 2 1
    1 2 3 4 5 6 7 8

    +3VPCU
    +1.8V_AON
    [10,34,42,43,56,57,58,59,60,61,67]
    [19,21,23,24,25,26,68,70]
    +1.8V_AON
    1.8Volt +/- 5%
    TDC : 3A
    72
    +1.8V_MAIN [19,20,21,22,24,37] PEAK : 4A
    +5VPCU [43,48,50,61,62]
    +VIN [34,59,60,61,62,63,64,65,66,67,70] Width : 120mil
    +1.8V_AON

    +1.8V_AON

    PR275
    EV@100K_1%_2 PC179 PR277
    PJ22 PJ9
    *Short_0805 *Short_0805
    *EV@2200p/50V_4 *EV@2.2_5%_6
    A 8068PG1_1.8V PU14 A
    PL5
    EV@1uH_5x5x1.8
    PJ10 4 1 8068LX1_1.8V 1 2
    *Short_0805 POK NC#1 8068FB1_1.8V_S
    9 2
    +3VPCU VIN#1 SW#1 PC186 PC178 PC354
    10 3 *EV@22p/50V_4 PR285 PC177 EV@22u/6.3V_6 EV@22u/6.3V_6
    VIN#2 SW#2 EV@0.1u/50V_4
    D1A 0608 PR463 7
    EV@21K_1%_2

    EV@10_1%_6 NC#2 R1
    8 6 8068FB1_1.8V
    VCC FB
    11 5 8068EN1_1.8V PR288
    PC188 GND EN
    PC187 PC353 PR279 R2
    EV@10K_1%_2
    Vo=0.6*(R1+R2)/R2
    EV@0.01u/50V_4 EV@10u/6.3V_4 EV@1u/6.3V_2 PC181 *Short_0201
    EV@G2823DRE1U *EV@0.1u/50V_4 =1.86V
    D1A 0608

    1V8_AON_EN [24]

    +VIN +1.8V_AON

    R14 R15
    EV@1M_5%_2 EV@22_5%_8
    +1.8V_AON

    PQ21
    EV@DDTC144EUA-7-F
    3

    R13
    1V8_AON_EN 2 EV@1M_5%_2 2 TDC : 0.03A
    PQ18 TDC : 2.3A PEAK : 0.04A
    EV@2N7002KW PEAK : 2.3A Width : 20mil
    1

    Width : 100mil
    1

    PC174 PC173
    R16 EV@1u/25V_4 EV@1u/25V_4

    6
    B EV@100K_1%_2 B
    +1.8V_MAIN PR273 1V8_MAIN_S

    VIN1

    VIN2
    *Short_0805
    +1.8V_MAIN_R +1.8V_MAIN_R

    +VIN +1.8V_MAIN PC176 PC175 13 8


    EV@10u/6.3V_6 EV@0.1u/50V_4 VOUT1 OUT2
    PU13
    EV@TPS22976DPUR
    PR173 PR178 +5VPCU 4 11
    *EV@1M_5%_2 *EV@22_5%_8 PC171 VBIAS GND1
    PR171 15
    *Short_0402 GND2
    EV@0.1u/50V_4
    PQ17 1V8_MAIN_EN_R 3 5 1V8_MAIN_EN_R
    [24] 1V8_MAIN_EN

    CT1

    CT2
    *EV@DDTC144EUA-7-F ON1 ON2
    3

    PR172
    3

    PR174 *Short_0201 PC109 PC172

    12

    10
    1V8_MAIN_EN 2 *EV@1M_5%_2 2 *EV@0.1u/50V_4 *EV@0.1u/50V_4
    PQ19 D1A 0608
    *EV@2N7002KW
    1
    1

    PC111 PC110
    PR170 EV@1000p/50V_4 EV@1000p/50V_4
    *EV@100K_1%_2

    +1.2VSUS [2,6,10,14,17,18,48,63]
    +1V_GFX [19,21]
    +5V_S5 [49,61,63,64,65,66,68,70]
    +3V [2,3,9,10,11,12,13,21,34,37,38,42,50,53,55,57,58,61,62,63,64,67,68,69,70,71]

    +1V_GFX
    TDC : 1.65A
    C +1.2VSUS +1V_GFX PEAK : 2.2A C

    Width : 80mil

    PJ4 PJ3
    *Short_0805 PQ16 *Short_0805
    EV@AON7408 +1V_GFX_S
    D1A 0608
    3
    D

    5 2
    1
    PR163 +5V_S5
    G

    EV@5.6_5%_8
    4

    PC106 PC107 PC103 PC101 PC102


    EV@0.1u/50V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@0.1u/50V_4
    9336DRV

    PR161
    +3V EV@100K_1%_2
    3

    2
    +1.8V_AON PR162 PQ13
    EV@10K_1%_2 PQ15 3 EV@DMG1012T-7
    EV@2N7002K
    1

    PD3 PR160 2
    PR168 EV@1SS355 EV@1M_5%_2
    EV@10K_1%_2 1 2
    D1A 0608
    1

    PU9
    PR167 EV@G9336ADJTP1U
    *Short_0201 PR166 PC105
    3
    3

    [24] +1V_GFX_PG EV@47_1%_4 EV@0.01u/50V_4


    PR169 PGD 6 2
    4 DRV
    [24] +1V_GFX_EN EN
    EV@10K_1%_2 PR164
    EV@100_1%_4 PQ14
    1

    1 5 9336ADJ EV@2N7002K
    GND

    +5V_S5 VCC ADJ +1V_GFX_S


    PC108 R1
    EV@0.1u/50V_4 PC104
    2

    EV@0.1u/50V_4 R2 PR165
    D EV@100_1%_4 D
    Vout1=(1+R1/R2)*0.5
    =1V

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    +1.8V_AON & +1.8V_MAIN & +1V_GFX 1A

    Date: Tuesday, June 23, 2020 Sheet 72 of 77


    1 2 3 4 5 6 7 8
    5 4 3 2 1

    Power Monitoring with OVR-M 73


    OVRM_VCC
    D1A 0608

    +3V_S5 [13,14,23,42,43,47,51,54,57,58,59,61,63,68] +3V_S5 PR215 *Short_0402


    +5V [34,37,50,55,58,61,67] PC140
    D EV@2.2u/10V_4 PR210 *EV@0_5%_4 D
    3V_LDO

    PU10
    EV@US5650QQKI D1A 0608

    PC143 EV@1000p/25V_2 27 5650_VCC PR213 *Short_0201


    VCC OVRM_VCC

    FVDDQ_SENSE_V PR231 EV@75K_1%_2 5650_BSIN1 3 2 5650_SHP1 PR228 EV@100_1%_4


    BS_IN1 SH_IN_P1 FVDDQ_SENSE_V [70] CH1 FVDDQ VOLTAGE
    1 5650_SHN1 PR227 *Short_0402
    PC141 EV@1000p/25V_2 SH_IN_N1 FVDDQ_SENSE_I [70] CH1 FVDDQ CURRENT
    D1A 0608
    NVVDD_SENSE_V PR230 EV@75K_1%_2 5650_BSIN2 6 5 5650_SHP2 PR226 EV@100_1%_4
    BS_IN2 SH_IN_P2 NVVDD_SENSE_V [69] CH2 NVVDD VOLTAGE
    4 5650_SHN2 PR225 *Short_0402
    SH_IN_N2 NVVDD_SENSE_I [69] CH2 NVVDD CURRENT
    D1A 0608
    5650_BSIN1 PR218 *Short_0201 5650_BSIN311 12 5650_SH_P3 PR208 *Short_0201
    BS_IN3 SH_IN_P3
    13 5650_SHN3
    SH_IN_N3
    OVRM_VCC
    D1A 0608
    PR214 *Short_0201 5650_BSIN414
    BS_IN4 15 5650_SHP4 PR209 *EV@10K_1%_2
    SH_IN_P4 OVRM_VCC
    PR217 PC142 EV@0.015u/25V_4 16 5650_SHN4
    *EV@10K_1%_2 SH_IN_N4
    C
    Rb PR232 EV@_SP@357_1%_2 5650_SH01 32 C
    SH_O1 PR201 *EV@0_5%_2 PC134 *EV@47p/50V_2
    5650_EN PC144 EV@0.015u/25V_4 D1A 0608 OVRM_VCC
    Rb PR229 EV@_SP@357_1%_2 5650_SH02 7 20 PR202 *Short_0201 GPU_ADC_INP [21]
    SH_O2 DIFF_OUT_P
    3

    2 19 PR203 *Short_0201
    [57] TRI_EN# DIFF_OUT_N GPU_ADC_INN [21]
    PQ26 PR222
    EV@2N7002KW 10
    PR212 SH_O3 PR204 *EV@0_5%_2 PC135 *EV@47p/50V_2 EV@10K_1%_2
    1

    EV@100K_1%_2 30 5650_BSOK
    17 BS_OK
    SH_O4
    D1A 0608 PR223
    PC137 EV@1000p/50V_2 EV@49.9K_1%_2
    PR220 *Short_0201 5650_MUX 29
    [21] GPIO28_OC_WARN# MUX_SEL
    5650_CMREF_IN
    PR198 EV@365K_1%_2 PR196 EV@681K_1%_2
    PR216 EV@10K_1%_2 5650_EN 28
    ENABLE 23 5650_REFOUT
    BG_REF_OUT PR197 EV@324K_1%_2

    5650_SKIP 25 PR199
    SKIP Rc EV@90.9K_1%_2
    24 5650_BSREF
    BS_REF
    CUSTOM18

    CUSTOM21

    CUSTOM31

    3
    CUSTOM8

    PR205 PR206

    GND_FET
    EV@1K_1%_2 *EV@30.1K_1%_2 5650_MODE 26 2
    MODE 22 5650_CMREF_IN

    GND
    B CM_REF_IN PQ25 B

    1
    EV@METR3904-G
    PR211 PR207
    8

    18

    21

    31

    33

    9
    *EV@10K_1%_2 *EV@10K_1%_2 PC138 PC136 PR200 PC139
    +5V GND_FET EV@1000p/50V_2 EV@1000p/50V_2 EV@10K_1%_2 EV@1000p/50V_2

    PR221
    OVRM_VCC Ra *EV@0_5%_2
    5650_BSIN1 PR219 EV@487_1%_2

    5650_BSIN2 PR224 EV@487_1%_2

    Ra
    C1A 0428
    ON semi NCP45491 UPI US5650PQKI
    Default Setting
    N18P-G61/G62 MAX-Q & N19P-Q1 MAX-Q N18P-G61/G62 MAX-Q & N19P-Q1 MAX-Q

    PR219 PR219
    Ra 649 Ohm CS16492FB13 487 Ohm CS14871FE01
    PR224 PR224
    PR232 PR232
    Rb 475 Ohm CS14752FB11 357 Ohm CS13571FE01
    PR229 PR229
    A Rc PR197 243k Ohm CS42432FB02 PR197 324k Ohm CS43241FE01 A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    OVR-M (US5650PQKI) 1A
    Date: Tuesday, June 23, 2020 Sheet 73 of 77
    5 4 3 2 1
    5 4 3 2 1

    74
    D D

    C C

    B B

    A A
    Quanta Computer Inc.
    PROJECT : ZGI
    Size Document Number Rev
    1A
    Reverse
    Date: Tuesday, June 23, 2020 Sheet 74 of 77
    5 4 3 2 1
    5 4 3 2 1

    75

    D 8 D

    +5V_S5_TYPEC
    LOAD SW S5_ON enable
    JW7110DFNC_TRPBF
    VL PU17
    2
    P.61
    9 +5V
    MAINON enable
    +5VPCU LOAD SW
    3V_LDO enable JW7110DFNC_TRPBF +5V_S5
    PU11
    PU15 S5_ON enable +3V_SUS
    System Power +3VPCU
    AOSS32334C SUSD enable
    TPS51225RUKR 3V_LDO P.61
    PQ55
    P.63
    10
    LOAD SW +3V
    MAINON enable
    +3VPCU JW7110DFNC_TRPBF
    3V_LDO enable 17
    PU16 +3V_S5 PWM converter +2.5VSUS
    Power Tree Table S5_ON enable G5719CTB1U SUSON enable
    P.61
    C
    1 P.61 PU26
    C

    DDR_VTT 11 P.63
    AC PWM converter +1.8V_S5
    Smart MAINON enable
    Charger 3 M5671RE1U S5_ON enable
    P.67 18 PQ43 +1.8V
    BQ24780SRUYR +VDDQ LOAD SW
    PU28 +1.2VSUS +1.8V_AON MAIND enable
    DC P.60 MAINON enable 12 PU14 AO3404
    RT8231BGQW PWM converter 1V8_AON_EN enable
    P.67
    +1.2VSUS M5671RE1U
    PU29 P.72
    MAINON,SUSON enable
    19 PU13 +1.8V_MAIN
    P.63 13 +1V_GFX LOAD SW 1V8_MAIN_EN enable
    LDO +1V_GFX_EN enable JW7110DFNC_TRPBF
    4 +1V_S5 G9336ADJTP1U
    S5_ON enable P.72
    +1V_S5 P.73
    RT8237CZQW_2
    PU27 14 PQ29 +1.2V
    MAIND enable
    LOAD SW
    P.62 AO3404
    P.63
    5 +VCC_CORE
    15 +VCCIO
    B
    VRON enable LOAD SW B
    MAIND enable
    CPU POWER AONS32314
    NCP81215PMNTXG +VCC_SA PQ31
    NCP302045MNTWG*6 P.62
    VRON enable
    16 +1V_SUS
    LOAD SW
    +VCC_GT SUSON enable
    AO3404
    P.64, 65, 66 VRON enable
    PQ33
    P.62
    6
    GPU POWER NVVDD
    MP2886AGU-0130-ZJ+ NVVDD_CORE1_EN enable
    MP86903-CGLT-Z*6

    P.68, 69, 70

    7
    GPU POWER FBVDDQ_MEM
    RT8816BGQW FBVDD_EN enable
    A A

    P.71

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    POWER TREE TABLE
    Date: Tuesday, June 23, 2020 Sheet 75 of 77
    5 4 3 2 1
    5 4 3 2 1

    ACIN

    VCCRTC [PLATFORM]
    76
    RTCRST# [PLATFORM]

    EC_PWROK (SYS_PWROK) [EC]


    3VLDO/+3VPCU [PLATFORM]
    +5VPCU

    PLTRST# [PCH]
    NBSWON# TO EC [PLATFORM]

    D [PLATFORM] D
    CPU_SVID
    S5_ON FROM EC [EC]

    [PLATFORM]
    +3 V_S5/ VCCDSW_3P3/ CPU_SVID_ALERT#
    VCCPRIM_3P3 [PLATFORM]
    [ALL +3V_DEEP_SUS]
    VCCCORE [PLATFORM]
    +5 V_S5/ 5V_S5_TYPE C [PLATFORM]

    VCCGT [PLATFORM]
    +1.8V_S5 [PLATFORM]

    PLTRST_CPU# [PCH]
    +1V_S5 [PLATFORM]

    DNBSWON# [EC]

    RSMRST# [EC]

    DSW_PWROK [EC]

    SLP_S5# [PCH]

    C SLP_S4#/ (SUSC#) [PCH] C

    SLP_S3#/ (SUSB#) [PCH]

    DDR4_SUSON_2V5 [EC]

    SUSON [EC]

    MAINON [EC]

    +2.5VSUS/ (DDR_VPP) [PLATFORM]

    +1.2VSUS /(DDR_VDDQ) [PLATFORM]


    (+VCCPLL_OC)

    +1V_SUS/ [PLATFORM]
    (+VCCPLL/+VCCST)
    [PLATFORM]
    +3V_SUS

    +3V/ +5V [PLATFORM]

    B B

    +VCCIO/ +VCCSTG [PLATFORM]

    DDR_VTT [PLATFORM]
    Vinafix.com
    +1.2V [PLATFORM]

    +1.8V [PLATFORM]

    HWPG [PLATFORM] TO [EC]


    (ALL_SYS_PWRGD)

    VCCST_PWRGD [PLATFORM]

    VRON [EC]

    +VCCSA [PLATFORM]

    IMVP_PWRGD [PLATFORM]

    A PCH_PWROK [EC] A

    PROCPWRGD [PCH]

    EC_PWROK (SYS_PWROK) [EC] 120ms after HWPG

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    Power Sequence
    Date: Tuesday, June 23, 2020 Sheet 76 of 77
    5 4 3 2 1
    5 4 3 2 1

    Model Date CHANGE LIST


    ZGI REV:A 07/05 1. FIRST RELEASED
    D D

    ZGI REV:C1 08/20 1. Add U3 gen2 re-timer near PCH side


    2. Add IDCHG function
    3. Reverse RTC charge circuit
    4. Remove TBT BATLOW# signals to PCH
    5. Reverse discharge circuit

    C C

    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZGI
    Size Document Number Rev
    1A
    Change list
    Date: Tuesday, June 23, 2020 Sheet 77 of 77
    5 4 3 2 1

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