J Comput Electron (2018) 17:288–296

https://doi.org/10.1007/s10825-017-1041-4

Analytical modeling of gate-all-around junctionless transistor

based biosensors for detection of neutral biomolecule species
Yogesh Pratap1 · Manoj Kumar2 · Sneha Kabra1 · Subhasis Haldar3 ·
R. S. Gupta4 · Mridula Gupta2

Published online: 4 August 2017

© Springer Science+Business Media, LLC 2017

Abstract In recent times, FET-based sensors have been
widely used in industrial and domestic applications due to
their low cost and high sensitivity. In this paper, a nanogap-
embedded gate-all-around junctionless transistor (GAA JLT)
is proposed for label-free electrochemical detection of neu-
tral biomolecule species such as Uricase, Protein, ChOx,
APTES and Streptavidin. Shifts in subthreshold current,
threshold voltage and capacitance are used to predict the
response of the sensor. Impact of cavity width, cavity length,
and gate length on the sensitivity of a junctionless tran-
sistor has also been investigated in detail. An analytical
model has been developed for a GAA JLT-based biosen-
sor. The results are compared with an inversion mode
transistor-based biosensor using TCAD numerical simula-
tion. The GAA JLT shows very high sensitivity due to
the gate all around structure and bulk conduction mecha-
nism.
Keywords Sensor · Junctionless transistor (JLT) ·
Biomolecule species · Protein · Gate-all-around (GAA) ·
Protein

B Mridula Gupta
1 Introduction
mridula@south.du.ac.in
Yogesh Pratap
Since the invention of MOSFET, the CMOS industry has
yogi.pratap87@gmail.com been continuously facing the problem of formation of
source/drain to channel junctions. As the device dimensions
Manoj Kumar
manoj.uiet@gmail.com decrease, the complexity of fabrication feasibility increases.
Sneha Kabra
In the nanoscale regime, it is very hard to control p–n chan-
snehakabra1@gmail.com nel junctions [1–3]. Recently, a junctionless transistor (JLT)
[1–5] was introduced as a novel transistor which has uni-
Subhasis Haldar
subhasis_haldar@rediffmail.com form doping concentration in the source, channel and drain
regions and, therefore, there is no formation of p–n junctions.
R. S. Gupta
rsgupta1943@gmail.com The fabrication problem due to diffusion of the impurities
is completely removed [6,7]. Due to uniform doping, the
1 Department of Instrumentation, Shaheed Rajguru College of working principle of JLT is quite different than the inversion
Applied Science for Women, University of Delhi,
mode transistor. A high work-function difference between
New Delhi 110096, India
2
the metal gate and the channel is used to deplete carriers in
Semiconductor Device Research Laboratory, Department of
Electronic Science, University of Delhi South Campus,
the channel [8]. At flat band condition, the entire channel
New Delhi 110021, India region becomes neutral and bulk current flows in that neutral
3 region. Therefore, a junctionless transistor has bulk conduc-
Motilal Nehru College, University of Delhi,
New Delhi 110021, India tion in spite of surface conduction. It has been observed that
4 a junctionless transistor has superior short channel effects
Department of Electronics and Communication Engineering,
Maharaja Agrasen Institute of Technology, (SCEs) immunity than an inversion mode transistor [1–
New Delhi 110086, India 10].

123
J Comput Electron (2018) 17:288–296 289

Fig. 1 Size of biological

species for the characterization
and electrical detection using
FET devices

Apart from device miniaturization, there is an increasing

demand of establishing conventional clinical laboratories in
rural, remote areas and military fields for the label-free, fully
electronic detection of biomolecule species. FET-based sen-
sors can detect the molecules, which are in nanometer size.
They offer higher sensitivity, label-free electronic detection
and mass production. Figure 1 demonstrates the size of var-
ious biological species. Therefore, in order to detect such
small chemical or biological species, the detecting device
must have a smaller feature size to provide the adequate sens-
ing level.
Silicon-based inversion mode MOSFETs have already
been demonstrated for ultrasensitive detection of DNA [11],
proteins [12] and pH levels [13,14]. Buitrago et al. [15] have
recently proposed junctionless transistors with SOI structure
for low power sensors. The junctionless transistor can fulfill
the requirement of high sensitivity with low power dissipa-
tion and high fabrication feasibility. Apart from this, various
other non-classical structures such as double gate, tri-gate,
omega gate and gate-all-around have also been investigated
in detail. These gate-all-around shows the superior gate con-
trollability. Therefore, gate-all-around (GAA) structure with Fig. 2 a 3-D view and b cross-sectional view of GAA-JNT with
a junctionless transistor has been proposed for the first time nanogap cavity
to detect the neutral biomolecule species. Analytical mod-
eling is very crucial to understand the device physics and
operation of novel gate-all-around junctionless transistor for the dielectric. The structure is quite similar to gate-stack.
sensor applications. In this paper, a full-range drain current Therefore, the presence of neutral biomolecules are sim-
model has also been developed for GAA-JLT based biosen- ulated by introducing material with a dielectric constant
sors. corresponding to neutral biomolecules such as Uricase =
1.54 [18], streptavidin = 2.1 [19], protein = 2.50 [20], ChOx
(cholin oxidase) = 3.30, and APTES = 3.57 [21], with-
out cavity (Air) = 1 and SiO2 = 3.9. Streptavidin is a
2 Simulation procedure and calibration tetrameric protein purified from streptomyces avidinii that
binds very tightly to the vitamin biotin while protein is any
A silicon substrate with SiO2 as a sacrificial layer is used in of numerous large, complex naturally-produced molecules
GAA JLTs. The device is simulated using TCAD ATLAS-3D composed. This compound molecule has one or more long
device simulator [17]. Figure 2a, b shows 3-D and cross- chains of amino acids, in which the amino acid groups are
sectional view of JLT with nanogap cavity region. Length of held together by peptide bonds. Therefore, streptavidin has
metal gates are taken in such a way that L 1 is SiO2 length a different dielectric constant than protein.
and L 2 is nanogap cavity length. In order to account for the recombination of minor-
Neutral species sensing (Protein) The neutral biomolecules ity carriers within the drift/diffusion approximation, the
do not react with the SiO2 interface, and they only introduce Shockley-Read-Hall (SRH) model along with the Boltz-

123
290 J Comput Electron (2018) 17:288–296

Fig. 3 a Calibration for simulation results at Vds = 1 V with experimental results [6]. b Model/method and assumption of changing gate dielectric
is calibrated with experimental results from [16]

mann transport model have been used. The concentration 1 ∂ ∂2 ∂2 q ND

ϕi (r, z) + 2 ϕi (r, z) + 2 ϕi (r, z) = − ,
dependent lifetime is used in the SRH model. A junction- r ∂r ∂r ∂z εSi
less transistor has high channel doping, which affects the i = 1 for region-I i = 2 for region-II. (1)
band gap and mobility. To incorporate this in simulation, a
band gap narrowing (BGN) model along with a concentration ϕi (r, z) is the potential distribution in channel, ND is sili-
dependent mobility (CONMOB) model and a carrier-carrier con film doping density and εSi is the permittivity of silicon.
scattering (CCSMOB) model have been used. The CVT Super position technique is used to solve the above equation.
mobility model has also been used, because it considers par- Here the electrostatic potential ϕi (r, z) is decomposed into
allel and perpendicular field dependent mobility. To account two parts; Vi (r ) and Ui (r, z) such as:
for non-local transport effects, such as velocity overshoot
and the dependence of impact ionization rates on carrier
ϕi (r, z) = Vi (r, z) + Ui (r, z) for i = 1 and 2. (2)
energy distributions, the energy balance transport model is
used for the calibration of model/method used in TCAD sim-
ulation as shown in Fig. 3a with the available experimental Using Eq. (2), the Eq. (1) can be written as
data for a junctionless transistor. The assumption of neutral
molecules can be modeled by changing the gate dielectric 1 ∂ Vi (r ) ∂ 2 Vi (r ) q ND
+ = −ξ where ξ = i = 1, 2
that is already experimentally proven by Hyungsoon et al. r ∂r ∂r 2 εSi
[16]. This approach has been calibrated with the experimen- (3)
tal result [16]. 1 ∂Ui (r, z) ∂ 2 Ui (r, z) ∂ 2 Ui (r, z)
+ + = 0. (4)
r ∂r ∂r 2 ∂z 2

The 1D potential, Vi (r ), can be can be calculated by using

boundary conditions mentioned in [2,3,22] and is expressed
3 Model formulation as

3.1 Potential model ξ ξt2 ξ tSi εSi

Vi (r ) = − r 2 + Vgs − Vfbi + Si + , (5)
4 16 4CGAAi
In a junctionless transistor, a higher metal gate workfunction
and a small channel radius is employed so that the channel
where Vgs is the gate voltage. tSi is the silicon film thickness.
can be easily depleted by the metal gate. It is assumed that
CGAAi is the gate oxide capacitance per unit area of gate-all-
the gated portion of the silicon film is fully depleted. In the
around MOS structure and is given by
analytical expression for the potential distribution, the silicon
film is divided into two different regions as shown in Fig. 2b.
2εox
It is assumed that the Si–SiO2 interface is free of trap charges. CGAAi =  . (6)
The Poisson’s equation for the device is written as; tSi ln 1 + 2toxeffi
tSi

123
J Comput Electron (2018) 17:288–296 291

εox is the dielectric permittivity of silicon di-oxide. toxeffi is The Poisson’s equation (1) is modified according to the
the effective thickness of dielectrics and given as: source depleted region

toxeff1 = t1 (SiO2 ) + t2 (SiO2 ) for region-I (7) ∂2

ϕSD (z) = −ξ. (14)
εox ∂z 2
toxeff2 = t1 (SiO2 ) + t2 (Biomolecule-Species)
εbs
region-II. (8) Here, ϕSD (z) is the potential distribution at source depleted
region. Using an appropriate boundary condition, the Eq. (14)
can be written as
Vfb is the flat band voltage given as
  ξ
E g (T, ND ) ϕSD (z) = VR − (z + lSD )2 for −lSD < z < 0. (15)
Vfb =  M1 − χSi + − qφf . (9) 2
2
Here, VR is the reference potential. Similarly, the potential
Here, φf is the Fermi potential of the channel, χSi is the elec- at the drain depleted region is
tron affinity and E g (T, ND ) is the doping and temperature
ξ
dependent silicon band gap energy given as: ϕDD (z) = VR + Vds − (z − L 1 − L 2 − lDD )2
2
for (L < z < L + lDD ) . (16)
E g (T, ND ) = E g (300 K)
 
(300 K)2 T2 Coefficients of Eq. (12) are determined by using the follow-
+E gα − − E g (ND ) . (10)
300 K + E gβ T + E gβ ing boundary conditions.

Here, E g (300 K) is the energy band gap at 300 K and E gα = (a) The electrostatic potential at the source and drain end is
4.73 × 104 eV/K, E gβ = 636 K. E g (ND ) is the amount of
band gap narrowing energy due to high doping and can be 2
q ND lSD
calculated as [19]: ϕ1 (r, z) |z=0 = VR − (17)
2εSi
⎧  2
q ND lDD
 
1 ⎫ ϕ2 (r, z) z=L 1 +L 2 = VR + Vds − (18)
⎨ N  ND
2 2⎬ 2εSi
D
E g (ND ) = β E × ln + ln + βC ,
⎩ βN βN ⎭
(b) Potential and electric field at z = L 1 is
(11)  
ϕ1 (r, z) z=L 1 = ϕ2 (r, z) z=L 1 (19a)
 
where β E = 6.92 meV, β N = 1.3×1017 cm−3 and βC
= 0.5. {ϕ1 (r, z)} z=L = {ϕ2 (r, z)} z=L
1 1 (19b)
The solution of the 2-D Laplace equation can be obtained
in the form of a Fourier–Bessel series [22] by the eparation Using above Eqs. (17)–(19), the resultant expression for coef-
of variable method, ficients An1 , An2 , Bn1 and Bn2 , are expressed as
     
∞
   
K ni z
 
K z
 KL
2 − l 2 e KaL
τ1 − η2 d S2 sinh KaL − τ1 e a + τ4 − τ2 lDD
K ni r − ni SD
Ui (r, z) = J0 Ani e a
+ Bni e a
An1 =  
a 2 sinh KaL
n=1
for 0 < z < L , (12) (20)
KL
 
τ1 e − τ4 + τ2 lDD
a 2 − l 2 e KaL
SD
Bn1 =   (21)
where a = tSi /2 and Ani , Bni are the coefficients. K n1 K n2 2 sinh KaL
are the eigenvalues calculated from the following equation τ2
An2 = An1 − exp {− (K L 1 /a)} (22)
2
τ2
a J0 (K ni ) − CGAAi εSi K ni J1 (K ni ) = 0, i = 1 and 2. (13) Bn2 = Bn1 + exp (K L 1 /a) . (23)
2

In a junctionless transistor, due to the same doping
throughout the silicon film, the depletion region in the gated
portion extends for a length lSD and lDD into the source and
drain regions. To calculate the potential in the source/drain
depleted region, it is assumed that the electrostatic potential
is independent of r in source/drain depleted regions.
Coefficients of Eqs. (20)–(23) are given in the Appendix.
3.2 Drain current model
The drain current of each region is calculated separately.
The drain current below threshold voltage is calculated by

123
292 J Comput Electron (2018) 17:288–296

integrating the current density through the circular cross-

sectional area for the total depleted channel length [22–24]:

 
−q
 
Vds
ISub = μeff tSi kT π n i 1 − e kT

 L   a 
qϕ(r,z)
1 e kT dr dz, (24)
0 0

where μeff is the doping dependent effective mobility [19],

T is the thermal temperature, n i is the intrinsic carrier
concentration, and k is Boltzmann’s constant. Constant cur-
rent method is used to calculate threshold voltage (Vth ) of
the device, i.e., Vgs = Vth for which subthreshold current
(Isub ) = 0.05 µA. For linear region current, Idlin1 and Idlin2
are treated as drain current of a gate-all-around junctionless
transistor in region-I and region-II with channel length L 1 Fig. 4 Impact of neutral biomolecules on the center potential of a gate-
and L 2 and an applied drain to source voltage equal to VD1 all-around junctionless transistor (GAA JLT)
and (Vds − VD1 ) respectively. The current in each region is
calculated separately [25–27] and are given as

 
2πaμeff Cf1 E c  α θshort VD1
2
Idlin1 = Vgs − Vths 2 VD1 −
(E c L 1 + VD1 ) 2
for 0 ≤ z ≤ L 1 (25)
2πaμeff Cf2 E c
Idlin2 =
(E C L 2 + VDS − VD1 )
  2 
 α θshort VDS − V 2
D1
Vgs − Vths 2 (Vds − VD1 ) −
2
for L 1 ≤ z ≤ L 1 + L 2 . (26)

Here, the fitting parameter (α) is varied from 1 to 1.5. Short

channel effects have been incorporated in the drain current Fig. 5 Impact of neutral biomolecules on the drain current of a gate-
model by using parameters θshort , Vths and critical field (E C ) all-around junctionless transistor (GAA JLT)
and are given as;

  where
θshort = 0.1/ ∂ϕC min (0, z min )/∂ Vgs at Vgs = Vth (27)
Vths = Vth (1 − θshort ) (28) θshort L 2
β1 = β3 L 1 + (31)
E C = 2Vsat /μeff . (29) 2
 α/2
β2 = Vgs − Vths (32)
Vsat is the saturation velocity. In order to obtain an unique θshort
β3 = . (33)
value of drain current in the device, these two currents are 2
equated to each other (Idlin1 = Idlin2 ) at z = L 1 leading to a
quadratic equation. The solution of the quadratic equation gives the value of VD1 ,
which is then substituted in any of the Eqs. (25) and (26) to
obtain the final linear region drain current.
β3 The drain current in the saturation region is calculated
β1 VD1
2
−β2 (L 1 + L 2 ) VD1 + VD1 VDS (VDS − VD1 ) = 0,
E C2 using the saturation velocity of electrons (Vsat ) by replacing
(30) Vds to Vdsat which is given as:

123
J Comput Electron (2018) 17:288–296 293

Fig. 6 Impact of nanogap cavity width on the drain-off sensitivity parameter (SIoff )

π tSi μeff CGAA3 it can be seen that as the dielectric constant of neutral
Idsat =  
1 + VEdsat
cL
(L − L sat ) biomolecule increases, both on current and off current
⎛  α ⎞ increases. The off-current shows higher sensitivity than the
θshort Vdsat
2
β V − V V − + on-current because the change in dielectric is more effective
⎝  gs ths

dsat
 q 2  ⎠ , (34)
kT
θshort 1 − exp − (V ds − Vdsat ) below threshold voltage. Uricase in the cavity region shows
q kT
higher changes in drain-off current with the reference device
(without cavity). Whereas APTES shows the maximum sen-
where β is a technologically dependent empirical fitting sitivity (almost two decades) when it is compared to the air
parameter. L sat is the characteristic length of the velocity filled cavity region. The figure also demonstrates that the
saturation region and Vdsat is the drain saturation voltage and combination of gate-all-around structure with a junctionless
are given as: transistor shows good sensitivity. For better sensitivity, the
      device should be operated in the subthreshold region.
Vdsat = Vgs − Vth / 1 + Vgs − Vth μeff /Lvsat . (35) Figures 6 and 7 show the drain-off sensitivity (SIoff )
parameter versus nanogap cavity width and nanogap cav-
ity length, respectively. The change in off-current is higher
4 Results and discussion than the change in on-current due to presence of neutral
biomolecules, therefore a new figure of merit SIoff is intro-
4.1 Sensitivity of GAA JLT for neutral species detection duced and defined as:

Figure 4 shows the impact of neutral biomolecule species Ioff (With Biomolecule Species) 
SIoff = at Vgs = 0V .
on the center potential profile of GAA JLT. The cavity of Ioff (Without Biomolecule Species) 
25 nm is considered near the drain end. A higher variation (36)
in potential is seen when different biomolecules are filled in
the cavity region. This indicates that the GAA junctionless Figure 7 demonstrates that drain-off current sensitivity
device is a better candidate for sensing applications. (SIoff ) is increased with the increase of both nanogap cav-
Figure 5 illustrates the impact of neutral biomolecule ity width and nanogap cavity length. A drastic increase in
species on transfer characteristics of GAA JLT. From Fig. 5, SIoff is observed when the cavity length is increased. This is

123
294
Fig. 7 Variation of nanogap cavity length on drain-off current sen-
sitivity parameter for a gate-all-around junctionless transistor for the
detection of neutral biomolecules
Fig. 8 Sensitivity parameter (SIoff ) for Inversion mode and junction-
less mode gate-all-around MOSFET
because of the higher oxide surface area is affected by these
biomolecules.
Figure 8 shows a comparison of sensitivity parameters for
inversion mode and junctionless mode MOSFET. To com-
pare the results of these two devices, threshold voltage of
both the devices is kept the same. All other parameters such
as channel length, cavity length, pillar radius, etc., are also
kept the same for both the devices. From the Fig. 8, it is clearly
seen that the sensitivity SIoff parameter is much higher in the
junctionless case compared to the inversion mode case. In a
junctionless transistor, the subthreshold current (leakage cur-
rent) is totally dependent on the high vertical electric field.
That vertical electric field is created by oxide capacitance.
Due to this, a junctionless transistor has a bulk conduction
mechanism in spite of the surface conduction mechanism. If
there is any variation in the dielectric permittivity, it directly
affects the leakage current. Therefore, a junctionless transis-
tor shows tremendous improvement in terms of the sensitivity
parameter as compared with the inversion mode MOSFET.
123
J Comput Electron (2018) 17:288–296
Fig. 9 Shift in threshold voltage with neutral biomolecules versus vari-
ation in nanogap cavity for GAA JLT
Fig. 10 Shift in gate-to-source capacitance with neutral biomolecules
for GAA JLT
Figure 9 shows the shift in threshold voltage versus varia-
tion of nanogap cavity width in the presence of biomolecules.
Threshold voltage is a key parameter for any device as vari-
ation in threshold voltage directly affects the entire device
operation. Hence, threshold voltage is used to sense the
neutral biomolecule. From the figure it can be seen that
the threshold voltage strongly depends on the cavity width.
For Uricase: the threshold voltage changes 40 mV when
cavity width is increased from 2 to 4 nm. Therefore, for bet-
ter threshold voltage sensitivity, the cavity width should be
larger.
All the existing FET-based sensors are based on the either
drain current sensitivity parameter or the threshold voltage
sensitivity parameter, because drain current and threshold
voltage can easily be measured for a device. Apart from these
device parameters, capacitance can also be easily measured
with better accuracy. Hence, the effect of the presence of
biomolecules on gate-to source capacitance has also been
J Comput Electron (2018) 17:288–296 295

studied. From the Fig. 10, it is shown that the neutral References
biomolecules effectively change the gate capacitance of the
device. Change in capacitance is higher in linear regions com- 1. Wong, H.S.P.: Beyond the conventional MOSFET. In: Proceeding
of 31th European Solid State Device Research Conference, p. 69
pared to sub-threshold regions. The presence of biomolecules
(2011)
alters the gate source capacitance of GAA JLT. Therefore, 2. Lion, Y.B., Chaing, M.H., Damrongplasit, N., Hsu, W.C., Liu,
it would be better to make a capacitance based bio-sensing T.J.K.: Design of gate-all-around silicon MOSFETs for 6-T SRAM
device than with the other electrical parameters. area efficients and yield. IEEE Trans. Electron Devices 61(7),
2371–2377 (2014)
3. Kaushal, G., Manhas, S.K., Maheshwaram, S., Anand, B., Das-
gupta, S., Singh, N.: Novel design methodology using LEXT sizing
in nanowire CMOS logic. IEEE Trans. Electron Devices 13(4),
650–658 (2014)
5 Conclusion 4. Lee, C., Zhuang, Y., Di, S., Han, R.: Subthreshold behavior models
for nanoscale short-channel junctionless cylindrical surrounding-
gate MOSFETs. IEEE Electron Device Lett. 60(11), 3655–3662
A physics-based full-range drain current model has been (2013)
developed for GAA JLTs for the detection of neutral 5. Nayak, K., Bajaj, M., Konar, A., Oldiges, P.J., Natori, K., Iwani,
biomolecule species. The model accurately predicts the H., Murli, K.V.R.M., Rao, V.R.: CMOS logic device and circuit
behavior of the device. From the results, it is concluded performance of Si gate all around nanowire MOSFET. IEEE Trans.
Electron Devices 61(9), 3066–3074 (2014)
that the GAA JLT shows better sensitivity than the inversion 6. Wang, T., Lou, L., Lee, C.: A junctionless gate-all-around silicon
mode GAA MOSFET. The sensitivity of the device increases nanowire FET of high linearity and its potential applications. IEEE
with the increase of nanogap cavity width and cavity length. Electron Devices Lett. 34(4), 478–480 (2013)
The capacitance-based sensing is more effective than the 7. Lee, C.W., Borne, A., Ferain, I., Afzalian, A., Yan, R., Akha-
van, N.D., Razavi, P., Colinge, J.P.: High-temperature performance
threshold voltage or drain current-based sensing. It can be of silicon junctionless MOSFETs. IEEE Trans. Electron Devices
concluded that for better drain current sensing, the device 57(3), 620–625 (2010)
should be operated in the subthreshold region; however, for 8. Doria, R.T., Pavanello, M.A., Trevisoli, R.D., Souza, M., Lee, C.W.,
capacitance-based sensing, the device should be operated in Ferain, I., Akhavan, N., Yan, R., Razavi, P., Yu, R., Kranti, A.,
Colinge, J.P.: Analog operation temperature dependence of nMOS
the linear region. junctionless transistors focusing on harmonic distortion. J. Integr.
Circuit Syst. 6(5), 114–120 (2011)
Acknowledgements That authors would like to thank the University 9. Mathew, L., Du, Y., Thean, A.V.Y., Sadd, M., Vandooren, A., Prher,
Grant Commission (UGC) and DRDO, Govt. of India. C., Steehehens, T., et al.: CMOS vertical multiple independent gate
field effect transistor (MIGFET). In: Proceeding of IEEE Interna-
tional SOI Conference, pp. 187–189 (2004)
10. Mathew, L., Du, Y., Kalpat, S., Sadd, M., Zavala, M., et al.: Multiple
independent gate field effect transistor (MIGFET)—multi-fin RF
mixer architecture, three independent gates (MIGFET-T) operation
Appendix and temperature characteristics beyond the conventional MOSFET.
In: Proceeding of 31th Symposium on VLSI Technology Digest of
Coefficients of Eqs. (20)–(23) are given as; Technical Papers Conference, pp. 200–201 (2005)
11. Rostami, M., Mohanram, K.: Dual-Vth independent gate FinFets
for low power logic circuits. IEEE Trans. Electron Devices 58,
567–571 (2011)
2 12. Xiang, L., Chen, Z., Shen, N., Singh, N., Banerjee, K., Lo, G.Q.,
η1 =   (A1) Knong, D.L.: Vertically stacked and independently controlled
a2 J12 (K ) + J02 (K ) twin-gate MOSFETs on a single silicon nanowire. IEEE Electron
Devices Lett. 32(11), 1492–1494 (2011)
a 2 η1lSD
2 ξ J (K )
1
η2 = (A2) 13. Zhang, J., Gaillardon, P.E., Micheli, G.: Dual-threshold voltage
2K configurable circuits with three independent gate silicon nanowire
 
a η1 J1 (K )
2 qa ND FETs. IEEE Trans. Electron Devices 58, 567–571 (2013)
τ1 = VR − Vgs + Vfb1 − 14. Jeon, D.Y., Park, S.J., Mouis, M., Barraud, S., Kim, G.T., Ghibaudo,
K 2CGAA1 G.: Low-temperature electrical characterization of junctionless
a 4 η1 ξ J2 (K ) transistors. Solid State Electron. 80, 135–141 (2013)
− (A3) 15. Colinge, J.P., Lee, C.W., Afzalian, A., Akhavan, N.D., Yan, R.,
2K 2
Ferain, I., Razavi, P., Neill, B.O., Blake, A., White, M., Kelleher,
a 3 η1 ξ J1 (K ) A.M., McCarthy, B., Murphy, R.: Nanowire transistors without
τ2 = (A4)
K2 junctions. Nat. Nanotechnol. 5(3), 225–229 (2010)
  16. Hyungsoon, I.M., Huang, X.-J., Gu, B., Choi, Y.-K.: A dielectric-
a 2 η1 J1 (K ) qa ND
τ4 = VR + Vds − Vgs + Vfb2 − modulated field-effect transistor for biosensing. Nat. Nanotechnol.
K 2CGAA2 2, 430–434 (2007)
a 4 η1 ξ J2 (K ) 17. Ghosh, D., Parihar, M., Armstrong, G., Kranti, A.: High-
− . (A5) performance junctionless MOSFETs for ultralow-power ana-
2K 2

123
296
log/RF applications. IEEE Electron Device Lett. 33(10), 1477–
1479 (2012)
18. Doria, R.T., Pavanello, M., Trevisoli, R.D., Souza, M., et al.: Junc-
tionless multiple-gate transistors for analog applications. IEEE
Trans. Electron Devices 58(8), 2511–2519 (2011)
19. Pratap, Y., Haldar, S., Gupta, R.S., Gupta, M.: Localised charge
dependent threshold voltage analysis of gate-material-engineered
junctionless nanowire transistor. IEEE Trans. Electron Devices 62,
2598–2605 (2015)
20. Moon, D.I., Choi, S.J., Duarte, J.P., Choi, Y.K.: Investigation of
silicon nanowire gate all around junctionless transistors built in
bulk substrate. IEEE Trans. Electron Devices 60(4), 1355–1359
(2013)
21. Pratap, Y., Haldar, S., Gupta, R.S., Gupta, M.: Performance evalu-
ation and reliability issues of junctionless CSG MOSFET for RFIC
design. IEEE Trans. Device Mater. Reliab. 14(1), 418–425 (2014)
22. ATLAS 3D Device Simulator . SILVACO Int., Santa Clara (2014)
23. Cong, L., Yiqi, Z., Ru, H.: New analytical threshold voltage model
for halo-doped cylindrical surrounding-gate MOSFETs. J. Semi-
cond. 32(7), 1–8 (2011)
123
J Comput Electron (2018) 17:288–296
24. Chiang, T.K.: A compact model for threshold voltage of
surrounding-gate MOSFETs with localised interface trapped
charges. IEEE Trans. Electron Devices 58, 567–571 (2011)
25. Pratap, Y., Ghosh, P., Haldar, S., Gupta, R.S., Gupta, M.: An analyt-
ical subthreshold current modeling of cylindrical gate all around
(CGAA) MOSFET incorporating the influence of device design
engineering. Microelectron. J. 45(4), 408–415 (2014)
26. Choi, S.J., Moon, D.I., Kim, S., Duarte, J.P., Choi, Y.K.: Sensitivity
of threshold voltage to nanowire width variation in junctionless
transistors. IEEE Electron Device Lett. 32, 125–132 (2011)
27. Kumari, V., Saxena, M., Gupta, R.S., Gupta, M.: Two-dimensional
analytical drain current model for double-gate MOSFET incor-
porating dielectric pocket. IEEE Trans. Electron Devices 59(10),
2567–2574 (2012)