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Automotive Mechatronic Research Center

Advance Diploma in Automotive Mechatronics
Time Table w.e.f 19/08/2019
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SUMIT
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ASB / SUMIT ASB RHB RHB / SUMIT

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(ADAM Coordinator) (ADAM Advisor) (ADAM Director / Principal)

ATAL FDP exam - High performance mixed signal IC design
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Antenna effect in layout is

5 points

Electromagnetic radiation due to long interconnects

Damage to gate dielectric due to charge collected during plasma etching process
Effect of Inductance of loops formed in metal layers on circuits
None of the above

Clear selection

Channel length modulation in MOSFETs results in

5 points

Reduction in transconductance (gm)

Increase in output conductance (g0)
Reduction in gain
Decrease in threshold voltage

Which of the following are the desirable characteristics of In-Amp?

5 points

Low DC offset
Low drift
High open loop gain
All of the above

Clear selection

The switched capacitor based current mirror offers

5 points

very high output impedance

very good mirror accuracy
low noise in output current
All of the above

Clear selection

Line coding in a serial link is used to

5 points

reduce power consumption

increase activity factor to make clock recovery easy
reduce errors due to intersymbol interference
enable error correction at the receiver

Clear selection

Input impedance of following CMOS opamp based amplifier is

5 points

R1
0
Infinite
R1+R2

Clear selection

Why is Miller compensation not preferred for stabilising common mode feedback loop?
5 points

It is not possible to use miller capacitor for Common mode feedback loop due to low gain
It reduces the bandwidth of amplifier for differential signals
It reduces the Common mode rejection ratio of the amplifier
It results in poor phase margine

Which of the following are techniques of reducing noise in circuits

5 points

Shielding
Fingering of transistors
Power supply decouping capacitors
Substrate contact ring around active circuits
Substrate contacts
Why is it difficult to have ESD protection on high speed I/O pins
5 points

The ESD protection diodes will cause reflection in transmission lines used for high frequency signals
The high capacitance of ESD diodes limit the bandwidth of the pins
ESD diodes result in non linearity which is difficult to compensate at high speeds
All of the above

Which of the following is a binary phase detector

5 points

None of the above

All the three options given are binary phase detectors.
XOR gate based phase detector
Hogge phase detector
Alexander phase detector

Bootstrap sampling switch gives

5 points

Constant on resistance for the sampling switch

Zero charge injection error
Constant charge injection error
Zero clock feedthrough
Constant error due to clock feedthrough

Latchup in CMOS processes refers to

5 points

D Latch circuits which sometimes get latched permanently to 1 or 0 due to manufacturing defects
Turning on of thyristor formed by parasitic BJT's in the substrate
Failure of latch based memories due to drop in VDD
None of the above

Which amplifier configuration is noisiest

5 points

Symmetric opamp
Simple 1 stage differential amplifier
Telescopic cascode
Folded cascode

In the common mode feedback circuit shown, transistors M1 M2, M3 and M4 should be biased in
5 points

Saturation - so that CMFB loop gain is high

Linear - so that current mirror bias point adjusts based on the output common mode
Subthreshold - as CMFB loop needs very high gain but speed is not important.

The low leakage sample and hold circuit shown below is based on the principle of
5 points

having a Freewheeling diode for providing a discharge path to the leakage current
Improved linearity of sampling switch achieved by driving the body of mosfet with output voltage.
Positive feedback for generating reverse leakage current for cancellation
Maintaining zero potential difference across the leakage impedance path

Miller capacitor is used for compensation of 2 stage opamp because

5 points

we need a feedforward zero in addition to the pole splitting

it is desirable to keep the required value of capacitor small
It is difficult to implement grounded capacitors in CMOS processes
it gives best phase margine for given bandwidth

The accuracy of Transmission gate based switch is limited by

5 points

Matching between threshold voltage of NMOS and PMOS FETs

All of the above
Accuracy of timing of Clock and Clock_bar
Variation in on resistance with input voltage

Non linearity of common detector results in

5 points

Degradation of common mode rejection ratio

Non linearity in differential mode output
Common mode noise at the output
Degradation of power supply rejection ratio

Which common mode detector is best in terms of linearity

5 points

Complementary source follower buffer based common mode detector

Switched capacitor common mode detector
Resistive common mode detector
Source follower buffered resistive common mode detector
Summing amplifier based common mode detector

Bottom plate sampling results in

5 points

Zero clock feedthrough

Fixed offset error due to charge injection
Very low leakage from sampling capacitor
Zero charge injection error

Source drain sharing in MOS layout gives

5 points

Compact layout
Better matching of threshold voltages
Low parasitic capacitance
Low resistance of source and drain regions

In conventional bandgap voltage reference following feedback is stronger

5 points

Positive
Negative
Both are equal
None of the above

When we use a MOS sampling switch, clock feed-through introduces an error that is
5 points

a leakage current from the hold capacitor

an input dependent non linear error at the output
A non-linear error at the output, but not dependent on the input
a fixed offset error at the output

Which of the following is/are sources of error in conventional Bandgap voltage reference
5 points

Current mismatch
Resistor mismatch
Opamp offset
All of the above

Cellphone addiction results in behavioural changes like

5 points

Impulsiveness
Irritability
poor communication
All of the above

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