9814
10, OCTOBER 2019
An Integrated Step-Up Inverter Without Transformer
and Leakage Current for Grid-Connected
Photovoltaic System
Xuefeng Hu , Penghui Ma , Benbao Gao , and Meng Zhang
Abstract—In this paper, an integrated step-up inverter without
transformer is investigated for photovoltaic (PV) power generation.
The proposed topology can be derived by combining a traditional
boost converter with a single-phase full bridge dc–ac converter. The
main features of the integrated inverter are: First, the leakage cur-
rent caused by the solar cell array-to-ground parasitic capacitance
can be theoretically reduced to zero due to the characteristics of
the converter configuration, which can improve the efficiency and
the reliability of the PV generation system; second, the output ac
voltage of the proposed inverter can be higher than the input dc
voltage, which is capable of connecting low voltage PV panels to
the grid; third, only five active switches are used in the presented
inverter, and those switching devices can be synchronously driven
by various sinusoidal pulsewidth modulation methods based on
the carrier; therefore, the proposed inverter is compact and with
curtailed cost. The working principle and analysis of the proposed
integrated inverter are elaborated. Finally, simulation and exper-
imental results are obtained in a lab prototype, which agree well
with the theoretical analysis.
Index Terms—Integrated step-up inverter, leakage current elim-
ination, photovoltaic (PV), transformer-less.
I. INTRODUCTION
N RECENT years, renewable energy sources, such as wind
I power, photovoltaic (PV), fuel cells, etc., have experienced
a great development mainly due to the growing concern about
global warming, more energy consumption, and less fossil en-
ergy. Among these renewable energy sources, solar power gen-
eration system or distributed generation system based on PV
is becoming very popular because of its inexhaustibility, easy
availability, and pollution-free operation, which will be up to
Manuscript received August 6, 2018; revised November 26, 2018; accepted
January 9, 2019. Date of publication January 25, 2019; date of current version
June 28, 2019. This work was supported in part by the National Natural Sci-
ence Foundation under Project (51577002), in part by the Top-Notch Personnel
Foundation of the Anhui Higher Education Institutions of China under Grant
(gxbjZD13), in part by the Anhui Provincial Natural Science Foundation under
Grant (1408085ME80), and in part by the Natural Science Foundation of Anhui
Education Committee under Grant (KJ2012A048). Recommended for publica-
tion by Associate Editor R. C. N. Pilawa-Podgurski. (Corresponding author:
Xuefeng Hu.)
The authors are with the Anhui Key Laboratory of Power Electron-
ics and Motion Control Technology, College of Electrical and Electronic
Engineering, Anhui University of Technology, Ma’anshan 243002, China
(e-mail:, hxu-123@163.com; 1084605901@qq.com; 2412490363@qq.com;
2359252193@qq.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2019.2895324
0885-8993 © 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO.
60% of the total energy by the end of this century, according to
[1]–[3].
In general, there is a line frequency or a high-frequency trans-
former for providing galvanic isolation between the PV array
and the grid in grid-connected PV inverters. However, the line
frequency transformer makes the PV generation system bulky
and the high-frequency transformer makes the PV generation
system more complex. At the same time, the use of a transformer
has an impact on the efficiency of the system. In recent years,
many scholars began to study PV inverters without transform-
ers [5]–[30]. For a conventional grid-connected PV generation
system without transformers, there are usually two schemes for
the power converter structure as follows. One is a single-stage
typical full bridge inverter in which multi-string PV panels are
connected in series to meet the dc bus voltage because the direct
output voltage of a PV panel is relatively low. However, the
dc bus voltage may be appreciably affected by shadows or the
breakage of one of the multi-string PV panels. The other is a
two-stage PV generation system consisting of a front end boost
dc–dc converter and a back stage inverter, and this structure
has good flexibility. But the association of a two-stage power
inverter will result in high cost, low global efficiency, and com-
plex control. In [5] and [6], a single-stage boost dc/ac inverter
based on Z source and quasi Z source impedance network is
introduced, which can output the ac voltage higher than the dc
input source voltage. However, these transformer-less inverters
may suffer the risk of leakage current between the PV array and
the ground due to the PV parasitic capacitor. Usually, there are
several main factors affecting the leakage current in transformer-
less PV inverters—the value of the parasitic capacitance of PV
to the ground, the special circuit structure, and the modulation
method. In [10]–[14], single-phase inverters named H5 and H6
are researched to reduce the leakage current. The H5 inverter
consists of a basic full bridge with an upper switch operating at
grid frequency, and the aim is to disconnect the grid from the PV
during the freewheeling modes. Zero current switching (ZCS)
is realized in [10] by adding two extra switches on the basis of
the H5 inverter, which reduces the switching loss to improve
the efficiency of the converter. In [11], an improved H6-type is
proposed which can eliminate the threat of leakage current and
can handle a certain amount of reactive power. However, these
topologies have disadvantages of a large number of switches
and more complex driving circuit. Many scholars proposed im-
proved modulation methods to reduce the leakage current for
HU et al.: INTEGRATED STEP-UP INVERTER WITHOUT TRANSFORMER AND LEAKAGE CURRENT 9815

Fig. 1. Circuit configuration of proposed inverter.

three-phase inverters [15]–[19]. In [15] and [16], a three-phase

transformer-less H7 inverter from the single-phase H5 topol-
ogy is investigated. And the modified discontinuous pulsewidth
modulation (MDPWM) is proposed to reduce leakage current.
However, the control method is a little complex. Guo et al.
studied a new modulation strategy with boolean logic function Fig. 2. Deduction process of the topological structure of the PV inverter.
to achieve the constant common-mode voltage for leakage cur- (a) Conventional boost converter. (b) Full-bridge inverter. (c) Proposed inverter.
rent reduction, which is used in four-leg inverters in literature
[17]. The modulation mode is simple and implemented with
no need of space vector modulation. In [20], a comparison of
leakage current between unipolar PWM and bipolar modulation
is given. The research results show that there are obvious dif-
ferences between different PWM on the leakage current for the
same inverter structure. In recent years, some topologies have
also been presented for reducing the leakage current effectively
[20]–[23], in which the negative terminal of the solar cell array
is directly connected to the ground.
In this paper, a transformer-less integrated step-up PV inverter
is proposed as shown in Fig. 1, which has the functions of boost-
ing the voltage and restraining the leakage current. Moreover,
the structure of the circuit is simple and easy to control. This
paper is organized as follows. In Section II, the deduction pro-
cess of the circuit structure, the principles of operation, and the
several PWM methods of the proposed topology are presented.
In Sections III and IV, the steady state and design consideration
of the proposed inverter is addressed. Finally, some conclusions
Fig. 3. Two kinds of working methods of inductors. (a) DCM. (b) DCM
are drawn in Section VII. -CCM- DCM (DCD).

II. OPERATIONAL PRINCIPLE OF THE PROPOSED INVERTER

A. Topology of the Proposed Integrated Inverter
The derivation process of the topological structure of the PV
inverter with the resistance load in this paper is shown in Fig. 2.
The single-phase single-stage inverter is designed on the basis
of boost converter and full bridge inverter. The conventional
boost converter is shown in Fig. 2(a). Fig. 2(b) shows the full-
bridge inverter. The switch S2 of the traditional boost converter
is embedded between the full bridge inverter switch S1 and
the switch S3 in series. At the same time, the output terminal
of the traditional boost is replaced by the full bridge inverter.
So, integrated step-up inverter structure is obtained, as shown
in Fig. 2(c). The proposed inverter has the function of rising
voltage, which can satisfy the PV power generation system in
the case of low input voltage condition. One can see that the
proposed inverter is mainly composed of the PV array whose
output voltage is signed as Uin , five switches of (S1 –S5 ), an
energy storage inductor Lin in the input terminal, a capacitor
C1 , and a filter inductor L0 .
In order to simplify the circuit analysis, the assumptions are
shown as follows:
1) Switches, inductors, and capacitors are ideal components;
2) The capacitor C1 is large enough to meet the voltage,
which is constant during one switching period.
The energy storage inductor may be two modes as shown in
Fig. 3. One is the discontinuous conduction mode (DCM), and

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9816
Fig. 4. Key waveforms of the proposed inverter at DCM operation.
the other is mixing discontinuous conduction and continuous
mode (DCD).
B. Operational Principles
1) DCM Operation: The detailed operating principle of
DCM is presented in this section. There are six operating modes
during one switching period, as shown in Fig. 4.
Mode I [tk 0 –tk 1 ]: At t = tk 0 , S2 , S3 , and S4 are turned ON,
S1 and S5 are turned OFF. The current flow path is shown in
Fig. 5(a). In this mode, the iLin is increasing because inductor
Lin is charged by the source energy Uin . Thus, the current of
Lin increases linearly. Meanwhile, some of the energy stored in
capacitor C1 is released to grid and inductor L0 through switch
S3 and S4 . Once the switch S2 is switched OFF, this mode ends
at t = tk 1
Uin
iLin (t) = (t − tk 0 ).
Lin
Mode II [tk 1 –tk 2 ]: At t = tk 1 , S2 , and S4 are turned OFF,
switches S1 and S5 remain turned OFF, and S3 remains turned
ON. Fig. 5(b) depicts the current flow path of this period. In
this mode, some of the energy stored in inductor Lin is released
to capacitor C1 through diodes in parallel on switches S1 and
S3 . Thus, the current of Lin is decreased linearly. Meanwhile,
capacitor C1 is receiving energy from Uin . At the same time,
the energy stored in inductor L0 is released to grid. This mode
ends when current iLin reaches zero at t = tk 2
Uin − UC 1
iLin (t) = (t − tk 1 ) + iLin (tk 1 ).
Lin
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 10, OCTOBER 2019
Mode III [tk 2 –tk 3 ]: During this time, switches S1 , S2 , S4 , and
S5 remain turned OFF, switch S3 remains turned ON, iLin = 0.
Fig. 5(c) depicts the current flow path of this period. The energy
stored in inductor L0 is released to grid. This mode ends at
t = tk 3 . Then, in the positive half cycle of the sinusoidal wave,
the cyclic Mode I to Mode III
iLin (t) = 0. (3)
Mode IV [tk 4 –tk 5 ]: During this interval, switches S3 and S4
are turned OFF and switches S1 , S2 , and S5 are turned ON. The
current flow path is shown in Fig. 5(d). iLin increases linearly
because inductor Lin is charged from the dc source Uin through
switch S2 . Meanwhile, some of the energy stored in capacitor
C1 is released to grid through switches S1 and S5 . Once the
switch S2 is switched OFF, this mode ends at t = tk 5
Uin
(1) iLin (t) = (t − tk 4 ). (4)
Lin
Mode V [tk 5 –tk 6 ]: At t = tk 5 , switches S3 and S4 remain
turned OFF, switches S1 and S2 are turned OFF, and switch S5
remains in the ON state. Fig. 5(e) illustrates the current flow path
of this stage. In this mode, some of the energy stored in inductor
Lin is released to capacitor C1 through diodes in parallel on
switches S1 and S3 . Thus, the current of Lin decreases linearly.
Meanwhile, capacitor C1 is charged from dc source Uin . At the
same time, the energy stored in inductor L0 is released to grid.
This mode ends when current iLin reaches zero at t = tk 6
Uin − UC 1
(2) iLin (t) = (t − tk 5 ) + iLin (tk 5 ). (5)
Lin
HU et al.: INTEGRATED STEP-UP INVERTER WITHOUT TRANSFORMER AND LEAKAGE CURRENT 9817

Fig. 5. Current path of one switching period at DCM operation. (a) Mode I. (b) Mode II. (c) Mode III. (d) Mode IV. (e) Mode V. (f) Mode VI.

Mode VI [tk 6 –tk 7 ]: In this mode, switches S1 , S2 , S3 , and
S4 remain turned OFF, switch S5 remain turned ON, iLin = 0.
Fig. 5(f) depicts the current flow path of this period. This mode
ends at t = tk 7 . Then, in the negative half-period of the sinu-
soidal wave, the operated proceeding is cyclic from Mode V to
Mode VI
iLin (t) = 0.
2) DCM-CCM-DCM (DCD) Operation: The analysis of the
DCD mode is the mixing of DCM and CCM. Near the zero
crossing of ac output, the input inductor is operated in DCM
mode. And the input inductor is operated in CCM mode near
the peak of ac output. There are four modes in a switch cycle,
as shown in Fig. 6.
Mode I [t0 –t1 ]: At t = t0 , S2 , S3 , and S4 are turned ON, and
S1 and S5 are turned OFF. The current flow path is shown in Fig.
5(a). In this mode, iLin increases linearly from iLin (t0 ) because
inductor Lin is charged from the input source Uin . Meanwhile,
some of the energy stored in capacitor C1 is released to grid
(6) through switches S3 , S4 , and inductor L0 . Once the switch S2 is
switched OFF, this mode ends at t = t1
Uin
iLin (t) = (t − t0 ) + iLin (t0 ). (7)
Lin

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9818 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 10, OCTOBER 2019

TABLE I
SYSTEM PARAMETERS OF THE COMMON MODE VOLTAGE
SIMULATION MODEL OF THE INVERTER

Fig. 6. Key waveforms of the proposed inverter at CCM operation.

Mode II [t1 –t2 ]: At t = t1 , S2 , and S4 are turned OFF, switches S1

and S5 remains turned OFF, and S3 remains turned ON. Fig. 5(b)
depicts the current flow path of this period. In this mode, the
energy stored in inductor Lin is released to capacitor C1 through
diodes in parallel on switches S1 and S3 . Thus, the current of
Lin is decreased linearly. Meanwhile, capacitor C1 is charged
from dc source Uin . This mode ends when S2 is turned ON at
t = t2 . Then, the operation proceeding is cycled from Mode I to
Mode II in the positive half-period CCM period of the sinusoidal
modulation wave
Uin − UC 1
iLin (t) = (t − t1 ) + iLin (t1 ). (8)
Lin
Mode III [t3 –t4 ]: During this interval, switches S3 and S4
are turned OFF, switches S1 , S2 , and S5 start to be turned ON.
The current flow path is shown in Fig. 5(d). iLin increases from
iLin (t3 ) because inductor Lin is charged by the source energy
Uin through switches S2 . Thus, the current of Lin is increased
linearly. Meanwhile, some of the energy stored in capacitor C1
is released to grid through filter inductor L0 and switches S1 , S2 , Fig. 7. PWM strategies of the proposed inverter.
and S5 . This mode ends at t = t4
C. PWM Strategy
Uin
iLin (t) = (t − t3 ) + iLin (t3 ). (9) The proposed topology has a bridge arm containing three
Lin switches. Two logical variables are used to represent the switch-
Mode IV [t3 –t4 ]: At t = t4 , switches S3 and S4 remain turned ing states of the three switches. When the switch is turned ON,
OFF, switches S1 and S2 are turned OFF, and switch S5 remains it is indicated by SX = 1. When the switch is turned OFF, it
turned ON. Fig. 5(e) illustrates the current flow path of this stage. is indicated by SX = 0 (x = 1, 2, 3). Since there are three
In this mode, some of the energy stored in inductor Lin is released switches in the left bridge arm, and each switch has two switch-
to capacitor C1 through diodes in parallel on switches S1 and S3 . ing states, this bridge arm has eight combinations of switch
Thus, the current of Lin decreases linearly. Meanwhile, capacitor states, as shown in Table I. Because some of the combination
C1 is charged from dc source Uin . At the same time, the energy states are not allowed to occur during normal operation of the
stored in inductor L0 is released to grid. This mode ends at t = presented converter, it is necessary to prohibit the appearance
t5 . Then the operation proceeding is cycled from Mode III to of the above states.
Mode IV in the negative half-period According to Table I, four PWM strategies of the proposed in-
verter can be obtained as shown in Fig. 7. From Fig. 7(a), one can
Uin − UC 1 see that the switch S1 is always operated in high-frequency state,
iLin (t) = (t − t4 ) + iLin (t4 ). (10)
Lin and the switches S1 and S4 are only operated in high-frequency

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HU et al.: INTEGRATED STEP-UP INVERTER WITHOUT TRANSFORMER AND LEAKAGE CURRENT 9819

state at half of line cycle, respectively. The switches S3 and S5

are operated in line frequency at half of line cycle, respectively.
As shown in Fig. 7(b), it can be seen that there may be three
switches operated in the high-frequency state at the same time,
which are the switches S2 , S4 , and S5 . In the entire frequency
cycle, the switch S2 is operated in the sinusoidal pulsewidth
modulation (SPWM) state, which is respectively synchronized
with the switches S1 and S4 at half line frequency. The states
of the switches S4 and S5 are complementary. The switch S3 is
turned ON at half line frequency.

III. STEADY-STATE ANALYSIS OF THE PROPOSED INVERTER

A. Steady-State Voltage Gain
In the unit power factor grid-connected mode, one can see
that the output voltage of the proposed inverter is constant, and
the output current can be adjusted according to the power of PV Fig. 8. Curve between voltage gain and modulation radio.
arrays.
1) DCM-CCM-DCM (DCD) Operation: The input voltage
Uin , switches S1 , S2 , S3 , and capacitor C1 constitute the tradi-
tional boost converter, and from the current waveform of input
inductor Lin in Fig. 4, one can see that the highest energy is in
the CCM period. Therefore, the voltage across capacitor C1 can
be calculated as
Uin
UC 1 = . (11)
1−m
The duty ratio of the switch S2 is variant, which is defined as
m. And the clamping capacitor C1 and the switch tube S1 , S3 , Fig. 9. Modulation of unipolar SPWM.
S4 , S5 constitute the traditional full bridge inverter. Therefore,
it is consistent with the whole bridge inverter, and the output The current drop of Lin in Mode II is as follows:
voltage is calculated as UC 1 − Uin
Ix−DCM = toff . (16)
Uo = mUC 1 . (12) Lin

In the formula, Uo is the uo amplitude value, and m is the In the modulated wave period T, the increase in Lin is equal
amplitude modulation ratio to the its decrease, Is−DCM = Ix−DCM
Uin × ton
Usin toff = . (17)
m= . (13) UC 1 − Uin
Usan
The average current of the inductor in the modulation wave
Therefore, the gain of the voltage during the DCM-CCM-
period T is as follows:
DCM operation is obtained (Uo is the amplitude of the output
voltage) as (ton + toff ) × Δi (ton + toff ) × Uin
L i n ton
Iav −DCM = = .
Uo m 2T 2T
GDCD = = . (14) (18)
Uin 1−m
According to (14), the curve between the gain of converter Fig. 9 is a schematic diagram of single polarity SPWM wave-
and modulation radio is shown as Fig. 8. From the figure, it is form modulation. During the course of analysis, the area of S1
obvious that the proposed inverter does not have the ability to is equal to that of S2 due to symmetrical regular sampling. The
boost voltage when m is lower than 0.5; at the same time, if the following formula can be obtained by the similarity of triangles.
design of modulation radio is too large (m > 0.9), it will damage Among w = 100π
the switches. So, the output voltage of the proposed inverter is m |sin wtk | to n
2
around two to four times the input voltage at the appropriate = T
(19)
1 2
modulation radio.
2) DCM Operation: In this operation mode, the current in- ton = m × T × |sin wtk | (20)
crease of Lin in Mode I is as follows:
where T is the period of the modulation of the triangular wave.
Uin According to the location of the amplitude point of the tri-
Is−DCM = ton . (15)
Lin angular carrier signal, the half-cycle of sinusoidal modulation

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9820 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 10, OCTOBER 2019

Fig. 10. Current analysis of inductor Lin .

Fig. 11. Boundary condition of the proposed inverter.

wave can be divided into N/2 equal time periods. (N equals the
triangular carrier frequency divided by the modulated sine wave
frequency). The current analysis of the inductor Lin is shown in
Fig. 10.
The average current of the inductor in the half cycle is as
follows:
N /2
Iav −DCM
iav −Lin = k =1
N/2
N /2 2
UC 1 × Uin × m2 sin wtk
= × k =1 . (21)
2 × (UC 1 − Uin ) f Lin N/2

If all the component losses in the circuit are ignored, the input
power is equal to the output power, which can be obtained

Po Fig. 12. Losses distribution under different power levels.

Iin = . (22)
uo × Uin TABLE II
PERFORMANCE COMPARISON OF THE PROPOSED INVERTER
The average current of the input is equal to the average current WITH THE SIMILAR TOPOLOGY
of the inductor, that is iav −Lin = Iin

Uo m
G= = m 2 ×U 2
. (23)
Uin 1 − 4P o L i ni nf

B. Voltage and Current Stress of Switches

During the DCM operation, the voltage and current stresses
on the power devices are discussed as follows. The voltage
stresses on the switches S1 – S5 are given as
the switches S1 –S5 are expressed as follows:
US 1−m ax = US 2−m ax = US 3−m ax
mTUin
= US 4−m ax = US 5−m ax = UC 1 . (24) iS 1−m ax = iS 2−m ax = iS 3−m ax = ΔiLin−m ax =
Lin
(26)
According to the operating principles, the current ripples on
the energy storage inductor can be derived as
iS 4−m ax = iS 5−m ax = io−m ax = Io . (27)
Uin ton mTUin |sin wtk |
ΔiLin = = . (25)
Lin Lin C. Range of Energy Storage Inductance Lin
The average current of iC 1 is zero in the steady state. Thus, When the proposed PV inverter is operated in a steady state
the average current that flows through the switches S4 –S5 are under critical mode, the inductor current is exactly zero at the
each equal to the average current of io . The current stresses on beginning or end of each switching cycle. So, there are the

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HU et al.: INTEGRATED STEP-UP INVERTER WITHOUT TRANSFORMER AND LEAKAGE CURRENT 9821

Fig. 13. Main simulation waveform of different working mode. (a) DCM. (b) DCM and CCM.

following formulas: is assumed to be LC , obtained by formula (25)

UC 1 Iin
1 = = (29)
Iin = ΔiLin . (28) Uin 1−d iC
2
dPo Uin dT d 2 Po
Iin = = = (30)
Among the duty ratio d is d = ton /T . uo (1 − d) 2LC UC (1 − d)
Ignoring all the component losses in the circuit, the input 2
mUin
power is equal to the output power, and the critical inductance LC = (31)
4Po f |sin wt|

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9822 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 10, OCTOBER 2019

 
d = m |sin wt| ∈ 0 1 . (32)
In the time of wt = 0, ± kπ, | sin wt | = 0, LC = ∞, the
inductance value in the experiment and simulation is a fixed
constant A, which meets Lin = A < LC = ∞, and it must be
in a discontinuous state at this time. It is said that the dc–ac
converter cannot be operated in a fully continuous state at a
grid frequency. Therefore, the presented single-phase single-
stage step-up inverter is operated easily in the case of DCM,
and the requirements of the inductor Lin range are as follows:
2
[0 mUin /(4Po f )]. The curve of LC is shown in Fig. 11. If Lin
is less than LC , the proposed inverter is operated in full DCM
state. As shown in Fig. 11, the relationship is between critical
inductance and output power and modulation ratio, in which
Uin = 50 V, f = 20 kHz.
Fig. 14. Control block diagram of the proposed inverter.

IV. DESIGN CONSIDERATIONS TABLE III

SYSTEM PARAMETERS OF THE INVERTER EXPERIMENTAL MODEL
A. Selection of Capacitor C1
Generally, during the operation of the inverter, the capacitor is
continuously charged or discharged with the different switching
states, and the charge change of the capacitor can be expressed as
ΔQ = CΔU = IC ΔT. (33)
In the formula, ΔQ is the charge change of the storage capac-
itor C1 in a switching period, C is capacitance value. ΔU is the
ripple value of the voltage of the capacitor C1 . IC is the average
current of the capacitor C1 when it is in the charged or dis- The relationship between LC and the modulation ratio, output
charged stage. ΔT is the corresponding charging or discharging power, input voltage, and switching frequency are shown in
time. (35). If the proposed converter is operated in DCM, the storage
The calculated minimum capacitance of the capacitors mainly inductor Lin should be lower than LC . In practical application,
relies on the maximum transferring power, the output voltage, it can be made a minor adjustment.
the operating frequency, and the maximum tolerant voltage rip-
ple ΔU, where the voltage rippled of boost capacitor C1 is 5% C. Power Loss Calculation
of the grid voltage; the estimated capacitors can be obtained by The losses in the power circuit can be divided into the conduc-
the following equation: tion loss (power device conduction loss and inductor conduction
Po loss), switching loss, and inductor core loss.
C≥ . (34) 1) Conduction Loss: The voltage drop of MOSFETs can be
ΔUC Uo f
simplified as a channel resistor, which is shown as follows:
In the formula, Uo is the output voltage, Po is output power,
f is the switching frequency, and ΔUC is the ripple value of the uds (t) = i × Rds . (36)
voltage at both ends of the C1 capacitor.
For the positive half-cycle, the duty cycle of S1 , S2 , and S4
In practice, this capacitor is used as an electrolytic capacitor.
can be expressed as (37), and for the negative half-cycle, the
One can see that the equivalent series resistor (ESR) of an alu-
duty cycle of S3 and S5 is same as (38)
minum electrolytic capacitor will be smaller as the capacitance
increases, so the capacitor can usually be selected to larger than dS 1,S 2,S 4 = m × sin(ωt) (37)
calculated values during inverter operation.
dS 3,S 5 = 1 − m × sin(ωt). (38)
B. Selection of Energy Storage Inductor Lin Assuming the output current to be in phase with the duty
In theory, the selection method of the inductor is similar to cycle, the output current can be expressed as
that of a basic boost converter. In the operation of the inverter, the i(t) = Im × sin(ωt). (39)
inductor will be designed in the DCM condition, and the critical
inductance value can be obtained by the following formula: The current in the power device is PWM current, whose con-
2
duction time depends on the duty cycle condition. So, the con-
mUin duction losses on high-frequency MOSFETs (S1 , S2 , and S4 ) and
Lin ≤ LC = . (35)
4Po f line frequency MOSFETs (S3 and S5 ) are given in (40) and (41).

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HU et al.: INTEGRATED STEP-UP INVERTER WITHOUT TRANSFORMER AND LEAKAGE CURRENT 9823

Fig. 15. Experimental waveforms of DCM mode of inductors. (a) gs 1 , gs 2 , gs 3 . (b) gs 4 , gs 5 . (c) Uin , U C 1 , U S 1 , iL in . (d) Uin , U C 1 , U S 1 , iL in (Expand).
(e) u a c , u g , i g . (f) u g , ig , iL in . (g) u g , uc m , ic m . (h) u g , ig under non-unit power factor.

The total conduction loss of all devices is given in (42)

 π Pcond = 3PS 1,S 2,S 4 + 2PS 3,S 5
1 2m
PS 1,S 2,S 4 = i(t)uds (t)dS 2,S 4 (t)d(ωt) = I2m Rds
2π 0 3π 2m · Im
2
· Rds 3I 2 · Rds
(40) = + m . (42)
3π 4
 π
1
PS 3,S 5 = i(t)uds (t)dS 3,S 5 (t)d(ωt) The conduction loss in the inductor can be divided into the line
2π 0
  frequency current conduction loss related to the dc resistance
1 2m RL −dc , and the switching frequency current ripple conduction
= I2m Rds − (41)
4 3π loss related to the switching frequency ac resistance RL −ac . The

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9824 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 10, OCTOBER 2019

Fig. 16. Experimental waveforms of DCD mode of inductors. (a) gs 1 , gs 2 , gs 3 . (b) gs 4 , gs 5 . (c) Uin , U C 1 , U S 1 , iL in . (d) Uin , U C 1 , U S 1 , iL in (Expand).
(e) u a c , u g , i g . (f) u g , ig , iL in . (g) u g , uc m , ic m . (h) u g , ig under non-unit power factor.

total conduction losses are shown as The switching losses of the high-frequency MOSFETs are the
voltage and current overlap losses and the gating charge losses,
Pcond−L = 0.5 · 2
Im · RL −dc + If2 −ac · RL −ac . (43)
which can be estimated through (44) and (45) respectively.
3) Core Loss: Due to the gap in the ferrite core, the first step
2) Switching Loss: of the core loss calculation is calculating the ac flux swing
 t o n +t r
N · ΔI
PSW −S 1,S 2,S 4 = fsw · id (t) · uds (t) · d(t) ΔB ∼
= . (46)
to n lgap /uo
 t o f f +t f
+ fsw · id (t) · uds (t) · d(t) The second step is calculating the core loss density PL . The
to f f core loss density is a function of the ac flux swing and frequency.
tr + tf It can be approximated from the core loss charts or the curve fit
+ fsw · Ids · Uds · (44) loss (a, b, and c are constants determined from curve fitting) as
2
Pg = fsw · Qg · Ugate . (45) PL = aΔB b f c . (47)

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HU et al.: INTEGRATED STEP-UP INVERTER WITHOUT TRANSFORMER AND LEAKAGE CURRENT
Fig. 17. Picture of the whole experimental setup.
Then, the core loss can be calculated though core cross section
Ae and core magnetic path length Ie
Pcore = PL · Ie · Ae .
The power loss distribution under different power levels is
shown in Fig. 12.
D. Performance comparison
The performance comparison between the representative
structures and the proposed inverter is shown in Table II. From
Table II, the proposed inverter needs fewer switches and can
achieve boosting voltage compared with [11] and [23]. Although
[23] has the better boosting voltage capability, more power de-
vices are used. Higher output voltage is attained in [25] by using
a coupled inductor and has a reduced leakage current. However,
the number of diodes, windings, and capacitors is large, which
increases the cost and volume of the inverter.
V. SIMULATION DETAILS
For the sake of theoretical verification, the simulation is
carried out in MATLAB/Simulink. Shown in Fig. 13(a) are
the current of the stored inductor Lin , the grid voltage, and
the grid current in the DCM. The current waveform of the
storage inductor Lin is like the steamed bun wave, and it can be
seen that the inductor is fully working in the DCM state, and
leakage current meets the requirements icm << 0.01 mA. The
topology conforms to the international certification standards
about the leakage current of grid-connected inverters. Shown
in Fig. 13(b) are the current of the stored inductor Lin , the grid
voltage, and the output current in the DCM and CCM. The
middle of the current waveform of the storage inductor Lin has
a prominent part, and the inductance is operated in the state
of the CCM at this part. The simulation results show that the
integrated inverter cannot work in the full continuous state and
will be in the state of mixing DCM and CCM. In the above
state, the leakage current icm is less than 0.01 mA. Therefore,
the proposed inverter also suppresses the leakage current.
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9825
VI. EXPERIMENTAL RESULTS
In order to verify the performance of the proposed inverter,
the experimental prototype circuit is also built and tested in the
laboratory. The control block diagram of the proposed inverter
is as shown in Fig. 14. Instantaneous active power and reactive
power (PQ) control is adapted to attain the reference of grid
current [32]. The proportional resonance (PR) current controller
unit, where the actual current injected to the grid ig , tracks the
reference current i∗g . The basic parameters of the inverter are
shown in Table III. The results of the experiment are shown in
the following diagram.
Fig. 15 shows the experimental waveforms of DCM mode.
The driving signals of the switches S1 , S2 , S3 , S4 , and S5 are
shown in Fig. 15(a) and (b). Fig. 15(c) shows the input voltage
Uin , the voltage UC 1 of the capacitor C1 , the voltage stress of
the switch S2 , and the current iLin flowing through inductor Lin .
From Fig. 15(d), the energy storage inductance Lin is operated
in the DCM. The voltage waveforms of bridge-arm before filter
L0 is shown in Fig. 15(e). In Fig. 15(f), the grid-current wave-
form is in phase with the utility voltage, and the total harmonic
(48)
distortion (THD) of the grid current of the PV inverter is 3.9%.
As shown in Fig. 15(g), the voltage on the parasitic capacitance
ucm is about 0 V, and the leakage current of the PV inverter is
around 0 A, which is in accordance with the theoretical analysis.
Fig. 15(h) shows the grid-voltage and grid-current waveforms
under non-unit power factor.
Fig. 16 shows the experimental waveforms of DCD mode.
Fig. 16(a) and (b) shows driving information of all the switches.
PV voltage Uin , UC 1 , voltage stress of S2 , and the current iLin
are shown in Fig. 16(c). As can be seen from Fig. 16(d), the
input inductance is operated in the DCD state and corresponds
to the conduction clearance of the power switch S2 . In addition,
it can be seen from the diagram that the inductance current
has two states of CCM and DCM, which is in accordance with
the theoretical analysis. The voltage waveform of bridge-arm
before the output filter is shown in Fig. 16(e), and the figure
also gives the grid voltage and current. In Fig. 16(f), the steady
state grid-current waveform is in phase with the utility voltage,
and the THD of the output current of the integrated inverter is
4.2%, which is larger than that of single DCM.
As shown in Fig. 16(g), the voltage on the parasitic capac-
itance ucm is still about 0 V, and the leakage current of the
proposed inverter is almost negligible, which verifies that the
theoretical analysis is correct. Fig. 16(h) shows the grid-voltage
and grid-current waveforms under non-unit power factor.
In the experiment, the PV array simulator power is used
to replace the real PV arrays, and the high-speed processor
TMS320F2812 is used as the core control device. The picture
of the whole setup is shown in Fig. 17.
By measuring the experimental data, the efficiency of the
proposed inverter under different power is compared with H5
and the inverter in [25], and the efficiency curves are as shown
in Fig. 18. Obviously, the efficiency of the proposed inverter is
a little lower than H5 structure, but the output voltage of H5 is
lower than input dc voltage. The boost is added at the front of
H5 for constituting the step-up inverter, the efficiency of which
9826
Fig. 18. Efficiency curve comparison in different topology.
is much lower than the proposed inverter. At the same time, the
efficiency of the proposed inverter is higher than the step-up
inverter in [25].
VII. CONCLUSION
For no-isolation grid-connected PV power generation sys-
tem, an integrated step-up inverter is introduced in this paper. It
combines the dc/dc boost converter with conventional full bridge
dc/ac converter having the capability to step-up the input dc volt-
age and transform a dc voltage into an ac current simultaneously.
Moreover, the common mode voltage in the proposed integrated
inverter can be avoided by directly connecting the negative ter-
minal of the PV array to the neutral point of the grid. Therefore,
the ground leakage current through the parasitic capacitor is re-
duced largely. The simulations and experimental results are in
agreement with the theoretical analysis, validating the charac-
teristics of the presented inverter. Therefore, the proposed inte-
grated converter may be utilized and commercialized as the in-
terface device between the PV array and the distribution system.
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HU et al.: INTEGRATED STEP-UP INVERTER WITHOUT TRANSFORMER AND LEAKAGE CURRENT 9827

[30] D. Barater, G. Franceschini, and E. Lorenzani, “Unipolar PWM for trans- Benbao Gao was born in Anhui, China, in 1994. He
formerless grid-connected converters in photovoltaic plants,” in Proc. Int. received the B.S. degree from Anhui Normal Univer-
Conf. Clean Elect. Power, 2009, pp. 387–392. sity, Wuhu, China, in 2016. He is presently working
[31] R. R. Karasani, V. B. Borghate, P. M. Meshram, H. M. Suryawanshi, and S. toward the M.S. degree with the College of Elec-
Sabyasachi, “A three-phase hybrid cascaded modular multilevel inverter trical Engineering, Anhui University of Technology,
for renewable energy environment,” IEEE Trans. Power Electron., vol. 32, Ma’anshan, China.
no. 2, pp. 1070–1087, Feb. 2017. His current research interests include power elec-
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inverter,” in Proc. IEEE Int. Conf. Environ. Elect. Eng. IEEE Ind. Com- version, and solar power generation.
mercial Power Syst. Eur., Milan, Italy, 2017, pp. 1–6.
[33] D. G. Holmes and T. Lipo, PulseWidth Modulation for Power Converters:
Principles and Practice. Piscataway, NJ, USA: IEEE Press, 2003.

Xuefeng Hu was born in Jiangsu, China. He re-

ceived the M.S. degree in electronic engineering
from China University of Mining and Technology,
Xuzhou, China in 2001, and the Ph.D. degree in
electrical engineering from the Nanjing University
of Aeronautics and Astronautics, Nanjing, China, in
2014.
He is presently working as a Professor with the
College of Electrical and Electronic Engineering, An-
hui University of Technology, Ma’anshan, China. He
has authored or coauthored more than 30 technical
papers. His current research interests include renewable energy system, dc–dc
and dc–ac power conversion, modeling and control of the converters, and dis-
tributed power systems.

Penghui Ma was born in Anhui, China, in 1994.
He received the M.S. degree from Fuyang Normal
University, Fuyang, China, in 2017. He is presently
working toward the M.S. degree with the College of
Electrical Engineering, Anhui University of Technol-
ogy, Ma’anshan, China.
His current research interests include power elec-
tronics, distributed power systems, and dc–dc power.
Meng Zhang was born in Anhui, China, in 1993. She
received the B.S. degree from Jilin Jian Zhu Univer-
sity, Chang Chun, China, in 2016. She is currently
working toward the M.S. degree with the College of
Electrical Engineering, Anhui University of Technol-
ogy, Ma’anshan, China.
Her current research interests include power elec-
tronics and solar and wind power generation.

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