High-Efficiency High-Power-Density 48/1V Sigma

Converter Voltage Regulator Module

Mohamed Ahmed, Chao Fei, Fred C. Lee and Qiang Li

Center for Power Electronics Systems (CPES)
The Bradley Department of Electrical and Computer Engineering
Virginia Tech, Blacksburg, VA 24061,
mohamed4@vt.edu

Abstract— A high efficiency and high power density sigma
converter for 48/1V voltage regulator module (VRM) is proposed
in this paper. The Sigma converter is a quasi-parallel converter
that uses a high efficiency unregulated converter to deliver most
power to the load with small power flowing through buck
converter responsible for regulating the output voltage. The
unregulated isolated converter is LLC converter designed with
matrix transformer structure integrating 4 transformers in one
core structure with integrating the Synchronous Rectifiers (SRs)
with the winding to minimize the termination losses of the
transformer so a high efficiency can be achieved. The buck
converter is designed with discrete GaN devices and PCB winding
inductor to regulate the output voltage. The designed Sigma
converter is 48/1V-80A achieving a power density of 420W/in3 and
maximum efficiency of 93.4%.
Keywords—Sigma Converter, GaN devices, Matrix
transformer, 48V VRM
I. INTRODUCTION
High performance multi-core CPU and GPU for datacenter
servers are consuming very high current levels (>200A) at very
low voltages (<1.2V) [1] pushing the power of each server rack
to above 10KW. Originally the datacenter adopted an AC
distribution power architecture where a double conversion UPS
system is involved followed by a front-end converter that drops
the input voltage to a 12V bus that supplies a multiphase buck
converter providing a tightly regulated voltage to the CPU as
shown in Fig. 1(a). With the increase in the power per server
rack the 12V bus losses became excessive and degrades the
system overall efficiency significantly, a 48V bus has been used
for years in telecom power supplies, very recently the same
approach was utilized by Google® [2] as shown in Fig. 1(b) to
power the CPU/GPU for datacenter applications using a DC
UPS with 48V bus the overall system efficiency can be
increased significantly. The 48V VRM has to be designed
efficiently and with a very high power density to be suitable for
such applications. A lot of work has been done for the 48V
VRM. In [3], [4] the first market available 48V VRM was
proposed by VICOR® Company using a two stage approach
with soft switching for both stages they can be operated at very
high frequency achieving a very high power density and
efficiency. In [5], [6] another two stage solution with dynamic
bus voltage changing for light load efficiency improvement was
proposed with a very high efficiency and power density first
stage LLC converter and conventional multiphase buck the
system can also achieve a very high efficiency and power
density, although both solutions have shown high performance
the series connection of the two stages will always degrade total
system efficiency. Some work has been reported for 48V VRM
using only one stage solution. In [7] a 1-MHZ self-driven full
bridge was proposed which can achieve very high efficiency at
high frequency operations, however, not all the primary side
switches can achieve ZVS at light load conditions resulting in a
significant efficiency drop at light loading conditions and it also
requires bulky output inductors resulting in low power density.
In [8] a cascaded buck converter was proposed to have a
reduced voltage stress across each cell of the cascaded converter
to use low voltage devices. However, the structure is very
complex and eliminate the possibility of using DrMOS devices
which is very beneficial for high switching frequencies.
In this work a one stage 48/1V converter using sigma
converter power architecture is proposed for high efficiency and
power density 48V VRM. The Sigma converter was first
proposed in [9] for 12V VRM powering the CPU, the basic
configuration of the Sigma converter is shown in Fig. 2, The
Sigma converter is a quasi-parallel converter where the input of
two converters is connected in series while the outputs are
connected in parallel, the first converter is a DC/DC unregulated
transformer (DCX) and the other is a buck type converter
responsible of regulating the output voltage, as the input current
of the two converters is the same, the power shared between
these two converters is depending on the input voltage across
each of them as mentioned in (1) due to this power sharing the
overall system efficiency can be increased significantly.
P V
= , I =I (1)
P V
This paper is organized as follows, Section II talks about the
basic design principles of the Sigma Converter for 48V VRM.
Section III talks the design optimization of high frequency
matrix transformer for the DCX . Section IV is about the buck
converter design. Section V presents the experimental results.
The summary and conclusion are given in Section VI

978-1-5090-5366-7/17/$31.00 ©2017 IEEE 2207


(a)
(b)
Fig. 1. Data centers distribution system (a) Traditional AC distribution (b) DC
distribution with 48v Bus
Fig. 2. Sigma Converter power architecture
II. DESIGN GUIDELINES FOR HIGH EFFICIENCY SIGMA
CONVERTER
The sigma converter is a quasi-parallel converter where the
two converters share the total power delivered to the load, as
previously mentioned the power sharing between the two
converters is dependent on the input voltage across each
converter as in (1). The DCX converter can always be designed
with a very high efficiency and power density [5] while the buck
converter responsible for regulating the output voltage is always
less efficient compared to the DCX converter. In order to have a
high efficiency sigma converter the input voltage across the
DCX should be as high as possible so most of the power will
flow through it while a smaller voltage remains on the buck
converter with smaller amount of power flowing through it so
high efficiency operation can be expected, mentioned in (2)-(4)
the equations governing the voltage and power distribution
across each converter based on this the proposed sigma
converter for 48V VRM is shown in Fig. 3.
V = nV V = V − nV
V V
P = P =
V V
V V
ƞ = ƞ + ƞ
V V
For the DCX, LLC converter topology was chosen with a
full bridge primary side and a center tapped secondary side
rectifier. The LLC converter is the best candidate for the DCX
part due to its properties of achieving ZVS and ZCS for the
secondary side synchronous rectifiers (SRs), ZVS and near ZCS
for the primary side switches enabling it to run at very high
frequency with a very high efficiency. The turns ratio for the
DCX transformer was chosen to be (40:1), based on (2) at the
output voltage of 1V the DCX input voltage will be 40V which
means that only 8V will be on the buck converter for regulation
purposes. The first benefit for this is that at nominal input
voltage of 48V, 84% of the total power will flow through the
higher efficiency DCX converter while only 16% of the total
power will flow through the buck converter. The second benefit
is that low voltage devices can still be used for the buck
converter due to its lower input voltage in addition to lower
switching related losses of the buck converter. The third benefit
is that the secondary SRs of the DCX has a maximum voltage
stress of ( V = 2V ) which allows us to use very low
voltage devices with low FOM at the high current output side by
which a high efficiency of operation can be expected.
Fig. 3. Proposed Sigma Converter for 48/1V VRM
III. HIGH FREQUENCY MATRIX TRANSFROMER DESIGN
OPTIMIZATION FOR LLC CONVERTER DCX
The concept of matrix transformer has been widely used in
various applications with LLC converter where low output
voltage and high output current is required [5], [10]–[13] where
high performance was always achieved. The concept of Matrix
transformer is simply breaking a single transformer into various
transformer arrays connected in series from the primary side and
in parallel in the secondary side minimizing the total winding
resistance and leakage inductance of the transformer [10], this
used to come with the price of higher core loss and larger
footprint due to increasing the number of cores, with a
simplification and integration mechanism reported in [11], [14]
each two transformers of the matrix transformer structure was
integrated into one UI core structure with no increase in core
(2) losses and significant improvement in the power density. The
power architecture of the proposed LLC-DCX with matrix
transformer structure is shown in Fig. 4, it consists of 4
(3) transformer arrays each has a turns ratio of (10:1) connected in
series in the primary side to get the required total turns ratio of
(4) (40:1) and in parallel in the secondary side to reduce the total
leakage and winding resistance. the primary side winding for the
four transformers are arranged as shown in Fig. 5 with the flux
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direction always from the bottom two transformers to the top
two transformers allowing us to integrate the four transformers
into one core structure by the magnetizing inductance seen by
each transformer can almost be the same ensuring better current
sharing between these transformers, also a better form factor of
the converter is realized than enables in achieving a higher
power density.
properties with a very low figure of merit (FOM=9) that makes
it a good candidate for this application but it has a limited current
handling capability for this parallel SRs where used at each
output set as shown in Fig. 4.
The termination of the matrix transformer plays a great role
in achieving high efficiency with a smaller termination loop
significant amount of losses can be reduced [5], [12], [13]. In
this paper a termination structure is proposed by placing each
SR and its corresponding parallel device on a separate layer (1
and 14) where the transformer windings are sandwiched
between them, this will reduce the termination losses
significantly and also the termination current is distributed
between two layers reducing the termination resistance
significantly.

Fig. 4. Proposed LLC-DCX with matrix transfromer

Fig. 6. PCB winding Arrangement

Fig. 5. Primary Side winding structure and transfromers integration in one

core

The matrix transformer was designed with a 14 Layer PCB

with 2-Oz copper, the PCB winding arrangement is shown in
Fig. 6 with corresponding sectional view of the windings in Fig.
7 which can be linked with the power architecture drawing in
Fig. 4 where Layers (2, 5, 8 and 9) are all one turn secondary
winding paralleled together in four layers similar to the other
secondary windings on layers (4, 7, 10 and 13), for the primary
windings Layers (3 and 6) each has a 5 turns for each Fig. 7. PCB winding sectional view
transformer connected in series forming the required 10:1 turns
ratio and they are paralleled with other layer ( 9 and 12). The
To optimize the design of this transformer the trade-off
primary and secondary windings are interleaved together to
between transformer losses and power density have to be
minimize the AC winding resistance and eddy current losses.
evaluated, using Dowell’s model [15] to calculate the total
As mentioned earlier the secondary side SRs can be of a very transformer conduction loss and modified Stiementz equation
low output voltage. One device candidate (KGF12N05 from for calculating the transformer core loss [16] where ML91
Intersil®) with a 5.5V breakdown voltage shows some great material from Hitachi was selected as a core material. the total

2209
transformer loss with different footprint at different operating
frequencies and core loss densities is shown in Fig. 8. It’s clear
that at the same footprint and power density the operation at
lower frequency will have a lower total losses, the reason for this
is the low (Volt.Sec) applied on the core for this applications
resulting in a core losses that is much smaller than the
conduction losses so keeping the same core size and recuing the
frequency allows us to push it for higher core loss densities
(KW/m3) by which we increase the core loss with a reduction in
the total winding loss due to lowering the AC resistance value
of the transformer winding. The FEA simulation results for on
transformer is shown in Fig. 9 where there is no significant
higher concentration of the field at the termination part showing
the benefit of the proposed termination structure.
Fig. 8. Total transfromer losses varialtion with footprint
Fig. 9. FEA Simulation Field Intensity plot
IV. BUCK CONVERTER DESIGN FOR SIGMA CONVERTER
In the Sigma converter, the buck converter will handle small
portion of the power and will be responsible for regulating the
output voltage, as the turns ratio of the DCX was chosen as high
as possible the buck converter will experience low voltage and
handle smaller output power so a higher efficiency can be
achieved. At different operating output voltages, the referred
voltage at the input of the DCX will also reduce which makes
the buck converter experience larger voltage stress, as example
if the output voltage is required to drop to (Vo= 0.8V) the input
of the DCX will also reduce to 32V and thus the voltage of the
buck converter will increase to 16V, with some variation also in
the input voltage this stress will keep increasing to ensure the
safety of operation, a 40V devices will be used for the buck
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converter, there is no 40V DrMOS devices available in the
market so instead a 40VGaN devices will be used to build the
buck converter. As discussed in [17] the PCB layout for the buck
converter is very critical for higher efficiency operation, the
same guidelines were used to design a buck converter with an
optimal power loop that can operate up to 23V with an output
current of 32A in the worst case of operation at 55V input
voltage and 0.8 output voltage. To ensure high density solution
a PCB winding inductor for the buck converter will be designed
as shown in Fig. 10. The 14 Layer PCB was utilized to realize
a 1-turn inductor paralleled in the 14 layers by which total DCR
resistance can be reduced significantly, the FEA simulation
results for this inductor at the worst case of operation is shown
in Fig. 11 where the maximum flux density for the designed
inductor is around 60% of its saturation flux with inductance
value of 190nH and a DCR resistance of 0.5mΩ which is
considered almost double what we can have with a discrete
inductor but as the buck converter is designed not to operate at
a very high current the losses due to DCR will not have
significant impact on its efficiency.
Fig. 10: PCB winding inductor for the buck converter
Fig. 11: PCB winding inductor for the buck converter
V. EXPERIMENTAL RESULTS
A 48/1V-80A Sigma converter prototype is built as shown
in Fig. 12 that includes the DCX converter, buck converter and
the MCU achieving a power density of 420 W/in3 , all the
converter parameters and devices are listed in Table.I.
Fig. 12: Sigma Converter Prototype
 TABLE I. SIGMA CONVERTER PARAMETERS

Sigma Converter
Input Voltage (Vin) 48v
Output Voltage (Vo) 0.8-1V
Maximum Output current (Io) 80A
Power Density 420 W/in3
DCX Converter
Primary Side Switches EPC 2016
Secondary Sider SRs KGF12N05
Customized UI - Core Material ML-91 Hitachi (b)
Resonant Inductance (Lr) 190 nH Fig. 13: Sigma Converter operating waveforms at Vin=48V and Vo = 1V: (a)
Resonant Capacitor (Cr) 125 nF at 40A output (b) at 80 A output
Magnetizing Inductance (Lm) 36 uH
Transformer Turns ratio 40:1
Operating Frequency 1 MHZ
Buck Converter
HS Switch EPC 2015
LS Switch EPC 2024
Inductor core material ML-95 Hitachi
Inductor (L) 190 nH
Operating Frequency 600 KHZ

The operating wave forms of the converter at input voltage

of 48V and output voltage of 1V during half load and full load
is shown in Fig. 13 (a) and (b) where the primary side and the
secondary SRs switches of the DCX converter can achieve ZVS (a)
a very small turn off current (0.5A) for the primary switches and
also a very small voltage spike at the switching node voltage of
the buck converter due to the optimal layout design used that
minimizes the loop inductance significantly. The same operating
waveforms where plotted at input voltage of 54V and output
voltage of 1V as shown in Fig. 14 where in it is clear that the
voltage across the DCX remains the same at 40V while the buck
converter has a higher voltage stress (14V) and operating at a
lower duty ratio which will reduce its efficiency compared to the
nominal condition where the buck voltage was only 8V , the
DCX can still realize soft switching for all operating conditions.

(b)
Fig. 14: Sigma Converter operating waveforms at Vin=54V and Vo = 1V: (a)
at 40A output (b) at 80 A output

The efficiency of the buck converter was measured

separately first and compared with measurement efficiency with
a discrete inductor to show the effectiveness of the PCB winding
inductor designed, as shown in Fig. 15 the efficiency was
measured the nominal condition and at maximum input voltage
case where as the input voltage increases the maximum output
current from the buck converter will also increase, the curves
(a) shows that the PCB winding inductor has a higher efficiency at
light load and almost the same efficiency at the heavy load
condition which proves that although the PCB winding in this
case has a higher DCR its impact will be marginal on the buck
converter efficiency. The DCX efficiency was also measured

2211
separately at an input voltage of 40V and output of 1V and can
achieve a maximum efficiency of 93.5% with a heavy load
efficiency of 92% as shown in Fig. 16. The total sigma converter
efficiency at different input voltages up to full load of 80A is
shown in Fig. 17 it was also compared to the state of the art
product from VICOR® based on their two stage solution with
where the sigma converter can achieve much higher efficiency
at all operating conditions with a very comparable power density
to their solution.
Fig. 15: Buck Converter Efficiency at 8V and 15V input
Fig. 16: DCX Efficiency at 40V input
Fig. 17: Sigma converter efficiency at 48/1V and 54/1V cases
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VI. CONCLUSIONS
In this paper a Sigma Converter for 48/1V VRM is proposed,
first a design guideline for sigma converter was presented to
ensure a high efficiency of the proposed architecture. A matrix
transformer structure for the LLC DCX with integrating 4
transformers into one core structure and an enhanced
termination method was proposed, the design optimization for
this transformer was discussed to reduce the total transformer
losses. A buck converter with PCB winding inductor design was
also presented for the sigma converter. A hardware prototype is
built for the sigma converter achieving a maximum efficiency of
93.4% and a full load efficiency of 91.6%and power density of
420 W/in3 showing significant increase in the efficiency above
the state of the art solutions.
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