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Unit 12 - Week 11:

Memory Sub-system Organization

Course
outline
Assignment for Week 11
The due date for submitting this assignment has passed. Due on 2018-04-09, 23:59 IST.
How to access
the portal Submitted assignment

Week 1: 1) A process is thrashing if : 1 point

Fundamentals of
Digital Computer it spends a lot of time executing, rather than paging

it spends a lot of time paging, than executing

Week 2:
Fundamental of it has no memory allocated to it
Digital Computer
none of the mentioned
Week 3: No, the answer is incorrect.
Addressing
Score: 0
Modes,
Instruction Set Accepted Answers:
and Instruction it spends a lot of time paging, than executing
Execution Flow
2) The algorithm in which we allocate memory to each process according to its size is known as: 1 point
Week 4:
Addressing proportional allocation algorithm
Modes,
Instruction Set equal allocation algorithm
and Instruction
Execution Flow split allocation algorithm

none of the mentioned

Week 5:
Addressing No, the answer is incorrect.
Modes, Score: 0
Instruction Set
and Instruction Accepted Answers:
Execution Flow proportional allocation algorithm

3) Locality of reference implies that the page reference being made by a process : 1 point
Week 6:
Organization and
Optimization of will always be to the page used in the previous page reference
Micro-
is likely to be one of the pages used in the last few page references
programmed
Controlled will always be one of the pages existing in memory

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Controlled 4) Which of thePowered

followingbypage replacement algorithms suffers from Belady’s Anomaly? 1 point
Control Unit
Optimal replacement
Week 8:
Organization and LRU
Optimization of
Micro- FIFO
programmed Both optimal replacement and FIFO
Controlled
Control Unit No, the answer is incorrect.
Score: 0
Week 9: Memory
Accepted Answers:
Sub-system
Organization FIFO

5) A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a 2 points
Week 10: Memory
Translation Look-aside Buffer (TLB) which can hold a total of 128 page table entries and is 4-way set
Sub-system
Organization associative. The minimum size of the TLB tag is:

Week 11: Memory 11 bits

Sub-system
13 bits
Organization
15 bits
Cache Indexing
and Tagging 20 bits
Variations,
Demand No, the answer is incorrect.
Paging Score: 0

Page Accepted Answers:

Replacement 15 bits
Algorithms
6) Assume that there are 3 page frames which are initially empty. If the page reference string is 1, 2 points
Page Frame 2, 3, 4, 2, 1, 5, 3, 2, 4, 6, the number of page faults using the optimal replacement policy is__________.
Allocation and
Thrashing
5
Summary
6
Quiz :
Assignment for 7
Week 11
8

Week 12: No, the answer is incorrect.

Input/output
Score: 0
Subsystem
Accepted Answers:
7

7) A system uses 3 page frames for storing process pages in main memory. It uses the Least 2 points
Recently Used (LRU) page replacement policy. Assume that all the page frames are initially empty. What is
the total number of page faults that will occur while processing the page reference string: 4, 7, 6, 1, 7, 6, 1,
2, 7, 2

No, the answer is incorrect.

Score: 0
Accepted Answers:
6

8) A system uses FIFO policy for page replacement. It has 4 page frames with no pages loaded to 2 points
begin with. The system first accesses 100 distinct pages in some order and then accesses the same 100
pages but now in the reverse order. How many page faults will occur?

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196

192

197

195

No, the answer is incorrect.

Score: 0
Accepted Answers:
196

9) Consider a main memory with five page frames and the following sequence of page references: 4 points
3, 8, 2, 3, 9, 1, 6, 3, 8, 9, 3, 6, 2, 1, 3. Which one of the following is true with respect to page replacement
policies First-In-First Out (FIFO) and Least Recently Used (LRU)?

Both incur the same number of page faults

FIFO incurs 2 more page faults than LRU

LRU incurs 2 more page faults than FIFO

FIFO incurs 1 more page faults than LRU

No, the answer is incorrect.

Score: 0
Accepted Answers:
Both incur the same number of page faults

10)Increasing the RAM of a computer typically improves performance because: 1 point

Virtual memory increases

Larger RAMs are faster

Fewer page faults occur

Fewer segmentation faults occur

No, the answer is incorrect.

Score: 0
Accepted Answers:
Fewer page faults occur

11)Consider a 2-way set associative cache memory with 4 sets and total 8 cache blocks (0-7) and 3 points
a main memory with 128 blocks (0-127). What memory blocks will be present in the cache after the following
sequence of memory block references if LRU policy is used for cache block replacement. Assuming that
initially the cache did not have any memory block from the current job? 0 5 3 9 7 0 16 55

0 3 5 7 16 55

0 3 5 7 9 16 55

0 5 7 9 16 55

3 5 7 9 16 55

No, the answer is incorrect.

Score: 0
Accepted Answers:
0 5 7 9 16 55

12)Consider a computer system with ten physical page frames. The system is provided with an 3 points
access sequence a1, a2, …, a20, a1, a2, …, a20), where each ai number. The difference in the number of
page faults between the last-in-first-out page replacement policy and the optimal page replacement policy is
__________

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No, the answer is incorrect.

Score: 0
Accepted Answers:
1

13)Consider a process executing on an operating system that uses demand paging. The average 3 points
time for a memory access in the system is M units if the corresponding memory page is available in memory,
and D units if the memory access causes a page fault. It has been experimentally measured that the
average time taken for a memory access in the process is X units. Which one of the following is the correct
expression for the page fault rate experienced by the process?

(D – M) / (X – M)

(X – M) / (D – M)

(D – X) / (D – M)

(X – M) / (D – X)

No, the answer is incorrect.

Score: 0
Accepted Answers:
(X – M) / (D – M)

14)A cache memory needs an access time of 30 ns and main memory 150 ns, what is the average 2 points
access time of CPU (assume hit ratio = 80%)?

60 ns

30 ns

150 ns

70 ns

No, the answer is incorrect.

Score: 0
Accepted Answers:
60 ns

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