ECEG-4281 Microelectronic Devices and Circuits (MDC)

Addis Ababa Institute of Technology (AAIT) School of Electrical and

Computer Engineering
Learning Outcomes

 At the end of the lecture, students should

be able to know about:
 Microelectronics.
 Microelectronics Evolution.
 Moore’s Law.
 Trends in Microelectronics World.

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What is Microelectronics?

 Branch of electronics technology that is

devoted to micron-sized low-powered devices.
 Design - Device or system levels.
 Development - Fabrication technology.
 It is the cornerstone of
 Digital revolution.
 Computer revolution.
 Communication revolution.

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 Transistors Evolution

The Mechanical Relay

(1835)

It all started from this!!!!!!!!!!!

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Relay Based Systems

Z1 in Germany around 1938, unreliable operation

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Vacuum Tubes

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Vacuum Tube Circuits

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Point-to-Point Wiring

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The First Automatic Calculator

Difference Engine I
 25,000 Mechanical parts
 Cost £17,470 (in 1834)!

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and Computer Engineering
First PC’s

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Computers Based on Vacuum Tubes

ENIAC (1946)
 18,000 tubes

 25 meters long

 3 meters high

 Requires own
power plant

Reliability problem and excessive power consumption

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Tracing Defects

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First Transistor

Bell Labs team made up of William Shockley, John Bardeen, and

Walter Brattain created what would soon be named the world's
first transistor.
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PC’s in 1960’s

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Why CMOS?
 Why CMOS (Complementary Metal Oxide Semiconductor)?
 Since they take small silicon area, require simpler
manufacturing processes and consume little power,
they are the most dominant devices used in analog and
digital circuitry of IC technologies.
 Low cost of fabrication and possible to place both digital
and analog circuits in the same chip.
 High performance and dense.
 Further, abundance of CMOS devices made them rule
the IC fabrication, processes and applications.
 Using a single type substrate, either p-type or n-type, it is
possible to fabricate both NMOS and PMOS devices.
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CMOS structure
S – Source
G – Gate
D – Drain

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CMOS Types
Depletion NMOS Enhancement NMOS

S G D S G D

SiO2 SiO2

n n n n n
p-substrate p-substrate

 Enhancement type CMOS do not have no

channel connecting the Drain and Source.
 Depletion type CMOS device is normally On.
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 Why Integrated?

 Why integrated?
 Placing many components and electronic devices
on the same substrate. (millions and billions of
electrical components in a single simple chip)
 Saves power consumption, Greater mobility,
minimizes size, possibility of batch fabrication,
reduced silicon area usage, lower price/cost,
reduced leakage, reduced noise ++++

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Integration Evolution
Complexity Gates per chip
Small-scale integration (SSI) < 12

Medium-scale integration (MSI) 12 to 99

Large-scale integration (LSI) 100 to 9999

Very large-scale integration (VLSI) 10,000 to 99,999

Ultra large-scale integration (ULSI) 100,000 to 999,999

Giga-scale integration (GSI) 1,000,000 or more

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Why CMOS?

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Transistors/Die vs Year

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Chip Complexity

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 Moore’s Law
 Moore’s Law: On The Growth of Semiconductor
Industry
 Moore’s law (Gordon Moore, co-founder of Intel, 1965):
 Empirical rule which predicts that the number of
components per chip doubles every 18-24 months.
 Moore’s Law turned out to be valid for more than 30
years (and still is!).

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Transistor counts and Moore’s law

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Transistor Count VS Cost

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Market Projection

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Transistor Fabrication Technology

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 Microprocessors in 1971

 Intel 4004
 10 μm Si gate PMOS process
 Clock speed:
 0.108 MHz
 Die size ~ 13.5 mm2
 ~ 2300 transistors

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 Microprocessors in 1982

 Intel 80286
 1.5 μm Si gate NMOS
Process
 Clock speed:
 6 ~ 12 MHz
 Die size ~ 68.7 mm2
 ~ 134,000 transistors

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 Microprocessors in 2000

 Pentium IV
 0.18 μm Si gate CMOS
process
 Clock speed:
 1,400 ~ 1,500 MHz
 Die size ~ 224 mm2
 ~ 42,000,000 transistors

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 Microprocessors in 2006

 Core 2 Duo Conroe

 65 nm Si gate CMOS
process
 Clock speed:
 1.2 GHz to 3.0 GHz
 Die size ~ 143 mm2
 ~ 291,000,000 transistors

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 Microprocessors in 2008

 Core i7 (Quad)
 45 nm Si gate CMOS
process
 Clock speed:
 2.4 GHz
 Die size ~ 263 mm²
 ~ 731,000,000 transistors

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 Microprocessors in 2015

 Duo-core + GPU Core i7

Broadwell-U
 14 nm Si gate CMOS process
 Clock speed:
 3.1 GHz
 Die size ~ 133 mm²
 ~ 1,900,000,000 transistors

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 Microprocessors in 2015
 IBM z13 Storage Controller
 22 nm Si gate CMOS process
 Clock speed:
 5.2 GHz
 Die size ~ 678 mm²
 ~ 7,100,000,000 transistors

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IC and Human Hair

IBM - Ring oscillator made up of

12 transistors from 2 different
metals and 1 carbon nanotube

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 Transistor Integration
 Exponential improvement
 System performance
 Cost-per-function
 Power-per-function
 System reliability

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Keys For the Success

 Semiconductor, i.e., Si, as the main material

 MOSFET
 MOSFET Scaling
 CMOS Technology
 Fabrication Technology
 Circuit Engineering

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What to Do This Week?

 Reading assignment
 Read about Energy bands, Carrier concentrations, and
carrier transport phenomenon on, “Semiconductor
devices physics and technology”, Chapter 1 and 2. S.
M. Sze and M. K. Lee

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