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Operating Systems

Process-Synchronization
Process Synchronization
• A cooperating process is one that can affect or be
affected by other processes executing in the
system.
• Cooperating processes can either directly share a
logical address space (that is, both code and data)
or be allowed to share data only through files or
messages.
• Concurrent access to shared data may result in data
inconsistency, however.
• So we discuss various mechanisms to ensure the
orderly execution of cooperating processes that
share a logical address space, so that data
consistency is maintained.

Dr.B.Hemantha Kumar. RVR&JC CE 2


Process Synchronization
What is data inconsistency?:
• For example there is a data variable counter
• Initially counter=5, and there are two process
P1 and P2 sharing this counter.
• Process P1 incrementing counter where as
process P2 is decrementing counter
counter 5

In process P1 In process P2
counter=counter+1 counter=counter-1

Dr.B.Hemantha Kumar. RVR&JC CE 3


Process Synchronization
What is data inconsistency?:

counter 5

In process P1 In process P2
counter=counter+1 counter=counter-1

In process P1 In process P2
register1 = counter register2 = counter
register1 = register1 + 1 register2 = register2 − 1
counter = register1 counter = register2

Dr.B.Hemantha Kumar. RVR&JC CE 4


Process Synchronization
What is data inconsistency?:

counter 4

In process P1 In process P2
register1 = counter register2 = counter
register1 = register1 + 1 register2 = register2 − 1
counter = register1 counter = register2

Case-1
T0:P1 execute register1 = counter {register1 = 5}
T1: P1 execute register1 = register1 + 1 {register1 = 6}
T2: P2 execute register2 = counter {register2 = 5}
T3: P2 execute register2 = register2 − 1 {register2 = 4}
T4: P1 execute counter = register1 {counter = 6}
T5: P2 execute counter = register2 {counter = 4}
Dr.B.Hemantha Kumar. RVR&JC CE 5
Process Synchronization
What is data inconsistency?:

counter 6

In process P1 In process P2
register1 = counter register2 = counter
register1 = register1 + 1 register2 = register2 − 1
counter = register1 counter = register2

Case-2
T0:P1 execute register1 = counter {register1 = 5}
T1: P1 execute register1 = register1 + 1 {register1 = 6}
T2: P2 execute register2 = counter {register2 = 5}
T3: P2 execute register2 = register2 − 1 {register2 = 4}
T5: P2 execute counter = register2 {counter = 4}
T4: P1 execute counter = register1 {counter = 6}
Dr.B.Hemantha Kumar. RVR&JC CE 6
Process Synchronization
What is data inconsistency?:

counter 5

In process P1 In process P2
register1 = counter register2 = counter
register1 = register1 + 1 register2 = register2 − 1
counter = register1 counter = register2

Case-3
T0:P1 execute register1 = counter {register1 = 5}
T1: P1 execute register1 = register1 + 1 {register1 = 6}
T4: P1 execute counter = register1 {counter = 6}
T2: P2 execute register2 = counter {register2 = 6}
T3: P2 execute register2 = register2 − 1 {register2 = 5}
T5: P2 execute counter = register2 {counter = 5}
Dr.B.Hemantha Kumar. RVR&JC CE 7
Process Synchronization
What is data inconsistency?:
Case-1 T0:P1 execute register1 = counter
counter 4
T0,T1,T2,T3,T4,T5 T1: P1 execute register1=register1 + 1
Case-2 T2: P2 execute register2 = counter
counter 6 T3: P2 execute register2=register2 − 1
T0,T1,T2,T3,T5,T4
T4: P1 execute counter = register1
Case-3 T5: P2 execute counter = register2
counter 5
T0,T1,T4,T2,T3,T5

This incorrect state is because of we allowed both processes


to manipulate the variable counter concurrently. A situation
like this, where several processes access and manipulate the
same data concurrently and the outcome of the execution
depends on the particular order in which the access
takes place, is called a race condition. Due to race condition
we are getting different data known as data inconsistency

Dr.B.Hemantha Kumar. RVR&JC CE 8


Process Synchronization
The Critical-Section Problem:
• Consider a system consisting of n processes {P0, P1, ...,
Pn−1}. Each process has a segment of code, called a
critical section, in which the process may be changing
common variables, updating a table, writing a file, and
so on.
• The critical-section problem is to design a protocol that
the processes can use to cooperate.
• Each process must request permission to enter its
critical section.
• The section of code implementing this request is the
entry section. The critical section may be followed by
an exit section. The remaining code is the remainder
section.

Dr.B.Hemantha Kumar. RVR&JC CE 9


Process Synchronization
• The Critical-Section Problem:
do {
entry section Request

critical section
exit section Release

remainder section

} while (true);

General structure of a typical process Pi .

Dr.B.Hemantha Kumar. RVR&JC CE 10


Process Synchronization
When one process is executing in its critical section, no other process is
allowed to execute in its critical section.
That is, no two processes are executing in their critical sections at the
same time.

Process P1 Shared Process P2


entry section Data
entry section
critical section critical section
exit section exit section

remainder section remainder section

Dr.B.Hemantha Kumar. RVR&JC CE 11


Process Synchronization
A solution to the critical-section problem must satisfy the
following three requirements:
• 1. Mutual exclusion. If process Pi is executing in its critical
section, then no other processes can be executing in their
critical sections.
• 2. Progress. If no process is executing in its critical section
and some processes wish to enter their critical sections, then
only those processes that are not executing in their
remainder sections can participate in deciding which will
enter its critical section next, and this selection cannot be
postponed indefinitely.
• 3. Bounded waiting. There exists a bound, or limit, on the
number of times that other processes are allowed to enter
their critical sections after a process has made a request to
enter its critical section and before that request is granted.
Dr.B.Hemantha Kumar. RVR&JC CE 12
Process Synchronization
• Two general approaches are used to handle critical
sections in operating systems: preemptive kernels and
non-preemptive kernels.
• A preemptive kernel allows a process to be preempted
while it is running in kernel mode.
• A non-preemptive kernel does not allow a process
running in kernel mode to be preempted; a kernel-
mode process will run until it exits kernel mode, blocks,
or voluntarily yields control of the CPU

Dr.B.Hemantha Kumar. RVR&JC CE 13


Process Synchronization
Peterson’s Solution.
• It is a two process solution
• The two processes share two variables: int turn;
boolean flag[2] , initial value is flag[0]=flag[1]=false
• The variable turn indicates whose turn it is to enter the
critical section.
• The flag array is used to indicate if a process is ready to
enter the critical section. flag[i] = true implies that
process Pi is ready!
• The two processes are numbered P0 and P1. For
convenience, when presenting Pi, we use Pj to denote
the other process; that is, j equals 1 − i

Dr.B.Hemantha Kumar. RVR&JC CE 14


Process Synchronization
Peterson’s Solution.

do {
flag[i] = true;
turn = j; Request
while (flag[j] && turn == j);

critical section
flag[i] = false; Release

remainder section

} while (true);

The structure of process Pi in Peterson’s solution.

Dr.B.Hemantha Kumar. RVR&JC CE 15


Process Synchronization
Peterson’s Solution.

do {
flag[j] = true;
turn = i; Request
while (flag[i] && turn == i);

critical section
flag[j] = false; Release

remainder section

} while (true);

The structure of process Pj in Peterson’s solution.

Dr.B.Hemantha Kumar. RVR&JC CE 16


Process Synchronization
Peterson’s Solution.
• The variable turn indicates whose turn it is to enter its
critical section.
• That is, if turn == i, then process Pi is allowed to execute
in its critical section.
• The flag array is used to indicate if a process is ready to
enter its critical section.
• For example, if flag[i] is true, this value indicates that Pi
is ready to enter its critical section

Dr.B.Hemantha Kumar. RVR&JC CE 17


Process Synchronization
Peterson’s Solution.

do { do {
flag[0] = true; flag[1] = true;
turn = 1; turn = 0;
while (flag[1] && turn == 1); while (flag[0] && turn == 0);

critical section critical section


flag[0] = false; flag[1] = false;

remainder section remainder section

} while (true); } while (true);

process P0 process P1

Dr.B.Hemantha Kumar. RVR&JC CE 18


Process Synchronization
Peterson’s Solution.(software-based solution)
• It is satisfying all these three requirements:
• 1. Mutual exclusion is preserved.
• 2. The progress requirement is satisfied.
• 3. The bounded-waiting requirement is met.
• Mutual exclusion is preserved : For the process P0 & P1 if
both processes can be executing in their critical sections at
the same time, then
• flag[0] == flag[1] == true, and value of turn can be either 0 or
1 but cannot be both.
• Hence, one of the processes —say, P1( if turn==1)—must
have successfully executed the while statement, where as P0
is waiting as a result, mutual exclusion is preserved.

Dr.B.Hemantha Kumar. RVR&JC CE 19


Process Synchronization
Peterson’s Solution.
• The progress requirement is satisfied : If no process either
P0 or P1 is under critical section, then the process(say P0)
which is first requesting the critical section can enter
immediately in its critical section. For example if P0 is
requesting then flag[0]=true and turn=1 and initial value of
flag[1]=false . So for the request section the while condition
is false for P0 , so P0 can enter its critical section. Satisfying
progress requirement.

flag[0] = true;
turn = 1;
while (flag[1] && turn == 1);

Dr.B.Hemantha Kumar. RVR&JC CE 20


Process Synchronization
Peterson’s Solution.
• The bounded-waiting requirement is met : However, once
Pj exits its critical section, it will reset flag[j] to false,
allowing Pi to enter its critical section. If Pj resets flag[j]
to true, it must also set turn to i.
• Thus, since Pi does not change the value of the variable
turn while executing the while statement, Pi will enter
the critical section (progress) after at most one entry by
Pj (bounded waiting). So satisfying bounded-waiting
requirement .

flag[j] = false;

Dr.B.Hemantha Kumar. RVR&JC CE 21


Synchronization Hardware
Synchronization Hardware: software-based solutions such
as Peterson’s are not guaranteed to work on modern
computer architectures.
• Many systems provide hardware support for critical
section code .
• Many modern computer systems therefore provide
special hardware instructions that allow us either to
test and modify the content of a word or to swap the
contents of two words atomically.
• These atomic hardware instructions are : test and set()
and swap()instructions.

Dr.B.Hemantha Kumar. RVR&JC CE 22


Synchronization Hardware
Synchronization Hardware:

// test and set() instruction is defined as


boolean test and set(boolean *target) {
boolean rv = *target;
*target = true;
return rv;
}
// swap() instruction is defined as
void swap (boolean *a, boolean *b) {
boolean temp = *a;
*a = *b;
*b = temp:
}
Dr.B.Hemantha Kumar. RVR&JC CE 23
Synchronization Hardware
Mutual-exclusion implementation with TestAndSet
• Shared boolean variable lock., initialized to false.

do {
while ( TestAndSet (&lock )) ; // do nothing
// critical section
lock = FALSE;
// remainder section
} while (TRUE);

Dr.B.Hemantha Kumar. RVR&JC CE 24


Synchronization Hardware
• Solution using Swap :Mutual-exclusion implementation
• Shared Boolean variable lock initialized to FALSE; Each
process has a local Boolean variable key

do {
key = TRUE;
while ( key == TRUE)
swap (&lock, &key );
// critical section
lock = FALSE;
// remainder section
} while (TRUE);

Dr.B.Hemantha Kumar. RVR&JC CE 25


Synchronization Hardware
do {
waiting[i] = TRUE;
key = TRUE;
Algorithm using the test while (waiting[i] && key)
and set() instruction that key = TestAndSet(&lock);
satisfies all the critical- waiting[i] = FALSE;
section requirements. // critical section
The common data j = (i + 1) % n;
structures are: while ((j != i) && !waiting[j])
boolean waiting[n]; j = (j + 1) % n;
boolean lock; if (j == i)
lock = FALSE;
else
waiting[j] = FALSE;
// remainder section
} while
Dr.B.Hemantha Kumar. RVR&JC CE(TRUE); 26

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