Microelectronic system integration

Comparison and simple analysis of Motorola's SLICC and JACS-Pak

- SLICC (Fig 1.)

The SLICC and the JACS-Pak are chip scale packages developed by Motorola. The basic
configuration of these CSPs is FC-BGA, and both packages use an organic substrate as the
interposer. The SLICC package was considered the first CSP with flip-chip die. However, because of
the costly wafer-bumping process and the expensive substrate, the SLICC package was never
commercialized.

Fig 1.

Components:
o C4 solder bumps with the height 76 - 127 μm which is made of 97Pb/3Sn solder
o solder clads made of 60Sn/40Pb
o organic substrate made of glass fiber and FR-4 or BT epoxy and thickness is 0.2 – 0.3 mm
o Solder-ball bond pads made of Au flash over Cu/Ni and diameter is 0.8 mm
o C5 package terminal balls made of 62Sn/2Ag/36Pb and the diameter is 0.56 mm
Main Challenges:
o High cost of package substrate
o High cost of wafer bumping
Advantages:
o Low package delay
o Electrical parasitics superiority
 - JACS-Pak (Fig 2.)

The JACS-Pak is an improved version of the SLICC with competitive cost-effectiveness. It is

focused on SLICCs main disadvantages in terms of cost and focused on cost reduction in those 2
main areas.

Components: All most all components are the same with SLICC except for few things
o Eutectic solder bumps
o semirigid laminate (glass/epoxy) or flexible
o film (polyimide) is substituted for the original rigid substrate( less thicker than SLICCs)
o Because the flip chip has eutectic solder bumps, the top bond pads of this new substrate do not
require clad solder.
Main challenges:
o Number of I/O is limited to 150.

Advantages:
o Low packaging cost compared with SLICC
o Less complex structure because cancellation of clad on the top of bond pads
o Total package thickness of less than 1 mm

Fig 2.

Reference:
• John H. Lau and Shi-Wei Ricky Lee, Chip Scale Package(CSP), USA, McGraw-Hill companies, Inc.