5.7 Microprocessors: Basic Maintenance Training Manual Module 5 Digital Technology / EIS

Basic Maintenance Module 5 Digital Technology / EIS
Training Manual 5.7 Microprocessors
5.7 Microprocessors
Sep04 / THTT Corresponding with EASA Part-66

Copyright by SR Technics Switzerland For training purposes only Cat: B2 5.7 - 1
Introduction Introduction to System Components and Buses

The logic circuits studied in Sub Module 5.5 "Logic Circuits" have all been based Figure 1 shows a microprocessor with the necessary support circuitry to perform
basic input and output functions. We will use this figure to illustrate how the micro-
on combinational logic gates and sequential logic IC’s. One example for an appli-
processor acts like a general-purpose device, driven by software, to perform a
cation of such a circuit is a traffic light controller that goes through the sequence
green-yellow-red. To implement the circuit using combinational and sequential specific task related to the input data switches and output data LED’s. First, let's
discuss the components of the system.
logic, we would use some counter IC’s for the timing, a shift register for sequencing
the lights, and a D flip-flop if we want to interrupt the sequence with a pedestrian Microprocessor
crosswalk push button. A complete design solution is easily possible within the log-
ic circuits known from Sub Module 5.5 "Logic Circuits". The heart of the system is an 8-bit microprocessor. It could be any of the popular
8-bit microprocessors such as the Intel 8085, the Motorola 6800, or the Zilog Z80.
On the other hand, think about the complexity of electronic control of a modern au- They are called 8-bit microprocessors because external and internal data move-
tomobile. There are several analog quantities to monitor, such as engine speed, ment is performed on 8 bits at a time. It will read program instructions from memory
manifold pressure, and coolant temperature; and there are several digital control and execute those instructions that drive the three external buses with the proper
functions to perform, such as spark plug timing, fuel mixture control, and radiator levels and timing to make the connected devices perform specific operations. The
circulation control. The operation is further complicated by the calculations and de- buses are simply groups of conductors that are routed throughout the system and
cisions that have to be made on a continuing basis. This is definitely an application tapped into by various devices (or IC’s) that need to share the information that is
for a microprocessor-based system. travelling on them.
A microprocessor-based solution is considered, whenever an application involves
making calculations, making decisions based on external stimulus, and maintain- Address Bus
ing memory of past events. A microprocessor offers several advantages over the The address bus is 16 bits wide and is generated by the microprocessor to select
hard-wired Integrated Circuit. First, the microprocessor itself is a general-purpose a particular location or IC to be active. Because the address bus is 16 bits wide, it
device. It takes on a unique personality by the software program instructions given can actually specify 65,536 (216) different addresses. The input port is one ad-
by the designer. If you want it to count, you tell it to do so, with software. If you want dress, the output port is one address, and the memory in a system of this size may
to shift its output level left, there's an instruction for that. And if you want to add a be 4K (4096) addresses. This leaves about 60K addresses available for future ex-
new quantity to a previous one, there's another instruction for that. Its capacity to pansion.
perform arithmetic, make comparisons, and update memory makes it a very pow-
erful digital problem solver. Making changes to an application can usually be done Data Bus
by changing a few program instructions, unlike the hard-wired system that may Once the address bus is set up with the particular address that the microprocessor
have to be totally redesigned and reconstructed. wants to access, the microprocessor then sends or receives 8 bits of data to or
New microprocessors are introduced every year to fill the needs of the design en- from that address via the bidirectional (two-way) data bus.
gineer. However, the theory behind microprocessor technology remains basically
the same. It is a general-purpose digital device that is driven by software instruc- Control Bus
tions and communicates with several external support chips to perform the neces- The control bus is of varying width, depending on the microprocessor being used.
sary input/output of a specific task. Once you have a general understanding of one It carries control signals that are tapped into by the other IC’s to tell what type of
of the earlier microprocessors that came on the market, such as the Intel 8080/ operation is being performed. From these signals, the IC’s can tell if the operation
8085, the Motorola 6800, or the Zilog Z80, it is easy to upgrade to the new micro- is a read, a write, an I/0, a memory access, or some other operation.
processors as they are introduced.

Figure 1: Example of a Microprocessor-based System Memory

There will be at least two memory IC’s: ROM or EPROM and a RAM. The ROM
will contain the initialization instructions, telling the microprocessor what to do
when power is first turned on. This includes tasks like reading the keyboard and
driving the CRT display. It will also contain several subroutines that can be called
by the microprocessor to perform, such tasks as time delays or input/output data
translation. These instructions, which are permanently stored in ROM, are referred
to as the monitor program or operating system. The RAM part of memory is vola-
tile, meaning that it loses its contents when power is turned off, and is therefore
used only for temporary data storage.
Input Port
The input port provides data to the microprocessor via the data bus. In this case,
it is an octal buffer with three-stated outputs. The input to the buffer will be provid-
ed by some input device like a keyboard or, as in this case, from eight HIGH-LOW
toggle switches. The input port will dump its information to the data bus when it
receives a Chip Enable (CE) from the address decoder and a Read command
(RD) from the control bus.
Output Port
The output port provides a way for the microprocessor to talk to the outside world.
It could be sending data to an output device like a printer or, as in this case, it could
send data to eight LED’s. An octal D flip-flop is used as the interface because, after
the microprocessor sends data to it, the flip-flop will latch on to the data, allowing
the microprocessor to continue with its other tasks.
To load the D flip-flop, the microprocessor must first set up the data bus with the
data to be output. Then it sets up the address of the output port so that the address
decoder will issue a LOW CE to it. Finally, it issues a pulse on its WR (write) line
that travels the control bus to the clock input of the D flip-flop. When the D flip-flop
receives the clock trigger pulse, it latches onto the data that are on the data bus at
that time and drives the LED’s.
Address Decoder
The address decoder is usually an octal decoder. Its function is to provide active-
LOW Chip Enables (CE) to the external IC’s based on information it receives from
the microprocessor via the control and address buses. Because there are multiple
IC’s on the data bus, the address decoder ensures that only one IC is active at a
time to avoid a bus conflict caused by two IC’s writing different data to the same
bus.

Software Control of Microprocessor Systems complished by applying the proper digital signal on one of the interrupt inputs:
INTR, RSTx.x, or TRAP. Serial communication capabilities are provided via the Sill
As a brief introduction to microprocessor software, let's refer back to Figure 1 and and SOD I/O pins (Serial Input Data, Serial Output Data).
learn the statements required to perform some basic input/output operations.
The register array contains the six general-purpose 8-bit registers and three 16-
To route the data from the input switches to the output LED’s, the data from the
bit registers. Sixteen-bit registers are required whenever you need to store ad-
input port must first be read into the microprocessor before they can be sent to the
dresses. The stack pointer stores the address of the last entry on the stack. The
output port. The microprocessor has an 8-bit internal register called the accumu- stack is a data storage area in RAM used by certain microprocessor operations.
lator that can be used for this purpose.
The program counter contains the 16-bit address of the next software instruction
The software used to drive microprocessor-based systems is called assembly lan- to be executed.
guage. The Intel 8080/8085 assembly language statement to load the contents of
The third 16-bit register is the address latch, which contains the current 16-bit ad-
the input port into the accumulator is LDA addr: LDA is called a mnemonic, an ab- dress that is being sent to the address bus.
breviation of the operation being performed, which in this case is "Load Accumu-
lator." The six general-purpose 8-bit registers can also be used in pairs (B-C, D-E, H-L)
to store addresses or 16-bit data.
The suffix addr will be replaced with a 16-bit address (4 hex digits) specifying the
address of the input port. After the execution of LDA addr; the accumulator will
contain the digital value that was on the input switches. Now, to write these data
to the output port, we use the command STA addr: STA is the mnemonic for "Store
Accumulator" and addr is the 16-bit address where you want the data stored.
Execution of those two statements is all that is necessary to load the value of the
switches into the accumulator and then transfer these data to the output LED’s.
The microprocessor takes care of the timing on the three buses, and the address
decoder takes care of providing chip enables to the appropriate IC’s.
If the system is based on Motorola or Zilog technology, the software in this case
will be almost the same.
Internal Architecture of a Microprocessor

The 8085A is an 8-bit parallel central processing unit (CPU). The accumulator dis-
cussed in the previous section is connected to an 8-bit internal data bus. Six other
general-purpose registers labelled B, C, D, E, H, and L are also connected to the
same bus. All arithmetic operations take place in the arithmetic logic unit (ALU).
The accumulator, along with a temporary register, is used as input to all arithmetic
operations. The output of the operations is sent to the internal data bus and to five
flag flip-flops that record the status of the arithmetic operation.
The instruction register and decoder receive the software instructions from exter-
nal memory, interpret what is to be done, and then create the necessary timing and
control signals required to execute the instruction.
The block diagram also shows interrupt control, which provides a way for an ex-
ternal digital signal to interrupt a software program while it is executing. This is ac-

Figure 2: Internal Architecture of a 8085 Intel Microprocessor

Instruction Execution within a Microprocessor 5. The timing and control unit again issues a LOW pulse on the RD line. This
pulse will travel the control bus to the input port, causing the data at the input
Now, referring back to the basic I/0 system diagram of Figure 1, let's follow the flow port (4000H) to be put onto the external data bus.
of the LDA and STA instructions as they execute in the block diagram of the
8085A. Figure 2 shows the 8085A block diagram with numbers indicating the suc- 6. That data will travel across the external data bus in Figure 1, to the internal
cession of events that occurs when executing the LDA instruction. data bus in Figure 3, to the accumulator, where they are now stored.
Remember, LDA addr and STA addr are assembly language instructions, stored 7. The instruction is complete.
in an external memory IC, that tell the 8085A CPU what to do. LDA addr tells the
CPU to load its accumulator with the data value that is at address addr. STA addr
tells the CPU to store (or send) the 8-bit value that is in the accumulator to the out-
put port at address addr.
The mnemonics LDA and STA cannot be understood by the CPU as they are; they
have to be assembled, or converted, into a binary string called machine code. Bi-
nary or hexadecimal machine code is what is actually read by the CPU and passed
to the instruction register and decoder to be executed. The Intel 8085A Users Man-
ual gives the machine code translation for LDA as 3A16 (or 3AH) and STA as 32H.
Before studying the flow of execution in Figure 3, we need to make a few assump-
tions. Let's assume that the input port is at address 4000H and the output port is
at address 6000H. Let's also assume that the machine code program LDA 4000H,
STA 6000H is stored in RAM starting at address 2000H.
Load Accumulator
The sequence of execution of LDA 4000H in Figure 3 will be as follows:
1. The program counter will put the address 2000H on the address bus.
2. The timing and control unit will issue a LOW pulse on the RD line. This pulse
will travel the control bus to the RAM in Figure 1 and will cause the contents
at location 2000H to be put onto the external data bus. RAM (2000H) has the
machine code 3AH, which will travel across the internal data bus to the in-
struction register.
3. The instruction register passes the 3AH to the instruction decoder, which de-
termines that 3AH is the code for LDA and that a 16-bit (2-byte) address must
follow. Because the entire instruction is 3 bytes (one for the 3AH and two for
the address 4000H), the instruction decoder increments the program counter
two more times so that the address latch register can read and store bytes 2
and 3 of the instruction.
4. The address latch and address bus now have 4000H on them, which provides
the LOW for the input port in Figure 1.

Figure 3: Execution of the LDA instruction within the 8085A

Store Accumulator
Execution of the STA instruction within the 8085A.
1. After the execution of the 3-byte LDA 4000H instruction, the program counter
will have 2003H in it. (Instruction LDA 4000H resided in locations 2000H,
2001H, 2002H.)
2. The timing and control unit will issue a LOW pulse on the RD line. This will
cause the contents of RAM location 2003H to be put onto the external data
bus. RAM (2003H) has the machine code 32H, which will travel up the internal
data bus to the instruction register.
3. The instruction register passes the 32H to the instruction decoder, which de-
termines that 32H is the code for STA and that a 2-byte address must follow.
The program counter gets incremented two more times, reading and storing
bytes 2 and 3 of the instruction into the address latch.
4. The address latch and address bus now have 6000H on them, which is the
address of the output port in Figure 1.
5. The instruction decoder now issues the command to place the contents of the
accumulator onto the data bus.
6. The timing and control unit issues a LOW pulse on the WR line. Since the WR
line is used as a clock input to the D flip-flop of Figure 1, the data from the data
bus will be stored and displayed on the LED’s. (The WR line from the rnicro-
processor is part of the control bus in Figure 1.)

Figure 4: Execution of the STA instruction within the 8085A

Programming a Microprocessor convert these program statements into assembly language. The assembler pro-
gram will then translate the assembly program further into machine code which
The microprocessor is driven by software instructions to perform specific tasks. can be "understood" by the microprocessor.
The instructions are first written in assembly language using mnemonic abbrevia-
tions and then converted to machine language so that they can be interpreted by Figure 5: Flowchart of the Down-Counter Program
the microprocessor. The conversion from assembly language to machine lan-
guage involves translating each mnemonic into the appropriate hexadecimal ma-
chine code and storing the codes in specific memory addresses. This can be done
by a software package called an assembler, provided by the microprocessor man-
ufacturer, or it can be done by the programmer by looking up the codes and mem-
ory addresses (called hand assembly).
Assembly language is classified as a low-level language because the programmer
has to take care of all the most minute details. High-level languages such as Pas-
cal, FORTRAN, BASIC and C, are much easier to write but are not as memory ef-
ficient or as fast as assembly language. All languages, whether Pascal, BASIC,
FORTRAN or C, get reduced to machine language code before they can be exe-
cuted by the microprocessor.
The conversion from high-level languages to machine code is done by a compiler.
The compiler makes memory assignments and converts the English-language-
type instructions into executable machine code.
On the other hand, assembly language translates directly into machine code. This
allows the programmer to write the most streamlined, memory-efficient, and fast-
est programs possible on the specific hardware configuration that is being used.
Assembly language and its corresponding machine code differ from processor to
processor. The fundamentals of the different assembly languages are the same.
Program Languages
The following example will show the different levels of microprocessor program-
ming. The comparison of each level of program language will help to understand
how software works. Therefore a simple program in assembly language will be
shown in Basic computer language and also in machine code.
Program Definition
The program that will be used as example will function as a down-counter, count-
ing 9 to 0 repeatedly. In a first step, a flowchart is drawn, shown in Figure 5, that
shows the program flow and makes it easier to understand what to program must
do and how this can be implemented as program code. The next step is to write
the program statements in a high level language like basic. The compiler will then

According to the flowchart, the counter is decremented repeatedly until zero is

reached, at which time the counter is re initialized to 9 and the cycle repeats. The
instructions used to implement the program are given in the following table
Table 1: Down-Counter Program in three different languages
BASIC Language Assembly Language Machine Language
Line Instruction Label Instruction Address Contents
10 COUNT=9 START: MVI A,09H 2000 3E (opcode)

2001 09 (data)
20 COUNT=COUNT-1 LOOP: DCR A 2002 3D (opcode)
30 IF COUNT=0 JZ START 2003 CA (opcode)

THEN GO TO 10 2004 00 (address:
2005 20 2000)
40 GO TO 20 JMP LOOP 2006 C3 (opcode)

2007 02 (address:
2008 20 2002)
BASIC move the data value 09H into register A (register A and the accumulator are the
same).
BASIC uses the variable COUNT to hold the counter value. Line 30 checks the
count. If COUNT is equal to zero, then the program goes back to the beginning. The next instruction, DCR A, decrements register A by 1.
Otherwise, it goes back to subtract 1 from COUNT and checks COUNT again. The third instruction, JZ START, is called a conditional jump. The condition that it
The 8085A version of the program is first written in assembly language and then it is checking for is the zero condition. As the A register is decremented, if A reaches
is either hand assembled into machine language or it could be computer assem- 0, then a flag bit, called the zero flag, gets set (a set flag is equal to 1). The instruc-
bled using a personal computer with an assembler software package. tion JZ START is interpreted as "jump to statement label START if the zero flag is
set." If the condition is not met (zero flag not set), then control passes to the next
The same program in a more modern high level program language like C would
instruction,
look similar, but different instructions, specific to the program language would be
used. JMP LOOP, which is an unconditional jump. This instruction is interpreted as
"jump to label LOOP regardless of any condition flags." At this point you should
Assembly Language see how the assembly language program functions exactly like the BASIC lan-
guage program.
Assembly language is written using mnemonics: MVI, DCR, JZ, and the like. The
term mnemonics is defined as "abbreviations used to assist the memory." The first
mnemonic, MVI, stands for "Move Immediate." The instruction MVI A,09H will

Machine Language Survey of Microprocessors and Manufacturers

Machine language is the final step in creating an executable program for the mi- Since its introduction in the early 1970s, the microprocessor has had a huge im-
croprocessor. In this step we must determine the actual hexadecimal codes that pact on the electronics industry. The first microprocessors had a 4-bit internal data
will be stored in memory to be read by the microprocessor. First, we have to de- width. In 1974, Intel introduced the first 8-bit microprocessor, the 8008. Within a
termine what memory locations will be used for our program. This depends on the year it offered an upgrade, the 8080, which served as a point of comparison for all
memory-map assignments made in the system hardware design. We have 64K of other manufacturers.
addressable memory locations (0000H to FFFFH). We'll make an assumption that The first challenger to the 8080 was the Motorola 6800. Other IC manufacturers
the user program area was set up in the hardware design to start at location (National Semiconductor, Texas Instruments, Zilog, RCA, and Fairchild) soon in-
2000H. The length of the program memory area depends on the size of the ROM troduced their own versions of the microprocessor. The race had begun. Since
or RAM memory IC being used. A 256 x 8 RAM memory is usually sufficient for then, 16-, 32-, and 64-bit architectures have been developed and are finding their
introductory programming assignments and is commonly used on educational mi- way into most new high-end applications.
croprocessor trainers. The machine language program listed in Table 1 on
page 11 fills up 9 bytes of memory (2000H to 2008H). Along the way, manufacturers started integrating whole multichip systems with
RAM, ROM, and I/O into a single package called a microcontroller: Today the mi-
The first step in the hand assembly is to determine the code for MVI A. This is crocontroller is the most popular choice for embedded control applications such as
known as the opcode (operation code) and is found in an 8085A Assembly Lan- those found in automobiles, home entertainment systems, and data acquisition
guage Reference Chart. The opcode for MVI A is 3E. The programmer will store and control systems.
the binary equivalent for 3E (0011 1110) into memory location 2000H. Instructions
for storing your program into memory are given by the manufacturer of the micro- Each microprocessor and microcontroller has its own special niche, but through-
processor trainer that you are using. If you are using an assembler software pack- out the years the two most important players have been Intel and Motorola.
age, then the machine code that is generated will usually be saved on a computer The following Table 2 on page 13 will give you an overview of the development of
disk or used to program an EPROM to be placed in a custom microprocessor hard- the Intel microprocessor families. The expressions below are some of the charac-
ware design. teristics that define a microprocessor.
The machine language instruction MVI A,09H in Table 1 on page 11 requires 2 Bus width is the size of the data bus. This size defines, how many bits can be
bytes to complete. The first byte is the opcode, 3E, which identifies the instruction moved at the same time.
for the microprocessor. The second byte (called the operand) is the data value, Addressable Memory Space defines the size of memory that can be addressed
09H, which is to be moved into register A.
by the microprocessor. This size depends on the size of the address bus and on
The second instruction, DCR A, is a 1-byte instruction. It requires just its opcode, the architecture used to access the memory.
3D, which is found in the reference chart.
Clock Cycle Rate is the frequency at which the microprocessor can operate. This
The opcode for the JZ instruction is CA. It must be followed by the 16-bit (2-byte) frequency is given to the microprocessor by an oscillator. The clock cycle rate de-
address to jump to if the condition (zero) is met. This makes it a 3-byte instruction. fines the speed of operation of the microprocessor.
Byte 2 of the instruction (location 2004H) is the low-order byte of the address, and
byte 3 is the high-order byte of the address to jump to. (Be careful to always enter
addresses as low-order first, then high-order.)
The opcode for JMP is C3 and must also be followed by a 16-bit (2-byte) address
specifying the location to jump to. Therefore, this is also a 3-byte instruction where
byte 2-byte 3 gives a jump address of 2002H.

Table 2: Development of Intel Microprocessors
Part No. Number of Bus Width Adressable Clock Cycle Rate Comments
Transistors Memory Space
4004 2’300 4bits 640 bytes 108 kHz 1971, First Microcomputer chip, Arithmetic manipulation
8080 6’000 8bits 64 kilobytes 2 MHz 1974
8088 29’000 8 bits 1 megabyte 5MHz, 8 MHz 1979, 10X the performance of the 8080
80286 134’000 16 bits 16 megabytes 6MHz, 8MHz, 1982, 8086 upgrade with extended addressing capability
10MHz, 12.5MHz
80386DX 275’000 32 bits 4 gigabytes 16MHz, 20MHz, 1985, First X86 chip to handle 32-bit data sets
25MHz, 33MHz
80486DX 1’200’000 32 bits 4 gigabytes 25MHz, 33MHz, 1989, Upgrade of the 386
50MHz
Pentium 3’100’000 64 bits 4 gigabytes 60MHz,66MHz 1993, Superscalar architecture brought 5x the performance of the 33-MHz Intel
486 DX processor
Pentium Pro 5’500’000 64 bits 64 gigabytes 150MHz, 166MHz, 1995, Dynamic execution architecture drives high-performing processor
180MHz, 200MHz
Pentium II 7’500’000 64 bits 64 gigabytes 200 MHz, 1997, Dual independent bus, dynamic execution, Intel MMX technology
233MHz, 266MHz,
300MHz
Pentium III 9’500’000 64 bits 64 gigabytes 450, 500, 550, and 1999, Advanced imaging, 3-D, streaming audio, video and speech recognition
600MHz applications. Enhance Internet experiences, allowing users to do such things
as browse through realistic online museums and stores and download high-
quality video.
Pentium 4 42’000’000 ? ? 1.8, 1.7, 1.6, 1.5, 2001, Possibility to create professional-quality movies; deliver TV-like video via
and 1.4 GHz the Internet; communicate with real-time video and voice; render 3D graphics
in real time; quickly encode music for MP3 players; and simultaneously run
several multimedia applications while connected to the Internet.



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Basic Maintenance Module 5 Digital Technology / EIS

Training Manual 5.7 Microprocessors

Sep04 / THTT Corresponding with EASA Part-66

Introduction Introduction to System Components and Buses

Sep04 / THTT Corresponding with EASA Part-66

Figure 1: Example of a Microprocessor-based System Memory

Sep04 / THTT Corresponding with EASA Part-66

Internal Architecture of a Microprocessor

Sep04 / THTT Corresponding with EASA Part-66

Figure 2: Internal Architecture of a 8085 Intel Microprocessor

Sep04 / THTT Corresponding with EASA Part-66

Sep04 / THTT Corresponding with EASA Part-66

Figure 3: Execution of the LDA instruction within the 8085A

Sep04 / THTT Corresponding with EASA Part-66

Sep04 / THTT Corresponding with EASA Part-66

Figure 4: Execution of the STA instruction within the 8085A

Sep04 / THTT Corresponding with EASA Part-66

Sep04 / THTT Corresponding with EASA Part-66

According to the flowchart, the counter is decremented repeatedly until zero is

Table 1: Down-Counter Program in three different languages

BASIC Language Assembly Language Machine Language

Line Instruction Label Instruction Address Contents

10 COUNT=9 START: MVI A,09H 2000 3E (opcode)

20 COUNT=COUNT-1 LOOP: DCR A 2002 3D (opcode)

30 IF COUNT=0 JZ START 2003 CA (opcode)

40 GO TO 20 JMP LOOP 2006 C3 (opcode)

Sep04 / THTT Corresponding with EASA Part-66

Machine Language Survey of Microprocessors and Manufacturers

Sep04 / THTT Corresponding with EASA Part-66

Table 2: Development of Intel Microprocessors

8080 6’000 8bits 64 kilobytes 2 MHz 1974

Sep04 / THTT Corresponding with EASA Part-66

Sep04 / THTT Corresponding with EASA Part-66

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