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Preview on Digital System Design with

VHDL
DSD with VHDL (08.546)
Prerequisite
− Digital Electronics
− Programming concept in any high level language
DSD with VHDL (08.546)
Objectives:
 The course introduce digital system design with a focus on Very high
speed integrated circuits Hardware Description Language (VHDL)
 The students will learn how a VHDL is used to describe and implement
hardware
 The students will learn to model common digital hardware circuits using
VHDL
 The students will able to use VHDL CAD Tools (editors, debug designs
and perform logic simulation)
 The students will able to write test benches to verify the design and
perform timing analysis of a given design.
 The students will gain the knowledge on programmable logic devices
(PLD) and their design methodologies and know about different design
entry methods
DSD with VHDL (08.546)
Syllabus details and its objectives:
 Module 1
− Introduction to EDA , EDA tools, Simulation,
Synthesis, etc
− Introduction to HDL
− Basics of VHDL
Objectives
Students will learn an idea about EDA
Students should be able to know HDL and
fundamentals of VHDL
DSD with VHDL (08.546)
Syllabus details and its objectives (Contd..):
 Module 2
− VHDL features
− Modeling of basic circuits
− VHDL subprograms, packages etc...
Objectives
Students will learn all VHDL features
Students will able to model common digital
circuit (combinational and sequential) using
VHDL
DSD with VHDL (08.546)
Syllabus details and its objectives (Contd..):
 Module 3
− Design of digital circuits using VHDL data flow
description, state machines and VHDL test
benches
− Designing with FPGA and CPLD
Objectives
Students will be able to write test benches
and check the performance of the designs
Students will be able to know PLDs and
design a system using available FPGA and
CPLD
DSD with VHDL (08.546)
Lecture schedule:
 Module 1 Total
− Lectures : 10 Lectures : 32
− Tutorials : 5 Tutorials : 14
 Module 2
− Lectures : 11
− Tutorials : 5
 Module 3
− Lectures : 11
− Tutorials : 4
DSD with VHDL (08.546)
Text books:
1) Zainalabedin Navabi - VHDL: Analysis and
modeling of digital systems (All Modules)
2) Perry D. L - VHDL Programming by Example
(Module 2 and 3)
3) Roth C. H - Digital System Design Using
VHDL (Module 2 and 3)
4) Mano M. M. and Ciletti M. D - Digital Design
(Module 2)
5) J.Bhasker - VHDL Primer (All Modules)
6) Wakerly J. F - Digital Design – Principles and
Practices (All Modules)
DSD with VHDL (08.546)
References:
1. Brown S. and Vranesic Z - Fundamentals of
Digital Logic with VHDL Design.
2. Sudhakar Yalamanchili - Introductory VHDL:
From simulation to synthesis
3. Frank Vahid - VHDL For Digital Design
4. Pedroni V. A - Circuit design with VHDL
5. Peter J. Ashenden - The Designer's Guide to
VHDL
6.Thomas L. Floyd - Digital Fundamentals with
VHDL
DSD with VHDL (08.546)
 Session Plan
Each session has four sections
1. Attendance
2. Review (optional)
3. Subject delivery
Via presentation, chalk and talk etc..
Interaction depends on the contents
4.Quiz
2-4 questions related to subject
DSD with VHDL (08.546)
 Sample for a Session plan
DSD with VHDL (08.546)
 Sample of Session Input
E:\VKCET\DSD with VHDL\S5 2011\Session plans\module 1\Session Plan 3.pdf
DSD with VHDL (08.546)
 Assignments
Three asssignments
Sample question:
DSD with VHDL (08.546)
 Questions for quiz
DSD with VHDL (08.546)
 Tutorial sheets
− First two sheets include questions related to pre-request
subjects
− Other sheeets may have previous university exam
questions along with unsolved questions in the
references
Model tutorial sheets
1.
E:\VKCET\DSD with VHDL\S5 2011\Tutorial sheets
2. E:\VKCET\DSD with VHDL\S5 2011\Tutorial sheets\Tutorial sheet 2.pdf
3.
E:\VKCET\DSD with VHDL\S5 2011\Tutorial sheets
DSD with VHDL (08.546)
 Course works (weightage marks will be given)
1. Mid term work
− All students must develop a VHDL model
of basic digital circuit and simulate it.
2. Semester end work
− All students must develop (either in
batchwise or individual) a simple digital
system like simple microprocessor,
microcontroller, traffic light controller etc.
using the available FPGA and CPLD
DSD with VHDL (08.546)
Tests:
Class tests (Weekly)
Internal tests (Two)
Objective mapping
 Analysing the performance of students in the
quizzes and interactive sessions
 Analysing the works in the tutorial sheets
 Assignments (by checking the level of students
approach to the topics)
 Class Tests
 Internal Tests
Thank you......

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