Design Analysis of alternative memory technologies

Dr.Tripti Sharma, Abhinaba Goswami, Ram Prasad Pokhrel,

Department of Electronics and Communication Engineering
Chandigarh University, India
triptisharma.ece@cumail.in
21mec1020@cuchd.in 21mec1003@cuchd.in,

Abstract

In the fast passed world of today, computational devices are an integral part of our day-to-day lives.
this massive increase in the use of computational devices has given rise to the requirement of fast and
reliable memory devices. With the moors law fast reaching its limitations the conventional
technologies will not be able to keep up with the need for better memory devices. Engineers are now
looking toward alternative methods like PCRAM, ZRAM, and RRAM to solve the memory problem.
The use of Non Volatile Memory that does not require power to store and retain the data and provide
all the functionality of a conventional DRAM is one of the methods. The newer technologies should be
able to produce a universal memory that has low latency, high operation speed, lower cost of
operation and fabrication, should be able to retain the data for a longer amount of time, and have
high endurance. In this paper, we will analyze the various evolving technologies that are being used to
develop the memory devices of the future.

I. INTRODUCTION
In modern days all advanced microelectronic devices use DRAM, SRAM, flash memory as their primary
memory storage. This kind of memories store data as charge states for several decades these memory
technologies were effectively scaled down to obtain greater speed and enhanced density of memory devices
at reduced cost per bits[1].

As we continue to decrease the size and scaling down of the devices, the conventional design is fast
approaching its limit, which was started by Moore who stated that after a few decades we hall reach the limit
when he went on to quote  Stephen Hawking the absolute limit to microelectronics is the speed of light [1].
Newer kinds of memories are being improved, apart from superior scalability, a new form of memory must
also demonstrate low operating voltages, low power consumption, high operation speed, prolonged retention
time, high endurance, low cost of operation, simple structure, and non-volatility. [2]

Some alternative forms of memory storage are 1) resistive switching in insulators 2)changing of
magnetoresistance, the domain wall motion along with magnetic racetracks. Currently, we have few devices
based on these principles, such as

1) phase-change RAM (PCRAM)

2) (MRAM) magnetoresistive RAM

3) (FeRAM) ferroelectric RAM

We also have some devices which are being developed such as

1) carbon nanotube RAM (CNRAM)

2) Copper bridge RAM (CBRAM)

3)Spin torque tranfer RAM (STTRAM)

4) RRAM( Resistive RAM)

These types are devices are currently in a prototype phase, while the racetrack memory concept is only
available as a memory concept.[3]

II.DRAM TECHNOLOGY.
Dram stands for “Dynamic Random Access Memory” is a type of RAM that is located in every computer,
and is also used as primary memory for computer systems. DRAM comes in many variants like SDRAM,
DDR SDRAM, ECC RAM, and DDRx versions.

ZRAM (Zero Capacitor RAM)This type of memory has been recently introduced and uses a single transistor
without a capacitor Mitchell, unlike the typical one that employs one transistor and one capacitor Mitchell.
Z-RAM employs a normal SOI logic method - there are no extra processing steps for capacitor production. It
provides the simplicity of a single transistor design, and the scope for speed, low-power, and high-density
applications.[4]

The second generation of ZRAM will use such as Bipolar transistors which will enable us to further enlarge
the ZRAM application to such advanced non-planar devices as FinFETs, multi-gate FETs, and gate-all-
around FETs. In contrast to the first-gen ZRAM the current is flowing through the body of the construction
which increases the current value to the ratio of fin radius to the surface layer thickness, here the majority of
carriers are produced because of impact ionization. The stored charge gives good control over the bipolar
current, whereas in the previous generation the charge is stored in the region near the buried oxide.[2] Gen2
enhances both data retention time and cell margin. The increased margin allows substantially better data
read speeds and improved device scalability. This improvement from gen1 to gen2 greatly increased the
spectrum of applications that may utilize Z RAM's higher density to both high-performance and low-power
applications. [4]
Figure.1 Z-RAM cell

The adoption of vertical gate-all-around transistors increases the ZRAM roadmap to future generations. One
drawback of the ZRAM cell is the relatively high voltage level necessary to the spark impact ionization. A
new design for low power operation, longer retention time, and wider memory window were also proposed
[5].

III. RESISTIVE CHANGE BASED MEMORY

Resistive change memory comprises of simple structures mostly comprising two metals sandwiching an
insulator, application of an electric field can change the conductance level of the insulator, this property is
used in memory devices. Here ‘1’ means a state of high resistance and ‘0’ means a state with low resistance.
The resistive switching mechanism can be either bipolar or unipolar. The switching action is considered
bipolar, when the SET to LRS happens at one voltage polarity and the RESET to the HRS on the opposite
voltage polarity, it is unipolar when the LRS and HRS do not depend upon any polarity of the write voltage.

Many different types of insulators exhibit this type of behavior namely Metal oxide namely HfO2 and TiO2
[7], perovskite oxide, chalcogenide material, Carbon(as isotope sp2)[6][7], Silicon dioxide has been shown
to exhibit this behavior in the late 1960s, etc. PCRAM, RRAM, CBRAM work on this technique.[3]

A))PCRAM(Phase Change Random Access Memory) This type of ram is commonly based upon GST
(Germanium-antimony-tellurium )[8]material like Ge2Sb2Te5. These material systems may further be
tweaked for required device characteristics like incorporating N into GexSbyTez along with Ge- Sb2Te3 Tie
line thermally stable and temperature resilient material can be produced which can withstand temperature up
to 1600C[9].

The PCRAM achieves its data storage properties from the difference of resistance between the High
resistance amorphous and low resistance crystalline form of the chalcogenide material. The material is
heated to its crystallization temperature by a pulse of current which causes the set operation, when a larger
current is passed the material melts and cools rapidly turning to its amorphous state which resets is the reset
operation[2] The PCRAM’s data retention capability is hindered by the resistance drift due to relaxation of
its reset state which can cause the RAM to lose programming after few hours even at room temperature thus
sophisticated advanced methods are required [11]
 Figure 2(a) shows the internal structure of the PCRAM

Figure.2(b)PCRAM wit thermally confined amorphous structure pillar for reducing write current [2]

The PCRAM’s on/off resistance ratio is considerably larger (in the range of100–1,000×) than STT-MRAM
this allows multi-layer operation of up to 4 b/cell are conceivable[10], The main challenge for PCRAM
design is the high current required to melt the Phase change materials[3].PCRAM is also denser than STT-
RAM and has a cell area of 6-14F2 where F indicates Feature size.[2]PCRAM has a higher duty cycle of
nearly 106 ~ 109 which is comparable to RRAM.

Today PCRAM manufacturing is in a much-advanced stage as it is similar to current CMOS fabrication

techniques which allow improvement in density. Companies like Samsung, Hitachi have already produced
prototypes.[2]
 Figure.2(c) shows the PCRAm designed By IBM[23]

B)RRAM is a type of NON-VOLATILE RANDOM ACCESS MEMORY that functions by manipulating the
resistance across a solid-state dielectric, they are also called memristors[8]. RRAM is classified into two
categories: oxide-RAM (OxRAM) and conductive bridge RAM (CBRAM). OxRAM filament is composed
of vacancies of oxygen in the oxide layer, unlike the OxRAM CBRAM filament is composed of metal
atoms, created by fast-diffusive Ag or Cu ions traveling into the solid-electrolyte.

Fig 3 (e) OxRAM with Oxygen vacancies in the filament. (f) CBRAM with a
Conductive bridge[2]
Though they are somewhat similar in their underlying physics they still have some differences. The lifecycle
of OxRAM is up to 1012 cycles which is better than that of CBRAM, OxRAM also has a very minute on/off
resistance ratio as compared to the CBRAM which has a quite high ON/OFF resistance ratio and also has a
less lifecycle of less than 104.[12].

RRAM has two modes of operation namely unipolar and Bipolar[13] the mode unipolar refers to the
mechanism in which that the switching depends upon the amplitude of the voltage is applied and is
independent of the polarity of the voltage whereas Bipolar refers to the mechanism in the switching depends
upon the polarity of the voltage being applied the SET RESET operation of the device depends upon the
polarity of the applied voltage but is independent of the amplitude of the voltage applied.[13]

The unipolar switching can be explained with the thermal dissolution model which proves that the RESET is
controlled by Joules Heating which can provide the various parameters of the Filament in RRAM.[13][14]

The Bipolar switching mechanism can be explained with the help of the Ion-Recombination model[15], this
hypothesis states that the rupture of conductive filaments is triggered by the recombination of oxygen ions.
This model provides us the properties like reset speed, endurance, uniformity, and resets current.[15]

Figure 4 . this diagram shows the possible forces responsible for the O2- migration during reset. The Diffusion and drift
force act together for bipolar mode but act opposites each other in unipolar mode.[13]
 Figure 5. shows the evolution of O2- under 1.4v pulse case(a) shows that without interface barrier the unipolar
reset is successful under positive bias, Case(b) shows that under positive bias and with the interface the unipolar
reset is not successful. Case(c) shows that under positive bias and with interface bipolar Reset is possible.[13]

The core issue of RRAM cell design is the variability of the switching factors, due to the random nature of
ion migration the filament shape differs from device to device and also within one device from cycle to
cycle. The fluctuation of resistance can be in orders of magnitude which causes complexity in the design of
sensing circuits which necessitates the use of write verify methodologies to program the target state which
might increase latency for MLC operations.

The switching mechanism is fast and requires less current in RRAM due to the use of filamentary operation
in switching, but this mechanism causes data retention issues, the filament is also thin which causes the
instability to become considerable [16].

Technology companies such as Panasonic have already developed prototypes for their RRAM versions.
The RRAM with the highest performance was demonstrated by the Industrial Technology Research
Institute of Taiwan at IEDM 2008 which used HfO2[24] along with a tri buffer layer. This PCRAM had a
very small switching time below 10ns and a small current draw of 30uA. At the IDEM 2010, ITRI again
broke its previous record by achieving a switching time of 0.3ns and an endurance of up to 10 9 cycles.
[25].In the year 2012 at the Symposia on VLSI Interuniversity Microelectronics Centre(IMEC) presented
their improvement upon the PCRAM and showcased a device with A current draw of 500nA[23].

Panasonic also brought out their version of the PCRAM when they revealed their TaO x based ram, with
the O being variable which affects the resistance change and also changes the Schottky barrier. Their
system has displayed excellent endurance but the current products are rated to only 100K work cycles.
[24]They have produced the PCRAM with Fujitsu
 Hewlett-Packard(HP) had also announced that they have discovered a memristor back on April 30 th,

2008, and had also unveiled their plan on July 8 th of the Same year to go forward with the prototyping of
their own ReRAM(Resistive RAM). They have designed their memristor using the Titanium Oxide but
later migrated to TaOx[23][26]

Adesto Technologies also designed RRAM that uses the electrode metal as the filament in place of the
conventional oxide. They mostly plan to produce these type of memories for IoT application that requires
ultra low power memories.

In November 2017 Weebit NANO demonstrated that they were able to manufacture 40nm silicon oxide-
based ReRAM cells, which they again demonstrated in 2018 with a working array. They have partnered
with CEA-Leti, Europe’s largest nanotechnology research institute for development in ReRAm
technology

c)STTRAM or Spin Transfer Torque RAM is a new form of memory that is has been proposed as an
improvement over the existing convention DRAM. Its functioning is based on the magnetic capabilities of
specific materials whose magnetic orientation can be altered and measured using electrical impulses [19]
[20][21]

The main component of a STTRAM is a magnetic tunnel junction(MTJ) that stores the data. It comprises
two layers of ferromagnetic material with a tunnel barrier layer. The ferromagnetic layers are termed
reference layers and their magnetic direction is fixed whereas the free layer can have a parallel or anti-
parallel magnetic direction. Similar to the conventional DRAM the STTRAM also comprises a transistor
termed as the access transistor which joins the device and the bit line but it does not have a ground and
connects to the sense line[17].
 Figure 6 STTRAM structure[17]

The orientation of the layer determines the electrical resistance which in turn is used during a read operation
of the data contained in the cell. When the free layer and reference layer magnetic fields are anti-parallel it
represents the logic ‘1’ when they are parallel to each other it will represent a low or ‘0. In STTRAM the
resistance changes based on the stored data hence it also has a different arrangement of sensing amplifier.

Figure 7 shows the structure of the Magnetic Tunnel Junction

Figure 8 show the arrangement of the sense and write circuitry for STT-RAM bit lines[17]

Unlike DRAM where data is stored as charge in a capacitor and are detected using a sensing circuit by
detecting and measuring the voltage, in the case of the STTRAM the change of resistance of the Magnetic
Tunnel Junction is used to store data which requires the use of different typewriting and sensing
technique. A small current Ir is provided between the sense and bit line and the magnitude of voltage is
measured during the read operation, if the junction is parallel it will produce a voltage V p is created and in
the case of the junction being anti-parallel a voltage, Vap will be produced at bit line. The comparison of the
voltage at the bit line with the reference voltage (Vrefrence ) will be used to detect the data stored.

when a large amount of current is passed the orientation of the Magnetic Tunnel Junction changes, which,
depending upon the direction of current flow can be either parallel or anti-parallel concerning the fixed
layer. The write operation in a STTRAM is far more current demanding than the subsequent read
operation, this creates the requirement of a powerful amplifier for the write operation.

Figure 9 (a)shows the 1T-1MTJ STTRAM (cross-section)

Figure.9(b) The Graph of MOS temperature vs the condition of Magnetic Tunnel Junction

The STTRAM is coupled with a transistor which shows degradation due to temperature fluctuation beyond
reasonable ranges due to degradation in MOS drivability hence temperature has a big effect upon the
operation of the STTRAM[22]. During the write operation which requires a large magnitude of current, the
NMOS also heats up. The resistance of the junction in the anti-parallel state decreases when the temperature
increases from the normal or room temperature (300K) to 525 k. Magnetoresistance of the junction is greater
than 200% at room temperature which comes down to nearly 100% at 573.15K[23], however, under
648.15K the parallel state resistance remains constant and the resistance of the anti-parallel state linearly
decreases. Beyond 648.15K the resistance of both the states increases rapidly along with a permanent loss of
magnetoresistance[23]

A STTRAM can bring about 60% more energy reduction in the average memory subsystem over DRAM
main memory. but the main drawback of the other technologies like PCRAM is that the RAMs are very
slow, they are on average 2-4X times slow in reading and 10-100x slow in write operations. They also
consume much more energy as compared to DRAM and PCRAM.PCRAM also has a very high latency to
the scale of 1.25 - 2X.PCRAM also has an issue with wearing out due to continuing heating and cooling of
the filament. But the STTRAM has some scalability issues which shall prevent higher densities to be
fabricated [17] [18].

Properties PCRAM STTRAM Embedded DRAM SRAM

Scalable YES YES YES YES

Non-volatile properties YES YES NO NO

speed Slow in read Read is fast FAST VERY FAST

Slower in write Write is
slow
Leakage power LOW LOW MEDIUM HIGH

D.power Medium in read. High during MEDIUM LOW

High in write write
Low during
read
Density VERY HIGH HIGH HIGH LOW

Table 1 shows the comparison of the various evolving technologies concerning their properties.

IV. CONCLUSION
The various types of alternative technologies have been discussed along with their working principle,
construction, and the various parameters that affect their use. These alternative types of memories are either
in their advanced stages of fabrication and production or are being developed in their conceptual phases.
With companies like Panasonic, Samsung, etc dedicating their resources to developing these alternative
memory types. Companies have. although it will sometimes in the future when these upcoming technologies
will mature and be available for consumers.

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