RCS-985TS Instruction Manual Standard V1.02 (En YJBH2008.0086.0003)

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RCS-985TS

Transformer Protection
Instruction Manual

Nanjing Nari-Relays Electric Co., Ltd.


RCS-985TS Transformer Protection

Preface

Introduction

This guide and the relevant operating or service manual documentation for the equipment provide
full information on safe handling, commissioning and testing of this equipment.

Documentation for equipment ordered from NARI-RELAYS is dispatched separately from


manufactured goods and may not be received at the same time. Therefore this guide is provided
to ensure that printed information normally present on equipment is fully understood by the
recipient.

Before carrying out any work on the equipment the user should be familiar with the contents of this
manual, and read relevant chapter carefully.

This chapter describes the safety precautions recommended when using the equipment. Before
installing and using the equipment, this chapter must be thoroughly read and understood.

Health and Safety

The information in this chapter of the equipment documentation is intended to ensure that
equipment is properly installed and handled in order to maintain it in a safe condition.

When electrical equipment is in operation, dangerous voltages will be present in certain parts of
the equipment. Failure to observe warning notices, incorrect use, or improper use may endanger
personnel and equipment and cause personal injury or physical damage.

Before working in the terminal strip area, the equipment must be isolated.

Proper and safe operation of the equipment depends on appropriate shipping and handling,
proper storage, installation and commissioning, and on careful operation, maintenance and
servicing. For this reason only qualified personnel may work on or operate the equipment.

Qualified personnel are individuals who:

 Are familiar with the installation, commissioning, and operation of the equipment and of the
system to which it is being connected;

 Are able to safely perform switching operations in accordance with accepted safety
engineering practices and are authorized to energize and de-energize equipment and to
isolate, ground, and label it;

 Are trained in the care and use of safety apparatus in accordance with safety engineering
practices;

 Are trained in emergency procedures (first aid).

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RCS-985TS Transformer Protection

Instructions and Warnings

The following indicators and standard definitions are used:

DANGER means that dearth, severe personal injury, or considerable equipment damage will
occur if safety precautions are disregarded.

WARNING means that dearth, severe personal or considerable equipment damage could occur
if safety precautions are disregarded.

CAUTION means that light personal injury or equipment damage may occur if safety
precautions are disregarded. This particularly applies to damage to the device and to
resulting damage of the protected equipment.

WARNING!

The firmware may be upgraded to add new features or enhance/modify existing features, please
make sure that the version of this manual is compatible with the product in your hand.

WARNING!

During operation of electrical equipment, certain parts of these devices are under high voltage.
Severe personal injury or significant equipment damage could result from improper behavior.

Only qualified personnel should work on this equipment or in the vicinity of this equipment. These
personnel must be familiar with all warnings and service procedures described in this manual, as
well as safety regulations.

In particular, the general facility and safety regulations for work with high -voltage equipment must
be observed. Noncompliance may result in dearth, injury, or significant equipment damage.

DANGER!

Never allow the current transformer (CT) secondary circuit connected to this equipment to be
opened while the primary system is live. Opening the CT circuit will produce a dangerously high
voltage.

WARNING!

 Exposed terminals

Do not touch the exposed terminals of this equipment while the power is on, as the high voltage
generated is dangerous

 Residual voltage

Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It
takes a few seconds for the voltage to discharge.

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RCS-985TS Transformer Protection

CAUTION!

 Earth

The earthing terminal of the equipment must be securely earthed

 Operating environment

The equipment must only be used within the range of ambient environment detailed in the
specification and in an environment free of abnormal vibration.

 Ratings

Before applying AC voltage and current or the DC power supply to the equipment, c heck that they
conform to the equipment ratings.

 Printed circuit board

Do not attach and remove printed circuit boards when DC power to the equipment is on, as this
may cause the equipment to malfunction.

 External circuit

When connecting the output contacts of the equipment to an external circuit, carefully check the
supply voltage used in order to prevent the connected circuit from overheating.

 Connection cable

Carefully handle the connection cable without applying excessive force.

Copyright
Version : RCS-985TS NANJING NARI-RELAYS ELECTRIC CO., LTD.
Manual: V1. 02 69 Suyuan Avenue, Jiangning, Nanjing 211102, China
P/N: EN_YJBH2008.0086.0003 Tel: 86-25-87178185, Fax: 86-25-87178208
Copyright © NR 200 9. All rights reserved Website: www.nari-relays.com
Email: international@nari-relays.com
We reserve all rights to this document and to the information
contained herein. Improper use in particular reproduction and
dissemination to third parties is strictly forbidden except where
expressly authorized.

The information in this manual is carefully checked periodically,


and necessary corrections will be included in future editions. If
nevertheless any errors are detected, suggestions for correction or
improvement are greatly appreciated.

We reserve the rights to make technical improvements without


notice.

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RCS-985TS Transformer Protection

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RCS-985TS Transformer Protection

Table of Content

Preface.............................................................................................................................................. i

Introduction .............................................................................................................................. i

Health and Safety ..................................................................................................................... i

Instructions and Warnings..................................................................................................... ii

Table of Content ............................................................................................................................. v

Chapter 1 Introduction ................................................................................................................... 1

1.1 Application ......................................................................................................................... 1

1.2 Functions ........................................................................................................................... 3

1.3 Features ............................................................................................................................. 4

1.3.1 High performance hardware .................................................................................. 4

1.3.2 Advantage of Protection Theory ........................................................................... 5

1.3.3 Recording and Communication ............................................................................ 6

1.4 Ordering Options .............................................................................................................. 6

Chapter 2 Technical Data............................................................................................................... 7

2.1 General Specification ....................................................................................................... 7

2.1.1 Electrical Specifications ........................................................................................ 7

2.1.2 Power Supply .......................................................................................................... 7

2.1.3 Mechanical Specifications ..................................................................................... 8

2.1.4 Ambient Temperature and Humidity..................................................................... 9

2.1.5 Communication Interfaces .................................................................................... 9

2.1.6 Type Test ................................................................................................................ 10

2.2 Protective Functions .......................................................................................................11

2.2.1 Current differential Protection .............................................................................11

2.2.2 Restricted earth fault protection ......................................................................... 12

2.2.3 Three Phase Overcurrent Protection.................................................................. 12

2.2.4 Voltage Control Element ...................................................................................... 12

2.2.5 Zero Sequence Overcurrent Protection ............................................................. 12

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2.2.6 Gap Earth Fault Protection .................................................................................. 12

2.2.7 Overload Protection ............................................................................................. 13

2.3 Management Functions .................................................................................................. 13

2.3.1 Clock Performance ............................................................................................... 13

2.3.2 Disturbance Records............................................................................................ 13

2.3.3 Telesignal ............................................................................................................... 13

2.4 Certification ..................................................................................................................... 13

Chapter 3 Description of Operation Theory .............................................................................. 15

3.1 Overview .......................................................................................................................... 15

3.2 Fault Detectors ................................................................................................................ 15

3.2.1 General Fault Detector ......................................................................................... 15

3.3 Protective Fault Detector ............................................................................................... 17

3.4 Transformer Current Differential Protection ................................................................ 17

3.4.1 Current Compensation......................................................................................... 17

3.4.2 Sensitive Percent Differential Element............................................................... 19

3.4.3 Insensitive Percent Differential Protection Element......................................... 20

3.4.4 Unrestrained Instantaneous Differential Protection Element.......................... 20

3.4.5 Operation Characteristic of Current Differential Protection ............................ 21

3.4.6 Inrush Current Detection Element ...................................................................... 21

3.4.7 CT Saturation Detection Element ....................................................................... 22

3.4.8 Differential CT Circuit Failure Detection ............................................................ 22

3.4.9 Overexcitation Detection Element ...................................................................... 22

3.4.10 Logic Scheme ..................................................................................................... 23

3.5 Restricted Earth Fault Protection (REF) ....................................................................... 24

3.5.1 Magnitude Compensation.................................................................................... 24

3.5.2 Zero-sequence Percent Differential Protection................................................. 25

3.5.3 Unrestrained Instantaneous Zero-sequence Differential Protection .............. 26

3.5.4 Difference of CT Transient Characteristics Detector........................................ 27

3.5.5 Logic Scheme ....................................................................................................... 27

3.6 Voltage Controlled Overcurrent Protection of Side 1 ................................................. 29

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3.6.1 Application ............................................................................................................ 29

3.6.2 Definite Time Overcurrent Protection Element ................................................. 29

3.6.3 Voltage Control Element (VCE) ........................................................................... 29

3.6.4 Influence of VT Circuit Failure on VCE............................................................... 30

3.6.5 Influence of VT out of Service on VCE ............................................................... 30

3.6.6 Current Memory Function.................................................................................... 30

3.6.7 Logic Scheme ....................................................................................................... 31

3.7 Voltage Controlled Directional Zero-Sequence Overcurrent Protection of Side 1 .. 33

3.7.1 Application ............................................................................................................ 33

3.7.2 Definite Time Zero-sequence Overcurrent Protection ..................................... 33

3.7.3 Zero Sequence Direction Element (RDE) ........................................................... 34

3.7.4 Zero Sequence Current Used by zero-sequence Overcurrent Relay.............. 34

3.7.5 Influence of VT Circuit Failure on RDE .............................................................. 34

3.7.6 Influence of VT out of Service on RDE ............................................................... 34

3.7.7 Logic Scheme of Zero-sequence Overcurrent Protection ............................... 35

3.8 Gap Earth Fault Protection ............................................................................................ 35

3.9 Voltage Controlled Overcurrent Protection of side 2 (side 3) .................................... 37

3.9.1 Application ............................................................................................................ 37

3.9.2 Definite Time Overcurrent Protection Element ................................................. 37

3.9.3 Voltage Control Element ...................................................................................... 37

3.9.4 Influence of VT Circuit Failure on VCE............................................................... 37

3.9.5 Influence of VT Out of Service on VCE .............................................................. 37

3.9.6 Switch onto Fault Logic (SOTF) .......................................................................... 38

3.9.7 Logic Scheme ....................................................................................................... 38

3.10 Zero Sequence Overcurrent Protection of Side 2 (side 3) ....................................... 40

3.11 Breaking Capacity Blocking Function ........................................................................ 41

3.11.1 Application........................................................................................................... 41

3.11.2 Logic Scheme ...................................................................................................... 42

3.12 Other Abnormality Protection Functions ................................................................... 42

3.13 Current Transformer Supervision (CTS) .................................................................... 43

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3.13.1 CT Circuit Abnormality Alarm of Each Side .................................................... 43

3.13.2 Differential Current Abnormality Alarm............................................................ 43

3.13.3 Instant CT Circuit Failure ................................................................................... 43

3.14 VT Circuit Failure Detection......................................................................................... 44

Chapter 4 Automatic Supervision .............................................................................................. 47

4.1 General Description ........................................................................................................ 47

4.2 Relay Self-supervision ................................................................................................... 47

4.2.1 Relay Hardware Supervision............................................................................... 47

4.2.2 DC Supply Supervision ........................................................................................ 47

4.2.3 Output Tripping Circuit Supervision .................................................................. 47

4.2.4 Setting Supervision .............................................................................................. 48

4.2.5 Voltage and Current drift Monitoring and Auto-adjustment............................. 48

4.2.6 Fault Detector Element Supervision................................................................... 48

4.2.7 Communication Supervision ............................................................................... 48

4.2.8 Binary input of SOTF supervision ...................................................................... 48

4.2.9 Current Transformer Supervision (CTS) ............................................................ 48

4.2.10 Voltage Transformer Supervision (VTS)........................................................... 49

4.2.11 List of Alarm Messages ...................................................................................... 49

Chapter 5 Metering and Recording ............................................................................................ 53

5.1 General Description ........................................................................................................ 53

5.2 Metering ........................................................................................................................... 53

5.2.1 Measured Values in MON Module ....................................................................... 53

5.2.2 Measured Values in CPU Module ........................................................................ 54

5.2.3 Phase Angles ........................................................................................................ 57

5.3 Binary Input ..................................................................................................................... 59

5.4 Event & Fault Records.................................................................................................... 60

5.4.1 Introduction ........................................................................................................... 60

5.4.2 Event Recording ................................................................................................... 60

5.4.3 Disturbance Record.............................................................................................. 61

5.5 Time Synchronization..................................................................................................... 61

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Chapter 6 Hardware Description ................................................................................................ 63

6.1 Hardware Overview ......................................................................................................... 63

6.2 Hardware Configuration ................................................................................................. 65

6.2.1 Basic Enclosure.................................................................................................... 65

6.2.2 CPU Module........................................................................................................... 66

6.2.3 MON Module .......................................................................................................... 67

6.2.4 HMI Module............................................................................................................ 67

6.2.5 AI Modules ............................................................................................................. 68

6.2.6 No.3 PWR Module ................................................................................................. 72

6.2.7 BO Modules ........................................................................................................... 75

6.3 Tripping Matrix and Sampling channel......................................................................... 79

6.3.1 Tripping Matrix Definition .................................................................................... 79

6.3.2 Alternative Selection between Two Kinds of Channel ...................................... 80

Chapter 7 Settings ........................................................................................................................ 81

7.1 Equipment Setup Settings ............................................................................................. 81

7.1.1 Setting List ............................................................................................................ 81

7.1.2 Explanation of the Parameters and Notice for Setting ..................................... 82

7.1.3 Setting Path ........................................................................................................... 83

7.2 System Settings .............................................................................................................. 84

7.2.1 Setting List ............................................................................................................ 84

7.2.2 Explanation of the Parameters and Notice for Setting ..................................... 85

7.2.3 Setting Path ........................................................................................................... 87

7.3 Protection Element Configuration ................................................................................ 87

7.3.1 Setting List ............................................................................................................ 87

7.3.2 Explanation of the Parameters and Notice for Setting ..................................... 88

7.3.3 Setting Path ........................................................................................................... 89

7.4 Protection Settings ......................................................................................................... 89

7.4.1 Used to Protect Main Transformer ...................................................................... 89

7.4.2 Used to protect start-up/standby transformer..................................................113

7.4.3 Used to protect step-down transformer........................................................... 144

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Chapter 8 HMI Operation Introduction ..................................................................................... 173

8.1 Human Machine Interface Overview ........................................................................... 173

8.1.1 Design .................................................................................................................. 173

8.1.2 Functionality........................................................................................................ 174

8.1.3 Keypad and keys................................................................................................. 174

8.1.4 LED indications................................................................................................... 175

8.2 Understand the HMI menu tree .................................................................................... 176

8.2.1 OVERVIEW........................................................................................................... 176

8.2.2 SETTINGS ............................................................................................................ 177

8.2.3 VALUES................................................................................................................ 178

8.2.4 PRINT ................................................................................................................... 179

8.2.5 CLOCK ................................................................................................................. 179

8.2.6 REPORT ............................................................................................................... 179

8.2.7 CLR REPORT ...................................................................................................... 180

8.2.8 TRIG OSCILLOG ................................................................................................. 180

8.2.9 VERSION .............................................................................................................. 180

8.2.10 EXIT .................................................................................................................... 180

8.3 Understand the LCD Display ....................................................................................... 180

8.3.1 Default Display under Normal Operation Condition ....................................... 180

8.3.2 Display When Tripping ....................................................................................... 181

8.3.3 Display under Abnormal Condition .................................................................. 183

8.3.4 Display When User Operating equipment ....................................................... 184

8.4 View the Settings .......................................................................................................... 186

8.5 View status of measured value .................................................................................... 188

8.5.1 Display Metering Data ........................................................................................ 188

8.5.2 Display the Status of Binary Inputs .................................................................. 190

8.6 View Software Version.................................................................................................. 191

8.7 View Records................................................................................................................. 193

8.7.1 General Description............................................................................................ 193

8.7.2 View Reports through LCD ................................................................................ 193

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8.7.3 View Reports and Waveform by Printing ......................................................... 194

8.7.4 View Present Recording Waveform .................................................................. 195

8.8 Operation through Keypad .......................................................................................... 197

8.8.1 Password Protection .......................................................................................... 197

8.8.2 Change the Settings ........................................................................................... 197

8.8.3 Switch Active Setting Group ............................................................................. 198

8.8.4 Print Records ...................................................................................................... 200

8.8.5 Delete Records .................................................................................................... 200

8.8.6 Clock Set.............................................................................................................. 201

8.9 Understand the Alarms................................................................................................. 202

Chapter 9 Communications ...................................................................................................... 203

9.1 General ........................................................................................................................... 203

9.2 Rear Communication Port Information ...................................................................... 203

9.2.1 RS-485 Interface.................................................................................................. 203

9.2.2 Ethernet Interface ............................................................................................... 205

9.2.3 IEC60870-5-103 Communication ....................................................................... 206

9.2.4 MODBUS Communication ................................................................................. 206

9.3 IEC60870-5-103 Interface over Serial Port.................................................................. 207

9.3.1 Physical Connection and Link Layer................................................................ 207

9.3.2 Initialization ......................................................................................................... 207

9.3.3 Time Synchronization ........................................................................................ 207

9.3.4 Spontaneous Events .......................................................................................... 208

9.3.5 General Interrogation ......................................................................................... 209

9.3.6 Disturbance Records.......................................................................................... 210

9.3.7 Generic function ................................................................................................. 210

9.4 IEC60870-5-103 Interface over Ethernet ......................................................................211

9.5 Modebus Interface over Serial Port .............................................................................211

9.5.1 Overview ...............................................................................................................211

9.5.2 Binary State Communication............................................................................. 212

9.5.3 Analog Data Communication............................................................................. 214

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9.5.4 Settings Communication ................................................................................... 217

9.5.5 Diagnostics Information .................................................................................... 223

9.5.6 Abnormal Information ........................................................................................ 223

9.5.7 Equipment Information ...................................................................................... 223

Chapter 10 Installation ............................................................................................................... 225

10.1 General ......................................................................................................................... 225

10.2 Safety Instructions ...................................................................................................... 225

10.3 Checking the Shipment .............................................................................................. 226

10.4 Material and Tools Required ...................................................................................... 226

10.5 Device Location and Ambient Conditions................................................................ 226

10.6 Mechanical Installation............................................................................................... 227

10.7 Electrical Installation and Wiring .............................................................................. 228

10.7.1 Grounding Guidelines ...................................................................................... 228

10.7.2 Cubicle Grounding ........................................................................................... 229

10.7.3 Ground Connection on the Device ................................................................. 229

10.7.4 Grounding Strips and their Installation.......................................................... 230

10.7.5 Guidelines for Wiring ....................................................................................... 230

10.7.6 Wiring for Electrical Cables............................................................................. 231

Chapter 11 Commissioning ....................................................................................................... 233

11.1 General ......................................................................................................................... 233

11.2 Safety Instructions ...................................................................................................... 233

11.3 Commission Tools ...................................................................................................... 234

11.4 Setting Familiarization ................................................................................................ 234

11.5 Product Checks ........................................................................................................... 235

11.5.1 With the Relay De-energized ........................................................................... 235

11.5.2 With the Relay Energized ................................................................................. 238

11.5.3 Protective Function Testing............................................................................. 240

11.5.4 Print Fault Report.............................................................................................. 247

11.5.5 On-load Checks................................................................................................. 247

11.5.6 Final Checks ...................................................................................................... 248

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Chapter 12 Maintenance ............................................................................................................ 249

12.1 Maintenance Schedule ............................................................................................... 249

12.2 Regular Testing ........................................................................................................... 249

12.3 Failure Tracing and Repair......................................................................................... 249

12.4 Replace Failed Modules ............................................................................................. 249

Chapter 13 Decommissioning and Disposal ........................................................................... 251

13.1 Decommissioning ....................................................................................................... 251

13.1.1 Switching off ..................................................................................................... 251

13.1.2 Disconnecting cables....................................................................................... 251

13.1.3 Dismantling ....................................................................................................... 251

13.2 Disposal ....................................................................................................................... 251

Chapter 14 Manual Version History.......................................................................................... 253

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Chapter 1 Introduction

Chapter 1 Introduction

1.1 Application

RCS-985TS is a microprocessor-based relay integrated main and backup protection, which is


recommended to be applied for the protection of two-winding or three-winding main transformer,
step-down transformer or startup/standby transformer of 220kV and lower voltage level in power
plant. The protection equipment can provide the maximum three CT inputs for differential
protection. Besides protective functions, fault diagnostic, fault & disturbance recording, and uplink
communication functions are also supported in this relay.

Figure 1.1-1 to Figure 1.1-4 show typical applications of RCS-985TS. The relay is suited to be wall
surface mounted or flush mounted into a control panel.

 Figure 1.1-1 is typically applied for main transformer of power plant.

 Figure 1.1-2, Figure 1.1-3 and Figure 1.1-4 are typically applied for step-down transformer of
start-up/standby transformer of power plant.

l n ab cn

RCS-985TS
*
Main transformer

* *
l n ab c

Step-down transformer

Figure 1.1-1 Typical application 1 of RCS-985TS

NANJING NARI-RELAYS ELECTRIC CO., LTD 1


Chapter 1 Introduction

l n ab cn

* RCS-985TS

*
*
ab c

l n a b c

Figure 1.1-2 Typical application 2 of RCS-985TS

Figure 1.1-3 Typical application 3 of RCS-985TS

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Chapter 1 Introduction

a bc

a bc

Figure 1.1-4 Typical application 4 of RCS-985TS

1.2 Functions

Table 1.2-1 Protection functions of RCS-985TS

Protection function overview Function Number


Variable slope percent differential protection 87T
Unrestrained differential protection 50/87UT
Restricted earth fault protection of side 1 64REF(87GT)
Restricted earth fault protection of side 2 64REF(87GT)
Restricted earth fault protection of side 3 64REF(87GT)
Voltage controlled overcurrent protection of side 1 50P/51P
Directional zero-sequence overcurrent protection of side 1 50G(N)/51G(N)/67G(N)
Voltage controlled overcurrent protection of side 2 50P/51P
Zero-sequence overcurrent protection of side 2 50G/51G
Voltage controlled overcurrent protection of side 3 50P/51P
Zero-sequence overcurrent protection of side 3 50G/51G
Gap zero-sequence overvoltage protection 59G
Gap zero-sequence overcurrent protection 51G
Zero-sequence voltage alarm function 59G
Overload alarm function 49
Overload initiating cooling function 49
On-load tap change (OLTC) blocking function during overload 49
CB breaking capacity blocking function
Voltage control element VCE
Current control element CCE
VT circuit failure supervision

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Chapter 1 Introduction

Protection function overview Function Number


CT circuit failure supervision
CT saturation detection
Inrush current detection

Table 1.2-2 Miscellaneous functions of RCS-985TS

Miscellaneous functions overview


Relay hardware supervision and secondary circuit
Automatic self-supervision
supervision
Metering 24 samples per cycle
Fault&Disturbance recording 64 latest trip reports, 8 latest fault waveforms
User operating records 64 latest user operating records
64 self-check alarm records
Alarm records
64 operating abnormality alarm records
256 latest records of following elements state changing :
Operating abnormality alarm elements;
SOE function Self-check alarm elements
Protection elements
Binary input elements
Present recording One normal operating waveform triggered manually
Loacal HMI LCD and keypad
Remote HMI substation automation system software
2 RS-485 ports
Ports type
Rear communication Two or three Ethernet ports
ports to host IEC60870-5-103
Protocol type
MODBUS
Rear communication port to printer One RS-485 or RS-232 port
Pulse per second/minute (PPS/PMS) via binary input
Clock synchronisation Clock message via communication ports
IRIG-B via RS-485 differential level
Analog inputs
Input and output Binary inputs
Binary outputs
Multiple setting groups
Current and voltage drift auto-adjustment.

1.3 Features

1.3.1 High performance hardware

1.3.1.1 Parallel Calculation of Double CPU System

On the premise of 24 samples per cycle, all data measurement, calculation and logic

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Chapter 1 Introduction

discrimination could be finished within one sampling period. The event recording and protection
logic calculation also can be finished simultaneously.

1.3.1.2 Duplicate CPUs and Independent Fault Detectors

Duplicate CPUs hardware means the device is equipped with two CPU modules. One is called
CPU module and the other is called MON module. The two modules have independent low pass
filters, analog-digital converters, calculation and logic outputting respectively.

There are independent general fault detectors in MON module, which will connect power supply to
output relays when operate, besides protective fault detectors in the CPU module used for various
protective functions. The relay could drive a tripping output contact only when the fault detectors in
the CPU module and the fault detectors in the MON module operate simultaneously. This kind of
independent supervision of tripping outputs using fault detectors can avoid any maloperation
possibly caused by any hardware component fails.

1.3.1.3 Integration of Main and Backup Protection

Main and backup protection are integrated in one set of protection equipment. Protection
information such as sampled data and binary inputs is shared by all elements. The equipment can
record all relevant waveforms of any fault.

1.3.1.4 Flexible Configuration of Output

Elaborately designed tripping logic makes it possible of operation circuit to suit for various circuit
breakers.

1.3.2 Advantage of Protection Theory

1.3.2.1 Variable Slope Percent Differential Protection

The percent differential protection adopts variable slope restraint characteristics and actual
unbalanced differential current effect can be simulated. In order to prevent unwanted operation of
differential protection due to CT saturation, m easures to discriminate CT saturation are provided
for phase current at every side.

1.3.2.2 Current Correction for Differential Protection

Amplitude correction and phase shift compensation of current from CT of each side have been
done for differential protection in program automatically by configuring corresponding settings.

1.3.2.3 Inrush Current Distinguishing

In the equipment, harmonics restraint method is provided to distinguish inrush current.

1.3.2.4 CT Saturation Detection

Based on the operation sequence of DPFC restraint current element and DPFC differential current
element of differential protection, external with CT saturation or internal fault can be distinguished
correctly. In case of internal fault, the relay will operate immediately. While in case of external fault
with CT saturation, the criterion of current waveform is adopted then. The relay will not operate in
case of persisting external fault with CT saturation as soon as no less than 5ms and operate

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Chapter 1 Introduction

quickly when evolving external to internal fault.

1.3.2.5 CT Circuit Failure Detection

Reliable CT circuit failure detection, including CT circuit abnormality, differential current


abnormality, and instant CT circuit failure distinguishing, is provided to prevent the protection
equipment from unwanted operating.

1.3.2.6 VT Circuit Failure Detection

There are logic settings provided to configure operating characteristic of voltage related protection
when VT circuit failure is distinguished.

1.3.3 Recording and Communication

1.3.3.1 Fault Recording Function

After the fault detector pickup, the device can record all analog components, differential current
and time sequence protection elements operation. Latest 8 pieces of fault waveform can be
recorded with up to 15s each one. The format of event or fault report is compatible with
international COMTRADE file.

SOE capacity: 64 pieces of fault report, 256 pieces of binary input changes report,64 pieces of
alarm report of equipment self check or operation and 64 pieces of user operating report.

1.3.3.2 Friendly HMI Interface

The HMI interface with a LCD and a 9-button keypad on the front panel is very friendly to the user.

1.3.3.3 Communication Interfaces

 Two rear RS-485 ports and two (or three) Ethernet ports with SAS or RTU. The Ethernet
interfaces are optional: electrical or optical.

 One rear RS-485 with clock synchronization,

 One rear RS-232 or RS-485 with printer.

1.3.3.4 Various Clock Synchronizations

Various GPS clock synchronizations: second/minute pulse via binary input, or RS-485 message
via communication ports and IRIG-B synchronization.

1.4 Ordering Options

 Two options are available for rated secondary current of CT inputs: 1A or 5A.

 Four options are available for rated auxiliary voltage: 250V, 220V, 125V, 110V.

 The Ethernet interfaces are optional: electrical or optical and three Ethernet or two Ethernet
are optional too.

6 NANJING NARI-RELAYS ELECTRIC CO., LTD


Chapter 2 Technical Data

Chapter 2 Technical Data

2.1 General Specification

2.1.1 Electrical Specifications

2.1.2 Power Supply

Rated Voltage (Un) 24Vdc, 110Vdc, 125Vdc, 220Vdc, 250Vdc


Variation (80% ~ 120%)Un
Ripple in the DC
Max 15% of the DC value. Per IEC 60255-11
auxiliary voltage
Per IEC 61000-4-11, IEC 60255-11:1979
Voltage dips and voltage
20ms for interruption without de-energizing, dips 60% of Un without
short interruptions
reset up to 100ms
Quiescent
<15W
condition
Burden
Operating
<25W
condition
Backup battery type ML2032, 3V, 65mAh

2.1.2.1 Analog Current Input Ratings

Rated frequency 50Hz, 60Hz, ±10%


Phase rotation ABC
Rated Current (In) 1A 5A
Linear to (non-offset AC
40×In 40×In
current)
continuously 3×In 3×In
Thermal for 10s 30×In 30×In
withstand for 1s 100×In 100×In
capability for half
250×In 250×In
a cycle
Burden < 0.2 VA/phase @ In < 0.5 VA/phase @ In

2.1.2.2 Analog Voltage Input Ratings

Standard Per IEC 60255-6


Rated Voltage (Un) 100V/√3, 110V/√3 100V, 110V 200V
linear to 100V 173 V 230V
Thermal continuously 120 120 V 200V
withstand 10s 200 200 V 350V
capability 1s 250 250 V 400V

NANJING NARI-RELAYS ELECTRIC CO., LTD 7


Chapter 2 Technical Data

Burden <0.2VA/phase @ Un <0.5VA/phase @ Un <2.5VA/phase @ Un

2.1.2.3 Binary Input

Rated Voltage 110Vdc 125Vdc 220Vdc 250Vdc


Pickup voltage 77.0Vdc 87.5Vdc 154Vdc 175.0Vdc
Dropout voltage 60.5Vdc 68.8Vdc 121Vdc 137.5Vdc
Maximum permitted
150Vdc 150Vdc 300Vdc 300Vdc
voltage
Withstand 2000Vac
Resolving time for
<1ms
logic input

2.1.2.4 Binary Output

Item Used for tripping contact Used for signal contact


Output model Potential-free contact
Max system voltage 250Vac/dc
Test voltage across
1000Vac rms fro 1min
open contact
Breaking capacity 0.4A resistance 0.2A resistance
at 250Vdc 0.2A inductive(L/R=40ms) 0.05A inductive (L/R=40ms)
Continuous carry 8A 5A
Short duration current 50A for 200ms 50A for 200ms
Pickup time (Typical/Max) 5ms/10ms 10ms/15ms
Dropout time
8ms/10ms 4ms/10ms (only DSP)
(Typical/Max)
Bounce time 1ms 1ms
loaded
100,000 operations minimum 100,000 operations minimum
contact
Durability
unloaded
10,000,000 operations minimum 10,000,000 operations minimum
contact

2.1.3 Mechanical Specifications

Enclosure dimensions
213.1×266.0×203.0 (unit: mm)
(W×H×D)
Trepanning dimensions
225mm×268.0, M5 screw (1/2 6U)
(W×H)
Mounting Way Flush mounted
Weight per device Approx. 5kg
Small control module: 3 LED indicators, a 9-key keypad and a
Local control panel
160×80-dot LCD
Display language English
Housing material Aluminum
Housing color Silver grey

8 NANJING NARI-RELAYS ELECTRIC CO., LTD


Chapter 2 Technical Data

Location of terminals Rear panel of the device


Front side: IP40, up to IP51
Protection class
Rear side, connection terminals: IP20
(per IEC60529:1989)
Other Sides: IP30

2.1.4 Ambient Temperature and Humidity

Operating temperature range -25°C ~ +55°C


Transport and storage temperature range -40°C ~ +70°C
Permissible humidity 5% ~ 95%, condensation not permissible

2.1.5 Communication Interfaces

Communication
Parameters
medium
Interfaces for communicating with RTU/SCADA
Port number 2
Baud rate 4800 ~ 38400bps
Transmission distance < 1000m@4800bps
RS-485 (EIA)
Maximal capacity 32
Protocol IEC60870-5-103:1997
Safety level Isolation to ELV level
Port number 2~3
Connector type RJ-45
Transmission Rate 100Mbits/s
Electrical Transmission standard 100Base-TX
Transmission distance < 100m
Protocol IEC60870-5-103:1997 or MODBUS
Safety level Isolation to ELV level
Port number 2~3
Ethernet
Connector type SC
Transmission Rate 100Mbits/s
Transmission standard 100Base-FX
Optical Optical Fiber Type Multi-mode
Wavelength 1300nm
Transmission distance < 1500m
Protocol IEC60870-5-103:1997 or MODBUS
Safety level Isolation to ELV level
Interfaces for communicating with a printer
Port number 1
Baud rate 4800 ~ 38400bps
RS-232 (EIA)
Printer type EPSON® LQ-300K
Safety level Isolation to ELV level
Interfaces for clock synchronization
RS-485 (EIA) Port number 1

NANJING NARI-RELAYS ELECTRIC CO., LTD 9


Chapter 2 Technical Data

Transmission distance < 500m


Maximal capacity 32
Timing standard PPS, IRIG-B
Safety level Isolation to ELV level

2.1.6 Type Test

2.1.6.1 Environmental Tests

Dry heat test IEC60068-2-2:1974, 16 h at +55°C


Dry cold test IEC60068-2-1:1990, 16 h at -25°C
IEC60068-2-30:1980, two (12+12 hours) cycles, 95%RH,
Damp heat test, cyclic
low temperature +25°C, high temperature +55°C

2.1.6.2 Mechanical Tests

Vibration IEC60255-21-1:1988, Class I


Shock and bump IEC60255-21-2:1988, Class I

2.1.6.3 Electrical Tests

Dielectric tests IEC60255-5:2000, test voltage: 2kV, 50Hz, 1min


IEC60255-5:2000, test voltage: 5kV, unipolar
Impulse voltage tests
impulses, waveform 1.2/50μs, source energy 0.5J
Insulation
IEC60255-5:2000, insulation resistance >100MΩ, 500Vdc
measurement

2.1.6.4 Electromagnetic Compatibility

1MHz burst disturbance tests IEC60255-22-1:1988


(idt IEC61000-4-12:1995), Class III
- Common mode 2.5kV
- Differential mode 1.0kV
Electrostatic discharge tests IEC60255-22-2 :1996
(idt IEC 61000-4-2) Class IV
-For contact discharge 8.0kV
-For air discharge 15.0kV
Radio frequency interference tests IEC60255-22-3:2000
(idt IEC 61000-4-3:1995 ) class III
Frequency sweep
-Radiated amplitude-modulated 10V/m(rms), f=80… 1000MHz
Spot frequency
-Radiated amplitude-modulated 10Vm(rms), f=80MHz/160MHz
/450MHz/900MHz
- Radiated pulse-modulated 10Vm(rms), f=900MHz

10 NANJING NARI-RELAYS ELECTRIC CO., LTD


Chapter 2 Technical Data

Fast transient disturbance tests IEC60255-22-4:2002


(idt IEC 61000-4-4)
- Power supply, I/O & Earth terminals Class IV, 4kV, 2.5kHz, 5/50ns
- Communication terminals Class IV, 2kV, 5.0kHz, 5/50ns
IEC60255-22-5:2002
Surge immunity tests (idt IEC 61000-4-5:1995) , Class III
1.2/50us,
- Power supply, AC inputs, I/O terminals 2kV, line to earth;
1kV, line to line
Conducted RF electromagnetic disturbance IEC60255-22-6, Class III
- Power supply, AC, I/O, Comm. terminal 10V(rms), 150kHz~80MHz
IEC61000-4-8:1993, Class V
Power frequency magnetic field immunity 100A/m for 1min
1000A/m for 3s
IEC61000-4-9:1993, Class V
Pulse magnetic field immunity 6.4/16 us
1000A/m for 3s
IEC61000-4-10:1993, Class V
Damped oscillatory magnetic field immunity
100kHz & 1MHz – 100A/m

2.2 Protective Functions

2.2.1 Current differential Protection

Pickup setting of percent differential


0.1Ie ~ 1.5Ie
protection [I_pkp_PcntDiff]
Setting of unrestrained instantaneously
4.0Ie ~ 14.0Ie
differential protection [I_InstDiff]
First slope of percent differential protection
0.05 ~ 0.15
[Slope1_PcntDiff]
Second slope of percent differential protection
0.50 ~ 0.80
[Slope2_PcntDiff]
Setting of restraint coefficient of second
0.1 ~ 0.35
harmonic [k_2ndH_PcntDiff]
Tolerance of current setting < 2.5% xSetting or 0.02In, whichever is greater
Operating time of percent differential < 30ms (Id>1x[I_pkp_PcntDiff])
protection without harmonic blocking
Operating time of unrestrained instantaneous
< 25ms (Id>1.5x[I_InstDiff])
differential protection

NANJING NARI-RELAYS ELECTRIC CO., LTD 11


Chapter 2 Technical Data

2.2.2 Restricted earth fault protection

Pickup setting of percent zero-sequence


differential protection 0.1In~10In
[I_Pkp_PcntREF_S1(S2,S3)]
Setting of unrestrained instantaneous
zero-sequence differential current protection 2In~20In
[I_InstREF_S1(S2,S3)]
Slope of zero-sequence differential current
0.3~0.7
protection [Slop_PcntREF_S1(S2,S3)]
Tolerance of current setting < 2.5% xSetting or 0.02In, whichever is greater
Operating time of percent zero-sequence < 30ms (Id>1x[I_pkp_PcntDiff])
differential protection with harmonic blocking disabled
Operating time of unrestrained instantaneous
< 25ms (Id>1.5x[I_InstDiff])
zero-sequence differential protection

2.2.3 Three Phase Overcurrent Protection

Current setting 0.1In ~ 20In


Time setting 0.1 s ~10 s
≤2.5%×Setting or 0.02×In, whichever is
Tolerance of current setting
greater
Tolerance of time setting ≤ 1%×Setting + 40 ms

2.2.4 Voltage Control Element

Negative overvoltage element setting 1 V ~20 V


Undervoltage element setting 10 V ~100 V
Operating time ≤ 35ms??
Tolerance of setting ≤2.5% or 0.1 V, whichever is greater

2.2.5 Zero Sequence Overcurrent Protection

Zero-sequence current setting 0.1In ~ 20In


Time setting 0.1 s ~10 s
≤2.5%×Setting or 0.02×In, whichever is
Tolerance of current setting
greater
Tolerance of time setting ≤ 1%×Setting + 40 ms

2.2.6 Gap Earth Fault Protection

Gap zero-sequence current setting 0.1In ~ 20In


Gap zero-sequence voltage setting 10 V ~220 V
Time setting 0.1 s ~10 s
≤2.5%×Setting or 0.02×In, whichever is
Tolerance of current setting
greater
Tolerance of voltage setting ≤2.5%×Setting or 0.1, whichever is greater

12 NANJING NARI-RELAYS ELECTRIC CO., LTD


Chapter 2 Technical Data

Tolerance of time setting ≤ 1%×Setting + 40 ms

2.2.7 Overload Protection

Current setting 0.1A ~ 50AIn


Time setting 0s ~ 10s
≤ 2.5%×Setting or 0.02×In, whichever is
Tolerance of current setting
greater
Tolerance of time setting ≤ 1%×Setting + 40 ms

2.3 Management Functions

2.3.1 Clock Performance

Year 2000 Compliant


Real time clock accuracy ≤ 3 seconds/day
Accuracy of GPS synchronization ≤ 1ms
External clock synchronization IRIG-B (200-98), SNTP protocol etc.

2.3.2 Disturbance Records

Magnitude and relative phases ≤ 2.5% of applied quantities


Duration Up to 15000ms
Trigger position 3 cycles before pickup of fault detector

2.3.3 Telesignal

Resolution of telesignals ≤ 2 ms
Input of telesignals Potential-free contact
Resolution of SOE ≤ 1ms

2.4 Certification

 ISO9001: 2000

 ISO14001:2004

 OHSAS18001: 1999

 ISO10012:2003

 CMMI L3

 EMC: 89/336/EEC, EN50263: 2000

 Products safety(PS): 73/23/EEC, EN61010-1: 2001, EN60950: 2002

NANJING NARI-RELAYS ELECTRIC CO., LTD 13


Chapter 2 Technical Data

14 NANJING NARI-RELAYS ELECTRIC CO., LTD


Chapter 3 Description of Operation Theory

Chapter 3 Description of Operation Theory

3.1 Overview

The equipment protection is composed of current differential protection as main protection, and
following protections as backup protection, such as voltage controlled overcurrent protection of
each side, zero sequence overcurrent protection of each side, gap earth fault protection and
overload protection. VT/CT failure supervision function is also included.

Protection theory is introduced from the following three parts in the chapter, general fault detector,
protective fault detector and protection element. The equipment has independent general fault
detectors in MON module, which pick up to connect positive pole of power supply of output relays.
Every protection has its own fault detector in CPU module picking up to make the program jump to
fault calculation from normal calculation. The equipment output relays will operate to trip only if the
general fault detector and protective fault detector pick up and the corresponding protective
element operates simultaneously.

3.2 Fault Detectors

3.2.1 General Fault Detector

Any one of the following fault detectors operation will make power supply of output relays be
switched on for 500 ms to make it ready to send a tripping signal.

3.2.1.1 Fault Detector of Differential Current

This fault detector will pick up to when the differential current reaches pickup setting of transformer
differential protection.

Criteria of this fault detector:

I d > I cdqd (Equation 3.2-1)

Where:

I d is differential current.

I cdqd is the setting of percent differential protection, i.e. [I_Pck_PcntDiff].

Please refer to the settings in Chapter 7 for details.

3.2.1.2 Fault Detector of Zero-sequence Differential Current

Restricted earth fault protection is also called zero-sequence differential protection. There are
three restricted earth fault protection elements of side 1, side 2 and side 3 respectively are

NANJING NARI-RELAYS ELECTRIC CO., LTD 15


Chapter 3 Description of Operation Theory

included in the relay.

The fault detector of each side will pick up if the zero-sequence differential current is greater than
the setting [I_Pkp_PcntREF_S1(S2,S3)].

Criteria of zero sequence differential current fault detector:

I 0 d > I 0 cdqd (Equation 3.2-2)

Where:

I 0 d is the zero-sequence differential current of one side.

I 0 cdqd is the pickup setting of percent zero-sequence differential protection of the corresponding

side, i.e. the setting [I_Pkp_PcntREF_S1(S2 or S3)].

NOTE: In the manual, side 1, side 2 and side 3 mean HV side, MV side and LV side

respectively.

3.2.1.3 Fault Detector of Voltage Controlled Overcurrent Protection of Each Side

The fault detector of each side will pick up when the maximum three-phase current reaches its
setting of overcurrent protection of corresponding side. Here each side means side1, side2 and
side 3.

3.2.1.4 Fault Detector of Voltage Controlled Overcurrent Protection of Each Side

The fault detector of each side will pick up when following two criteria of corresponding side are
satisfied.

(1) Maximum three-phase current of one side reaches setting of this protection.
(2) Corresponding voltage control element picks up.

3.2.1.5 Fault Detector of Zero-sequence Overcurrent Protection of Each Side

This fault detector of each side will pick up when zero sequence current reaches setting of
zero-sequence overcurrent protection of corresponding side.

3.2.1.6 Fault Detector of Gap Protection

 Fault Detector of gap zero-sequence overcurrent protection

The fault detector will pick up if the zero sequence current from air-gap CT is higher than its
setting.

 Fault Detector of HV gap zero-sequence overvoltage protection

The fault detector will pick up if the zero sequence voltage from broken-delta winding of VT is
higher than its setting.

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Chapter 3 Description of Operation Theory

3.3 Protective Fault Detector

Operation of each fault detector makes the program jump to fault calculation of the protection
element for 500 ms.

Each protective fault detector has same operation criterion as the corresponding general fault
detector has.

3.4 Transformer Current Differential Protection

3.4.1 Current Compensation

By applying the Ampere-turn balance on different transformer vector groups, the RCS-985TSC
relay forms the current differential equations.

During the normal operation, the magnitude and angle of secondary currents of each side of
transformer are different due to different CT ratios, different voltage levels and different
transformer vector groups. This kind of current difference shall be eliminated during normal
operation, which is realized by correction coefficient compensation and phase shift compensation
in program.

3.4.1.1 Magnitude Compensation

 Calculate rated primary currents of each side

Sn
I b 1n  (Equation 3.4-1)
3U b1n

Where:

Sn is the maximum rated capacity of all windings (i.e. setting [Sn]).

U b1 n is the rated phase-to-phase voltage at the calculated side of the transformer (i.e. setting

[U1n_S1] , [U1n_S2] or [U1n_S3].)

 Calculate rated secondary currents of each side

I
I b 2 n  b1 n (Equation 3.4-2)
nbLH

Where:
I b1n is the rated primary current at the calculated side of transformer.
nbLH is the ratio of CT at the calculated side of transformer.

When viewing settings and values of current differential protection in the relay, user will find the

NANJING NARI-RELAYS ELECTRIC CO., LTD 17


Chapter 3 Description of Operation Theory

unit “Ie”(transformer secondary rated current). The current in differential protection calculation is
not actual secondary value but per unit value which can be got by actual secondary value of each
side of transformer divided by transformer secondary current of each side.

 Calculate correction coefficients of each side

I
K ph  N (Equation 3.4-3)
I b2n

Where:
Ib 2 n is the rated secondary current at the calculated side.
IN is the rated secondary current of each side CT of transformer.

The currents used in the following analysis have been corrected, that means the currents for
following calculation are the products of the actual secondary current of each side multiplying its

own correction coefficient ( K ph ).

3.4.1.2 Phase Shift Compensation

By defining which particular connection group the protected transformer belongs to, the proper
calculation routine will be applied.

The following transforming method is based on the assumptions listed here:

 CTs at each side of transformer are connected in star type.

 Secondary currents of each CT are connected to the equipment directly.

 The positive polarity of CT on each side is at busbar or step-down transformer side.

 Polarity of each secondary winding of CT is as same as shown in Figure 1.1-1 ~ Figure 1.1-4.

The secondary current phase shift compensation for all CTs are achieved by software, Y→ Δ
transform method is used for this purpose. For connection Y/Δ-11, the correction equations are as
follows:

At Y side:

'  

I A (I A I B ) / 3
'  

I B ( I B I C)/ 3 (Equation 3.4-4)


'  
I C ( I C I A ) 3

Where:

  
I A , I B , I C are the secondary currents of CT at Y side.

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Chapter 3 Description of Operation Theory

  
I ' A , I ' B , I ' C are the corrected current of each phase at side Y.

For other connection type,the current can be calculated according to the equations listed above.
The connection type can be selected by logic settings [Cfg_ConnGrp] (refer to section 7.2 system
settings).

NOTE: The device doesn’


t support individual winding inputs but there is a logic setting

[Cfg_ConnGrp] for user to select different vector group of transformer, which almost
covers common connection groups. If user has especially requirement, please inform us
before place an order.

3.4.2 Sensitive Percent Differential Element

Following analysis is based on the assumption that amplitude and phase shift compensation have
been done.

The Low setting percent differential protection with low pickup setting and restraint slope is also
called sensitive percent differential protection and is much more sensitive to operate when a slight
internal fault occurs. Three blocking elements, CT saturation, inrush current and CT circuit failure
(optional) have also been included for the protection in order to prevent it from unwanted
operation during an external fault.

Operation criteria of this percent differential protection are:


I d K bl I r I cdqd (I r nI e )

K bl Kbl 1 K blr ( I r / I e )

I d Kbl 2 ( I r nI e ) b Icdqd (I r nI e )

K blr ( Kbl 2 Kbl 1 ) /( 2 n)

b (K bl1 Kblr n) nI e
(Equation 3.4-5)

 m

  Ii
rI  i1

 2
 m 
I d  Ii
 i1

Where:

I e is the rated current of transformer.

I cdqd is the pickup setting of steady state percent differential protection, which is also setting of

fault detector of percent differential protection. [I_Pkp_PcntDiff]

Id is the differential current,.

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Chapter 3 Description of Operation Theory

I r is the restraint current.

k bl is percent differential restraint coefficient and Kblr is its increment.

k bl 1 is the first slope of percent differential protection [Slope1_PcntDiff] with setting range 0.05 –

0.15., and 0.10 is recommended usually.

k bl 2 is the second slope of percent differential protection [Slope2_PcntDiff] with setting range

0.50 ~ 0.80 and 0.70 is recommended usually.


n is the multiple of restraint current at second slope and is fixed at 6.

I i (i = 1 … m) is current at each side of transformer and detailed definition is as follows.

3.4.3 Insensitive Percent Differential Protection Element

A percent differential protection with high slope and high setting is equipped with the equipment.
This protection, also called an insensitive differential protection, is blocked only by an inrush
current criterion and CT circuit failure (optional).

Insensitive percent differential protection can prevent influence of steady state and transient CT
saturations during an external fault, and can operate correctly and quickly during an internal fault
even with CT saturated. Operation criterion of this insensitive percent differential protection is

I d 1.2 I e
 (Equation 3.4-6)
I d 1.0 I r

Where:

I d and I r have the same meaning as mentioned above.

NOTE: Parameters of this protection have been fixed in program and do not need to be

configured by user.

3.4.4 Unrestrained Instantaneous Differential Protection Element

The aim of unrestrained instantaneous differential protection for transformer is to accelerate the
trip speed for transformer’
s inner fault. Therefore the element does not need any blocking element,
but the setting should be greater than the maximum inrush current.

Unrestrained differential element shall operate to trip breakers at all sides of transformer when any
phase differential current is higher than its setting. Its operation criterion is:

I d I cdqd (Equation 3.4-7)

Where:

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Chapter 3 Description of Operation Theory

I d has the same meaning as mentioned above.

I cdqd is the setting of the unrestrained instantaneous differential protection, i.e. [I_InstDiff].

3.4.5 Operation Characteristic of Current Differential Protection

Id
operation area of unrestrained
instantaneous differential protection
Icdsd

operation area of high


setting percentage

.0
differential protection

ot ta o w
=1
K

pr en f l
Kbl2

ec ge
al c o

on
ti er ea

ti
en p r a
e r ng n
i ff ti i o
d et rat
s e
op

Kbl1
Icdqd

0 Ie 1.2Ie nIe Ir

Figure 3.4-1 Operation characteristic of current differential protection

Please refer to above sections for detailed description of, I d , I r , I e , K bl 1 , K bl 2 , I cdqd , and I cdsd in
above figure.

(1) Sensitive percent differential protection element will send tripping signal after CT saturation,
CT circuit failure (optional), inrush currents, and overexcitation have been excluded. It can ensure
sensitivity of protection and avoid unwanted operation when CT is saturated during an external
fault. Its operation area is the tint shadow area in the figure above.

(2) Insensitive percent differential protection element will send the tripping signal only after the CT
circuit failure (optional) and inrush current have been excluded. It eliminates influence of transient
and steady saturation of CT during an external fault and ensures reliable operation even if CT is in
saturation condition during an internal fault by means of its percentage restraint characteristic. Its
operation area is a deep shadow area in the figure above.

(3) Unrestrained instantaneous differential protection element will send tripping signal without
any blocking if differential current of any phase reaches its setting. Its operation area is over the
above two areas with no shadow.

3.4.6 Inrush Current Detection Element

In the equipment, the second harmonic of differential current can be used to distinguish inrush
current. Its operation criterion is:

NANJING NARI-RELAYS ELECTRIC CO., LTD 21


Chapter 3 Description of Operation Theory

I d 2 max K 2 xb I dmax (Equation 3.4-8)

Where:

I d 2max is the maximum second harmonic of three-phase differential current.

I dmax is the maximum fundamental component of three-phase differential current.

k 2 xb is the setting of restraint coefficient of second harmonic [k_2rdH_PcntDiff]. k 2 xb = 0.15 is


recommended.

3.4.7 CT Saturation Detection Element


In order to prevent unwanted operation of steady state percent differential protection caused by
transient or steady state saturation of CT during external fault, composite harmonics of CT is used
for the protection equipment to discriminate saturation of CT. The expression is as following:

I cop K nxb I 1 (Equation 3.4-9)

Where:

I cop is the composite harmonics of phase differential current.


I 1 is the fundamental component of corresponding phase differential current.
k xxb is proportional coefficient.
When a fault occurs, asynchronous method for the recognition of current transformer saturation is
applied to distinguish the fault is an internal fault or an external fault at first, and once an external
fault is distinguished, then above criterion of CT saturation shall be enabled automatically to
prevent unwanted operation of percent differential protection due to CT saturation.

3.4.8 Differential CT Circuit Failure Detection

The differential CT circuit failure is divided into two kinds: differential CT circuit abnormality (refer
to section 3.13.2) without pickup of fault detector of differential protection and differential CT circuit
failure (refer to section 3.13.3) with the fault detector pickup.

CT circuit failure blocking function can be configured by logic setting [En_CTSBlkDiff]. Please refer
to section 3.13.3 for details.

3.4.9 Overexcitation Detection Element

When a transformer is overexcited, the exciting current will increase sharply which may result in
unwanted operation of differential protection. Therefore the overexcitation shall be discriminated to
block the current differential protection. The fifth harmonic of differential current is used as criterion
of overexcitation discrimination.

I 5th k 5 xb * I 1 st (Equation 3.4-10)

22 NANJING NARI-RELAYS ELECTRIC CO., LTD


Chapter 3 Description of Operation Theory

Where:

I1st is fundamental component of differential current.


I5 th is the fifth harmonic of differential current.
k 5 xb is the fifth harmonic restraint coefficient, it is fixed at 0.25.

NOTE: Insensitive percent differential protection is not blocked by fifth harmonic of

differential current.

3.4.10 Logic Scheme

Figure 3.4-2 Logic diagram of percent differential protection

Where:
Id_max is the maximum value of differential currents.

[I_InstDiff] is the setting of the unrestrained instantaneous differential protection.


[EBI_Diff] is the binary input for enabling current differential protection.

Flg_FD_Diff is the internal flag indicating that the fault detector of differential current picks up.
Flg_Op_SensPcntDiff is the internal flag indicating that sensitive percent differential protection
operates.

Flg_Op_UnsensPcntDiff is the internal flag indicating that unsensitive percent differential


protection operates.

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Chapter 3 Description of Operation Theory

[En_PcntDiff] is the logic setting used to enable percent differential protection function.

[En_InstDiff] is the logic setting used to enable instantaneous differential protection function.
Flg_Inrush is the internal flag indicating inrush current is distinguished.

Flg_CT_Sat is the internal flag indicating external saturation of current transformer is


distinguished.

Flg_CTS is the internal flag indicating current transformer circuit failure is distinguished.

Flg_OvExc is the internal flay indicating overexcitation of transformer is distinguished.


[En_CTSBlkDiff] is the logic setting used to block percent differential protection during current
transformer circuit failure being distinguished.
[Op_InstDiff] is the operation flag of unrestrained instant differential protection.
[Op_PcntDiff] is the operation flag of percent differential protection.

3.5 Restricted Earth Fault Protection (REF)

Restricted earth fault protection is also called zero-sequence differential protection, which include
zero-sequence percent differential protection element and unrestrained instantaneous
zero-sequence differential protection element. There are three restricted earth fault protection
elements are equipped in the relay for the three sides of a transformer respectively.

3.5.1 Magnitude Compensation

If CTs used for REF have different ratios, then the CT ratio compensation is carried out in the
program automatically. Following gives the criteria of calculating correction coefficient.

There are two correction coefficients set for restricted earth fault protection (also called
zero-sequence differential protection) of each side. One is the correction coefficient of the
calculated side (i.e. three-phase CT input side) of each side, and the other is the correction
coefficient of neutral point side (i.e. zero-sequence CT on the neutral point) of each side.

The criteria of calculating the correction coefficients are

K
K 0CrCa  CT
K CT _ B
(Equation 3.5-1)
KCT _ B
K0 CrNP  1
KCT _ B

Where:

K 0 CrCa is the correction coefficient of the calculated side (i.e. three-phase current input side) of

certain side of a transformer.

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Chapter 3 Description of Operation Theory

K 0CrNP is the correction coefficient of the neutral point side of certain side of a transformer.

KCT is the CT ratio of the calculated side of certain side of a transformer..

K CT _ B is the CT ratio of the neutral point side of certain side of a transformer..

If the correction coefficient of the calculated side is not greater than 3, the actual calculated value
from (Equation 3.5-1) will be adopted as correction coefficient of the calculated side. If the
correction coefficient of the calculated side is greater than 3, the 3 will be adopted as correction
coefficient of the calculated side and the correction coefficient of the neutral point side will be
reduced proportionally. The criteria of calculating the two correction coefficients will change to the
following equation.

K 0CrCa 3

(Equation 3.5-2)
1
K 0 CrNP 
K 0 CrCa / 3

The currents used in calculation of restricted earth fault are based on the two assumptions.

 The currents for following calculation are the products of the actual secondary current of
each side multiplying its corresponding correction coefficient respectively.

 The polarity of each secondary winding of CT is as same as shown in Figure 1.1-1~


Figure 1.1-4.

3.5.2 Zero-sequence Percent Differential Protection


Operation criteria of zero-sequence percent differential protection of some side are as follows:

I 0d I 0cdqd
I K I
0d 0 b1 0r

I 0r max{ I 01 , I 0 n } (Equation 3.5-3)


  
I 0d I 01 I 0n

Where:

I 01 is the three times calculated zero sequence current of some side.

I 0 n is the current of zero sequence CT on neutral point of some side..

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Chapter 3 Description of Operation Theory

I 0 cdqd is the pick up setting of zero-sequence percent differential protection

[I_Pkp_PcntREF_S1(S2,S3)].

I 0 d is the zero-sequence differential current.

I 0 r is the zero-sequence restraint current.

k 0 bl is the setting of percentage restraint coefficient of zero-sequence percent differential


protection [Slope_PcntREF_S1(S2,S3)], and 0.5 is recommended;

When the above equation is satisfied the zero-sequence percent differential protection will
operate.

DANGER: Before restricted earth fault protection of some side is put into operation on

site, polarity of zero-sequence current transformers (CT) on neutral point of the side must
have been checked right by an energizing test of the side of a transformer or a test of
simulating an external fault of the side in primary system. Otherwise a maloperation may
occur during an external earth fault.

Figure 3.5-1 shows operation characteristic of this zero-sequence percent differential protection.

3.5.3 Unrestrained Instantaneous Zero-sequence Differential Protection

The aim of unrestrained instantaneous zero-sequence differential protection for transformer is to


accelerate the trip speed for transformer’
s inner earth fault. So the element does not need any
block element, but the setting should be greater than maximum inrush current.

The operation of this protection shall trip all breakers at all sides of a transforme r when any
unrestrained zero-sequence differential current is greater than its setting. Its operation criterion is:

I0 d I0 cdsd (Equation 3.5-4)

Where:

I 0d is the zero-sequence differential current.

I 0 cdsd is the setting of the unrestrained instantaneous zero-sequence differential protection, i.e.

[I_InstREF_S1(S2,S3)].

Figure 3.5-1 shows operation characteristic of this unrestrained instantaneous differential


protection.

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Chapter 3 Description of Operation Theory

Figure 3.5-1 Operating characteristic of restricted earth fault protection

Please refer to above sections for detailed description of I 0 d , I 0 r , K 0 bl , I 0 cdqd and I 0cdsd in
above figure.

3.5.4 Difference of CT Transient Characteristics Detector

Difference of transient characteristic and saturation of various CT will result in erroneous zero
sequence differential current during an external three-phase short circuit fault or transformer
energization.

In order to eliminate the effect of it, positive sequence current restraint blocking criterion is used.
When zero sequence current of each side zero-sequence differential protection is greater than 0
times positive sequence current, it is decided that zero sequence current is caused by fau lt and
release zero sequence differential protection. Positive sequence current restraint blocking criterion
is showed below.

I 0 0 *I 1 (Equation 3.5-5)

Where:

I0 is the zero sequence current at some side.

I1 is its corresponding positive sequence current.

0 is a proportional coefficient.

At the same time, second harmonic of phase current of each side of zero-sequence differential
protection is adopted to distinguish CT saturation to block zero-sequence differential protection.
proportional coefficient.

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Chapter 3 Description of Operation Theory

3.5.5 CT Supervision for REF Protection

Zero-sequence differential CT circuit abnormality alarm function is equipped and please refer to
section 3.13.3 for detailes.

3.5.6 Logic Scheme


Side 1, side 2 and side 3 have similar logics of restricted earth fault protection with independent
settings. Here take side 1 as an example.

Figure 3.5-2 Logic diagram of restricted earth fault protection of HV side

Where:

I0d is the zero-sequence differential current of side 1.

[I_InstREF_S1] is the current setting of unrestrained instantaneous zero-sequence differential


protection of side 1.

[EBI_REF_S1] is the binary input of enabling zero-sequence differential protection of side 1.

[En_REF_S1] is the logic setting of enabling zero-sequence differential protection of side1.

[En_InstREF_S1] is the logic setting of enabling unrestrained instantaneous zero-sequence


differential protection of side 1.

[En_PcntREF_S1] is the logic setting of enabling percent differential protection of side 1.

Flg_FD_REF_S1 is the internal flag indicating that the fault detector of zero-sequence differential
protection of side 1 picks up.

Flg_Op_PcntREF_S1 is the internal flag indicating that percent zero-sequence differential


protection of side 1 operates picks up.

Flg_CT_Abnor&Sta is the internal flag indicating that CT abnormality or saturation is detected.

[Op_InstREF_S1] is the operation of unrestrained instantaneous zero-sequence differential

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Chapter 3 Description of Operation Theory

protection of HV side.

[Op_PcntREF_S1] is the operation of percent zero-sequence differential protection of HV side.

3.6 Voltage Controlled Overcurrent Protection of Side 1

3.6.1 Application

This protection is applied as backup protection of transformer, which comprises three-stage


definite time overcurrent protection element with own settings and time delays. Stage 1 and 2 can
be controlled by voltage control element by configuring logic settings. Settings are provided for
voltage control element for the user to choose certain sensitivity.

3.6.2 Definite Time Overcurrent Protection Element

Following functions of three-stage definite time overcurrent relay can be selected by configuring
corresponding logic settings:

 Choose which stage is controlled by voltage control element (stage 1 and 2).

 Choose being controlled by which side voltage control element (stage 1 and 2)

 Breaker(s) on which side or sides will be tripped (stage 1, 2 and 3).

3.6.3 Voltage Control Element (VCE)

The voltage control element is an element which will operate if phase-to-phase voltage is lower
than its setting or negative sequence voltage is higher than its setting. Each side of transformer
has its own voltage control element for controlling overcurrent protection of local side or other side
by configuring corresponding logic setting.

Criteria:

U < [Vpp_UV_VCE_S1] or U 2  [V_NegOV_VCE_S1] (Equation 3.6-1)

Where:

U  is the phase-to-phase voltage of side 1.

U 2 is the negative sequence voltage of side 1.

[Vpp_UV_VCE_S1] is setting of undervoltage control element of side 1.

[V_NegOV_VCE_S1] is setting of negative-sequence overvoltage control element of side 1.

Stage 1 and stage 2 of definite time overcurrent protection can be controlled by voltage element by
configuring related logic settings [En_VCE_OC1_S1] and [En_VCE_OC2_S1]). Stage 1 or 2 can
be blocked by voltage control element of side1, side 2 or side 3 by configuring logic setting
[En_S1.VCE_OC_S1], [En_S2.VCE_OC_S1], or [En_S3.VCE_OC_S1].

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Chapter 3 Description of Operation Theory

When logic setting [En_S2.VCE_OC_S1] is set as “1”, voltage element of side 2 will pick up
following two cases:
Case 1: If voltage element of side 2 reaches its setting and current of side 2 is higher than 0.04 In
Case 2: If voltage element of side 2 reaches its setting and current of side 2 and side 3 both are
lower than 0.04 In.

When logic setting [En_S3.VCE_OC_S1] is set as “1”, voltage element of side 3 will pick up
following two cases:
Case 1: If voltage element of side 3 reaches its setting and current of side 3 is higher than 0.04 In .
Case 2: If voltage element of side 3 reaches its setting and current of side 2 and side 3 both are
lower than 0.04 In.

3.6.4 Influence of VT Circuit Failure on VCE

Logic setting [Opt_VTS_OC_S1] is used to configure action of voltage control element during VT
circuit failure. When this logic setting is set as “1”, if VT circuit failure is detected, the voltage
control element cannot pick up.

When this logic setting is set as “0”, if this side VT circuit failure is detected and voltage control
element reaches its setting, voltage control element will pickup and the voltage controlled
overcurrent protection will becomes a pure overcurrent protection.

3.6.5 Influence of VT out of Service on VCE

When VT of some side is out of service for maintenance, the corresponding binary input
[BI_Out_VT1], [BI_Out_VT2] or [BI_Out_VT3] is needed to be energized to make overcurrent
protection of corresponding side operate correctly.

If binary input [BI_Out_VT1] is energized, voltage control element of side 1 can not pickup
anymore but voltage controlled overcurrent protection of the side can still operate in following two
cases:

Case 1: Overcurrent protection of side 1 reaches its setting, logic setting [En_S2.VCE_OC_S1] is
energized and voltage control element of side 2 pickups.

Case 2: Overcurrent protection of side 1 reaches its setting, logic setting [En_S3.VCE_OC_S1] is
energized and voltage control element of side 3 pickups.

3.6.6 Current Memory Function

For a self and parallel-excited generator, current decreases so quick during short-circuit fault that it
may be lower than overcurrent protection setting before tripping signal is issued. Therefore, after
current memory function is equipped to remember fault current so that the voltage controlled
overcurrent protection can operate reliably. Logic setting [En_Mem_Curr] is used for configuration
of this function.Current memory function is only applied for voltage control overcurrent protection.

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Chapter 3 Description of Operation Theory

3.6.7 Logic Scheme

3.6.7.1 Voltage Control Element

Each side of transformer has its own voltage control element for controlling overcurrent protection
of local side other other side. Here voltage control elment of side 1 is taken as an example to show
the logic.

Figure 3.6-1 Logic diagram of voltage control element

Where:

[BI_Out_VT1] is the binary input of VT of side 1 out of service for maintenance

Upp_min is the minimum value of phase-to-phase voltages of side 1.

U2 is the negative sequence voltage of side 1.

Flg_VTS_S1 is the internal flag indicating that voltage transformer circuit failure of side 1 is
distinguished.

[Vpp_UV_VCE_S1] is the setting of undervoltage control element of side 1.

[V_NegOV_VCE_S1] is the setting of negative-sequence overvoltage control element of side 1

[Opt_VTS_OC_S1] is the logic setting of selecting side 1 overcurrent protection how to response
when VT circuit fails.

Flg_VCE_S1 is the internal flag indicating that voltage control element (VCE) of side 1 picks up.

3.6.7.2 Stage 1 (2) of Overcurrent Protection

Stage 1 and stage 2 of overcurrent protection have similar logic diagrams and stage 1 is taken as
example to show the logic scheme diagram.

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Chapter 3 Description of Operation Theory

& ≥1
[En_Mem_Curr]

Imax>[I_OC1 _S1]

Flg_VCE _S1
[En_VCE_OC1 _S1] &

[En_S1.VCE_OC_S1]
&
Flg_VCE _S2 ≥1 & [t_OC1_S1] [Op_OC1_S1]
& ≥1
[En_S2.VCE_OC_ S1 ]

Flg_VCE _S3
&
[En_S3.VCE_OC_ S1 ]

[EBI_PPF_S1]
&
[En_PPF_S1]

Flg_FD_OC1_S1

Figure 3.6-2 Logic diagram of stage 1 of overcurrent protection of side 1

[En_Mem_Curr] is logic setting of enabling current memeory function of side 1.

Imax is the maximum value of three-phase current of side 1.

[I_OC1_S1] is the current setting of stage 1 of overcurrent protection of side 1.

Flg_VCE_S1 is the internal flag indicating that voltage control element (VCE) of side 1 picks up.

Flg_VCE_S2 is the internal flag indicating that voltage control element (VCE) of side 2 picks up.

Flg_VCE_S3 is the internal flag indicating that voltage control element (VCE) of side 3 picks up.

[En_VCE_OC1_S1] is the logic setting of enabling overcurrent protection stage 1 of side 1


controlled by voltage control element.

[En_S1.VCE_OC_S1] is the logic setting of enabling overcurrent protection stage 1 of side 1


controlled by voltage control element of side 1.

[En_S2.VCE_OC_S1] is the logic setting of enabling overcurrent protection stage 1 of side 1


controlled by voltage control element of side 2.

[En_S3.VCE_OC_S1] is the logic setting of enabling overcurrent protection stage 1 of side 1


controlled by voltage control element of side 3.

[EBI_PPF_S1] is the binary input of enabling backup overcurrent protection of side 1.

[En_PPF_S1] is the logic setting of enabling backup overcurrent protection of side 1.

Flg_FD_OC1_S1 is the internal flag indicating that the fault detector of stage 1 of overcurrent
protection of side 1 picks up.

[t_OC1_S1] is the delay setting of stage 1 overcurrent protection of side 1.

[Op_OC1_S1] is the operation of stage 1 of overcurrent protection of side 1.

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Chapter 3 Description of Operation Theory

3.6.7.3 Stage 3 of Overcurrent Protection

Stage 3 of overcurrent protection is pure overcurrent protection without voltage control element
blocking.

Figure 3.6-3 Logic diagram of stage 3 of overcurrent protection of side 1

Imax is the maximum value of three-phase current of side 1.

[I_OC3_S1] is the current setting of stage 3 of overcurrent protect ion of side 1.

[EBI_PPF_S1] is the binary input of enabling backup overcurrent protection of side 1.

[En_PPF_S1] is the logic setting of enabling backup overcurrent protection of side 2.

Flg_FD_OC1_S1 is the internal flag indicating that the fault detector of stage 3 of overcurrent
protection of side 1 picks up.

[t_OC3_S1] is the delay setting of stage 3 overcurrent protection of side 1.

[Op_OC3_S1 is the operation of the stage 3 of overcurrent protection of side 1.

3.7 Voltage Controlled Directional Zero-Sequence Overcurrent

Protection of Side 1

3.7.1 Application

This protection is applied as backup protection of earth fault for transformer with neutral point
earthed, which comprises two-stage definite time overcurrent protection element with own
settings and definite time delays. Setting is provided for voltage control element for the user to
choose certain sensitivity.

3.7.2 Definite Time Zero-sequence Overcurrent Protection

Following functions of three-stage definite time zero-sequence overcurrent relay can be selected
by configuring corresponding logic settings:

 Whether or not be controlled by directional element (stage 1 and 2).

 Whether or not use calculated zero sequence current (stage1 and 2).

 Breaker(s) at what side or sides will be tripped (stage 1 and 2).

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Chapter 3 Description of Operation Theory

3.7.3 Zero Sequence Direction Element (RDE)

Logic setting [Opt_Dir_ROC_S1] is used to select the direction of every stage of zero sequence
overcurrent protection. If this logic setting is set as “1”, the direction is transformer and reach angle
is 225º. If this logic setting is set as “0”, the direction is power system and reach angle is 75º.
Figure 3.7-1 shows operating characteristic of directional protection where the hatched area is
operation zone.

In addition, logic setting [En_Dir_ROC1_S1] or [En_Dir_ROC2_S1] is used to select whether


stage 1 or 2 of zero sequence overcurrent relay is controlled by directional element if this logic
setting is set as “1”, zero sequence overcurrent protection will be controlled by directiona l element.

Io

3U0 φlm = 255° 3U 0


φlm = 75°

Io

a) Direct to power system b) Direct to transformer

Figure 3.7-1 Operating characteristic of zero-sequence directional element

NOTE: The zero sequence voltage and current used by directional relay is definitely the

calculated voltage and current. The direction mentioned above is based on the
assumption that positive polarity of CT being at the side of busbar.

3.7.4 Zero Sequence Current Used by zero-sequence Overcurrent Relay

Logic setting [Opt_3I0_ROC_S1] is used to select whether zero sequence current is used by stage
1 or 2 of zero-sequence overcurrent relay. If the logic setting is set as “1”, internally calculated zero
sequence current is used for the stage. If it is set as “0”, directly measured zero sequence current
is used.

3.7.5 Influence of VT Circuit Failure on RDE

Logic setting [Opt_VTS_ROC_S1] is used to control performance of zero-sequence directional


relay during VT circuit failure. If this logic setting is set as “1”, when VT circuit failure at local side is
detected, zero-sequence overcurrent relay will be blocked. If it is set as “0”, when VT circuit
failure at one side is detected, zero-sequence overcurrent relay become an overcurrent relay
without directional element control.

3.7.6 Influence of VT out of Service on RDE

When VT of side 1 is out of service for temperate maintenance, it is needed to energize the binary
input [BI_Out_VT1] and then the directional element pickups.

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Chapter 3 Description of Operation Theory

3.7.7 Logic Scheme of Zero-sequence Overcurrent Protection

Stage 1 and stage 2 have similar logic diagrams with independent settings and stage 1 is taken as
example to show the logic scheme diagram.

Figure 3.7-2 Logic diagram of stage 1 of zero-sequence overcurrent protection

Where:

RDE is zero sequence directional element.

Flg_Dir_ROC_S1 is the internal flag indicating the zero sequence directional element picks up.

[Opt_VTS_ROC_S1] is the logic setting of selecting zero sequence overcurrent protection how to
act during VT circuit failure.

3I0: three times zero sequence overcurrent.

[EBI_EF_S1] is the binary input of enabling earth fault protection of side 1 (i.e. voltage supervised
directional zero-sequence protection of side 1).

[En_EF_S1] is the logic setting of enabling earth fault protection of side 1.

[t_ROC1_S] is the time delay of stage 1 of zero sequence overcurrent protection.

Flg_FD_ROC1_S1 is internal flag indicating that the fault detector of stage 1 of zero-sequence
overcurrent protection picks up.

[Op_ROC1_S1] is the operation of zero sequence overcurrent protection.

3.8 Gap Earth Fault Protection

One stage “gap” zero-sequence overcurrent protection with two delays and one stage
zero-sequence overvoltage protection with two delays are provided as backup protection of side 1
of transformer with neutral point ungrounded, or grounded through small reactor or gap.

Considering that ground overcurrent via air gap and zero -sequence overvoltage may appear
alternatively during air gap broken down process, once zero-sequence overcurrent or

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Chapter 3 Description of Operation Theory

zero-sequence overvoltage protection operates, the operations of these two elements are “OR”
relation. Therefore operation of the “gap”protection is reliable.

 Logic scheme

Figure 3.8-1 Logic diagram of gap earth fault protection

Where:

3U0 is the broken-delta voltage of side 1.

3I0 is the current of gap zero-sequence CT on neutral point of side 1.

[V_ROV1_Gap] is the setting of gap zero-sequence overvoltage protection.

[I_ROC1_Gap] is the setting of gap zero-sequence overcurrent protection.

[EBI_EF_Gap] is the binary input of enabling gap earth fault protection.

[En_EF_Gap] is the logic setting of enabling gap earth fault protection.

Flg_FD_ROV_Gap is the internal flag indicating that the fault detector of gap zero-sequence
overvoltage protection picks up.

Flg_FD_ROC_Gap is the internal flag indicating that fault detector of gap zero-sequence
overcurrent protection picks up.

[t_ROV11_Gap] is the delay 1 of gap zero-sequence overvoltage protection.

[t_ROV12_Gap] is the delay 2 of gap zero-sequence overvoltage protection.

[t_ROC11_Gap] is the delay 1 of gap zero-sequence overcurrent protection.

[t_ROC12_Gap] is the delay 2 of gap zero-sequence overcurrent protection.

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Chapter 3 Description of Operation Theory

[Op_ROV11_Gap] is the operation of delay 1 of gap zero-sequence overvoltage protection.

[Op_ROV12_Gap] is the operation of delay 2 of gap zero-sequence overvoltage protection.

[Op_ROC11_Gap] is the operation of delay 1 of gap zero-sequence overcurrent protection.

[Op_ROC12_Gap] is the operation of delay 2 of gap zero -sequence overcurrent protection.

3.9 Voltage Controlled Overcurrent Protection of side 2 (side 3)

3.9.1 Application

This protection is applied as backup protection of transformer, LV busbar and neighboring lines,
which comprises two-stage definite time overcurrent protection element with own settings and
time delays. The two stages can be controlled by voltage control element by configuring logic
settings. Settings are provided for voltage control element for the user to choose certain sensitivity

Voltage controlled overcurrent protections of side 2 and 3 have similar logic schemes with
independent settings to control the protection. Here side 2 is taken as an example.

3.9.2 Definite Time Overcurrent Protection Element

Following functions of two-stage definite time overcurrent relay can be selected by configuring
corresponding logic settings:

 Choose which stage is controlled by voltage control element (stage 1 and 2).

 Enable SOTF logic of stage 2.

 Breaker(s) on which side or sides will be tripped (stage 1 and 2).

3.9.3 Voltage Control Element

Voltage control elements of side 2 and side 2 are similar to that of side 1 with the independent
settings of each side, and please refer to section 3.6.3 for operation criteria.

Stage 1 and stage 2 of definite time overcurrent protection can be controlled by voltage control
element of local side by configuring related logic settings [En_VCE_OC1_S2(S3)] and
[En_VCE_OC2_S2(S3)].

3.9.4 Influence of VT Circuit Failure on VCE

Logic setting [Opt_VTS_OC_S2] is used to configure action of voltage control element during VT
circuit failure. When this logic setting is set as “1”, if VT circuit failure is detected, the voltage
control element cannot pick up and the protection will not operate. When this logic setting is set
as “0”, if this side VT circuit failure is detected and voltage control element reaches its setting,
voltage control element will pickup and the voltage controlled overcurrent protection will becomes
a pure overcurrent protection.

3.9.5 Influence of VT Out of Service on VCE

When VT of some side is out of service for maintenance, the corresponding binary input

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Chapter 3 Description of Operation Theory

[BI_Out_VT1], [BI_Out_VT2] or [BI_Out_VT3] is needed to be energized to make overcurrent


protection of corresponding side operate correctly.

If binary input [BI_Out_VT2] is energized, voltage control element of side 2 can not pickup to
release the voltage blocking of this side or other side.

3.9.6 Switch onto Fault Logic (SOTF)

During switching on process of power supply of the power plant, tripping of stage 2 of this
protection shall be accelerated in order to prevent expansion of fault during following ceases,
such as fault occurs during switching on process or switching onto fault condition.

This function shall be enabled by a binary input during a short period of the transformer being
switched on and disabled when the transformer operates normally. When this function is disabled,
stage 2 will operate with its own time delay.

Logic setting [En_OC2_SOTF_S2] is used to configure this function. If this logic setting is set as
“1”, stage 2 of overcurrent protection will operate with short time delay, when the current
reaches its setting during a short period of the standby transformer being witched on. When
current in branch presents longer than 5 s, accelerating tripping function will be disabled. If binary
input of enabling accelerating tripping is energized continuously more than 10 s, an alarm will be
issued and the accelerating function will be disabled.

3.9.7 Logic Scheme

3.9.7.1 Voltage Control Element

Voltage control elements of side 2 and 3 have similar logic schemes as that of side 2 with the
independent settings of each side, and please refer to section 3.6.7.1 for the logic scheme of
voltage control element.

3.9.7.2 SOTF Logic of Stage 2

Side 2 and side 3 both have SOTF logics of stage 2 of local side by configuring corresponding
binary inputs and logic settings and their logic schemes are similar.

Figure 3.9-1 Logic diagram of SOTF logic of stage 2


Where:

Sx represents S2 (side 2) or S3 (side 3).

Flag_Cur_T5_Sx is the internal flag indicating that the duration of current of side 2 (or side 3) is
less than 5 seconds.

[BI_SOTF_Sx] is the binary input of accelerating tripping contact of side 2 (or side 3).

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Chapter 3 Description of Operation Theory

Flg_SOTF_T10_Sx is the internal flag indicating that the persisting time of the binary input of side
2 (or side 3) is less than 10s.

[En_OC2_SOTF_Sx] is the logic setting of enabling SOTF logic of side 2 (or side 3).

Flg_SOTF_Sx is the internal flag indicating that SOTF logic of stage 2 of side 2 (or side 3) picks
up.

3.9.7.3 Stage 1 of Overcurrent Protection

Stage 1 of overcurrent protection of side 1 and that of side 2 have similar logic schemes.

Figure 3.9-2 Logic diagram of stage 1 of overcurrent protection


Where:

Sx represents S2 (side 2) or S3 (side 3).

Imax_Sx is the maximum value of three-phase current of side 2 (or side 3).

[I_OC1_Sx]: current setting of stage 1 of overcurrent protection of side 2 (or side 3).

[En_VCE _OC1_Sx] is the logic setting of enabling voltage control for stage 1 of overcurrent
protection of side 2 (or side 3).

[EBI_PPF_Sx] is the binary input of enabling the backup overcurrent protection of side 2 (or side
3).

[En_PPF_Sx] is the logic setting of enabling backup overcurrent protection of side 2 (or side 3).

Flg_FD_OC1_Sx is the internal flag indicating that the fault detector of overcurrent protection
stage 1 of side 2 (or side 3) picks up.

[t_OC1_Sx] is the time delay of stage 1 of overcurrent protection of side 2 (or side 3).

[Op_OC1_Sx] is the operation of stage 1 of overcurrent protection of side 2 (or side 3).

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Chapter 3 Description of Operation Theory

3.9.7.4 Stage 2 of Overcurrent Protection

Figure 3.9-3 Logic diagram of definite time overcurrent protection stage 2

Where:

Sx represents S2 (side 2) or S3 (side 3).

Flg_ SOTF_Sx, [EBI_PPF_Sx] and [En_PPF_Sx] please refer to above two sections description.

Imax_Sx is the maximum value of three-phase current of side 2 (or side 3).

[En_VCE_OC2_Sx] is the logic setting of enabling voltage control of stage 2 of overcurrent


protection of side 2 (or side 3).

[I_OC2_Sx] is the current setting of stage 2 of overcurrent protection of side 2 (or side 3)

Flg_FD_OC2_Sx is the internal flag indicating that the fault detector of overcurrent protection
stage 2 of side 2 (or side 3) picks up.

[t_OC2_Sx] is the delay setting of stage 2 of overcurrent protection of side 2 (or side 3)

[Op_OC2_Sx] is the operation of stage 2 of overcurrent element of side 2 (or side 3).

3.10 Zero Sequence Overcurrent Protection of Side 2 (side 3)

This protection is mainly used as backup protection of transformer with side 2 or 3 neutral point
grounded solidly, which consists of two-stages zero sequence overcurrent protection with time
delays. Zero sequence current used is usually taken from zero sequence CT on neutral point.

 Logic scheme

Side 2 and 3 have similar logic schemes of zero sequence overcurrent protection, and stage 1
and 2 of zero sequence overcurrent protection also have similar logic schemes, so here stage 1 is
taken as an example to show logic diagram.

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Chapter 3 Description of Operation Theory

Figure 3.10-1 Logic diagram of zero-sequence overcurrent protection


Where:
Sx represents side 2 or side 3.
3I0_Sx is the three times zero-sequence overcurrent of side 2 (or side 3).
[I_ROC1_Sx] is the current setting of stage 1 of zero-sequence overcurrent protection of side 2(or
side 3).
[EBI_EF_Sx] is the binary input of enabling backup earth fault protection of side 2 (or side 3).
[En_EF_Sx] the logic setting of enabling backup earth fault protection of side 2 (or side 3).
[t_ROC1_ Sx] is the delay setting of stage 1 of zero-sequence overcurrent protection of side 2 (or
side 3).
Flg_FD_ROC1_Sx is the internal flag indicating that the fault detector of stage 1 of zero-sequence
overcurrent protection of side 2 (or side 3) picks up.
[Op_ROC1_Sx] is the operation of stage 1 of zero-sequence overcurrent protection of side 2 (or
side 3).

3.11 Breaking Capacity Blocking Function

3.11.1 Application
When fault occurs on HVS of a main transformer or a step-down transformer, tripping is needed. If
breaking capacity of the corresponding breaker is not high enough, the breaker shall be blocked
until other related breakers are tripped firstly and the fault current is reduced to permit range. This
blocking process is described below.

(1) If the current is higher than the setting [I_CCE], related other breakers, which can be
configured by logic setting [TrpLog_CCE], will be tripped firstly. With a delay 20 ms, current is
checked again whether lower than the setting [I_CCE]. If it is, then the breaker is tripped, and
otherwise the breaker will not be tripped until the current lower than [I_CCE].

(2) If current floating through the breaker is lower than the setting [I_CCE], then the breaker will
be tripped with a delay 20 ms.

One normal-open contact is provided for the blocking element. The selective tripping function is
realized by cooperation of this contact with the tripping contact of mechanical protection.
If this blocking function is disabled, the circuit breaker will be tripped without delay.
This function can be configured to any side of transformer by configuring logic setting
[Cfg_CT_OvLd].

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Chapter 3 Description of Operation Theory

3.11.2 Logic Scheme


Following figure shows blocking logic diagram of circuit breaker tripping.

Figure 3.11-1 Blocking logic diagram of circuit breaker tripping

Where

Ia, Ib and Ic are phase A, B and C currents of one side of transformer in turn.

[I_CCE] is the current setting of current control element for breaking capacity blocking function.

Flg_TrpCmd is the internal flag indicating that tripping command is issued by protection.

BO_TrpOutp3 means that “TrpOutp3“(i.e. the 3rd group of tripping output relays) operates and
corresponding normally open contacts are closed. “TrpOutp3”is fixed as output relays for breaking
capacity blocking function.

BO_TrpOutp_Config means that othergroups of tripping output relays are selected to be tripped
first by configuring the logic setting [TrpLog_CCE].

3.12 Other Abnormality Protection Functions

RCS-985TS is also equipped with thermal overload alarm, cooling initiation, on-load tap change
blocking during overload and overcurrent output function, which can be enabled or disabled by
configuring the corresponding logic setting. This function can be configured to any side of
transformer by configuring logic setting [Cfg_CT_OvLd].

One NO (normaly open)output contact for overload initiating cooling system, one NC (normaly
closed) contact for on-load tap change blocking during overload and one NO contact for
overcurrent output are provided respectively.

Furthermore, one stage of zero-sequence overvoltage alarm is also equipped as earth fault alarm
and the zero sequence voltage for it is input through terminals 221-222.

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Chapter 3 Description of Operation Theory

3.13 Current Transformer Supervision (CTS)

3.13.1 CT Circuit Abnormality Alarm of Each Side


Operation criterion of the alarm is:

I 0 0.04I n 0.25I max (Equation 3.13-1)

Where:
I 0 is the zero sequence current of one side.
I n is rated secondary current of CT.
I max is the maximum value of three-phase current of one side.
If the current of any side of transformer meets the above criterion, CT circuit abnormality alarm of
this side will be issued after 10s .The abnormality alarm will be reset after 10 s if equipment returns
to normal condition.

3.13.2 Differential Current Abnormality Alarm


In order to raise sensitivity of this differential current abnormality alarm, percentage restraint
differential current alarm criterion is adopted.

I d  [I_Alm_Diff] and I d K bj I res (Equation 3.13-2)

Where
I d is differential current.
[I_Alm_Diff] is setting of differential current abnormality alarm
I res is the restraint current
K bj is percentage restraint coefficient.
This function is enabled only when differential protection is enabled by setting logic setting
[En_Diff] as “1”. If the criterion is met, differential circuit abnormality alarm will be issued after 10 s
but related differential protection will not be blocked. When the differential current eliminates and
the equipment return to normal condition, the alarm will be reset after 10 s.

3.13.3 CT abnormality of REF Protection

If zero-sequence differential current is greater than its alarm setting fixed in program and lasted
longer than 10 s, alarm of zero-sequence differential current alarm will be issued without blocking
the zero-sequence percent differential protection.

3.13.4 CT Circuit Failure

CT circuit failure discrimination will function after pickup of fault detector of differential protection, if
both logic setting and binary input of enabling differential protection are set as “1”.

If internal fault occurs, at least one of following conditions will occur after fault detector of

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Chapter 3 Description of Operation Theory

differential protection picks up.

(1) Any phase current of any side increases;

(2) Maximum phase current is higher than 1.2 Ie (Ie is secondary calculated rated current of
transformer);

(3) Three groups of current inputs decrease simultaneously.

If none of those conditions occurs, it will be judged as CT circuit failure. If the logic setting
[Opt_CTSBlkDiff] is set as “1”, the percent differential protection will be blocked with an alarm
signal being issued. If this logic setting is set as “0”, an alarm signal will be issued without blocking
percent differential protection.

If the alarm is issued, the alarm signal can be reset only when the failure is removed and the
equipment is reset by pressing “RESET”button on panel via energizing binary input [BI_RseTarg]
(423).

NOTE: Do not press key ”RST”on the front faceplate to remove CT circuit failure signal,

which will lead to restart the equipment.

3.14 Voltage Transformer Supervison (VTS)

Criteria of VT circuit failure of each side are:

(1) Positive sequence voltage is higher than 18V and any phase current is higher than 0.04 IN . (IN
is rated secondary current of current transformer.)

(2) Three times negative sequence voltage 3U2 is higher than 8V.

If any one criterion is met, VT circuit failure alarm will be issued after 10s. The alarm signal will be
reset automatically after 10s if equipment returns to normal condition.

NOTE:For the secondary phase-to-phase voltage of VT is equal to 110V, the threshold

value for the VT supervision will be changed correspondingly.

In following cases, VT circuit failure detection of side 1 is disabled.

Case1: Voltage control element of side 1 is not enabled to block overcurrent protection of side 1
and zero sequence directional relay of side 1 is not enabled.

Case2: Binary input [BI_Out_VT1] is energized.

In following cases, VT circuit failure detection of side 2 is disabled.

Case1: Voltage control element of side 2 is not enabled to control overcurrent protection of side 2.

Case2: Binary input [BI_Out_VT2] is energized.

In following cases, VT circuit failure detection of side 3 is disabled:

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Chapter 3 Description of Operation Theory

Case1: Voltage control element of side 3 is not enabled to control overcurrent protection of side 3.

Case2: Binary input [BI_Out_VT3] is energized.

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Chapter 3 Description of Operation Theory

46 NANJING NARI-RELAYS ELECTRIC CO., LTD


Chapter 4 Automatic Supervision

Chapter 4 Automatic Supervision

4.1 General Description

Though the protection system is in non-operating state under normal conditions, it is waiting for a
power system fault to occur at any time and must operate for the fault without fail. When the
equipment is in energizing process before the LED “HEALTHY”is on, the equipment needs to be
checked to ensure there are no errors. Therefore, the automatic supervision function, which
checks the health of the protection system when startup and during normal operation, plays an
important role.

The numerical relay based on the microprocessor operations is suitable for implementing this
automatic supervision function of the protection system.

In case a fatal fault is detected during automatic supervision, the equipment will be blocked out. It
means that relay is out of service. Before you must re-energize the relays or reset CPU module
and MON module to make relay back into service, please find out the cause and inform the
factory.

4.2 Relay Self-supervision

4.2.1 Relay Hardware Supervision

The DSP, RAM, ROM chips on the CPU module are continuously to ensure whether they are
damaged or have some errors. If any one of them is detected damaged or having error, alarm
signal [Alm_Fail] and the corresponding hardware alarm signals will be issued with equipment
being blocked, and “HEALTHY”LED will be extinguished at the same time.

4.2.2 DC Supply Supervision

The secondary voltage level of the built-in DC/DC converter is monitored and checked whether the
DC voltage is within a prescribed range.

If a failure is detected in the DC power supply circuit, the alarm signal [Alm_Pwr _DC] will be
issued with equipment being blocked, and “HEALTHY”LED will be extinguished at the same time.

If a power supply failure is detected in the built-in MON module, the alarm signal [Alm_Pwr_MON]
will be issued with equipment being blocked, and “HEALTHY”LED will be extinguished at the
same time.

4.2.3 Output Tripping Circuit Supervision

Chips controlling the output relays in the output circuit are continually monitored. If any error or
damage is detected in these chips, the alarm signal [Alm_TrpOut] will be issued with equipment
being blocked, and “HEALTHY”LED will be extinguished at the same time.

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Chapter 4 Automatic Supervision

4.2.4 Setting Supervision

This relay has 4 setting groups, while only one is active at the same time. The settings of active
setting group are checked to ensure they are reasonable. If the settings in CPU module are
checked to be invalid, the alarm signal [Alm_Setting] will be issued with equipment being blocked,
and “HEALTHY”LED will be extinguished at the same time.

If the settings in the MON module are checked to be invalid, the alarm signal [Alm_Set_MON] will
be issued with equipment being blocked, and “HEALTHY”LED will be extinguished at the same
time.

4.2.5 Voltage and Current drift Monitoring and Auto-adjustment

Zero point of voltage and current may drift influenced by variation of temperature or other
environment condition. The equipment continually automatically traces the drift and adjusts it to
normal value.

4.2.6 Fault Detector Element Supervision

If the fault detector in MON module keeps picking up for 10s, equipment will issue abnormality
alarm [Alm_FD_MON] without equipment being blocked, and the “ALMAR”LED will be lit at the
same time.

4.2.7 Communication Supervision

The communication between CPU module and MON is monitored to ensure reliable data
exchange. If communication fails, the alarm signal [Alm_Comm_MON] will be issued with
equipment being blocked, and “HEALTHY”LED will be extinguished at the same time.

4.2.8 Binary input of SOTF supervision


If the relay detects that the binary input of SOTF of side 2 (or side 3) has being energized for 10s,
the abnormality alarm [Alm_BI_SOTF_S2] (or [Alm_BI_SOTF_S3]) will be issued without
equipment being blocked, and the “ALMAR”LED will be lit at the same time.

4.2.9 Current Transformer Supervision (CTS)

The main purpose of the current transformer (CT) circuit failure supervision function is to detect
faults in the secondary circuits of CT and avoid influence on the operation of corresponding
protection functions. The CT failure supervision (CTS) function will be always processed all the
time, which includes following two aspects

 CT circuit abnormality alarm of each side

 Differential CT circuit abnormality alarm

 Differential CT circuit failure discrimination

Please refer to section 3.13 for details.

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Chapter 4 Automatic Supervision

4.2.10 Voltage Transformer Supervision (VTS)

The VTS logic in the relay is designed to detect the voltage failure and automatically adjust the
configuration of protective elements whose stability would otherwise be compromised. A
time-delay alarm output is also available.

Please refer to section 3.14 for details.

4.2.11 List of Alarm Messages

4.2.11.1 Equipment Self-Check Alarm

Equipment hardware circuits and software working conditions are always monitored by the relay. If
any abnormality occurs, the corresponding alarm message will be issued on the LCD of the
equipment.

Some failures will result in some protective function being blocked. Some server failures of
hardware or software will result in the equipment being blocked and the contacts of equipment
failure will operate at same time. During that condition, the protection relay has to be out of service
for maintenance.

NOTE :If alarm signal is issued with equipment being blocked, please try to make a fault

diagnosis by referring the issued alarm messages but not to simply reboot or re-power the
relay. If user cannot find the failure reason on site, please inform manufacturer for
maintenance.

Table 4.2-1Equipment self-check alarm list

No. Alarm Message Meaning Description


1 Alm_RAM CPU module RAM is damaged.
2 Alm_ROM CPU module ROM is damaged.
3 Alm_Setting CPU module EEPROM is damaged.
4 Alm_CPLD CPU module CPLD is damaged.
5 Alm_Pwr_DC Failure of power supply of the equipment occurs.
6 Alm_TrpOut Driving transistors of binary outputs are damaged.
7 Alm_Pwr_MON Failure of power supply of MON module occurs.
8 Alm_Set_MON MON module EEPROM damaged.
9 Alm_Comm_MON The communication between CPU and MON modules is abnormal.
10 Alm_RatioCorr_CT Correction coefficient of some side is in excess of 16
The value of the setting cell [Cfg_ConnGrp] of out of limit ( normal
11 Alm_ConnGrp
range of 0 to 7) .
12 Alm_Fail The equipment is blocked.
When the above alarm messages are displayed on the LCD, the LED “HEALTHY”is extinguished
and the protective device is blocked.

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Chapter 4 Automatic Supervision

Handling suggestion

1. Inform manufacturer for maintenance.(No.1~No.9)

2. Modify and check settings of CT ratio to improve differential protection performance. (No.10)

3. Modify and check setting cell [Cfg_ConnGrp] in system settings submenu. (No.11)

4. Please refer to other alarm messages to ensure the failure cause. (No.12)

4.2.11.2 Equipment Operation Alarm

During equipment normal operation, VT and CT circuit and some binary input circuits are always
monitored by the relay. If any abnormality of them occurs or any alarm element operates, the
corresponding alarm message will be issued on the LCD of the equipment without blocking
equipment.

When this kind of alarm messages are issued, user need to find the abnormality reason, and then
take corresponding measures to eliminate the alarm message to make the equipment return to the
normal operation.

Table 4.2-2Equipment operation alarm list

No. Alarm Message Meaning Description


Duration of pickup of any fault detector in MON module is in excess
1 Alm_FD_MON
of 10s.
Duration of energizing binary input [BI_SOTF_S1] is in excess of
2 Alm_BI_SOFT_S1
10s.
Duration of energizing binary input [BI_SOTF_S2] is in excess of
3 Alm_BI_SOFT_S2
10s.
4 Alm_CTS_S1 Secondary circuit of CT at side 1 is abnormal.
5 Alm_CTS_S2 Secondary circuit of CT at side 2 is abnormal.
6 Alm_CTS_S3 Secondary circuit of CT at side 3 is abnormal.
7 Alm_VTS_S1 Secondary circuit of VT at side 1 is abnormal.
8 Alm_VTS_S2 Secondary circuit of VT at side 2 is abnormal.
9 Alm_VTS_S3 Secondary circuit of VT at side 3 is abnormal.
10 Alm_Diff Differential CT circuit abnormality occurs.
11 Alm_CTS_Diff Differential CT circuit failure occurs.
12 Alm_OvLd Overload alarm element operates.
13 Alm_InitCoolOvLD Alarm element of overload initiating cooler operates.
14 Alm_BlkOLTC_OvLd Alarm element of blocking OLTC during overload operates.
15 Alm_BO_CCE Current control element operates.
16 Alm_ROV Zero-sequence overvoltage alarm element operates.
17 Alm_Abnor The equipment is abnormal.

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Chapter 4 Automatic Supervision

No. Alarm Message Meaning Description


When the above alarm messages are displayed on the LCD, the LED “HEALTHY”is still on, and
the LED “ALARM”is lit.

Handling suggestion

1. Check settings and wiring of VT/ CT secondary circuit. (No.1)

2. Check the corresponding binary input circuit. (No.2~No.3)

3. Check current sample value and the wiring of the CT secondary circuit of the corresponding
side. (No.4~No.6)

4. Check current sample value and the wiring of the VT secondary circuit of the corresponding
side. (No.7~No.9)

5. Check the wiring of differential CT secondary circuit. (No.10)

6. De-energize the binary input [EBI_Diff], and check the wiring of differential CT secondary
circuit. After the equipment returns to a normal condition, please reset the equipment and
energize the binary input [EBI_Diff]. (No.11)

7. Treat according to the specific application requirements. (No.12~16).

8. Please refer to other alarm messages to ensure the abnormality cause. (No.17)

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Chapter 4 Automatic Supervision

52 NANJING NARI-RELAYS ELECTRIC CO., LTD


Chapter 5 Metering and Recording

Chapter 5 Metering and Recording

5.1 General Description

The relay also provides some auxiliary functions, such as real-time data metering, binary input
status recording, event and disturbance recording, etc. All these make the relay meet the
demands of the modern power grid requirements.

5.2 Metering

RCS-985TS performs continuous measurement of the analogue input quantities. The


measurement data shown below is displayed on the LCD of the relay front panel or on the local or
remote PC.

Equipment samples 24 points per cycle. Calculate the RMS value in each interval and LCD will be
updated every 0.5 second. The following system quantities are displayed in RMS values of the
secondary side of CT and VT. This device has double CPU system (i.e. CPU and MON module),
so the sampled values of both modules will be displayed on LCD through different access menu.

NOTE: Ie and In mentioned in following sections are units. Ie is secondary rated current of

transformer and In is secondary rated current of CT.

NOTE: The quantities listed in following tables are to be displayed on LCD for RCS-985TM,

but for a certain application, some of these quantities may be eliminated due of the
scheme user required, so please look up the devices on site for actual quantities
displayed.

5.2.1 Measured Values in MON Module

Table 5.2-1 Measured values in MON module

No. Value Meaning Unit


1 Id_a The phase A differential current. Ie
2 Id_b The phase B differential current. Ie
3 Id_c The phase C differential current. Ie
4 Ia_S1 The phase A current of side 1. A
5 Ib_S1 The phase B current of side 1. A
6 Ic_S1 The phase C current of side 1. A
7 Ia_S2 The phase A current of side 2. A
8 Ib_S2 The phase B current of side 2. A
9 Ic_S2 The phase C current of side 2. A

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Chapter 5 Metering and Recording

No. Value Meaning Unit


10 Ia_S3 The phase A current of side 3. A
11 Ib_S3 The phase B current of side 3. A
12 Ic_S3 The phase C current of side 3. A
13 I0_S1 The zero sequence current of side 1. A
14 I0_S2 The zero sequence current of side 2. A
15 I0_S3 The zero sequence current of side 3. A
16 I0_Gap The zero sequence current from gap zero sequence CT. A
The zero sequence voltage of broken-delta winding of VT of side 1
17 U0_Gap V
used for gap zero-sequence overvoltage protection.
The zero-sequence differential current of restricted earth fault of
18 I0d_S1 In
side 1.
The zero-sequence differential current of restricted earth fault of
19 I0d_S2 In
side 2.
The zero-sequence differential current of restricted earth fault of
20 I0d_S3 In
side 3.
Path VALUES -> MON METERING

5.2.2 Measured Values in CPU Module

Table 5.2-2 Relevant quantities of differential protection

No. Value Meaning Unit


1 Id_a The phase A differential current. Ie
2 Id_b The phase B differential current. Ie
3 Id_c The phase C differential current. Ie
4 Ir_a The phase A restraint current. Ie
5 Ir_b The phase B restraint current. Ie
6 Ir_c The phase C restraint current. Ie
7 Id2_a The second harmonic of phase A differential current. Ie
8 Id2_b The second harmonic of phase B differential current. Ie
9 Id2_c Second harmonic of phase C differential current. Ie
10 IaCrS1 The phase A corrected current of side 1 Ie
11 IbCrS1 The phase B corrected current of side 1 Ie
12 IcCrS1 The phase C corrected current of side 1 Ie
13 IaCrS2 The phase A corrected current of side 2 Ie
14 IbCrS2 The phase B corrected current of side 2 Ie
15 IcCrS2 The phase C corrected current of side 2 Ie
16 IaCrS3 The phase A corrected current of side 3 Ie
17 IbCrS3 The phase B corrected current of side 3 Ie
18 IcCrS3 The phase C corrected current of side 3 Ie
19 Ie_S1 The secondary rated current of side 1. A

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Chapter 5 Metering and Recording

20 Ie_S2 The secondary rated current of side 2. A


21 Ie_S3 The secondary rated current of side 3. A
Path VALUES -> CPU METERING -> DIFF PROT

Table 5.2-3 Relevant quantities of phase-to-phase fault protection of side 1

No. Value Meaning Unit


1 Ia_S1 The phase A current of side 1. A
2 Ib_S1 The phase B current of side 1. A
3 Ic_S1 The phase C current of side 1. A
4 I1_S1 The positive sequence current of side 1. A
5 I2_S1 The negative sequence current of side 1. A
6 I0_S1 The calculated zero sequence current of side 1. A
7 Uab_S1 The phase A-to-phase B voltage of side 1. V
8 Ubc_S1 The phase B-to-phase C voltage of side 1. V
9 Uca_S1 The phase C-to-phase A voltage of side 1. V
10 U1_S1 The negative sequence voltage of side 1. V
11 U2_S1 The negative sequence current of side 1. V
12 U0_S1 The calculated zero sequence current of side 1. V
Path VALUES -> CPU METERING-> S1 PPP PROT

Table 5.2-4 Relevant quantities of phase-to-phase fault protection of side 2

No. Value Meaning Unit


1 Ia_S2 The phase A current of side 2. A
2 Ib_S2 The phase B current of side 2. A
3 Ic_S2 The phase C current of side 2. A
4 I1_S2 The positive sequence current of side 2. A
5 I2_S2 The negative sequence current of side 2. A
6 I0_S2 The calculated zero sequence current of side 2. A
7 Uab_S2 The phase A-to-phase B voltage of side 2. V
8 Ubc_S2 The phase B-to-phase C voltage of side 2. V
9 Uca_S2 The phase C-to-phase A voltage of side 2. V
10 U1_S2 The negative sequence voltage of side 2. V
11 U2_S2 The negative sequence current of side 2. V
Path VALUES -> CPU METERING -> S2 PPF PROT

Table 5.2-5 Relevant quantities of phase-to-phase fault protection of side 3

No. Value Meaning Unit

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Chapter 5 Metering and Recording

No. Value Meaning Unit


1 Ia_S3 The phase A current of side 3. A
2 Ib_S3 The phase B current of side 3. A
3 Ic_S3 The phase C current of side 3. A
4 I1_S3 The positive sequence current of side 3. A
5 I2_S3 The negative sequence current of side 3. A
6 I0_S3 The calculated zero sequence current of side 3. A
7 Uab_S3 The phase A-to-phase B voltage of side 3. V
8 Ubc_S3 The phase B-to-phase C voltage of side 3. V
9 Uca_S3 The phase C-to-phase A voltage of side 3. V
10 U1_S3 The negative sequence voltage of side 3. V
11 U2_S3 The negative sequence current of side 3. V
Path VALUES -> CPU METERING -> S3 PPF PROT

Table 5.2-6 Relevant quantities of earth fault and gap earth fault protections

No. Value Meaning Unit


The calculated zero sequence current or zero sequence current
1 I0S1 from the CT on the neutral point of side 1, being controlled by the A
corresponding logic setting.
2 I0NPS2 The zero sequence current from the zero sequence CT of side 2. A
3 I0NPS3 The zero sequence current from the zero sequence CT of side 3. A
4 I0_Gap The zero sequence current from the gap zero sequence CT. A
The zero sequence voltage from broken-delta winding of VT of
5 U0_Gap V
side 1 for the gap zero-sequence overvoltage protection.
The zero sequence voltage from broken-delta winding of VT of
6 U0Delt V
side 2 or side 3 for the zero-sequence overvoltage alarm element.
7 F_Dir0 State of zero direction element. V
Path VALUES -> CPU METERING -> EF&EF_GAP PROT

Table 5.2-7 Relevant quantities of zero-sequence differential protection of side 1

No. Value Meaning Unit


1 I0dS1 The zero-sequence differential current of side 1. In
2 I0rS1 The zero-sequence restraint current of side 1. In
The second harmonic of zero-sequence differential current of side
3 I0d2S1 In
1.
4 I0CaS1 The calculated zero-sequence differential current of side 1. In
5 I0NPS1 The zero sequence current from the zero sequence CT of side 1. In
The correction coefficient of the calculated side of side 1 for
6 K0CaS1
zero-sequence differential protection of side 1.

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Chapter 5 Metering and Recording

No. Value Meaning Unit


The correction coefficient of neutral point side of side 1 for
7 K0NPS1
zero-sequence differential protection of side 1.
Path VALUES -> CPU METERING -> S1 REF PROT

Table 5.2-8 Relevant quantities of zero-sequence differential protection of side 1

No. Value Meaning Unit


1 I0dS2 The zero-sequence differential current of side 2. A
2 I0rS2 The zero-sequence restraint current of side 2. A
The second harmonic of zero-sequence differential current of side
3 I0d2S2 A
2.
4 I0CaS2 The calculated zero-sequence differential current of side 2. A
5 I0NPS2 The zero sequence current from the zero sequence CT of side 2. A
The correction coefficient of the calculated side of side 2 for
6 K0CaS2
zero-sequence differential protection of side 2.
The correction coefficient of neutral point side of side 2 for
7 K0NPS2
zero-sequence differential protection of side 2.
Path VALUES -> CPU METERING -> S2 REF PROT

Table 5.2-9 Relevant quantities of zero-sequence differential protection of side 3

No. Value Meaning Unit


1 I0dS3 The zero-sequence differential current of side 3. A
2 I0rS3 The zero-sequence restraint current of side 3. A
The second harmonic of zero-sequence differential current of side
3 I0d2S3 A
3.
4 I0CaS3 The calculated zero-sequence differential current of side 3. A
5 I0NP3 The zero sequence current from the zero sequence CT of side 3. A
The correction coefficient of the calculated side of side 3 for
6 K0CaS3
zero-sequence differential protection of side 3.
The correction coefficient of neutral point side of side 3 for
7 K0NPS3
zero-sequence differential protection of side 3.
Path VALUES -> CPU METERING -> S3 REF PROT

5.2.3 Phase Angles

Table 5.2-10 Phase angles list

No. Value Meaning Unit


The angle between the phase A current and the phase B current
1 ∠I1ab °
of side 1.

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No. Value Meaning Unit


The angle between the phase B current and the phase C current
2 ∠I1bc °
of side 1.
The angle between the phase current and the phase A current of
3 ∠I1ca °
side 1.
The angle between the phase A current and the phase B current
4 ∠I2ab °
of side 2.
The angle between the phase B current and the phase C current
5 ∠I2bc °
of side 2.
The angle between the phase C current and the phase A current
6 ∠I2ca °
of side 2.
The angle between the phase A current and the phase B current
7 ∠I3ab °
of side 3.
The angle between the phase B current and the phase C current
8 ∠I3bc °
of side 3.
The angle between the phase C current and the phase A current
9 ∠I3ca °
of side 3.
The angle between the phase A current of side 1 and that of side
10 ∠I12a °
2.
The angle between the phase B current of side 1 and that of side
11 ∠I12b °
2.
The angle between the phase C current of side 1 and that of side
12 ∠I12c °
2.
The angle between the phase A current of side 1 and that of side
13 ∠I13a °
3.
The angle between the phase B current of side 1 and that of side
14 ∠I13b °
3.
The angle between the phase current C of side 1 and that of side
15 ∠I13c °
3.
The angle between the phase A-to-phase B voltage and the
16 ∠U1abbc °
phase B-to-phase C voltage of side 1.
The angle between the phase B-to-phase C voltage and the
17 ∠U1bcca °
phase B-to-phase C voltage of side 1.
The angle between the phase C-to-phase A voltage and the
18 ∠U1caab °
phase B-to-phase C voltage of side 1.
The angle between the phase A-to-phase B voltage and the
19 ∠U2abbc °
phase B-to-phase C voltage of side 2.
The angle between the phase B-to-phase C voltage and the
20 ∠U2bcca °
phase B-to-phase C voltage of side 2.
The angle between the phase C-to-phase A voltage and the
21 ∠U2caab °
phase B-to-phase C voltage of side 2.
The angle between the phase A-to-phase B voltage and the
22 ∠U3abbc °
phase B-to-phase C voltage of side 3.

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No. Value Meaning Unit


The angle between the phase B-to-phase C voltage and the
23 ∠U3bcca °
phase B-to-phase C voltage of side 3.
The angle between the phase C-to-phase A voltage and the
24 ∠U3caab °
phase B-to-phase C voltage of side 3.
The angle between the calculated zero-sequence current
25 ∠I1CaNP derived from three-phase CT of side 1 and the zero-sequence °
current of zero-sequence CT of side 1.
The angle between the calculated zero-sequence current
26 ∠I2CaNP derived from three-phase CT of side 2 and the zero-sequence °
current of zero-sequence CT of side 2.
The angle between the calculated zero-sequence current
27 ∠I3CaNP derived from three-phase CT of side 3 and the zero-sequence °
current of zero-sequence CT of side 3.
Path VALUES -> PHASE ANGLE

5.3 Binary Input

All the binary input changes are recorded in the relay, and can be displayed on LCD locally printed
or sent to automation system of substation via communication channel.

Table 5.3-1 Binary input status list

No. Value Meaning


1 BI_BlkComm Binary input of blocking communication.
2 BI_RstTarg Binary input of resetting signal.
3 EBI_Diff Binary input of enabling differential protection.
4 EBI_PPF_S1 Binary input of enabling phase-to-phase fault protection of side 1.
5 EBI_PPF_S2 Binary input of enabling phase-to-phase fault protection of side 2.
6 EBI_PPF_S3 Binary input of enabling phase-to-phase fault protection of side 3.
7 EBI_EF_S1 Binary input of enabling earth fault protection of side 1.
8 EBI_EF_S2 Binary input of enabling earth fault protection of side 2.
9 EBI_EF_S3 Binary input of enabling earth fault protection of side 3.
10 EBI_EF_Gap Binary input of enabling gap earth fault protection.
11 EBI_Resv1 Reserved binary input 1 of enabling some function.
12 BI_SOTF_S2 Binary input of accelerating trip when switching onto a fault of side 3
13 BI_SOTF_S3 Binary input of accelerating trip when switching onto a fault of side 3.
14 EBI_Resv2 Reserved binary input 2 of enabling some function.
15 EBI_Resv3 Reserved binary input 3 of enabling some function.
16 BI_Out_VT1 Binary input of VT1 out of service for maintenance
17 BI_Out_VT2 Binary input of VT2 out of service for maintenance
18 BI_Out_VT3 Binary input of VT3 out of service for maintenance

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19 EBI_REF_S1 Binary input of enabling zero-sequence differential protection of side 1


20 EBI_REF_S2 Binary input of enabling zero-sequence differential protection of side 2
21 EBI_REF_S3 Binary input of enabling zero-sequence differential protection of side 3
22 BI_Resv1 Reserved binary input 1
23 BI_Resv2 Reserved binary input 2
24 BI_Resv3 Reserved binary input 3
25 BI_Resv4 Reserved binary input 4
Path VALUES->BI STATE

5.4 Event & Fault Records

5.4.1 Introduction

The protection equipment provides the following recording functions:

 Event recording

 Fault and disturbance recording

 Present recording

All the recording information can be viewed on local LCD (except waveform) or by printing o.
Please see the detailed steps in section 8.7.

5.4.2 Event Recording

The equipment can store the latest 64 trip reports, the latest 64 equipment operation alarm reports,
the latest 64 self-check alarm reports, the latest 64 user operating reports and the latest 256
sequence of event (SOE) reports respectively. All the records are stored in non-volatile memory,
and when the available space is exhausted, the oldest report is automatically overwritten by the
latest one

 Protection element pickup or tripping reports

Any operation of protection elements, either pickup of tripping, will be logged as an event record.
Please refer to Table 8.3-1 for details.

 Equipment self-check alarm reports

Any abnormality alarm being detected during relay self-check supervision will also be logged as
individual events. Please refer to Table 4.2-1 for details.

 Equipment operation alarm reports

Under a normal operation, some alarm signals occurred due of secondary circuit abnormality or
protection alarm element operating will be record in the equipment. Please refer to Table 4.2-2 for
details.

 User Operating reports

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Whatever the user does any operation to the equipment, such as modifying the settings or clearing
reports, will be recorded by the equipment.

Please refer to Table 8.3-2 for details.

 SOE records

Here “SOE report “includes following kinds of record, such as protection elements and alarm
elements operation and dropping off, and binary input being energized or de-energized. SOE
reports are also called binary input changing reports.

(1) When a protection element operates, its state changes from “0”to “1”, and when the element
drops off, its state changes from “1”to “0”. (Refer to Table 8.3-1 for all the events).

(2) When an alarm element picks up to issue alarm signal, its state changes from “0”to “1”, and
when the element drops off, its state changes from “1”to “0”. (Refer to and Table 4.2-1 and
Table 4.2-2 for all the events).

(3) When a binary input is energized, its state changes from “0”to”1”, and when the binary input is
de-energized, its state changes from “1”to “0”. (Refer to Table 5.3-1 for all the events).

5.4.3 Disturbance Record

The equipment can store 64 pieces of trip report and the latest 8 waveform in non-volatile memory.
If a new fault occurs when 64 fault records or 8 fault waveform records have been stored, the
oldest will be overwritten by the latest one. The equipment stores actual samples that are taken at
a rate of 24 samples per cycle.

One total waveform is composed of 3 cycles’waveform before pickup of fault detector and five
cycles’waveform after pickup of fault detector. If there is anyone protection element operating,
then the recording duration will be prolonged to show 3 cycles’waveform before and 5 cycles’
waveform after the protection element trips. The duration of one waveform recording can be 15
second at most.

5.5 Time Synchronization

In modern protective schemes it is often desirable to synchronize the relays real time clock so that
events from different relays can be placed in chronological order. This can be done using the
IRIG-B input, if fitted, RS-485 message via the communication interface connected to the
substation control system, or second/minute pulse via binary input.

Pulsing this input will result in the real time clock snapping to the nearest minute. The
recommended pulse duration is 20ms to be repeated no more than once per minute. An example
of the time synchronization function is shown bellow.

Table 5.5-1 Time synchronization

Time of “Sync. Pulse” Corrected Time


19:47:00 to 19:47:29 19:47:00

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Time of “Sync. Pulse” Corrected Time


19:47:30 to 19:47:59 19:48:00

The above assumes a time format of hh:mm:ss.

Symbol “”will be viewed on right head of single line diagram on LCD when equipment detects
synchronization signal from binary input.

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Chapter 6 Hardware Description

6.1 Hardware Overview

The modular design of the RCS-985TS allows the relay to be easily upgraded or repaired by a
qualified service person. The faceplate is hinged to allow easy access to the configurable modules,
and back-plugging structure design makes it easy to repair or replace any modules.

There are several types of hardware modules in the RCS-985TS and each module takes a
different part in the equipment. The RCS-985TS mainly consists of PWR module (power supply
module), CPU module, MON module, AI modules (analog inputs module, VTs and CTs), BO
modules and HMI module. Following figure shows the block diagram of the RCS-985TS.

Figure 6.1-1Hardware block diagram

 CPU module with a powerful microchip processor, two serial interfaces and up to three
Ethernet interfaces for SAS or RTU, one interface for the local printer, and one clock
synchronization interface.

 MON module with a powerful microchip processor, as general fault detector.

 HMI module with a 160×80-dot matrix backlight LCD, a 9-key keypad, 3 LED indicators.

 No.1 AI module with 11 current transformers and 1 voltage transformer or 12 current


transformers

 No.2 AI module with 8 voltage transformers.

 No.3 PWR module power supply module with 20 regular optical insulation inputs and 5
special optical insulation inputs, and a built-in extension module of the interfaces of the CPU
module.

 No.4 BO module with 8 contact outputs for tripping, 5 contact outputs for local signal and 4
contact outputs for alarm.

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 No.5 BO module with 12 contact outputs for tripping, 5 contact outputs for remote signal.

NOTE: No.1 AI module configuration must have been definitely declared in the technical

scheme.

The Figure 6.1-2 and Figure 6.1-3 and shows the front view and rear view of the RCS-985TS.

T
RS
ESC

Figure 6.1-2 Front view of the RCS-985TS

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Figure 6.1-3 Rear view of the RCS-985TS

Besides HMI module, CPU module and MON module, RCS-985TS comprises the following 5
plug-in module, the arrangement of modules has been showed in the following table.

Table 6.1-1 Plug-in modules configuration of RCS-985TS

No. Module Description


1 AI Module
AC current and voltage input modules
2 AI Modules
3 PWR Module DC power supply, binary input and communication module.
4 BO Module
Module of output contacts.
5 BO Module

6.2 Hardware Configuration

6.2.1 Basic Enclosure

The basic enclosure for the RCS-985TS is an electronic equipment rack with an adequate number
of slots for the No.1 AC module, No.2 AC module, No.3 PWR module, No.4 BO module and No.5
BO module. The basic rack is equipped with a back plane (mother board), and the CPU module
equipped with the basic rack. Moreover, MON module is equipped with CPU module. The back
plane provides some back plane lines for distributing signals within the enclosure.

There are 10 slots in the rack of RCS-985TS equipped with above mentioned five plug-in modules.

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Allocation of slots is shown in figure 5.4.

Figure 6.2-1 Allocation of the slots in the RCS-985TS (Rear view)

6.2.2 CPU Module


The CPU module is the kernel part of this equipment, and contains a powerful microchip processor
and some necessary electronic elements. This powerful processor performs all of the functions for
the relay: the protection functions, the communication management functions. There are several
A/D conversion circuits on this module, which are used to convert the AC analog signals to
corresponding DC signals for fulfilling the demand of the electrical level standard. A high-accuracy
clock chip is contained in this module, it provide accurate current time for the RCS-985TS.

The functional details of the CPU module are listed below:

 Protection calculations

The CPU module can calculate protective elements (such as differential protection,
overcurrent element, zero sequence overcurrent etc.) based on the analog inputs form the AI
module and binary inputs from the PWR module, and then judges that whether the device
need to trip.

 Communication management

The CPU module can effectively manage the communication procedure, and reliably send out
some useful information through its various communication interfaces. Two serial interfaces
for SAS or RTU, up to three Ethernet interfaces for SAS or RTU and one serial interface for
the printer are contained in this module. A 20-pin interface for the connection with the HMI
module is contained in this module too. If an event is occurred (such as SOE, protective
tripping event etc.), this module will send out the relevant event information through these
interfaces, and make it be easily observed by the user.

 Auxiliary calculations

Basing on the analog inputs, the CPU module also can calculate out the measurement values,
such as active power, reactive power and power factor etc. All these values can be sent to a
SAS or a RTU through the communication interfaces.

 Clock Synchronization

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This module has a local clock chip and an interface to receive clock synchronized signals
from external clock source. These signals include PPS (pulse per second) signal and IRIG-B
signal. Basing on the timing message (from SAS or RTU) and the PPS signal, or basing on
the IRIG-B signal, this module can make the local clock synchronize with the standard clock.

There are some jumpers on this module for various purposes. The jumpers JP1 (“ARM-JTAG”) is
used to connect with an ARM simulator, and the jumper J6 (“DSP-JTAG”) is used to connect with a
DSP simulator. The jumper J5 (“CPLD”) is used to program the CPLD chip on this module. The
jumper JP8 (“CONSOLE”) is used to debug the ARM program of this module.

All above jumpers are reserved for the manufacturer to develop and debug the relevant programs
of this module; the user needn’
t use anyone of them.

NOTE: In a regular application, anyone of the above jumpers must be kept the state that

has been set by the manufacturer. Any change of the configuration of the above jumpers
is not permitted.

The jumper JP2 and JP3 are used to download the relevant programs of the CPU module. When
the jumper JP2 is connected, writing the DSP program to the corresponding flash memory is
permitted. When the jumper JP3 is connected, downloading the ARM program to the CPU module
is permitted.

NOTE: In a regular application, the jumper JP2 and JP3 are unconnected. The two

jumpers are only reserved for the manufacturer to refresh the programs of the CPU
module.

6.2.3 MON Module

The MON module is an important part of this equipment, and contains a powerful microchip
processor and some necessary electronic elements. There are a set of fault detectors on MON
module, which function is to supervise the tripping outputs.

6.2.4 HMI Module

The HIM module is installed on the front panel of RCS -985TS (see Figure 6.2-2). It is used to
observe the running status and event information on the LCD, and configure the protection
settings and device operation mode. A 160×80-dot matrix backlight LCD, a 9-key keypad, Three
LED indicators are contained in this module. All these can help the user to know the status of the
equipment and detailed event information easily, and provide convenient and friendly access
interface for the user. For further details, see Chapter 6 “Human-machine Interface”.

The elements and their functions of the HMI module are listed as follow.

 A 160×80-dot matrix backlight LCD

This LCD is used for monitoring status, fault diagnostics and setting, etc.

 Three LED indicators

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These LED indicators are used to denote the status of this protective system.

 A 9-key keypad

The keypad is used for full access to the device.

Figure 6.2-2 Human-machine interface module of RCS-985TS

Indication No. Description


1 LOG, device type and name
2 LCD
3 LED indicators
4 Keypad
5 Manufactory name

6.2.5 AI Modules

The AI modules are analog input units. No.1 AI module contains 11 current transformers and 1
voltage transformers or 12 current transformers. No.2 AI module contains 8 voltage transformers

They can transform these AC input values to relevant micro AC voltage signals, which are suited
to the analog inputs of the CPU and MON module. It also can be thought as a bridge between the
two modules and the external analog signals that come into the relay. The transformers are used
both to step-down the currents and voltages to levels appropriate to the relay’
s electronic circuitry
and to provide effective isolation between the relay and the power system. A low pass filter circuit
is connected to each transformer (CT and VT) secondary circuit for reducing the noise of each
analog AC input signal.

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NOTE: The rated value of the input current transformer is optional: 1A or 5A. The rated

value of the CT must be definitely declared in the technical scheme and the contract.

NOTE: Because the rated value of the input current transformer is optional, it is

necessary to check that whether the rated values of the current transformer inputs are
accordant to the demand of the practical engineering before putting the device into
operation.

6.2.5.1 No.1 AI Module

Isolator transformer
Ia_ S1 101
102
Ian_ S1
Ib_S1 103
To LPF
Ibn_S1 104

Ic_S1 105
Icn_S1 106
101 102

Ia_S2 107
103 104 108
Ian_ S2
Ib_ S2 109
To LPF
105 106 Ibn _S2 110

Ic_S2 111
Icn_S2 112
107 108

Ia_ S3 113
109 110
114
Ian_ S3
Ib _S3 115
111 112 To LPF
Ibn _S3 116

Ic_S3 117
113 114
Icn_S3 118

I0_ S1 119
120
I0n_ S1
To LPF
I0 _S2
121
I0n _S2 122

U 0_Gap 123
To LPF
U0n _Gap 124

AI

Figure 6.2-3 Rear view and connector definition of the No.1 AI module

DANGER: Never allow the current transformer (CT) secondary circuit connected to this

equipment to be opened while the primary system is live. Opening the CT circuit will
produce a dangerously high voltage. If this safety precaution is disregarded, personal
dearth, severe personal injury or considerable equipment damage will occur.

Pin No. Sign Description

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Pin No. Sign Description


101 Ia_S1
phase A current input of side 1
102 Ian_S1
103 Ib_S1
phase B current input of side 1
104 Ibn_S1
105 Ic_S1
phase C current input of side 1
106 Icn_S1
107 Ia_S2
phase A current input of side 2
108 Ian_S2
109 Ib_S2
phase B current input of side 2
110 Ibn_S2
111 Ic_S2
phase C current input of side 2
112 Icn_S2
113 Ia_S3
phase A current input of side 3
114 Ian_S3
115 Ib_S3
phase B current input of side 3
116 Ibn_S3
117 Ic_S3
phase C current input of side 3
118 Icn_S3
119 I0_S1
zero sequence current input of zero-sequence CT of side 1
120 I0n_S1
121 I0_S2
zero sequence current input of zero-sequence CT of isde 2
122 I0n_S2
123 U0_Gap zero sequence voltage input of broken -delta winding of VT of side 1 used
124 U0n_Gap for gap zero-sequence overvoltage protection.

NOTE: Terminals 123/124 are alternative to be as the input terminals of zero sequence

voltage for gap earth fault protection, or as input terminals of zero sequence current from
the zero-sequence CT 3 for the earth fault protection of side 3. Please refer to section
6.3.2 for the details.

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6.2.5.2 No.2 AI Module

Isolator transformer
Ua_S1 201
202
Uan_S1
Ub_S 1
201 202 203
To LPF
Ubn_ S1 204

Uc_ S1 205
203 204
206
Ucn_S1

205 206
Ua_S2
209

207 208 To LPF


Ub_S2
210
Uc_ S2 211
109 210

211 212 Ua_S3


215

Ub_S3 To LPF
213 214 216
Uc_ S3 217

U0 _Delt 221
To LPF
222
U 0n_ Delt

AI

Figure 6.2-4 Rear view and connector definitionof the No.2 AI module

Pin No. Sign Description


201 Ua_S1
phase A voltage input of side 1
202 Uan_S1
203 Ub_S1
phase B voltage input of side 1
204 Ubn_S1
205 Uc_S1
phase C voltage input of side 1
206 Ucn_S1
207 Not used
208 Not used
209 Ua_S2
210 Ub_S2 Phase-to-phase voltage input of side 2
211 Uc_S2
212 Not used

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Pin No. Sign Description


213 Not used
214 Not used
215 Ua_S3
216 Ub_S3 Phase-to-phase voltage input of side3
217 Uc_S3
218 Not used
219 Not used
220 Not used
221 U0_Delt Zero sequence voltage input of broken-delta winding of VT of side 2 or
222 U0n_Delt side 3 used for zero-sequence overvoltage alarm element.

223 Not used


224 Not used

6.2.6 No.3 PWR Module

The power supply module is a DC/DC converter with electrical insulation between input and output,
and an output power of 30W. The power supply module has an input voltage range of 88 V DC to
288 V DC without any switching of ranges. The standardized output voltages are +3.3V, +5V, ±12V
and +24V DC. The tolerances of the output voltages are continuously monitored.

The +3.3V DC output provides power supply for the microchip processo rs, and the +5V DC output
provides power supply for all the electrical elements that need +5V DC power supply in the
RCS-985TS. The ±12V DC output provides power supply for A/D conversion circuits in this device,
and the +24V DC output provides power supply for the static relays on the operation circuits (BO
module).

The input of the power supply module is protected by a 3.15A / 250 V slow fuse. The current surge
when energizing the power supply module is limited to 3.15A. The use of an external miniature
circuit breaker is recommended. The circuit breaker must be in the on position when the device is
in operation and in the off position when the device is in cold reserve.

Twenty regular optical insulation binary inputs and five special optical insulation binary inputs are
contained in this module. The regular optical insulation binary inputs are used to monitor the
position of the regular binary signals; the special optical insulation binary inputs are used to
monitor the position of the special binary signals, which must be taken into account in the
protection calculations and communication management of the CPU module.

A built-in extension interfaces module of the CPU module is equipped on the PWR module. Two
EIA RS-485 standardized ports and three Ethernet ports are contained in the built-in module.

The Ethernet ports are optional: optical or electrical. For more information about the Ethernet ports,
please refer to section 2.1.5.

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NOTE: In a built-in module with three Ethernet ports, the transmission rate of the third

Ethernet port is 10Mbit/s, and the transmission rate of the other two Ethernet ports are
100M/bit. In a built-in module with two Ethernet ports, the transmission rate of the two
Ethernet ports are 100M/bit.

There are two connectors on the front of the PWR module: a 12-pin connector and a 30-pin
connector. The terminal definition of the two connectors is described below.

GND 401

402

Pwr + 403
Power Input
Pwr - 404

Opto- Ethernet port A


405

EBI_Diff 406

EBI_PPF _S 1 407 Ethernet port B


401
402 EBI_PPF _S 2 408
403
404 EBI_PPF _S 3 409
405
406 EBI_EF _S1 410
407
EBI_EF_S2 411
408
409
EBI_EF _S3 412
410
411 EBI_EF _Gap 413
412
413 EBI_Resv1 414 RS-485 A 301
414

COM1
415 BI_SOTF_S2 415 RS-485 B 302
416
BI_SOTF_S3 416 SHLD 303
417
418 RS-485 A 304
301 EBI_Resv2 417
419 C OM2
302
420 418 RS-485 B 305
303 EBI_Resv2
421
304 419 SHLD
422 BI_Out_VT1 306
305
423
306
sy nc hronization

424 BI_Out_VT2 420 RS-485 A 307


307
425
cloc k

308 BI_Out_VT3 421 RS-485 B 308


426
309
427
310 BI _BlkComm 422 SHLD 309
428
429 311
BI_RstTarg 423 Printer Rx 310
312
430
printer

EBI_REF_S1 424 Printer Tx 311

EBI_REF_S2 425 SGND 312

EBI_REF_S3 426

BI_Resv1 427
PWR
BI_Resv2 428

BI_Resv3 429

BI_Resv4 430

Figure 6.2-5 Rear View and connector definitions of the No.3 PWR module

Pin connections on the 12-pin connector of the PWR module:

Pin No. Sign Description


301 COM1 A No.1 serial port: EIA RS-485 standardized communication
302 B interface for connecting with a SAS or a RTU.

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303 SHLD
304 A
No.2 serial port: EIA RS-485 standardized communication
305 COM2 B
interface for connecting with a SAS or a RTU.
306 SHLD
307 SYN+
CLK EIA RS-485 standardized interface for clock synchronization,
308 SYN-
SYN PPS and IRIG-B signals are permitted.
309 SHLD
310 RXD
Interface for connecting with a printer, the EPSON ® LQ-300K
311 PRT TXD
printer is recommended.
312 SGND

Pin connections on the 30-pin connector of the PWR module:

Pin No. Sign Description


401 GND Ground connection
402 Not used
403 Pwr+ DC power supply positive input
404 Pwr- DC power supply negative input
405 Opto- Common negative connection of the all binary inputs
406 EBI_Diff Binary input of enabling current differential protection
Binary input of enabling phase-to-phase backup protection of side
407 EBI_PPF_S1
1
Binary input of enabling phase-to-phase backup protection of side
408 EBI_PPF_S2
2
Binary input of enabling phase-to-phase backup protection of side
409 EBI_PPF_S3
3
410 EBI_EF_S1 Binary input of enabling earth fault protection of side 1
411 EBI_EF_S2 Binary input of enabling earth fault protection of side 2
412 EBI_EF_S3 Binary input of enabling earth fault protection of side 3
413 EBI_EF_Gap Binary input of enabling gap earth fault protection
414 EBI_Resv1 Reserved binary input 1 of enabling some function
Binary input of accelerating trip when switching onto a fault of
415 BI_SOTF_S2
side 2
Binary input of accelerating trip when switching onto a fault of
416 BI_SOTF_S3
side 3
417 EBI_Resv2 Reserved binary input 2 of enabling some function
418 EBI_Resv3 Reserved binary input 3 of enabling some function
419 BI_Out_VT1 Binary input of VT1 out of service for maintenance
420 BI_Out_VT2 Binary input of VT2 out of service for maintenance

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Pin No. Sign Description


421 BI_Out_VT3 Binary input of VT3 out of service for maintenance
422 BI_BlkComm Binary input of blocking rear communication to SAS or RTU
423 BI_RstTarg Binary input of signal resetting
Binary input of enabling zero-sequence differential protection of
424 EBI_REF_S1
side 1
Binary input of enabling zero-sequence differential protection of
425 EBI_REF_S2
side 2
Binary input of enabling zero-sequence differential protection of
426 EBI_REF_S3
side 3
427 BI_Resv1 Reserved binary input 1
428 BI_Resv2 Reserved binary input 2
429 BI_Resv3 Reserved binary input 3
430 BI_Resv4 Reserved binary input 4

6.2.7 BO Modules

The BO modules consist of some necessary contact outputs, such as trip-outputs, signal outputs
etc. They can receive tripping commands from the CPU module, and then act according to these
commands. These modules also can send out some necessary binary output signals (dry contact)
to the SAS or RTU according to the relevant commands from the CPU module.

A 30-pin connector is fixed on the front of the No. 4 BO (or No.5 BO) module. The terminal
definition of the connector is described below.

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6.2.7.1 No.4 BO Module

501 Common

502 BO_Fail

503 BO_Alm_Abnor

504 BO_Diff
(latched)

505 BO_BakProt
(latched)

506 BO_REF

507
501 BO_TrpOutp_1-1
502 508

503
509
504
505 BO_TrpOutp_1-2
510
506
507 511
508 BO _TrpOutp_2-1
509 512
510
511 513
512 BO_TrpOutp_2-2
513 514

514
515
515
BO_TrpOutp_3-1
516
516
517
518 517
519 BO _TrpOutp_3-2
520 518
521
519
522
523 BO_TrpOutp_4-1
520
524
525
521
526
BO_TrpOutp_4-2
527 522
528
529 523
530 BO_CCE
524

525
BO_Alm _BlkOTLC
_OvLD
526

527
BO_Alm_InitCool
BO _OvLd
528

OUT
529
BO_Alm_ROV
530

Figure 6.2-6 Rear view and connector definition of the No.4 BO module

Pin No. Sign Description


Binary outputs of annunciation signals
501 Common Common terminal of annunciation signal
Normally open (NO) contact, indicating unhealthy state
501-502 BO_Fail
of relay.
501-503 BO_Alm_Abnor NO contact, indicating any abnormal state of equipment.
Magnetic latched NO contact, indicating the operation of
501-504 BO_Diff current differential protection or zero sequence
differential protection of some side.
Magnetic latched NO contact, indicating the operation of
501-505 BO_BakProt
any kind of backup protection.

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Pin No. Sign Description


NO binary output, indicating the operation of overload
501-506 BO_Alm_OvLd
alarm element.
Tripping output contacts
507-508 BO_TrpOutp_1-1 NO contact 1 of the 1st group of tripping output relays.
509-510 BO_TrpOutp_1-2 NO contact 2 of the 1st group of tripping output relays.
511-512 BO_TrpOutp_2-1 NO contact 1 of the 2nd group of tripping output relays.
513-514 BO_TrpOutp_2-2 NO contact 2 of the 2nd group of tripping output relays.
515-516 BO_TrpOutp_3-1 NO contact 1 of the 3rd group of tripping output relays.
517-518 BO_TrpOutp_3-2 NO contact 2 of the 3rd group of tripping output relays.
519-520 BO_TrpOutp_4-1 NO contact 1 of the 4th group of tripping output relays.
521-522 BO_TrpOutp_4-2 NO contact 2 of the 4th group of tripping output relays.
Abnormality output contacts
NO contact, indicating operation of current control
523-524 BO_CCE
element.
NO contact, indicating operation of overload element for
525-526 BO_Alm_InitCool_OvLd
initiating cooling system.
NO contact, indicating operation of overload element for
527-528 BO_AlmBlkOLTC_OvLd
blocking on-load tap changing.
NO contact, indicating operation of zero-sequence
529-530 BO_Alm_ROV
overvoltage element.

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6.2.7.2 No.5 BO Module

601 Common

602 BO_Fail

603 BO_Alm_Abnor

604 BO_Diff

605 BO_BakProt

606 BO_Alm_OvLd

607
601
BO_TrpOutp_5-1
602 608
603
604 609
605
BO_TrpOutp_5-2
606 610

607
611
608
609 BO _TrpOutp_6-1
612
510
611 613
612
BO_TrpOutp_6-2
613 614
614
615 615
616 BO_TrpOutp_7-1
617 616

618
617
619
620 BO _TrpOutp_7-2
618
621
622 619
623 BO_TrpOutp_8-1
624 620

625
621
626
627 BO_TrpOutp_8-2
622
628
629 623
630
624 BO_TrpOutp_9

625
BO_TrpOutp_10
626

627
BO BO_TrpOutp_11
628

OUT
629
BO_TrpOutp_12
630

Figure 6.2-7 Rear view and connector definition of the No.2 BO module

Pin No. Sign Description


Binary outputs of remote signals
601 Common Common terminal of remote signals
Normally open (NO) contact, indicating unhealthy state of
601-602 BO_Fail
relay.
601-603 BO_Alm_Abnor NO contact, indicating any abnormal state of equipment.
NO contact, indicating the operation of current differential
601-604 BO_Diff protection or zero sequence differential protection of some
side.
NO contact, indicating the operation of any kind of backup
601-605 BO_BakProt
protection.

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Chapter 6 Hardware Description

Pin No. Sign Description


NO binary output, indicating the operation of overload alarm
601-606 BO_Alm_OvLd
element.
Tripping output contacts
607-608 BO_TrpOutp_5-1 NO contact 1 of the 5th group of tripping output relays.
609-610 BO_TrpOutp_5-2 NO contact 2 of the 5th group of tripping output relays.
611-612 BO_TrpOutp_6-1 NO contact 1 of the 6th group of tripping output relays.
613-614 BO_TrpOutp_6-2 NO contact 2 of the 6th group of tripping output relays.
615-616 BO_TrpOutp_7-1 NO contact 1 of the 7th group of tripping output relays.
617-618 BO_TrpOutp_7-2 NO contact 2 of the 7th group of tripping output relays.
619-620 BO_TrpOutp_8-1 NO contact 1 of the 8th group of tripping output relays.
621-622 BO_TrpOutp_8-2 NO contact 2 of the 8th group of tripping output relays.
623-624 BO_TrpOutp_9 NO contact of the 9th group of tripping output relays.
625-626 BO_TrpOutp_10 NO contact of the 10th group of tripping output relays.
627-628 BO_TrpOutp_11 NO contact of the 11th group of tripping output relays.
629-630 BO_TrpOutp_12 NO contact of the 12th group of tripping output relays.

6.3 Tripping Matrix and Sampling channel

6.3.1 Tripping Matrix Definition


There are 12 groups of tripping output relays and 20 tripping output contacts totally in RCS-985TS.
Those contacts are all instantaneous contacts. These tripping relays are controlled by tripping
matrix, and every protection element has its independent tripping matrix which can be configured
though corresponding logic setting to provide flexible tripping mode for the protection.

Logic setting of tripping matrix consists of sixteen binary digits but four hexadecimal digits can be
viewed through device LCD screen. Every bit represents a group of tripping relays. When a
protection element operates, the relay group will output if the corresponding bit is set as “1”and
will not output if the bit is set as “0”. Corresponding bit, relay group name and number of contacts
of s of tripping matrix are as follows.

Bit Output relay group name Number of contacts


0 this function enabled
1 TrpOutp1, the 1st group of tripping output relays 2
2 TrpOutp2, the 2nd group of tripping output relays 2
3 TrpOutp3, the 3rd group of tripping output relays 2
4 TrpOutp4, the 4th group of tripping output relays 2
5 TrpOutp5, the 54th group of tripping output relays 2
6 TrpOutp6, the 6th group of tripping output relays 2
7 TrpOutp7, the 7th group of tripping output relays 2

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Bit Output relay group name Number of contacts


8 TrpOutp8, the 8th group of tripping output relays 2
9 TrpOutp9, the 9th group of tripping output relays 1
10 TrpOutp10, the 10th group of tripping output relays 1
11 TrpOutp11, the 11th group of tripping output relays 1
12 TrpOutp12, the 12th group of tripping output relays 1
13 No definition
14 No definition
15 No definition

6.3.2 Alternative Selection between Two Kinds of Channel

Some voltage and current input channels share the same position of isolating transformer on AI
module. Therefore, only one group channel can be used in this case.

(1) 123/124 as zero sequence voltage channel, which is derived from open-delta of VT and used
for gap zero-sequence overvoltage protection

(2) 123/124 as zero sequence current channel, which is derived from zero sequence CT 3 and
used for zero-sequence overcurrent protection of side 3.

NOTE: Only one kind channel can be used simultaneously, so the selection of above

channels must be confirmed before placing an order.

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Chapter 7 Settings
The settings are used to determine the characteristic of each protective element and operation
mode of the relay. It is necessary to configure the settings of this relay according to engineering
demands before putting this relay into service. If the settings aren’
t configured correctly, the relay
maybe work abnormally (such as communication interrupted, printing out unexpected codes etc.),
even sometimes much more serious accident will occur (such as unwanted operation, missing
operation).

The user can configure these settings or parameters manually. Remote modification is also
supported

The RCS-985TS has four setting groups for protection to coordinate with the mode of power
system operation, one of which is assigned to be active. However, system parameters and
equipment setup parameters are common for all setting groups.

Configuring principles for protection settings are different when the equipment is used to protect
main transformer, step-down transformer or start-up/standby transformer. That means common
configuring principle for system parameters and equipment setup parameters, but different for
protection settings.

NOTE: If a CPU or MON module is replaced, it is necessary to configure all the settings

again according to the configuration of the CPU module which is replaced.

NOTE: If an AI module is replaced, it is necessary to configure the setting “MAN CALBR”

according to the parameter label pasted on the new AI module.

. NOTE: All current settings in this chapter are secondary current converted from primary

current by reference CT ratio. Zero sequence current or voltage setting is configured


according to 3I0 or 3U0 and negative sequence current setting according to I2 or U2.

7.1 Equipment Setup Settings

This submenu is mainly used to set the parameters for communication, printing and etc. In
addition, password is set here too.

7.1.1 Setting List

Table 7.1-1 Equipment setup settings list

No. Symbol Range Step Remark


1 Password 000~999 1
2 Comm_Addr 0~65535 1

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No. Symbol Range Step Remark


3 IP1_Byte_3 0~254 1
4 IP1_Byte_2 0~254 1
5 IP2_Byte_3 0~254 1
6 IP2_Byte_2 0~254 1
7 IP3_Byte_3 0~254 1
8 IP3_Byte_2 0~254 1
9 Mask_Byte_3 0~255 1
10 Mask_Byte_2 0~255 1
11 Mask_Byte_1 0~255 1
12 Mask_Byte_0 0~255 1
0: No definition
13 NET_Protocol 0/1 1
1: IEC60870-5-103
14 COM1_Protocol 0/1/2 1 0: No definition
1: IEC60870-5-103
15 COM2_Protocol 0/1/2 1
2: Modbus
16 COM1_Baud 0~3 1 0: 4800 bps
17 COM2_Baud 0~3 1 1: 9600 bps
2: 19200 bps
18 Printer_Baud 0~3 1 3: 38400 bps

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.1.2 Explanation of the Parameters and Notice for Setting

1. No.1— [Password]

It is used to prevent un-authorized modification of the parameters or other password-protective


operation. The default password is 01.

2. No.2— [Comm_Addr]

Communication address of the equipment. It must be unique within a communication group in a


substation. If the communication is realized by IP address, the communication address means
algorism representation of the last two numbers of the IP address. For example, if the IP address
is 198.120.1.12, then the communication address is 1*256+12=268.

3. No.3— [IP1_Byte_3]

Byte 3 of the IP1. Refer to the picture in the remark column of it.

4. No.4— [IP1_Byte_2]

Byte 2 of the IP1. Refer to the picture in the remark column of it.

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5. No.5— [IP2_Byte_3]

Byte 3 of the IP2. Refer to the picture in the remark column of it.

6. No.6— [IP2_Byte_2]

Byte 2 of the IP2. Refer to the picture in the remark column of it.

7. No.7— [IP3_Byte_3]

Byte 3 of the IP3. Refer to the picture in the remark column of it.

8. No.8— [IP3_Byte_2]

Byte 2 of the IP3. Refer to the picture in the remark column of it.

9. No.9— [Mask_Byte_3]

Byte 3 of the subnet mask. Refer to the picture in the remark column of it.

10. No.10— [Mask_Byte_2]

Byte 2 of the subnet mask. Refer to the picture in the remark column of it.

11. No.11— [Mask_Byte_1]

Byte 1 of the subnet mask. Refer to the picture in the remark column of it.

12. No.12— [Mask_Byte_0]

Byte 0 of the subnet mask. Refer to the picture in the remark column of it.

13. No.13— [NET_Protocol]

Logic setting used to select protocol for network communication.

14. No.14— [COM1_Protocol]

Logic setting used to select protocol for rear RS485 port 1.

15. No.15— [COM2_Protocol]

Logic setting used to select protocol for rear RS485 port 2.

16. No.16— [COM1_Baud]

Logic setting used to select baud rate of rear RS485 port 1 for communication.

17. No.17— [COM2_Baud]

Logic setting used to select baud rate of rear RS485 port 2 for communication.

18. No.18— [Printer_Baud]

Logic setting used to select baud rate of printer port.

7.1.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

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Chapter 7 Settings

MENU -> SETTINGS -> EQUIP SETUP

7.2 System Settings

System settings are mainly used for configuring parameters of transformer, such as capacity,
voltage level, ratio of CT, connection mode, etc.

The purpose of Inputting primary voltage level and current ratio of every side of transformer is to
calculate the secondary rated current and to adjust phase angle of secondary current
automatically.

7.2.1 Setting List

Table 7.2-1 System settings list

No. Symbol Range Step Remark


1 Active_Grp 0~3 1
2 Sn 0~300.00MW 0.1MW
3 U1n_S1 0~300.00kV 0.01kV
4 U1n_S2 0~300.00kV 0.01kV
5 U1n_S3 0~300.00kV 0.01kV
6 I1n_CT_S1 0~30000.0A 0.1A
7 I2n_CT_S1 1/5A
8 I1n_CT_S2 0~30000.0A 0.1A
9 I2n_CT_S2 1/5A
10 I1n_CT_S3 0~30000.0A 0.1A
11 I2n_CT_S3 1/5A
12 I1n_CT1_ROC 0~30000.0A 0.1A
13 I2n_CT1_ROC 1/5A
14 I1n_CT2_ROC 0~30000.0A 0.1A
15 I2n_CT2_ROC 1/5A
16 I1n_CT3_ROC 0~30000.0A 0.1A
17 I2n_CT3_ROC 1/5A
0:Y/Y/Y-12
1:Y/D/D-11
2:Y/D/D-1
3:D/Y/Y-11
18 Cfg_ConnGrp 0/1/2/3/4/5/6/7 1
4:Y/Y/D-11
5:D/D/Y-11
6:D/Y/Y-1
7:D/D/D-12

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No. Symbol Range Step Remark


0: No definition
1:CT1
19 Cfg_CT_OvLd 0/1/2/3 1
2:CT2
3:CT3
20 En_InstDrop_Trp5 0/1 1
21 En_CT3_ROC 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.2.2 Explanation of the Parameters and Notice for Setting

1 No.1— [Active_Grp]

Active setting group. There are four setting groups and can be configured separately according to
different operation mode of transformer.

2 No.2— [Sn]

Rated capacity of transformer. It should be configured as its name plate marked.

Capacity of transformer, primary voltage of each side, CT ratio and logic setting of connection
group are used to calculate rated secondary current and correction coefficient of each side of
transformer.

3 No.3— [U1n_S1]

Rated primary voltage of side 1. It should be configured as its actual value (i.e. its tap changer in
normal position).

4 No.4— [U1n_S2]

Rated primary voltage of side 2. It should be configured as its actual value (i.e. its tap changer in
normal position).

5 No.5— [U1n_S3]

Rated primary voltage of side 3. It should be configured as its actual value (i.e. its tap changer in
normal position).

6 No.6— [I1n_CT_S1]

Rated primary current of side 1. It should be configured as its actual value.

For example, if current ratio of CT is 600/5, it shall be configured as rated primary current 600 A,
rated secondary current 5 A.

7 No.7— [I2n_CT_S1]

Rated secondary current of side 1. It should be configured as its actual value.

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Chapter 7 Settings

For example, if current ratio of CT is 600/5, it shall be configured as rated primary current 600 A,
rated secondary current 5 A.

8 No.8— [I1n_CT_S2]

Rated primary current of side 2. It should be configured as its actual value.

9 No.9— [I2n_CT_S2]

Rated secondary current of side 2. It should be configured as its actual value.

10 No.10— [I1n_CT_S3]

Rated primary current of side 3. It should be configured as its actual value.

11 No.11— [I2n_CT_S3]

Rated secondary current of side 3. It should be configured as its actual value.

12 No.12— [I1n_CT1_ROC]

Rated primary current of zero-sequence CT of side 1. It should be configured as its actual value.

13 No.13— [I2n_CT1_ROC]

Secondary current of zero-sequence CT of side 1. It should be configured as its actual value.

14 No.14— [I1n_CT2_ROC]

Rated primary current of zero-sequence CT of side 2. It should be configured as its actual value.

15 No.15— [I2n_CT2_ROC]

Secondary current of zero-sequence CT 2 of side 2. It should be configured as its actual value.

16 No.16— [I1n_CT3_ROC]

Rated primary current of zero-sequence CT of side 3. It should be configured as its actual value.

17 No.17— [I2n_CT3_ROC]

Secondary current of zero-sequence CT of side 3. It should be configured as its actual value.

18 No.18— [Cfg_ConnGrp]

This is the logic setting used to select connection group of transformer for calculation inner the
equipment. There are eight kinds of connection group for selection.

For example, If this logic setting is set as”1”, it means the connection group of transformer is
Y/D/D-11, and if set as “0”, it means the connection group is Y/Y/Y-12. Connection group shows in turn
the connection on side 1/ side 2/ side 3. Connection group of transformer is determined by actual
connections on its three sides.

19 No.19— [Cfg_CT_OvLd]

This is the logic setting used to select zero-sequence CT for overload protection. That means
which side is equipped with overload protection.

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“0”: no definition

“1”: CT1, means side 1 is equipped with overload protection

“2”: CT2, means side 2 is equipped with overload protection

“3”: CT3, means side 3 is equipped with overload protection

20 No.20— [En_InstDrop_Trp5]

This is the logic setting used to enable the “Trpoutp 5”relays (i.e. the 5th group of tripping output
relays) to drop off instantly without any delay.

“0”: means “Trpoutp 5”relays drop off with 120ms time delay.

“1”: means “Trpoutp 5”relays drop off instantly without any delay.

21 No.11— [En_CT3_ROC]

This is the logic setting used to select that terminal 123/124 is defined as zero-sequence CT of
side 3 or zero-sequence VT with the differential hardwares of No.1 AI module respectively.

“1”: means terminal 123/124 is defined as zero-sequence CT of side 3.

“0”: means terminal 123/124 is defined as zero-sequence VT and No.14 setting is invalid.

NOTE: When modify this setting, section 6.3.2 must be referred.

7.2.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> SYS SETTINGS

7.3 Protection Element Configuration

This submenu is used to configure protection elements by following list logic settings. Only the
logical setting herein is set as “1”, corresponding function is enabled.

7.3.1 Setting List

Table 7.3-1 Protection configuration settings list

No. Symbol Range Remark


1 En_Diff 0/1 1:Enable 0:Disable
2 En_PPF_S1 0/1 1:Enable 0:Disable
3 En_PPF_S2 0/1 1:Enable 0:Disable
4 En_PPF_S3 0/1 1:Enable 0:Disable
5 En_EF_S1 0/1 1:Enable 0:Disable
6 En_EF_S2 0/1 1:Enable 0:Disable

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Chapter 7 Settings

No. Symbol Range Remark


7 En_EF_S3 0/1 1:Enable 0:Disable
8 En_EF_Gap 0/1 1:Enable 0:Disable
9 En_OvLd 0/1 1:Enable 0:Disable
10 En_REF_S1 0/1 1:Enable 0:Disable
11 En_REF_S2 0/1 1:Enable 0:Disable
12 En_REF_S3 0/1 1:Enable 0:Disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.3.2 Explanation of the Parameters and Notice for Setting

1 No.1— [En_Diff]

This is the logic setting used to enable all differential protections.

2 No.2— [En_PPF_S1]

This is the logic setting used to enable phase-to-phase fault protection of side 1.

3 No.3— [En_PPF_S2]

This is the logic setting used to enable phase-to-phase fault protection of side 2.

4 No.4— [En_PPF_S3]

This is the logic setting used to enable phase-to-phase fault protection of side 3.

5 No.5— [En_EF_S1]

This is the logic setting used to enable earth fault protection of side 1.

6 No.6— [En_EF_S2]

This is the logic setting used to enable earth fault protection of side 2.

7 No.7— [En_EF_S3]

This is the logic setting used to enable earth fault protection of side 3.

8 No.8— [En_EF_Gap]

This is the logic setting used to enable gap earth fault protection.

9 No.9— [En_OvLd]

This is the logic setting used to enable overload protection.

10 No.10— [En_REF_S1]

This is the logic setting used to enable zero-sequence differential protection of side 1.

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11 No.11— [En_REF_S2]

This is the logic setting used to enable zero-sequence differential protection of side 3.

12 No.12— [En_REF_S3]

This is the logic setting used to enable zero-sequence differential protection of side 3.

7.3.3 Setting Path


All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT CONFIG

7.4 Protection Settings

This protection equipment is applied for protection of differential kinds of transformer, including
main transformer, step-down transformer, and start-up/standby transformer protection. Here three
different setting principles are introduced below, and user can select the setting principle of your
actual application for the reference.

7.4.1 Used to Protect Main Transformer

When the equipment is used to protect main transformer, side 1 is called HV side and side 2 and 3
are called branch side. Therefore the configuring principles of side 2 and 3 are similar.

7.4.1.1 Differential Protection

In this part, configuration of settings of differential protection will be described in detail.

7.4.1.1.1 Setting List

Table 7.4-1 Differential protection settings list

No. Symbol Range Step Remark


1 I_Pkp_PcntDiff 0.10~1.50 Ie 0.01Ie
2 I_InstDiff 4~14 Ie 0.01Ie
3 Slope1_PcntDiff 0.05~0.15 0.01
4 Slope2_PcntDiff 0.50~0.80 0.01
5 k_2ndH_PcntDiff 0.10~0.35 0.01
6 I_Alm_Diff 0.10~1.00 Ie 0.01Ie
7 TrpLog_Diff 0000-1FFF
8 En_InstDiff 0/1 1 1:Enable 0:Disable
9 En_PcntDiff 0/1 1 1:Enable 0:Disable
10 En_CTSBlkDiff 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

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Chapter 7 Settings

displaying on LCD.

7.4.1.1.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_Pkp_PcntDiff]

This is a pickup setting of percentage current differential protection, which is also the setting of
fault detector of percent differential protection. It should be higher than maximum unbalanced
current of the transformer during normal rated load, i.e.
I cdqd K rel ( K er U m) I e
Where:
I cdqd represents the setting [I_Pkp_PcntDiff].
Ie is secondary calculated rated current of transformer (please see details in section );
Krel is reliability coefficient (generally K rel = 1.3 ~1.5);
Ker is the ratio error of CT (=0.03X2, for class 10P; =0.01X2, for class 5P and class TP);
U is the maximum deviation (in percentage of rated voltage) due to tap change;

m is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.

For practical engineering application, Icdqd =(0.3 ~0.5) I e is reasonable and unbalanced current

in differential scheme during maximum load of transformer shall be measured.

2 No.2— [I_InstDiff]

Setting of unrestrained instantaneous differential protection, which is used to clear serious internal

fault quickly and prevent operation delay caused by CT saturation. The setting I cdsd (ie.

[I_InstDiff ]) should be higher than inrush current and maximum unbalanced current due to external
fault or asynchronous closing, generally

I cdsd K I e
Where:
K is a multiple depending on capacity of transformer and the system reactance. 5~ 6 is
recommended for main transformer, 6~8 is recommended for startup/standby transformer and
plant transformer.
I e is secondary calculated rated current of transformer.

Sensitivity coefficient of unrestrained instantaneous differential protection K sen should be

calculated according to the phase-to-phase solid short circuit fault in normal operation condition at

installed point of the relay. K sen ≥ 1.2 is required.

3 No.3— [Slope1_PcntDiff]

Setting of the first slope of percent differential protection, it should be:

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Chapter 7 Settings

K bl1 K er
Where:

K er is the error of current ratio of CT, no more than 0.1. K bl 1 is 0.10-0.20 generally.

Calculation of secondary unbalanced current:

--- For two winding transformer

I unb. max ( K ap K cc K er U m) I k . max

Where:

Definition of K er , U and m have been mentioned above;

Kcc is the “same type coefficient”of CT, 1.0 is recommended.

I k. max is the periodic component (secondary value) of maximum through fault current of

external short circuit fault.

K ap is the coefficient of aperiodic component. K ap = 1.0 if CT at both sides are class TP, or

K ap = 1.5 ~ 2.0 if CT at both sides are class P.

--- For three winding transformer

Take external short circuit fault at LV side as example:

I unb .max K ap K cc K er I k .max U h I k.h .max mI I k .I .max mII I k. II .max
Where:
Definition of K er , K cc and K ap have been mentioned above;
U h is the relative error (to rated voltage Un) of HV side due to tap changing, it is
recommended to adopt the maximum value of deviations to the rated value (in
percentage of rated voltage).

I k .max is the periodic component (secondary value) of maximum short current flowing through

CT close to the fault point when external fault occurred at the LV side.

I k.h . max is the periodic component (secondary value) of current flowing through CT of voltage
changeable side when calculating fault current of external fault at LV side.

I k .I . max and I k .II .max are the periodic components of secondary currents flowing through CT at

other sides during external fault at LV side;

mI and mII are errors caused by difference between ratios of CT (auxiliary CT included if any)

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Chapter 7 Settings

at relevant sides.

Sensitivity check for percent differential protection

The sensitivity coefficient K sen should be calculated according to phase-to-phase short circuit on

outlet of transformer protected by the differential relay in minimum operation mode. From the

calculated minimum short circuit current I k .min and relevant restraint current I res , corresponding

pickup current I op will be found in the operation characteristic curve of percent differential relay,

and then the sensitivity coefficient is:

K sen I k. min / I op

K sen ≥ 2 is required.

4 No.4— [Slope2_PcntDiff]

Second slope of percent differential protection is:


I unb. max* I cdqd * 3k bl1
kbl 2 
I k . max* 3

Where:

Definition of I unb . max* , I cdqd * and I k .max* are almost same to Iunb .max , I cdqd and

I k. max mentioned above, and the only difference is they are per unit values. I e (secondary

calculated rated current of transformer) is the base value of per unit.

k bl 2 =0.70 is recommended.

5 No.5— [k_2ndH_PcntDiff]

Restraint coefficient of second harmonic. This parameter is the blocking threshold of second
harmonic involving in differential current to against inrush current when the transformer is
energized. The differential protection will be blocked when the percentage of second harmonics
reaches the threshold because the percentage of second harmonics is high in inrush current but
low in fault current. In general, the parameter is set to be 15% ~20% and 15% is recommended.

6 No.6— [I_Alm_Diff]

Setting of differential current abnormality alarm. It should be higher than maximum differential
current due to tap changing of the transformer being not in the middle position or other possible
conditions during operation.

7 No.7— [TrpLog_Diff]

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Chapter 7 Settings

Tripping output logic setting of differential protection. Mentioned below are used to specify which
breaker or breakers will be tripped by the protection. This setting comprises following 13 binary
bits and is displayed by a hexadecimal number of 4 digi ts from 0000H to 1FFFH. The tripping
output logic setting of RCS-985TS is defined below.
Bits Function
0 Protection enabled
1 TrpOutp1
2 TrpOutp2
3 TrpOutp3
4 TrpOutp4
5 TrpOutp5
6 TrpOutp6
7 TrpOutp7
8 TrpOutp8
9 TrpOutp9
10 TrpOutp10
11 TrpOutp11
12 TrpOutp12
13-15 No definition
“TrpOutput 1”means to drive the 1st group of tripping output relays to operate.
Set bit “0”as 1 means this protection element will trip breaker or breakers. The bit corresponding
to the breaker to be tripped shall be set as“1”and other bits shall be “0”. For example, if
differential protection is defined to “Trpoutp 5”(the 5th group of tripping output relays), the “0”bit
and “5”bit shall be set as “1”and other bits “0”. Then a hexadecimal number 0021H is formed as
the tripping output logic setting.
Please note that tripping output logic settings of the equipment have to be set on basis of
application-specific drawings.

All the tripping logic settings mentioned below is defined as same as this one.

NOTE Tripping output logic settings have to be set on basis of application -specific

drawings and please refer to section 6.3.1 to configure those settings.

8 No.8— [En_InstDiff]

This is the logic setting used to enable unrestrained instantaneous differential protection.

9 No.9— [En_PcntDiff]

This is the logic setting used to enable percent differential protection.

10 No.10— [En_CTSBlkDiff]

This is the logic setting used to select operating characteristic of percent differential protection

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Chapter 7 Settings

when differential CT circuit failure.

“0”: means percent differential protection is not blocked when differential CT circuit failure.

“1”: means percent differential protection is blocked when differential CT circuit failure.

7.4.1.1.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> DIFF PROT

7.4.1.2 Restricted Earth Fault Protections

Restricted earth fault protection is also called zero-sequence differential protection. There are
three restricted earth fault protection elements of side 1, side 2 and side 3 and the each element is
independent to another side but with the same protection theory and scheme logic. Here take the
protection of side 1 as an example to give detailed settings explanation.

7.4.1.2.1 Setting list

Table 7.4-2 REF settings list of side 1

No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S1 0.10In-10.00In 0.01In
2 I_InstREF_S1 2In-20In 0.01In
3 Slope_PcntREFS1 0.3-0.7 0.01
4 TrpLog_REF_S1 0000 –1FFF 1
5 En_InstREF_S1 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S1 0/ 1 1: enable ; 0: disable

Table 7.4-3 REF settings list of side 2

No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S2 0.10In-10.00In 0.01In
2 I_InstREF_S1 2In-20In 0.01In
3 Slope_PcntREFS2 0.3-0.7 0.01
4 TrpLog_REF_S2 0000 –1FFF 1
5 En_InstREF_S2 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S2 0/ 1 1: enable ; 0: disable

Table 7.4-4 REF settings list of side 3

No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S3 0.10In-10.00In 0.01In
2 I_InstREF_S3 2In-20In 0.01In
3 Slope_PcntREFS3 0.3-0.7 0.01

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Chapter 7 Settings

No. Symbol Range Step Remark


4 TrpLog_REF_S3 0000 –1FFF 1
5 En_InstREF_S3 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S3 0/ 1 1: enable ; 0: disable

NOTE: Symbol of the parameters listed in above tables is used for communication,

printing and displaying on LCD.

7.4.1.2.2 Explanation of the parameters and notice for setting

NOTE: To configure the settings of zero-sequence percent differential protection, you can

follow the method provided in section 7.4.1.1 calculation of percent differential protection,
where U shall be taken as 0. Polarity of each CT for zero-sequence differential

protection at various sides is same as shown in Figure 1.1-1 ~ Figure 1.1-4. Positive
polarity of three-phase CT is at busbar side and that of zero-sequence CT is at neutral
point side.

1 No.1--[I_Pkp_PcntREF_S1]

This is pickup setting of zero-sequence percent differential element of restricted earth fault
protection, which is also the setting of fault detector of that element.

 Configuring principle of the setting

Calculation of this setting is based on rated secondary current of the transformer. If a setting got
from calculation is together with its unit Ampere, this setting shall be divided by rated secondary
current of this side of the CT, to get per unit value. The setting of zero - sequence differential
protection shall be greater than the maximum imbalanced current while transformer operates on
normal rated load, i.e.

I0 cdqd K rel (K er m)I n (Equation 7.4-1)

Where:

I0 cdqd represents setting [I_Pkp_PcntREF_S1].

In is rated secondary current of CT.

Krel is reliability coefficient (generally Krel = 1.3 - 1.5).

Ker is the ratio errors of CT (for type 10P, Ker = 0.03×2; for class 5P and class TP, Ker =0.01X2);

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Chapter 7 Settings

m is the error caused by the difference between ratios of CT at all sides, 0.05 is recommended.

For practical engineering calculation, I ocdqd =(0.3 - 0.5)I e is reasonable and unbalanced current

in differential scheme during maximum load of transformer shall be measured.

 Sensitivity check for zero sequence percent differential protection

Sensitivity of restricted earth fault protection shall be checked with the solid earth fault in its

protected zone and K sen ≥ 2 is required ( K sen is the sensitivity coefficient).

In solid earthed system, distribution of zero sequence current for single-phase-to-earth fault
depends on the configuration of zero sequence network of power system. Magnitude of the
single-phase-to-earth fault current depends on not only zero sequence impedance of system but
also the positive and negative sequence impedances. That means different operation modes of
power system also have influence on the current. When power system is in maintenance status,
in order to remain the zero sequence impedance of the system network unchanged and increase
sensitivity for earth fault protection, the 220 kV power system is generally compensated by
properly changing earth mode of the transformer. Therefore, sensitivity of zero sequence
differential protection shall be checked in minimum operation mode for 220 kV power system.

2 No.2--[I_InstREF_S1]

Setting of unrestrained instantaneous zero-sequence differential protection element of restricted


earth fault protection, this protection is used to clear serious single-phase-to-earth fault quickly
and prevent operation delay caused by CT saturation.

3 No.3--[Slope_PcntREF_S1]

Restraint coefficient of zero-sequence percent differential protection element of restricted earth


fault protection.

4 No.4--[TrpLog_REF_S1]

Tripping output logic setting of restricted earth fault protection which is used to specify which
breaker or breakers will be tripped by the protection.

5 No.5--[En_InstREF_S1]

Logic setting of enabling unrestrained instantaneous zero-sequence differential protection element


of restricted earth fault protection.

6 No.6--[En_PcntREF_S1]

Logic setting of enabling zero-sequence percent differential protection element of restricted earth
fault protection.

7.4.1.2.3 Setting path

Settings of restricted earth fault protection of side 1, side 2 and side 3 accessible in the following
path respectively:

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Chapter 7 Settings

Main Menu -> SETTING -> PROT SETTINGS -> S1 REF PROT
Main Menu -> SETTING -> PROT SETTINGS -> S2 REF PROT
Main Menu -> SETTING -> PROT SETTINGS -> S3 REF PROT

7.4.1.3 Phase-to-phase fault Protection of Side 1

7.4.1.3.1 Setting List

Table 7.4-5 settings list of phase-to-phase fault protection of side 1

No. Symbol Range Step Remark


1 V_NegOV_VCE_S1 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S1 10.00~100.00V 0.01V
3 I_OC1_S1 0.1~ 20In 0.01A
4 t_OC1_S1 0.00~10.00s 0.01s
5 I_OC2_S1 0.1~ 20In 0.01A
6 t_OC2_S1 0.00~10.00S 0.01s
7 I_OC3_S1 0.1~ 20In 0.01A
8 t_OC3_S1 0.00~10.00s 0.01s
9 TrpLog_OC1_S1 0000-1FFF
10 TrpLog_OC2_S1 0000-1FFF
11 TrpLog_OC3_S1 0000-1FFF
12 En_VCE_OC1_S1 0/1 1 1: enable ; 0: disable
13 En_VCE_OC2_S1 0/1 1 1: enable ; 0: disable
14 En_S1.VCE_OC_S1 0/1 1 1: enable ; 0: disable
15 En_S2.VCE_OC_S1 0/1 1 1: enable ; 0: disable
16 En_S3.VCE_OC_S1 0/1 1 1: enable ; 0: disable
17 Opt_VTS_OC_S1 0/1 1
18 En_Mem_Curr 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.1.3.2 Explanation of the Parameters and Notice for Setting

1 No.1— [V_NegOV_VCE_S1]

Setting of negative sequence voltage control element of side 1. Setting and displayed value of
negative sequence voltage are U2.

(1) Configuring principle

The setting should be higher than the unbalance voltage during transformer normal operation,
which is derived through practical metering.

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Chapter 7 Settings

U op.2 (0.06 0.08)U n

Where:

U op 2 is the setting [V_NegOV_VCE_S1].

U n is rated secondary phase voltage.

(2) Sensitivity check

U
K sen  k .2. min
U op.2

Where:

U op 2 is the setting [V_NegOV_VCE_S1].

U k.2 .min is minimum secondary negative sequence voltage at location of the protection equipment

during phase-to-phase short circuit fault on end of backup protected section.

K sen ≥2.0 is required for near backup protection and K sen ≥1.5 for remote backup protection.

NOTE:When sensitivity coefficient is checked for current element and voltage element,

unfavorable normal system operation condition and unfavorable type of short circuit fault
shall be adopted.

2 No.2— [Vpp_UV_VCE_S1]

Setting of low voltage control element of side 1.

(1) Configuring principle

i) When Voltage for undervoltage relay is taken from LV side (Logic setting [En_S2.VCE_OC_S1]
or [En_S3.VCE_OC_S1] is set as “1”), undervoltage setting should be higher than the lowest
voltage during starting process of largest motor connected with the LV busbar.

Umin
U op 
Krel 
Kr

Where:

U op 2 is the setting [Vpp_UV_VCE_S1].

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Chapter 7 Settings

Krel is reliability coefficient and 1.11.2 is recommended

Kr is return coefficient and 1.051.25 is recommended

U min is the possible lowest phase-to-phase voltage during transformer normal operation and
0.9Un (Un is rated secondary phase-to-phase voltage) is recommended.

ii) When voltage for undervoltage relay is taken from local side busbar (Logic setting
[En_S1.VCE_OC_S1] is set as “1”), following criterion is needed to be satisfied.

U op 0.7U n

Where: U n is rated secondary phase-to-phase voltage。

iii)When voltage for undervoltage relay is taken from VT of generator (Logic setting
[En_S2.VCE_OC_S1] or [En_S3.VCE_OC_S1] is set as “1”), the setting should be higher than
the possible lowest voltage during generator operating in loss excitation condition.

U op (0.5 0.6)U n

Where: U n is rated secondary phase-to-phase voltage.

(2)Sensitivity check

U
K sen  op
U c. max

Where:

U c max is the maximum secondary residual voltage at the location of the protection equipment,

when a phase-to-phase metallic short circuit fault occurs where sensitivey coefficient is checked.

K sen ≥1.5 is required for local backup protection and K sen ≥1.2 for remote backup protection.

NOTE:When sensitivity coefficient is checked for current element and voltage element,

unfavorable normal system operation condition and unfavorable type of short circuit fault
shall be adopted. If sensitivity coefficient of undervoltage element is not high enough,
function of composite voltage on LV side initiation can be enabled.

3 No.3— [I_OC1_S1]

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Chapter 7 Settings

Setting of stage 1 of overcurrent protection of side 1. Overcurrent protection is used to protect


transformer and phase-to-phase fault occurring on adjacent element, which operates to trip all
sides’breakers with time delay.

When the sensitivity of overcurrent protection is not high enough, voltage controlled overcurrent
protection is needed to adopt to improve the sensitivity. Inputs of voltage control element are
usually from voltage transformer of low voltage side of transformer.

(1) The setting shall be higher than rated current of transformer,

K
I op  rel I e
Kr

Where:

Krel is reliability coefficient, 1.2 generally;

Kr is return coefficient, 0.85 – 0.95;

I e is secondary rated current.

(2) Sensitivity check:

I ( 2)
K sen  k . min
I op

Where:

( 2)
I k .min is minimal fault current through location of the protection equipment during phase-to-phase
metallic short circuit on end of backup protected section.

K sen ≥ 1.3 is required for near backup protection and K sen ≥ 1.2 for remote backup protection.

NOTE :When sensitivity coefficient is checked for current element and voltage element,

unfavorable normal system operation condition and unfavorable type of short circuit fault
shall be adopted.

4 No.4— [t_OC1_S1]

Time delay of stage 1 of overcurrent protection of side 1.

5 No.5— [I_OC2_S1]

Setting of stage 2 of overcurrent protection of side 1. The configuring principle of the setting of
stage 2 is same to that of stage 1.

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Chapter 7 Settings

6 No.6— [t_OC2_S1]

Time delay of stage 2 of overcurrent protection of side 1.

7 No.7— [I_OC3_S1]

Setting of stage 3 of overcurrent protection of side 1. The configuring principle of the setting of
stage 2 is same to that of stage 1.

8 No.8— [t_OC3_S1]

Time delay of stage 3 of overcurrent protection of side 1.

9 No.9— [TrpLog_OC1_S1]

Tripping output logic setting of stage 1 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

10 No.10— [TrpLog_OC2_S1]

Tripping output logic setting of stage 2 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

11 No.11— [TrpLog_OC3_S1]

Tripping output logic setting of stage 3 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

12 No.12— [En_VCE_OC1_S1]

This is the logic setting used to enable stage 1 of overcurrent protection of side 1 is controlled by
voltage control element of local or other side.

“0”means the stage 1 element of OC is not controlled by voltage control element.

“1”means the stage 1 element of OC is controlled by voltage control element.

13 No.13— [En_VCE_OC2_S1]

This is the logic setting used to enable stage 2 of overcurrent protection of side 1 is controlled by
voltage control element of local or other side.

“0”means the stage 2 element of OC is not controlled by voltage control element.

“1”means the stage 2 element of OC is controlled by voltage control element.

14 No.14— [En_S1.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of local side.

15 No.15— [En_S2.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of side 2.

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Chapter 7 Settings

“0”means the OC protection is not controlled by voltage control element of side 2.

“1”means the OC protection is controlled by voltage control element of side 2.

16 No.16— [En_S3.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of side 3.

“0”means the OC protection is not controlled by voltage control element of side 3.

“1”means the OC protection is controlled by voltage control element of side 3.

NOTE: The relation between No.12-No.16 settings is described in following.

(1) No.12 and NO.13 settings are configured first to decide whether OC protection is
controlled by voltage control element. No.12-No.13 settings are multioption, which means
any stage of OC protection can be controlled by voltage control elelment.

(2) If No.12 or No 13 is set as “1”, then No.14-No.16 settings are needed to be configured
to decide which side voltage control element OC is controlled by. No.14 -No.16 settings
are multioption, which means voltage control element of any side can controls OC
protection.

17 No.17— [Opt_VTS_OC_S1]

This is the logic setting used to select operating performance of OC protection of side 1 during VT
circuit failure.

“1”: when VT circuit failure on side 1 is detected, voltage control element of the side can not pick
up.

“0”: when VT circuit failure on side 1 is detected, voltage control element will pick up and the
voltage-controlled overcurrent element will become a pure overcurrent relay.

18 No.18— [En_Mem_Curr]

This is the logic setting to enable memory current function.

“1”, means the function is enabled,

“0”, means the function is disabled.

The setting is set as 1 when protection equipment is used to protect self-excitation generator.

NOTE: If this function is enabled, overcurrent protection element must be controlled by

voltage control element.

7.4.1.3.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S1 PPF PROT

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Chapter 7 Settings

7.4.1.4 Phase-to-phase Fault Protections of Side 2 and Side 3

7.4.1.4.1 Setting List

Table 7.4-6 Settings list of phase-to-phase fault protection of side 2

No. Symbol Range Step Remark


1 V_NegOV_VCE_S2 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S2 10.00~100.00V 0.01V
3 I_OC1_S2 0.1~ 20In 0.01A
4 t_OC1_S2 0.00~10.00s 0.01s
5 I_OC2_S2 0.1~ 20In 0.01A
6 t_OC2_S2 0.00~10.00s 0.01s
7 TrpLog_OC1_S2 0000-1FFF
8 TrpLog_OC2_S2 0000-1FFF 1: enable ; 0: disable
9 En_VCE_OC1_S2 0/1 1 1: enable ; 0: disable
10 En_VCE_OC2_S2 0/1 1 1: enable ; 0: disable
11 En_OC2_SOTF_S2 0/1 1 1: enable ; 0: disable
12 Opt_VTS_OC_S2 0/1 1

Table 7.4-7 Phase-to-phase fault protection settings of side 3

No. Symbol Range Step Remark


1 V_NegOV_VCE_S3 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S3 10.00~100.00V 0.01V
3 I_OC1_S3 0.1~ 20In 0.01A
4 t_OC1_S3 0.00~10.00s 0.01s
5 I_OC2_S3 0.1~ 20In 0.01A
6 t_OC2_S3 0.00~10.00s 0.01s
7 TrpLog_OC1_S3 0000-1FFF
8 TrpLog_OC2_S3 0000-1FFF 1: enable ; 0: disable
9 En_VCE_OC1_S3 0/1 1 1: enable ; 0: disable
10 En_VCE_OC2_S3 0/1 1 1: enable ; 0: disable
11 En_OC2_SOTF_S3 0/1 1 1: enable ; 0: disable
12 Opt_VTS_OC_S3 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

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Chapter 7 Settings

7.4.1.4.2 Explanation of the Parameters and Notice for Setting

NOTE: Same symbol except postfix in this section has similar meaning to that appears in

section 7.4.1.2 and the configuring principle is also similar, so please refer to that section
for the details.

NOTE: The settings of phase-to-phase fault protection of side 2 and those of side 3 are

similar, so only setting descriptions of side 2 are given as an example below.

1 No.1— [V_NegOV_VCE_S2]

Setting of negative sequence voltage control element of side 2. Setting and displayed value of
negative sequence voltage are U2.

2 No.2— [Vpp_UV_VCE_S2]

Setting of low voltage control element of side 2.

3 No.3— [I_OC1_S2]

Setting of stage 1 of overcurrent protection of side 2.

4 No.4— [t_OC1_S2]

Time delay of stage 1 of overcurrent protection of side 2.

5 No.5— [I_OC2_S2]

Setting of stage 2 of overcurrent protection of side 2.

6 No.6— [t_OC2_S2]

Time delay of stage 2 of overcurrent protection of side 2.

7 No.7— [TrpLog_OC1_S2]

Tripping output logic setting of stage 1 of overcurrent protection of side2. Refer to section 7.4.1.1.2
for more information about it.

8 No.8— [TrpLog_OC2_S2]

Tripping output logic setting of stage 2 of overcurrent protection of side 2. Refer to section
7.4.1.1.2 for more information about it.

9 No.9— [En_VCE_OC1_S2]

This is the logic setting used to enable stage 1 of overcurrent protection of side 2 is controlled by
voltage control element of local or other side.

10 No.10— [En_VCE_OC2_S2]

This is the logic setting used to enable stage 2 of overcurrent protection of side 2 is controlled by
voltage control element of local or other side.

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11 No.11— [En_OC2_SOTF_S2]

This is the logic setting used to enable accelerating trip function of state 2 of OC protection of side
2 when switching one to fault.

“0”means the accelerating trip function is enabled.

“0”means the accelerating trip function is disabled.

12 No.12— [Opt_VTS_OC_S2]

This is the logic setting used to select operating performance of OC protection of side 2during VT
circuit failure.

7.4.1.4.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S2 PPF PROT

MENU -> SETTINGS -> PROT SETTINGS -> S3 PPF PROT

7.4.1.5 Earth Fault Protection of Side 1

7.4.1.5.1 Setting List

Table 7.4-8 Settings list of earth fault protection of side 1

No. Symbol Range Step Remark


1 I_ROC1_S1 0.1~ 20In 0.01A
2 t_ROC1_S1 0.00~10.00s 0.01s
3 I_ROC2_S1 0.1~ 20In 0.01A
4 t_ROC2_S1 0.00~10.00s 0.01s
5 TrpLog_ROC1_S1 0000-1FFF
6 TrpLog_ROC2_S1 0000-1FFF
7 Opt_3I0_ROC_S1 0/1 1
8 En_Dir_ROC1_S1 0/1 1 1: enable ; 0: disable
9 En_Dir_ROC2_S1 0/1 1 1: enable ; 0: disable
10 Opt_VTS_ROC_S1 0/1 1
11 Opt_Dir_ROC_S1 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.1.5.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_ROC1_S1]

Setting of stage 1 of zero sequence overcurrent protection of side 1.

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(1) The setting shall be coordinated with unrestrained instantaneous differential protection or
stage1 or 2 of residual overcurrent protection of adjacent power line.

I op.o .I K rel KbrI I op.o .1I

Where:

I op .o .I is setting of stage 1 of residual overcurrent protection,

K brI is branch coefficient of zero sequence current which is equal to ratio of zero sequence

current passing through this protection equipment and passing through the faulty line during
ground fault at the end of protected section of stage 1 of residual over current protection of the
power line. Maximum value among various operation conditions being taken;

K rel is reliability coefficient, 1.1 generally;

I op .o .1I is setting of relevant stage of coordinating line protection.

(2) Sensitivity check

3I
K sen  k .o .min
I op .o

Where:

3 I k .o. min is minimal secondary zero sequence current passing through location of the protection

equipment during ground fault at end of protected section of stage 1 or 2.

I op .o is setting of stage 1 or 2 of residual overcurrent protection.

K sen ≥1.5 Is required.

2 No.2— [t_ROC1_S1]

Time delay of stage 1 of zero sequence overcurrent protection of side 1.

3 No.3— [I_ROC2_S1]

Setting of stage 2 of zero sequence overcurrent protection of side 1.

(1) The setting shall coordinate with backup stage of residual overcurrent protection of adjacent
power line.

I op.o.II K rel K brII I op.o.1 II

Where:

I op .o .II is setting of stage 2 of residual overcurrent protection (secondary current).

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K brII is branch coefficient of zero sequence current which is ratio of zero sequence current

passing through this protection equipment and passing through the faulty line during ground fault
at end of protected section of backup zone of residual overcurrent protection of the power line.
Maximum value for various operation conditions being taken.

K rel is reliability coefficient, 1.1 generally.

I op .o .1II is setting of backup zone of coordinating residual overcurrent protection of the power line

(secondary current).

(2) Sensitivity check: criterion is same to that of stage 2 of zero sequence overcurrent protection.

4 No.4— [t_ROC2_S1]

Time delay of stage 2 of zero sequence overcurrent protection of side 1.

5 No.5— [TrpLog_ROC1_S1]

Tripping output logic setting of stage 1 of zero sequence overcurrent protection of side 1. Refer to
section 7.4.1.1.2 for more information about it.

6 No.6— [TrpLog_ROC2_S1]

Tripping output logic setting of stage 2 of zero sequence overcurrent protection of side 1. Refer to
section 7.4.1.1.2 for more information about it.

7 No.7— [Opt_3I0_ROC_S1]

This is the logic setting used to select where zero sequence current is derived.

“0”means zero sequence current is derived from zero-sequence CT installed at neutral point.

“1”means zero sequence current is derived from calculation.

8 No.8— [En_Dir_ROC1_S1]

This is the logic setting used to select whether stage 1 of zero sequence overcurrent of side 1
controlled by zero-sequence direction element.

“0”means not being controlled by direction element.

“1”means not controlled by direction element.

9 No.9— [En_Dir_ROC2_S1]

This is the logic setting used to select whether stage 2 of zero sequence overcurrent of side 1
controlled by zero-sequence direction element.

“0”means not being controlled by direction element.

“1”means not controlled by direction element.

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10 No.10— [Opt_VTS_ROC_S1]

This is the logic setting used to select operating performance of zero sequence overcurrent
protection of side 1 during VT circuit failure.

“1”: when VT circuit failure on side 1 is detected, zero-sequence voltage element of the side can
not pick up.

“0”: when VT circuit failure on side 1 is detected, the element will pick up and the
voltage-controlled zero-sequence overcurrent element will become a pure zero-sequence
overcurrent relay.

11 No.11— [Opt_Dir_ROC_S1]

Logic setting [Opt_Dir_ROC_S1] is used to select the direction of every stage of zero sequence
overcurrent protection. If this logic setting is set as “1”, the direction is transformer and reach angle
is 225º. If this logic setting is set as “0”, the direction is power system and reach angle is 75º..

This is the logic setting used to select the direction of zero-sequence overcurrent protection.

“0”means the direction is power system and reach angle is 75º.

“1”means the direction is transformer and reach angle is 225 º.

7.4.1.5.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S1 EF PROT

7.4.1.6 Earth Fault Protection of Side 2 and Side 3

7.4.1.6.1 Setting List

Table 7.4-9 Settings list of earth fault protection of side 2

No. Symbol Range Step Remark


1 I_ROC1_S2 0.1~ 20In 0.01A
2 t_ROC1_S2 0.00~10.00s 0.01s
3 I_ROC2_S2 0.1~ 20In 0.01A
4 t_ROC2_S2 0.00~10.00s 0.01s
5 TrpLog_ROC1_S2 0000-1FFF
6 TrpLog_ROC2_S2 0000-1FFF

Table 7.4-10 Settings list of earth fault protection of side 3

No. Symbol Range Step Remark


1 I_ROC1_S3 0.1~ 20In 0.01A
2 t_ROC1_S3 0.00~10.00S 0.01s
3 I_ROC2_S3 0.1~ 20In 0.01A

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No. Symbol Range Step Remark


4 t_ROC2_S3 0.00~10.00S 0.01s
5 TrpLog_ROC1_S3 0000-1FFF
6 TrpLog_ROC2_S3 0000-1FFF

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.1.6.2 Explanation of the Parameters and Notice for Setting

NOTE: LV side (i.e. side 2 and side 3) winding of main transformer are delta connected, so

the settings of earth fault protection of side 2 and side 3 are not needed to be
configured.

NOTE: The settings of earth fault protection of side 2 and those of side 3 are similar, so

only setting descriptions of the settings of side 2 are given below as an example.

1 No.1— [I_ROC1_S2]

Setting of stage 1 of zero sequence overcurrent protection of side 2.

2 No.2— [t_ROC1_S2]

Time delay of stage 1 of zero sequence overcurrent protection of side 2.

3 No.3— [I_ROC2_S2]

Setting of stage 2 of zero sequence overcurrent protection of side 2.

4 No.4— [t_ROC2_S2]

Time delay of stage 2 of zero sequence overcurrent protection of side 2.

5 No.5— [TrpLog_ROC1_S2]

Tripping output logic setting of stage 1 of zero sequence overcurrent protection of side 2 Refer to
section 7.4.1.1.2 for more information about it.

6 No.6— [TrpLog_ROC2_S2]

Tripping output logic setting of stage 2 of zero sequence overcurrent protection of side 2. Refer to
section 7.4.1.1.2 for more information about it.

7.4.1.6.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S2 EF PROT

MENU -> SETTINGS -> PROT SETTINGS -> S3 EF PROT

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7.4.1.7 Gap Earth Fault Protection

This submenu is used for configuration of gap earth fault protection for transformer which neutral
point is not earthed or earthed through air gap.

For transformer whose neutral point is grounded through gap, residual voltage protection and
residual overcurrent protection reflecting zero sequence voltage and discharge current through
gap shall be equipped.

7.4.1.7.1 Setting List

Table 7.4-11 Settings list of gap earth fault protection

No. Symbol Range Step Remark


1 I_ROC1_Gap 0.1~ 20In 0.01A
2 t_ROC11_Gap 0.00~10.00s 0.01s
3 t_ROC12_Gap 0.00~10.00s 0.01s
4 V_ROV1_Gap 10.00~220.00V 0.01V
5 t_ROV11_Gap 0.00~10.00s 0.01s
6 t_ROV12_Gap 0.00~10.00s
7 V_Alm_ROV 10.00~220.00V 0.01V
8 t_Alm_ROV 0.00~10.00s 0.01s
9 TrpLog_ROC11_Gap 0000-1FFF
10 TrpLog_ROC12_Gap 0000-1FFF
11 TrpLog_ROV11_Gap 0000-1FFF
12 TrpLog_ROV12_Gap 0000-1FFF
13 En_Alm_ROV 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.1.7.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_ROC1_Gap]

Setting of stage 1 of gap zero-sequence overcurrent protection.

Setting of residual overcurrent protection in gap circuit depends on zero sequence impedance of
transformer and arc resistance of discharge through the gap, etc. Primary current setting can be
taken as 100 A generally.

2 No.2— [t_ROC11_Gap]

Time delay 1 for stage 1 of gap zero-sequence overcurrent protection.

3 No.3— [t_ROC12_Gap]

Time delay 2 stage 1 of gap zero-sequence overcurrent protection.

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4 No.4— [V_ROV1_Gap]

Setting of gap zero-sequence overvoltage protection.

The setting should satisfy following equation.

U o. max U op.o U sat


Where:
U op .o is setting of this protection (secondary voltage);
U o. max is the maximum possible zero sequence voltage at location of the protection during
single-phase ground fault in power system with part of neutral points grounded, or during two
phases operation of transformer with ungrounded neutral point;
U sat is minimum possible open-delta voltage of VT in directly grounded system during single
phase ground fault and missing grounded neutral point condition. Rated phase voltage of open
delta VT is 100 V.
Considering that X 0 / X 1≤3 in a directly grounded system, U op .o is taken as 180 V generally.

5 No.5— [t_ROV11_Gap]

Time delay 1 for stage 1 of gap zero-sequence overvoltage protection.

6 No.6— [t_ROV12_Gap]

Time delay 2 for stage 1 of gap zero-sequence overvoltage protection.

7 No.7— [V_Alm_ROV]

Setting of zero-sequence overvoltage alarm element.

8 No.8— [V_Alm_ROV]

Time delay of zero-sequence overvoltage alarm element.

9 No.9— [TrpLog_ROC11_Gap]

Tripping output logic setting of delay 1 of stage 1 of gap zero sequence overcurrent protection.
Please refer to section 7.4.1.1.2 for more information about it.

10 No.10— [TrpLog_ROC12_Gap]

Tripping output logic setting of delay 2 of stage 1 of gap zero sequence overcurrent protection.
Please refer to section 7.4.1.1.2 for more information about it.

11 No.11— [TrpLog_ROV11_Gap]

Tripping output logic setting of delay 1 of stage 1 of gap zero sequence overvoltge protection.
Please refer to section 7.4.1.1.2 for more information about it.

12 No.12— [TrpLog_ROV12_Gap]

Tripping output logic setting of delay 2 of stage 1 of gap zero sequence overvoltge protection.
Please refer to section 7.4.1.1.2 for more information about it.

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13 No.13— [En_Alm_ROV]

This is the logic setting of enabling zero-sequence overvoltage alarm element.

7.4.1.7.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> GAP EF PROT

7.4.1.8 Overload Protection

This submenu is used for configuration the parameters for overload protection. Parameter cell
[En_OvLd] should be set as “1”to enable overload protection.

In addition, first of all, zero-sequence CT should be selected for overload protection. Please refer
to setting [Cfg_CT_OvLd] in section 7.2.2

7.4.1.8.1 Setting List

Table 7.4-12 Settings list of overload protection

No. Symbol Range Step Remark


1 I_Alm_OvLd 0.10~50.00A 0.01A
2 t_Alm_OvLd 0.00~100.00s 0.01s
3 I_InitCool_OvLd 0.10~50.00A 0.01A
4 t_InitCool_OvLd 0.00~100.00s 0.01s
5 I_Blk_OLTC_OvLd 0.10~50.00A 0.01A
6 t_Blk_OLTC_OvLd 0.00~100.00s 0.01s
7 I_CCE 0.10~50.00A 0.01A
8 TrpLog_CCE 0000-1FFF 1
9 En_Alm_OvLd 0/1 1 1: enable ; 0: disable
10 En_InitCool_OvLd 0/1 1 1: enable ; 0: disable
11 En_Blk_OLTC_OvLd 0/1 1 1: enable ; 0: disable
12 En_BO_CCE 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.1.8.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_Alm_OvLd]

Current setting for overload alarm. When actual secondary current is larger than this setting value
and the predefined time delay has elapsed, alarm information of overload will be issued.

2 No.2— [t_Alm_OvLd]

Time delay of overload alarm.

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3 No.3— [I_InitCool_OvLd]

Current setting for initiating air cooling mechanism when the transformer is overloaded.

4 No.4— [t_InitCool_OvLd]

Time delay of initiating air cooling mechanism when the transformer is overloaded.

5 No.5— [I_Blk_OLTC_OvLd]

Current setting for blocking on-load tap changing when the transformer is overloaded.

6 No.6— [t_Blk_OLTC_OvLd]

Time delay of blocking on-load tap changing when the transformer is over overloaded load.

7 No.7— [I_CCE]

Current setting for current control element. If the actual current is larger than the current setting,
equipment will output binary output contacts and tripping output contacts to trip other circuit
breakers depending on setting No.8.

8 No.8— [TrpLog_CCE]

Tripping output logic setting of current control element. Refer to section 7.4.1.1.2 for more
information about it.

9 No.9— [En_Alm_OvLd]

This is the logic setting used to enable overload alarm element.

10 No.10— [En_InitCool_OvLd]

This is the logic setting used to enable air cooling mechanism initiation function when the
transformer is overloaded.

11 No.11— [En_Blk_OLTC_OvLd]

This is the logic setting used to enable blocking on-load tap changing function when the
transformer is overloaded.

12 No.12— [En_BO_CCE]

This is the logic setting used to enable equipment to output contacts when current control element
picks up.

7.4.1.8.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> OVLD PROT

7.4.2 Used to protect start-up/standby transformer

When the equipment is used to protect start-up/standby transformer, side 1 is called HV side and
side 2 and 3 are called branch side. Therefore the configuring principles of side 2 and 3 are

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similar.

7.4.2.1 Differential Protection

In this part, configuration of settings of differential protection will be described in detail.

7.4.2.1.1 Setting List

Table 7.4-13 Differential protection settings list

No. Symbol Range Step Remark


1 I_Pkp_PcntDiff 0.10~1.50 Ie 0.01Ie
2 I_InstDiff 4~14 Ie 0.01Ie
3 Slope1_PcntDiff 0.05~0.15 0.01
4 Slope2_PcntDiff 0.50~0.80 0.01
5 k_2ndH_PcntDiff 0.10~0.35 0.01
6 I_Alm_Diff 0.10~1.00 Ie 0.01Ie
7 TrpLog_Diff 0000-1FFF
8 En_InstDiff 0/1 1 1:Enable 0:Disable
9 En_PcntDiff 0/1 1 1:Enable 0:Disable
10 En_CTSBlkDiff 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.2.1.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_Pkp_PcntDiff]

This is a pickup setting of percentage current differential protection, which is also the setting of
fault detector of percent differential protection. It should be higher than maximum unbalanced
current of the transformer during normal rated load, i.e.
I cdqd K rel ( K er U m) I e
Where:
I cdqd represents the setting [I_Pkp_PcntDiff ].
Ie is secondary calculated rated current of transformer (please see details in section );
Krel is reliability coefficient (generally K rel = 1.3 ~1.5);
Ker is the ratio error of CT (=0.03X2, for class 10P; =0.01X2, for class 5P and class TP);
U is the maximum deviation (in percentage of rated voltage) due to tap changing;

m is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.

For practical engineering application, Icdqd =(0.3 ~0.5) I e is reasonable and unbalanced current

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in differential scheme during maximum load of transformer shall be measured.

2 No.2— [I_InstDiff]

Setting of unrestrained instantaneous differential protection, which is used to clear serious internal

fault quickly and prevent operation delay caused by CT saturation. The setting I cdsd (ie.

[I_InstDiff ]) should be higher than inrush current and maximum unbalanced current due to external
fault or asynchronous closing, generally

I cdsd K I e
Where:
K is a multiple depending on capacity of transformer and the system reactance. 5~ 6 is
recommended for main transformer, 6~8 is recommended for startup/standby transformer and
plant transformer.
I e is secondary calculated rated current of transformer.

Sensitivity coefficient of unrestrained instantaneous differential protection K sen should be

calculated according to the phase-to-phase solid short circuit fault in normal operation condition at

installed point of the relay. K sen ≥ 1.2 is required.

3 No.3— [Slope1_PcntDiff]

Setting of the first slope of percent differential protection, it should be:


K bl1 K er
Where:

K er is the error of current ratio of CT, no more than 0.1. K bl 1 is 0.10-0.20 generally.

Calculation of secondary unbalanced current:

--- For two winding transformer

I unb. max ( K ap K cc K er U m) I k . max

Where:

Definition of K er , U and m have been mentioned above;

Kcc is the “same type coefficient”of CT, 1.0 is recommended.

I k. max is the periodic component (secondary value) of maximum through fault current of

external short circuit fault.

K ap is the coefficient of aperiodic component. K ap = 1.0 if CT at both sides are class TP, or

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K ap = 1.5 ~ 2.0 if CT at both sides are class P.

--- For three winding transformer

Take external short circuit fault at LV side as example:

I unb .max K ap K cc K er I k .max U h I k.h .max mI I k .I .max mII I k. II .max
Where:
Definition of K er , K cc and K ap have been mentioned above;
U h is the relative error (to rated voltage Un) of HV side due to tap changing, it is
recommended to adopt the maximum value of deviations to the rated value (in
percentage of rated voltage).

I k .max is the periodic component (secondary value) of maximum short current flowing through

CT close to the fault point when external fault occurred at the LV side.

I k.h . max is the periodic component (secondary value) of current flowing through CT of voltage
changeable side when calculating fault current of external fault at LV side.

I k .I . max and I k .II .max are the periodic components of secondary currents flowing through CT at

other sides during external fault at LV side;

mI and mII are errors caused by difference between ratios of CT (auxiliary CT included if any)
at relevant sides.

Sensitivity check for percent differential protection

The sensitivity coefficient K sen should be calculated according to phase-to-phase short circuit on

outlet of transformer protected by the differential relay in minimum operation mode. From the

calculated minimum short circuit current I k .min and relevant restraint current I res , corresponding

pickup current I op will be found in the operation characteristic curve of percent differential relay,

and then the sensitivity coefficient is:

K sen I k. min / I op

K sen ≥ 2 is required.

4 No.4— [Slope2_PcntDiff]

Second slope of percent differential protection is:

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I unb. max* I cdqd * 3k bl1


kbl 2 
I k . max* 3

Where:

Definition of I unb . max* , I cdqd * and I k .max* are almost same to Iunb .max , I cdqd and

I k. max mentioned above, and the only difference is they are per unit values. I e (secondary

calculated rated current of transformer) is the base value of per unit.

k bl 2 =0.70 is recommended.

5 No.5— [k_2ndH_PcntDiff]

Restraint coefficient of second harmonic. This parameter is the blocking threshold of second
harmonic involving in differential current to against inrush current when the transformer is
energized. The differential protection will be blocked when the percentage of second harmonics
reaches the threshold because the percentage of second harmonics is high in inrush current but
low in fault current. In general, the parameter is set to be 15% ~20% and 15% is recommended.

6 No.6— [I_Alm_Diff]

Setting of differential current abnormality alarm. It should be higher than maximum differential
current due to tap changing of the transformer being not in the middle position or other possible
conditions during operation.

7 No.7— [TrpLog_Diff]

Tripping output logic setting of differential protection. Mentioned below are used to specify which
breaker or breakers will be tripped by the protection. This setting comprises following 16 binary
bits and is displayed by a hexadecimal number of 4 digits from 0000H to 0FFFH.
The tripping output logic setting of RCS-985TS is defined below.
Bits Function
0 Protection enabled
1 TrpOutp1
2 TrpOutp2
3 TrpOutp3
4 TrpOutp4
5 TrpOutp5
6 TrpOutp6
7 TrpOutp7
8 TrpOutp8
9 TrpOutp9
10 TrpOutp10

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11 TrpOutp11
12 TrpOutp12
13-15 No definition
“TrpOutput 1”means to drive the 1st group of tripping output relays to operate.
Set bit “0”as 1 means this protection element will trip breaker or breakers. The bit corresponding
to the breaker to be tripped shall be set as“1”and other bits shall be “0”. For example, if
differential protection is defined to “Trpoutp 5”(the 5th group of tripping output relays), the “0”bit
and “5”bit shall be set as “1”and other bits “0”. Then a hexadecimal number 0021H is formed as
the tripping output logic setting.
Please note that tripping output logic settings of the equipment have to be set on basis of
application-specific drawings.

All the tripping logic settings mentioned below is defined as same as this one.

NOTE Tripping output logic settings have to be set on basis of application -specific

drawings and please refer to section 6.3.1 to configure those settings.

8 No.8— [En_InstDiff]

This it the logic setting used to enable unrestrained instantaneous differential protection.

9 No.9— [En_PcntDiff]

This it the logic setting used to enable percent differential protection.

10 No.10— [En_CTSBlkDiff]

Logic setting used to select operating characteristic of percent differential protection when
differential CT circuit failure.

“0”: means percent differential protection is not blocked when differential CT circuit failure.

“1”: means percent differential protection is blocked when differential CT circuit failure.

7.4.2.1.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> DIFF PROT

7.4.2.2 Restricted earth fault protections

Restricted earth fault protection is also called zero-sequence differential protection. There are
three restricted earth fault protection elements of side 1, side 2 and side 3 and the each element is
independent to another side but with the same protection theory and scheme logic. Here take the
protection of side 1 as an example to give detailed settings explanation.

7.4.2.2.1 Setting list

Table 7.4-14 REF settings list of side 1

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No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S1 0.10In-10.00In 0.01In
2 I_InstREF_S1 2In-20In 0.01In
3 Slope_PcntREFS1 0.3-0.7 0.01
4 TrpLog_REF_S1 0000 –1FFF 1
5 En_InstREF_S1 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S1 0/ 1 1: enable ; 0: disable

Table 7.4-15 REF settings list of side 2

No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S2 0.10In-10.00In 0.01In
2 I_InstREF_S1 2In-20In 0.01In
3 Slope_PcntREFS2 0.3-0.7 0.01
4 TrpLog_REF_S2 0000 –1FFF 1
5 En_InstREF_S2 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S2 0/ 1 1: enable ; 0: disable

Table 7.4-16 REF settings list of side 3

No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S3 0.10In-10.00In 0.01In
2 I_InstREF_S3 2In-20In 0.01In
3 Slope_PcntREFS3 0.3-0.7 0.01
4 TrpLog_REF_S3 0000 –1FFF 1
5 En_InstREF_S3 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S3 0/ 1 1: enable ; 0: disable

NOTE: Symbol of the parameters listed in above tables is used for communication,

printing and displaying on LCD.

7.4.2.2.2 Explanation of the parameters and notice for setting

NOTE: To configure the settings of zero-sequence percent differential protection, you can

follow the method provided in section 7.4.2.1 calculation of percent differential protection,
where U shall be taken as 0. Polarity of each CT for zero-sequence differential

protection at various sides is same as shown in Figure 1.1-1 ~ Figure 1.1-4. Positive
polarity of three-phase CT is at busbar side and that of zero-sequence CT is at neutral
point side.

1 No.1--[I_Pkp_PcntREF_S1]

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Chapter 7 Settings

This is pickup setting of zero-sequence percent differential element of restricted earth fault
protection, which is also the setting of fault detector of that element.

 Configuring principle of the setting

Calculation of this setting is based on rated secondary current of the transformer. If a setting got
from calculation is together with its unit Ampere, this setting shall be divided by rated secondary
current of this side of the CT, to get per unit value. The setting of zero - sequence differential
protection shall be greater than the maximum imbalanced current while transformer operates on
normal rated load, i.e.

I0 cdqd K rel (K er m)I n (Equation 7.4-2)

Where:

I0 cdqd represents setting [I_Pkp_PcntREF_S1].

In is rated secondary current of CT.

Krel is reliability coefficient (generally Krel = 1.3 - 1.5).

Ker is the ratio errors of CT (for type 10P, Ker = 0.03×2; for class 5P and class TP, Ker =0.01X2);

m is the error caused by the difference between ratios of CT at all sides, 0.05 is recommended.

For practical engineering calculation, I ocdqd =(0.3 - 0.5)I e is reasonable and unbalanced current

in differential scheme during maximum load of transformer shall be measured.

 Sensitivity check for zero sequence percent differential protection

Sensitivity of restricted earth fault protection shall be checked with the solid earth fault in its

protected zone and K sen ≥ 2 is required ( K sen is the sensitivity coefficient).

In solid earthed system, distribution of zero sequence current for single-phase-to-earth fault
depends on the configuration of zero sequence network of power system. Magnitude of the
single-phase-to-earth fault current depends on not only zero sequence impedance of system but
also the positive and negative sequence impedances. That means different operation modes of
power system also have influence on the current. When power system is in maintenance status,
in order to remain the zero sequence impedance of the system network unchanged and increase
sensitivity for earth fault protection, the 220 kV power system is generally compensated by
properly changing earth mode of the transformer. Therefore, sensitivity of zero sequence
differential protection shall be checked in minimum operation mode for 220 kV power system.

2 No.2--[I_InstREF_S1]

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Chapter 7 Settings

Setting of unrestrained instantaneous zero-sequence differential protection element of restricted


earth fault protection, this protection is used to clear serious single-phase-to-earth fault quickly
and prevent operation delay caused by CT saturation.

3 No.3--[Slope_PcntREF_S1]

Restraint coefficient of zero-sequence percent differential protection element of restricted earth


fault protection.

4 No.4--[TrpLog_REF_S1]

Tripping output logic setting of restricted earth fault protection which is used to specify which
breaker or breakers will be tripped by the protection.

5 No.5--[En_InstREF_S1]

Logic setting of enabling unrestrained instantaneous zero-sequence differential protection element


of restricted earth fault protection.

6 No.6--[En_PcntREF_S1]

Logic setting of enabling zero-sequence percent differential protection element of restricted earth
fault protection.

7.4.2.2.3 Setting path

Settings of restricted earth fault protection of side 1, side 2 and side 3 accessible in the following
path respectively:
Main Menu -> SETTING -> PROT SETTINGS -> S1 REF PROT
Main Menu -> SETTING -> PROT SETTINGS -> S2 REF PROT
Main Menu -> SETTING -> PROT SETTINGS -> S3 REF PROT

7.4.2.3 Phase-to-phase fault Protection of Side 1

7.4.2.3.1 Setting List

Table 7.4-17 settings list of phase-to-phase fault protection of side 1

No. Symbol Range Step Remark


1 V_NegOV_VCE_S1 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S1 10.00~100.00V 0.01V
3 I_OC1_S1 0.1~ 20In 0.01A
4 t_OC1_S1 0.00~10.00s 0.01s
5 I_OC2_S1 0.1~ 20In 0.01A
6 t_OC2_S1 0.00~10.00S 0.01s
7 I_OC3_S1 0.1~ 20In 0.01A
8 t_OC3_S1 0.00~10.00s 0.01s
9 TrpLog_OC1_S1 0000-1FFF

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Chapter 7 Settings

No. Symbol Range Step Remark


10 TrpLog_OC2_S1 0000-1FFF
11 TrpLog_OC3_S1 0000-1FFF
12 En_VCE_OC1_S1 0/1 1 1: enable ; 0: disable
13 En_VCE_OC2_S1 0/1 1 1: enable ; 0: disable
14 En_S1.VCE_OC_S1 0/1 1 1: enable ; 0: disable
15 En_S2.VCE_OC_S1 0/1 1 1: enable ; 0: disable
16 En_S3.VCE_OC_S1 0/1 1 1: enable ; 0: disable
17 Opt_VTS_OC_S1 0/1 1
18 En_Mem_Curr 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.2.3.2 Explanation of the Parameters and Notice for Setting

1 No.1— [V_NegOV_VCE_S1]

Setting of negative sequence voltage control element of side 1. Setting and displayed value of
negative sequence voltage are U2.
(1) Configuring principle – voltage control element
Negative sequence voltage is taken from LV side usually. The operating negative sequence

voltage shall be higher than maximal unbalance voltage. Generally, U 2.op (0.06 0.08)U N is

recommended and U N is secondary rated voltage.

(2) Sensitivity check – voltage control element

U2
U2 
Ksen  1.5
nTV U 2OP

Where:

U 2 is negative sequence voltage (phase voltage) of LV side busbar of the start-up/standby

transformer, when two-phase short circuit fault occurs on the end of line.

nTV is ratio of VT.

U 2 .op is the setting.

2 No.2— [Vpp_UV_VCE_S1]

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Setting of low voltage control element of side 1.

(1) Configuring principle – voltage control element


Phase-to-phase voltage is taken from LV side usually. The setting shall be higher than the lowest
voltage during starting process of the largest motor connected with the LV busbar.

It is taken as U op 0.6U n usually and U N is the rated phase-to-phase voltage. However, if

impedance of the startup/standby transformer is relatively large, it can be taken as

U op (0.55 0.6)U n .

(2) Sensitivity check – voltage control element

UOP
U 
Ksen  1.5
nTV U1

Where:

U OP is the setting [Vpp_UV_VCE_S1].

nTV is ratio of VT.

U 1 is phase-to-phase voltage of LV side busbar of the start-up/standby transformer, when


three-phase short circuit fault occurs on the end of line.

3 No.3— [I_OC1_S1]

Setting of stage 1 of overcurrent protection of side 1.

(1) Configuring principle – voltage controlled overcurrent protection


Operating current of stage1 shall be higher than maximal current passing through the protection
equipment during three phase fault on LV side outlet of the startup/standby transformer:

I K(3).max
IOPI Krel
nTA
1 S
K .max 
I (3)  B
X max X T 3U B
Where:

Krel is the reliability coefficient and 1.3 is recommended;

Kr is the return coefficient and 0.85 – 0.95 recommended;

I k(3.max
)
is the maximum secondary current passing through HV side when three phase fault occurs

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Chapter 7 Settings

on LV side outlet of the startup/standby transformer.

nTA is current transformer ratio;

X max is per unit value of system reactance, which base value is S B , when HV side of the

start-up/standby transformer in maximum mode of operation;

U B is even rated voltage of HV side.

4 No.4— [t_OC1_S1]

Time delay of stage 1 of overcurrent protection of side 1.

No.1 setting [I_OC1_S1] is unaffected by increase of load current of the startup/standby


transformer when the HV side voltage drops down due to system oscillation, so delay of this
protection shall coordinate with main protection only without considering oscillation period.
[t_OC1_S1]=0.5 s is recommended generally.

5 No.5— [I_OC2_S1]

Setting of stage 2 of overcurrent protection of side 1.

There are following two configuring principles for the setting.


(1) Configuring Principle 1 – voltage controlled overcurrent protection
The setting shall be based the condition that the protection can return reliably when rated current
passes through HV side:

K I
IOPII  rel  N
Kr nTA

Where:

K rel is reliable coefficient and 1.2 is recommended;

K r is return coefficient and 0.9 is recommended;

I N is rated current of HV side of the transformer;

nTA is current transformer ratio.

(2) Configuring Principle2 – voltage controlled overcurrent protection


The setting shall coordinate with that of stage 2 of overcurrent protection of LV side branch:

U LN 1
I opII K CO ( I opII ( L ) nTAL I10 a ) 
U HN nTA

Where:

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Chapter 7 Settings

K CO is the coordination coefficient and 1.1 is recommended;

I opII (L) is the secondary operating current of stage 2 of overcurrent protection of LV side branch of

the startup/standby transformer;

I10 a is the normal operating current of another LV side branch;

U LN is the real voltage ratio of LV side to HVside;


U HN

nTAL is the current ratio of CT used by overcurrent protection of the LV side branch;

nTA is the current ratio of HV side CT.

Generally, when voltage control element for stage 2 of overcurrent protection is enabled, the first
configuring principle is adopted. However, if secondary principle is adopted, voltage control
element for stage 2 is selectable.
(3) Sensitivity check – voltage controlled overcurrent protection

I K (2)
Ksen I  1.3
nTA IOPII

Where:

I K (2) is short -circuit current flowing through HV side of the transformer when two-phase short

circuit occurs on the end of line.

nTA is the current ratio of HV side CT.

6 No.6— [t_OC2_S1]

Time delay of stage 2 of overcurrent protection of side 1.

The setting shall coordinate with stage 2 of overcurrent protection of LV side branch of the

startup/standby transformer. It can be taken as t 2 t 2' t t usually, where t 2' is delay of

stage 2 of LV side branch, t is the step difference. Since this delay is longer than oscillation
period, so even if stage 2 of overcurrent element operates due to HV side voltage drop during
system oscillation, stage 2 of overcurrent protection will not operate incorrectly.

7 No.7— [I_OC3_S1]

Setting of stage 3 of overcurrent protection of side 1.

8 No.8— [t_OC3_S1]

Time delay of stage 3 of overcurrent protection of side 1.

9 No.9— [TrpLog_OC1_S1]

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Tripping output logic setting of stage 1 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

10 No.10— [TrpLog_OC2_S1]

Tripping output logic setting of stage 2 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

11 No.11— [TrpLog_OC3_S1]

Tripping output logic setting of stage 3 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

12 No.12— [En_VCE_OC1_S1]

This is the logic setting used to enable stage 1 of overcurrent protection of side 1 is controlled by
voltage control element of local or other side.

“0”means the stage 1 element of OC is not controlled by voltage control element.

“1”means the stage 1 element of OC is controlled by voltage control element.

13 No.13— [En_VCE_OC2_S1]

This is the logic setting used to enable stage 2 of overcurrent protection of side 1 is controlled by
voltage control element of local or other side.

“0”means the stage 2 element of OC is not controlled by voltage control element.

“1”means the stage 2 element of OC is controlled by voltage control element.

14 No.14— [En_S1.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of local side.

15 No.15— [En_S2.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of side 2.

“0”means the OC protection is not controlled by voltage control element of side 2.

“1”means the OC protection is controlled by voltage control element of side 2.

16 No.16— [En_S3.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of side 3.

“0”means the OC protection is not controlled by voltage control element of side 3.

“1”means the OC protection is controlled by voltage control element of side 3.

NOTE: The relation between No.12-No.16 settings is described in following.

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(1) No.12 and NO.13 settings are configured first to decide whether OC protection is
controlled by voltage control element. No.12-No.13 settings are multioption, which means
any stage of OC protection can be controlled by voltage control elelment.

(2) If No.12 or No 13 is set as “1”, then No.14-No.16 settings are needed to be configured
to decide which side voltage control element OC is controlled by. No.14 -No.16 settings
are multioption, which means voltage control element of any side can controls OC
protection.

17 No.17— [Opt_VTS_OC_S1]

This is the logic setting used to select operating performance of OC protection of side 1 during VT
circuit failure.

“1”: when VT circuit failure on side 1 is detected, voltage control element of the side can not pick
up.

“0”: when VT circuit failure on side 1 is detected, voltage control element will pick up and the
voltage-controlled overcurrent element will become a pure overcurrent relay.

18 No.18— [En_Mem_Curr]

This is the logic setting to enable memory current function.

“1”, means the function is enabled,

“0”, means the function is disabled.

The setting is set as 1 when protection equipment is used to protect self-excitation generator.

NOTE: For self- excited generator, the function needn’


t be enabled. If this function is

enabled, overcurrent protection element must be controlled by voltage control element.

7.4.2.3.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S1 PPF PROT

7.4.2.4 Phase-to-phase fault Protections of Side 2 and Side 3

Table 7.4-18 Settings list of phase-to-phase fault protection of side 2

No. Symbol Range Step Remark


1 V_NegOV_VCE_S2 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S2 10.00~100.00V 0.01V
3 I_OC1_S2 0.1~ 20In 0.01A
4 t_OC1_S2 0.00~10.00s 0.01s
5 I_OC2_S2 0.1~ 20In 0.01A
6 t_OC2_S2 0.00~10.00s 0.01s

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Chapter 7 Settings

7 TrpLog_OC1_S2 0000-1FFF
8 TrpLog_OC2_S2 0000-1FFF 1: enable ; 0: disable
9 En_VCE_OC1_S2 0/1 1 1: enable ; 0: disable
10 En_VCE_OC2_S2 0/1 1 1: enable ; 0: disable
11 En_OC2_SOTF_S2 0/1 1 1: enable ; 0: disable
12 Opt_VTS_OC_S2 0/1 1

Table 7.4-19 Phase-to-phase fault protection settings of side 3

No. Symbol Range Step Remark


1 V_NegOV_VCE_S3 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S3 10.00~100.00V 0.01V
3 I_OC1_S3 0.1~ 20In 0.01A
4 t_OC1_S3 0.00~10.00s 0.01s
5 I_OC2_S3 0.1~ 20In 0.01A
6 t_OC2_S3 0.00~10.00s 0.01s
7 TrpLog_OC1_S3 0000-1FFF
8 TrpLog_OC2_S3 0000-1FFF 1: enable ; 0: disable
9 En_VCE_OC1_S3 0/1 1 1: enable ; 0: disable
10 En_VCE_OC2_S3 0/1 1 1: enable ; 0: disable
11 En_OC2_SOTF_S3 0/1 1 1: enable ; 0: disable
12 Opt_VTS_OC_S3 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.2.4.1 Explanation of the Parameters and Notice for Setting

NOTE: Same symbol except postfix in this section has similar meaning to that appears in

section 7.4.2.2, so please refer to that section for details. However configuring principle is
different.

NOTE: The settings of phase-to-phase fault protection of side 2 and those of side 3 are

similar, so only setting descriptions of side 2 are given below as an example.

1 No.1— [V_NegOV_VCE_S2]

Setting of negative sequence voltage control element of side 2. Setting and displayed value of
negative sequence voltage are U2.

Calculation of setting of negative-sequence voltage relay is the same as that of phase-to-phase


fault protection of side 1, so please refer to section 7.4.2.3.2 for details.

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2 No.2— [Vpp_UV_VCE_S2]

Setting of low voltage control element of side 2.

Calculation of setting of low-voltage voltage relay is the same as that of phase-to-phase fault
protection of side 1, so please refer to section 7.4.2.3.2 for details.

3 No.3— [I_OC1_S2]

Setting of stage 1 of overcurrent protection of side 2.

(1) The setting of stage 1 shall coordinate with insensitive of instantaneous overcurrent protection
of largest motor connected with HV power plant busbar:

PN 1
I opI ( L ) K co K rel K st 
3U N cos  n TA

Where:

I opI (L ) is the setting [I_OC1_S2];

Krel is the reliability coefficient and 1.5 is recommended generally;

K co is the coordination coefficient and 1.1 is recommended generally;

K st is the multiple of starting current of motor and 7 is recommended generally;

PN is the power of the largest motor (pump for water supply) connected with the HV power plant

busbar,

U N is the rated voltage of the motor;

cos  is the power coefficient of the motor and 0.75 is recommended generally;

nTA is the current ratio of CT of the branch side.

(2) Sensitivity check

(2)
I
Ksen  K 1.3
nTA IOPI ( L )

Where:

K sen is sensitivity coefficient of the setting [I_OC1_S2].

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Chapter 7 Settings

I (K2 ) is short circuit current of overcurrent protection when two-phase short circuit fault occurs on
HV power plant busbar in minimum mode of operation of start-up/standby transformer.

I opI (L ) is the setting[I_OC1_S2];

nTA is the current ratio of CT of the branch side.

4 No.4— [t_OC1_S2]

Time delay of stage 1 of overcurrent protection of side 2.

The delay shall coordinate with delay of instantaneous overcurrent protection on outlet of HV
power plant busbar.

5 No.5— [I_OC2_S2]

Setting of stage 2 of overcurrent protection of side 2.

(1) Configuring principle 1


The setting shall be based the condition that the protection can return reliably when rated current
passes through the branch:

K I
I opII  rel  N
K r nTA

Where:

Krel is the reliability coefficient and 1.2 is recommended generally;

Kr is the return coefficient and 0.85 – 0.9 is recommended;

I N is rated current of branch of the startup/standby transformer.

nTA is ratio of current transformer of branch side.

Both stage1 and 2 can be controlled by voltage control element by configuring corresponding
logic settings, and it is recommended that stage 2 is controlled by voltage control element.

6 No.6— [t_OC2_S2]

Time delay of stage 2 of overcurrent protection of side 2.

The delay shall coordinate with delay of outlet of HV power plant busbar.

7 No.7— [TrpLog_OC1_S2]

Tripping output logic setting of stage 1 of overcurrent protection of side2. Refer to section 7.4.1.1.2

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Chapter 7 Settings

for more information about it.

8 No.8— [TrpLog_OC2_S2]

Tripping output logic setting of stage 2 of overcurrent protection of side 2. Refer to section
7.4.1.1.2 for more information about it.

9 No.9— [En_VCE_OC1_S2]

This is the logic setting used to enable stage 1 of overcurrent protection of side 2 is controlled by
voltage control element of local or other side.

10 No.10— [En_VCE_OC2_S2]

This is the logic setting used to enable stage 2 of overcurrent protection of side 2 is controlled by
voltage control element of local or other side.

11 No.11— [En_OC2_SOTF_S2]

This is the logic setting used to enable accelerating trip function of state 2 of OC protection of side
2 when switching one to fault.

“0”means the accelerating trip function is enabled.

“0”means the accelerating trip function is disabled.

12 No.12— [Opt_VTS_OC_S2]

This is the logic setting used to select operating performance of OC protection of side 2during VT
circuit failure.

7.4.2.4.2 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S2 PPF PROT

MENU -> SETTINGS -> PROT SETTINGS -> S3 PPF PROT

7.4.2.5 Earth Fault protection of side 1

7.4.2.5.1 Setting List

Table 7.4-20 Settings list of earth fault protection of side 1

No. Symbol Range Step Remark


1 I_ROC1_S1 0.1~ 20In 0.01A
2 t_ROC1_S1 0.00~10.00s 0.01s
3 I_ROC2_S1 0.1~ 20In 0.01A
4 t_ROC2_S1 0.00~10.00s 0.01s
5 TrpLog_ROC1_S1 0000-1FFF
6 TrpLog_ROC2_S1 0000-1FFF
7 Opt_3I0_ROC_S1 0/1 1

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Chapter 7 Settings

No. Symbol Range Step Remark


8 En_Dir_ROC1_S1 0/1 1 1: enable ; 0: disable
9 En_Dir_ROC2_S1 0/1 1 1: enable ; 0: disable
10 Opt_VTS_ROC_S1 0/1 1
11 Opt_Dir_ROC_S1 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.2.5.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_ROC1_S1]

Setting of stage 1 of zero sequence overcurrent protection of side 1.

There are two kinds of protection configuring schemes for zero-sequence overcurrent protection.
One is two-stage zero-sequence overcurrent protection without direction element and each stage
is equipped with two delays. The other is stage 1 of zero-sequence overcurrent protection is
equipped with direction element, but stage 2 is not. The difference between the following two
schemes is that in first scheme stage 1 can be used as backup protection for internal and external
earth fault of start-up/standby; in second scheme stage 1 only used as backup protection for
internal earth fault with short delay. However, configuring principles of stage 2 in above two
schemes are same.

(1) Configuring scheme 1

The setting of stage 1 shall coordinate with cooperating stage (stage 1 or 2) of zero-sequence
overcurrent protection for HV side outlet:

3I0 OP
3 I0 OPI Kco Co
nTA

Where:

(3I 0 )opI is the setting [I_ROC1_S1];

(3I 0 )op is maximum zero-sequence operating current (primary value) of cooperating stage of

zero-sequence overcurrent protection for outline of HV side;

C0 is distribution coefficient of zero sequence current which is ratio of zero sequence current

flowing through the protection equipment to that flowing through line and maximum value in
different operation modes is recommended;

K co is cooperating coefficient and 1.1 is recommended generally;

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Chapter 7 Settings

nTA is ration of current transformer of HV side.

(2) Configuring scheme 2

Direction of zero-sequence overcurrent protection is configured to power system


([Opt_Dir_ROC_S1] is set as “0”). The setting shall coordinate with backup stage of remote
zero-sequence overcurrent protection for HV side outlet.

(3I 0 ) min 1
(3I 0 )OPI K rel
C 0 nTA

Where:

(3I 0 )opI is the setting [I_ROC1_S1];

K rel is the reliability coefficient and 0.7 is recommended;

(3I o ) min is the minimum operating current of backup stage of zero-sequence overcurrent

protection for remote fault on HV side outlet;

C0 is the distribution coefficient of zero sequence current which is equal to maximal ratio of

residual current of remote end to that of near end when ground fault occurs on HV side outlet of
the startup/standby transformer;

nTA is current ratio of current transformer of HV side.

(3) Sensitivity check

3I
K sen  k .o .min
I op .o

Where:

3 I k .o. min is minimal secondary zero sequence current passing through location of the protection

equipment during ground fault at end of protected section of stage 1 or 2.

I op .o is setting of stage 1 or 2 of residual overcurrent protection.

K sen ≥1.5 is required.

2 No.2— [t_ROC1_S1]

Time delay of stage 1 of zero sequence overcurrent protection of side 1.

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Chapter 7 Settings

Two kinds of configuring schemes cooperate with No.1 setting configuration.

(1) Configuring scheme 1

The delay of stage 1 shall coordinate with delay of cooperating stage (stage 1 or 2) of
zero-sequence overcurrent protection for outline of HV side.

(2) Configuring scheme 2

The delay of stage 1 shall coordinate with the longest delay of backup stage of zero-sequence
overcurrent protection for outline of HV side.

When ground fault occurs on near end of HV side outlet of startup/standby transformer, it is
protected by zero-sequence overcurrent protection stage 2 of remote end, so its delay is

t t II t

Where: t II is delay of residual protection stage 2 of remote end, and t is the step difference of

delay.

3 No.3— [I_ROC2_S1]

Setting of stage 2 of zero sequence overcurrent protection of side 1.

(1)Configuring principle

The setting shall coordinate with operating current of residual current protection of HV side outlet
for remote end ground fault:

(3I 0 ) op
(3I 0 )OPII K c 0 C0'
nTA

Where:

(3I o )OPII is the setting [I_ROC2_S1];

(3I o )OP is the primary operating current of backup stage of zero sequence overcurrent protection

of HV side outlet to be coordinated;

K c0 is coordination coefficient and 1.1 is recommended;

'
C0 is the distribution coefficient of zero sequence current which is equal to the ratio of residual
current passing through the protection equipment to that passing through the power line when fault
occurs on the end of protective zone of backup stage of residual overcurrent protection of line, and
maximum value in different operation modes is recommended.

nTA is current transformer ratio of HV side.

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Chapter 7 Settings

(2) Sensitivity check: criterion is same to that of stage 2 of zero sequence overcurrent protection.

4 No.4— [t_ROC2_S1]

Time delay of stage 2 of zero sequence overcurrent protection of side 1.

Delay of stage 2 shall coordinate with the longest delay of backup stage of residual overcurrent
protection of HV side outlet.

5 No.5— [TrpLog_ROC1_S1]

Tripping output logic setting of stage 1 of zero sequence overcurrent protection of side 1. Refer to
section 7.4.1.1.2 for more information about it.

6 No.6— [TrpLog_ROC2_S1]

Tripping output logic setting of stage 2 of zero sequence overcurrent protection of side 1. Refer to
section 7.4.1.1.2 for more information about it.

7 No.7— [Opt_3I0_ROC_S1]

This is the logic setting used to select where zero sequence current is derived.

“0”means zero sequence current is derived from zero-sequence CT installed at neutral point.

“1”means zero sequence current is derived from calculation.

8 No.8— [En_Dir_ROC1_S1]

This is the logic setting used to select whether stage 1 of zero sequence overcurrent of side 1
controlled by zero-sequence direction element.

“0”means not being controlled by direction element.

“1”means not controlled by direction element.

9 No.9— [En_Dir_ROC2_S1]

This is the logic setting used to select whether stage 2 of zero sequence overcurrent of side 1
controlled by zero-sequence direction element.

“0”means not being controlled by direction element.

“1”means not controlled by direction element.

10 No.10— [Opt_VTS_ROC_S1]

This is the logic setting used to select operating performance of zero sequence overcurrent
protection of side 1 during VT circuit failure.

“1”: when VT circuit failure on side 1 is detected, zero-sequence voltage element of the side can
not pick up.

“0”: when VT circuit failure on side 1 is detected, the element will pick up and the
voltage-controlled zero-sequence overcurrent element will become a pure zero-sequence
overcurrent relay.

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Chapter 7 Settings

11 No.11— [Opt_Dir_ROC_S1]

Logic setting [Opt_Dir_ROC_S1] is used to select the direction of every stage of zero sequence
overcurrent protection. If this logic setting is set as “1”, the direction is transformer and reach angle
is 225º. If this logic setting is set as “0”, the direction is power system and reach angle is 75º..

This is the logic setting used to select the direction of zero-sequence overcurrent protection.

“0”means the direction is power system and reach angle is 75º.

“1”means the direction is transformer and reach angle is 225 º.

7.4.2.5.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S1 EF PROT

7.4.2.6 Earth Fault Protections of side 2 and side 3

7.4.2.6.1 Setting List

Table 7.4-21 Settings list of earth fault protection of side 2

No. Symbol Range Step Remark


1 I_ROC1_S2 0.1~ 20In 0.01A
2 t_ROC1_S2 0.00~10.00s 0.01s
3 I_ROC2_S2 0.1~ 20In 0.01A
4 t_ROC2_S2 0.00~10.00s 0.01s
5 TrpLog_ROC1_S2 0000-1FFF
6 TrpLog_ROC2_S2 0000-1FFF

Table 7.4-22 Settings list of earth fault protection of side 3

No. Symbol Range Step Remark


1 I_ROC1_S3 0.1~ 20In 0.01A
2 t_ROC1_S3 0.00~10.00S 0.01s
3 I_ROC2_S3 0.1~ 20In 0.01A
4 t_ROC2_S3 0.00~10.00S 0.01s
5 TrpLog_ROC1_S3 0000-1FFF
6 TrpLog_ROC2_S3 0000-1FFF

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

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Chapter 7 Settings

7.4.2.6.2 Explanation of the Parameters and Notice for Setting

NOTE: The settings of earth fault protection of side 2 and those of side 3 are similar, so

only setting descriptions of the settings of side 2 are given below as an example.

1 No.1— [I_ROC1_S2]

Setting of stage 1 of zero sequence overcurrent protection of side 2. Please note side 2 and 3 are
called branches of start-up/standby transformer.

Two stages with one delay are usually provided for residual overcurrent protection of branch of
startup/standby transformer. Stage 1 will operate to trip circuit breaker of the branch and stage 2
will operate to trip both circuit breakers of HV and LV sides.

(1) Configuring scheme

(3 I )
(3I 0 )OPI K c(0n 1)  0 set
nTA 0

(3I o )OPI is the setting [I_ROC1_S2];

(3I o ) set is the primary operating current of maximum level of zero sequence overcurrent

protection of outlet of HV side power plant;

K c0 is coordination coefficient and 1.1 is recommended;

nTA 0 is ratio of zero-sequence current transformer of side 2;

n is level of system zero-sequence overcurrent protection and 3-5 is recommended.


(2) Sensitivity check

3I
K sen  k .o .min
I op .o

Where:

3 I k .o. min is minimal secondary zero sequence current passing through location of the protection

equipment during ground fault at end of protected section of stage 1 or 2.

I op .o is setting of stage 1 or 2 of residual overcurrent protection.

K sen ≥1.5 Is required.

2 No.2— [t_ROC1_S2]

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Chapter 7 Settings

Time delay of stage 1 of zero sequence overcurrent protection of side 2.

The delay is configured according to step ladder principle.

3 No.3— [I_ROC2_S2]

Setting of stage 2 of zero sequence overcurrent protection of side 2.

(1) Configuring scheme

(3I 0 )OPII K rel (3I 0 ) OPI

Where:

(3I 0 )OPII is the setting [I_ROC2_S2];

(3I 0 )OPI is the setting [I_ROC1_S2];

K rel is reliability coefficient.

(2) Sensitivity check: criterion is same to that of stage 2 of zero sequence overcurrent protection.

4 No.4— [t_ROC2_S2]

Time delay of stage 2 of zero sequence overcurrent protection of side 2.

The delay shall coordinate with stage 1 of residual overcurrent protection of side 2.

5 No.5— [TrpLog_ROC1_S2]

Tripping output logic setting of stage 1 of zero sequence overcurrent protection of side 2 Refer to
section 7.4.1.1.2 for more information about it.

6 No.6— [TrpLog_ROC2_S2]

Tripping output logic setting of stage 2 of zero sequence overcurrent protection of side 2. Refer to
section 7.4.1.1.2 for more information about it.

7.4.2.6.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S2 EF PROT

MENU -> SETTINGS -> PROT SETTINGS -> S3 EF PROT

7.4.2.7 Gap earth fault Protection

This submenu is used for configuration of gap earth fault protection for transformer which neutral
point is not earthed or earthed through air gap.

During transformer operation, transformer neutral point probably is earthed or not earthed

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Chapter 7 Settings

according to dispatching center requirement. When neutral point probably is earthed through air
gap or not earthed, gap earth fault protection including zero-sequence overvoltage and gap
zero-sequence overcurrent protections should be enabled.

7.4.2.7.1 Setting List

Table 7.4-23 Settings list of gap earth fault protection

No. Symbol Range Step Remark


1 I_ROC1_Gap 0.1~ 20In 0.01A
2 t_ROC11_Gap 0.00~10.00s 0.01s
3 t_ROC12_Gap 0.00~10.00s 0.01s
4 V_ROV1_Gap 10.00~220.00V 0.01V
5 t_ROV11_Gap 0.00~10.00s 0.01s
6 t_ROV12_Gap 0.00~10.00s
7 V_Alm_ROV 10.00~220.00V 0.01V
8 t_Alm_ROV 0.00~10.00s 0.01s
9 TrpLog_ROC11_Gap 0000-1FFF
10 TrpLog_ROC12_Gap 0000-1FFF
11 TrpLog_ROV11_Gap 0000-1FFF
12 TrpLog_ROV12_Gap 0000-1FFF
13 En_Alm_ROV 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.2.7.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_ROC1_Gap]

Setting of stage 1 of gap zero-sequence overcurrent protection.

(1) Configured principle

100
I OP  (A)
nTA

Where:

I OP is the setting [I_ROC1_Gap].

nTA is ratio of zero-sequence current transformer used for gap zero-sequence overcurrent
protection, which is installed in series between air gap and earth.

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Chapter 7 Settings

2 No.2— [t_ROC11_Gap]

Time delay 1 for stage 1 of gap zero-sequence overcurrent protection.

The delay should longer than the duration of transient process and 0.3-0.5 s is recommended.

3 No.3— [t_ROC12_Gap]

Time delay 2 stage 1 of gap zero-sequence overcurrent protection.

4 No.4— [V_ROV1_Gap]

The setting is of gap zero-sequence overvoltage protection, which is derived from open-delta side
of voltage transformer.

(1) Configuring principle

Operating equation is following equation.

(3U0 ) max (3U0 ) OP (3U0 ) w

Where:

(3U0 ) max is maximum residual voltage of open-delta side of voltage transformer for residual

overvoltage protection when fault occurs on the HV side busbar in part earthed power system.

(3U0 )w is open-delta voltage when voltage of transformer neutral point is equal to U w withstand

voltage of power frequency

(3U0 ) max and (3U 0 )w can be derived from following criteria:

3 U K [0]
(3U0 )max  
2  nTA 0
3U
(3U0 )w Krel  w
1.8nTA 0

Where :  is coefficient which is equal to Z 0 Z . Z 0 and Z 1 are system total


1

zero-sequence and positive-sequence impedance of HV side busbar respectively.

U K [0] is maximum phase voltage of operation of HV side busbar.

Krel is reliability coefficient and 0.9 is recommended.

nTA0 is ratio of primary phase voltage of voltage transformer to one third of open-delta voltage.

1.8 is transient coefficient.

Considering U K [0] is equal to primary rated voltage of VT approximately, above equation can be

changed to:

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Chapter 7 Settings

3
(3U0 ) max  100
2 
Operating equation is changed to:

3 3U
100 (3U0 ) OP 0.5  w
2  nTA0
Where:

Value approaching to minimum is recommended. For 3 , maximum value is


3 3
100 180 V。Generally, (3U 0 )OP is in the range of 150V~180V。
2 3
(2) Sensitivity check

If part earthed system is changed to unearthed system, residual overvoltage protection must

operate when single-phase earth fault occurs. At this time  , (3U 0 ) max  300 V is derived

from approximate equation. Considering saturation of VT, 220-230 is more accurate.

When (3U 0 )OP 170 , following can be derived.

220
Ksen  1.29
170
5 No.5— [t_ROV11_Gap]

Time delay 1 for stage 1 of gap zero-sequence overvoltage protection.

6 No.6— [t_ROV12_Gap]

Time delay 2 for stage 1 of gap zero-sequence overvoltage protection.

7 No.7— [V_Alm_ROV]

Setting of zero-sequence overvoltage alarm element.

8 No.8— [V_Alm_ROV]

Time delay of zero-sequence overvoltage alarm eleme.

9 No.7— [TrpLog_ROC11_Gap]

Tripping output logic setting of delay 1 of stage 1 of gap zero sequence overcurrent protection.
Please refer to section 7.4.1.1.2 for more information about it.

10 No.8— [TrpLog_ROC12_Gap]

Tripping output logic setting of delay 2 of stage 1 of gap zero sequence overcurrent protection.
Please refer to section 7.4.1.1.2 for more information about it.

11 No.9— [TrpLog_ROV11_Gap]

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Chapter 7 Settings

Tripping output logic setting of delay 1 of stage 1 of gap zero sequence overvoltge protection.
Please refer to section 7.4.1.1.2 for more information about it.

12 No.10— [TrpLog_ROV12_Gap]

Tripping output logic setting of delay 2 of stage 1 of gap zero sequence overvoltge protection.
Please refer to section 7.4.1.1.2 for more information about it.

13 No.13— [En_Alm_ROV]

This is the logic setting of enabling zero-sequence overvoltage alarm element.

7.4.2.7.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> GAP EF PROT

7.4.2.8 Overload Protection

This submenu is used for configuration the parameters for overload protection. Parameter cell
[En_OvLd] should be set as “1”to enable overload protection.

In addition, first of all, zero-sequence CT should be selected for overload protection. Please refer
to setting [Cfg_CT_OvLd] in section 7.2.2

7.4.2.8.1 Setting List

Table 7.4-24 Settings list of overload protection

No. Symbol Range Step Remark


1 I_Alm_OvLd 0.10~50.00A 0.01A
2 t_Alm_OvLd 0.00~100.00s 0.01s
3 I_InitCool_OvLd 0.10~50.00A 0.01A
4 t_InitCool_OvLd 0.00~100.00s 0.01s
5 I_Blk_OLTC_OvLd 0.10~50.00A 0.01A
6 t_Blk_OLTC_OvLd 0.00~100.00s 0.01s
7 I_CCE 0.10~50.00A 0.01A
8 TrpLog_CCE 0000-1FFF 1
9 En_Alm_OvLd 0/1 1 1: enable ; 0: disable
10 En_InitCool_OvLd 0/1 1 1: enable ; 0: disable
11 En_Blk_OLTC_OvLd 0/1 1 1: enable ; 0: disable
12 En_BO_CCE 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

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Chapter 7 Settings

7.4.2.8.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_Alm_OvLd]

Current setting for overload alarm. When actual secondary current is larger than this setting value
and the predefined time delay has elapsed, alarm information of overload will be issued.

2 No.2— [t_Alm_OvLd]

Time delay of overload alarm.

3 No.3— [I_InitCool_OvLd]

Current setting for initiating air cooling mechanism when the transformer is overloaded.

4 No.4— [t_InitCool_OvLd]

Time delay of initiating air cooling mechanism when the transformer is overloaded.

5 No.5— [I_Blk_OLTC_OvLd]

Current setting for blocking on-load tap changing when the transformer is overloaded.

6 No.6— [t_Blk_OLTC_OvLd]

Time delay of blocking on-load tap changing when the transformer is over overloaded load.

7 No.7— [I_CCE]

Current setting for current control element. If the actual current is larger than the current setting,
equipment will output binary output contacts and tripping output contacts to trip other circuit
breakers depending on setting No.8.

8 No.8— [TrpLog_CCE]

Tripping output logic setting of current control element. Refer to section 7.4.1.1.2 for more
information about it.

9 No.9— [En_Alm_OvLd]

This is the logic setting used to enable overload alarm element.

10 No.10— [En_InitCool_OvLd]

This is the logic setting used to enable air cooling mechanism initiation function when the
transformer is overloaded.

11 No.11— [En_Blk_OLTC_OvLd]

This is the logic setting used to enable blocking on-load tap changing function when the
transformer is overloaded.

12 No.12— [En_BO_CCE]

This is the logic setting used to enable equipment to output contacts when current control element
picks up.

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Chapter 7 Settings

7.4.2.8.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> OVLD PROT

7.4.3 Used to protect step-down transformer

When the equipment is used to protect step-down transformer, side 1 is called HV side and side 2
and 3 are called branch side. Therefore the configuring principles of side 2 and 3 are similar.

7.4.3.1 Differential Protection

In this part, configuration of settings of differential protection will be described in detail.

7.4.3.1.1 Setting List

Table 7.4-25 Differential protection settings list

No. Symbol Range Step Remark


1 I_Pkp_PcntDiff 0.10~1.50 Ie 0.01Ie
2 I_InstDiff 4~14 Ie 0.01Ie
3 Slope1_PcntDiff 0.05~0.15 0.01
4 Slope2_PcntDiff 0.50~0.80 0.01
5 k_2ndH_PcntDiff 0.10~0.35 0.01
6 I_Alm_Diff 0.10~1.00 Ie 0.01Ie
7 TrpLog_Diff 0000-1FFF
8 En_InstDiff 0/1 1 1:Enable 0:Disable
9 En_PcntDiff 0/1 1 1:Enable 0:Disable
10 En_CTSBlkDiff 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.3.1.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_Pkp_PcntDiff]

This is a pickup setting of percentage current differential protection, which is also the setting of
fault detector of percent differential protection. It should be higher than maximum unbalanced
current of the transformer during normal rated load, i.e.
I cdqd K rel ( K er U m) I e
Where:
I cdqd represents the setting [I_Pkp_PcntDiff];
Ie is secondary calculated rated current of transformer;
Krel is reliability coefficient (generally K rel = 1.3 ~1.5);

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Ker is the ratio error of CT (=0.03X2, for class 10P; =0.01X2, for class 5P and class TP);
U is the maximum deviation (in percentage of rated voltage) due to tap changing;

m is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.

For practical engineering application, Icdqd =(0.3 ~0.5) I e is reasonable and unbalanced current

in differential scheme during maximum load of transformer shall be measured.

2 No.2— [I_InstDiff]

Setting of unrestrained instantaneous differential protection, which is used to clear serious internal

fault quickly and prevent operation delay caused by CT saturation. The setting I cdsd (ie.

[I_InstDiff ]) should be higher than inrush current and maximum unbalanced current due to external
fault or asynchronous closing, generally

I cdsd K I e
Where:
K is a multiple depending on capacity of transformer and the system reactance. 5~ 6 is
recommended for main transformer, 6~8 is recommended for startup/standby transformer and
plant transformer.
I e is secondary calculated rated current of transformer.

Sensitivity coefficient of unrestrained instantaneous differential protection K sen should be

calculated according to the phase-to-phase solid short circuit fault in normal operation condition at

installed point of the relay. K sen ≥ 1.2 is required.

3 No.3— [Slope1_PcntDiff]

Setting of the first slope of percent differential protection, it should be:


K bl1 K er
Where:

K er is the error of current ratio of CT, no more than 0.1. K bl 1 is 0.10-0.20 generally.

Calculation of secondary unbalanced current:

--- For two winding transformer

I unb. max ( K ap K cc K er U m) I k . max

Where:

Definition of K er , U and m have been mentioned above;

Kcc is the “same type coefficient”of CT, 1.0 is recommended.

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Chapter 7 Settings

I k. max is the periodic component (secondary value) of maximum through fault current of

external short circuit fault.

K ap is the coefficient of aperiodic component. K ap = 1.0 if CT at both sides are class TP, or

K ap = 1.5 ~ 2.0 if CT at both sides are class P.

--- For three winding transformer

Take external short circuit fault at LV side as example:

I unb .max K ap K cc K er I k .max U h I k.h .max mI I k .I .max mII I k. II .max
Where:
Definition of K er , K cc and K ap have been mentioned above;
U h is the relative error (to rated voltage Un) of HV side due to tap changing, it is
recommended to adopt the maximum value of deviations to the rated value (in
percentage of rated voltage).

I k .max is the periodic component (secondary value) of maximum short current flowing through

CT close to the fault point when external fault occurred at the LV side.

I k.h . max is the periodic component (secondary value) of current flowing through CT of voltage
changeable side when calculating fault current of external fault at LV side.

I k .I . max and I k .II .max are the periodic components of secondary currents flowing through CT at

other sides during external fault at LV side;

mI and mII are errors caused by difference between ratios of CT (auxiliary CT included if any)
at relevant sides.

Sensitivity check for percent differential protection

The sensitivity coefficient K sen should be calculated according to phase-to-phase short circuit on

outlet of transformer protected by the differential relay in minimum operation mode. From the

calculated minimum short circuit current I k .min and relevant restraint current I res , corresponding

pickup current I op will be found in the operation characteristic curve of percent differential relay,

and then the sensitivity coefficient is:

K sen I k. min / I op

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Chapter 7 Settings

K sen ≥ 2 is required.

4 No.4— [Slope2_PcntDiff]

Second slope of percent differential protection is:


I unb. max* I cdqd * 3k bl1
kbl 2 
I k . max* 3

Where:

Definition of I unb . max* , I cdqd * and I k .max* are almost same to Iunb .max , I cdqd and

I k. max mentioned above, and the only difference is they are per unit values. I e (secondary

calculated rated current of transformer) is the base value of per unit.

k bl 2 =0.70 is recommended.

5 No.5— [k_2ndH_PcntDiff]

Restraint coefficient of second harmonic. This parameter is the blocking threshold of second
harmonic involving in differential current to against inrush current when the transformer is
energized. The differential protection will be blocked when the percentage of second harmonics
reaches the threshold because the percentage of second harmonics is high in inrush current but
low in fault current. In general, the parameter is set to be 15% ~20% and 15% is recommended.

6 No.6— [I_Alm_Diff]

Setting of differential current abnormality alarm. It should be higher than maximum differential
current due to tap changing of the transformer being not in the middle position or other possible
conditions during operation.

7 No.7— [TrpLog_Diff]

Tripping output logic setting of differential protection. Mentioned below are used to specify which
breaker or breakers will be tripped by the protection. This setting comprises following 16 binary
bits and is displayed by a hexadecimal number of 4 digits from 0000H to 0FFFH.
The tripping output logic setting of RCS-985TS is defined below.
Bits Function
0 Protection enabled
1 TrpOutp1
2 TrpOutp2
3 TrpOutp3
4 TrpOutp4
5 TrpOutp5
6 TrpOutp6

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Chapter 7 Settings

7 TrpOutp7
8 TrpOutp8
9 TrpOutp9
10 TrpOutp10
11 TrpOutp11
12 TrpOutp12
13-15 No definition
“TrpOutput 1”means to drive the 1st group of tripping output relays to operate.
Set bit “0”as 1 means this protection element will trip breaker or breakers. The bit corresponding
to the breaker to be tripped shall be set as“1”and other bits shall be “0”. For example, if
differential protection is defined to “Trpoutp 5”(the 5th group of tripping output relays), the “0”bit
and “5”bit shall be set as “1”and other bits “0”. Then a hexadecimal number 0021H is formed as
the tripping output logic setting.
Please note that tripping output logic settings of the equipment have to be set on basis of
application-specific drawings.

All the tripping logic settings mentioned below is defined as same as this one.

NOTE Tripping output logic settings have to be set on basis of application -specific

drawings and please refer to section 6.3.1 to configure those settings.

8 No.8— [En_InstDiff]

This it the logic setting used to enable unrestrained instantaneous differential protection.

9 No.9— [En_PcntDiff]

This it the logic setting used to enable percent differential protection.

10 No.10— [En_CTSBlkDiff]

This it the logic setting used to select operating characteristic of percent differential protection
when differential CT circuit failure.

“0”: means percent differential protection is not blocked when differential CT circuit failure.

“1”: means percent differential protection is blocked when differential CT circuit failure.

7.4.3.1.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> DIFF PROT

7.4.3.2 Restricted earth fault protections

Restricted earth fault protection is also called zero-sequence differential protection. There are
three restricted earth fault protection elements of side 1, side 2 and side 3 and the each element is
independent to another side but with the same protection theory and scheme logic. Here take the

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Chapter 7 Settings

protection of side 1 as an example to give detailed settings explanation.

7.4.3.2.1 Setting list

Table 7.4-26 REF settings list of side 1

No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S1 0.10In-10.00In 0.01In
2 I_InstREF_S1 2In-20In 0.01In
3 Slope_PcntREFS1 0.3-0.7 0.01
4 TrpLog_REF_S1 0000 –1FFF 1
5 En_InstREF_S1 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S1 0/ 1 1: enable ; 0: disable

Table 7.4-27 REF settings list of side 2

No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S2 0.10In-10.00In 0.01In
2 I_InstREF_S1 2In-20In 0.01In
3 Slope_PcntREFS2 0.3-0.7 0.01
4 TrpLog_REF_S2 0000 –1FFF 1
5 En_InstREF_S2 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S2 0/ 1 1: enable ; 0: disable

Table 7.4-28 REF settings list of side 3

No. Symbol Range Step Remark


1 I_Pkp_PcntREF_S3 0.10In-10.00In 0.01In
2 I_InstREF_S3 2In-20In 0.01In
3 Slope_PcntREFS3 0.3-0.7 0.01
4 TrpLog_REF_S3 0000 –1FFF 1
5 En_InstREF_S3 0/ 1 1: enable ; 0: disable
6 En_PcntREF_S3 0/ 1 1: enable ; 0: disable

NOTE: Symbol of the parameters listed in above tables is used for communication,

printing and displaying on LCD.

7.4.3.2.2 Explanation of the parameters and notice for setting

NOTE: To configure the settings of zero-sequence percent differential protection, you can

follow the method provided in section 7.4.3.1 calculation of percent differential protection,
where U shall be taken as 0. Polarity of each CT for zero-sequence differential

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protection at various sides is same as shown in Figure 1.1-1 ~ Figure 1.1-4. Positive
polarity of three-phase CT is at busbar side and that of zero-sequence CT is at neutral
point side.

1 No.1--[I_Pkp_PcntREF_S1]

This is pickup setting of zero-sequence percent differential element of restricted earth fault
protection, which is also the setting of fault detector of that element.

 Configuring principle of the setting

Calculation of this setting is based on rated secondary current of the transformer. If a setting got
from calculation is together with its unit Ampere, this setting shall be divided by rated secondary
current of this side of the CT, to get per unit value. The setting of zero - sequence differential
protection shall be greater than the maximum imbalanced current while transformer operates on
normal rated load, i.e.

I0 cdqd K rel (K er m)I n (Equation 7.4-3)

Where:

I0 cdqd represents setting [I_Pkp_PcntREF_S1].

In is rated secondary current of CT.

Krel is reliability coefficient (generally Krel = 1.3 - 1.5).

Ker is the ratio errors of CT (for type 10P, Ker = 0.03×2; for class 5P and class TP, Ker =0.01X2);

m is the error caused by the difference between ratios of CT at all sides, 0.05 is recommended.

For practical engineering calculation, I ocdqd =(0.3 - 0.5)I e is reasonable and unbalanced current

in differential scheme during maximum load of transformer shall be measured.

 Sensitivity check for zero sequence percent differential protection

Sensitivity of restricted earth fault protection shall be checked with the solid earth fault in its

protected zone and K sen ≥ 2 is required ( K sen is the sensitivity coefficient).

In solid earthed system, distribution of zero sequence current for single-phase-to-earth fault
depends on the configuration of zero sequence network of power system. Magnitude of the
single-phase-to-earth fault current depends on not only zero sequence impedance of system but
also the positive and negative sequence impedances. That means different operation modes of
power system also have influence on the current. When power system is in maintenance status,
in order to remain the zero sequence impedance of the system network unchanged and increase

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sensitivity for earth fault protection, the 220 kV power system is generally compensated by
properly changing earth mode of the transformer. Therefore, sensitivity of zero sequence
differential protection shall be checked in minimum operation mode for 220 kV power system.

2 No.2--[I_InstREF_S1]

Setting of unrestrained instantaneous zero-sequence differential protection element of restricted


earth fault protection, this protection is used to clear serious single-phase-to-earth fault quickly
and prevent operation delay caused by CT saturation.

3 No.3--[Slope_PcntREF_S1]

Restraint coefficient of zero-sequence percent differential protection element of restricted earth


fault protection.

4 No.4--[TrpLog_REF_S1]

Tripping output logic setting of restricted earth fault protection which is used to specify which
breaker or breakers will be tripped by the protection.

5 No.5--[En_InstREF_S1]

Logic setting of enabling unrestrained instantaneous zero-sequence differential protection element


of restricted earth fault protection.

6 No.6--[En_PcntREF_S1]

Logic setting of enabling zero-sequence percent differential protection element of restricted earth
fault protection.

7.4.3.2.3 Setting path

Settings of restricted earth fault protection of side 1, side 2 and side 3 accessible in the following
path respectively:
Main Menu -> SETTING -> PROT SETTINGS -> S1 REF PROT
Main Menu -> SETTING -> PROT SETTINGS -> S2 REF PROT
Main Menu -> SETTING -> PROT SETTINGS -> S3 REF PROT

7.4.3.3 Phase-to-phase fault Protection of Side 1

7.4.3.3.1 Setting List

able 7.4-29 settings list of phase-to-phase fault protection of side 1

No. Symbol Range Step Remark


1 V_NegOV_VCE_S1 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S1 10.00~100.00V 0.01V
3 I_OC1_S1 0.1~ 20In 0.01A
4 t_OC1_S1 0.00~10.00s 0.01s
5 I_OC2_S1 0.1~ 20In 0.01A

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No. Symbol Range Step Remark


6 t_OC2_S1 0.00~10.00S 0.01s
7 I_OC3_S1 0.1~ 20In 0.01A
8 t_OC3_S1 0.00~10.00s 0.01s
9 TrpLog_OC1_S1 0000-1FFF
10 TrpLog_OC2_S1 0000-1FFF
11 TrpLog_OC3_S1 0000-1FFF
12 En_VCE_OC1_S1 0/1 1 1: enable ; 0: disable
13 En_VCE_OC2_S1 0/1 1 1: enable ; 0: disable
14 En_S1.VCE_OC_S1 0/1 1 1: enable ; 0: disable
15 En_S2.VCE_OC_S1 0/1 1 1: enable ; 0: disable
16 En_S3.VCE_OC_S1 0/1 1 1: enable ; 0: disable
17 Opt_VTS_OC_S1 0/1 1
18 En_Mem_Curr 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.3.3.2 Explanation of the Parameters and Notice for Setting

1 No.1— [V_NegOV_VCE_S1]

Setting of negative sequence voltage control element of side 1. Setting and displayed value of
negative sequence voltage are U2.

(1) Configuring principle – voltage control element

Negative sequence voltage is taken from LV side usually. The operating negative sequence

voltage shall be higher than maximal unbalance voltage. Generally, U 2.op (0.06 0.08)U N is

recommended and U N is secondary rated voltage.

(2) Sensitivity check – voltage control element

U2
U2 
Ksen  1.5
nTV U 2OP

Where:

U 2 is negative sequence voltage (phase voltage) of LV side busbar of the step-down transformer,

when two-phase short circuit fault occurs on the end of line.

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nTV is ratio of VT.

U 2 .op is the setting.

2 No.2— [Vpp_UV_VCE_S1]

Setting of low voltage control element of side 1.

(1) Configuring principle – voltage control element

Phase-to-phase voltage is taken from LV side usually. The setting shall be higher than the lowest
voltage during starting process of the largest motor connected with the LV busbar.

It is taken as U op 0.6U n usually and U N is the rated phase-to-phase voltage. However, if

impedance of the step-down transformer is relatively large, it can be taken as

U op (0.55 0.6)U n .

(2) Sensitivity check – voltage control element

UOP
U 
Ksen  1.5
nTV U1

Where:

U OP is the setting [Vpp_UV_VCE_S1].

nTV is ratio of VT.

U 1 is phase-to-phase voltage of LV side busbar of the step-down transformer, when three-phase


short circuit fault occurs on the end of line.

3 No.3— [I_OC1_S1]

Setting of stage 1 of overcurrent protection of side 1.

There are two kinds of configuring phase-to-phase fault protection of HV side. One is overcurrent
protection without voltage control, which operating current should be higher than the starting
current of motor. Therefore operating current is relatively high, which disadvantage is that it can
not provide full backup protection for HV side plant system such as fault occurring on the end of
long cable.

The other is voltage controlled overcurrent protection, which operating current is relatively low, so
it can provide full backup protection for HV side plant system. However If voltage of LV side busbar
of step-down transformer is adopted for voltage control element, following disadvantage exists.

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During generator starting up and increasing voltage or power supply having been not switched to
step-down transformer, if short-circuit fault occurs in step-down transformer or fault occurs
between circuit breaker of branch and LV side, the protection will no operate. Therefore, it is
recommended that voltage of LV side (if there is VT between LV side of step-down transformer and
circuit breaker of branch) is adopted for voltage control element to eliminate the disadvantage.

(1) Configuring principle - overcurrent protection

Operating current I OPI should be higher than the operating current of stage 1 of LV side branch,

which is the setting [I_OC1_S2] or [I_OC1_S3].

For two-winding step-down transformer, the equation is

K I n
I OPI  co OP ( L/ ) TA
K T nTA

For three-winding step-down transformer, the equation is

(K I n I10a )
I OPI  co OP ( L ) TA
/
K T nTA

Where:

I OPI is the setting [I_OC1_S1].

Kco is cooperating coefficient and 1.1 is recommended;

IOPI ( L ) is operating current of one branch of LV side,I_OC1_S2] or [I_OC1_S3], and please refer to

the corresponding setting configuration. Please note the setting should be higher than the
maximum load current of LV side branch.

nTA is ratio of CT of one branch of LV side.

I10a is normal operating current of the other LV side branch.

n 'TA is ratio of CT dedicated for phase-to-phase fault protection.

KT is ratio of step-down transformer.

(2) Sensitivity Check - overcurrent protection

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I (2)
Ksen  ' K min 1.5
n TA IOPI

Where:

( 2)
I k .min is fault current through step-down transformer during phase-to-phase short circuit fault
occurs on outlet of LV side of the transformer.

n 'TA is ratio of CT dedicated for phase-to-phase fault protection.

I OPI is the setting [I_OC1_S1].

(3) Configuring principle – voltage controlled overcurrent protection

Operating current of stage1 shall be higher than maximal current passing through the protection
equipment during three phase fault on LV side outlet of the startup/standby transformer:

I K(3).max
IOPI Krel
nTA
1 S
K .max 
I (3)  B
X max X T 3U B
Where:

Krel is the reliability coefficient and 1.3 is recommended;

Kr is the return coefficient and 0.85 – 0.95 recommended;

I k(3.max
)
is the maximum secondary current passing through HV side when three phase fault occurs

on LV side outlet of the startup/standby transformer.

nTA is current transformer ratio;

X max is per unit value of system reactance, which base value is S B , when HV side of the

start-up/standby transformer in maximum mode of operation;

U B is even rated voltage of HV side.

4 No.4— [t_OC1_S1]

Time delay of stage 1 of overcurrent protection of side 1.

(1)Configuring principle - overcurrent protection

The delay should coordinate with stage 1 of branch of LV side.

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(2) Configuring principle - voltage controlled overcurrent protection

No.1 setting [I_OC1_S1] is unaffected by increase of load current of the transformer when the HV
side voltage drops down due to system oscillation, so delay of this protection shall coordinate with
main protection only without considering oscillation period. [t_OC1_S1]=0.5 s is recommended
generally.

5 No.5— [I_OC2_S1]

Setting of stage 2 of overcurrent protection of side 1.

(1) Configuring principle - overcurrent protection

The setting is equal to operating current of stage 1 of overcurrent protection of side 1, which is
[I_OC1_S1].

There are the following two configuring principles for the settings of voltage controlled overcurrent
protection.
(2) Configuring Principle 1 – voltage controlled overcurrent protection
The setting shall be based the condition that the protection can return reliably when rated current
passes through HV side:

K I
IOPII  rel  N
Kr nTA

Where:

K rel is reliable coefficient and 1.2 is recommended;

K r is return coefficient and 0.9 is recommended;

I N is rated current of HV side of the transformer;

nTA is current transformer ratio.

(3) Configuring Principle2 – voltage controlled overcurrent protection


The setting shall coordinate with that of stage 2 of overcurrent protection of LV side branch:

U LN 1
I opII K CO ( I opII ( L ) nTAL I10 a ) 
U HN nTA

Where:

K CO is the coordination coefficient and 1.1 is recommended;

I opII (L) is the secondary operating current of stage 2 of overcurrent protection of LV side branch of

the startup/standby transformer;

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I10 a is the normal operating current of another LV side branch;

U LN is the real voltage ratio of LV side to HVside;


U HN

nTAL is the current ratio of CT used by overcurrent protection of the LV side branch;

nTA is the current ratio of HV side CT.

Generally, when voltage control element for stage 2 of overcurrent protection is enabled, the first
configuring principle is adopted. However, if secondary principle is adopted, voltage control
element for stage 2 is selectable.
(4) Sensitivity check – voltage controlled overcurrent protection

I (2)
Ksen I  K 1.3
nTA IOPII

Where:

I K (2) is short -circuit current flowing through HV side of the transformer when two-phase short

circuit occurs on the end of line.

nTA is the current ratio of HV side CT.

6 No.6— [t_OC2_S1]

Time delay of stage 2 of overcurrent protection of side 1.

(1) Configuring principle 1 - overcurrent protection

The delay should coordinate with stage 2 of overcurrent protection of branch of LV side or be set
as the value of No.3 setting [I_OC1_S1].

(2) Configuring principle 2 - voltage controlled overcurrent protection

The setting shall coordinate with stage 2 of overcurrent pr otection of LV side branch of the

transformer. It can be taken as t 2 t '2 t t usually, where t 2' is delay of stage 2 of LV

side branch, t is the step difference. Since this delay is longer than oscillation period, so even
if stage 2 of overcurrent element operates due to HV side voltage drop during system oscillation,
stage 2 of overcurrent protection will not operate incorrectly.

7 No.7— [I_OC3_S1]

Setting of stage 3 of overcurrent protection of side 1.

8 No.8— [t_OC3_S1]

Time delay of stage 3 of overcurrent protection of side 1.

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9 No.9— [TrpLog_OC1_S1]

Tripping output logic setting of stage 1 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

10 No.10— [TrpLog_OC2_S1]

Tripping output logic setting of stage 2 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

11 No.11— [TrpLog_OC3_S1]

Tripping output logic setting of stage 3 of overcurrent protection of side1. Refer to section 7.4.1.1.2
for more information about it.

12 No.12— [En_VCE_OC1_S1]

This is the logic setting used to enable stage 1 of overcurrent protection of side 1 is controlled by
voltage control element of local or other side.

“0”means the stage 1 element of OC is not controlled by voltage control element.

“1”means the stage 1 element of OC is controlled by voltage control element.

13 No.13— [En_VCE_OC2_S1]

This is the logic setting used to enable stage 2 of overcurrent protection of side 1 is controlled by
voltage control element of local or other side.

“0”means the stage 2 element of OC is not controlled by voltage control element.

“1”means the stage 2 element of OC is controlled by voltage control element.

14 No.14— [En_S1.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of local side.

15 No.15— [En_S2.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of side 2.

“0”means the OC protection is not controlled by voltage control element of side 2.

“1”means the OC protection is controlled by voltage control element of side 2.

16 No.16— [En_S3.VCE_OC_S1]

This is the logic setting used to enable overcurrent protection of side 1 is controlled by voltage
control element of side 3.

“0”means the OC protection is not controlled by voltage control element of side 3.

“1”means the OC protection is controlled by voltage control element of side 3.

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NOTE: The relation between No.12-No.16 settings is described in following.

(1) No.12 and NO.13 settings are configured first to decide whether OC protection is
controlled by voltage control element. No.12-No.13 settings are multioption, which means
any stage of OC protection can be controlled by voltage control elelment.

(2) If No.12 or No 13 is set as “1”, then No.14-No.16 settings are needed to be configured
to decide which side voltage control element OC is controlled by. No.14 -No.16 settings
are multioption, which means voltage control element of any side can controls OC
protection.

17 No.17— [Opt_VTS_OC_S1]

This is the logic setting used to select operating performance of OC protection of side 1 during VT
circuit failure.

“1”: when VT circuit failure on side 1 is detected, voltage control element of the side can not pick
up.

“0”: when VT circuit failure on side 1 is detected, voltage control element will pick up and the
voltage-controlled overcurrent element will become a pure overcurrent relay.

18 No.18— [En_Mem_Curr]

This is the logic setting to enable memory current function.

“1”, means the function is enabled,

“0”, means the function is disabled.

The setting is set as 1 when protection equipment is used to protect self-excitation generator.

NOTE: For self- excited generator, the function needn’


t be enabled. If this function is

enabled, stage 1 and 2 of overcurrent protection element must be controlled by voltage


control element.

7.4.3.3.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S1 PPF PROT

7.4.3.4 Phase-to-phase Fault Protection of Side 2 and Side 3

Table 7.4-30 Settings list of phase-to-phase fault protection of side 2

No. Symbol Range Step Remark


1 V_NegOV_VCE_S2 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S2 10.00~100.00V 0.01V
3 I_OC1_S2 0.1~ 20In 0.01A

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Chapter 7 Settings

No. Symbol Range Step Remark


4 t_OC1_S2 0.00~10.00s 0.01s
5 I_OC2_S2 0.1~ 20In 0.01A
6 t_OC2_S2 0.00~10.00s 0.01s
7 TrpLog_OC1_S2 0000-1FFF
8 TrpLog_OC2_S2 0000-1FFF 1: enable ; 0: disable
9 En_VCE_OC1_S2 0/1 1 1: enable ; 0: disable
10 En_VCE_OC2_S2 0/1 1 1: enable ; 0: disable
11 En_OC2_SOTF_S2 0/1 1 1: enable ; 0: disable
12 Opt_VTS_OC_S2 0/1 1

Table 7.4-31 Phase-to-phase fault protection settings of side 3

No. Symbol Range Step Remark


1 V_NegOV_VCE_S3 1.00~20.00V 0.01V
2 Vpp_UV_VCE_S3 10.00~100.00V 0.01V
3 I_OC1_S3 0.1~ 20In 0.01A
4 t_OC1_S3 0.00~10.00s 0.01s
5 I_OC2_S3 0.1~ 20In 0.01A
6 t_OC2_S3 0.00~10.00s 0.01s
7 TrpLog_OC1_S3 0000-1FFF
8 TrpLog_OC2_S3 0000-1FFF 1: enable ; 0: disable
9 En_VCE_OC1_S3 0/1 1 1: enable ; 0: disable
10 En_VCE_OC2_S3 0/1 1 1: enable ; 0: disable
11 En_OC2_SOTF_S3 0/1 1 1: enable ; 0: disable
12 Opt_VTS_OC_S3 0/1 1

7.4.3.4.1 Setting List

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.3.4.2 Explanation of the Parameters and Notice for Setting

NOTE: Same symbol in this section has similar meaning to that appears in section 7.4.3.2

and the configuring principle is also similar, so please refer to that section for details.

NOTE: The settings of phase-to-phase fault protection of side 2 and those of side 3 are

similar, so only setting descriptions of side 2 are given as an example below.

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1 No.1— [V_NegOV_VCE_S2]

Setting of negative sequence voltage control element of side 2. Setting and displayed value of
negative sequence voltage are U2.

Calculation of setting of negative-sequence voltage relay is the same as that of phase-to-phase


fault protection of side 1, so please refer to section 7.4.2.3.2 for details.

2 No.2— [Vpp_UV_VCE_S2]

Setting of low voltage control element of side 2.

Calculation of setting of low-voltage voltage relay is the same as that of phase-to-phase fault
protection of side 1, so please refer to section 7.4.2.3.2 for details.

3 No.3— [I_OC1_S2]

Setting of stage 1 of overcurrent protection of side 2.

(1) The setting of stage 1 shall coordinate with insensitive of instantaneous overcurrent protection
of largest motor connected with HV power plant busbar:

PN 1
I opI ( L ) K co K rel K st 
3U N cos  n TA

Where:

I opI (L ) is the setting [I_OC1_S2];

Krel is the reliability coefficient and 1.5 is recommended generally;

K co is the coordination coefficient and 1.1 is recommended generally;

K st is the multiple of starting current of motor and 7 is recommended generally;

PN is the power of the largest motor (pump for water supply) connected with the HV power plant

busbar,

U N is the rated voltage of the motor;

cos  is the power coefficient of the motor and 0.75 is recommended generally;

nTA is the current ratio of CT of the branch side.

(2) Sensitivity check

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Chapter 7 Settings

(2)
I
Ksen  K 1.3
nTA IOPI ( L )

Where:

K sen is sensitivity coefficient of the setting [I_OC1_S2].

I (K2 ) is short circuit current of overcurrent protection when two-phase short circuit fault occurs on
HV power plant busbar in minimum mode of operation of start-up/standby transformer.

I opI (L ) is the setting[I_OC1_S2];

nTA is the current ratio of CT of the branch side.

4 No.4— [t_OC1_S2]

Time delay of stage 1 of overcurrent protection of side 2.

The delay shall coordinate with delay of instantaneous overcurrent protection on outlet of HV
power plant busbar.

5 No.5— [I_OC2_S2]

Setting of stage 2 of overcurrent protection of side 2.

(2) Configuring principle 1


The setting shall be based the condition that the protection can return reliably when rated current
passes through the branch:

K I
I opII  rel  N
K r nTA

Where:

Krel is the reliability coefficient and 1.2 is recommended generally;

Kr is the return coefficient and 0.85 – 0.9 is recommended;

I N is rated current of branch of the startup/standby transformer.

nTA is ratio of current transformer of branch side.

Both stage1 and 2 can be controlled by voltage control element by configuring corresponding
logic settings, and it is recommended that stage 2 is controlled by voltage control element.

6 No.6— [t_OC2_S2]

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Time delay of stage 2 of overcurrent protection of side 2.

The delay shall coordinate with delay of outlet of HV power plant busbar.

7 No.7— [TrpLog_OC1_S2]

Tripping output logic setting of stage 1 of overcurrent protection of side2. Refer to section 7.4.1.1.2
for more information about it.

8 No.8— [TrpLog_OC2_S2]

Tripping output logic setting of stage 2 of overcurrent protection of side 2. Refer to section
7.4.1.1.2 for more information about it.

9 No.9— [En_VCE_OC1_S2]

This is the logic setting used to enable stage 1 of overcurrent protection of side 2 is controlled by
voltage control element of local or other side.

10 No.10— [En_VCE_OC2_S2]

This is the logic setting used to enable stage 2 of overcurrent protection of side 2 is controlled by
voltage control element of local or other side.

11 No.11— [En_OC2_SOTF_S2]

This is the logic setting used to enable accelerating trip function of state 2 of OC protection of side
2 when switching one to fault.

“0”means the accelerating trip function is enabled.

“0”means the accelerating trip function is disabled.

12 No.12— [Opt_VTS_OC_S2]

This is the logic setting used to select operating performance of OC protection of side 2 during VT
circuit failure.

7.4.3.4.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> S2 PPF PROT

MENU -> SETTINGS -> PROT SETTINGS -> S3 PPF PROT

7.4.3.5 Earth Fault protection of side 1

7.4.3.5.1 Setting List

Table 7.4-32 Settings list of earth fault protection of side 1

No. Symbol Range Step Remark


1 I_ROC1_S1 0.1~ 20In 0.01A
2 t_ROC1_S1 0.00~10.00s 0.01s

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No. Symbol Range Step Remark


3 I_ROC2_S1 0.1~ 20In 0.01A
4 t_ROC2_S1 0.00~10.00s 0.01s
5 TrpLog_ROC1_S1 0000-1FFF
6 TrpLog_ROC2_S1 0000-1FFF
7 Opt_3I0_ROC_S1 0/1 1
8 En_Dir_ROC1_S1 0/1 1 1: enable ; 0: disable
9 En_Dir_ROC2_S1 0/1 1 1: enable ; 0: disable
10 Opt_VTS_ROC_S1 0/1 1
11 Opt_Dir_ROC_S1 0/1 1

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.3.5.2 Explanation of the Parameters and Notice for Setting

NOTE: HV side (i.e. side 1) winding of step-down transformer is delta connected, so the

settings of earth fault protection of side 1 are not needed to be configured.

1 No.1— [I_ROC1_S1]

Setting of stage 1 of zero sequence overcurrent protection of side 1.

2 No.2— [t_ROC1_S1]

Time delay of stage 1 of zero sequence overcurrent protection of side 1.

3 No.3— [I_ROC2_S1]

Setting of stage 2 of zero sequence overcurrent protection of side 1.

4 No.4— [t_ROC2_S1]

Time delay of stage 2 of zero sequence overcurrent protection of side 1.

Delay of stage 2 shall coordinate with the longest delay of backup stage of residual overcurrent
protection of HV side outlet.

5 No.15— [TrpLog_ROC1_S1]

Tripping output logic setting of stage 1 of zero sequence overcurrent protection of side 1. Refer to
section 7.4.1.1.2 for more information about it.

6 No.16— [TrpLog_ROC2_S1]

Tripping output logic setting of stage 2 of zero sequence overcurrent protection of side 1. Refer to
section 7.4.1.1.2 for more information about it.

7 No.21— [Opt_3I0_ROC_S1]

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This is the logic setting used to select where zero sequence current is derived.

“0”means zero sequence current is derived from zero-sequence CT installed at neutral point.

“1”means zero sequence current is derived from calculation.

8 No.22— [En_Dir_ROC1_S1]

This is the logic setting used to select whether stage 1 of zero sequence overcurrent of side 1
controlled by zero-sequence direction element.

“0”means not being controlled by direction element.

“1”means not controlled by direction element.

9 No.23— [En_Dir_ROC2_S1]

This is the logic setting used to select whether stage 2 of zero sequence overcurrent of side 1
controlled by zero-sequence direction element.

“0”means not being controlled by direction element.

“1”means not controlled by direction element.

10 No.24— [Opt_VTS_ROC_S1]

This is the logic setting used to select operating performance of zero sequence overcurrent
protection of side 1 during VT circuit failure.

“1”: when VT circuit failure on side 1 is detected, zero-sequence voltage element of the side can
not pick up.

“0”: when VT circuit failure on side 1 is detected, the element will pick up and the
voltage-controlled zero-sequence overcurrent element will become a pure zero-sequence
overcurrent relay.

11 No.25— [Opt_Dir_ROC_S1]

Logic setting [Opt_Dir_ROC_S1] is used to select the direction of every stage of zero sequence
overcurrent protection. If this logic setting is set as “1”, the direction is transformer and reach angle
is 225º. If this logic setting is set as “0”, the direction is power system and reach angle is 75º..

This is the logic setting used to select the direction of zero-sequence overcurrent protection.

“0”means the direction is power system and reach angle is 75º.

“1”means the direction is transformer and reach angle is 225 º.

7.4.3.5.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> EF PROT

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7.4.3.6 Earth Fault protections of side 2 and side 3

7.4.3.6.1 Setting List

Table 7.4-33 Settings list of earth fault protection of side 2

No. Symbol Range Step Remark


1 I_ROC1_S2 0.1~ 20In 0.01A
2 t_ROC1_S2 0.00~10.00s 0.01s
3 I_ROC2_S2 0.1~ 20In 0.01A
4 t_ROC2_S2 0.00~10.00s 0.01s
5 TrpLog_ROC1_S2 0000-1FFF
6 TrpLog_ROC2_S2 0000-1FFF

Table 7.4-34 Settings list of earth fault protection of side 3

No. Symbol Range Step Remark


1 I_ROC1_S3 0.1~ 20In 0.01A
2 t_ROC1_S3 0.00~10.00S 0.01s
3 I_ROC2_S3 0.1~ 20In 0.01A
4 t_ROC2_S3 0.00~10.00S 0.01s
5 TrpLog_ROC1_S3 0000-1FFF
6 TrpLog_ROC2_S3 0000-1FFF

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.3.6.2 Explanation of the Parameters and Notice for Setting

NOTE: The settings of earth fault protection of side 2 and those of side 3 are similar, so

only setting descriptions of the settings of side 2 are given below as an example.

1 No.1— [I_ROC1_S2]

Setting of stage 1 of zero sequence overcurrent protection of side 2. Please note side 2 and 3 are
called branches of start-up/standby transformer.

Two stages with one delay are usually provided for residual overcurrent protection of branch of
startup/standby transformer. Stage 1 will operate to trip circuit breaker of the branch and stage 2
will operate to trip both circuit breakers of HV and LV sides.

(1) Configuring scheme

(3 I )
(3I 0 )OPI K c(0n 1)  0 set
nTA 0

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(3I o )OPI is the setting [I_ROC1_S2];

(3I o ) set is the primary operating current of maximum level of zero sequence overcurrent

protection of outlet of HV side power plant;

K c0 is coordination coefficient and 1.1 is recommended;

nTA 0 is ratio of zero-sequence current transformer of side 2;

n is level of system zero-sequence overcurrent protection and 3-5 is recommended.


(2) Sensitivity check

3I
K sen  k .o .min
I op .o

Where:

3 I k .o. min is minimal secondary zero sequence current passing through location of the protection

equipment during ground fault at end of protected section of stage 1 or 2.

I op .o is setting of stage 1 or 2 of residual overcurrent protection.

K sen ≥1.5 Is required.

2 No.2— [t_ROC1_S2]

Time delay of stage 1 of zero sequence overcurrent protection of side 2.

The delay is configured according to step ladder principle.

3 No.3— [I_ROC2_S2]

Setting of stage 2 of zero sequence overcurrent protection of side 2.

(1) Configuring scheme

(3I 0 )OPII K rel (3I 0 ) OPI

Where:

(3I 0 )OPII is the setting [I_ROC2_S2];

(3I 0 )OPI is the setting [I_ROC1_S2];

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K rel is reliability coefficient.

(2) Sensitivity check: criterion is same to that of stage 2 of zero sequence overcurrent protection.

4 No.4— [t_ROC2_S2]

Time delay of stage 2 of zero sequence overcurrent protection of side 2.

The delay shall coordinate with stage 1 of residual overcurrent protection of side 2.

5 No.5— [TrpLog_ROC1_S2]

Tripping output logic setting of stage 1 of zero sequence overcurrent protection of side 2 Refer to
section 7.4.1.1.2 for more information about it.

6 No.6— [TrpLog_ROC2_S2]

Tripping output logic setting of stage 2 of zero sequence overcurrent protection of side 2. Refer to
section 7.4.1.1.2 for more information about it.

7.4.3.6.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> EF PROT

7.4.3.7 Gap earth fault Protection

This submenu is used for configuration of gap earth fault protection for transformer which neutral
point is not earthed or earthed through air gap.

7.4.3.7.1 Setting List

Table 7.4-35 Settings list of gap earth fault protection

No. Symbol Range Step Remark


1 I_ROC1_Gap 0.1~ 20In 0.01A
2 t_ROC11_Gap 0.00~10.00s 0.01s
3 t_ROC12_Gap 0.00~10.00s 0.01s
4 V_ROV1_Gap 10.00~220.00V 0.01V
5 t_ROV11_Gap 0.00~10.00s 0.01s
6 t_ROV12_Gap 0.00~10.00s
7 V_Alm_ROV 10.00~220.00V 0.01V
8 t_Alm_ROV 0.00~10.00s 0.01s
9 TrpLog_ROC11_Gap 0000-1FFF
10 TrpLog_ROC12_Gap 0000-1FFF
11 TrpLog_ROV11_Gap 0000-1FFF
12 TrpLog_ROV12_Gap 0000-1FFF

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No. Symbol Range Step Remark


13 En_Alm_ROV 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

7.4.3.7.2 Explanation of the Parameters and Notice for Setting

NOTE: HV side (i.e. side 1) winding of step-down transformer is usually delta connected,

so the settings of gap earth fault protection of side 1 are not needed to be configured.
However zero-sequence overvoltage alarm element can be configured according to
the actual requirement.

1 No.1— [I_ROC1_Gap]

Setting of stage 1 of gap zero-sequence overcurrent protection.

2 No.2— [t_ROC11_Gap]

Time delay 1 for stage 1 of gap zero-sequence overcurrent protection.

3 No.3— [t_ROC12_Gap]

Time delay 2 stage 1 of gap zero-sequence overcurrent protection.

4 No.4— [V_ROV_Gap]

Setting of gap zero-sequence overvoltage protection.

5 No.5— [t_ROV11_Gap]

Time delay 1 for stage 1 of gap zero-sequence overvoltage protection.

6 No.6— [t_ROV12_Gap]

Time delay 2 for stage 1 of gap zero-sequence overvoltage protection.

7 No.7— [V_Alm_ROV]

Setting of zero-sequence overvoltage alarm element.

8 No.8— [V_Alm_ROV]

Time delay of zero-sequence overvoltage alarm eleme.

9 No.9— [TrpLog_ROC11_Gap]

Tripping output logic setting of delay 1 of stage 1 of gap zero sequence overcurrent protection.
Please refer to section 7.4.1.1.2 for more information about it.

10 No.10— [TrpLog_ROC12_Gap]

Tripping output logic setting of delay 2 of stage 1 of gap zero sequence overcurrent protection.

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Please refer to section 7.4.1.1.2 for more information about it.

11 No.9— [TrpLog_ROV11_Gap]

Tripping output logic setting of delay 1 of stage 1 of gap zero sequence overvoltge protection.
Please refer to section 7.4.1.1.2 for more information about it.

12 No.10— [TrpLog_ROV12_Gap]

Tripping output logic setting of delay 2 of stage 1 of gap zero sequence overvoltge protection.
Please refer to section 7.4.1.1.2 for more information about it.

7.4.3.7.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> GAP EF PROT

7.4.3.8 Overload Protection

This submenu is used for configuration the parameters for overload protection. Parameter cell
[En_OvLd] should be set as “1”to enable overload protection.

In addition, first of all, zero-sequence CT should be selected for overload protection. Please refer
to setting [Cfg_CT_OvLd] in section 7.2.2

7.4.3.8.1 Setting List

Table 7.4-36 Settings list of overload protection

No. Symbol Range Step Remark


1 I_Alm_OvLd 0.10~50.00A 0.01A
2 t_Alm_OvLd 0.00~100.00s 0.01s
3 I_InitCool_OvLd 0.10~50.00A 0.01A
4 t_InitCool_OvLd 0.00~100.00s 0.01s
5 I_Blk_OLTC_OvLd 0.10~50.00A 0.01A
6 t_Blk_OLTC_OvLd 0.00~100.00s 0.01s
7 I_CCE 0.10~50.00A 0.01A
8 TrpLog_CCE 0000-1FFF 1
9 En_Alm_OvLd 0/1 1 1: enable ; 0: disable
10 En_InitCool_OvLd 0/1 1 1: enable ; 0: disable
11 En_Blk_OLTC_OvLd 0/1 1 1: enable ; 0: disable
12 En_BO_CCE 0/1 1 1: enable ; 0: disable

NOTE: The parameters listed in above table are used for communication, printing and

displaying on LCD.

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7.4.3.8.2 Explanation of the Parameters and Notice for Setting

1 No.1— [I_Alm_OvLd]

Current setting for overload alarm. When actual secondary current is larger than this setting value
and the predefined time delay has elapsed, alarm information of overload will be issued.

2 No.2— [t_Alm_OvLd]

Time delay of overload alarm.

3 No.3— [I_InitCool_OvLd]

Current setting for initiating air cooling mechanism when the transformer is overloaded.

4 No.4— [t_InitCool_OvLd]

Time delay of initiating air cooling mechanism when the transformer is overloaded.

5 No.5— [I_Blk_OLTC_OvLd]

Current setting for blocking on-load tap changing when the transformer is overloaded.

6 No.6— [t_Blk_OLTC_OvLd]

Time delay of blocking on-load tap changing when the transformer is over overloaded load.

7 No.7— [I_CCE]

Current setting for current control element. If the actual current is larger than the current setting,
equipment will output binary output contacts and tripping output contacts to trip other circuit
breakers depending on setting No.8.

8 No.8— [TrpLog_CCE]

Tripping output logic setting of current control element. Refer to section 7.4.1.1.2 for more
information about it.

9 No.9— [En_Alm_OvLd]

This is the logic setting used to enable overload alarm element.

10 No.10— [En_InitCool_OvLd]

This is the logic setting used to enable air cooling mechanism initiation function when the
transformer is overloaded.

11 No.11— [En_Blk_OLTC_OvLd]

This is the logic setting used to enable blocking on-load tap changing function when the
transformer is overloaded.

12 No.12— [En_BO_CCE]

This is the logic setting used to enable equipment to output contacts when current control element
picks up.

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7.4.3.8.3 Setting Path

All settings of transformer system parameters are accessible in the following path:

MENU -> SETTINGS -> PROT SETTINGS -> OVLD PROT

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Chapter 8 HMI Operation Introduction

Chapter 8 HMI Operation Introduction


Human machine interface (HMI) is an important component of the equipment. It is a convenient
facility to access the relay from the front local control panel of the device to view desired
information, such as measurement quantity or binary inputs’state or program version, etc. The
user can also modify some system settings or protection settings via HMI. This function is very
helpful during commissioning before putting the equipment into service.

Furthermore, all above functions can be realized in a remote terminal with SAS software through a
communication bus via a RS-485 port or Ethernet port.

This chapter will describe human machine interface (HMI), menu tree and LCD display of the
equipment. In addition, how to input settings using keypad is described in detail.

8.1 Human Machine Interface Overview

8.1.1 Design

The human-machine interface consists of a human-machine interface (HMI) module which allows a
communication as simple as possible for the user. The HMI module includes:

 A 160×80-dot matrix backlight LCD visible in dim lighting conditions for monitoring status, fault
diagnostics and setting, etc.

 Three LED indicators on the front panel of the RCS-985TS for denoting the status of this
protection operation.

 A 9-key keypad on the front panel of the device for full access to the device.

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Figure 8.1-1 Front panel of RCS-985TS

Indication No. Description


1 LOG, device type and name
2 LCD
3 LED indicators
4 Keypad
5 Manufactory name

8.1.2 Functionality

 The HMI module helps to draw your attention to something that has occurred which may activate
a LED or a report display on the LCD.
 You as the operator may have own interest to view a certain data.
 Use menus navigate through menu commands and to locate the data of interest.

8.1.3 Keypad and keys

The keypad and keys on the front panel of the equipment provide convenience to the operator to
view a certain data or change the device’
s setting.

The keypad contains nine keys, and each key has different function to the other one. Figure 8.1-2
shows the keypad and keys.

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Figure 8.1-2 Keypad mounted on the front panel

No. Key item function


1 “▲ ”, “▼ ”, “◄ “, “► “ Move between selectable branches of the menu tree
2 “+”, “-“ Change parameters or settings
3 ENT Provide Enter/Execute function
4 RST Restart this device unconditionally
5 ESC Exit the present level in the menu tree.

WARNING: Never press key “RST”when the relay is in service, otherwise an uncertain accident
maybe occur.

8.1.4 LED indications


There are three LED indicators, which can indicate the operation state of the device. Figure 8.1-3
shows the LED indicators on the front panel of the device.

Figure 8.1-3 the figure shows the LED indications

Label display Remarks


When the equipment is out of DC power supply or any hardware
Off
HEALTHY defect is detected during self-check.
Steady Green Lit when the equipment is in service and ready for operation.
Off When the equipment is in normal operating condition.
ALARM
Steady Yellow Lit when any abnormality alarm is issued.
Off when the equipment is in normal operating condition
TRIP
Steady Red Lit when any protection element trips.

NOTE:

 The “HEALTHY”LED can only be turned on by supplying DC to equipment again or


pressing “RST”key to restart the relay.
 “ALARM”LED is on as long as alarm exists. When alarm signals disappear, it will
be distinguished. However, when [Alm_CTS] is issued and “ALARM”LED is lit, the

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alarm signal can be reset and “ALARM”LED can be extinguished only when the
failure is removed and one of the following three actions is taken: pressing key “ENT”,
energizing binary input [BI_RstTarg] or receiving reset message from SAS or RTU.
 The “TRIP”LED is extinguished once any protection element operates and remains
lit even after the trip command goes off. “TRIP”LED and corresponding latched
binary outputs can be reset by pressing key “ENT”, energizing binary input [BI_RstTarg]
or receiving reset message from SAS or RTU.

8.2 Understand the HMI menu tree

8.2.1 OVERVIEW

In this part, the main layout of the menu which is shown on the LCD of the local human-machine
interface (HMI) will be described in detail.

Under normal operating condition, the default display (please refer to section 8.3) is always on
LCD. Press key “▲ ”to enter the main menu of the device, which is shown as bellow. If the
current display is the latest report display or self-supervision report, please do as same as above.

Figure 8.2-1 Main menu interface

Press key “▲ ”or “▼ ”to move the cursor and locate the desired item and then press “ENT”to enter
its submenu. If operator wants to exit, please press key “ESC”or menu EXIT to return to upper
level menu.

There are up to 9 items in the main menu.

 1.SETTINGS

 2.VALUES

 3.PRINT

 4.CLOCK

 5.REPORT

 6.CLR REPORT

 7.TRIG OSCLLOG

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 8.VERSION

 0.EXIT

The following figure shows the menu tree structure of this equipment.

Figure 8.2-2 Tree diagram of total command menu

8.2.2 SETTINGS

The menu is used to view and modify the settings of active setting group.

“SETTINGS”has the following submenus.

No. Item Description


1 SYS SETTINGS To view and modify system settings
2 PROT CONFIG To view and configure protection functions
3 PROT SETTINGS To view and modify protection settings
4 EQUIP SETUP To view and modify equipment communication settings
5 DEFAULT SET To restore all the settings to default settings
0 EXIT To exit current submenu and return to upper menu

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“PROT SETTINGS”has the following submenus.

No. Item Description


1 DIFF PROT To view and modify differential protection settings
To view and modify settings of side 1 phase-to-phase fault
2 S1 PPF PROT
protection
To view and modify settings of side 2 phase-to-phase fault
3 S2 PPF PROT
protection
To view and modify settings of side 3 phase-to-phase fault
4 S3 PPF PROT
protection
5 S1 EF PROT To view and modify settings of earth fault protection of side 1
6 S2 EF PROT To view and modify settings of earth fault protection of side 2
7 S3 EF PROT To view and modify settings of earth fault protection of side 3
8 GAP EF PROT To view and modify settings of gap earth fault protection
9 OVLD PROT To view and modify settings of overload protection
A S1 REF PROT To view and modify settings of restricted earth fault of side 1
B S2 REF PROT To view and modify settings of restricted earth fault of side 2
C S3 REF PROT To view and modify settings of restricted earth fault of side 3
0 EXIT To exit current submenu and return to upper menu

8.2.3 VALUES

This menu is used to view the measured value including current, voltage, phase angle, binary
input state and other calculated quantities.

“VALUES”has the following submenus.

No. Item Description


To display magnitudes of AC voltage and current and calculated
1 MON METERING
values on MON module.
To display magnitudes of AC voltage and current and calculated
2 CPU METERING
values on CPU module.
3 PHASE ANGLE To display the angles of AC voltage and current.
4 CPU BI STATE To display the states of binary input of CPU module.
0 EXIT To exit current submenu and return to upper menu.

“CPU METERING”has the following submenus.

No. Item Description


To display measured and calculated values of differential
1 DIFF PROT
protection
To display measured and calculated values of side 1
2 S1 PPF PROT
phase-to-phase protection.
To display measured and calculated values of side 2
3 S2 PPF PROT
phase-to-phase protection.

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No. Item Description


To display measured and calculated values of side 3
4 S3 PPF PROT
phase-to-phase protection.
To display measured and calculated values of earth fault and gap
5 EF&GAP_EF PROT
earth fault protection
To display measured and calculated values of restricted earth fault
6 S1 REF PROT
of side 1
To display measured and calculated values of restricted earth fault
7 S2 REF PROT
of side 2
To display measured and calculated values of restricted earth fault
8 S3 REF PROT
of side 3
0 EXIT To exit current submenu and return to upper menu

8.2.4 PRINT

This menu is used to print report, settings and waveform.

“PRINT”has the following submenus.

No. Item Description


1 MISC SETTINGS To print the current all settings except protection.
2 PROT SETTINGS To print the current all protection settings.
3 TRP REPORT To print trip reports and waveform.
4 OPR REPORT To print operation event reports.
5 ALM REPORT To print self-supervision and abnormal reports
6 BI CHG REPORT To print the report of binary input change
7 PRESENT VALUES To print present all values of the equipment
8 WAVEFORM To print waveform stored in the equipment
0 EXIT To exit current submenu and return to upper menu.

8.2.5 CLOCK
The current time of internal clock can be viewed here. The time is displayed in the form
YY-MM-DD and hh:mm:ss. All values are presented with digits and can be modified. The detailed
operating steps of adjusting time please see 8.8.6.

8.2.6 REPORT

This menu is used to view all kinds of report including trip report, alarm report and so on.

“REPORT”has the following submenus.

No. Item Description


1 TRP REPORT To display the trip reports
2 OPR REPORT To display the operation report
3 BI CHG REPORT To display the report of binary input change

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No. Item Description


4 CTRL REPORT To display the local/remote control reports
5 ALM REPORT To display the self-supervision report
0 EXIT To exit current submenu and return to upper menu.

8.2.7 CLR REPORT

This menu is used to clear all reports stored in the equipment.

8.2.8 TRIG OSCILLOG

This menu is used to trigger recording waveform manually.

8.2.9 VERSION
This menu is used to check program version of the equipment.

“VERSION”has following submenus.

No. Item Description


1 MON VERSION To check the program version of MON module
2 CPU VERSION To check the program version of CPU module
3 HMI VERSION To check the program version of HMI module
0 EXIT To exit current submenu and return to upper menu.

8.2.10 EXIT

This menu is used to exit the main menu and return to default display.

8.3 Understand the LCD Display

8.3.1 Default Display under Normal Operation Condition

The LCD has default display after equipment is energized. If there is no keypad activity for 2
minutes and 5 seconds in main menu or any submenu, the LCD backlight will be turned off. The
default display on the LCD is shown in the Figure 8.3-1.

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Figure 8.3-1 Default display

NOTE:

 The first line shows the current date and time of the equipment and the format is:
YY-MM-DD HH:MM:SS.

 The value of voltage or current which is displayed on the LCD is the secondary value of
the primary VT and CT equipments.

8.3.2 Display When Tripping


If there is any protection element operating, a brief tripping report will appear on the LCD, and the
backlight of the LCD and the LED “TRIP”will be lit simultaneously. The format of the fault report is
shown in the Figure 8.3-2.

Figure 8.3-2 LCD display of trip report

No. Display Explanation


shows the number of group event (one group event means all
events in the duration from equipment general pickup to revert to
1 012.01 normal state). 01 shows sequence number of event during the
group event. The two numbers are shown on the left of the first
line in format of “XXX.XX”(X: 0 ~ 9, see the Figure 8.3-2 ).
2 06-08-09 shows operating data in format of YY-MM-DD
3 15:20:23:504 shows operating time in format of HH:MM:SS:MS.
4 Id_max 004.48Ie shows fault information, such maximum phase differential current

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No. Display Explanation


5 Op_PcntDiff shows the protection element.

NOTE: In case more than one protection element has operated, the relevant report will

be displayed alternately on the LCD.

The tripping report will keep being displayed on LCD until an acknowledgement by pressing the
key “ENT”or resetting the equipment. Then default display then appears on LCD and “TRIP”LED
is extinguished.

Protection elements listed below may be displayed.

Table 8.3-1 Protection element and tripping relay list

Protection element
No. Description
and tripping relay
1 Op_FD At least one of the fault detectors operates.
2 Op_InstDiff Operation element of instantaneous unrestrained differential protection.
3 Op_PcntDiff Percent differential protection operates.
4 Op_OC1_S1 Stage 1 of overcurrent element of side 1 operates.
5 Op_OC2_S1 Stage 2 of overcurrent element of side 1 operates.
6 Op_OC3_S1 Stage 3 of overcurrent element of side 1 operates.
7 Op_OC1_S2 Stage 1 of overcurrent element of side 2 operates.
8 Op_OC2_S2 Stage 2 of overcurrent element of side 2 operates.
9 Op_OC1_S3 Stage 1 of overcurrent element of side 3 operates.
10 Op_OC2_S3 Stage 2 of overcurrent element of side 3 operates.
11 Op_ROC1_S1 Stage 1 of zero-sequence overcurrent element of side 1 operates.
12 Op_ROC2_S1 Stage 2 z of zero-sequence overcurrent element of side 1 operates.
13 Op_ROC1_S2 Stage 1 of zero-sequence overcurrent element of side 2 operates.
14 Op_ROC2_S2 Stage 2 of zero-sequence overcurrent element of side 2 operates.
15 Op_ROC1_S3 Stage 1 of zero-sequence overcurrent element of side 3 operates.
16 Op_ROC2_S3 Stage 2 of zero-sequence overcurrent element of side 3 operates.
17 Op_ROV11Gap Time delay 1 of gap zero-sequence overvoltage operates.
18 Op_ROV12Gap Time delay 2 of gap zero-sequence overvoltage operates.
19 Op_ROC11Gap Time delay 1 of gap zero-sequence overcurrent operates.
20 Op_ROC12Gap Time delay 2 1of gap zero-sequence overcurrent operates.
21 Op_InstREF_S1 Instantaneous zero-sequence differential protection of side 1 operates.
22 Op_PcntREF_S1 Percent zero-sequence differential protection of side 1 operates.
23 Op_InstREF_S2 Instantaneous zero-sequence differential protection of side 2 operates.
24 Op_PcntREF_S2 Percent zero-sequence differential protection of side 2 operates.
25 Op_InstREF_S3 Instantaneous zero-sequence differential protection of side 3 operates.
26 Op_PcntREF_S3 Percent zero-sequence differential protection of side 3 operates.

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Protection element
No. Description
and tripping relay
27 Op_CCE Current control element operates.
28 TrpOutp1 The 1st group of tripping output relays is driven to operate.
29 TrpOutp2 The 2nd group of tripping output relays is driven to operate.
30 TrpOutp3 The 3rd group of tripping output relays is driven to operate.
31 TrpOutp4 The 4th group of tripping output relays is driven to operate.
32 TrpOutp5 The 5th group of tripping output relays is driven to operate.
33 TrpOutp6 The 6th group of tripping output relays is driven to operate.
34 TrpOutp7 The 7th group of tripping output relays is driven to operate.
35 TrpOutp8 The 8th group of tripping output relays is driven to operate.
36 TrpOutp9 The 9th group of tripping output relays is driven to operate.
37 TrpOutp10 The 10th group of tripping output relays is driven to operate.
38 TrpOutp11 The 11th group of tripping output relays is driven to operate.
39 TrpOutp12 The 12th group of tripping output relays is driven to operate.

8.3.3 Display under Abnormal Condition

If there is any abnormality in the operating or firmware error detected by equipment self-diagnostic,
alarm report will be displayed instantaneously on the LCD. Therefore, default display will be
replaced by the alarm report.

In case there is more than one alarm has occurred, the information will be displayed alternately on
the LCD.

There are two types of alarm: operation alarm and equipment alarm.

Equipment Alarm:

Alarm occurs due to some hardware error detected by equipment self-diagnostic. Under this
condition, the “HEALTHY”LED will be turned off and all protection functions will be blocked.

Figure 8.3-3 Information of Equipment Alarm on the LCD

A brief explanation is made in the following table.

No. Display Explanation


1 Alm Report The title of self-check alarm report

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No. Display Explanation


2 0019 The fault number generated by the device
The date when the alarm event occur, and the format is
3 06-08-09
year-month-day
The time when the alarm event occur, and the format is
4 15:53:43:876
hour:minute:second:millisecond
5 Alm_Setting The abbreviation of the alarm event

Please refer to Table 4.2-1 for all the self-check alarm elements.

Operation Alarm:

Alarm occurs due to some abnormities during system operating. Under this condition, the
“ALARM”LED will be lit.

Figure 8.3-4 Information of Operating Alarm on the LCD

A brief explanation is made in the following table.

No. Display Explanation


1 Opr Report The title of operating alarm report
2 0003 The fault number generated by the device
The date when the alarm event occur, the format
3 06-08-09
is year-month-day
The time when the alarm event occur, the format is
4 15:54:48:922
hour:minute:second:millisecond
5 Alm_CTS_S1 The abbreviation of the alarm event

Please refer to Table 4.2-2 for all the self-check alarm elements.

8.3.4 Display When User Operating equipment

If user makes any changes to the equipment, a brief report will be recorded in “CTRL REPORT”
menu.

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Figure 8.3-5 LCD display of trip report

A brief explanation is made in the following table.

No. Display Explanation


1 Ctrl Report The title of control report ( operating the equipment)
2 0004 The fault number generated by the device
The date when the alarm event occur,
3 06-08-09
and the format is year-month-day
The time when the alarm event occur,
4 15:20:23:504
and the format is hour:minute:second:millisecond
5 Remote Chg Prot Set The abbreviation of handling event

Handling information listed below may be displayed.

Table 8.3-2 User Operating event list

No. User Operating Event Description


System setting value is modified remotely through communication
1 Remote Chg Sys Set
port via software.
Equipment setting value is modified remotely through
2 Remote Chg Equip Set
communication port via software.
Protection setting value is modified remotely through
3 Remote Chg Prot Set
communication port via software.
Active setting group is changed remotely through communication
4 Remote Chg Grp
port via software.
Virtual enabling function binary input is modified remotely through
5 Remote Chg VEBI
communication port via software.
6 Local Chg Sys Set System setting value is modified locally through keypad.
7 Local Chg Equip Set Equipment setting value is modified locally through keypad.
8 Local Chg Prot Set Protection setting value is modified locally through keypad.
Virtual enabling function binary input is modified locally through
9 Local Chg VEBI
keypad.
10 Clear Reports All reports is cleared
11 Force BI State Binary input is changed remotely
12 Initializing The equipment is initialized by loading default settings

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No. User Operating Event Description


The equipment is reset by pressing key “ENT/”, energizing
13 Reset target Binary input [BI_RstTarg] or receiving reset message from SAS or
RTU.

8.4 View the Settings

Here take viewing settings of differential protection as an example to introduce the operating steps
of viewing setting for operators.

Operating steps:

Press key “▲ ”to enter the main menu at first.

Figure 8.4-1 LCD display step 1 of viewing setting

Press key “▲ ”or “▼ ”to select “SETTINGS”by scrolling the cursor upward or downward.

Press key “ENT”to enter the submenu.

Figure 8.4-2 LCD display step 2 of viewing setting

Press key “▲ ”or “▼ ”to select “PROT SETTINGS”by scrolling the cursor upward or downward.

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Figure 8.4-3 LCD display step 3 of viewing setting

Press key “ENT”to enter the submenu.

Figure 8.4-4 LCD display step 4 of viewing setting

Press key “▲ ”or “▼ ”to select “DIFF SETTINGS”by scrolling the cursor upward or downward.

Press key “ENT”to display the setting symbol and parameters of the submenu.

Figure 8.4-5 LCD display step 5 of viewing setting

A brief description about above figure is given in the following table.

No. Display Description


1 DIFF SETTINGS The title of differential protect settings
2 I_Pkp_PcntDiff The parameter cell name
3 000.80 Ie The setting’
s value and unit
4 I_InstDiff The parameter cell name

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No. Display Description


5 0009.00 Ie The setting’
s value and unit

If you want to view more setting parameters, please press key “▲ ”or “▼ ”to locate the setting you
are interested in by moving the cursor.

Press key “ESC”to return.

8.5 View status of measured value

8.5.1 Display Metering Data

Metering data means AC sampled data and phase angles in the submenu CPU VALUES or MON
VALUES.

Take viewing AC sampled data of “S1 PPF PROT”of “CPU VALUES”as an example.

Operating steps:

Press key “▲ ”to enter the main menu at first.

Figure 7.5.1.1 LCD display step 1 of viewing metering

Press key “▲ ”or “▼ ”to select “VALUES”item by scrolling the cursor upward or downward.

Figure 7.5.1.2 LCD display step 2 of viewing metering

Press key “ENT”to enter the submenu.

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Figure 7.5.1.3 LCD display step 3 of viewing metering

Press key “▲ ” or “▼ ” to select “CPU METERING” item by scrolling the cursor upward or
downward. Press key “ENT”to enter the submenu.

Figure 7.5.1.4 LCD display step 4 of viewing metering

Press key “▲ ”or “▼ ”to select “S1 PPF PROT”item by scrolling the cursor upward or downward.
Press key “ENT”to view the values.

Figure 7.5.1.5 LCD display step 5 of viewing metering

A brief description about above figure is given in the following table.

No. Display Description


1 CPU MEASUREMENT The title of the values
2 Ia_S1=005.00 A Value name and unit
3 Ib_S1=005.00A Value name and unit

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No. Display Description


4 Ic_S1=005.00A Value name and unit
5 I1_S1=005.00A Value name and unit

A cursor is at the head of the second line, press key “▲ ”or “▼ ”to move the cursor up or down
to see other measured values.

Press key “ESC”to return.

Sample quantity’
s and phase angles are list in detail in sections 5.2.

8.5.2 Display the Status of Binary Inputs

Operating steps:

Press key “▲ ”to enter the main menu at first.

Figure 8.5-1 LCD display step 1 of viewing state of BI

Press key “▲ ”or “▼ ”to select “VALUES”item by scrolling the cursor upward or downward.

Figure 8.5-2 LCD display step 2 of viewing state of BI

Press key “ENT”to enter the submenu.

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Figure 8.5-3 LCD display step 3 of viewing state of BI

Press key “▲ ”or “▼ ”to select “BI STATE”item by scrolling the cursor upward or downward. Press
key “ENT”to view the state of binary input.

Figure 8.5-4 LCD display step 4 of viewing state of BI

No. Display Description


1 BI STATE It shows the title
It shows the binary input status. 1 means the binary input
2 EBI_Diff
contact is energized, 0 means the contact is de-energized
3 EBI_PPF_S1 Refer to above description
4 EBI_PPF_S2 Refer to above description
5 EBI_PPF_S3 Refer to above description

Press key “▲ ”or “▼ ”to move the cursor upward or downward to view the state of particular binary
input.

Press key “ESC”to return.

Refer to section Table 5.3-1 to see more information about the binary input.

8.6 View Software Version

The equipment program has three parts consisting of CPU MON, and HMI module programs.
There are totally independent.

Take viewing the software version of CUP module as an example.

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Operating steps:

Press key “▲ ”to enter the main menu at first.

Figure 8.6-1 LCD display step 1 of viewing VERSION

Press key “▲ ”or “▼ ”to select “VERSION”item by scrolling the cursor upward or downward.
Press key “ENT”to enter the submenu.

Figure 8.6-2 LCD display step 2 of viewing VERSION

Press key “▲ ”or “▼ ”to select “CPU VERSION”item by scrolling the cursor upward or downward.
Press key “ENT”to enter the submenu.

Figure8.6-3 LCD display step 3 of viewing VERSION

No. Display Description


1 CPU VERSION It shows the program is CPU module’
s

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No. Display Description


It shows the equipment name and the secondary
2 RCS-995TS_070864
development number
3 Ver:2.02.1.070864 It shows the version number
4 CRC: 5C9D It shows the check code of CPU module program
It shows the date and time when the program is
5 2007-10-11 10:54 generated. The format is year-month-day
hour-minute-second

NOTE: What above figure shows is just an example to introduce the meaning of LCD

display of software version, the actual version for user is application-specific.

Press key “ESC”to return.

8.7 View Records

8.7.1 General Description

The equipment provides the following recording functions:

 Event recording

Events are recorded in form of report and can be viewed through LCD or by printing report.

Self-supervision report, equipment operation report, control report (i.e user operating report)
and binary input change report belong to event record.

 Disturbance recording

Fault is recorded in form of both report and waveform, so report can be display on LCD or by
printing. However waveform must to be printed or displayed with special software.

Trip report and corresponding waveforms belong to fault record.

 Present recording

Present recording is recorded in form of waveform and can be viewed only by printing.

8.7.2 View Reports through LCD

If you want to see event recording report and fault recording report through LCD, please follow the
operating steps.

Operating steps

First, please go in to the main menu by pressing key “▲ ”. Press key “▲ ” or “▼ ”to select
“REPORT”item by scrolling the cursor upward or downward.

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Figure 7.7.2.1 LCD display step 1 of viewing REPORT

Press key “ENT”to enter the next lower level submenu.

Figure 8.7-1 LCD display step 2 of viewing REPORT

Then press key “▲ ” or “▼ ”to select “TRIP REPORT”, “OPR REPORT”, “BI CHG REPORT”,
“CTRL REPORT”or “ALARM REPORT”by scrolling the cursor upward or downward. Press key
“ENT”to display the report selected.

The latest report will be displayed first. Press key “▲ ”or “▼ ”to view the next or last report.

If the report cannot be completely displayed by one screen, they will scroll from right to left one by
one.

If there is no report stored LCD will display “No REPORT”.

In order to return to the submenu, simply press key “ESC”.

8.7.3 View Reports and Waveform by Printing

If you want to see event recording report or fault recording report and waveform by printing, please
follow the operating steps.

Operating steps

First, please go in to the main menu by pressing key “▲ ”. Press key “▲ ”or “▼ ”to select “PRINT”
item by scrolling the cursor upward or downward.

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Figure 8.7-2 LCD display step 1 of viewing REPORT by printing

Press key “ENT”to enter the lower level submenu.

Figure 8.7-3 LCD display step 2 of viewing REPORT by printing

Press key “▲ ”or “▼ ” to select “TRP RECORD”, “ALM REPORT”or “BI CHG REPORT” by
scrolling the cursor upward or downward. Please select the report to be printed. Then press key
“ENT”to print the report displayed on LCD via a printer.

In order to return to the upper level submenu, simply press key “ESC”.

8.7.4 View Present Recording Waveform


If you want to see the normal recording waveform, please follow the operating steps.

Operating steps

First, please go in to the main menu by pressing key “▲ ”. Press key “▲ ”or “▼ ”to select “TRIG
OSCILLOG”item by scrolling the cursor upward or downward.

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Figure 8.7-4 LCD display step 1 of viewing present recording waveform

Press key “ENT”and password input interface will appear, enter the password and press “ENT”to
trigger a waveform.

Then, please return to the main menu by pressing key “▲ ”. Press key “▲ ”or “▼ ” to select
“PRINT”item by scrolling the cursor upward or downward.

Figure 8.7-5 LCD display step 2 of viewing present recording waveform

Press key “ENT”to enter the lower level submenu.

Figure 8.7-6 LCD display step 3 of viewing present recording waveform

Then press key ▲ or ▼ to select “PRESENT WAVE”by scrolling the cursor upward or downward.
Press key “ENT”to enter the lower level submenu.

Figure 8.7-7 LCD display step 4 of viewing present recording waveform

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No. Display Description


1 Sel Record No. It shows selecting the number of waveform record.
It shows the waveform recorded data and time in
2 1. 06-09-12 09:23:12
format of YY-MM-DD HH:MM:SS.
3 1. 06-09-12 09:11:31 Please refer to above description.
4 1. 06-09-11 14:42:54 Please refer to above description.
5 1. 06-09-12 13:20:34 Please refer to above description.

Please select the required item in the submenu by scrolling cursor and then press key “ENT”to
print the waveform.

In order to return to the submenu, simply press key “ESC”.

8.8 Operation through Keypad

8.8.1 Password Protection

The menu structure contains two levels of access. The level of access is enabled determines what
users can do by entry of password. The levels of access are summarized in the following table:

Access level Operations enabled


Level 0 Read access to all settings, metering, alarms, event records
No password required and fault records
Level 1
All settings modified and records deleting
Password required

The password are 3 digits and the factory default password is 001. Password is user-changeable
once it has been correctly entered. Entry of the password is achieved either by a prompt when a
setting change or deleting records is attempted.

The access level enabled by the password entry will be invalid once user exits current operation
interface.

NOTE: It is necessary for user to change the password before the relay being put into

service, and keep the changed password commendably. If the passwords are lost an
emergency password can be supplied – contact NARI-RELAYS with the relay’s serial
number and the equipment current data and time.

8.8.2 Change the Settings

Please locate the setting you want to change by operating the keypad as described in section 8.4.
Then go on to operate as following steps.

Press key “+”or “–”invoke the password input interface and enter your password.

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Figure 8.8-1 Password input interface

If the password inputted is wrong, prompt information will appear and return latter on.

Figure 8.8-2 Prompt information of incorrect password

If the password inputted is right, it will return to the setting operator wants to modify directly.

Press key “◄ ”or “► ”to move the cursor to the digit to be modified. Pressing key “+”and “–”to
change the digit. Press key “+”once to add 1 to the digit and press key “–“once to subtract 1 from
the digit.

Press key “ESC”to cancel the modification and return to upper level submenu.

Press key “ENT”to confirm the modification of settings. At the same time, the LED “HEALTHY”will
be turned off and all protection functions will be blocked.

After accomplishment of modification, press key “RST”to restart the equipment and the new
settings will be valid.

NOTE: In order to certify the entered settings are all correct, it is recommended to print

out the settings and check them carefully.

8.8.3 Switch Active Setting Group


Sometimes it is necessary to switch active setting group to fit the different operating conditions.
Please switch active setting group as following operating steps.

First, please go in to the main menu by pressing key “▲ ”.

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Figure 8.8-3 Step 1 of switching active setting group

Select the item “SETTINGS”and press “ENT”to next menu.

Figure 8.8-4 Step 2 of switching active setting group

Select the item “SYS SETTINGS”and press “ENT”.

Figure 8.8-5 Step 3 of switching active setting group

Modify the group number as the method described above and press “ENT”to confirm it. At
this time, the LED “HEALTHY”will be turned off and all protection functions have been
blocked.

Please press key “RST”to restart the equipment to confirm settings.

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8.8.4 Print Records

Here records include report and waveform and please refer to section 8.7.3 for details.

8.8.5 Delete Records

If you want to delete the content of fault records or event records, you can follow the operating
steps.

NOTE: You cannot select which kind of records or which one record to be deleted but

delete all records.

Operating steps:

Press key “▲ ”to enter the main menu at first.

Figure 8.8-6 Step 1 of deleting reports

Then press key ▲ or ▼ to select “CLR REPORT”by scrolling the cursor upward or downward.

Figure 8.8-7 Step 2 of deleting reports

Press key “ENT”and enter your password and press key “ENT”again. After few moment
prompt information will appear to tell you all reports stored in the equipment have been
cleared except the present operation of clearing report, which will be logged as an event
belonging to “CTRL REPORT”.

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Figure 8.8-8 Prompt information of deleting reports

8.8.6 Clock Set


Please set the equipment clock as following steps.

Navigate the menu:

Figure 8.8-9 Step 1 of clock setting

Select the item “CLOCK”and press key “ENT”, the following will be displayed on the LCD.

Figure 8.8-10 Step 2 of clock setting

 DATA : 06 08 09 shows the date August 9th 2006.

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 TIME : 17:18:25 shows the time 17:18:25

Press keys “▲ ”, “▼ ”, “◄ ”and “► ”to select the digit to be modified. Press key “+”and “–“to modify
data. Pressing key “+”once will add 1 to the digit and pressing key “–“once will subtract 1 from
the digit.

Press key “ESC”to return to main menu without modification.

Press key “ENT”to confirm the modification and return to the main menu.

8.9 Understand the Alarms

Hardware circuit and operation condition of the equipment are self-supervised continuously. If any
abnormal condition is detected, information or report will be displayed and a corresponding alarm
will be issued.

A common abnormality may block a certain number of protection functions while other functions
can still work.

However, if serious hardware failure or abnormality were detected, all protection functions will be
blocked and the LED “HEALTHY”will be turned off.

When hardware failure is detected, all protection functions will be blocked and corresponding
alarm signal will be issued. The equipment then cannot work normally in this case and manual
maintenance is required to fix the failure.

NOTE: If the equipment is blocked or alarm signal is issued during operation, do please

find out its reason by help of “ALARM RERORT”(referring to section 4.2.11). If the
reason can not be found on site, please inform the factory NARI-RELAYS. Please do not
simply press key press key “RST”on the protection front panel or energize binary input
[BI_RstTarg] or re-power on the equipment.

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Chapter 9 Communications

9.1 General

This section outlines the remote data communication interfaces of the RCS-985TS relay. The relay
can supports IEC60870-5-103 and MODBUS protocols.

The two rear EIA RS-485 standardized interfaces are isolated, as well as the two/three Ethernet
interfaces, and are suitable for permanent connection whichever protocol is selected. The
advantage of this type of connection is that up to 32 relays can be “daisy chained”together using a
simple twisted pair electrical connection.

It should be noted that the descriptions contained within this section do not aim to fully detail the
protocol itself. The relevant documentation for the protocol should be referred to for this
information. This section serves to describe the specific implementation of the protocol in the relay.

9.2 Rear Communication Port Information

9.2.1 RS-485 Interface

This relay provides two rear RS-485 communication ports, and each port has three terminals (A ,B
and SHLD) in the 12-terminal screw connector located on the back of the relay. SHLD terminal is
ground terminal for the earth shield of the communication cable. The rear ports provide RS-485
serial data communication and are intended for use with a permanently wired connection to a
remote control center.

The protocol provided by the relay is indicated in the relay submenu in the “EQUIP SETUP”
column. Using the keypad and LCD, set the parameters [COM1_Protocol] and [COM2_Protocol]
as “1”or “2”, the corresponding protocol will be selected.

9.2.1.1 EIA RS-485 Standardized Bus

The EIA RS-485 two-wire connection provides a half-duplex fully isolated serial connection to the
product. The connection is polarized and whilst the product’
s connection diagrams indicate the
polarization of the connection terminals it should be borne in mind that there is no agreed
definition of which terminal is which. If the master is unable to communicate with the product, and
the communication parameters match, then it is possible that the two-wire connection is reversed.

9.2.1.2 Bus Termination

The EIA RS-485 bus must have 120Ω (Ohm) ½ Watt terminating resistors fitted at either end
across the signal wires (see Figure 9.2-1). Some devices may be able to provide the bus
terminating resistors by different connection or configuration arrangements, in wh ich case
separate external components will not be required. However, this product does not provide such a
facility, so if it is located at the bus terminus then an external termination resistor will be required.

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EIA RS-485

Figure 9.2-1 EIA RS-485 bus connection arrangements

9.2.1.3 Bus Connections & Topologies

The EIA RS-485 standard requires that each device is directly connected to the physical cable that
is the communications bus. Stubs and tees are expressly forbidden, such as star topologies. Loop
bus topologies are not part of the EIA RS-485 standard and are forbidden by it also.

Two-core screened cable is recommended. The specification of the cable will be dependent on the
application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must
not exceed 500m. The screen must be continuous and connected to ground at one end, normally
at the master connection point; it is important to avoid circulating currents, especially when the
cable runs between buildings, for both safety and noise reasons.

This product does not provide a signal ground connection. If a signal ground connection is present
in the bus cable then it must be ignored, although it must have continuity for the benefit of other
devices connected to the bus. At no stage must the signal ground be connected to the cables
screen or to the product’
s chassis. This is for both safety and noise reasons.

9.2.1.4 Biasing

It may also be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal
level has an indeterminate state because the bus is not being actively driven. This can occur when
all the slaves are in receiving mode and the master is slow to turn from receiving mode to
transmitting mode. This may be because the master purposefully waits in receiving mode, or even
in a high impedance state, until it has something to transmit. Jabber causes the receiving device(s)
to miss the first bits of the first character in the packet, which results in the slave rejecting the
message and consequentially not responding. Symptoms of these are poor response times (due
to retries), increasing message error counters, erratic communications, and even a complete
failure to communicate.

Biasing requires that the signal lines be weakly pulled to a defined voltage level of about 1V. There
should only be one bias point on the bus, which is best situated at the master connection point.
The DC source used for the bias must be clean; otherwise noise will be injected. Note that some
devices may (optionally) be able to provide the bus bias, in which case external components will
not be required.

NOTE:

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 It is extremely important that the 120Ω termination resistors are fitted. Failure to do so will
result in an excessive bias voltage that may damage the devices connected to the bus.

 As the field voltage is much higher than that required, NARI-RELAYS cannot assume
responsibility for any damage that may occur to a device connected to the network as a result
of incorrect application of this voltage.

 Ensure that the field voltage is not being used for other purposes (i.e. powering logic inputs)
as this may cause noise to be passed to the communication network.

9.2.2 Ethernet Interface


This relay provides two rear Ethernet interfaces (at most three, optional) and they are independent
to each other. The parameter of Ethernets port [NET_Protocol] can be configured in the submenu
“EQUIP SETUP”, which is a uniform parameter for the two/three Ethernet ports.

9.2.2.1 IP Address and Equipment Address of the Equipment

A brief explanation of IP and network submask is made as bellow. There are four sections for an IP
address.

Figure9.2-2 Format of IP address

Where:

 Section 3 and section 2 can be set separately

 Section 1 * 256 + section 0 = equipment address

Equipment address has above relationship described as an equation with section 1 and section 0
of IP address.

9.2.2.2 Ethernet Standardized Communication Cable

It is recommended to use twisted screened eight-core cable as the communication cable. A picture
is shown bellow.

Figure9.2-3 Ethernet communication cable

9.2.2.3 Connections and Topologies

Each equipment is connected to an exchanger via communication cable and thereby to form a star

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structure network. Dual-network is recommended in order to increase reliability. SCADA is also


connected to the exchanger and will play a role of master station, so the every equipment which
has been connected to the exchanger will play a role of slave unit.

Figure9.2-4 Ethernet communication structureIEC60870-5-103 communication

9.2.3 IEC60870-5-103 Communication

The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission
Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform
communication with protection equipment. The standard configuration for the IEC60870 -5-103
protocol is to use a twisted pair EIA RS-485 connection over distances up to 500m. It also supports
to use an Ethernet connection. The relay operates as a slave in the system, responding to
commands from a master station.

To use the rear port with IEC60870-5-103 communication, the relay’


s relevant settings must be
configured. To do this use the keypad and LCD user interface. In the submenu “EQUIP SETUP”,
set the parameter [COM1_Protocol] or [COM2_Protocol] as “1”, then set the baud rate of each
rear port. For using the Ethernet port with IEC60870-5-103 communication, set the parameter
[NET_Protocol] as “1”, and then the IP address and submask of each Ethernet port must be set.

9.2.4 MODBUS Communication

Standard: Modicon Modbus Protocol Reference Guide, PI-MBUS-300 Rev.E is also supported by
the equipment through EIA RS-485 interface.

To use the rear port with MODBUS communication, the relay’ s relevant settings must be
configured. To do this use the keypad and LCD user interface. In the submenu “EQUIP SETUP”,
set the parameter [COM1_Protocol] or [COM2_Protocol] as “2”, then set the baud rate of each
rear port.

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9.3 IEC60870-5-103 Interface over Serial Port

The IEC60870-5-103 interface over serial port is a master/slave interface with the relay as the
slave device. It is properly developed by NARI-RELAYS.

The relay conforms to compatibility level 2; compatibility level 3 is not supported.

The following IEC60870-5-103 facilities are supported by this interface:

 Initialization (reset)

 Time synchronization

 Event record extraction

 General interrogation

 Disturbance records

9.3.1 Physical Connection and Link Layer

Physical Layer Setup:RS-485, 1 start bit, 8 data bits, even parity, 1 stop bit.

Two EIA RS-485 standardized ports are available for IEC60870-5-103 in this relay. The
transmission speed is optional: 4800 bit/s, 9600 bit/s, 19200 bit/s or 38400 bit/s.

The link layer strictly abides by the rules defined in the IEC60870-5-103.

9.3.2 Initialization
Whenever the relay has been powered up, or if the communication parameters have been
changed, a reset command is required to initialize the communications. The relay will respond to
either of the two reset commands (Reset CU or Reset FCB), the difference is that the Reset CU
will clear any unsent messages in the relay’
s transmit buffer.

The relay will respond to the reset command with an identification message ASDU 5, the COT
(Cause Of Transmission) of this response will be either Reset CU or Reset FCB depending on the
nature of the reset command.

In addition to the above identification message, if the relay has been powered up it will also
produce a power up event.

9.3.3 Time Synchronization

The relay time and date can be set using the time synchronization feature of the IEC60870 -5-103
protocol. The relay will correct for the transmission delay as specified in IEC60870-5-103. If the
time synchronization message is sent as a send/confirm message then the relay will respond with
a confirmation. Whether the time-synchronization message is sent as a send confirmation or a
broadcast (send/no reply) message, a time synchronization Class 1 event will be
generated/produced.

If the relay clock is synchronized using the IRIG-B input then it will not be possible to set the relay

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time using the IEC60870-5-103 interface. An attempt to set the time via the interface will cause the
relay to create an event with the current date and time taken from the IRIG-B synchronized internal
clock.

9.3.4 Spontaneous Events


Events are categorized using the following information:

 Type identification (TYP)

 Function type (FUN)

 Information number (INF)

The following tables contain a complete listing of all events produced by the relay.

9.3.4.1 Trip Reports

Trip reports are sent by ASDU2 (time-tagged message).

FUN INF Event FUN INF Event


228 200 Op_FD 228 70 Op_InstDiff
228 71 Op_PcntDiff 228 157 Op_OC1_S1
228 158 Op_OC2_S1 228 159 Op_OC3_S1
228 160 Op_OC1_S2 228 161 Op_OC2_S2
228 162 Op_OC1_S3 228 163 Op_OC2_S3
228 164 Op_ROC1_S1 228 165 Op_ROC2_S1
228 166 Op_ROC1_S2 228 167 Op_ROC2_S2
228 168 Op_ROC1_S3 228 169 Op_ROC2_S3
228 170 Op_ROV11_Gap 228 171 Op_ROV12_Gap
228 172 Op_ROC11_Gap 228 173 Op_ROC12_Gap
228 235 Op_InstREF_S1 228 236 Op_PcntREF_S1
228 239 Op_InstREF_S2 228 240 Op_PcntREF_S2
228 243 Op_InstREF_S3 228 244 Op_PcntREF_S3
228 84 Op_CCE 228 51 TrpOutp1
228 52 TrpOutp2 228 53 TrpOutp3
228 54 TrpOutp4 228 55 TrpOutp5
228 56 TrpOutp6 228 174 TrpOutp7
228 175 TrpOutp8 228 176 TrpOutp9
228 177 TrpOutp10 228 178 TrpOutp11
228 179 TrpOutp12

9.3.4.2 Alarm Reports

Alarm reports consist of self-check alarm report and equipment operation alarm reports, which are
sent by ASDU1 (time-tagged message).

FUN INF Event FUN INF Event


228 208 Alm_Abnor 228 209 Alm_CTS_S1

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FUN INF Event FUN INF Event


228 210 Alm_CTS_S2 228 211 Alm_CTS_S3
228 212 Alm_VTS_S1 228 213 Alm_VTS_S2
228 214 Alm_VTS_S3 228 97 Alm_OvLd
228 98 Alm_InitCoolOvLd 228 215 Alm_BlkOLTC_OvLd
228 141 Alm_BO_CCE 228 94 Alm_SensCTS_Diff
228 95 Alm_CTS_Diff 228 216 Alm_ROV
228 217 Alm_BI_SOTF_S2 228 218 Alm_BI_SOTF_S3
228 219 Alm_Comm_MON 228 220 Alm_FD_MON
228 221 Alm_Set_MON 228 222 Alm_Pwr_MON
228 201 Alm_Fail 228 152 Alm_Setting
228 202 Alm_RAM 228 203 Alm_ROM
228 204 Alm_Pwr_DC 228 101 Alm_TrpOut
228 205 Alm_CPLD 228 206 Alm_RatioCorr_CT
228 207 Alm_ConnGrp

9.3.4.3 Binary Input

Binary input is sent by ASDU1 (time-tagged message).

FUN INF Event FUN INF Event


228 85 EBI_Diff 228 180 EBI_PPF_S1
228 181 EBI_PPF_S2 228 182 EBI_PPF_S3
228 183 EBI_EF_S1 228 184 EBI_EF_S2
228 185 EBI_EF_S3 228 186 EBI_EF_Gap
228 192 EBI_Resv1 228 187 BI_SOTF_S2
228 188 BI_SOTF_S3 228 193 EBI_Resv2
228 194 EBI_Resv3 228 189 BI_Out_VT1
228 190 BI_Out_VT2 228 191 BI_Out_VT3
228 223 BI_BlkComm 228 224 BI_RstTarg
228 234 EBI_REF_S1 228 238 EBI_REF_S2
228 242 EBI_REF_S3 228 195 BI_Resv1
228 196 BI_ Resv2 228 197 BI_ Resv3
228 198 BI_ Resv4

9.3.5 General Interrogation

The GI can be used to read the status of the relay, the function numbers, and information numbers
that will be returned during the GI cycle. The GI cycle strictly abides by the rules defined in the
IEC60870-5-103.

The relay will respond to this GI command with an ASDU 44 message, the cause of transmission
(COT) of this response is 9.

Referring the IEC60870-5-103 standard can get the enough details about general interrogation.

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9.3.6 Disturbance Records

This relay can store up to eight disturbance records in its memory. A pickup of the fault detector or
an operation of the relay can make the relay store the disturbance records.

Disturbance actual channel (ACC) table is showed below.

ACC No. Name ACC No. Name


131 Id_a 132 Id_b
133 Id_c 156 Ia_S1
157 Ib_S1 158 Ic_S1
189 Ia_S2 190 Ib_S2
191 Ic_S2 192 Ia_S3
193 Ib_S3 194 Ic_S3
175 I0S1 176 I0NPS2
177 I0NPS3 180 Uab_S1
181 Ubc_S1 182 Uca_S1
183 Uab_S2 184 Ubc_S2
170 Uab_S3 171 Ubc_S3
173 U0Delt 174 U0_Gap
221 I0dS1 222 I0dS2
223 I0dS3 224 I0CaS1
225 I0CaS2 226 I0CaS3

9.3.7 Generic function

The generic functions can be used to read the setting and protection measurement of the relay,
and modify the setting. Two supported type identifications are ASDU 21 and ASDU 10. For more
details about generic functions, see the IEC60870-5-103 standard.

1. Generic functions in control direction

INF Semantics
240 Read headings of all defined groups
241 Read values or attributes of all entries in one group
243 Read directory of a single entry
244 Read value or attribute of a single entry
245 General interrogation of generic data
248 Write entry
249 Write entry with confirmation
250 Write entry with execution
251 Write entry abort

2. Generic functions in monitor direction

INF Semantics
240 Read headings of all defined groups

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241 Read values or attributes of all entries of one group


243 Read directory of a single entry
244 Read value or attribute of a single entry
245 End of general interrogation of generic data
249 Write entry with confirmation
250 Write entry with execution
251 Write entry aborted

For detailed generic function numbers, please refer to section 9.4.

9.4 IEC60870-5-103 Interface over Ethernet

The IEC60870-5-103 interface over Ethernet is a master/slave interface with the relay as the slave
device. It is properly developed by NARI-RELAYS too. All the service of this relay is based on
generic functions of the IEC60870-5-103. The following table lists all the group number of this relay.
And this relay will send all the relevant information about group caption to the SAS or RTU after
establishing a successful communication link.

Two or three unattached Ethernet ports are available for IEC60870-5-103 in this relay. The
transmission speed is 100M/s.

Table 9.4-1 Generic function table

Group Caption Description Group Caption Description


Group No.
(Chinese) (English)
0 定值区号 Setting Group
1 保护定值 Protection settings
2 动作元件 Protection&Trip elements
3 运行告警 Operating alarm elements
8 故障信息 Sef-check alarm elements
9 扰动数据说明 Disturbance data
10 硬压板 Function enabling binary inputs
12 保护测量 Protection metering
15 装置参数 Equip parameters
16 装置描述 Equip description

See Section 9.3.7 “Generic Functions” for more details about the generic functions in
IEC60870-5-103.

9.5 Modebus Interface over Serial Port

9.5.1 Overview

The Modbus protocol is a master/slaver communication protocol, and this device is severed as a
slaver in this system. The detailed information about the Modbus protocol, see the “Modbus
Protocol Reference Guide (PI-MBUS-300 Rev.J)”.

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The Modbus protocol in this device has following definition.

 Physical layer configuration: 1 start-bit, 8 data-bit, 1 stop-bit, no check.

 Linker layer configuration: RTU communication mode, ASCII code not supported.

 Frame length limit: Maximum 256 bytes.

 Frame word definition: first MSB, later LSB.

9.5.2 Binary State Communication

The binary state includes protection element state, device operation state, alarm information state
and binary input state.

9.5.2.1 Protection Element State

Function Code: 01H

Address Protection Element State


0x0201 Op_FD
0x0202 Op_InstDiff
0x0203 Op_PcntDiff
0x0204 Op_OC1_S1
0x0205 Op_OC2_S1
0x0206 Op_OC3_S1
0x0207 Op_OC1_S2
0x0208 Op_OC2_S2
0x0209 Op_OC1_S3
0x020a Op_OC2_S3
0x020b Op_ROC1_S1
0x020c Op_ROC2_S1
0x020d Op_ROC1_S2
0x020e Op_ROC2_S2
0x020f Op_ROC1_S3
0x0210 Op_ROC2_S3
0x0211 Op_ROV11_Gap
0x0212 Op_ROV12_Gap
0x0213 Op_ROC11_Gap
0x0214 Op_ROC12_Gap
0x0215 Op_InstREF_S1
0x0216 Op_PcntREF_S1
0x0217 Op_InstREF_S2
0x0218 Op_PcntREF_S2
0x0219 Op_InstREF_S3
0x021a Op_PcntREF_S3
0x021b Op_CCE
0x021c TrpOutp1

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Address Protection Element State


0x021d TrpOutp2
0x021e TrpOutp3
0x021f TrpOutp4
0x0220 TrpOutp5
0x0221 TrpOutp6
0x0222 TrpOutp7
0x0223 TrpOutp8
0x0224 TrpOutp9
0x0225 TrpOutp10
0x0226 TrpOutp11
0x0227 TrpOutp12

9.5.2.2 Alarm Information State

Function Code: 01H

Address Alarm Information State


0x0301 Alm_Abnor
0x0302 Alm_CTS_S1
0x0303 Alm_CTS_S2
0x0304 Alm_CTS_S3
0x0305 Alm_VTS_S1
0x0306 Alm_VTS_S2
0x0307 Alm_VTS_S3
0x0308 Alm_OvLd
0x0309 Alm_InitCoolOvLd
0x030a Alm_BlkOLTC_OvLd
0x030b Alm_BO_CCE
0x030c Alm_SensCTS_Diff
0x030d Alm_CTS_Diff
0x030e Alm_ROV
0x030f Alm_BI_SOTF_S2
0x0310 Alm_BI_SOTF_S3
0x0311 Alm_REF_S1
0x0312 Alm_REF_S2
0x0313 Alm_REF_S3
0x0314 Alm_Comm_MON
0x0315 Alm_FD_MON
0x0316 Alm_Set_MON
0x0317 Alm_Pwr_MON
0x0318 Alm_Fail
0x0319 Alm_Setting
0x031a Alm_RAM

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Address Alarm Information State


0x031b Alm_ROM
0x031c Alm_Pwr_DC
0x031d Alm_TrpOut
0x031e Alm_CPLD
0x031f Alm_RatioCorr_CT
0x0320 Alm_ConnGrp

9.5.2.3 Binary Input Change Information

The functional code is 02H (Read Input Status).

Address Binary input state


0x0a01 EBI_Diff
0x0a02 EBI_PPF_S1
0x0a03 EBI_PPF_S2
0x0a04 EBI_PPF_S3
0x0a05 EBI_EF_S1
0x0a06 EBI_EF_S2
0x0a07 EBI_EF_S3
0x0a08 EBI_EF_Gap
0x0a09 EBI_Resv1
0x0a0a BI_SOTF_S2
0x0a0b BI_SOTF_S3
0x0a0c EBI_Resv2
0x0a0d EBI_Resv3
0x0a0e BI_Out_VT1
0x0a0f BI_Out_VT2
0x0a10 BI_Out_VT3
0x0a11 BI_BlkComm
0x0a12 BI_RstTarg
0x0a13 EBI_REF_S1
0x0a14 EBI_REF_S2
0x0a15 EBI_REF_S3
0x0a16 BI_Resv1
0x0a17 BI_Resv2
0x0a18 BI_Resv3
0x0a19 BI_Resv4

9.5.3 Analog Data Communication

The functional code is 04H (Read Input Registers). The analog data include differential protection
measurement, backup protection measurement, restricted earth fault protection measurement and
phase angles.

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9.5.3.1 Differential Protection Measurement

Address Analog Data Name Unit


0x0c01 Id_a Ie
0x0c02 Id_b Ie
0x0c03 Id_c Ie
0x0c04 Ir_a Ie
0x0c05 Ir_b Ie
0x0c06 Ir_c Ie
0x0c07 Id2_a Ie
0x0c08 Id2_b Ie
0x0c09 Id2_c Ie
0x0c0a IaCrS1 Ie
0x0c0b IbCrS1 Ie
0x0c0c IcCrS1 Ie
0x0c0d IaCrS2 Ie
0x0c0e IbCrS2 Ie
0x0c0f IcCrS2 Ie
0x0c10 IaCrS3 Ie
0x0c11 IbCrS3 Ie
0x0c12 IcCrS3 Ie
0x0c13 Ie_S1 A
0x0c14 Ie_S2 A
0x0c15 Ie_S3 A

9.5.3.2 Backup Protection Measurement

Address Analog Data Name Unit


0x0c16 Ia_S1 A
0x0c17 Ib_S1 A
0x0c18 Ic_S1 A
0x0c19 I1_S1 A
0x0c1a I2_S1 A
0x0c1b I0_S1 A
0x0c1c Uab_S1 V
0x0c1d Ubc_S1 V
0x0c1e Uca_S1 V
0x0c1f U1_S1 V
0x0c20 U2_S1 V
0x0c21 U0_S1 V
0x0c22 Ia_S2 A
0x0c23 Ib_S2 A
0x0c24 Ic_S2 A
0x0c25 I1_S2 A

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Address Analog Data Name Unit


0x0c26 I2_S2 A
0x0c27 I0_S2 A
0x0c28 Uab_S2 V
0x0c29 Ubc_S2 V
0x0c2a Uca_S2 V
0x0c2b U1_S2 V
0x0c2c U2_S2 V
0x0c2d Ia_S3 A
0x0c2e Ib_S3 A
0x0c2f Ic_S3 A
0x0c30 I1_S3 A
0x0c31 I2_S3 A
0x0c32 I0_S3 A
0x0c33 Uab_S3 V
0x0c34 Ubc_S3 V
0x0c35 Uca_S3 V
0x0c36 U1_S3 V
0x0c37 U2_S3 V
0x0c38 I0S1 A
0x0c39 I0NPS2 A
0x0c3a I0NPS3 A
0x0c3b I0_Gap A
0x0c3c U0_Gap V
0x0c3d U0Delt V
0x0c3e F_Dir0 1,0

9.5.3.3 Restricted Earth Fault Protection Measurment

Address Analog Data Name Unit


0x0c3f I0dS1 In
0x0c40 I0rS1 In
0x0c41 I0d2S1 In
0x0c42 I0CaS1 In
0x0c43 I0NPS1 In
0x0c44 K0CaS1
0x0c45 K0NPS1
0x0c46 I0dS2 In
0x0c47 I0rS2 In
0x0c48 I0d2S2 In
0x0c49 I0CaS2 In
0x0c4a I0NPS2 In
0x0c4b K0CaS2
0x0c4c K0NPS2

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Address Analog Data Name Unit


0x0c4d I0dS3 In
0x0c4e I0rS3 In
0x0c4f I0d2S3 In
0x0c50 I0CaS3 In
0x0c51 I0NPS3 In
0x0c52 K0CaS3
0x0c53 K0NPS3

9.5.3.4 Phase Angles

Address Analog Data Name Unit


o
0x0c55 ∠ I1ab
o
0x0c56 ∠ I1bc
o
0x0c57 ∠ I1ca
o
0x0c58 ∠ I2ab
o
0x0c59 ∠ I2bc
o
0x0c5a ∠ I2ca
o
0x0c5b ∠ I3ab
o
0x0c5c ∠ I3bc
o
0x0c5d ∠ I3ca
o
0x0c5e ∠ I12a
o
0x0c5f ∠ I12b
o
0x0c60 ∠ I12c
o
0x0c61 ∠ I13a
o
0x0c62 ∠ I13b
o
0x0c63 ∠ I13c
o
0x0c64 ∠ U1abbc
o
0x0c65 ∠ U1bcca
o
0x0c66 ∠ U1caab
o
0x0c67 ∠ U2abbc
o
0x0c68 ∠ U2bcca
o
0x0c69 ∠ U2caab
o
0x0c6a ∠ U3abbc
o
0x0c6b ∠ U3bcca
o
0x0c6c ∠ U3caab
o
0x0c6d ∠ I1CaNP
o
0x0c6e ∠ I2CaNP
o
0x0c6f ∠ I3CaNP

9.5.4 Settings Communication

The functional code is 03H (Read Holding Registers). The settings include equipment settings,
system settings and protection settings.

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9.5.4.1 Equipment Settings

Address Setting Item Unit


0x1f01 Password
0x1f02 Comm_Addr
0x1f03 IP1_Byte_3
0x1f04 IP1_Byte_2
0x1f05 IP2_Byte_3
0x1f06 IP2_Byte_2
0x1f07 IP3_Byte_3
0x1f08 IP3_Byte_2
0x1f09 Mask_Byte_3
0x1f0a Mask_Byte_2
0x1f0b Mask_Byte_1
0x1f0c Mask_Byte_0
0x1f0d NET_Protocol
0x1f0e COM1_Protocol
0x1f0f COM2_Protocol
0x1f10 COM1_Baud
0x1f11 COM2_Baud
0x1f12 Printer_Baud

9.5.4.2 System Settings

1) Protection Configuration

Address Setting Item Unit


Bit0: En_Diff
Bit1: En_PPF_S1
Bit2: En_PPF_S2
Bit3: En_PPF_S3
Bit4: En_EF_S1
Protection
Bit5: En_EF_S2
0x2f01 Configuring
Bit6: En_EF_S3
logic setting
Bit7: En_EF_Gap
Bit8: En_OvLd
Bit9: En_REF_S1
Bit10: En_REF_S2
Bit11: En_REF_S3

2) System Settings

Address Item Text Unit


0x0f01 Active_Grp Grp
0x0f02 Sn MVA
0x0f03 U1n_S1 KV

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Address Item Text Unit


0x0f04 U1n_S2 KV
0x0f05 U1n_S3 KV
0x0f06 I1n_CT_S1 A
0x0f07 I2n_CT_S1 A
0x0f08 I1n_CT_S2 A
0x0f09 I2n_CT_S2 A
0x0f0a I1n_CT_S3 A
0x0f0b I2n_CT_S3 A
0x0f0c I1n_CT1_ROC A
0x0f0d I2n_CT1_ROC A
0x0f0e I1n_CT2_ROC A
0x0f0f I2n_CT2_ROC A
0x0f10 I1n_CT3_ROC A
0x0f11 I2n_CT3_ROC A
0x0f12 Cfg_ConnGrp
0x0f13 Cfg_CT_OvLd
0x0f14 En_InstDrop_Trp5
0x0f15 En_CT3_ROC

9.5.4.3 Protection Settings

1) Diff Prot Settings

Address Setting Item Unit


0x0101 I_Pkp_PcntDiff Ie
0x0102 I_InstDiff Ie
0x0103 Slope1_PcntDiff
0x0104 Slope2_PcntDiff
0x0105 k_2ndH_PcntDiff
0x0106 I_Alm_Diff Ie
0x0107 TrpLog_Diff
Bit0:En_InstDiff
0x0108 Logic setting Bit1:En_PcntDiff
Bit2: En_CTSBlkDiff

2) S1 PPF Prot Settings

Address Setting Item Unit


0x1101 V_NegOV_VCE_S1 V
0x1102 Vpp_UV_VCE_S1 V
0x1103 I_OC1_S1 A
0x1104 t_OC1_S1 s
0x1105 I_OC2_S1 A
0x1106 t_OC2_S1 s

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Address Setting Item Unit


0x1107 I_OC3_S1 A
0x1108 t_OC3_S1 s
0x1109 TrpLog_OC1_S1
0x110a TrpLog_OC2_S1
0x110b TrpLog_OC3_S1
Bit0:En_VCE _OC1_S1
Bit1: En_VCE_OC2_S1
Bit2: En_S1.VCE_OC_S1
Logic
0x110c Bit3: En_S2.VCE_OC_S1
setting
Bit4: En_S3.VCE_OC_S1
Bit5: Opt_VTS_OC_S1
Bit6: En_Mem_Curr

3) S2 PPF Prot Settings

Address Setting Item Unit


0x2101 V_NegOV_VCE_S2 V
0x2102 Vpp_UV_VCE_S2 V
0x2103 I_OC1_S2 A
0x2104 t_OC1_S2 s
0x2105 I_OC2_S2 A
0x2106 t_OC2_S2 s
0x2107 TrpLog_OC1_S2
0x2108 TrpLog_OC2_S2
Bit0: En_VCE_OC1_S2
Logic Bit1: En_VCE_OC2_S2
0x2109
setting Bit2: En_OC2_SOTF_S2
Bit3: Opt_VTS_OC_S2

4) S3 PPF Prot Settings

Address Setting Item Unit


0x3101 V_NegOV_VCE_S3 V
0x3102 Vpp_UV_VCE_S3 V
0x3103 I_OC1_S3 A
0x3104 t_OC1_S3 s
0x3105 I_OC2_S3 A
0x3106 t_OC2_S3 s
0x3107 TrpLog_OC1_S3
0x3108 TrpLog_OC2_S3
Bit0: En_VCE_OC1_S3
Logic Bit1: En_VCE_OC2_S3
0x3109
setting Bit2: En_OC2_SOTF_S3
Bit3: Opt_VTS_OC_S3

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5) S1 EF Prot Settings

Address Setting Item Unit


0x4101 I_ROC1_S1 A
0x4102 t_ROC1_S1 s
0x4103 I_ROC2_S1 A
0x4104 t_ROC2_S1 s
0x4105 TrpLog_ROC1_S1
0x4106 TrpLog_ROC2_S1
Bit0: Opt_3I0_ROC_S1
Bit1: En_Dir_ROC1_S1
0x4107 Logic setting Bit2: En_Dir_ROC2_S1
Bit3: Opt_VT_ROC_S1
Bit4: Opt_Dir_ROC_S1

6) S2 EF Prot Settings

Address Setting Item Unit


0x5101 I_ROC1_S2 A
0x5102 t_ROC1_S2 s
0x5103 I_ROC2_S2 A
0x5104 t_ROC2_S2 s
0x5105 TrpLog_ROC1_S2
0x5106 TrpLog_ROC2_S2

7) S3 EF Prot Settings

Address Setting Item Unit


0x6101 I_ROC1_S3 A
0x6102 t_ROC1_S3 s
0x6103 I_ROC2_S3 A
0x6104 t_ROC2_S3 s
0x6105 TrpLog_ROC1_S3
0x6106 TrpLog_ROC2_S3

8) Gap EF Prot Settings

Address Setting Item Unit


0x7101 I_ROC1_Gap A
0x7102 t_ROC11_Gap s
0x7103 t_ROC12_Gap s
0x7104 V_ROV1_Gap V
0x7105 t_ROV11_Gap s
0x7106 t_ROV12_Gap s
0x7107 V_Alm_ROV V
0x7108 T_ Alm_ROV s

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Address Setting Item Unit


0x7109 TrpLog_ROC11_Gap
0x710a TrpLog_ROC12_Gap
0x710b TrpLog_ROV11_Gap
0x710c TrpLog_ROV12_Gap
0x710d Logic setting Bit0:En_Alm_ROV

9) Overload Prot Settings

Address Setting Item Unit


0x8101 I_Alm_OvLd A
0x8102 t_Alm_OvLd s
0x8103 I_InitCool_OvLd A
0x8104 t_InitCool_OvLd s
0x8105 I_Blk_OLTC_OvLd A
0x8106 t_Blk_OLTC_OvLd s
0x8107 I_CCE A
0x8108 TrpLog_CCE
Bit0: En_Alm_OvLd
Logic Bit1: En_InitCool_OvLd
0x8109
setting Bit2: En_Blk_OLTC_OvLd
Bit3: En_BO_CCE

10) S1 REF Prot Settings

Address Setting Item Unit


0x9101 I_Pkp_PcntREF_S1 In
0x9102 I_InstREF_S1 In
0x9103 Slope_PcntREF_S1
0x9104 TrpLog_REF_S1
Bit0: En_InstREF_S1
0x9105 Logic setting
Bit1: En_PcntREF_S1

11) S2 REF Prot Settings

Address Setting Item Unit


0xa101 I_Pkp_PcntREF_S2 In
0xa102 I_InstREF_S2 In
0xa103 Slope_PcntREF_S2
0xa104 TrpLog_REF_S2
Bit0: En_InstREF_S2
0xa105 Logic setting
Bit1: En_PcntREF_S2

12) S3 REF Prot Settings

Address Setting Item Unit


0xb101 I_Pkp_PcntREF_S3 In

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0xb102 I_InstREF_S3 In
0xb103 Slope_PcntREF_S3
0xb104 TrpLog_REF_S3
Bit0: En_InstREF_S3
0xb105 Logic setting
Bit1: En_PcntREF_S3

9.5.5 Diagnostics Information

The functional code is 08H (Diagnostics).

Function Code Semantics


00H Return query data
01H Restart communication option
0BH Return bus message count
0CH Return bus communication error count
0DH Return bus exception error count
0EH Return slave message count
0FH Return slave no response count

9.5.6 Abnormal Information

If this device receives an unidentified message, this device will reply an abnormal information
message to the master device.

The listing below shows the exception codes supported by the equipment.

Abnormality Code Description


01H Illegal Function
02H Illegal Data Address
03H Illegal Data Value
04H Negative Acknowledge

9.5.7 Equipment Information

Function Node: 0x2bH

The interface of reading equipment distinguishing code is simulated as an address. In order to


read equipment information quickly and easily, format of reading request and response messages
are some different to standard format.

Address Setting Name Remark


0x1001 Manufacturer ASCII string
0x1002 Equip Type ASCII string
0x1003 Equip Name ASCII string
0x1004 Equip Category ASCII string
0x1005 Function Descron ASCII string
0x1006 MON Version ASCII string
0x1007 MON Time ASCII string

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Address Setting Name Remark


0x1008 MON CRC ASCII string
0x1009 CPU Version ASCII string
0x100a CPU Time ASCII string
0x100b CPU CRC ASCII string

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Chapter 10 Installation

Chapter 10 Installation

10.1 General

The equipment must be shipped, stored and installed with the greatest care.

Choose the place of installation such that the communication interface and the controls on the
front of the device are easily accessible.

Air must circulate freely around the equipment. Observe all the requirements regarding place of
installation and ambient conditions given in this instruction manual.

Take care that the external wiring is properly brought into the equipment and terminated correctly
and pay special attention to grounding. Strictly observe the corresponding guidelines contained in
this section.

10.2 Safety Instructions

Modules and units may only be replaced by correspondingly trained personnel. Always observe
the basic precautions to avoid damage due to electrostatic discharge when handling the
equipment.

In certain cases, the settings have to be configured according to the demands of the engineering
configuration after replacement. It is therefore assumed that the personnel who replace modules
and units are familiar with the use of the operator program on the service PC.

DANGER: Only insert or withdraw the PWR module while the power supply is switched

off. To this end, disconnect the power supply cable that connects with the PWR module.

WARNING: Only insert or withdraw the other boards while the power supply is switched

off.

WARNING: The modules of the RCS-985TS may only be inserted in the slots designated

in section 6.2.1. Components can be damaged or destroyed by inserting boards in the


wrong slots.

DANGER: Improper handling of the equipment can cause damage or an incorrect

response of the equipment itself or the primary plant.

WARNING: Industry packs and ribbon cables may only be replaced or the positions of

jumpers be changed on a workbench appropriately designed for working on electronic

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equipment. The RCS-985TS modules, bus backplanes are sensitive to electrostatic


discharge when not in the unit's housing.

The basic precautions to guard against electrostatic discharge are as follows:

 Should boards have to be removed from RCS-985TS installed in a grounded cubicle in an HV


switchgear installation, discharge yourself by touching station ground (the cubicle)
beforehand.

 Only hold electronic boards at the edges, taking care not to touch the components.

 Only works on boards that have been removed from the cubicle on a workbench designed for
electronic equipment and wear a grounded wristband. Do not wear a grounded wristband,
however, while inserting or withdrawing units.

 Always store and ship the electronic boards in their original packing. Place electronic parts in
electrostatic screened packing materials.

10.3 Checking the Shipment

Check that the consignment is complete immediately upon receipt. Notify the nearest
NARI-RELAYS Company or agent, should departures from the delivery note, the shipping papers
or the order be found.

Visually inspect all the material when unpacking it. When there is evidence of transport damage,
lodge a claim immediately in writing with the last carrier and notify the nearest NARI-RELAYS
Company or agent.

If the equipment is not going to be installed immediately, store all the parts in their original packing
in a clean dry place at a moderate temperature. The humidity should not exceed 90% at a
maximum temperature of +55°C; the permissible storage temperature range in dry air is -40°C to
+70°C.

10.4 Material and Tools Required

The necessary mounting kits will be provided, including screws, pincers and assembly
instructions.

A suitable drill and spanners are required to secure the cubicles to the floor using the plugs
provided (if RCS-985TS is mounted in cubicles).

10.5 Device Location and Ambient Conditions

The place of installation should permit easy access especially to front of the device, i.e. to the
human-machine interface of the equipment.

There should also be free access at the rear of the equipment for additions and replacement of

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electronic boards.

Since every piece of technical equipment can be damaged or destroyed by inadmissible ambient
conditions, such as:

1) The location should not be exposed to excessive air pollution (dust, aggressive substances).

2) Severe vibration, extreme changes of temperature, high levels of humidity, surge voltages of
high amplitude and short rise time and strong induced magnetic fields should be avoided as
far as possible.

3) Air must not be allowed to circulate freely around the equipment.

The equipment can in principle be mounted in any attitude, but it is normally mounted vertically
(visibility of markings).

WARNING: Excessively high temperature can appreciably reduce the operating life of

the RCS-985TS

10.6 Mechanical Installation

The RCS-985TS is made of a single layer 6U height 6”chassis with 6 connectors on its rear panel
(See Figure 5.2). Figure 10.6-1 shows the dimensions of RCS-985TS for reference in mounting.
GR P
ES C

Figure 10.6-1 Dimensions of the RCS-985TS and the cut-out in the cubicle (unit: mm)

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NOTE: It is necessary to leave enough space top and bottom of the cut-out in the cubicle

for heat emission of the RCS-985TS.

As mentioned former (Chapter 6 “Hardware Description”), five modules are installed in the
enclosure of the RCS-985TS, and these modules must be plugged into the proper slots of the
RCS-985TS respectively. The safety instructions must be abided by when installing the boards,
see 10.2 “Safety Instructions”. Figure 10.6-2 shows the installation way that a module is being
plugged into a corresponding slot.

Figure 10.6-2 Demonstration of plugging a board into its corresponding slot

In the case of equipment supplied in cubicles, place the cubicles on the foundations that have
been prepared. Take care while doing so not to jam or otherwise damage any of the cables that
have already been installed. Secure the cubicles to the foundations.

10.7 Electrical Installation and Wiring

10.7.1 Grounding Guidelines

Switching operations in HV installations generate transient over voltages on control signal cables.
There is also a background of electromagnetic RF fields in electrical installations that can induce
spurious currents in the devices themselves or the leads connected to them.

All these influences can influence the operation of electronic apparatus.

On the other hand, electronic apparatus can transmit interference that can disrupt the operation of
other apparatus.

In order to minimize these influences as far as possible, certain standards have to be observed
with respect to grounding, wiring and screening.

NOTE: All these precautions can only be effective if the station ground is of good quality.

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10.7.2 Cubicle Grounding

The cubicle must be designed and fitted out such that the impedance for RF interference of the
ground path from the electronic device to the cubicle ground terminal is as low as possible.

Metal accessories such as side plates, blanking plates etc., must be effectively connected
surface-to-surface to the grounded frame to ensure a low-impedance path to ground for RF
interference. The contact surfaces must not only conduct well, they must also be non-corroding.

NOTE: If the above conditions are not fulfilled, there is a possibility of the cubicle or parts

of it forming a resonant circuit at certain frequencies that would amplify the transmission
of interference by the devices installed and also reduce their immunity to induced
interference.

Movable parts of the cubicle such as doors (front and back) or hinged equipment frames must be
effectively grounded to the frame by three braided copper strips (see Figure 10.7-1).

The metal parts of the cubicle housing and the ground rail are interconnected electrically
conducting and corrosion proof. The contact surfaces shall be as large as possible.

NOTE: For metallic connections please observe the voltage difference of both materials

according to the electrochemical code.

The cubicle ground rail must be effectively connected to the station ground rail by a grounding strip
(braided copper).

Figure 10.7-1 Cubicle grounding system

10.7.3 Ground Connection on the Device

There is a ground terminal on the rear panel (see Figure 10.7-2), and the ground braided copper
strip can be connected with it. Take care that the grounding strip is always as short as possible.
The main thing is that the device is only grounded at one point. Grounding loops from unit to unit
are not allowed.

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There are some ground terminals on some connectors of the RCS-985TS, and the sign is “GND”.
All the ground terminals are connected in the cabinet of this relay. So, the ground terminal on the
rear panel (see Figure 10.7-2) is the only ground terminal of this device.

Figure 10.7-2 Ground terminal of the RCS-985TS

10.7.4 Grounding Strips and their Installation

High frequency currents are produced by interfer ence in the ground connections and because of
skin effect at these frequencies, only the surface region of the grounding strips is of consequence.

The grounding strips must therefore be of (preferably tinned) braided copper and not round copper
conductors, as the cross-section of round copper would have to be too large.

Data of braided copper strip: threaded M4, 2.5mm 2.

Proper terminations must be fitted to both ends (press/pinch fit and tinned) with a hole for bolting
them firmly to the items to be connected.

The surfaces to which the grounding strips are bolted must be electrically conducting and
non-corroding.

The following figure shows the ground strip and termination.

Figure 10.7-3 Ground strip and termination

10.7.5 Guidelines for Wiring


There are several types of cables that are used in the connection of RCS-985TS: braided copper
cable, serial communication cable.

Recommendation of each cable:

 Grounding: braided copper cable, threaded M4, 2.5mm2

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 Serial communication: 4-core shielded braided cable

 DC Power supply, Binary Output: brained copper cable, 1.5mm 2

10.7.6 Wiring for Electrical Cables

A female connector is used for connecting the wires with it, and then a female connector plugs into
a corresponding male connector that is in the front of one board. For further details about the pin
defines of these connectors, see Chapter 6 “Hardware Description”.

The following figure shows the glancing demo about the wiring for the electrical cables.

01 02

03 04

Tighten 05 06

07 08

09 10

11 12
01

13 14

15 16

17 18

19 20

21 22

23 24

Figure 10.7-4 Glancing demo about the wiring for electrical cables

WARNING: Never allow the current transformer (CT) secondary circuit connected to this

equipment to be opened while the primary system is live. Opening the CT circuit will
produce a dangerously high voltage.

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Chapter 11 Commissioning

Chapter 11 Commissioning

11.1 General

This relay is fully numerical in their design, implementing all protection and non-protection
functions in software. The relay employ a high degree of self-checking and in the unlikely event of
a failure, will give an alarm. As a result of this, the commissioning test does not need to be as
extensive as with non-numeric electronic or electro-mechanical relays.

To commission numerical relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay.

Blank commissioning test and setting records are provided at the end of this manual for
completion as required.

Before carrying out any work on the equipment, the user should be familiar with the contents of the
safety and technical data sections and the ratings on the equipment’s rating label.

11.2 Safety Instructions

WARNING: Hazardous voltages are present in this electrical equipment during operation.

Non-observance of the safety rules can result in severe personal injury or property
damage.

WARNING: Only qualified personnel shall work on and around this equipment after

becoming thoroughly familiar with all warnings and safety notices of this manual as well
as with the applicable safety regulations.

Particular attention must be drawn to the following:

 The earthing screw of the device must be connected solidly to the protective earth conductor
before any other electrical connection is made.

 Hazardous voltages can be present on all circuits and components connected to the supply
voltage or to the measuring and test quantities.

 Hazardous voltages can be present in the device even after disconnection of the supply
voltage (storage capacitors!)

 The limit values stated in the technical data (Chapter 2) must not be exceeded at all, not even
during testing and commissioning.

 When testing the device with secondary test equipment, make sure that no other
measurement quantities are connected. Take also into consideration that the trip circuits and
maybe also close commands to the circuit breakers and other primary switches are

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disconnected from the device unless expressly stated.

DANGER: Current transformer secondary circuits must have been short-circuited before

the current leads to the device are disconnected.

WARNING: Primary test may only be carried out by qualified personnel, who are familiar

with the commissioning of protection system, the operation of the plant and safety rules
and regulations (switching, earthing, etc.)

11.3 Commission Tools

Minimum equipment required:

 Multifunctional dynamic current and voltage injection test set with interval timer

 Multimeter with suitable AC current range and AC/DC voltage ranges of 0-440V and 0-250V
respectively.

 Continuity tester (if not included in the multimeter)

 Phase angle meter

 Phase rotation meter

NOTE: Modern test set may contain many of the above features in one unit.

Optional equipment:

 An electronic or brushless insulation tester with a DC output not exceeding 500 V (for
insulation resistance test when required);

 A portable PC, with appropriate software (this enables the rear communications port to be
tested, if this is to be used, and will also save considerable time during commissioning).

 EIA RS-485 to EIA RS-232 converter (if EIA RS-485 IEC60870-5-103 port is being tested).

 An EPSON ® 300K printer.

 RCS-9000 serials dedicated protection tester TEST or HELP-90

11.4 Setting Familiarization

When commissioning a RCS-985TS relay for the first time, sufficient time should be allowed to
become familiar with the method by which the settings are applied. The Chapter 8 contains a
detailed description of the menu structure of this relay.

With the front cover in place all keys are accessible. All menu cells can be read. LED indicators
and alarms can be reset. Protection or configuration settings can be changed, or fault and event

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records cleared. However, menu cells will require the appropriate password to be entered before
changes can be made.

Alternatively, if a portable PC is available together with suitable setting software (such as


RCS-9700 SAS software), the menu can be viewed a page at a time to display a full column of
data and text. This PC software also allows settings to be entered more easily, saved to a file on
disk for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to become
familiar with its operation.

11.5 Product Checks

These product checks cover all aspects of the relay which should be checked to ensure that it has
not been physically damaged prior to commissioning, is functioning correctly and all input quantity
measurements are within the stated tolerances.

If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow them restoration later. This could be done
by extracting the settings from the relay itself via printer or manually creating a setting record.

11.5.1 With the Relay De-energized

The RCS-985TS serial feeder protection is fully numerical and the hardware is continuously
monitored. Commissioning tests can be kept to a minimum and need only include hardware tests
and conjunctive tests. The function tests are carried out according to user’
s correlative regulations.

The following tests are necessary to ensure the normal operation of the equipment before it is first
put into service.

 Hardware tests

These tests are performed for the following hardware to ensure that there is no hardware
defect. Defects of hardware circuits other than the following can be detected by
self-monitoring when the DC power is supplied.

 User interfaces test

 Binary input circuits and output circuits test

 AC input circuits test

 Function tests

These tests are performed for the following functions that are fully software-based. Tests of
the protection schemes and fault locator require a dynamic test set.

 Measuring elements test

 Timers test

 Metering and recording test

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 Conjunctive tests

The tests are performed after the relay is connected with the primary equipment and other
external equipment.

 On load test

 Phase sequence check and polarity check.

11.5.1.1 Visual Inspection.

After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected, contact the vendor. Following items listed is
necessary.

 Protection panel

Carefully examine the protection panel, protection equipment inside and other parts inside to
see that no physical damage has occurred since installation.

The rated information of other auxiliary protections should be checked to ensure it is correct
for the particular installation.

 Panel wiring

Check the conducting wire which is used in the panel to assure that their cross section
meeting the requirement.

Carefully examine the wiring to see that they are no connection failure exists.

 Label

Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to
make sure that their labels meet the requirements of this project.

 Equipment plug-in modules

Check each plug-in module of the equipments on the panel to make sure that they are well
installed into the equipment without any screw loosened.

 Earthing cable

Check whether the earthing cable from the panel terminal block is safely screwed to the panel
steel sheet.

 Switch, keypad, isolator binary inputs and push button

Check whether all the switches, equipment keypad, isolator binary inputs and push buttons
work normally and smoothly.

11.5.1.2 Insulation Test (if required)

Insulation resistance tests are only necessary during commissioning if it is required for them t o be
done and they have not been performed during installation.

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Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation
tester at a DC voltage not exceeding 500V, The circuits need to be tested should include:

 Voltage transformer circuits

 Current transformer circuits

 DC power supply

 Optic-isolated control inputs

 Output contacts

 Communication ports

The insulation resistance should be greater than 100MΩ at 500V.

Test method:

To unplug all the terminals sockets of this relay, and do the Insulation resistance test for each
circuit above with an electronic or brushless insulation tester.

On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection

11.5.1.3 Check the Jumpers

In general, the jumpers of the relay have been set correctly before sent to user. While, checking
the jumpers is a good habit before the relay is brought to service. Setting method of the jumpers is
explained in Chapter 6 detailedly.

11.5.1.4 External Wiring

Check that the external wiring is correct to the relevant relay diagram and scheme diagram.
Ensure as far as practical that phasing/phase rotation appears to be as expected.

Check the wiring against the schematic diagram for the installation to ensure compliance with the
customer’s normal practice.

11.5.1.5 Auxiliary Supply

The relay can be operated from either 110/125Vdc or 220/250Vdc auxiliary supply depending on
the relay’s nominal supply rating. The incoming voltage must be within the operating range
specified in the following table, before energizing the relay, measure the auxiliary supply to ensure
it within the operating range.

Rated Voltage 110/125VDC 220/250VDC


Variation 88 - 144 VDC 176 - 288 VDC

It should be noted that the relay can withstand an AC ripple of up to 15% of the upper rated voltage
on the DC auxiliary supply.

WARNING: Energize the relay only if the auxiliary supply is within the specified operating

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ranges.

11.5.2 With the Relay Energized

The following groups of checks verify that the relay hardware and software is functioning correctly
and should be carried out with the auxiliary supply applied to the relay.

The current and voltage transformer connections must remain isolated from the relay for these
checks. The trip circuit should also remain isolated to prevent accidental operation of the
associated circuit breaker.

11.5.2.1 Front Panel LCD Display

Connect the relay to DC power supply correctly and turn the relay on. Check program version and
forming time displayed in command menu to ensure that are corresponding to what ordered.

11.5.2.2 Date and Time

If the time and date is not being maintained by substation automation system, the date and time
should be set manually.

Set the date and time to the correct local time and date using menu item ”CLOCK”.

In the event of the auxiliary supply failing, with a battery fitted on CPU board, the time and date will
be maintained. Therefore when the auxiliary supply is restored the time and date will be correct
and not need to set again.

To test this, remove the auxiliary supply from the relay for approximately 30s. After being
re-energized, the time and date should be correct.

11.5.2.3 Light Emitting Diodes (LEDs)

On power up, the green LED “HEALTHY”should have illuminated and stayed on indicating that
the relay is healthy.

The relay has latched signal relays which remember the state of the trip when the relay was last
energized from an auxiliary supply. Therefore these indicators may also illuminate when the
auxiliary supply is applied. If any of these LEDs are on then they should be reset before
proceeding with further testing. If the LED successfully reset, the LED goes out. There is no testing
required for that that LED because it is known to be operational.

It is likely that alarms related to voltage transformer supervision or current transformer supervison
will not reset at this stage.

 Testing the “HEALTHY”LED

Apply the rated DC Power supply and check that the “HEALTHY”LED is lighting in green. We
need to emphasize that the “HEALTHY”LED is always lighting in operation course except that the
equipment find serious errors in it.

 Testing the “ALARM”LED

Produce one of the abnormal conditions listed in Chapter 4, the “ALARM”LED will light in yellow.

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When abnormal condition reset, the “ALARM”LED extinguishes.

 Testing the TRIP LED

The “TRIP”LED can be tested by initiating a manual circuit breaker trip from the relay. However
the “TRIP” LED will operate during the setting checks (performed later). Therefore no further
testing of the “TRIP”LED is required at this stage.

11.5.2.4 Testing the AC Current Inputs

This test verified that the accuracy of current measurement is within the acceptable tolerances.

Apply current equal to the line current transformer secondary winding rating to each current
transformer input of the corresponding rating in turn, see the following table or external connection
diagram for appropriate terminal numbers, checking its magnitude using a multimeter/test set
readout. The corresponding reading can then be checked in the relays menu.

The measurement accuracy of the relay is 2.5 % or 0.02In,. However an additional allowance must
be made for the accuracy of the test equipment being used.

Current channel linearity and precision checkout

Input Measurement (on LCD)


Items
Value Angle Value Angle
IA
Side 1 IB
current IC
3Io
IA
Side 2 IB
current IC
3Io
IA
IB
Side 3
IC
current
3Io
(optional)

11.5.2.5 Testing the AC Voltage Inputs

This test verified that the accuracy of voltage measurement is within the acceptable tolerances.

Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.

The measurement accuracy of the relay is 2.5% or 0.1V. However an additional allowance must be
made for the accuracy of the test equipment being used.

Voltage channel linearity and precision checkout

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Chapter 11 Commissioning

Input Measurement (on LCD)


Items
Value Angle Value Angle
Uab
Side 1 voltage Ubc
Uca
Uab
Side 2 voltage Ubc
Uca
Uab
Side 3 voltage Ubc
Uca
zero sequence voltage for
alarm element
Gap zero sequence voltage
for protection element

11.5.2.6 Testing the Binary Inputs

This test checks that all the binary inputs on the relay are functioning correctly.

The binary inputs should be energized one at a time, see external connection diagrams for
terminal numbers.

Ensure that the voltage applied on the binary input must be within the operating range.

The status of each binary input can be viewed using menu item “BI STATE”. Sign “1”denotes an
energized input and sign “0”denotes a de-energized input.

Binary Inputs testing checkout

Terminal No. Signal Name BI Status on LCD Correct ?

11.5.3 Protective Function Testing

The setting checks ensure that the entire application-specific relay, for the particular installation,
has been correctly applied to the relay.

NOTE: The trip circuit should remain isolated during these checks to prevent accidental

operation of the associated circuit breaker.

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11.5.3.1 Demonstrate Correct Protection Operation

The above tests have already demonstrated that the protection is within calibration, thus the
purpose of these tests is as follows:

 To conclude that protection logic is correct.

 To verify that settings are in the tolerance range.

 To verify the corresponding operating contacts, issued trip reports and LED indicators lit are
correct when a protection element operates.

NOTE: Before each protective function test, its tripping logic setting should be configured

to enable the protection. Please refer to Chapter 7 for the details.

11.5.3.2 Current differential protection test

Preparation: Energize the binary input [EBI_Diff].

(1) Percent differential protection

a) Go to Settings menu and check the settings. Make sure that [En_PcntDiff] is “1”.

b) Connect the test set for injection of three-phase current to the current terminals of any
two sides, e.g. side 1 and side 2.

c) Increase the current in any phase until the protection function operates, and at the same
time record the operating current.

d) When protection operates, corresponding signal contacts and tripping contacts (by
configuring trip logic setting [TrpLog_Diff]) can be tested.

NOTE: In order to be transformed into per unit value, the current compensation should be

done in the program and please refer to 3.4.1.1.

One side current Another side current restraint Differential


No. current current
A Ie A Ie
Ie Ie
1
2
3
4
5
6
7

(2) 2nd harmonic current value

a) A 2nd harmonic current of about 20 % (assumes setting [k_2ndH_PcntDiff] is sat as


“0.15”) can be added to the fundamental tone in phase A. Increase the current in phase A

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Chapter 11 Commissioning

above the pickup value measured in point 3 above. Repeat test with current injection in
phases B and C respectively.

(3) Unrestrained instantaneous differential protection test.

a) Check the settings and make sure [En_InstDiff] is “1”.

b) Increase the current in any phase until the protection function operates, and at the same
time record the operating current.

(4) Function test of percent differential protection blocked by CT circuit failure.

a) Check the settings and make sure [En_PcntDiff] is “1”.

b) Add three phases rated currents at any two sides and cut off any phase current, then
[Alm_CTS_Diff] will be issued. When [Opt_CTS_PcntDiff] is “1”, percent differential
protection will be blocked, otherwise it will operate.

c) The [Alm_CTS_Diff] signal can disappear only by removing all currents and resetting the
equipment.

11.5.3.3 Restricted earth fault protection test

There are three restricted earth fault protection (also called zero-sequence differential protection)
elements of each side are equipped according to hardware configuration, and they have the
similar logics with the independent settings. Here zero-sequence differential protection of side 1 is
taken as an example.

DANGER: Before restricted earth fault protection of some side is put into operation on

site, polarity of zero-sequence current transformers (CT) on neutral point of the side must
have been checked right by an energizing test of the side of a transformer or a test of
simulating an external fault of the side in primary system. Otherwise a maloperation may
occur during an external earth fault.

WARNING: Before test, please check the hardware configuration and designing scheme

to ensure the zero-sequence differential protection of side 3 is equipped in your


protection equipment. If this protective function is not equipped, this test is needed not to
be done, otherwise damage to your equipment maybe occur.

Preparation: Energize the binary input [EBI_Diff].

(1) Percent zero-sequence differential protection

a) Go to Settings menu and check the settings. Make sure that [En_PcntREF_S1] is “1”.

b) Connect the test set for injection of three-phase current to the three-phase current
terminals of side 1 and zero sequence current to the zero sequence CT 3 input terminals.

c) Increase the current in any phase until the protection function operates, and at the same
time record the operating current.

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d) When protection operates, corresponding signal contacts and tripping contacts (by
configuring trip logic setting [TrpLog_REF_S1]) can be tested.

NOTE: In order to be transformed into per unit value, the current compensation should be

done in the program and please refer to section 3.5.1.


Calculated zero sequence Zero sequence current of
restraint Differential
differential current of side CT on neutral point of side
No. current current
1 1
In In
A In A In

1
2
3
4
5

(2) Unrestrained instantaneous differential protection test.

c) Check the settings and make sure [En_InstREF] is “1”and instantaneous differential
protection contact is closed.

d) Increase the current in any phase until the protection function operates, and at the same
time record the operating current.

DANGER: Before restricted earth fault protection of some side is put into operation on

site, polarity of zero-sequence current transformers (CT) on neutral point of the side must
have been checked right by an energizing test of the side of transformer or a test of
simulating an external fault of the side in primary system. Otherwise m aloperation may
occur during an external earth fault.

11.5.3.4 Side 1 phase-to-phase fault protection test

Preparation: Energize the binary input [EBI_PPF_S1].

(1) All stages and delay time of overcurrent protection

a) Check the settings and make sure [En_PPF_S1] is “1” and phase-to-phase fault
protection contact of side 1 is closed.

b) Disable VCE of overcurrent protection.

c) Increase the current in any phase until the protection function operates, and at the same
time record the operating current.

Stage 1 of overcurrent Stage 2 of overcurrent Stage 3 of overcurrent


Settings
Delay time

(2) Test voltage controlled overcurrent protection element.

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Chapter 11 Commissioning

a) Check the settings and make sure [En_PPF_S1] is “1” and phase-to-phase fault
protection contact of side 1 is closed

b) Enable VCE elements of overcurrent protection, e.g [En_VCE_OC1_S1] is “1” and


[En_S2.VCE _OC_S1] is “1”.

c) Make sure the current in any phase is higher than stage 1 of overcurrent setting.
Decrease the phase to phase voltage or increase negative sequence votage of side 2
until the protection function operates and note the operating voltage.

Vpp of VCE V2 of VCE


Settings

11.5.3.5 Side 1 earth fault protection test

Earth fault protection of side 1, 2 and 3 are almost same, except that direction element is
configured for side 1.
Preparation: Engergize the binary input [EBI_EF_S1].
(1) All stages and delay time of zero sequence overcurrent protection

a) Check the settings and make sure [En_EF_S1] is “1”and disable direction elements of
zero-sequence overcurrent protection of side 1.
b) Increase the current in any phase until the protection function operates, and at the same
time record the operating current.

Stage 1 of zero sequence overcurrent Stage 2 of zero sequence overcurrent


Settings
Delay time

(2) Test directional zero-sequence overcurrent protection element.

a) Check the settings and make sure [En_EF_S1].


b) Enable direction elements and select its direction, e.g [En_Dir_ROC1_S1] is “1”and “

[Opt_Dir_ROC_S1] is “1”.

c) Make sure the current in any phase is higher than stage 1 of zero-sequence overcurrent
setting. Decrease or increase angle between zero sequence current and zero sequence
voltage until the protection function operates and pay attention to the operating phase.

11.5.3.6 Side 2 or side 3 phase-to-phase fault protection test

Phase-to-phase fault protections of side 2 and 3 are similar with similar settings cells. Here
function test of side 2 is taken as an example.
Preparation: Energize the binary input [EBI_PPF_S2].
(1) All stages and delay time of overcurrent protection

a) Check the settings and make sure [En_PPF_S2] is “1” and phase-to-phase fault
protection of side 2 contact is closed.

b) Disable VCE of overcurrent protection.

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Chapter 11 Commissioning

c) Increase the current in any phase until the protection function operates, and at the same
time record the operating current.

Stage 1 of overcurrent Stage 2 of overcurrent


Settings
Delay time

(2) Test voltage controlled overcurrent protection element.


a) Check the settings and make sure [En_PPF_S2] is “1”and earth fault protection contact
is closed.

b) Enable VCE elements of overcurrent protection, e.g ]En_VCE_ OC1_S2]is “1”.


c) Make sure the current in any phase is higher than stage 1 of overcurrent setting.
Decrease the phase to phase voltage or increase negative sequence voltage of side until
the protection function operates and note the operating voltage.

Vpp of VCE V0 of VCE


Settings

11.5.3.7 Side 2 or 3 earth fault protection test

WARNING: Before test, please check the hardware configuration and designing scheme

to ensure earth fault protection of side 3 is equipped in your protection equipment. If this
protective function is not equipped, this test is needed not to be done, otherwise damage
to your equipment maybe occur.

Earth fault protections of side 2 and 3 are similar with similar settings cells. Here function test of
side 2 is taken as an example.
Preparation: Energize the binary input [EBI_EF_S2].
(1) All stages and delay time of zero sequence overcurrent protection
a) Check the setting and make sure [En_CT3_ROC] is “1”. Please note this step checking is
only for earth fault protection of side 3.

b) Check the settings and make sure [En_EF_S2] is “1”.

c) Disable direction elements of zero-sequence overcurrent protection.

d) Increase the current in any phase until the protection function operates and note the
operating current.

Stage 1 of zero sequence overcurrent Stage 2 of zero sequence overcurrent


Settings
Delay time

11.5.3.8 “Gap”protection test


Preparation: Energize the binary input [EBI_EF_Gap].
(1) Gap zero sequence overcurrent protection
a) Zero-sequence CT2 (121-122) is fixed as zero-sequence current input of gap

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Chapter 11 Commissioning

zero-sequence overcurrent protection.


b) Check the settings and make sure [En_Gap_EF] is “1”.

c) Increase the zero sequence current via terminal 121-122 until the protection function
operates and pay attention to operating current.

Zero sequence current


Settings
Delay time 1
Delay time 2

(2) Gap zero sequence overvoltage protection (Optional)

WARNING: Before test, please check the hardware configuration and designing scheme

to ensure this protective function is equipped in your protection equipment. If this


protective function is not equipped, this test is needed not to be done, otherwise damage
to your equipment maybe occur.

a) Check the setting and make sure [En_CT3_ROC] is “0”.

b) Please configure settings of gap zero sequence overvoltage protection.

c) Check the settings and make sure [En_Gap_EF] is “1”and earth fault protection contact
is closed.

d) Increase the zero sequence voltage via terminal 123-124 until the protection function
operates and note the operating voltage.

Zero sequence voltage


Settings
Delay time 1
Delay time 2

11.5.3.9 Breaking capacity blocking function test (check it please)

Preparation: Energize the binary input [EBI_OvLd].

(1) Configure the logic setting [Cfg_CT_OvLd] to select which side three-phase current channel is
used for the function. If [Cfg_CT_OvLd] is set as “3”, the function is equipped at side 3.

(2) Check the settings and make sure [En_OvLd] is “1”.

(3) When the current of side 3 is lower than breaker capacity limit setting [I_CCE], CB (circuit
breaker) of side 3 will be tripped with time delay 20 ms. But if the current is higher than the setting,
the relay will trip other breakers according to configured trip logic. Until the current value is below
than 0.85 times breaker capacity limit setting, the CB of side 3 will be tripped.

11.5.3.10 Overload, initiating cooling and on-load tap change blocking tests

Preparation: Energize the binary input [EBI_OvLd].

(1) Configure the logic setting [Cfg_CT_OvLd] to select which side three-phase current channel is

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Chapter 11 Commissioning

used for the function. If [Cfg_CT_OvLd] is set as “3”, the function is equipped at side 3.

(2) Check the settings and make sure [En_OvLd] is “1”.

(3) Check the protections settings and modify them (if needed).

(4) Overload alarm test.

(5) Initiating cooling test.

(6) On-load tap change blocking function test.

11.5.3.11 CT circuit failure alarm test

(1) Check the protections settings and modify them (if needed).

(2) Test of CT circuit abnormality alarm

(3) Test of differential current abnormality alarm in differential protection circuit.

(4) Test of CT circuit failure in differential protection

11.5.3.12 VT circuit failure alarm test

(1) Check the protections settings and modify them (if needed).

(2) Test VT circuit failure alarm of each side.

11.5.3.13 Other function check

Check the “RESET”bottom on panel. Please push the “RESET”button to reset “TRIP”LED.

Check whether there are any kinds of reports displayed on LCD of equipment during function test.

Check printing function. Connect printer provided to equipment and push the “PRINT”button to
print last tripping report. Use keypad to select other kinds of reports to print.

11.5.4 Print Fault Report

In order to acquire the details of protection operation, it is convenient to print the fault report of
protection device. For further details, see section 8.7.3.

11.5.5 On-load Checks


The objectives of the on-load checks are:

1. Confirm the external wiring to the current and voltage inputs is correct.

2. Measure the magnitude of on-load current and voltage (if applicable).

3. Check the polarity of each current transformer.

However, these checks can only be carried out if there are no restrictions preventing the
tenderization of the plant being protected.

Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has
been removed to allow testing.

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Chapter 11 Commissioning

If it has been necessary to disconnect any of the external wiring from the protection in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram. Confirm current and voltage
transformer wiring.

11.5.6 Final Checks

After the above tests are completed, remove all test or temporary shorting leads, etc. If it has been
necessary to disconnect any of the external wiring from the protection in order to perform the
wiring verification tests, it should be ensured that all connections are replaced in accordance with
the relevant external connection or scheme diagram.

Ensure that the protection has been restored to service.

If the protection is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. If a test block is installed, remove the
test plug and replace the cover so that the protection is put into service.

Ensure that all event records, fault records, disturbance records and alarms have been cleared
and LED’
s has been reset before leaving the protection.

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Chapter 12 Maintenance

Chapter 12 Maintenance

12.1 Maintenance Schedule

It is recommended that products supplied by NARI-RELAYS receive periodic monitoring after


installation. In view of the critical nature of protective relays and their infrequent operation, it is
desirable to confirm that they are operating correctly at regular intervals.

This relays are self-supervised and so require less maintenance than earlier designs of relay. Most
problems will result in an alarm so that remedial action can be taken. However, some periodic
tests should be done to ensure that the relay is functioning correctly and the external wiring is
intact.

12.2 Regular Testing

The relay is almost completely self-supervised. The circuits which can not be supervised are
binary input, output circuits and human machine interfaces. Therefore regular testing can be
minimized to checking the unsupervised circuits.

12.3 Failure Tracing and Repair

Failures will be detected by automatic supervision or regular testing.

When a failure is detected by supervision, a remote alarm is issued and the failure is indicated on
the front panel with LED indicators and LCD display. It is also recorded in the alarm record.
Failures detected by supervision are traced by checking the “ALM REPORT”screen on the LCD.
See section 8.3.3 “Display under Abnormal Condition”for the details of the alarm events.

When a failure is detected during regular testing, confirm the following:

 Test circuit connections are correct

 Modules are securely inserted in position

 Correct DC power voltage is applied

 Correct AC inputs are applied

 Test procedures comply with those stated in the manual

12.4 Replace Failed Modules

If the failure is identified to be in the relay module and the user has spare modules, the user can
recover the protection by replacing the failed modules.

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Chapter 12 Maintenance

Repair at the site should be limited to module replacement. Maintenance at the component level is
not recommended.

Check that the replacement module has an identical module name (AI, PWR, CPU, BO) and
hardware type-form as the removed module. Furthermore, the CPU module replaced should have
the same software version. And the AI and PWR module replaced should have the same ratings.

WARNING: Units and modules may only be replaced while the supply is switched off and

only by appropriately trained and qualified personnel. Strictly observe the basic
precautions to guard against electrostatic discharge.

WARNING: When handling a module, take anti -static measures such as wearing an

earthed wrist band and placing modules on an earthed conductive mat. Otherwise, many
of the electronic components could suffer damage. After replacing the CPU module,
check the settings.

DANGER: After replacing modules, be sure to check that the same configuration is set as

before the replacement. If this is not the case, there is a danger of the unintended
operation of switchgear taking place or of protections not functioning correctly. Persons
may also be put in danger.

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Chapter 13 Decommissioning and Disposal

Chapter 13 Decommissioning and Disposal

13.1 Decommissioning

13.1.1 Switching off

To switch off the RCS-985TS, switch off the external miniature circuit breaker of the power supply.

13.1.2 Disconnecting cables


Disconnect the cables in accordance with the rules and recommendations made by relational
department.

DANGER: Before disconnecting the power supply cables that connected with the PWR

module of the RCS-985TS, make sure that the external miniature circuit breaker of the
power supply is switched off.

DANGER: Before disconnecting the cables that are used to connect analog input module

with the primary CTs and VTs, make sure that the circuit breaker for the primary CTs and
VTs is switched off.

13.1.3 Dismantling

The RCS-985TS rack may now be removed from the system cubicle, after which the cubicles may
also be removed.

DANGER: When the station is in operation, make sure that there is an adequate safety

distance to live parts, especially as dismantling is often performed by unskilled personnel.

13.2 Disposal

In every country there are companies specialized in the proper disposal of electronic waste.

NOTE: Strictly observe all local and national regulations when disposing of the device.

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Chapter 13 Decommissioning and Disposal

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Chapter 14 Manual Version History

Chapter 14 Manual Version History


The version histories of the software and the manual for RCS-985TS are listed below.

Software Manual
Source Documentation
Version Version

RCS-985TS
V 1.00 V0.99 RCS-985TS_Instruction_Manual_Standard_V1.00.doc
V 2.10
RCS-985TS_B V1.01 V1.00 RCS-985TS_Instruction_Manual_Standard_V1.01.doc
V2.10-080716 V1.02 V1.01 RCS-985TS_Instruction_Manual_Standard_V1.02.doc

Modifying description of each manual version is shown below.

Manual
Section Page No. Description of change Note
Version

V1.00 Original issue to standard version


Renew the time of the international
Chapter 2 7~13
standard
Delet technical data “Accurate
Section 2.2 11 Operating Scope”; “General Error of
Analog Input Measurement”
24, Modify the description of correction
Section 3.5.1
25 coefficient of REF
Modify the logic figure of stage 1(2)
Section
32 voltage controlled overcurrent
V1.01 3.6.7.2
protection of side 1
Modify the corresponding part of
Section 5.2.2 54~55
correction coefficient of REF
Modify the description of modbus
Section 9.5 209~222
communication
Renew the time of all refered
Section 2.1 23~27
international standard
Modify the old module names to new
All the manual
defined names.
Modify the time of the international
Chapter 2 7~13
standard
V1.02 Add a section CT abnormality of REF
Section 3.13 43
protection
Section 3.14 44 Add gereral description of 110V VT

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Chapter 14 Manual version history

Manual
Section Page No. Description of change Note
Version

254 NANJING NARI-RELAYS ELECTRIC CO., LTD

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