“Towards Global Technological Intelligence”

A Report on

Industrial lecture – II

For the Degree of

Batchelor of Technology
In
Electronics and Telecommunication Engineering

Submitted by

Samruddhi Deshmukh
(ID-18004027)

Department of Electronics and Telecommunication

Engineering Government College of Engineering Amravati
(An Autonomous Institute of Government of Maharashtra)
Maharashtra India
2021-2022
Industrial lecture topic : Packaging and delivery of high performance semiconductor
and systems
Name of speaker : Mr. Arun Chandrasekhar
Date : 15/03/2013

Taking advantage of the latest solver technologies across electromagnetic, thermal, mechanical, and other
disciplines, on a single digital platform, enables process acceleration and time-to-market gains of orders of
magnitude, versus the traditional fragmented design approach.
With knowledge based modelling (KBM), expert knowhow can be effectively captured and redeployed.
Together with verification automation, KBM allows design changes to be quickly updated and analysed,
expanding the design space and allowing for innovative packaging approaches.
Semiconductor innovation is the art of orchestrating exponentially growing product complexity together with
the dynamics of diverse and remotely operating teams. Synchronizing innovation on a single digital platform
that includes requirements, project, IP and engineering data management, provides the agility for delivering
successful chips and systems, including optimal package designs.
Packaging is an essential part of semiconductor manufacturing and design. It affects power, performance,
and cost on a macro level, and the basic functionality of all chips on a micro level.
The package is the container that holds the semiconductor die. The packaging may be done by a separate
vendor, the OSAT, although foundries are expanding their packaging efforts. The package protects the die,
connects the chip to a board or other chips, and may dissipate heat.
Many types of packages in use today, and more are either in research at universities or ready for production
— everything from complex stacked die with through-silicon via to fan-outs and complex systems on chip.
Packages come in different materials, can be standard or custom, and they can have active or passive cooling.
Packages used to be considered a fairly non-critical part of the semiconductor design. They are now essential
on every level, and there is a race on between foundries and OSATs to grab a larger share of this market as
complexity and profitability increases.
In applications ranging from medical electronics to factory automation, innovations in an increasingly
important technology – semiconductor packaging – are helping meet demands for smaller, faster and more
reliable chips that deliver high performance, improved power efficiency and lower costs.
“Packaging is the bridge that enables electronic circuits to interact with the real world,” said Anindya
Poddar, director of research and development for our company’s Packaging group. “Whether you’re
watching your flat-screen television, listening to your smart earbuds, appreciating the efficiency of machines
in an automated factory or riding in an autonomous vehicle, the things we enjoy are enabled through the
miniaturization and integration of packaging.”
Semiconductor packages encapsulate digital circuits and connect them to circuit boards where they interact
with other system components. There are thousands of package types.
Each type of electronic device has a different need,” said Sreenivasan Koduri, a TI Fellow who works on
packaging technologies. “Chips used in outer space have much different requirements than a robot in a
factory, servers in a data center or your phone, washing machine or electric vehicle. One size doesn’t fit all.”
The innovation required to design, develop and manufacture such a wide range of packages requires a
unique set of capabilities.
Industrial lecture topic : Layout optimization analog-digital integration
Name of spaekaer : Ms. Srideepa
Date : 06/04/2013

Recently, the demand for analog and mixed-signal (AMS) integrated circuits (ICs) has increased
significantly due to various emerging applications. However, most of the AMS IC layout design efforts are
still handled manually at present, which is time-consuming and error-prone. The AMS layout automation
level is far from meeting the need for fast layout-circuit performance iterations to accommodate the rapid
growth of the market. In general, the methodologies adopted by AMS layout automation tools mainly fall in
several different categories: (1) optimization-based approach, which is the most widely used one; (2)
template-based approach (e.g., for layout retargeting); and (3) standard cell-based digitalized AMS circuit
design and synthesis methodology, which is a new direction preferable in advanced process technology
nodes. This dissertation proposes a set of techniques and algorithms to address various practical problems in
these major directions of analog and mixed-signal circuit layout automation research. For the direction of the
optimization-based AMS IC layout automation, two analog placement algorithms are proposed to improve
the layout results from different aspects. Firstly, hierarchical placement techniques for highperformance
AMS ICs are proposed, which minimize the critical parasitics in addition to the total area and half-perimeter
wirelength, while satisfying the analog placement constraints simultaneously, including symmetry and
proximity group constraints. Secondly, an analytical framework is proposed to tackle the device layer-aware
analog placement problem, which can effectively reduce the total area and wirelength without degrading the
circuit performance, leveraging the fact that it can be beneficial to overlap some devices built by mutually
exclusive layers.
For the direction of the template-based approach, this dissertation also proposes a new layout retargeting
framework It first applies effective algorithms to extract analog placement constraints from previous quality-
approved layouts, including symmetry and regularity constraints. After that, it preserves the prior design
expertise during retargeting while exploring different layout topologies to improve the result quality.
Furthermore, for both optimization-based and template-based AMS IC layout automation approaches, well
island generation persists as a fundamental and unresolved challenge in the post-placement optimization
stage. To address the well generation problem, this dissertation proposes a generative adversarial network
(GAN) guided framework with a post-refinement stage to mimic the behavior of experienced designers in
well generation, leveraging the previous high-quality manually-crafted layouts. Guiding regions for the well
islands are first generated by a trained GAN model, after which the results are legalized through post-
refinement to satisfy the design rules. Finally, for the standard cell-based digitalized AMS IC design and
synthesis methodology, this dissertation presents a scaling compatible, synthesis friendly ring voltage-
controlled oscillator (VCO) based ∆Σ analog-to-digital converter (ADC). Its circuit performance improves as
process technology advances, and its layout can be fully synthesized by leveraging digital circuit automation
tools. It also demonstrates favorable performance compared with the prior digitalized ADCs and in-line
performance with state-of-the-art manual designs
When the term “integrated circuit design” is mentioned, most people think of the design of complex
microprocessors. These circuits are designed using digital design techniques, which focus on the propagation
of discrete values, i.e., “ones and zeros.” It’s important to understand that this model of propagating “ones
and zeros” is used to simplify the analysis of huge networks. The actual devices in any circuit are responding
to continuously varying stimulus, so analog circuit design is really the foundation of the design of digital
circuits.
Industrial lecture topic : Antennas for defence applications
Name of speaker : Dr.D.C. Pande
Date : 01/08/2014
Wideband antennas are essential for military systems requiring spectrum-agility or multi-functionality. High-
gain radar or communication systems require wideband, potentially multi-octave, radiation patterns and
VSWR, sometimes with wide angle scanning. Aperture size is constrained by the dimensions of the host
platform (e.g. aircraft or naval ship). Low gain mobile communication systems require wideband VSWR but
have simpler radiation pattern requirements. Body-worn antennas can be integrated into clothing and are
emerging in military communications, with dimensions constrained by those of the human body. Here we
describe technologies for two military applications.
Military systems require wideband antennas ranging from complex phased arrays to lightweight body-worn
antennas (BWAs). Here we describe examples of both antenna systems and describe some performance,
manufacturing and maintenance issues that are important in military equipment. Wideband phased arrays
offer the advantages of novel radar modes (multi-band, high resolution) and ‘shared apertures’ performing
multiple functions (radar, communications, EW, satcom) from a common aperture. These reduce the number
of antennas on a platform, simplifying accommodation of multiple systems on small vehicles (e.g. UAVs)
and potentially reducing RCS. The initial / through-life cost, robustness and serviceability are also important
considerations. Vivaldi , Balanced Antipodal Vivaldi Antenna (BAVAs ) and Highly Coupled Dipole (HCD
elements offer multi-octave bandwidths but mutual coupling must be predicted accurately as part of their
design. Wideband Vivaldi elements are used in a variety of military applications. Electronic warfare (EW)
and satcom applications require dual-linear or circular polarization. Dual-polar Vivaldi arrays can achieve
10:1 bandwidths for scan angles out to ±45° Orthogonal Vivaldi elements (Fig. 1), with feed and slotline
regions along a common axis, have almost coincident phase centres for perpendicular polarisations but
slotline impedance is constrained by the substrate thickness of the orthogonal board. Alternatively,
orthogonal elements can be manufactured in an ‘egg-box’ configuration with phase centres of orthogonal
elements offset along the sides of the array ‘unit cell’ . However, wide bandwidth requires current continuity
in the ‘corners’ of the unit cell, complicating manufacture and replacement of failed elements in an
operational environment (a complete board may need to be disconnected and replaced)
Elsallal and Schaubert [2,7] have investigated a development of the Vivaldi element described as the
Balanced Antipodal Vivaldi Antenna (BAVA) for which adjacent elements need not be in physical contact
(Fig. 1). The outer element arms are extensions of the stripline ground planes, and the inner arm is a
continuation of the stripline inner conductor [8]. Arrays of orthogonal BAVA elements can be manufactured
from individual elements without the need for current continuity in the corners of the unit cell. Individual
elements are then easier to replace in an operational environment and a modular approach can be used in the
array manufacture. The BAVA element could be manufactured as an integral part of a transmit / receive
module, thus allowing replacement of single integrated items during the equipment lifetime. BAVA arrays
exhibit resonance phenomena that limit the useable bandwidth. However, modelling described in
demonstrates that a simple rotation of alternate elements, forming what has become known as mirrored
BAVA elements, suppresses some resonances. FDTD simulations [9] show that the active reflection
coefficient is better than 0.3 (return loss - 10dB) for 3-9GHz over wide scan angles.