5:1 aRciirecture, HARDWARE CONCEPTS List the features of «fol 8051 famity of microcontrollers. st wing are some of ’ ne of the the features of $051 family of microcontrollers. S051 microcontrollers ollers have a Ve 4096 bytes of internal program memory ey have 128 bytes of intemal ta memory 2 banks, S user-defined sot They Software flags are available in 8051 microcontrollers Possess one ; 80s microsecond instruction cycle with 12 MHz crystal iu eee have 32 bidirectional 1/0 lines organized as four 8-bit ports iple mode, high-speed programmable serial port ‘S051 microcontroliers have 16-bit timers/counters. hey possess two-level prioritized interrupt structure. S051 microcontrollers support full depth stack for subroutine return linkage and data storage They have direct byte and bit address abilities. > S051 microcontrollers support signal overflow detection and parity computational features, xplain the architecture of 8051 with its diagram. (or) Explain in detail about the architecture of 8051 microcontroller with a neat diagram. Model Pape gure (1) shows the functional block diagram of 8051 microcontroller. Paoe:M Address Cs : M Adiiress Register: Similar to program address register, it holds the address of the reference OM: It is a read ony Program memory. The ROM can be a masked ROM, erasable PROM ee or flash (Power Control Pe Tteontains the fags that differentiates power-on-reset, crown-out-reset, watchdog timer} ‘Accumulator Arithmetic ‘Addressing external memory ‘Addressing external memory Interrupt enable control‘Timer 2 mode control ‘Timer? lower byte ‘Timer 2 higher byte, ‘Timer 2 capture register higher byte ‘Timer 2 capture register lower byte ‘Timer 0 lower byte ‘Timer 0 higher byte Timer 1 lower byte ‘Timer | higher byte ~__ Table: SFRs and their Addresses , Q45. Explain in detail about the special function registers in 8051. {or) Write the available special funetion registers in 8051. Explain each register with its format and (or) Give PSW of 8051 and describe the use of each bit in PSW. 5 ‘(Refer only Program Stans Word (PSH) ‘eS Special Function Register For answer refer Unit-V, Qi4. ee 'B holds the results obtained fiom ALU operations. ‘The other 32 B, 10 B, heir koresult ofa Operation is too large causing the higher order into the sign bit, flag is set if register A contains odd number of ed ifregister A has even number of on his flag is set/cleared/tested by software as a 08 - OF H 10-170 1s-1eH | the CPU to store g-bit wide. Data iy. Stack pointer is aa i instruction and sh rp va ie se gue PLUSH nad POP OPEEREOD: Tae to to enable external interrupt as edge-trigged. If it is lox trigged, then bit is set to “0°, 1E0 (External Interrupt 0 Edge Flag): is an external interrupt at INTO. vectors to the interruptused to alter priorities (high/low) among the interrupts of 8051. If s else higher priority. The format and bit description of IP register is as shown in figure (4). D, DD; DD, D, DD - | - Jet,| ps | pr, | px, | pr, | Px, \ Priorty of external interrupt 0 Set/Cleared by program. ‘Timer 0 interrupt priority evel Set/Cleared by program. = Priority of extemal interupt 1. SeuCleared by program. Timer 1interrup evel SetiCleared by program. Seri port interrupt priority level SetlCleared by program, ‘Timer 2 interrupt pict de Seem Rty et Notimplemented Not implemented Figur (f): Format and Bit Description of IP Register 9, TMOD Both timers O and 1 use the same TMOD register which isan 8-bit register, - O.and the upper 4 bits are set aide for timer!. In timer O and timer (4 bi, ‘timer mode and upper 2 bits specify the operation. ‘ iki 6 2B ‘where the lower 4 bits are s ACh), the lower 2 b inGive the pin diagram of 8051 microcontroller and speci x (or) Describe the functions of the following signals in 8051. RST, EA, PSEN and ALE. [Refer only Topics: Control Pins and Pin-9 (RST)) ‘The 8051 microcontroller is a 40 pin dual-i in figure below.ms paralit UO pon (prt 3), The pins of por 2 figured as highier order address lines (AD,-AD, ,) of a two byte external Port-3 (Pins 10-17): The pins 10-17 are configured as Port 3, is also a bidirectional VO port Dep [configured to function as U0 pins and also to perform alternate functions as given BelOW: PP3.0-RxD — : Used for ig serial data BP3.1-TxD —: Used for transmitting serial data P3.2-INTO : Used for external interrupt 0 Used for external interrupt 1 {Used for external timer 0 input Used for extefmal timer 1 input sa for external data memory write signal[-Reset): The RST pin is used to reset the 8051 microcontroller. In order to reset ied fo this pin for two machine cycles, while the oscillator is running. im Discuss in detail about parallel 10 ports in 8051 microcontroller and explain hi "accessible for specific applications. i Ans: The 8051 has four bi-directional ports and they are, Port 0(P0) ; Port 1 (PL) Port 2 (P2) Port 3 (P3). - Each port consists of a laich, an output driver and an input driver. ‘The input and output drivers of port-0 ahd the output drivers of port 2 are used to access the external mer _ Byte of the external memory adress is wiven by the port 0, which s ime multiplexed with the byte being read o ~ the port,2 outputs the higher byte of the'extemal memory address. Ifthe address is 16-bit wide ie, port 0. Ke diplexed address and data bus, and port would be outputting the, ~A, address line. All the port: carries A part from being ports pin, they also serve the Functions of various special features such as, Port3 pins RxD ~ Serial input port | TxD Serial oitput port{c) Port 2 Bi Figure ows that each of the four ports consists ofa typical bit latch a) buf ul Pes used to represent the bit atch, In fesponse toa write to latch signal ftom the CPU, D flip-flo “Along with the response to te “read pin” signal from the CPU, the level of the port pin its ead a port, activate the read latch signal and others activate the “read ‘The above functional diagram ‘Some instructions that 1 From the functional diagram i \ddress/data bus by an internal ‘control si jg a*1*in the P3 bit latch, then the re {for it in external memory aceess. output is controlled by the signal labeled “a + ‘Also, if there snd explain the capacities of internal and external al program encnan etic‘0000H (EA=1 (AO ¥ Figure (1: Program Memory 2, Data Memory: Ditta memory organization is as shown in figure (2). The instruction MOV is used t0 a ata memory of size 64 k. Here, internal data memory of 256 bytes has two partitions, (@ 00H —FFH for internal data RAM (128 bytes) i Gi) 80H ~FFH for special function registers (128 bytes). : sen | | i is a ae | i ony eee) ‘ (i)Internal Data Memory (i) External Data Memory : c Figure (2: Data Memory Organizati % 5.4 COUNTERS/TIMERS i + Q20. Draw and discuss the formats and bit definitions of the following SER’s in ose (a) TCON (pb) TMOD. ; ae ‘ (or) Explain TCON and TMOD function registers of 8051. Tippee Cane a sf MO ma, iMO=TRI=ETI EA® logie 1 Mode 2: It is an 8-bit timer, therefore it allows only values of 00 to FFH to be loaded into the timers register TH. After TH is loaded with the 8-bit value, then the timer must be started, After the timer is started, it starts count up by incrementing the 7 register. It counts up tll it reaches its limit of FFH, When it moves from FFH to 00 it sets the timer flag, TL isteloaded automatically with the original value kept by the TH register. Pulse input TLX $-bits }—p—4 TEX [> interrupt W THX 8-bits Reload TLX Gites | Operaedas | i Mode 3 Figure (4) C/T =05 Timer ~1> counter Mode 3: Ml =MO = E19 < pr, =logicl1/12 oscillator frequeney Variable Programmable to either lator 8 data bit 10-bits (8 data bits, one start bit and one stop bit). 11 bits (8 data bits, one start bit, on€ stop bit and 9° bit is programmable bit) 11 bits (8 data bits, one start bit, one stop bit and 9* bit is programmable data bit, Table (3): Operating Modes of Serial Port Explain with waveforms, different modes of serial data transmission modes in 8051, Ans: ‘Serial Data Transmission Modes: Serial da transmission may be carried out in four diferent mode each ‘baud rates. Selection ofa particular mode is done by setting SMO and SMI bits in, SCON rej . ke rafescan be et (for only mode-1,2 and 3) through SMOD bit in PCON zister as shothe trailing é ‘cannot be varied and itis usually higher than the | (8-bit UART): This mode configures SBUF asa 10-bit full duplex 1°65 simultaneously. is data format is shown in Sep | Dy bie | Ms Figure (2: Serial Transmission of 10-bits im ‘Modet re Hee, tansmission is initated with a stat bit allows § aia bits an a top bit when the hes, interrupt flag TL is set to “1” ie trailing edge of start bit, Data bits are received in the sa ecified baud rate, The baud rate for mo flag as shown in the Data reception is initiated dri tranemitted, and are shifted into the receiver ata Ped the required baud rate can be calculated by ysng thetime 1 eves HOW ‘to mode 1 but the data word contains 11 bits as shown infigure (3), mhis mode is identical ‘one start bi, 9 data bits and one stop bit, During "During the reception, 9* data bit is stored in RBS jetermined | by SMOD bit of PCO? isFigure (1): Stendard UART Data Word, & _ Transinitied data is sent as a start bit, ‘ight. oat sconce allen bis have been sen. ight data bits (Least Significant Bit, LSB, first) ingered by he ling os one Received data is obtained in the same order, reception is ti Stop bit is true (0 level) half-way through the statt bit interval, Data bits are shifted into the rec following conditions are true, 1 Ri must be 0 and mode bit $472 is 0 or the ‘Stop bit is 1. X1 set to-0 indicates that the program has read the byte and is ready to receive the next, a normal stop bit will then complete the transfer of data to SBUF r State of SIM2, SiV2 set to 0 enables the reception of a byte with any stop bit state, It is useful in modes 2 and 3 to 1 forces reception of only good stop bits, an anti-noise safeguard of the original ten bits, the start bit 1s di eight data bits go to SBUF and the stop bit is saved in bit RBS of SCON. ie., RI = 0 and either SMZ stop bit=-1 fing a new data byte has been received, IFR1 is found to be Set at the end of the reception i RLis set to 1, indic: that the previously received data byte has not been read by the program, or ifthe other conditions listed are notin the new data will be lost Mode 1 Baud Rates: Time 1 is used to 2 the baud frequency F Timer I is used in timer mode 2 as an auto-lond 8-6 ee a Oscillator Frequency Bad" Ia x(256d (THD) SMOD is the control bit in PCON and ean be 0 or I, which raises the2in the equation to a value otto “not ruin timer mode 2, then the baud rate is, ig ae” sc(timer overlbow frequency) on Sed ; counter tat receives lock “The timer 1 ean be run using the intemal clock or as a ksi “To get a standard rate of 9600 Herts then the ssting of 7H sas follow,ine Dito lane n/a i is individually enabled, or disabled by setting or ‘TE.S ET2: Enabled Tiner2 Overtow Interrupt: IF ET2 =1 the met 2 overflow or capture interrapt is the timer 2 interrupt is disabled, ‘TE.4 ES: Enabled Serial Port Interrupt: E: |, enables serial port interrupt and ES = 0, disabies serial port mt TE.3 ETI: Enabled Timer 1 Overflow Interrupt: ETI 1, enables overflow interrupt and ET1 = 0, disables it. 1E.2 EX1 : Enabled External Interrupt 1: EX1 ~ 1, enables it and EX1 =0 disables it. TE.1 ETO: Enabled Timer 0 Overtiow Interrupt: ETO 1, enables it, ETO~ 0 disables it 1E.0 EXO: Enabled External Interrupt 0: EX0 = 1, enables it, EXO = 0 disables it. ~ Interrupt Priorities: Interrupt priority register (IP) determines, whether an interrupt has higher priority or lower priority. (2) shows priority interrupt register. : sian ro | Pxo | Tas Priority of para extemal interrupt 0 Priority of sy : 1 = Highest timer 2 interrupt 0=Lowest 1 = Highest 0=Lowest Priority off ‘timer 0 interrupt Priority of serial 1 = Highest» port interrupt 0=Toyet 1 = Highest aes : = Lowest (_____, Priority of . ‘external interrupt 1 Highestand steps to the | le to service that interrupt. This is gered interrupt and is the default mode : Triggered Interrupt: Upon reset the 8051 makes ‘them edge-triggered interrupts, the user has to program - the bits of TCON register. By making the TCON.0 and TCON.2 bits high with instructions such as “SETB TCON.0” and “SETB TCON.2”, the external hardware interrupts of INTO and INTI become edge-triggered, "ASSEMBLY LANGUAGE PROGRAMMING: INSTRUCTIONS, ADDRESSING MODES, ue ‘SIMPLE PROGRAMS Q28. Define the terms machine language, assembly language and mnemonics. Ans: ‘Machine Language: A language that allows the pi to read and évrite the instructions only in binary number format is called machine language. Machine language is a low-level programming language and it is easily understood by CPU However, niaching, language is highly impossible for humans 10 use since, it comprises of binary numbers ic., 0's ands. ‘Example: Machine language instru : 1009001000000110 sbly Language: A language that allows the programmers ‘and write the instructions in a naming or keyword format jassembly’ Janjguage. Assembly language possesses same d set of commands as that of machine language 5 ner to use named instruetions instead ca stood by humans but hard | known as source code ‘used, the extension oft Thus, the i i with extensions ‘obj’ and “Jst respectively: of all the opcodes, addresses and errors that are ¢ sembler. This file is optional, because it.is ne this syntax errors object file is ready to After this object code is given to a linker pro tension ‘abs’, which is ref hen fed to a OH (Ol ile only withthe help of editors. ¢ inthe code and only after correct c fink with other required files, generates a file with absolute object file, This file ist Hex converter) program that generates an equival called ‘hexfile” ‘written into ROM of microcontroller which is ready the operation, The following flowchart illustrates the total assembling and running an 8051 program,Ames The arithimense mstracticnn of Te INC Destination: 1: creme Example: INCA sincere (and bot and the result ts stored ia C. SETB (Set Bit: The SETB Example: DEC A Deore operand to a vihue off ADD/ADDC Destination. Sewree 6 miss et destination without wh Garr Mas Frampte: SETH P25 Example © @_ _ADDA, sourwe; tn adds the source byte to A and [puts the result in A. 2. DEC Destination: de. Aer executing the aboveThis insteetion is use : ton i used to rotate bits Br * Specified operand tolfet- with MSB valine oved into both LSB and carry flag, Example: RL A The above instruction rotates the bits of A register to left with MSB moving into both LSB and carry flag _ REC Rotate Left with Carry): This instuction is used | {0 rotate bits of a specified operand to left with MSB. moving into carry flag and carry flag value into LSB. Exi A ‘The above instruction rotates the bits of A register to left ‘with MSB moving into éarry and the carry flag value into LSB. SWAP: This instruction is used to swap the lower and upper hexadecimal digits of specified operand, Example: SWAP. A Be rrhe above instruction swaps thé lower and upper i cimal digits of ee ae unconditional and conditional jump e ss sweligprisnl ae cpumecrioed [8 J Sas ional JUMP instruction ad getubaLIUY jumps. Conditional Jump Ts conditional jump a Operation: If register A. ‘an zerothen program address, Name of the instructi Operation: Ifregister A the program jumps toa spesifie ‘Name of the instruction: Operation: Iino carry ts the program jumps to_ Movxe@pPrR, a oe i “MOV DPTR, #24011 MOVA,B MOVX @ DPTR, A Sie -"/* DPTRis pointing to the location 2 1 MOVE the data stored in 24014 10 A*/ '/* Multiply both A and B*/ /* DPTR is pointing to the location 2402H */ /* MOVe the content of B to A */ /* Content of *A” is moved to 2402H location */ Q40. Write an assembly language program to add two 16-bit data stored in memory fro1 Store the result from 4204 H to 4206 H. ‘The assembly language program to add two 16-bit data is given below, ORG 4100H + Load first data in HL-pair ; Data in HL is saved in DE pair