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Analog Transmitter and Receiver Concepts For Wireless Chirp Communication at 2.44Ghz
Analog Transmitter and Receiver Concepts For Wireless Chirp Communication at 2.44Ghz
Analog Transmitter and Receiver Concepts For Wireless Chirp Communication at 2.44Ghz
Toralf Oheim
Jaro Stimma
Analog Chip Design
Presenter
Toralf Oheim
Analog/RF IC design engineer at Nanotron Technologies GmbH, Berlin
Mainly responsible for transmitter and RF oscillator design of transceiver IC‘s for
wireless chirp communication at 2.44GHz
Industrial experience with design of laser driver IC‘s for fiber optic data
communication at Infineon Technologies AG, Berlin
Study at the Technical University of Ilmenau, Theoretical Electrical Engineering,
Graduation in 1993
Jaro Stimma
Analog/RF IC design engineer at Nanotron Technologies GmbH, Berlin
Responsible for design of integrated analog receivers for wireless chirp
communication at 2.44GHz
Industrial experience with design of high speed integrated analog receivers for
fiber optic application at Infineon Technologies AG, Berlin
Study at Hamburg University of Applied Sciences, Graduation in 1998
f
T B
PGC
6
6
Carrier 0 and 90
R R + - R R
C1
- + C1 C2 C2 C3 C3 C2 C2 C1
- + C1
+ - - + - + - + + -
+ - + -
R R R R
R R R R
Discussion: two filters or integration in one for the two channel bandwidths?
Chip area for two filter (I and Q): 0.67mm -> No
Chip area for one filter structure (I and Q): 0.45mm -> Yes
Splitting of capacitor array in two capacitor arrays: CN -> CN,1 & CN,2
50Ω
C1
L1 1pF Ant.
3.9nH
TxN
to RxN
Ibias1
Class A Class AB
Nanotron Technologies GmbH 17
Power Amplifier Design Concept (2)
VDD
Clamp Two ESD diodes in series
connected to VDD instead of
ESD one ESD diode as usual.
ESD
Passed ESD test conditions
TxP / TxN
Human Body Model: 2000V
Pad
ESD Charged Device Model: 500V
PA Machine Model: 250V
-40
Carrier suppression: ≤-36dBc
-50
IDD analog = 23mA @ 80MHz
-60 IDD TRX = 33mA @ 80MHz
-70
IDD analog = 21.5mA @ 22MHz
IDD TRX = 29mA @ 22MHz
-80
f / MHz
35.00
5.00
33.00
0.00
0 10 20 30 40 50 60 31.00
-5.00
29.00
-10.00 IDD total
27.00
ID D /m A
P o u t /d B m
-15.00 25.00
-20.00 23.00
-25.00 21.00
19.00
-30.00
IDD analog
17.00
-35.00
15.00
-40.00 0 10 20 30 40 50 60
PGC Register Value /dec PGC Register Value /dec
S(f)
BW
A Simple procedure
transforms the Chirp into a (Sinc-)Pulse
Sinc-Pulse
Dispersive
Chirp Delay Line
U(t)
t t
UP – Channel UP – Channel
DOWN - Channel DOWN - Channel
80MHz
1us
80MHz
SAW FILTER 1 1 O 1 O
Down
Up Up Down Up
Up
IF FM Signal
fIF=250MHz;BWMAX=80MHz
IF AM Signal
)0
)0 $0
$0 7UDQVIRUPDWLRQ
fIF=250MHz; BWMAX=80MHz
fLO=fRF=2,442GHz 1 0 1 0 1
0r 90r
Up Down Up Down Up
Q
RF FM Signal
(fRF=2,442GHz;BWMAX=80MHz)
fLO=fRF+fIF=2.692GHz
fRF = 2.442GHz
RX RF
RX IF
Advantages of Heterodyne Nanonet RX
fLO=fRF=2.442GHz
0r 90r
RX ANALOG BASEBAND (BWMAX=40MHz)
fRF=2.442GHz
DIGITAL
CHIRP RX RF (BWMAX=80MHz)
CORRELATOR
Advantages of Zero IF RX
No Output Drivers
Flicker Noise
Requirements :
˖
- Ron< 6˖
- Good ESD Protection
- Low Parasitic Capacitance
Benefits :
- High ESD Protection
- Low Ron (Large W/L)
Drawback:
(IO NMOS = NMOS
- Insufficient HF Model for IO NMOS
with unsalicided
- High Parasitic Capacitance
drain and source
area for good ESD
protection)
Benefits :
- High ESD Protection
- Well HF Model of the Switch
Circuitry
Drawback :
- Additional High Ohmic Resistors
(RF NMOS = NMOS
for Drain- and Source – ESD
with well RF model
protection required
and bad ESD
- High Ron
protection)
- High Parasitic Capacitance
Benefits :
- Low Ron
- High ESD Protection
- Sufficient HF Model of the
Switch Circuitry
Drawback :
- Large and Tricky Layout
1 0 1 0
IF Peak SIGNAL
Detector
Comparator TO DIGITAL
RDAC
Digital
Rectifier R THRESHOLD
Baseband
Signal
1 0 10 Mean
Detector
IF AM Signal
fIF=250MHz;
BWMAX=80MHz
Nanotron Technologies GmbH 47
Practical Analog Design Aspects
VS