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RJK1051DPB Renesas
RJK1051DPB Renesas
RJK1051DPB R07DS0082EJ0102
(Previous: REJ03G1768-0101)
Silicon N Channel Power MOS FET Rev.1.02
Power Switching Jul 30, 2010
Features
High speed switching Low on-resistance
Capable of 4.5 V gate drive RDS(on) = 30 m typ. (at VGS = 10 V)
Low drive current Pb-free
High density mounting Halogen-free
Outline
5
4 1, 2, 3 Source
G 4 Gate
3 4 5 Drain
12
S S S
1 2 3
Application www.DataSheet.co.kr
Electrical Characteristics
(Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V(BR)DSS 100 — — V ID = 10 mA, VGS = 0 V
Gate to source leak current IGSS — — 0.1 A VGS = 20 V, VDS = 0 V
Zero gate voltage drain current IDSS — — 10 A VDS = 100 V, VGS = 0 V
Gate to source cutoff voltage VGS(off) 1.2 — 2.5 V VDS = 10 V, ID = 1 mA
Static drain to source on state RDS(on) — 30 39 m ID = 7.5 A, VGS = 10 V Note4
resistance RDS(on) — 33 46 m ID = 7.5 A, VGS = 4.5 V Note4
Forward transfer admittance |yfs| — 30 — S ID = 7.5 A, VDS = 10 V Note4
Input capacitance Ciss — 2060 — pF VDS = 10 V, VGS = 0 V,
Output capacitance Coss — 180 — pF f = 1 MHz
Reverse transfer capacitance Crss — 70 — pF
Gate Resistance Rg — 0.7 —
Total gate charge Qg — 15 — nC VDD = 10 V, VGS = 4.5 V,
Gate to source charge Qgs — 6.6 — nC ID = 15 A
Gate to drain charge Qgd — 4.6 — nC
Turn-on delay time td(on) — 8.4 — ns VGS = 10 V, ID = 17.5 A,
Rise time tr — 4.0 — ns VDD 30 V, RL = 4 ,
Turn-off delay time td(off) — 42 — ns Rg = 4.7
Fall time tf — 4.5 — ns
Body–drain diode forward voltage VDF — 0.83 1.1 V IF = 15 A, VGS = 0 V Note4
Body–drain diode reverse recovery trr — 40 — ns IF = 15 A, VGS = 0 V
time diF/ dt = 100 A/ s
Notes: 4. Pulse test
www.DataSheet.co.kr
Main Characteristics
1 shot Pulse
100 10 μs
10
10 s
0μ
s
40
1 PW = 10 ms
Operation in
20
0.1 this area is DC Operation
limited by RDS(on)
0.01
0 50 100 150 200 0.1 1 10 100
12 12
Pulse Test
8 8
VGS = 2.6 V www.DataSheet.co.kr
25°C
4 4
Tc = 75°C
–25°C
0 2 4 6 8 10 0 1 2 3 4 5
Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V)
Drain to Source Saturation Voltage vs. Static Drain to Source on State Resistance
Gate to Source Voltage vs. Drain Current
1000
RDS (on) (mΩ)
2000
Drain to Source on State Resistance
VDS (on) (mV)
Drain to Source Saturation Voltage
1600
1200
100
800
ID = 20 A
VGS = 4.5 V
400 10 A 10 V
5A
10
0 4 8 12 16 20 0.1 1 10 100
Capacitance C (pF)
1000
60
VGS = 4.5 V
40
10 V Coss
100
Crss
20
VGS = 0 V
f = 1 MHz
0 10
–25 0 25 50 75 100 125 150 0 10 20 30 40 50
ID = 15 A Pulse Test
VGS
Reverse Drain Current IDR (A)
160 VDD = 50 V 16 16
25 V 10 V
10 V
5V
120 12 12
80 8 8
VDS VGS = 0 V
40 VDD = 50 V 4 www.DataSheet.co.kr
4
25 V
10 V
0 0
0 10 20 30 40 50 0 0.4 0.8 1.2 1.6 2.0
10
IAP = 7.5 A
VDD = 50 V
8 duty < 0.1 %
Rg ≥ 50 Ω
0
25 50 75 100 125 150
1
D=1
0.5
0.3
0.2
0.01
10 μ 100 μ 1m 10 m 100 m 1 10
VDSS
1
EAR = L • IAP2 •
L 2 VDSS – VDD
VDS
Monitor
IAP V(BR)DSS
Monitor
IAP
Rg D. U. T VDD VDS
ID
www.DataSheet.co.kr
Vin 50 Ω
15 V
VDD
0
td(on) tr td(off) tf
Package Dimensions
Package Name JEITA Package Code RENESAS Code Previous Code MASS[Typ.]
LFPAK SC-100 PTZZ0005DA-A LFPAKV 0.080g Unit: mm
4.9
5.3 Max
+0.05
4.0 ± 0.2 0.25 –0.03 3.3
1.0
5
4.2
3.95
+0.1
6.1 –0.3
1 4 0.20 –0.03
+0.05
+0.25
0.6 –0.20
1.3 Max
0° – 8°
0.75 Max
1.1 Max
+0.03
0.07 –0.04
1.27 0.10
0.40 ± 0.06 0.25 M
(Ni/Pd/Au plating)
(Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.