Memristor based CAM cell designs and analaysis of

their performance.
Jugi Rithanya R P1 Sakthivel R3
School of Electronics Pooja K2 School of Electronics
School of Electronics
Engineering Engineering
VIT University Engineering VIT University
VIT University
Vellore, India Vellore, India
rpjugi@gmail.com Vellore, India
Corresponding Author
rsakthivel@vit.ac.in
poojakeyan20@gmail.com

Abstract: A resistance with memory is what is known and Olumodeji, O. A el al., For neuromorphic system, it is used
defined as memristor. The incidence of the two-terminal as adaptable resistance for pulse-based operation. It has its
device was found in the year 1971. Memristor is a non-volatile, own ability to store data [7]. It can and is used in remote
expandable, high speed, high packing density, and low-power sensing scheme and also in microprocessor, unconventional
device. It will hold/retain the data, even when the power goes computing. Memristor can be used as crossbar-latches and
off. It is used in various applications like programmable logic, can act as a replacement for transistors [8] and in future it
remote sensing, neuromorphic system, and low power can be implemented in heterogeneous systems [9].
applications. Random Access Memory (RAM) executes
search operation by means of memory address and returns
the data from the location stored. Content addressable
memory (CAM) return the location of searched data by
associating it with the kept data. CAM is a superior category
of memory, which is used by searching applications, like
caches in microprocessors, and networking. CAM cells makes
parallel examination over all stowed data and finds out the
matched data in one cycle. In this paper, we make a relative
study on the CAM cells and the consequence of
implementation of Memristor in CAM cells and analyze the
performance of the design. We find that 1T-1M gives an
improvement of 99% when compared to other CAM models
discussed.
Keywords- CAM, Binary CAM, Memristor, Write and
Read, NAND, NOR.

1. INTRODUCTION
In 1971, Leon 0. Chua discovered a new two terminal
device called memristor. Memristor is also presented as a
fourth basic circuit element after capacitor, resistor and
inductor. Memristor is well-defined as a resistor which can
retain memory. Figure 1 signifies the association between
the basic components and memristor. It is characterized by
the association between charge and magnetic flux [1].
Subsequently thirty-six years later, HP Labs created a
physical memristor with assistance from the metal titanium
di-oxide. The device designed is of nanoscale size.
Memristor has two regions: doped (TiO2-x) and undoped
(TiO2) region.
The resistance in undoped region is considered as
𝑅𝑜𝑓𝑓 and for doped it is taken as 𝑅𝑜𝑛 . When the potential is
applied, the memristor holds the value. When the potential
is dropped to zero, no current flows through this physical
device, but it holds the value, i.e., memristor retains the data
even when the power goes off. Memristor is analysed with
different models namely, Non-Linear ion drift model,
Linear ion drift model, VTEAM model, Simmons tunnel
barrier model, and TEAM model. [2]. VTEAM model
defines about the voltage controlled memristors whereas,
TEAM model deliberates on current controlled memristors
[3]. Memristors are used in synaptic plasticity in the biology
neuronal system [4] and also in bio-inspired pattern
processing [5]. Memristors can be used in stateful logic
function and so it's used in analog filters. Memristors are
widely used in digital memory and logical circuits [6].
Figure 1 Relation between basic components [17]
Amamath, N el al., 10-T NOR Type CAM trails a 6-T
SRAM structure with 4 additional transistors which are used
to compare the stored data and the data that is searched for
in the cam cell [10]. The charge division problem and short
circuit current problem in NAND and NOR CAM restrict
the power operation, pre-charge free CAM eliminates these
drawbacks [11]. The foremost goal of pre-charge free CAM
is to decrease power consumption and the speed for search
application. Furthermore, higher number of searches can be
achieved in lesser time. Software based search operation are
slower than the hardware based CAM [12]. Conventional
NAND and NOR based CAM have the disadvantages of
poorer speed and high-power consumption. Bahloul el al.,
MCAM is considered because of its advanced speed and
low power utilisation [13]. Telajala venkata mahendra el
al., The hybrid architecture of three transistors and two
memristors are used in 3T2M SRAM cell. These SRAM
cells are used to build CAM architecture. [14]. NAND type
and NOR type are very useful due to large searching
performance. NOR CAM are much faster than NAND
CAM, but the downfall is that it consumes higher power
when compare to NAND type [15]. The advantage of the
NAND CAM is that it does not require more transistor
compared to NOR CAM cell. Beside 10T NAND CAM
provides complete read and write operation [16]. Yatagiri,
N. H el al., The drawback in NAND CAM is that the
searching delay is high and charge problem that will occur
at pass transistor. The 16 cross 16 Content addressable
memory arrays by means of pre-charge free reason and
better-quality project to sense match data are assembled by
means of the FinFET 18nm tech. In association to
traditional CAM, the Precharge free CAMs provides better
performance, decreases power and energy consumptions
significantly[18]. Sadiq el al., the assistances of these
memory cells are used in Branch Target Buffer, onchip
caches, and Translation Lookaside Buffer [19]. Rouhi, S el
al., this paper provides architecture of memristor-based
CAMs with substantial optimization with respect to the
physical layout area, power consumption, and ease of
performance[20].
In this paper, we analyse the working of memristor and
design various CAM cells in Cadence Virtuoso Tool. We
also calculate the power consumption and timing analysis
for the designs and compare the results. Section 2 discusses
about the working of memristor and gives an outline on the
CAM cells. Section 3 speaks on the working of CAM cells
and the simulation results obtained and analyse the
parameters calculated from the simulated results.
2. PROTOTYPE AND STUDY
Memristor consists of 2 layers, a layer of Tio2 and other
layer of oxygen deficient Tio2-x between two platinum
contacts. The two layers of Tio2 and Tio2-x can be basically
represented as two variable resistance which are connected
in series. Functionality of memristor device is tested by the
I-V characteristics and the curve obtained is called as
hysteresis curve which is obtained as shown in figure 2.1.
We apply a positive voltage to the platinum contacts and
initially current is zero. As the positive voltage is increased,
the resistance of the device is reduced which leads to 𝑅𝑂𝑁 .
When we increase the voltage more than 𝑉𝑜𝑛 , the device
enters in the hysteresis region. This explains that the
memristor stores the data.
Figure 2.1 I-V Characteristics of Memristor
The device will remain in this state until a negative
voltage is applied. Now, by applying negative voltage, the
device resistance is increased which corresponds to the off
state of the device i.e., stored data will be removed from the
memory.
Content addressable memory (CAM) gives back the
location of the data searched by comparing it with the stored
data. CAM is a superior type of memory, which is utilised
in exploratory applications, like caches on microprocessors,
and computer networking. CAMs can be binary or ternary.
In binary Cam, it can keep either logic-0 or 1. In ternary
CAM, it can keep logic-0,1 or a don’t-care. Binary CAM is
used typically in cache operation, to store data and in many
search operations. Ternary CAM is mostly used in
application tasks. CAM makes concurrent search over all
stowed words and figures out the matched data in one clock
cycle. Figure 2.2 represents the block diagram of the CAM
cell operation.
Figure 2.2 Block Diagram for CAM Cell Operation [3]
2.1 10-T NAND CAM Cell
Figure 2.3 represents the circuit diagram for 10-T
NAND CAM cell. 10-T NAND consists of Word-
line (𝑊𝐿),Bit line (𝐵𝐿), Bit-line bar(𝐵𝐿 − 𝑏𝑎𝑟), Q, Q-bar,
Search-line, Search-line bar, Precharge Match line (ML)
respectively. Word line and Word line bar are used to
choose the operation. i.e. write and read operation. Bit-line
and Bit-line bar is used to write the data. Search-line and
Search-line bar is used to search for the stored data in the
cam cell. Q and Q-bar holds the written data and it is very
useful during search operation. Pre-charge match line plays
a major role where the output of the match line determines
whether the cell has stored the data the we searched for or
not.
Figure 2.3 Circuit of 10-T NAND CAM Cell [3]
 2.2 10-T NOR CAM Cell
Figure 2.4 represents the circuit diagram for 10-T NOR
CAM cell. 10-T NOR consists of Word-line (𝑊𝐿),Bit
line (𝐵𝐿), Bit-line bar(𝐵𝐿 − 𝑏𝑎𝑟),D,D-bar, Search-line,
Search-line bar, Read-word line bar and Match line (ML)
respectively. Word line and Word line bar are used to
choose the operation. i.e. write and read operation. Bit-line
and Bit-line bar is used to write the data. Search-line and
Search-line bar is used to search for the stored data in the
cam cell. D and D-bar holds the written data and it is very
useful during search operation. Read-word line bar works
exactly like word-line operation. Match line plays a major
role where the output of the match line determines whether
the cell has stored the data the we searched for or not.

Figure 2.5 Circuit Diagram of Precharge Free CAM Cell

[11]
2.4 1T-1M CAM Cell
Figure 2.6 represents the circuit diagram for 1T-1M
CAM cell. It contains of Word-line and Data/search line
where the gate input supply is called as Word-Line and the
Data/Search-line input is given to the source of N-MOS.

Figure 2.6 Circuit Diagram of 1T-1M CAM Cell

2.5 1T-2M CAM Cell

Figure 2.4 Circuit Diagram of 10T-NOR CAM Cell
[3]
2.3 Pre-charge Free CAM Cell
Figure 2.5 represents the circuit diagram for pre-charge
free CAM cell. In Precharge-free CAM, match line will be
charged through data line when the search data matches
with the stored data otherwise match line will be isolated
from the data-line. Each match-line is selectively charged or
not depending upon whether each bit of word is matched
with the search bit or not i.e. if any bit of word matches with
the stored data, then next transistor will go into saturation
and charge the match-line. Pull down transistors are used to
discharge this stored nodal charge before next search
operation starts. When we apply search word in the
Precharge free CAM, first bit of some of the CAM words
will be matched and other mismatched words will be
discarded from search operation. Again, in the second bit
search operation some of the CAM words will be matched
and other mismatched words will be discarded. Likewise bit
by bit search operation continue until the end of search bit
comes. As in Precharge free CAM, only few nodes are
charged. So, power consumption will be largely reduced.
Figure 2.7 represents the circuit diagram for 1T-2M .The
data is written into the memristor initially. The data/search
line is then used to write and read the data stored in
memristor.
Figure 2.7 Circuit Diagram of 1T-2M CAM Cell [13]
2.6 3T-2M CAM Cell
Figure 2.8 represents the circuit diagram for 3T-2M CAM
cell. In 3T2M, two memristors having reverse polarity that
are linked in parallel. But during read operation they are
connected in series. This altering of connections from
parallel to series or vice versa are performed by the two pass
transistors. Output of the OR gate is given to the gate input
of the third transistor. During write operation, read signal
goes to low and write signal goes to high. So, as a result of
this the gate input of the third transistor goes to high state.
Then NMOS becomes in ON state and two transistors is
directly connected to data-line. Now, depending upon the
data input the voltage drop across memristor(𝑖. 𝑒 𝑉𝐷 −
𝑉𝐷𝐷 /4) positive or negative [1].

If data input is 1 then 𝑉𝐷 = 𝑉𝐷𝐷 or else 𝑉𝐷 = 0𝑉.As both

the transistor is connected in opposite manner so, their
resistances also change in opposite fashion. If read signal
goes high in read operation, then two memristor is
connected in series. Now [14], the voltage across the
memristor will be
𝑉𝐷𝐷 𝑉𝐷𝐷 𝑅1
𝑉𝐷 = (( )–( )) 𝑥 (𝑅1 + 𝑅2) + 𝑉𝐷𝐷 /4 (1)
2 4
where the resistances R1 and R2 respectively are the
resistances of memristor 1 and memristor 2. If R2 is greater
than R1 then 1 is written in write operation. If R1 is greater
Figure 3.1 Output Waveform for 10-T NAND CAM Cell
than R2 that means 0 is written in write operation.
In Evaluation phase, we keep word-line low. Data to be
searched is sent through search-line and search-line bar
respectively. When the data stored matches with the data
searched, the pass transistor turns ON and the Match line is
high. If the information stored does not match with the
searched data, pass transistor does not activate and Match
line is discharged to ground.

3.2 10-T NOR CAM Cell

A CAM operation has 2 phases a pre-charge phase and
an evaluation phase. Throughout Pre-charge phase, the
write operation takes place. First, we set the match-line to
be high. Word-line and Read-Word line are kept high. The
data to be written is fed into the Bit-line and Bit-line bar
respectively. The data to be written is sent to the coupled
inverters and the output is taken as D and D-bar. D and D
bar holds the data written in the cell. Match line is high in
this phase.

Figure 2.8 Circuit Diagram of 3T-2M CAM Cell [12]

3. SIMULATION RESULTS AND DISCUSSION
In this Section we discuss the simulation results for the
above-mentioned circuits using cadence virtuoso. We also
mention the working of different CAM cells and
understands the performance metrics of respective designs.
We have compared the results of 10T NAND Cam, 10T
NOR cam, pre-charge free cam cell, 1T-1M cam cell, 1T-
2M cam cell and 3T-2M cam cell. And have concluded that
the 1T-1M CAM cell has the least power consumption and
faster processing operation.

3.1 10-T NAND CAM Cell

During Pre-charge phase the write operation takes place
where word-line is kept logic 1 and the data to be written is
sent through bit-line and bit-line bar respectively. The data
is stored across Q and Q bar. Match line is kept high in this
phase.
Figure 3.2 Output Waveform for 10-T NOR CAM Cell
Now, during Evaluation phase, Word-line and Read-
word line bar is kept low. The data to be searched is sent
into search-line and search-line bar respectively now when
the data stowed in D matches with the search line input, the
match line will continue to stay high. This means the data
stored and the searched data is same. If the data stored and
the searched data does not match, match line discharges, due
to at least one pull-down transistor which connects to
ground.
3.3 Pre-charge Free CAM Cell
When the search data matches with the stowed data
then the match-line will be charged through the data-line.
When search line goes high then it will match in bit by bit.
If first bit matches with the stowed data, then match-line of
the first bit goes to logic 1. The match transistor will go into
saturation region. This selected match-line of first bit
charges through this transistor. When the first bit matches
it will search for the second bit. If second bit matches, then
the selected match-line of the second bit charges. If all the
bit matches with the search bit the match-line goes high. If
some of the bit mismatches, then match-line will not be
charged. Here we have searched for a single bit. When
search-line goes high then match-line also goes high. That
means searched bit present in the cell.
Figure 3.3 Output Waveform for Pre-charge Free CAM
Cell
3.4 1T-1M CAM Cell
To write data in memristor, we maintain positive bias
and negative bias when we store data '1' and data '0'
respectively. Here, we keep word-line high and maintain
positive bias and write data '1' respectively.
Figure 3.4 Output Waveform for 1T-1M CAM Cell
During search operation, if the search data and stowed
data matches, the output line VL is high else it is low.
3.5 1T-2M CAM Cell
In the search process, two steps are required for
searching a data. In pre-charge step, ML is connected to the
pre-charge voltage. E is always connected to supply. In
second step, if we search for logic 0, then 𝑆𝑋 is connected
to ground and 𝑆𝑌 is connected to 𝑉𝐷𝐷 . If logic 1, then 𝑆𝑌 is
connected to ground and 𝑆𝑋 is connected to 𝑉𝐷𝐷 to search.
If search data match, then voltage will keep on increase and
ML wont discharged. If it mismatched, ML will be
discharged to ground.
Figure 3.5 Output Waveform for 1T-2M CAM Cell
3.6 3T-2M CAM Cell
In write operation, data ‘1’ has written in the CAM
cell. Write signal goes high. Read signal goes low in write
operation. So, combinational signal goes to high. As, write
signal goes to high, two memristor are connected in
parallel. Positive voltage drop 1V comes across the
memristor. For read operation read signal goes to high and
write signal goes to low. Now the two memristor is
connected in series. Combinational signal also goes high.
The output signal goes high. That means data found in read
operation is same as the data stored in write operation.
Figure 3.6 Output Waveform for 3T-2M CAM Cell
Table 1 represents the parameters that are taken for
configuring memristor in CAM cell designs.
Table 1 Parameters for Memristor Configuration
DEVICE PARAMETER VALUE
dt 1e-07
ROFF 200 KΩ
Memristor RON 100Ω
VON -1 V
VOFF +1V
Threshold Voltage 0.5 V
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4. CONCLUSION
We have compared the various circuits of 10T NAND Cam,
10T NOR cam, pre-charge free cam cell, 1T-1M cam cell,
1T-2M cam cell and 3T-2M cam cell using cadence
virtuoso. And from the 2nd Table which explains the
comparative analysis on different CAM Cell designs. From
the table, we can observe that 10-T NAND consumes less
power when compared to 10-T NOR, but it is bit slow when
compared to 10-T NOR. Meanwhile, Pre-charge free CAM
cell consumes less power when compared to 10-T NAND
and 10-T NOR respectively. We can clearly say that
memristor based CAM cells provides better performance
when compared to other non-memristor CAM models and
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consumption and faster processing operation. When we
consider memristor based CAM Models we can observe
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also increases and speed decreases. This proves that
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consumption and performance of the design. From the
analysis, we can conclude that 1T-1M CAM model
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