PROGRAM STUDI D4- TEKNIK ELEKTRONIKA

JURUSAN PENDIDIKAN TEKNIK ELEKTRONIKA DAN INFORMATIKA

FAKULTAS TEKNIK UNIVERSITAS NEGERI YOGYAKARTA
SOAL UJIAN Hal 1 dari 3
SEMESTER GENAP TAHUN AKADEMIK 2021/2022

MATA KULIAH : ELEKTRONIKA ANALOG LANJUT

KODE MATA KULIAH : DKA6211
HARI / TANGGAL : SELASA, 21 JUNI 2022
WAKTU : 120 MENIT
SEMESTER : GENAP
KELAS / GROUP :W
SIFAT UJIAN : TERBUKA DARING
DOSEN PENGAMPU : SUPRAPTO, Ph.D.

Kerjakan soal-soal sebagaimana terdapat dalam buku referensi dengan baik

dan benar.
7.16. In the circuit of Fig. 7.53, (W/L)1 = 5/0.18, (W/L)2 = 10/0.18, λ1 = 0.1 V−1, and
λ2 = 0.15 V−1.
(a) Determine VB such that ID1 = |ID2| = 0.5 mA for VX = 0.9 V.
(b) Now sketch IX as a function of VX as VX goes from 0 to VDD

Gambar 7.53

7.20. The CS stage of Fig. 7.56 must provide a voltage gain of 10 with a bias
current of 0.5 mA. Assume λ1 = 0.1 V−1, and λ2 = 0.15 V−1.
(a) Compute the required value of (W/L)1.
(b) If (W/L)2 = 20/0.18, calculate the required value of VB.

Gambar 7.56

7.37. In the common-source stage depicted in Fig. 7.66, the drain current of M1 is
defined by the ideal current source I1 and remains independent of R1 and R2
(why?). Suppose I1 = 1 mA, RD = 500 Ω, λ = 0, and C1 is very large.
(a) Compute the value of W/L to obtain a voltage gain of 5.

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tanpa ijin tertulis dari Fakultas Teknik Universitas Negeri Yogyakarta
 PROGRAM STUDI D4- TEKNIK ELEKTRONIKA

JURUSAN PENDIDIKAN TEKNIK ELEKTRONIKA DAN INFORMATIKA

FAKULTAS TEKNIK UNIVERSITAS NEGERI YOGYAKARTA
SOAL UJIAN Hal 2 dari 3
SEMESTER GENAP TAHUN AKADEMIK 2021/2022

(b) Choose the values of R1 and R2 to place the transistor 200 mV away
from the triode region while R1 + R2 draws no more than 0.1 mA from
the supply.
(c) With the values found in (b), what happens if W/L is twice that found in
(a)? Consider both the bias conditions (e.g., whether M1 comes closer to
the triode region) and the voltage gain.

Gambar 7.66

7.40.Suppose in Fig. 7.68, ID = 0.5 mA, λ = 0, and Vb = 1 V. Determine the values

of W/L and RD for an input impedance of 50 Ohm and maximum voltage gain
(while M1 remains in saturation).

Gambar 7.68

8.34. Consider the voltage adder illustrated in Fig. 8.56, where RP is a parasitic
resistance and the op amp exhibits a finite input impedance. With the aid of
the op amp model shown in Fig. 8.43, determine Vout in terms of V1 and V2.

Gambar 8.56 Gambar 8.43

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tanpa ijin tertulis dari Fakultas Teknik Universitas Negeri Yogyakarta
 PROGRAM STUDI D4- TEKNIK ELEKTRONIKA

JURUSAN PENDIDIKAN TEKNIK ELEKTRONIKA DAN INFORMATIKA

FAKULTAS TEKNIK UNIVERSITAS NEGERI YOGYAKARTA
SOAL UJIAN Hal 3 dari 3
SEMESTER GENAP TAHUN AKADEMIK 2021/2022

9.29. The MOS cascode of Fig. 9.20 must provide a voltage gain of 200 with a bias
current of 1 mA. If μnCox = 100 μA/V2 and λ = 0.1 V−1 for both transistors,
determine the required value of (W/L)1 = (W/L)2.

Gambar 9.20

10.30. Consider the circuit shown in Fig. 10.68, where IEE = 2 mA, VA,n = 5 V VA,p =
4 V. What value of R1 = R2 allows a voltage gain of 50?

Gambar 10.68

10.31. The circuit of Fig. 10.68 must provide a gain of 50 with R1 = R2 = 5 KΩ. If
VA, n = 5 V and VA,p = 4 V, calculate the required tail current.

Selengkapnya bisa dilihat di Buku referensi Berjudul:

Behzad Razavi, Fundamentals of Microelectronics. 2nd Edition, Wiley, 2014

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tanpa ijin tertulis dari Fakultas Teknik Universitas Negeri Yogyakarta