Introduction to Intel

8086 Microprocessor

Reference: Microprocessors and

interfacing, Douglas V Hall, Chapter 2
 Computer
A computer has the following units:
• Input Unit
• Output Unit
• Memory Unit
• Central Processing Unit

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 Microcomputer
• Microcomputers are small computers.
• Here the central processing unit of the
microcomputer is contained in a single IC
called the microprocessor.

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 Microprocessor

• The central processing unit built on a single IC

is called Microprocessor.
• A microprocessor (sometimes abbreviated as
μP) is a digital electronic component with
miniaturized transistors on a single
semiconductor integrated circuit (IC).
• A microprocessor is a LSI (Large Scale
Integration) or VLSI (Very Large Scale
Integration) IC

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 Microcontroller
• A highly integrated chip that contains all the
components such as CPU, RAM, some form of
ROM, I/O ports, and timers is called
Microcontroller.
• Unlike a general-purpose computer, which
also includes all of these components, a
microcontroller is designed for a very specific
task to control a particular system.

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 Evolution of Microprocessor
Microprocessor Data Address bus Memory Year of
bus/Word development
length

4004 4-bit 10-bit 1 KB 1971

8008 8-bit 14-bit 16 KB 1972

8085 8-bit 16-bit 64 KB 1976

8086 16-bit 20-bit 1 MB 1978

………. ………. ………. ………. ……….

Pentium 32-bit 32-bit 4 GB 1993

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 Intel 8086
• The Intel 8086 is a 16-bit
microprocessor
• The term “16-bit” means
that its arithmetic logic
unit, internal registers,
and most of its
instructions are designed
to work 16-bit binary
words.
• It has 16-bit data bus and
20-bit address bus.

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Internal Architecture of 8086

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 Functional parts
• Bus Interface unit (BIU)
– Sends out addresses, fetches instructions from
memory, reads data from ports and memory as
well as writes data to ports and memory
– Handles all transfers of Data for execution unit
• Execution unit (EU)
– EU tells BIU where to fetch instructions or data
from, decodes instructions and executes
instructions.

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 Execution Unit parts
• Control circuitry
– Directs internal operation
• Decoder
– Translates instructions fetched from memory into
a series of action which the EU carries out
• Arithmetic Logic Unit (ALU)
– Can add, subtract, AND, OR, XOR, increment,
decrement, complement, or shift binary numbers.

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 Flag Register
• A flag register is a flip-flop that indicates some
condition produced by the execution of an
instruction or controls certain operations of
the EU.
• A 16-bit flag register in the EU contains nine
active flags of two types.
– Conditional Flags: Conditional flags represent
result of last arithmetic or logical instructions
– Control Flags: Intentionally set or reset to control
certain operations of the processor with specific
instructions put in the program from the user

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Flag Register (Contd.)

Conditional
Flags

Control
Flags

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 General Purpose Register
• AX - The accumulator register (divided into AH/AL)
• BX - The base address register (divided into BH/BL)
• CX - The count register (divided into CH/CL)
• DX - The data register (divided into DH/DL)
• SI - Source index register
• DI - Destination index register
• BP - Base pointer
• SP - Stack pointer
The advantage of using internal registers for the temporary storage
of data is that, since the data is already in EU, it can be accessed
much more quickly that it could be in external memory.
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 Bus Interface Unit
• The Queue
– To increase the execution speed, BIU fetches as many
as six following instruction bytes ahead of time from
memory
– The prefetched instruction bytes are held for the EU in
a first in first out group of registers set called a queue.
– When the EU is ready for its next instruction, it simply
reads the instruction from this instruction queue.
– Fetching the next instruction while the current
instruction executes is called pipelining.
– For JMP and CALL instructions, queue must be dumped
and then reloaded from a new address
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 Segment Registers
• CS - Points at the segment containing the current
program.
• DS - Generally points at segment where variables
are defined.
• ES - Extra segment register, it's up to a coder to
define its usage.
• SS - Points at the segment containing the stack

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 Memory Access
• At any given time the
8086 works with only
four 64 KB segments
• Four segment registers
hold the upper 16 bits
of the starting address
of the four segments
• When offset value is
added to the segment,
physical address is
generated
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16
BUET
 Instruction Pointer (IP)
• It is 16-bit register, which identifies the location of
the next word of instruction code that is to be
fetched in the current code segment
• IP contains an offset instead of the actual address
of the next instruction
• The 20-bit address produced after addition of the
offset stored in IP to segment base address in the
CS is called the Physical address of the code byte
• CS:IP is used to denote the physical address.
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Md. Shahadat Hasan Sohel, Lecturer, EEE, BUET 18
 Physical Address from CS:IP
Hardwired
Memory
Zero
AFFFFH Top of Code
Segment

Code byte
A5F00H

IP = 5F00H

Start of Code
A0000H segment
CS = A000H

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Physical Address of Stack and Data
• SS:SP is used for generating physical memory
address for stack segment.
• For generating physical address of data, as
offset of DS, any one of BP, SI or DI can be
used.
• Extra segment can be used as another data
segment if required.

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Thanks…….

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