5 4 3 2 1

POWER SOURCES

+24VDC TP2 15W DC/DC CONVERTER TP3 +5VDC

TEST POINT RED U6 PT6302/SIP TEST POINT RED
F3 "+24VDC" "+5VDC"
FUSE 2A SLO TR5 2 9
VIN VOUT
3 VIN VOUT 10
4 VIN VOUT 11
D + + D
1 INH
C13 C19 C14

GND
GND
GND
GND
Power supply 47uF 63V .1uF 50V SMT 12 220uF,35V
VADJ
GND tie point

TP4 TP18 TP19

5
6
7
8
+24VDCIN 4 TEST POINT BLACK TEST POINT BLACK TEST POINT BLACK
+24VRTN 3

2
"D_GND" "D_GND" "D_GND"
+48VDCIN 2 JP2 JP1 JP3
+48VRTN 1 D
J1
HEADER 4 VERT .156

1
DC INPUTS
B C C U9
PT78ST112V TP7 +12VDC
R14 12V,1.5A DC/DC CONVERTER TEST POINT RED
1K 1 VIN "+12VDC"
EARTH VOUT 3
GND TO

GND
Z3 +48VDC TP1
F2 TEST POINT RED C25 +
FUSE 3.15A SLO TR5 "+48VDC" .1uF 50V SMT C26
220uF,35V

2
C C

+ C18
C12 .1uF 50V SMT
47uF 63V D

48V_RTN

COMPONENTS NOT USED SPARES HIGHEST REF DESIGNATOR

U52D U52E C133

14

14

R16,R23,R31,R32,R39,R41 74HC05 74HC05 U60

R48,R56,R57,R66,R169 Y1
B J13 9 8 11 10 B
C10,C16,C17,C62,C94,C112 F5
R203,R205 (POTS) J16
Q6,Q7 R236
D3,D7
7

14 7

TP22
U15 U31A U52F D44
8

OP296 74HC05
Q29
3 +
1 13 12 BZ1
2 L1
-
K4
S2
4

Z9
JP3

MOUNTING HOLES

Z3 Z8 Z7 Z9 Z1 Z2 Z4 Z5 Z6

A GND_EARTH GND_EARTH_1 A

* = NOT INSTALLED
PROPRIETARY CANDELA CORPORATION 530 Boston Post Road Wayland, Massachusetts U.S.A. 01778-1883
REV 12 13 14 15 16 DRAWN SCOTT MOGREN 1-5-01
SIZE DRAWING NO. REV.
ECO# 12520 12563 12568 12592 12630 CHECKED OWEN SCHIRDUAN 1-5-01 This drawing contains confidential information TITLE
proprietary to Candela Corporation. It must not SCHEMATIC B 7111-80-2370 16
DATE 1-25-01 2-2-01 2-6-01 2-22-01 3-8-01 ENG ELEC CHUCK JOHNSON 1-5-01 be reproduced or disclosed to others or used in

CHK'D SSM SSM SSM SSM SSM APPROVED DATE

any other way, in whole or in part, except as
authorized in writing by Candela Corporation.
DIODE LASER CPU I/O PCB DATE: Thursday, March 08, 2001 SHEET 1 OF 18
5 4 3 2 1
 5 4 3 2 1

CAPACITOR CHARGER
TP9
TEST POINT RED
+48VDC +VCAP +Vcap
D D
U1 L1
220uH 5.6A D2
1 V IN OUTPUT 2 2 4 3 1
1 3

5 4 + C6 DIODE MBR10100
C4 + ON/OFF FB 470uF 63V
1500uF 63V 3
LM2576/TO5D

1
HEAT SINK
+ C27 + C11 + C24 + C7 R233 R235 R234
D1 27000uF 27000uF 27000uF 27000uF 1.5K 2W 1.5K 2W 1.5K 2W

DIODE MBR10100

3
R2 R3
10K 10K
C
R7 100K C

10V

R8
8

10K U3B

8
3 OP296
+
R4 1 5
+
U2 10.0K 1% 2 7
-
TL431ACD U3A 6
-
5
4

OP296 C5
3 .1uF 50V SMT R9 R12
4

2K 0.15 OHM

4
8

2 R11 R6 5.11K 1%
5K POT
+VCAP
7
6
3
2

C1 R5 9.09K 1%
R1 .1uF 50V SMT
1

3.32K 1% + C3 .01uF
B C2 B
1uF 35V TAN R10
4.7K

48V_RTN

A A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLESCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 2 OF 18
5 4 3 2 1
 5 4 3 2 1

+5VDC +48VDC

+5VDC DIODE DRIVER C44

.1uF 50V SMT

+5VDC LOGIC PD0 D

RELAY_ON 4,5,6
R142
2K
R95 U32A 14 R141
13,16 DRVR_ENA_STROBE

2
R102 10k 74HC74 27K
10K R128 1 MMBTA56
+5VDC

3
2 4.7K Q15
U27F U27A D Q14

14

14
Q 5 1
D 74HC05 74HC05 MMBTA06 D

3
3 CLK GATE_DRIVE 4,5,6

2
/RESET 13 12 1 2
R127 4 6 D R143
16,17,18 1K PRE Q 47K
1 CLR D_GND +5VDC
7

14 7
TP12 U27B C39 D
TEST POINT YELLOW 74HC05 C43 7 .1uF 50V SMT
PD1 "LOW = ENABLE" .1uF 50V SMT

14
13,16 /DRVR_ENA 3 4
+5VDC U27C D +5VDC C46
D 74HC05 .1uF 50V SMT
5 6
R103
14 7

U52B 10K U27D

14

74HC05 74HC05 U33 D

ADG419

7
5 4
3 4 9 8 D
14 VDAC
VCC VCC
+5VDC 14 U40A R129 4.7K I = (V-.33)x1.02
PJ7 74HC08 14 8 1
PJ7 S2 D ISET
7

13,16 LASER_ON 1
C
TIMING_FAULT 3 4 2 4,5,6 C
R89 HIGH = ON S1 R228
2 6 6 IN
1.62K 1% 5 100K
U40B GND -VCC D C45
3

LM339 7 74HC08 .1uF 50V SMT

4V U28A 7 3 7
7 +
1 D
4,16 CHA_FDBK 6 -
R90 D
6.49K 1%
12

U28B +5VDC +5VDC C68

3

LM339 .1uF 50V SMT

D 5 +5VDC C69
+
2 U38A U39B .1uF 50V SMT
4 R140 74HC221A/SO 16 D TP14 74HC74
5,16 CHB_FDBK -
47K TEST POINT YELLOW
1 14 D
+5VDC
12

A
2 B
U28C Q 13 +5VDC
3

LM339 15 TRIGGERS ALLOWED 12

+ REXT/CEXT 329ms D
9 + Q 9
14 C65 4 11
10uF 10V TAN Q CLK
6,16 CHC_FDBK 8 - 14 CEXT
B +5VDC B
3 10 8 C66
12

CLR D_GND PRE Q .1uF 50V SMT

13 CLR
8 D_GND
D
+5VDC 7
14
D
7 CAL/FOOT_ENA
D 9 PG5 16
8 /TIMING_FAULT
+5VDC 10
U38B TP17 U40C LOW = FAULT
R155 74HC221A/SO 16 TEST POINT YELLOW 74HC08
EMO CONTROL 28.7K 1% 74HC74 7
14
U21 R84 9 NO TRIGGERS ALLOWED U39A
A +5VDC 200ms
1 8 10K 10 D
12 EMO_ANODE B +5VDC
U27E
14

Q 5 2 D
7 74HC05 + 7 5
REXT/CEXT Q
12 EMO_CATHODE 2 3 CLK
3 6 11 10 C80 12
10uF 10V TAN Q
6 CEXT
4 5 4 PRE Q 6
11 CLR
D D_GND +5VDC
7

IL211A 1
A CLR D_GND A
8
R162 7
1K
CANDELA CORPORATION PROPRIETARY
PD6 SIZE DRAWING NO. REV.
TITLESCHEMATIC
13,16 CLR_TIMING_FAULT
C81 100pF
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 3 OF 18
5 4 3 2 1
 5 4 3 2 1

CHA DIODE STRING

+Vcap
D C62* D

GATE_DRIVE 3,5,6
+5VDC

R120
28.7K 1% R136 10K

2
R135 5.11K 1% R133
Q16 1K
VNP5N07
1 R118

2
D +5VDC 330
C64 1 MMBTA56
.1uF 50V SMT Q17

A
8
U36B R138

3
CHA_SHUNT_STATUS 15
OFFSET = .33V OP279 - 6 1M U34 D D26

5
7 INA168
3,16 CHA_FDBK DL4007
+ 5 1 R119
220
V=(.1485)( I) +.0495

C
+ 3
C63 R137 R132 R134
4

27pF 10.0K 1% 4 0.075 OHM 10K

A
-

C C
D27
LED GRN SMT

2
D D "CHA
SHUNT

C
OFFSET = .33V ON"
V=(.1485)( I) +.0495
I = 9V-.33)x1.02 R153 D
470

C
ANODE_ChA 11
D31 K2 +24VDC
RELAY SPDT
C78 DL4935
CATHODE_ChA 11
.047uF 4

C
A
C79 1
.039uF 3 D25
2 DL4007
5
+12VDC C67

AA
.1uF 50V SMT

2
D29
8

R154 1K D R152
100 Q19 SMAZ12
B 2 - B
1 1 STP55NE06

C
3,5,6 ISET 3 +
U36A

3
I = 9V-.33)x1.02 OP279
C77 3 Q18
4

.022uF 50V 2N7002

1 RELAY_ON 3,5,6
C
D

2
B

A A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLESCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 4 OF 18
5 4 3 2 1
 5 4 3 2 1

CHB DIODE STRING

+Vcap

C94*
GATE_DRIVE 3,4,6
+5VDC
D R166 D
R173 R174 10K

2
28.7K 1% 5.11K 1% R171
Q20 1K
VNP5N07
+5VDC 1 R164

2
D 330
C96 1 MMBTA56
.1uF 50V SMT Q21

A
8
U48B R176

3
CHB_SHUNT_STATUS 15
OFFSET = .33V OP279 - 6 1M U47 D D34

5
7 INA168 DL4007
3,16 CHB_FDBK
+ 5 1 R165
220
V=(.1485)( I) +.0495

C
+ 3
C95 R175 R163 R172

4
27pF 10.0K 1% 4 0.075 OHM 10K

A
-

D35
LED GRN SMT

2
D D "CHB
C SHUNT C

C
ON"

R184 D
470

C
ANODE_CHB 11
D37 K3 +24VDC
RELAY SPDT
C110 DL4935
CATHODE_CHB 11
C111 .047uF 4

C
A
.039uF 1
3 D33
2 DL4007
5
+12VDC C103

AA
.1uF 50V SMT

2
D36
8

R185 1K D R183 Q23

100 STP55NE06 SMAZ12
2 -
1 1

C
3,4,6 ISET 3 +
U48A

3
I = 9V-.33)x1.02 OP279

3
B B
C109 Q22
4

.022uF 50V 2N7002

1 RELAY_ON 3,4,6
C
D

2
B

A A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLESCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 5 OF 18
5 4 3 2 1
 5 4 3 2 1

CHC DIODE STRING +Vcap

GATE_DRIVE 3,4,5
C112* +5VDC

R199
R210 R211 10K
28.7K 1% 5.11K 1% R208

2
1K
Q25
D +5VDC VNP5N07 R201 D

2
D 1 330
C119 1 MMBTA56
.1uF 50V SMT Q26
U56B

A
8
OP279 R213

3
OFFSET = .33V - 6 1M U53 D
CHC_SHUNT_STATUS 15

5
7 INA168 D41
CHC_FDBK
+ 5 1 DL4007 R202
3,16 220
V=(.1485)( I) +.0495

C
+ 3
C113 R212 R200 R209
4

27pF 10.0K 1% 4 0.075 OHM 10K

A
-

D42
LED GRN SMT

2
D D "CHC
SHUNT

C
ON"

R226 D
470

C
C ANODE_CHC 11 C

D44 K4 +24VDC
RELAY SPDT
C126
CATHODE_CHC 11
.047uF 4

C
A
C127 1
.039uF 3 D40
2 DL4007
5
+12VDC C123

AA
.1uF 50V SMT

2
R221 D43
8

R227 1K D 100 Q29

STP55NE06 SMAZ12
2 -
1 1

C
3,4,5 ISET 3 +
U56A
I = 9V-.33)x1.02

3
OP279

3
C125 Q27
4

.022uF 50V 2N7002

1 RELAY_ON 3,4,5
B C B
D

2
B

A A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLE SCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 6 OF 18
5 4 3 2 1
 5 4 3 2 1

FOOTSWITCH/CALSWITCH CIRCUITS
+24VDC

U16
1 8
R17
1.5K 1/2W 7
2
D D
3 6 CALPORT_STATUS CALPORT_STATUS 15
D10 4 5
LED GRN SMT
"HP IN IL211A
CALPORT" D

+5VDC

CALPORT_SW R88
1 10K R126 100K
2
3 FTSW#1
4 FTSW#2
5
6 U44A +24VDC C40
14
74HC32 R87 .1uF 50V SMT
1 LL4148 10K
C
B 3 D24 C
J4 +24VDC ELEC FOOTSWITCH 2 U40D

3
HEADER 6 VERT .100 14 74HC08 D
TRIGGER INPUTS D 11
7 +
U18 12 13 CAL/FOOT_ENA
1 8 11 10 -
R19 13 U28D 3
1.5K 1/2W 7 R104 LM339

12
2 350ms OFF DELAY 47K + C35
ELEC FTSW#1 7 H = OFF SLOW 10uF 10V TAN
3 6 ELEC_FTSW#1 15
D12 14 U44B L = ON FAST D
LED GRN SMT 4 5 74HC32
"TRIGGER SW#1" 4 D
IL211A 6
D 5

7
+24VDC SPARES
U17 +5VDC C84
1 8 .1uF 50V SMT
R18
B 1.5K 1/2W 7 U44C B
2 74HC32 14 D
3 6 ELEC FTSW#2
ELEC_FTSW#2 15
D11 9
LED GRN SMT 4 5 8
"TRIGGER SW#2" 10
IL211A R178
D 10K R179
AIR_FTSW#1 15 7
10K
D
AIR_FTSW#2 15
R191 +5VDC
S1 D38 330 U44D
14
D 74HC32
12
D AIRFOOTSWITCH #1 LED GRN SMT 11
"FTSW#1" 13

LOW=FOOTSW DOWN R177 R180 7

R192 +5VDC 10K 10K
S2 D39 330

A D AIRFOOTSWITCH #2 LED GRN SMT A

"FTSW#2" D

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLESCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 7 OF 18
5 4 3 2 1
 5 4 3 2 1

+24VDC

CRYO DETECT
U14
1 8

7
2
D D
3 6 DCD_DETECT 15
4 5

R55 IL211A
1.5K 1/2W
NOT INSTALLED D

+24VDC A

C15 TP6 D9
.1uF 50V SMT TEST POINT YELLOW LED GRN SMT
"DCD DETECT" "DCD DETECT"
VALVE_SENSE 8
C
B Q5

3
R16* R23* U5B 2N7002

8
3 D7* R40 1K OPA2234
+
1 A C 5 R47 15K
9 CRYO_SENSE +
2 - 7 1
U5A 6 -
C10* R32* OPA2234
R39*

2
C

R45

4
C C
D3* R30 R31* B 1K
1K

Q6* R46 71.5K 1%

3
A

R41*
B

B B B 1
R33 R44 +5VDC
0 OHM C17* 2K
+24VDC

2
R48*
B
R66*
B B TP8
R57* C16* U15* TEST POINT YELLOW
8 1 "HP_VALVE"
3

Q7* 7
2 HP_VALVE 9,13
1 6 3

5 4
2

B B
R56*

A A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLE SCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 8 OF 18
5 4 3 2 1
 5 4 3 2 1

DCD VALVE/BUBBLE CIRCUITS +24VDC

R54
1.5K 1/2W

R52
10K
C8 +
D8 47uF 63V
LED GRN SMT C23 R22
"DCD BUBBLE OK" TP5 .1uF 50V SMT 4.7K
D TEST POINT YELLOW U8A D
U13 U8B "BUBBLE SENSE" OPA2604 R42 B

8
8 1 OPA2604 B 10K

8
3 10.0VOLTS
+
7 + 5 1
2 7 2 U4 R28
-

5
4

1
6 3 6 R43 TL431ACD 10.0K 1%
15 BUBBLE - 10K
LOW=NO BUBBLES R15

4
5 4 8
390 2W

4
IL211A R38 B
D 100K R29 +5VDC
R53 R37 R36 3.32K 1%

7
6
3
2
1M 10K 10K

B R76
R75 10K
10K
C22 R21
.1uF 50V SMT 390 2W J3
1 HP VALVE +
R20
2 HP VALVE -
24VDC_F3 1.2K 1W
C 11 24VDC_F3 3 SW /LED RTN C
4 LED +
5 BUBBLE +
6 BUBBLE -
8 CRYO_SENSE 7 CRYO SENSE
8
15 HP_DETECT 9 HP DETECT
B
10
15 SPARE_HP_DETECT 11 SPARE
+5VDC
12
HEADER 12 VERT .100
R64 +5VDC R13 HP SIGNALS
330 C20 10
D4 +
R51 .1uF 50V SMT C9 D
DL4007
10K D6 47uF 63V
DL4007
D15 U12
LED GRN SMT 1 8 B U7
"HP VALVE ON" 7 DRV101 B EARTH
D5
7 5 SMAZ33 GND TO
HP_VALVE 2 6 Q3 Z3
8,13 HP_VALVE
3 FLAG Vs CZT127
LOW=HP VALVE ON R65 6 2 3
B 470 4 5 1 PWM B

IL211A
DELAY

1
R35
4.7K
2 3 4
C21
VALVE_SENSE 8
.047uF R26 R27
R34 4.7K 4.7K
47K R236
B 0.15 OHM

3
B Q4
B 2N7002
1

2
B

A A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLESCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 9 OF 18
5 4 3 2 1
 5 4 3 2 1

ENERGY CIRCUITS
+5VDC

R224
47K
R206 332K 1%
D R207 D
20K POT

1
5.11K 1% CAL HIGH 100

2
R217 R218
C129 R205* 2 1 3
.047uF 50V 5K POT
CAL LOW C115
.01uF

3
R232 5.11K 1%
CALPORT D +5VDC
C121
.1uF 50V SMT TP21
J15 TEST POINT GRN

8
HEADER 3 VERT .100 U58B D CALPORT

8
CALPORT R231 100 OP296 R225 2 - 1V/J
6 - 1K 1
1 CALPORT 14
2 7 3 +
5 + U58A
3 OP296

4
C C
D D

4
D

GND_EARTH_1

+5VDC

R222
47K
R214 332K 1%
R204
20K POT

1
5.11K 1% HEAD HIGH 100

2
R215 R216
R203* 2 1 3
C128 5K POT
B 2200pF 50V HEAD LOW C114 B
.01uF

3
HEAD R230 71.5K 1%
DETECTOR D +5VDC
C120
.1uF 50V SMT TP20
J14 TEST POINT GRN

8
HEADER 3 VERT .100 R229 U57B D HEAD
8

HEAD 100 OP296 R223 2 - .714V/J

6 - 1K 1
1 HEAD_DETECT 14
2 7 3 +
5 + U57A
3 OP296

4
D D
4

GND_EARTH_1
A A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLESCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 10OF 18
5 4 3 2 1
 5 4 3 2 1

24VDC_F3
DCD HEATER AND TE COOLER 24VDC_F3 9
+5VDC +24VDC
+5VDC +24VDC F1
FUSE 5A SLO TR5
R60 R49 DCD HEATER FUSE J2
330 4.7K
1 DCD HTR
2 HTR RTN
U10
3 + TE FAN
1 8 4 - TE FAN
D D13 +5VDC D
7 5 + DRIVER FAN
LED GRN SMT
"DCD HTR ON" 6 - DRIVER FAN
2 6
3 R62 +5VDC +24VDC HEADER 6 VERT .156

2
DCD_HTR 330 DCD HEATER,
13 DCD_HTR
4 5 Q1 R50 B TE FAN
LOW=DCD HTR ON R61 IRF530N 4.7K
470 IL211A 1
D14 U11
R24 LED GRN SMT 1 8
10K "TEC FAN ON"

3
7

TEC_FAN 2 6
13 TEC_FAN
3

2
LOW=TEC FAN ON R63
B 470 4 5 Q2
IRF530N
IL211A 1

R25
10K

3
C C

B
+5VDC

R149 +5VDC +24VDC +24VDC

330 F4
FUSE 6.3A SLO TR5 K1 J9
R147 TE COOLER FUSE 8 1 +TE 1
4.7K 7
D30 2 -TE 1
U35 6
LED GRN SMT 3 +TE 2
1 8 3 4
"TE ON" -TE 2
7 4
5 CON4
SPOUT#1 2 6 1 TE
13 TEC_ON
3 2 SIGNALS

2
LOW=ON R148

C
470 4 5 Q12 RELAY DPDT
IRF530N
IL211A 1 D21
DL4007 J8
R115 1
4 ANODE_CHA STRING 1 ANODE

A
10K
3

9 AIM ANODE
B 4 CATHODE_CHA 2 STRING 1 CATHODE B
10 AIM CATHODE
5 ANODE_CHB 3 STRING 2 ANODE
11 +TE 1
B 4
5 CATHODE_CHB STRING 2 CATHODE
12 -TE 1
6 ANODE_CHC 5 STRING 3 ANODE
+5VDC 13 +TE 2
6 CATHODE_CHC 6 STRING 3 CATHODE
14 -TE 2
7 AIM FDBK
R161 +5VDC +24VDC 15
12 THERMISTOR_2 THERMISTOR
330 8
12 THERMISTOR_1 THERMISTOR
R159
4.7K

16
17
D32 U37 CON DB15S
LED GRN SMT 1 8 DIODE
"TE HEATING" 7 BOX I/O
SIGNALS
HEAT/COOL 2 6
13 TEC_HEAT/COOL
3
2

LOW=ON R160
470 4 5 Q13
A IRF530N A
IL211A 1

R121
10K
3

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLE SCHEMATIC
B
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 11OF 18
5 4 3 2 1
 5 4 3 2 1
+5VDC
TEMPERATURE AND PRESSURE CIRCUITS
R99 U30B

8
6.49K 1% OP279
5 +
7
1V
6 -

R116 R117 R122

4
D 1.62K 1% 1.62K 1% 9.09K 1% 0.1V/C D
35C = 1.5V
25C = 2.5V
+5VDC C59 15C = 3.5V
D D C41 .1uF 50V SMT TEMP = 25-(V-2.5)*(10)
.1uF 50V SMT TP11
U30A TEST POINT YELLOW
R123 OP279 D TEMP
11 THERMISTOR_1

8
1.00K 1% R100
3 1K
+
11 THERMISTOR_2 1 TEC_TEMP 16
2 -
+5VDC C60 R125
+5VDC .1uF 50V SMT 1.00K 1%

4
D
U31B R139 R124

1
OP296 D 1.78K 1% 1.78K 1%

8
R101 2 5 +
5K POT 7
TEMP 6 D
-
C42
C
.01uF C

4
D
D

TP10
TEST POINT YELLOW
DCD PRESSURE
J5 V = (.0267)x(psi) +0.5
HEADER 3 VERT .197 psi = (V-.5)x(37.5)
DCD PRESSURE R77 0.5V = 0 psi
100 4.5V=150 psi
DCD PRES RTN DCD_PRES
3 DCD_PRES 16
DCD PRES VOUT
DCD PRES PWR 2
1
D +24VDC

+5VDC
EMO_ANODE
3 EMO_ANODE 3
N.C. R67 R68
EMO_CATHODE 2 R85 1K 1K
1 EMO_CATHODE 3
B 330 B
+24VDC
J10 +5VDC
HEADER 3 VERT .100
EMO D20
LED GRN SMT R70 R69
U22 "READY" 1K 1K
8 1
7
5.0V
6 2 READY 13
3
R86 R81
READY LAMP 5 4 470 C29 + U20 10.0K 1%
2

5
4

1
READY RTN 10uF 10V TAN TL431ACD
1 R78
B 390, 2W IL223A 8
J6
HEADER 2 VERT .100 D R82
READY 10.0K 1%

7
6
3
2
A A
D

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLESCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 12OF 18
5 4 3 2 1
 5 4 3 2 1

PT[5..6]
16 PT[5..6] PT6 OUTPUT DRIVER CIRCUITS
U50
PT5
PJ[0..7] 1 18 LOW=ENABLE
3,16 PJ[0..7] DCD_HTR 11
PJ1 2 17 LOW=ENABLE
TEC_FAN 11
PJ2 3 16 LOW=ENABLE
READY 12
4 15 LOW=ENABLE
D TEC_ON 11 D
PJ4 5 14

PJ5 6 13 LOW=ENABLE
TEC_HEAT/COOL 11
PJ6 7 12
PJ7 8 11

R194A

R194B

R194E

R194F

R194G
+5VDC

R194C

R194D

R194H
9 10

9
PJ7
3,16 LASER_ON
ULN2803A +
10K SIP 9 PIN D DRIVER C105 C101
.1uF 50V SMT 47uF 63V

1
D

C C

HIGH=ENABLE
PRE_YDRIVE 16,17
HIGH=ENABLE
PRE_XDRIVE 16,17

PD[0..7]
3,16,17 PD[0..7]
U51

PD0 1 18
DRVR_ENA_STROBE 3,16
PD1 2 17
/DRVR_ENA 3,16
PD2 3 16 LOW=ENABLE
TS_XDRIVE 17
PD3 4 15 LOW=ENABLE
TS_YDRIVE 17
B B
PD4 5 14 LOW=ENABLE
HP_VALVE 8,9
PD5 6 13

PD6 7 12
CLR_TIMING_FAULT 3,16
PD7 8 11 LOW=ENABLE 2 +5VDC

+5VDC R182 1
9 10 100 BZ1
R195A

R195B

R195E

R195F

EFB-CB37C11
R195G
R195C

R195D

R195H
BUZZER
2

D ULN2803A +
DRIVER C106 C102
10K SIP 9 PIN .1uF 50V SMT 47uF 63V

D
1

A D A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLE SCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 13OF 18
5 4 3 2 1
 5 4 3 2 1

+5VDC
A/D AND DAC CIRCUITS
16 SPI[0..2] SPI[0..2] + C85
U45 MAX1247 C86 2.2uF 10V TAN
A/D CONVERTER .1uF 50V SMT
SPI2 16 1
SCLK VDD D
CS2 15 2 f=1/2X3.14XRXC R186 1.5K (FROM SHT 11 ZONE D-1)
16 PF2_CS2 CS CH0 CALPORT 10
SPI1 14 3 R187 1.5K (FROM SHT 10 ZONE D-1)
D DIN CH1 HEAD_DETECT 10 D

13 4 R188 1.5K
SSTRB CH2
SPI0 12 5 R189 1.5K
DOUT CH3
+5VDC 11 6 +5VDC
DGND COM C97 C98 C99 C100 TP13
10 7 .01uF .01uF .01uF .01uF TEST POINT RED
AGND SHDN +VREF +24VDC
9 8 4.90VDC
VDD. VREF VOLTAGE REFERENCE
C88 D D D D U41 REF02AP
C87 .1uF 50V SMT 4.90VDC 6 OUT
.1uF 50V SMT IN 2 C82
7 . TEMP 3

GND
8 .. .1uF 50V SMT
TRIM 5

...
3
R156
470
D D 2V R130

4
5K POT 2 D
+5VDC +VREF
R157
U42 LTC1452 330
DAC CONVERTER C70

1
C
.1uF 50V SMT D C
SPI2 1 8 R144 D (TO SHT 16 ZONE C-1)
CLK VDD +4.9VREF 16
D 1K
SPI1 2 7 (TO SHT 5 ZONE D-5)
DIN VOUT VDAC 3
CS1 3 6
16 PF1_CS1 CS REFIN
4 5 C61
DOUT AGND .1uF 50V SMT

RS-232 COMMUNICATIONS CIRCUIT

+5VDC

R219 +5VDC_ISO C122

ISOLATION BARRIER 220 .1uF 50V SMT +5VDC_ISO
8 2
R197 D_ISO
220 7 C118 C117
6 2.2uF 10V TAN + .1uF 50V SMT D_ISO
B 3 + C124 5 B
GND
3

5 C133 +
1uF 35V TAN 9
16 RX U55 Q28 1uF 35V TAN

16

15
4
HCPL0501 2N7002 D_ISO D_ISO 8
1 ISO_RX 12 13 MMRX 3

VCC

GND
R198 R1OUT R1IN RX
2 8 9 R2OUT R2IN 8 7
1.5K ISO_TX 11 14 MMTX 2
T1IN T1OUT TX
2

7 10 T2IN T2OUT 7 6
D 6 1
3 D_ISO 1 J16
C+
3

5 3 MM MODE

10
11
Q24 U54 C1- CON DB9S
4 C2+
2N7002 HCPL0501 R220 C131 + 5
1uF 35V TAN C2-
TX 1 1.5K 2 V+
6 V-
+5VDC D U60 ADM202E
2

R196 D D_ISO RS-232 DRIVER/RECEIVER

10K
+5VDC_ISO C132 +
C116 + 1uF 35V TAN
VS 1

0V 2

2.2uF 10V TAN

D
0_V

+VOUT

-VOUT

A C130 A
D 2.2uF 10V TAN + TP22
SYNC_OUT

U59 TEST POINT BLACK

SYNC_IN

DCP010505P "D_ISO"
DC/DC CONVERTER
D_ISO D_ISO CANDELA CORPORATION PROPRIETARY
SIZE DRAWING NO. REV.
14

TITLE SCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 14OF 18
5 4 3 2 1
 5 4 3 2 1

+5VDC

INPUT SIGNAL CIRCUITS

D D

10K SIP 9 PIN

1

1
4 CHA_SHUNT_STATUS

R193A

R193B

R193E

R193F

R193G
R193C

R193D

R193H
5 CHB_SHUNT_STATUS PT[0..6]

9
U49 74HC541 PT[0..6] 13,16
6 CHC_SHUNT_STATUS PT0
2 A1 Y1 18
3 17 PT1
A2 Y2 PT2
4 A3 Y3 16
5 15 PT3
7 AIR_FTSW#1 A4 Y4
6 14 PT4
A5 Y5
7 AIR_FTSW#2 7 A6 Y6 13
8 A7 Y7 12
+5VDC 9 11
A8 Y8 +5VDC
VCC 20
1 G1
19 G2 GND 10
C104

10K SIP 9 PIN

1

1
BUFFER .1uF 50V SMT
D
D
9 BUBBLE
C C

R79A

R79B

R79E

R79F

R79G
R79C

R79D

R79H
8 DCD_DETECT

9
U23 74HC541 PH[0..7]
9 HP_DETECT PH[0..7] 16
2 18 PH0
A1 Y1 PH1
3 A2 Y2 17
9 SPARE_HP_DETECT PH2
4 A3 Y3 16
5 15 PH3
7 CALPORT_STATUS A4 Y4
6 14 PH4
A5 Y5 PH5
7 ELEC_FTSW#1 7 A6 Y6 13
8 12 PH6
A7 Y7 PH7
7 ELEC_FTSW#2 9 A8 Y8 11
20 +5VDC
VCC
1 G1
19 G2 GND 10
C32
BUFFER .1uF 50V SMT
D
D

B B

A A

CANDELA CORPORATION PROPRIETARY

SIZE DRAWING NO. REV.
TITLESCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 15OF 18
5 4 3 2 1
 5 4 3 2 1

R114 1.5K f=1/2X3.14XRXC

17 TS_X_POS
R113 1.5K
17 TS_Y_POS
R112 1.5K
12 DCD_PRES CPU CIRCUITS
R111 1.5K
12 TEC_TEMP
R110 1.5K
D 3,4 CHA_FDBK D
R109 1.5K
3,5 CHB_FDBK
R108 1.5K
3,6 CHC_FDBK
R107 1.5K

C71 +5VDC

.1uF 50V SMT

.1uF 50V SMT

.1uF 50V SMT

.1uF 50V SMT

.1uF 50V SMT

.1uF 50V SMT

.1uF 50V SMT

.1uF 50V SMT

D .1uF 50V SMT
C47 C48 C49 C50 C51 C52 C53 C54
14 RX
14 TX

C89 2.2uF 10V TAN C55

+
D .1uF 50V SMT

PAD7
PAD6
PAD5
PAD4
PAD3
PAD2
PAD1
PAD0
SPI2
SPI1
SPI0
+5VDC

PT6
PT5
PT4
PT3
PT2
PT1
PT0
+4.9VREF 14
SPI[0..2] C90 .1uF 50V SMT
14 SPI[0..2]

112
111
110
109
108
107
106
105
104
103
102
101
100
PT[0..6] D U43

99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
13,15 PT[0..6]
MC68HC812A4
PT[5..6] PH[0..7]

PS3/TxD1

PS1/TxD0

Vssa

Vrh
PT6/IOC6
PT5/IOC5
PT4/10C4
PT3/IOC3
PT2/IOC2
PT1/IOC1
PT0/IOC0

PS2/RxD1

PS0/RxD0

Vdda

PAD6/AN6
PAD5/AN5
PAD4/AN4
PAD3/AN3
PAD2/AN2
PAD1/AN1
PAD0/AN0
PAD7/AN7/Vstby
PS4/SDI/MISO
PT7/IOC7/PAI

PS7/SS
PS6/SCK
PS5/SD0/MOSI

Vrl
13 PT[5..6] PH[0..7] 15
C 1 84 PH7 C
PJ[0..7] Vssx PH7/KWH7 PH6 C57 +5VDC
3,13 PJ[0..7] 2 Vddx PH6/KWH6 83
3 82 PH5 D .1uF 50V SMT
PD[0..7] PJ1 4 KWJ0/PJ0 PH5/KWH5 PH4 C56 2.2uF 10V TAN
3,13,17 PD[0..7] KWJ1/PJ1 PH4/KWH4 81
PJ2

+
5 KWJ2/PJ2 Vssx 80
AD[16..18] 6 79
17 AD[16..18] KWJ3/PJ3 Vddx
PJ4 7 78 PH3
PJ5 KWJ4/PJ4 PH3/KWH3 PH2
8 KWJ5/PJ5 PH2/KWH2 77
PJ6 9 76 PH1 R131 D D
PJ7 10 KWJ6/PJ6 PH1/KWH1 PH0 1K
KWJ7/PJ7 PH0/KWH0 75
AD16 11 74
AD17 12 ADDR16/PG0 PF6/CSP1 PF5_CSP0 17 (ROM)
+5VDC 73
AD18 13
14
15
ADDR17/PG1
ADDR18/PG2
Vdd
Vss
CPU PF5/CSP0
PF4/CSD
PF3/CS3
PF2/CS2
72
71
70
PF4_CSD 17 (RAM)

16 69 R98 D
+ C92 ADDR19/PG3 PF1/CS1 1K
17 ADDR20/PG4 PF0/CS0 68
C91 .1uF 50V SMT 18 67 AD15
2.2uF 10V TAN ADDR21/PG5 PA7/ADDR15 AD14
19 BKGD/TAGHI PA6/ADDR14 66
PD0 20 65 AD13
DATA0/PD0 PA5/ADDR13 PF2_CS2 14 (A/D)
PD1 21 64 AD12
PD2 DATA1/PD1 PA4/ADDR12 AD11

LSTRB/TAGLO/PE3
22 63 PF1_CS1 14 (DAC)

MODA/IPIPE0/PE5
MODB/IPIPE1/PE6
3 /TIMING_FAULT PD3 DATA2/PD2 PA3/ADDR11 AD10
23 DATA3/PD3 PA2/ADDR10 62
D PD4 24 61 AD9
DATA4/PD4 PA1/ADDR9 PF0_CS0 18 (DISPLAY)
IRQ/VPP/PE1
DATA10/PC2
DATA11/PC3
DATA12/PC4
DATA13/PC5
DATA14/PC6
DATA15/PC7
+5VDC PD5 25 60 AD8

ADDR0/PB0
ADDR1/PB1
ADDR2/PB2
ADDR3/PB3
ADDR4/PB4
B B
DATA9/PC1

DATA5/PD5 PA0/ADDR8

ARST/PE7
ECLK/PE4
PD6 AD7
XIRQ/PE0
26 DATA6/PD6 PB7/ADDR7 59
PD7 RW/PE2 AD6
27 58
RESET

EXTAL
DATA7/PD7 PB6/ADDR6

Vddpll
DATA0 28

Vsspll
+5VDC R167 AD5 AD[0..15]

XTAL
57

Vddx
Vssx
AD[0..15] 17,18

XFC
1K DATA8/PC0 PB5/ADDR5
D DATA[0..7]
DATA[0..7] 17,18
DATA1 29
DATA2 30
DATA3 31
DATA4 32
DATA5 33
DATA6 34
DATA7 35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
/RESET 2 1
3,17,18 /RESET 4 3

AD0
AD1
AD2
AD3
AD4
6 5
J13
RW 17,18
* HEADER 3X2
BACKGROUND
AD0 17,18
DEBUGGER
DSPLY_IRQ
18 DSPLY_IRQ ECLK 18
+5VDC
+5VDC
EXTAL 17
R168 1K R145 330
TP15
R170 1K R146 1K D28 TEST POINT YELLOW
LED GRN SMT "CPU"
R169 *1K SMT R150 1K D "CPU ACTIVE"
U52C +5VDC
14

A 74HC05 A
D
2.2uF 10V TAN

2.2uF 10V TAN

2.2uF 10V TAN

17 MEM RESET 5 6 C73 C83 TP16

C58 + C93 + C72 + .1uF 50V SMT .1uF 50V SMT TEST POINT YELLOW
+5VDC "XTAL"
CANDELA CORPORATION PROPRIETARY
R151 1K SIZE DRAWING NO. REV.
7

TITLE SCHEMATIC
D

DIODE LASER CPU I/O PCB

B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 16OF 18
5 4 3 2 1
 5 4 3 2 1

R181 +5VDC
10K

16 MEM RESET RAM/ROM AND TOUCH SCREEN CIRCUITS

C34 AD[0..15]
AD[0..18] AD[0..15] 16,18
J12 2.2uF 10V TAN
HEADER 36 + AD[16..18]
AD[16..18] 16
MEMORY SIGNALS
1 1 D
2 2 U46 32Kx8 SRAM +5VDC
DATA[0..7] 16,18
D 3 3 AD16 M48Z35 D
4 4 AD15 DATA0 AD0
5 5 AD12 DATA1
11 O0 A0 10 AD1
6 6 AD7 DATA2
12 O1 A1 9 AD2
7 7 AD6 DATA3
13 O2 A2 8 AD3 R83
8 8 AD5 DATA4
15 O3 A3 7 AD4 U24 10K
9 9 AD4 DATA5
16 O4 A4 6
AD5 MC34164D-5
10 10 AD3 DATA6
17 O5 A5 5 AD6 VOLTAGE MONITOR
11 11 AD2 DATA7
18 O6 A6 4 AD7 \RESET
12 12 AD1
19 O7 A7 3 AD8
2 IN RSET 1 /RESET 3,16,18
13 13 AD0 +5VDC A8 25
AD9 +5VDC LOW=RESETS
14 14 DATA0 A9 24 AD10 NC 8
15 15 A10 21 AD11 3 7

GND
DATA1 NC NC
16 16 DATA2
28 VCC A11 23
AD12
5 NC NC 6
R80
17 17 A12 2 AD13 C37 4.7K
18 18 DATA3 C108 A13 26 AD14 .1uF 50V SMT C36

4
19 19 DATA4 .1uF 50V SMT A14 1 .1uF 50V SMT
20 20 DATA5
1 OE VDD 8
21 21 DATA6
14 GND WE 27 RW 16,18
22 22 DATA7 CS 20
C30
23 23 D OE 22 PF4_CSD 16
.1uF 50V SMT R158
24 24 AD10 10
25 25 f=16.OO MHZ EXTAL
26 26 AD11
4 GND OUT 5 EXTAL 16
C 27 27 AD9 U25
C
28 28 AD8 D SG-531P-16
29 29 AD13 XTAL
30 30 AD14 +5VDC
31 31 AD17 +5VDC
32 32 AD18
33 33
34 34
35 35
36 36 D C28
R91 +5VDC .1uF 50V SMT
4.7K R71 U19A
PF5_CSP0 16

8
1.5K OP296
R96 3 D
+

2
D 1.5K 1 TS_X_POS 16
1 MMBTA56 2 -
Q8
+5VDC R72
100K R58

4
D17 D16 100K

C
SMBJ5.0CA SMBJ5.0CA D
R105

3
1.5K D
B 1 Q9 B
MMBTA06
D22

A
LL4148

2
D D TOP
4 TS#4
+5VDC R92 D RIGHT
3 TS#3
10K BOTTOM
2 TS#2
D18 LEFT

C
1 TS#1
SMBJ5.0CA D19

C
R106 SMBJ5.0CA J7

3
1.5K HEADER 4
1 Q10 TOUCHSCREEN
13,16 PRE_YDRIVE MMBTA06 R74 U19B

8
HIGH=YDRIVE D23 1.5K OP296

A
LL4148

2
5 +

A
D 7 TS_Y_POS 16
R93 D D 6
13 TS_XDRIVE -
10K R94 +5VDC
LOW=XDRIVE 4.7K R73
100K R59

4
R97 100K

2
1.5K
13 TS_YDRIVE
1 MMBTA56
LOW=YDRIVE Q11 D
A A

3
13,16 PRE_XDRIVE
HIGH=XDRIVE
CANDELA CORPORATION PROPRIETARY
SIZE DRAWING NO. REV.
TITLE SCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 17OF 18
5 4 3 2 1
 5 4 3 2 1

32Kx8 SRAM
V62C518256-35P U26
10 A0 O0 11
9 A1 O1 12
8 A2 O2 13
7 A3 O3 15
6 A4 O4 16
5 A5 O5 17
D D
4 A6 O6 18
3 A7 O7 19
25 A8
24 A9 +5VDC
21 A10
23 A11 VCC 28
2 A12
26 A13
1 A14 C33
.1uF 50V SMT
27 WE GND 14
20 CS
3,16,17 /RESET 22 OE D
16 ECLK

16,17 RW
+5VDC

Y1
10.000 MHZ
D
U29

54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
C C
SED1335FOA

SEL1
SEL2
R/W

VA0
VA1
VA2
VA3
VA4
VA5
VA6
VA7
XG

VRD

VWR
ECLK
NC.
NC..
RES

VCE
C74 C75 55 35
27pF 27pF XD VA8
56 CS VA9 34
57 A0 VA10 33
58 VDD VA11 32
D 59 31
D0 VA12
60 D1 VA13 30
+12VDC
16 PF0_CS0
NC 29
16,17 AD0 1 D2 VA14 28
2 D3 VA15 27
3 D4 VD0 26
+5VDC 4 25 C31 +
D5 VD1 1uF 35V TAN
5 D6 VD2 24
XECL
XSCL

YSCL
YDIS
VSS
XD3
XD2
XD1
XD0

VD7
VD6
VD5
VD4
VD3
WF

YD
D7

LP
+5VDC D
C76
10
11
12
13
14
15
16
17
18
19
20
21
22
23
.1uF 50V SMT
6
7
8
9

F5
D C38 + FUSE 2A SLO TR5 J11
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

B 2.2uF 10V TAN B

1
2
D 3
DATA[0..7] 4
16,17 DATA[0..7] 5
D 6
7
8
9
10
11
12
13
14
15
+5VDC +5VDC C107 16
.1uF 50V SMT 17
18
R190 19
U52A 20
1K
14

74HC05 D STMM HEADER 20

DISPLAY
16 DSPLY_IRQ 2 1
A A
D
7

CANDELA CORPORATION PROPRIETARY

D SIZE DRAWING NO. REV.
TITLE SCHEMATIC
DIODE LASER CPU I/O PCB
B 7111-80-2370 16
DATE: Thursday, March 08, 2001 SHEET 18OF 18
5 4 3 2 1