EE :’~=~— OO‘ Te, fea Erect Transistors a In BIT In FET ao source Base 2 Ge Caltetor 2 Dain $2 CLASSIFICATION OF FETs Ye fet fect transistors are classified as follows rer (Peis te Fass) ——+—_, weer woseer Ncnnet— Pehana Depiaton ype Emrarcomen ver rer hosre™ ee, woSer —— ——, Niches Phan! Neral cn Depiton tre Depcion oe Emancnet Exarcet Troster” sary omen ee weer woter 4.3 COMPARISON BETWEEN BJT AND JFET, —“[UPTU 2005-06) i a rau nn eerie 7 Bipolar Jencton | Transistor (FED Trantor (227) | senile vi i ut te | Drs ecu ine de 8 ‘Wevice W-caried-eREby electrons or | cal by bath comooe sat Pag) Iisa voltage contoled devi Bia ent cote dvs Input resistance is very high and is of the | Input resistance is very low as compared to FFT order of megs ohms ‘and is of the ord of few kilo-ohms It has negative temperature coefficient at | Te has a positive temperature coefficient at high igh current levels current level I is less noisy than BUT and vacuum tbe | More noisy than a FET 46. | Simpler to fabricate as an IC and occupies | Difficult to fabricate as an integrated circuit and 4 less space on IC chip ‘ccupies more space on IC chip as compared to that of FET. 1. | Cost is more Cost is tow |2 CONSTRUCTION AND CHARACTERISTICS OF JFETS e As indicated earlier, the JFET is a three-terminal device with one terminal capable of co trolling the current between the other two. In our discussion of the BJT transistor the /" transistor was employed through the major part of the analysis and design sections. witl # section devoted to the effect of using a pnp transistor. For the JFET transistor the n-channel device will be the prominent device, with paragraphs and sections devoted to the effect of using a p-channel JFET. ° ‘The basic construction of the n-channel JFET is shown in Fig. 6.3. Note that the major ine bales structure is the n-type material, which forms the channel between the embeded Lasers of p-type material. The op ofthe n-type channel iscomnected through an ohmic con secon geminal referred to a the drain (), whereas te lower end of the sine material paoecested through an ohmic contact to a trminal refered to a8 the source (S). The (wo thc dea nes af connected together and to the gate (G) terminal. In essence, therefore, to pera he source ae connected tothe end of the mtype channel and the gate fhe Junctions wrP-¥Pe material. Inthe absence of any applied potential the JFET hastwo 7-4 shown in Fig. 6 } Aes conditions. The result is a depletion region at each junction, a* call alse te ae tat tesembles the same region of a diode under no-bias conditions. Re al also that a depletion region is void of free caters and is therefore unable to support luction, & Source (8) FIG. 6.5 Junction field-effect transistor (JFET).fe Etec Transistor (0) Nechannel FET (hy P-channel FET Fig. 63 842° Symbols of JFET (@) Nehannel FET (6) Ptanoel FET Fe 64 6.5 WORKING PRINCIPLE OF JFET a ‘The working principle of JFET is explained Wythe following thee conitions 1. No bias condition 2. Ves = 0. Vps>0 3. Vos <0, Vog> 0 1. No bias condition In the absence of any applied potent the JFET has two PN junctions under nobis coniton. The result is a depletion region a each junction as shown in Fig. 6.5) tat resembles the same region of & diode under no bias condition. Recall also that a depletion region is that region which vod of fe carriers and therefore unable to support conduction through the region,Electonics Enginee a24 4 J orain nea ‘ey 6 Vos " fl | depletion region oe “TI abet (0) No bias condition (Voy = 0 and Vs 0 Fie. 68 2. Ves = OV and Vng > OV Wien & voltage His applied between dain and source terminals and voltage onthe gate is zero a» shaven in Fig, 65(b, The two pn junction at the sides ofthe bar establish depletion layers. The electrons will flow from source to drain through a channel between the depletion layers. The size ofthese layers determines the width ofthe channel and hence the current conduction through the bar. The instant voltage Vis applied. the electrons will be drawn by the drain terminal, establishing the conventional current /p with defined direction of Fig. 6.500). y ‘When a reverse voltage V5 is applied between the gate Consequently, the curent from source to dain is ag 66 Creu option Vag | decreased. On the other hand, if the reverse voltage on and Vpp> 0 | the gate is decreased, the width ofthe depletion layers aslo deceases. This increases the width of the conducting channel and hence source to drain current. 6.6 CHARACJERISTICS OFMFET fticsElectronics Engineering Breakdown . Voss) Fig. 6.10 Fc Since Ipss is measured under shorted gate conditions, itis the maximum drain current that you can get under normal operation of JFET. 6.8 PINCH OFF VOLTAGE (V,) It is the minimum drain-source voltage at which the drain current essentially becomes constant Fig. 6.11 shows the drain curves of a JFET. Note that pinch off voltage is Vp. The highest curve Ves = OV , the shorted gate condition. For values of Vins greater than Vp, the drain current is almos! consiant, It is because when Vs equals Vp the channel in effectively closed (Fig. 6.10) and does not allow further increase in drain current. It may be noted that for proper function of IFET, itis always operated for Vps> Vp. However, Vps should not exceed Vps max) otherwise IFET may breakdown 6.9 P-CHANNEL JFET ‘The P- channel JFET is constricted in exactly the same manner as the - channel device as shown in Fig. 6.2(6). ‘The defined current directions are reversed as are the actual polarities for oltages Vag and Vg. Te drain curent ows due 10 the majority carries i holes. The drain current increases with increase in the negative Vps voltage as shown in Fig. 6.12. The gate to source voltage Vas is positive and the drain current decreases veth increase inthe postive Vs volage due to reduction in channel with Fig. 12 Pshannel JFET operonCHAPTER - Metal Oxide Semiconductor Field Effect Transistor (MOSFET) 7.4 MOSFET Mia! Oxide Semiconductor Field Effect Transisor (MOSFET) isan important semiconductor device and is widely used in many citcuit applications The main advantage of MOSFEF over JFET ts that the ‘ input impedance of a MOSFET is much more than that of {UrTEnL Since the gate of MOSFET is insulated from the channel, its also termed as Invested Gc Field Effect Transistor (IGFET). MOSFETs ae further classified into depletion type {ype based on their basic mode of operation, DEPLETION TYPE MOSFET [UPTU 2005-06 1 Construction of Depletion MOSFET © The basic structure of an N-channel depletiontype MOSFET is shown in Fig. 7.1. A slab of P-4ype material is formed from a silicon base as the substrate. In some cases the subsene n internally connected to the source terminal. However many discrete devices provide an additin,) terminal labelled 55, resulting in a four terminal device. The source and drain terminals me connected through an N-channel as shown in Fig. 7.1. The gate is also connected to » meal contact surface but remains insulated from the A-channel by a very thin silicon dioxide (Si0,) layer. There is no elecirical connection between the gate terminal and the channel of MOS Due to the presence of the SiO layer between gate terminal and Al-type channel, the inp impedance of MOSFET is very high For N-channel depletion type MOSFET there willbe an N-type silicon region (channel connecting the source and drain at the top of the P-type substrate as shown in Fig. 7.1(a). Similarly for P- channel depletion type MOSFET there will be a P-type region channel connecting the source and the drain at the top of the N-type substrate as shown in Fig. 7.1(b).a MOSFET eerste 7.2.2 Operation of N-channel Depletion MOSFET 4s the gate to source vol "7.2. This results i" This establist The ditect connection from gate terminal to source termi and a voltage Fis applied across the drain to source terminals as shown i Fig, free electrons from the channel are attracted towards positive potential of drain termi ‘current flow through the channel to be denoted as Ings at Vos * 0 Y The depletion MOSFET can be operated in two different modes as given below 1. Depletion mode fe voltage is negative , ‘The device operates in this mode, when the gat 2 Enhancement mode The device operates in this mode, when the gate voltage #8 Poste. Vos * OV 8 a ° ‘ rf < s P subsite [eel “lik Yeo Fig. 7.2 N-channel depletion MOSFET operation when Vs = 0 V. 1. Depletion mode of operation Fig, 7.3(a) shows a MOSFET with a negative gate to source voltage. The negative potential atthe yale wil tend to pressure or repel electrons towards the P-type substrate and attracts the holes from the type substrate as shown in Fig. 7.3(8). Depending on the magnitude ofthe negative bias established y Vor level of recombination between repelled electrons and attracted holes will occur that will edie the number of free electrons in the N-channel for conduction. The resulting drain current is reduced by increasing the negative gate voltage.a tal Oxide Semiconductor Field Etfect Transistor (MOSFET) 375, SSS, 2. Enhancement mode of operation ’ Tye le aN \ 7 ie’ OPE a: ‘Holes z 2 — i it 1 _ potential at gate : (a) (6) Fig. 7.3 Depletion mode of operation. a ae ee pe eee oe as ea nee onecae Figure 7.4 shows the enhancement MOSFET with a positive gate to source voltage. For positive values Of Vs the positive gate will draw additional electrons from the P-type substrate due to the reverse leakage = Yoo Fig. 74 Enhancement mode of operationid Electonics Engineer Iso represented as Bulk (B) Fig. 7.7 Symbol for depletion en 7.3 ENHANCEMENT TYPE, war [UPTU 2006-07) ‘The other type of MOSFET is enhancement MOSFET. Itcan alsobe classified into N-channel and P-chanw! 7.3.1 Construction of N-channel EMOSFET (NMOS) The basic construction of enha- ete (6) rneement MOSFET (EMOSFET) is shown in Fig. 7.8. A P-type Smce S) Drain (0) ‘material is used as substrate of this device. No channel is connected between source and drain. This is the primary difference between DMOSFET and EMOSFET. The A 810, SiO, layers present to isolate the ‘ife metallic platform from the Sea vere ualig on. a source, but now it is simply roe separated from a section of Pype material. Enhancement type MOSFET is quite similar to that of the depletion type MOSFET, Substrate" chennel except for the absence of a 38 channel between the drain and Fig: 73 Chmescton of EMOSFET source terminals.1 Ode Semiconductor Fel Elect Tansor (MOSFET) aia 42. Operation of N-channel Enhancement MOSFET «operation of enhancement type MOSFET can be explained with two different operating conditions 1. Vos=0 1. Ves > 0 Operation with Veg = 0V the gate source voltage Vs is set at 0 Vand a positive voltage Vs applied between the drain and ve of the device as shown in Fig. 7.9.7 9. The absence of a channel will result in current of effectively amperes. This is totally different from depletion type MOSFET and JFET where [p= pss. W i to source voltage is zero, the Vps supply tries to force free elecirons from source to drain. But the nce of P region (absence of channel) does not permit the electrons to pass through it. Thus there te gga current for.Yos = 0. Due to this fact the enhancement typ: MOSFET is also called normally i MOSFET. ——, i 3 nnn n° Fig. 7.9 Operation of EMOSFET when Fg 0 1 Operation with Vgg>0 Set the gate source voltage Vos greater than 0 V and Vpsis also connected as shown in Fig. 7.10. The pontte voltage at the gate will pressure the holes inthe substrate along the edge ofthe SiO, layer to ve ‘he area and from a depletion region. However, the electtonsin the P-iype substrate (the miveritycarriers of the channel) will be attracted to the positive gate and accumulate in the Yegion near the surface of the SiOz layer. The SiO, layer and its insulating material will prevent the negative carries from being absorbed atthe gate terminal. As Vs inreases, the concentration of electrons near the SiO. surface increases until eventually induced N-type region can support a current flow between drain and ‘The level of Vos that results in the significant increase in drain curtent is called threshold voltage and is represented by the symbol Vp. As Vgsis increased beyond the threshold level, the density offre ¢lectrons in the induced channel will increase, resulting in an increased level to drain current. Etecrons atracted to posive gate induced ns ehannet) Holes are repeiied by postive gat Depeton region ss Vos Fig. 7.1 Operation of EMOSFET when Vas> 0 Figure 7.11 shows the effect of increasing Vps with constant Vs. The gate source voltage Vig is key constant and drain to source voltage Vpsis increased gradually Due to this, the pate terminal Secon _less positive as compared to din, So less numberof eecttns are attracted towards the gate azowcl and the “induced chinnel” becomes narrow as shown in Fg. 7.16. Eventually the channel will be ‘Feduced to the point of pinch OFF and saturation will be shed. In other words, any further i “in Pps at the Axed Value of Vs will not affect the sat encountered. level of Jp until breakdown conditions ie400) Toston Yr where Zopon) and Vision are the Values for each point (afte: 7) on the characteristics of the dk Ves) Fig. 7.12 Characteristics of NMOS. \ 7.3.4 P-Channel Enhancement MOSFET (moss 7.3.4.1 Construction Figure 7.13 shows the constniction of P-channel enhancement type MOSFET. Its consti exactly reverse of the N-channel enhancement type MOSFET. In this construction, N-type and P-doped regions under the drain and source terminals. The terminals remain the same, bul voltage polarities and the current directions are reversed. 7.3.4.2 Characteristics ‘The drain characteristics are shown in Fig. 7.14(8). It can be noted that the drain current increw increase in the negative gate to source voltages (Vg). The transfer characteristics is shown in Fig, | It can be further noted that it is exactly a mirror image of the transfer characteristics of an N. enhancement MOSFET. The drain current remains zero upto the voltage Vs < Vip and inch negative Vgs becomes than Vy as shown in Fig. 7.14(b).; Hl Oxide Semiconductor Fy tuctor Field Effect Transistor (MOSFET) 1O5Fe 383 Source (8) Drain (0) P 'si0, doped region Substrate ss ; Fig. 7.413 Construction of p-channel DMOSFET Drain characterises @ o Fig. 7-14 Construction of p-channel EMOSFET 7.3.5 Symbols for enhancement MOSFET Figure 7.15 shows the symbols for N-channel and P-channel enhancement type MOSFET. In the symbol, the dashed line between drain and source is chosen to reflect the fact that a channel does not ‘exist between the two under no bias condition. It isthe only difference between the symbols forthe ‘depletion type and enhancement type MOSFETs.= Electronics Engineer Nechannel P-channel ry os = s is a bo s e i} e 0 a e KS 8 jaa e by s $s Fig. 7.15 Symbols for MOSFET 7.4 COMPARISON OF VARIOUS FETs 7.41 Comparison between JFET and MOSFET \s.ne JPET MOSFET 1.| itis classified as Its castifed into two types (@ Pechansel (a) Depletion type MOSFET (®) N-channel JFET (6) Eahancement type MOSFET Z| Symbols of JFETS are Symbols of MOSFETs are —— 6) < N-Channel P-Channel O© Nechanne Channel P-Channel It does not have an insulated gate MOSFETs have an insulated gate. Tnput impedance is lower than MOSFETs rain resistance is lower than MOSFETs Input impedances higher than JFETs. Drain resistance higher than JFETS.142 Comparison between DMOSFETs and EMOSFETs DMOSFER. Channel between source and drain is present Drain current becomes zero when Vig ~0 Drain current becomes zer0 when Vos All these vaiues are show in FyB Ex. Ips 10mA 25mA To(ma) 0