CHAPTER Bipolar Junction Transistor 4.1 INTRODUCTION ‘A Bipolar Junction Transistor (BJT) isa three terminal device whose operation is dependent on jnteraction ofboth majority and minority carriers hence itis bipolar device. Transistor means rant resistor fe. signal are transfered from low resistance (input 0 igh resistance (output) circu. 1 BIT is analogous toa vacuum tube (triode) and its comparatively smaller in size and consumes power, has lese weight, as longer life, It is used in amplifiers oscillator circuits and digital circuits 4.2 BASIC CONSTRUCTION OF A TRANSISTOR [UPTU 2006-0 Definition ‘A transistor consists of two PN junctions formed by sandwiching either P type or N type semiconductor between a pair of opposite tyes. Transistor types ‘A transistor can be classified in two types based on its construction 1. NPN Transistor 2. PNP Transistor ‘A transistor in which two layers of N type semiconductor are separated by a thin layer of P sf semiconductor is known as NPN transistor, itis shown in Fig, 4.1(a). ‘A transistor in which two layers of P type semiconductor are separated by thin layer of semiconductor is known as PNP transistor, it is shown in Fig, 4.1(8). eaeeee peel deer tba pb Bt I I Fig. 4.1Bipolar Junction Transistor A transistor (NPN or HNP) has three regions Collector. 1, Emitter. The region electrons or in case of. biased with respect to base 0 thi shows the biasing condition of a transist .. Base. The middle section of transistor is base-emitter junction is forw: collector junction is reverse Collector. The other side that ¢« reverse biased. The doping level doping of base. The collector region is pI Ccobector base ncn of a transistor that ‘PNP transistor bol at it c collects the 1 of coll miter base Tunetion. ard biased, allowin: biased and offers high resist ¥ s of doped semiconductors, namely Emitter, = ier, Base m= a cnrg castes (in <8 0f NPN tans sc cmite ves reek nj carn Pap 0 1 suppli alled the € ly large number of led base, itis very thin and lightly doped region, The Wr low resistance forthe emitter eiruit. The base. cance in the collector cireuit. 4 the collector. The collector is always ‘the heavy doping of emitter and light -mitter region. les) is €: -an suppl cal 1¢ charges is calles lector is between wnysically longer than the Emvter base Tuncton ‘cobector base ep fw Forwardbies | Reverse bas Forward tyr “iti = - (@) (6) Fig. 4.2 Transistor biasing. : Wote: Heaviest doping region = Emitter e - Largest region Collector + Smallest region, jo... Base 4 i 4,3. TRANSISTOR SYMBOLS Fig. 4.3 shows the symbols of transistors. ATTOW is always placed on the emitter terminal and direction of arrow indicates the ‘direction of conventional ‘current flow. For example in NPN transistor, the arrow points from the P region towards the onal gion. Therefore, in an NPN transistor the conventional gurrent will flow from base to emiter c ¢ . . . oie: at € e (b) PNP transistor (@) NPN transistor Fig. 43S: symbols of Transistors.Electronics Engineering 478 ‘OR 4.4 UNBIASED TRANSIST' is connected to a transistor, the transistor is in unbiased condition. Fig, 44 jon of transistor when the transistor is unbiased. In this case, the « two depletion regions. The width of depletion When no external supply shows the depletion region format ct roduces diffusion of charge carriers across the junction pr fegion i not same on both sides of junction because of different doping levels of the transistor The depletion region penetrates more in lightly doped regions. Therefore penetration of depletion region 8 Teas in the heavily doped collector and emitter regions and more in the base region. EB junction eg base width CB junction © 4.5 TRANSISTOR ACTION ~ [UPTU 2002-03] The method of applying extemal voltages to a transistor is called transistor biasing. The transistor ‘operates in three different regions based on the biasing of transistor. Table 4.1 shows the different regions of operation with their corresponding biasing. Table 4.1 Cases Emitter-base collector-base Region of Junction Junction ‘operation 1 FR Forward-biased Reverse-biased Active 2. FF Forward-biased Forwaril biased Saturation 3 RR Reverse biased Reverse biased Cutoff 4. RF Reverse Forward Inverted 1. Active region. In this case the emitter base junction is forward biased and collector base junction is reverse biased. In this region the transistor is used for amplification. The collector current is dependent upon the base current. 2. Saturation region. In this case, both junctions are forward biased. In this region of operation, the collector current becomes independent of the base current. Now the transistor acts like a closed switch.nering Bipolar Junction Transistor jased. In this region, the transistor 3. Cut off region. In this case, both junctions are reverse biased md aan eaceserccause the emitter does not emit charge carters into Pass and no cage caries are wollected by the collector except a few thermally generated carriers, NOW We transistor acts like a open switch. 4.6 OPERATION OF NPN TRANSISTOR ~~ ‘The base emitter junction is forward biased by the de source Vig. Thus, the Cotas region at this junction is reduced, The collector to base junction is reverse biased, hence the depletion region at collector to base junction is as shown in Fig. 4.5(a). Vee Fig. 4.5 (a) NPN transistor biased 0 operate in active region. Operation: The operation for an NPN transistor is as follows. "4. The forward biased EB junction causes the electrons which are the majority carriers in ‘the N- type emitter to start flowing towards the P-type base as shown in Fig. 4.5(6). This constitutes the emitter current Jp. As these electrons flow through the P-type base, they tend to combine with holes in P-region (base) r Fig. 4.5 (b) Electrons flow across emitter-base junction.Electronics Engineering 180 at, the base region is very thin and lightly doped. As the base region is very thin it means that the number of holes present in the base region is few. Hence the injected electrons into the emitter only a very few electrons recombine with the holes in the base region. This Constitutes the base current /p. The base current is very small as compared to the emitter current. (Refer Fig. 4.5 (0) 2. We know th ! Fig. 4.5 (c) Electron flow inthe NPN transistor. 3. The remaining large number of electrons cross the base region and move through the collector region to the positive terminal of the internal de source as shown in Fig. 4.5(c). This constitutes the collector current J. However, the emitter current is the sum of collector current and base current. Emitter current, Ip = Ip + Je 4.7 OPERATION OF PNP TsseTON AE ‘The base emitter junction is forward biased by thd so reverse biased by the de source Vcc. Hence the width of the small, but the C-B junction is large as shown in Fig. 4.6(a). ¢ and the collector base junction is letion region for E-B junction is very Fig. 4.6 (a) Internal effect of forward biased £-B junction and reverse biased C-B junction.mn: The operation for an PNP transistor is as follows. uses the holes (majority carriers) in the P-type emp 1e forward biased £-B junction causes the holes (majority ite flow oo the base. This constitutes the emitter current /,, (Refer Fig 4.6(b)), 6 Opera 1 D Fig. 4.6 (8) Holes flow across £-B junction, 2. As these holes flow through the N-type base, they tend to combine with electrons in N-region (base), As the base is very thin and lightly doped, very few of the holes injected into the base from the emitter recombine with electrons to constitute base current Ip as shown in fig. 4.6(c). Fig. 4.6(c) Hole flow in PNP transistor, 4 The remaining large number of holes cross the depletion Tegion and move through the collector cealonrce the negative terminal ofthe external dc source, as shown in Fig, 4.6(c), This constitutes Collector current Jc. Thus the hole flow constitutes the dominant current inn PNP transistor. 4 TRANSISTOR CONFIGURATION A tansistor has three terminals : namely, emitter, base and collector, We Tequire four terminals when f Ittnsistor is to be connected in a circuit; two for the input and two for the output. This is achieved W making one terminal of the transistor common to both input and output terminals. The input is fed W this common terminal and any one of the other two terminals. The output is obtained between the (Mammon terminal and the remaining terminal. Transistor is configured based on the common terial, }488 - ae current ge Electronics Engineering me er (0) NPN twansistor (b) PNP transistor Fig, 4.10 Common base configuration «He current gain (@). Current gain is defined as the ratio of output current to input curent. In a common base configuration the input current isthe emitter curent Jp and output current is the collector current Ic, The de current gain of CB configuration is denoted by oor yo hr co output current current gain = “Input current Ie a-7, (4.1a) 1. The ac current gain may be defined as the ratio of change.in collector current (Alc) to the change in emitter current (AZ) for constant collector to base voltage (Vc). Its, represented by Op OF Gy OF hg itt 2K Me 7 1¢ current gait Og = t a sin og = ‘gy, at constant Vcp ‘The value of cy is also less than unity. oy is approximately same as c. Practical values of ain commercial transistors range from 0.9 to 0.99. ression for leakage current, When the emitter terminal of transistor is opened as shown in OP ; Fig. 4.11, there is no emitter current which means ——° that there is no base current and collector current. But the collector-base junction is reverse biased, the minority carriers diffuse across the collector base junction and this minority carrier produce a small ae current called as leakage current and denoted by ‘ete minony earns Toso & Ico Fig. 4a ‘Therefore the total collector current consists of 1. The injected current due to majority carriers (when the emitter is not opened). 2. The leakage current ogo oF Ico produced by thermally generated minority carriers Total collector current Ic = Icaujociyy * Tewo¢ninosin)polar Junction Transistor From equation (4.14) Teqaajoriy) = (4.2) We know that Tem alle + Is) + Iewo Id ~ 0) = ly + Leno a I pipes pple Ic Er (4.3) Example 4.1 In a common base configuration Jp = 1 mA, [= 0.9 mA. Calculate the value of current gain and base current. Solution: Current gain ‘The emitter current Ig=lg tle ‘The base current Ip=le-Ic Ig=1-0.9 = 0.1 mA Example 4.2 In a common base configuration, current gain is 0.97. If the emitter current is 1 mA, determine the value of base current. Solution: 1 mA euentgin ; = 0.97 x 1 = 0.97 mA Base current Ip~ Io = 1 — 0.97 = 0.03 mA 4. OMMON EMITTER CONFIGURATION [UPTU 2001-02, 2007-08] base and emitter and output is taken from is made common to both the input and common emitter configuration of NPN transistor and guration of PNP transistor. | Aine common emitter configuration, inputs applied between the collector and emiter. In this case, the emitter of transistor i output circuits. Fig. 4.12(a) shows th Fig. 4.12(b) shows the common emitter confi ” lec configuration is the ratio of collector WE current gain (B). The de current gain of common emitter ¢ current I to base current Ip. It is denoted by B ot Ba OF hrs: wl. 4) t, so the value of B may vary from The collector current is much higher than the base current 20 to 500.186 Electronics Engineering le a \ I Ves Veco Vee Vee (@) NPN transistor (8) PNP transistor J Fig. 4.12 2, A€ current gain. The ac current gain of common emitter configuration is defined as the ratio of change in collector current A/c to the change in base current Al keeping collector to emitter voltage Veg constant. It is denoted by By. Bac OF hye pant const Relation between a and B * [uPTu 2001-02] We know the emitter curr sistor Ne re . Ip= Ip + Ic Dividing the above equation by Jc on both sides ley Tc Ie I © But ante a (4.5) From the above equationtnpolar Junction Transistor 46) Equations (4.5) and (4.6) give the relation between ct and Kapression for leakage current (cg) , ier 2003-04) In common emitter configuration, /p is the input current and Jc is the output current (from equations 41 and 4.2) we know that [pnp + Ie ond Ic= Og + Ico From the above equation Te= (lp + 1c) + Ieno I= alg + Ole + Icg0 I¢- Wp = lg +1 e890 Ic(-a) = Og +Iczo (4.7) From equation (4.7), J = 0 as shown in Fig. 4.13, (when base is open, leakage current will flow from collector to emitter), the collector current will be the flow from collectgr to the emitter. This is abbreviated as Zcgo, meaning collector emitter current with base open (Jc is replaced by Icgo) (4.8) 24.9) Fig. 4.13188 Electronics Engineering Example 4.3 Find the value of B if (#) « = 0.90 and (ii) « = 0.99 Solution: 0.90 ( B= 0.90> a 0.99 =99 ©) B= a i-098 Example 4.4 Find the o. rating of the transistor shown in Fig. Ex. 4.4 Hence determine the value of /c using both ct and B rating of transistor. ke . B__ 50 7 Solution: “ip 150" 98 Ig = 200uA, p=50 Collector current Jc is found by using either ot or B. Ic= Og =0.98x10=9.8 mA. Ic= Bly =50x0.2=10mA le=t0 mA 7 4.412 COMMON COLLECTOR CONFIGURATION Inthis configuration, the input is applied between base and c6fector while Fig, Ex. 44 ‘output is taken between the emitter and collector. In this case, the collector of transistor is made common to both input and output circuits, Fig. 4.14 shows the common collector configuration for NPN and PNP transistors. This configuration is also known as emitter follower configuration. The output of emitter follows the input signal. 1. de current gain (y). The de current gain of common collector configuration is defined as 1 ratio of emitter current J; to the base current Jp. It is denoted by y oF Yu cE ee (4.10) Ries : R ouput Ip Voc Input signal 'e I k Ves (a) NPN transistor (6) PNP transistor Fig. 4.14telat Junction Transistor 2. ac current gain. The ac current gain Emitter current (Alf) to the change in bi lector is defined as the ratio of change jy (Alp). It is denoted by Yo OF Yor jain of common coll jase current Molation between y and a From equation (4.10) From equation (4.14) ‘We know that 24.11) Uxpression for collector current From Equation (4.2) Tem alg + Ics0 ‘We know that Ig= Ip tI Substituting Zz in the above equation Tc = Olg.+ Ic) + Iex0 Ic = Oly + Iego + ale Ic (1 = 0) = alg + Icgo (4.13) From equation (4.13), the collector current is controlled by either emitter or base current.Electronics Engineering 190 4.43. V-l CHARACTERISTICS OF A TRANSISTOR ‘The behaviour of a transistor is observed with the help of its V-I characteristics. There are two types of characteristics. 1. Input characteristics 2. Output characteristics : 1. Input characteristics. Input characteristics of a transistor gives the relationship between input current and input voltage for a constant output voltage. 2. Output characteristics. Output characteristics ofa transistor gives the relationship between output current and output voltage for constant input current. 4.13.1 V-l Characteristics in CB -e “ [UPTU 2005-06] Fig. 4.15 shows the experimental setup for input and otffput characteristics. In this circuit NPN transistor is used R, vile lee Fig. 4.15 Circuit arrangement for input and output characteristics. Input Characteristics ‘The input characteristic is a curve plotted between emitter current J and emitter base voltage Veg at constant collector base voltage Veg. The emitter current /g is taken along y-axis and emitter base voltage Veg along x-axis. Keeping Vg constant (Vc = 2 V), note down emitter currert J for various values of Vz. Then plot the readings to obtain the input characteristics asshown in Fig. 4.16. This gives input characteristic at Vcg'= 2. V. Follow the same procedure for different values of Vg and plot the graph to obtain family of input characteristics. The input characteristics are also called as driving point characteristics. lela) Fig. 4.16 Input characteristics for a common base configuration,% polar Junction Transistor 4 Observations i ; 1. Emitter current is very small (negligible), when the emitter base voltage Vig 1s below to the knee voltage. 2. After knee voltage, the emitter current /g increases rapidly with s voltage, : small increase in emitter base Input resistance Its the ratio of change in emitter-base voltage (AV gg) to the resulting change in emitter current (A/,) M constant collector-base voltage (Vcg). Ven t resistance 7, = i at constant. V Input resi "A ‘cB As small Veg is enough to produce a large flow of emitter current J. Therefore the input resistance Is very small Output Characteristics [UPTU 2002-03, 2005-06] IUis the curve plotted between collector current Jz and collector base voltage Veg at constant emitter current. Generally collector current Zc is taken along y-axis and collector-base voltage along x-axis, Keeping emitter current /; fixed at some value say 3 mA, note the collector current /¢ for various Values of collector base voltage Veg. Then plot the readings to obtain the gutput characteristics as shown in Fig. 4.17. “Observations 1. The collector current Jc varies with Vop only at very low voltage (Vg < 0). The transistor is never operated in this region. 2. Collector current /c is almost constant when the voltage is increased beyond the cut in voltage. It means that now Ic is independent of Ve and depends upon Ip. Output Resistance Itis the ratio of change in collector base voltage (AVcg) to change in collector current (A/c) at constant emitter current Jp. “ Neg Output resistance ry = “yp at constant Ip The output resistance of CB circuit is very high of the order of several tens of kilo-ohms.192 3 ole cat of eon Fig. 4.17 Output characteristics of CB configuration. 4.13.2. V-l Characteristics of CE Configuration For any transistor configuration, the transistor has two Characteristics namely input characteristics end output characteristics. Fig. 4.18 shows the circuit arrangement for input and output characteristics of CE configuration. Fig. 4.18 Circuit arrangement for input and output characteristics of CE configuration Input Characteristics Itis the curve between base current and base emitter voltage Vag at constant collector-emitter voltage Vor. Keeping Vegas constant, note down current [fr various values of Vg, Then plot the readings to obtain input characteristics shown in Fig. 4.19. SS : ‘ ~ As compared to CB configuration, J increases less rapidly with increase of Vgg. Therefore input % -of a.CE configuration i higher than that of CB 5 : PO Eda DEEigotae Junction Transistor Vogl volts) Fig. 4.19 Input characteristic of CE configuration. Input resistance It Is the ratio of change in base emitter voltage (AVgg) to the change in base current (A/g) at constant Vee Input resistance r, ae a cosa Ye. The value of input resistance for a CE circuit is of the order of a few hundred ohms. Output Characteristics [UPTU 2001-02, 2005-06] Is the curve plotted between collector current J- and collector emitter voltage Vc at constant base current Jy. Keeping base current [y fixed at some value, note the collector current [ for various values Of Vcz. Plot the reading on a graph to obtain output characteristics as shown in Fig. 4.20. Je{ma)196 Electronics Engineering pe TRANSISTOR AS AN AMPLIFIER Defi Amplifier is an electronic circuit constructed by using transistors to incre: ase the magnitude of given weak signal PN transistor amplifier circuit. de voltage Vgg 18 connected 1 voltage. The de voltage is known as bias voltage and 1s Figure 4.21 shows the common emitter N ¢ junction in forward bias. The de supply Hi in the input circuit in addition to the signal magnitude is such that it always keeps the emitter bas keeps the collector base junction in reverse bias. jg, Output strengthen Input weak ig signal ‘signal is 5 i - Re Zoutout ¥ fc tT Vee Yo 421 CE amplifier Operation of an Amplifier the forward bias across the emitter base junction During the positive half cycle of the weak input signal, is increased. Therefore more electrons flow from the emitter to the collector through the base region This causes an increase in collector current, This increased collector current produces higher volta .gthened output signal. Durity drop across the load resistor Re, now we get the positive half eycle of stren negative half eycle ofthe input signal, forward bias across emiter-bias junction is decreased. There allector current decreases. Due to this decreased collector current, the output voltage is also decreased The amplified output is obtained across the load resistor Re Analysis of circuit When no signal is applied, the input circuit is forward biased by the battery Vga. Therefore, a de collect flows in the collector circuit. This is called zero signal collector current. When the signt current Ic the emitter base junction increases or decreases depending up. voltage is applied, the forward bias on t whether the signal is positive or negative. /. TRANSISTOR BIASING Definition Transistor biasing is defined as the proper flow of zero signal collector current and the maintenance of proper collector emitter voltage during the passage of a signal.‘Ne 197 polar Junction Transistor . region. In order to operate Transistors ean operate in three regions namely cut off, active and saturation aa rity and magnitude the transistor in the desired region we have to apply external de voltages of comree! {o the two junctions of the transistor. Table 4.4 shows the region of operation: Table 4.4 Region of operations Region of operation | Emitter-base junction Collector-base junction Cut off Reverse-biased Reverse-biased Active Forward-biased Reverse-biased Saturation Forward biased Forward biased —_| The basic purpose of transistor biasing is to keep the base-emitter junction properly forward biased tnd collector-base junction revétse biased during the application of signal Need for biasing 1, For proper zero signal collector current 2. For proper base-emitter voltage at any instant 3. For proper collector-emitter voltage at any instant 4. {UPTU 2006-07] Operating point Q, should not affected due to temperature changs or device variation. 447-BC LOAD LINE~ In transistor circuit analysis, it is generally required to determine the collector current for various collector emitter voltages. One of the methods which can be used is by plotting the output characteristics and then determining the collector current at any desired collector-emitter voltage. Consider a CE NPN transistor circuit as shown in Fig, 4.22(a) where no signal is applied. Therefore de conditions exits, emitter-base junction is forward biased and collector base junction is reverse biased. The output characteristics of this circuit is shown in Fig. 4.22(b). Re dc load line Tp = 15 pA Tg=10pA Ip=5pA Vce (volts) e Vee (a) CE amplifier (6) Output characteristics Fig. 4.22> 198 Electronics Engineering Apply KVL to the collector circuit ‘co or Vee (4.14) In equation (4.14) Vcc and Re are fixed values, therefore it isa first degree equation and can be represented by a straight line onthe output characteristics as shown in Fig. 4.23. This straight Line is known as de load line. To draw de load line (i) When the collector current /~ = 0, then the collector emitter voltage is maximum Vee = Veo IcRe Vee = Vee G:Ic=9 This gives the point B on the x-axis (ii) When collector-emitter voltage Veg = 0, the maximum collector current Vee = Veo teRe 0= Veo ~ IeRe Voc lo Re This gives point A on the collector current axis as shown in Fig. 4.2(b). By joining points 4 and B we obtain de load line. 197 OPERATING POINT” Definition The zero signal values of Jc and Veg are known as opetating point. (rn. point obtained on the de load line by the values Jc and Vc when no signal is applied at the input is known as operating point. This point is also called quiescent (stable) point or simply Q-point since it is a point on output characteristics curve when the transistor is in a silent condition. Ifwe assume, Voc= 15 V, Ro= 5 kQ and base current Jy = 10 WA. Now, if we draw the characteristic curve for this value of Jy; then intersection of this curve and dc ioad line is the operating point. It is shown in Fig. 4.23(a). For different values of Jp, we have different intersection points such as P, () and R. All these points are quiescent points Fig. 4.23(b).Gpolar Junction Transistor te (ma) Vee (volts) Fig. 4.23 4. 184-Cut off and Saturation Points Figure 4.24 shows the output characteristics along with de load line ‘Saturation point Vejen cetsat 2 Vectra, Pe Fig. 4.24 1, Cut off point. A point where the load line intersects the Jy = 0 curve is known as cut off point At this point Jp = 0, the leakage current flows from collector to emitter Icg9. At the cut off point, the base emitter junction no longer remains forward biased and normal transistor action is lost. The operating point is never fixed at this cut off region. 2, Saturation point. A point where the load line intersects Ip and is equal to Jy is called saturation point. At this point, the base current is maximum and so is the collector current. At saturation collector base junction no longer remains reverse biased and normal transistor action is lost. 3. Active region. The region between cut off and saturation is known as active region. In the active region, collector base junction remains reverse biased while base emitter junction remains forward biased. Consequently the transistor will function normally in this region,