IMPORTANT BITS

1.The situation charging capacitor being not charged from rail to rail voltages is called ( A )
(A). Reduced Voltage Swing (B). Breakdown (C). Delay (D). None
2.The current drawn from the supply voltage in the form of charging capacitor is ( A )
(A). i = C(dVo/dt) (B). i = (dVo/dt) (C). i = (dVo/Cdt) (D).None
3.With respect to truth table of a Nand logic gate the probability of getting output as ZERO is ( C )
(A). ¾ (B). 1/1 (C). ¼ (D). none
4. The dissipation power due to undesirable transitions in the signal paths is called ( A )
(A). Glitching power (B). Switching power (C). Short cicuit power (D). none
5.When two or more few fixed discrete voltages are applied to different block/subsystems called ( A )
(A). MultiVoltage scaling (B). StaticVoltage Scaling (C). Adaptive Scaling (D). None
6.Threshold voltage increase due to well to source reverse bias and widening of depletion region ( A )
(A). Body effect (B). Break down (C). Saturation effect (D). None
7.A closed loop control system monitoring the load and adjusting supply voltage is called (A )
(A). Adaptive scaling (B). MultiVoltagescaling (C). StaticVoltage Scaling (D). None
8.In MOS cricuits the power drawn from a power supply line is given by ( D)
2 2
(A).CL(Vdd ) /2 (B). CL(Vdd ) *2 (C). CL*Vdd/4 (D). None
9.The approach of complex hardware being replaced with software is called_______ (B )
(A). BusEncoding (B).TransmetaCrusoProcessor(C).Pipelining (D). none
10. In non-redundant coding n bit of code is mapped into another m-bit code ( B )
(A).m>n (B). m=n (C). m<n (D). none
11. In MOS cricuits out of the power drawn from a power supply the energy stored in capacitor is ( A)
(A). CL(Vdd )2/2 (B). CL(Vdd )2 (C). CL(Vdd )2 (D). none
12.Gray coding sequence will have its adjacent code words with a difference of ( A )
(A). 1Bit (B).2Bits (C).0Bits (D). None
13.One-Hot encoding is done by mapping of m unique bits to n unique bits where ( A )
(A). m>n (B). m=n (C). m<n (D). None
14.Reducing power dissipation by curtailing clock to part of circuitry without operating is (A )
(A).ClockGating (B).ClockSkew (C). ClockLatency (D). None
15.Level of Clock Gating by Shutting clock to entire block of a circuit is called (A )
(A).Module Level (B).Register Level (C).Cell-Level (D).None
16.Bus inversion & To coding are __________type of coding (A )
(A).Both Redundant (B). Both Non Redundant (C). Only one Redundant (D). None
17.shutting off inputs to logic blocks and not allowing operation to reduce dissipation is (A )
(A).Operand isolation (B).Operand Mismatch (C).Operand Reduction (D). None
18.Turning of series transistors and reducing leakage current is called (A )
(A).Transistor Stacking (B).Transistor sizing (C).reducing channel (D). None
19.With respect to Battery aware Systems Memory Effect is also called as ( A )
(A).Battery effect (B). Lazy Battery effect (C). Battery Memory (D).All of the given
20.Circuits developed to reduce heat dissipation in the form of heat into the environment is called ( A )
(A). Adiabatic Circuits (B). Dynamic circuit (C). Static Circuits (D). None
21. The VLSI technology uses __________to form integrated circuit ( )
(A). Transistors (B).Switches (C). Diodes (D).Buffers
22. The highest amount of power consumed at any time of operation of a circuit________ ( )
(A). Peak Power (B). Average Power (C). Dissipation Power (D). None
23. The mean amount of power consumed for complete duration of operation of circuit is______ ( )
(A). Peak Power (B). Average Power oores (C). Consumed Power (D). none
24. __________ is used to represent various layers of logic circuit through monochrome encoding( )
(A). Flow diagram (B). Stick diagram (C). Algorithm (D). none
25. The sheet resistance of a conducting material is________________ ( )
(A). Rs= L/ A (B). Rs= L/ ρ A (C). Rs=ρL/A (D). Rs= ρA
26. The time required by charge carriers to travel from source to drain terminal is called_______ ( )
(A). Propogation time (B). Fall time (C). Rise time (D). Transit time
27. Total energy stored in a capacitor of a circuit is given by___________ ( )
(A).CL(Vdd )2/2 (B). CL(Vdd )2*2 (C). CL*Vdd/4 (D). Lithography
28. The series combination of nMos transistors is called ______________ ( )
(A).BiCMOS (B).PassGate (C). Passtransistor (D). cmos
29. Figure of merit of a MOS transistor ωo is given by ______________ ( )
(A). gmcg (B). gm/ cg (C). cg\gm (D). none
30. Total energy drawn from power supply of a circuit is given by___________ ( )
(A). CL(Vdd )2/2 (B). CL(Vdd )2 (C). CL(Vdd )2 (D). none
31. The minimum voltage required to form the channel for an nMOS transistor is called_______( )
(A). Saturation Voltage (B). Cuttoff Voltage (C). Threshold voltage (D). none
32. ___________power is the power consumed when signals of design are changing ( )
(A). Dynamic (B).Static (C). supply (D). Red
33. Input impedance of CMOS inverter is ( )
(A).Infinity (B). Medium (C). Low (D). High
34. _________ is a measure of resistance of a thin film silicon substance with uniform thickness. ( )
(A).UnityResistance (B). InternalResistance (C). SheetResistance (D). Impedance
35. __________is primary dynamic power required to charge and discharge capacitance on a gate( )
(A).Switching Power (B).Static Power (C). Glitching Power (D). None
36. Fan-in of 3 input nmos logic NAND gate is ( )
(A).two (B).three (C). four (D). Demarcation
37. If Rsn=10KΩ & L:W = 1:1 ,then for nMOS inverter Vdd to Vss ON-Resistance is ( )
(A).10K (B).0 (C). 20K (D). 30K
38. MOSFETS can be used as ( )
(A).Inductor (B).Rheostat (C). Power device (D). Control switch
39.Charge induced in the channel of a MOSFET is Q=______________ ( )
(A). I τ
2
(B). τ /I (C). I / τ (D). I *τ
40.___________is a power which arises due to finite delay of the gates with unequal propogation ( )
(A). Glitching power (B). Switching power (C). Short Circuit power (D). Infinity