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Advanced VLSI Architecture

MEL G624

Lecture 7: Memory Hierarchy

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Virtual Memory
Two major Motivations

Efficient and safe sharing of memory

To remove programming burdens of small, limited

amount of main memory
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Main Secondary
Cache
Memory Memory

Use main memory as a “cache” for secondary (disk) storage

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Virtual Memory

Main Secondary
P Cache
Memory Memory

Multiple
Programs loaded
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Virtual Memory
How to protect the programs from each other ?

How to ensure program can only read/write from memory

assigned to it?

Compile each program into its own address space

Virtual memory implements translation of programs

address space to physical address
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Virtual Memory
Second motivation allow user program to exceed the size
of primary memory

Programmers divided the program in to mutually exclusive

pieces Invented to relieve the programmers of
this burden

Overlays, loaded or unloaded under user control

Overlays, organized as modules, each with code and data

Programmers ensured that proper overlay was loaded at

proper time and with in size of main memory
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Virtual Memory
Concepts of virtual memory and Cache are similar
A virtual memory block is called Page

A virtual memory miss is called page fault

With virtual memory the processor produces virtual

address

Virtual Address translated to physical address by a

combination of sw/hw

Address mapping or Address translation

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Cache VM

P C M P M S

Cahe Hit / Miss Page Hit / fault

Set Associative Fully Associative

Unrestricted access Restricted access

Tags based search LUT based search

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Virtual Memory

Page hit
Page Miss

Main Get Page Secondary

Processor
Memory Memory
Virtual Address

Physical Address
Translate
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Virtual Memory
Virtual Address Physical Address
Page

Page Absent
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Virtual Memory
Virtual memory simplifies loading of a program by
providing relocation

Relocation maps address used by program to different

physical address

Allows for program to be loaded anywhere in main

memory

All virtual memory systems relocate the program as fixed

size blocks (Pages)
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Virtual Memory
In virtual memory the address is broken into A virtual
page number and a page offset

Virtual page number translates in to Physical page number

Virtual Page Number Page Offset Determines page size

Translation

Physical Page Number Page Offset

The number of pages addressable need not match

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Virtual Memory

C Page

A
Processor
B
A
B
C
D
Address
Translation
Main Memory
Secondary memory
Page Fault
Page  A
B
Program’s Address space
C
Virtual Address space Millions of cycles
D
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Virtual Memory
Design Issues
Page size should be large enough (4KB-16KB)

Organizations to reduce page fault (fully associative

placement)

Page faults can be handled in software. Sw can use

clever algorithms to choose how to place pages

Write through not an option, Write back mechanism

used
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Page Fault Penalty

Virtual page is allowed to map to any physical page

OS can use sophisticated algorithms to track page usage

choose which page to replace.

Difficulty in fully associative placement is in locating an

entry

Full search impractical ??????

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Page Tables
Pages are located by using a table that indexes the
memory

This structure is called Page Table, which resides in

memory

Each program has its own page table, which maps the
virtual address to physical address

A page table register indicates the location of page table

in the memory
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Page Tables
Page table Register

Virtual Page Number Page Offset

Valid

If 0 the page is not present in

main memory

Physical Page Number Page Offset

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Page Tables And Page Faults

0
Page Table Register 1 C Page
2
Valid
3 A
0 1 3
4
Processor
5 B 1 1 5
6 2 1 1
7 3 0 9
8 PTE

Main Memory

Page  A 0
B 1
C 2
D 3 Virtual Address space
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Page Tables And Page Faults

0
Page Table Register 1 C Page
2
Valid
3 A
0 1 3
4 Swap Space
Processor
5 B 1 1 5
6 2 A
1 1 B
7 3 0 9* C
8 PTE D 9

Main Memory
Secondary
memory
Page  A 0
B 1
C 2
D 3 Virtual Address space Page Fault
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Thank You for Attending