Compal PBL20 LA-6772P Rev 1.0 Schematic

5 4 3 2 1
D D
Compal Confidential
C
PBL20 Project C
LA-6772P REV 1.0 Schematic

B B
Intel Sandy Bridge/Cougar Point(UMA)

2010-12-07 Rev. 1.0
A A
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/05/17 Deciphered Date 2011/05/17 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PBL20 LA6772P M/B
Date: Tuesday, December 07, 2010 Sheet 1 of 45
5 4 3 2 1
5 4 3 2 1
Compal Confidential CK505

Model Name : PBL20 Fan Control
page 5
File Name : LA-6772P Clock Generator
Mobile Sandy Bridge SLG8SP585VTR
Page 14
CPU Dual Core

Memory BUS(DDRIII)
D
Socket-rPGA989 Dual Channel 204pin DDRIII-SO-DIMM X2 D
1.5V DDRIII 1066/1333 BANK 0, 1, 2, 3 page 12,13

37.5mm*37.5mm page 5,6,7,8,9,10,11
DMI X4 FDI X4
LCD Conn. USB/B Right USB/B Left Smart Card

page 15
USB port 0,1 USB port 2 USB port 9
page 29 page 29 page 29
CRT
page 16
Int. Camera RTS5138 3IN1
USB port 10 USB port 11
USB page 15 page 32
C
HDMI Conn. HDMI C
page 17
Level Shifter
page 17
Intel Cougar Point
FCBGA989
25mm*25mm
SATA port 0 SATA HDD0
5V 1.5GHz(150MB/s) page 27
New Card PCIeMini Card USB

WLAN & BT 2.0
SATA port 2 SATA ODD
PCIe 1x 5V 1.5GHz(150MB/s)
USB port 8 USB port 13 page 27
PCIe port 5 PCIe port 2 1.5V 2.5GHz(250MB/s)
page 29 page 29
SPI ROM
page 28
B B
RTL8111E Giga
RJ45 PCIe 1x
Function/B page 30
RTL8105E 10/100 1.5V 2.5GHz(250MB/s)
page 29 PCIe port 1 page 18,19,20,21 HD Audio 3.3V 24.576MHz/48Mhz
page 30 22,23,24,25,26
Power/B HDA Codec

page 34
LPC BUS ALC259
page 31
3.3V 33 MHz
Touch Pad/B
page 34
ENE KB930 TPM 1.2
page 33 page 28
RTC CKT.
Int.
page 36 MIC CONN MIC CONN HP CONN SPK CONN
page 15 page 29 page 29 page 31
DC/DC Interface CKT. Int.KBD SPI ROM

A A
page 32 page 32
page 35
Power Circuit DC/DC Security Classification Compal Secret Data Compal Electronics, Inc.
page 36,37,38,39, THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
40,41,42,43,44 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
D D
POK
+3VL B+ +VSB
+5VL TP0610K
B+ +5VALW
UP6182CQAG +CPU_CORE
SUSP
+5VS ISL95831CRZ +VGFX_CORE
SI4800BDY
SYSON
+HDMI_5V_OUT
RB161M +1.5V
G5603RU1U
SUSP
+CRT_VCC
USB_EN# RB491D +1.5VS
SI4856ADY
+USB_VCCA
RT9715BGS SUSP#
USB_EN#
+1.05VS_VCCP
G5603RU1U
C C
+USB_VCCB
RT9715BGS SUSP
SUSP#
+0.75VS
UP7711U8
+1.8VS
SY8033BDBC
SUSP#
+VCCSA
G5603RU1U
+3VALW
PCH_PWR_EN#
+3VALW_PCH
SI4800BDY
SUSP
+3VS
SI4800BDY
B
VGA_ENVDD B
+LCD_VDD
AO3413
+3V_LAN
A A

Power Map
1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
Voltage Rails
Power Plane Description S1 S3 S5 EC SM Bus1 address EC SM Bus2 address
VIN Adapter power supply (19V) N/A N/A N/A
Device Address Device Address
BATT+ Battery power supply (12.6V) N/A N/A N/A
Smart Battery 0001 011X b
D B+ AC or battery power rail for power circuit. N/A N/A N/A D
+CPU_CORE Core voltage for CPU ON OFF OFF

+VGA_CORE Core voltage for GPU ON OFF OFF
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF PCH SM Bus address
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator ON OFF OFF
Device Address
+1.0VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for GPU ON OFF OFF
+1.05VS_VCCP +1.05VS_VCCPP to +1.05VS_VCCP switched power rail for CPU ON OFF OFF Clock Generator (9LVS3199AKLFT, 1101 0010b
RTM890N-631-VB-GRT)
+1.05VS_PCH +1.05VS_VCCP to +1.05VS_PCH power for PCH ON OFF OFF
DDR DIMM0 1001 000Xb
+1.5V +1.5VP to +1.5V power rail for DDRIII ON ON OFF
DDR DIMM2 1001 010Xb
+1.5VS +1.5V to +1.5VS switched power rail ON OFF OFF
+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF
+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU ON OFF OFF
+3VALW +3VALW always on power rail ON ON ON*
+3VALW_EC +3VALW always to KBC ON ON ON*
+3V_LAN +3VALW to +3V_LAN power rail for LAN ON ON ON*
C +3VALW_PCH +3VALW to +3VALW_PCH power rail for PCH (Short Jumper) ON ON ON* C
+3VS +3VALW to +3VS power rail ON OFF OFF

+5VALW +5VALWP to +5VALW power rail ON ON ON*
+5VALW_PCH +5VALW to +5VALW_PCH power rail for PCH (Short resister) ON ON ON*
+5VS +5VALW to +5VS switched power rail ON OFF OFF
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON*
+RTCVCC RTC power ON ON ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
B S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF B
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
A A

Notes List
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
R41 1 @ 2 0_0402_5% CLK_BUF_CPU_BCLK <14>

JCPUB R42 1 @ 2 0_0402_5% CLK_BUF_CPU_BCLK# <14>
A28 CLK_CPU_DMI_R R43 1 2 0_0402_5%

BCLK CLK_CPU_DMI <19>
MISC
CLOCKS
D CLK_CPU_DMI#_R R44 D
<22> H_SNB_IVB# C26 A27 1 2 0_0402_5% CLK_CPU_DMI# <19>
PROC_SELECT# BCLK#
T68 PAD SKTOCC# AN34

SKTOCC#
A16 R234 1 2 1K_0402_5%
DPLL_REF_CLK
A15 R240 1 2 1K_0402_5% +1.05VS_VCCP
DPLL_REF_CLK#
T5 PAD H_CATERR# AL33

CATERR#
DDR3 Compensation Signals
R48
THERMAL
0_0402_5%
1 2 H_PECI_ISO AN33 R8 H_DRAMRST# SM_RCOMP0 R49 2 1 140_0402_1%
<23,33> H_PECI PECI SM_DRAMRST# H_DRAMRST# <7>
DDR3
MISC
R52 SM_RCOMP1 R51 2 1 25.5_0402_1%
56_0402_5%
1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP0 SM_RCOMP2 R53 2 1 200_0402_1%
<33> H_PROCHOT# PROCHOT# SM_RCOMP[0]
A5 SM_RCOMP1
R54 SM_RCOMP[1] SM_RCOMP2
SM_RCOMP[2] A4
1 2 H_PM_SYNC 0_0402_5%
1 2 H_THEMTRIP#_R AN32
<23> H_THRMTRIP# THERMTRIP#
C22 220P_0402_50V8K PU/PD for JTAG signals +1.05VS_VCCP
XDP_TMS R55 2 1 51_0402_5%

1 2 H_CPUPWRGD AP29 XDP_PRDY# PAD T11
PRDY# XDP_PREQ# PAD T59 XDP_TDI R56
PREQ# AP27 2 1 51_0402_5%
C16 220P_0402_50V8K
R58 AR26 XDP_TCK XDP_TDO R57 2 1 51_0402_5%
TCK
PWR MANAGEMENT
For ESD 0_0402_5% AR27 XDP_TMS
JTAG & BPM

H_PM_SYNC_R TMS XDP_TRST# XDP_TCK R59
<20> H_PM_SYNC 1 2 AM34 AP30 2 1 51_0402_5%
PM_SYNC TRST#
C R64 XDP_TDI XDP_TRST# R62 C
AR28 2 1 51_0402_5%
0_0402_5% TDI XDP_TDO
TDO AP26
<23> H_CPUPWRGD 1 2 H_CPUPWRGD_R AP33 R266 1K_0402_5%
UNCOREPWRGOOD
1 2 +3VS
+1.05VS_VCCP Processor Pullups R65
130_0402_5%
DBR# AL35 XDP_DBRESET#_R 1 R67 2 0_0402_5% XDP_DBRESET#
XDP_DBRESET# <18,20>
PM_SYS_PWRGD_BUF 1 2 PM_DRAM_PWRGD_R V8 SM_DRAMPWROK
R47 2 1 62_0402_5% H_PROCHOT#
AT28
BPM#[0]
AR29
BPM#[1]
AR30
BUF_CPU_RST# BPM#[2]
AR33 AT30
RESET# BPM#[3] XDP_BPM#4_R R73 0_0402_5% XDP_BPM#4 R74 @ 0_0402_5%
AP32 1 2 1 2 CFG12 <10>
BPM#[4] XDP_BPM#5_R R75 0_0402_5% XDP_BPM#5 R76 @ 0_0402_5%
AR31 1 2 1 2 CFG13 <10>
AT31 1 2 1 2 CFG14 <10>
AR32 1 2 1 2 CFG15 <10>
BPM#[7]
R50 2 1 10K_0402_5% H_CPUPWRGD_R
Sandy Bridge_rPGA_Rev1p0
@
+3VS
Buffered reset to CPU
1
+1.05VS_VCCP FAN Control Circuit
C82 +5VS
B 0.1U_0402_16V4Z B
1
1A
2 R60
75_0402_5%
5
U2 R66
2
1 43_0402_1% 2
P
NC BUFO_CPU_RST#
Y
4 1 2 BUF_CPU_RST#
PLT_RST# 2 C863 JFAN
A
G
SN74LVC1G07DCKR_SC70-5 10U_0805_10V4Z +FAN1 1

@ 1 1
2
3
R68 2
2 3
0_0402_5% U58 3
1 8 @ C864
@C864 4
2
EN GND 1000P_0402_50V7K GND

PLT_RST# <22,28,29,30,33> 2 7 5
+FAN1 VIN GND 1 GND
3 6
VOUT GND
<33> EN_DFAN1 4 5 ACES_85205-03001
VSET GND
1
10mil G996 @
C17
+3VALW R219 10K_0402_5%
Follow DG 0.71 2
10U_0805_10V4Z
2 1 +3VS
+1.5V_CPU_VDDQ
1 FAN_SPEED1 <33>
C83
0.1U_0402_16V4Z
change SA000035G00 1
1
C865@
2 R81 0.01U_0402_25V7K
U3 200_0402_5% 2
R82 74AHC1G09GW_TSSOP5
5
0_0402_5%
2
1 2 1
P
A <20> SYS_PWROK B A
4 PM_SYS_PWRGD_BUF
O
<20> PM_DRAM_PWRGD 2 A
G
1
3
@
R83
39_0402_5%
1 2
D @
SUSP 2 Q4
<35,42> SUSP
G 2N7002_SOT23
PROCESSOR(1/7) PM,FAN
S Size Document Number Rev
3
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
D D
PEG_ICOMPI and RCOMPO signals should be
shorted and routed
with - max length = 500 mils - typical
+1.05VS_VCCP impedance = 43 mohms
PEG_ICOMPO signals should be routed with -
1
max length = 500 mils
R17
24.9_0402_1% - typical impedance = 14.5 mohms
JCPUA
2
J22 PEG_COMP
PEG_ICOMPI
PEG_ICOMPO J21
<20> DMI_CRX_PTX_N0 B27 DMI_RX#[0] PEG_RCOMPO H22
<20> DMI_CRX_PTX_N1 B25 DMI_RX#[1]
<20> DMI_CRX_PTX_N2 A25 DMI_RX#[2]
<20> DMI_CRX_PTX_N3 B24 DMI_RX#[3] PEG_RX#[0] K33
PEG_RX#[1] M35
<20> DMI_CRX_PTX_P0 B28 DMI_RX[0] PEG_RX#[2] L34
<20> DMI_CRX_PTX_P1 B26 DMI_RX[1] PEG_RX#[3] J35
DMI
<20> DMI_CRX_PTX_P2 A24 DMI_RX[2] PEG_RX#[4] J32
<20> DMI_CRX_PTX_P3 B23 DMI_RX[3] PEG_RX#[5] H34
PEG_RX#[6] H31
<20> DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33
<20> DMI_CTX_PRX_N1 E22 DMI_TX#[1] PEG_RX#[8] G30
<20> DMI_CTX_PRX_N2 F21 DMI_TX#[2] PEG_RX#[9] F35
<20> DMI_CTX_PRX_N3 D21 DMI_TX#[3] PEG_RX#[10] E34
PEG_RX#[11] E32
<20> DMI_CTX_PRX_P0 G22 DMI_TX[0] PEG_RX#[12] D33
<20> DMI_CTX_PRX_P1 D22 DMI_TX[1] PEG_RX#[13] D31
C C
PCI EXPRESS* - GRAPHICS

<20> DMI_CTX_PRX_P2 F20 DMI_TX[2] PEG_RX#[14] B33
<20> DMI_CTX_PRX_P3 C21 DMI_TX[3] PEG_RX#[15] C32
PEG_RX[0] J33
PEG_RX[1] L35
PEG_RX[2] K34
<20> FDI_CTX_PRX_N0 A21 FDI0_TX#[0] PEG_RX[3] H35
<20> FDI_CTX_PRX_N1 H19 H32
FDI0_TX#[1] PEG_RX[4]
<20> FDI_CTX_PRX_N2 E19 G34
F18 G31
Intel(R) FDI
<20> FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6]
<20> FDI_CTX_PRX_N4 B21 F33
<20> FDI_CTX_PRX_N5 C20 F30
<20> FDI_CTX_PRX_N6 D18 E35
<20> FDI_CTX_PRX_N7 E17 E33
F32
PEG_RX[11]
D34
PEG_RX[12]
<20> FDI_CTX_PRX_P0 A22 E31
FDI0_TX[0] PEG_RX[13]
<20> FDI_CTX_PRX_P1 G19 C33
<20> FDI_CTX_PRX_P2 E20 B32
<20> FDI_CTX_PRX_P3 G18
FDI0_TX[3]
<20> FDI_CTX_PRX_P4 B20 M29
FDI1_TX[0] PEG_TX#[0]
<20> FDI_CTX_PRX_P5 C19 M32
<20> FDI_CTX_PRX_P6 D19 M31
<20> FDI_CTX_PRX_P7 F17 L32
L29
+1.05VS_VCCP PEG_TX#[4]
<20> FDI_FSYNC0 J18 K31
FDI0_FSYNC PEG_TX#[5]
<20> FDI_FSYNC1 J17 K28
FDI1_FSYNC PEG_TX#[6]
J30
PEG_TX#[7]
<20> FDI_INT H20 J28
FDI_INT PEG_TX#[8]
eDP_COMPIO and ICOMPO signals PEG_TX#[9]
H29
1
<20> FDI_LSYNC0 J19 G27

should be shorted near balls R18 H17
FDI0_LSYNC PEG_TX#[10]
E29
B <20> FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] B
and routed with typical 24.9_0402_1% PEG_TX#[12]
F27
impedance <25 mohms D28
PEG_TX#[13]
F26
2
PEG_TX#[14]
E25
EDP_COMP PEG_TX#[15]
A18
eDP_COMPIO
A17 M28
eDP_ICOMPO PEG_TX[0]
+1.05VS_VCCP 1 2 B16 M33
eDP_HPD PEG_TX[1]
M30
@ R90 1K_0402_5% PEG_TX[2]
L31
PEG_TX[3]
C15 L28
eDP_AUX PEG_TX[4]
D15 K30
eDP_AUX# PEG_TX[5]
eDP
K27
PEG_TX[6]
J29
PEG_TX[7]
C17 J27
eDP_TX[0] PEG_TX[8]
F16 H28
eDP_TX[1] PEG_TX[9]
C16 G28
eDP_TX[2] PEG_TX[10]
G15 E28
eDP_TX[3] PEG_TX[11]
F28
PEG_TX[12]
C18 D27
eDP_TX#[0] PEG_TX[13]
E16 E26
D16 D25
F15
eDP_TX#[3]
@
A A

PROCESSOR(2/7) DMI,FDI,PEG
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
JCPUC JCPUD
<12> DDR_A_D[0..63] SA_CLK[0] AB6 M_CLK_DDR0 <12> <13> DDR_B_D[0..63] SB_CLK[0] AE2 M_CLK_DDR2 <13>
SA_CLK#[0] AA6 M_CLK_DDR#0 <12> SB_CLK#[0] AD2 M_CLK_DDR#2 <13>
DDR_A_D0 C5 V9 DDR_B_D0 C9 R9
DDR_A_D1 SA_DQ[0] SA_CKE[0] DDR_CKE0_DIMMA <12> DDR_B_D1 SB_DQ[0] SB_CKE[0] DDR_CKE2_DIMMB <13>
D5 SA_DQ[1] A7 SB_DQ[1]
DDR_A_D2 D3 DDR_B_D2 D10
DDR_A_D3 SA_DQ[2] DDR_B_D3 SB_DQ[2]
D2 C8
D6 AA5 M_CLK_DDR1 <12> A9 AE1 M_CLK_DDR3 <13>
D DDR_A_D5 SA_DQ[4] SA_CLK[1] DDR_B_D5 SB_DQ[4] SB_CLK[1] D
C6 AB5 M_CLK_DDR#1 <12> A8 AD1 M_CLK_DDR#3 <13>
DDR_A_D6 SA_DQ[5] SA_CLK#[1] DDR_B_D6 SB_DQ[5] SB_CLK#[1]
C2 V10 DDR_CKE1_DIMMA <12> D9 R10 DDR_CKE3_DIMMB <13>
DDR_A_D7 SA_DQ[6] SA_CKE[1] DDR_B_D7 SB_DQ[6] SB_CKE[1]
C3 D8
F10 G4
F8 F4
G10 AB4 F1 AB2
DDR_A_D11 SA_DQ[10] RSVD_TP[1] DDR_B_D11 SB_DQ[10] RSVD_TP[11]
G9 AA4 G1 AA2
F9 W9 G5 T9
F7 F5
G8 F2
G7 G2
K4 SA_DQ[16] RSVD_TP[4] AB3 J7 SB_DQ[16] RSVD_TP[14] AA1
DDR_A_D17 K5 AA3 DDR_B_D17 J8 AB1
K1 SA_DQ[18] RSVD_TP[6] W10 K10 SB_DQ[18] RSVD_TP[16] T10
DDR_A_D19 J1 DDR_B_D19 K9
J5 SA_DQ[20] J9 SB_DQ[20]
DDR_A_D21 J4 DDR_B_D21 J10
J2 SA_DQ[22] SA_CS#[0] AK3 DDR_CS0_DIMMA# <12> K8 SB_DQ[22] SB_CS#[0] AD3 DDR_CS2_DIMMB# <13>
DDR_A_D23 K2 AL3 DDR_B_D23 K7 AE3
DDR_A_D24 SA_DQ[23] SA_CS#[1] DDR_CS1_DIMMA# <12> DDR_B_D24 SB_DQ[23] SB_CS#[1] DDR_CS3_DIMMB# <13>
M8 SA_DQ[24] RSVD_TP[7] AG1 M5 SB_DQ[24] RSVD_TP[17] AD6
DDR_A_D25 N10 AH1 DDR_B_D25 N4 AE6
N8 SA_DQ[26] N2 SB_DQ[26]
DDR_A_D27 N7 DDR_B_D27 N1
M10 SA_DQ[28] M4 SB_DQ[28]
DDR_A_D29 M9 AH3 DDR_B_D29 N5 AE4
SA_DQ[29] SA_ODT[0] M_ODT0 <12> SB_DQ[29] SB_ODT[0] M_ODT2 <13>
DDR SYSTEM MEMORY B

DDR_A_D30 N9 AG3 DDR_B_D30 M2 AD4
DDR SYSTEM MEMORY A

DDR_A_D31 SA_DQ[30] SA_ODT[1] M_ODT1 <12> DDR_B_D31 SB_DQ[30] SB_ODT[1] M_ODT3 <13>
M7 SA_DQ[31] RSVD_TP[9] AG2 M1 SB_DQ[31] RSVD_TP[19] AD5
DDR_A_D32 AG6 AH2 DDR_B_D32 AM5 AE5
AG5 SA_DQ[33] AM6 SB_DQ[33]
DDR_A_D34 AK6 DDR_B_D34 AR3
AK5 SA_DQ[35] AP3 SB_DQ[35]
DDR_A_D36 AH5 DDR_B_D36 AN3
C DDR_A_D37 SA_DQ[36] DDR_A_DQS#0 DDR_A_DQS#[0..7] <12> DDR_B_D37 SB_DQ[36] DDR_B_DQS#0 DDR_B_DQS#[0..7] <13> C
AH6 SA_DQ[37] SA_DQS#[0] C4 AN2 SB_DQ[37] SB_DQS#[0] D7
DDR_A_D38 AJ5 G6 DDR_A_DQS#1 DDR_B_D38 AN1 F3 DDR_B_DQS#1
DDR_A_D39 SA_DQ[38] SA_DQS#[1] DDR_A_DQS#2 DDR_B_D39 SB_DQ[38] SB_DQS#[1] DDR_B_DQS#2
AJ6 SA_DQ[39] SA_DQS#[2] J3 AP2 SB_DQ[39] SB_DQS#[2] K6
DDR_A_D40 AJ8 M6 DDR_A_DQS#3 DDR_B_D40 AP5 N3 DDR_B_DQS#3
AK8 SA_DQ[41] SA_DQS#[4] AL6 AN9 SB_DQ[41] SB_DQS#[4] AN5
DDR_A_D42 AJ9 AM8 DDR_A_DQS#5 DDR_B_D42 AT5 AP9 DDR_B_DQS#5
AK9 SA_DQ[43] SA_DQS#[6] AR12 AT6 SB_DQ[43] SB_DQS#[6] AK12
DDR_A_D44 AH8 AM15 DDR_A_DQS#7 DDR_B_D44 AP6 AP15 DDR_B_DQS#7
DDR_A_D45 SA_DQ[44] SA_DQS#[7] DDR_B_D45 SB_DQ[44] SB_DQS#[7]
AH9 AN8
AL9 AR6
AL8 AR5
AP11 DDR_A_DQS[0..7] <12> AR9 DDR_B_DQS[0..7] <13>
DDR_A_D49 SA_DQ[48] DDR_A_DQS0 DDR_B_D49 SB_DQ[48] DDR_B_DQS0
AN11 D4 AJ11 C7
DDR_A_D50 SA_DQ[49] SA_DQS[0] DDR_A_DQS1 DDR_B_D50 SB_DQ[49] SB_DQS[0] DDR_B_DQS1
AL12 F6 AT8 G3
AM12 K3 AT9 J6
AM11 N6 AH11 M3
AL11 AL5 AR8 AN6
AP12 AM9 AJ12 AP8
AN12 AR11 AH12 AK11
AJ14 AM14 AT11 AP14
DDR_A_D57 SA_DQ[56] SA_DQS[7] DDR_B_D57 SB_DQ[56] SB_DQS[7]
AH14 AN14
AL15 AR14
AK15 AT14
AL14 DDR_A_MA[0..15] <12> AT12 DDR_B_MA[0..15] <13>
DDR_A_D61 SA_DQ[60] DDR_A_MA0 DDR_B_D61 SB_DQ[60] DDR_B_MA0
AK14 AD10 AN15 AA8
DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
AJ15 W1 AR15 T7
DDR_A_D63 SA_DQ[62] SA_MA[1] DDR_A_MA2 DDR_B_D63 SB_DQ[62] SB_MA[1] DDR_B_MA2
AH15 W2 AT15 R7
SA_DQ[63] SA_MA[2] DDR_A_MA3 SB_DQ[63] SB_MA[2] DDR_B_MA3
W7 T6
SA_MA[3] DDR_A_MA4 SB_MA[3] DDR_B_MA4
V3 T2
V2 T4
W3 T3
<12> DDR_A_BS0 AE10 W6 <13> DDR_B_BS0 AA9 R2
B SA_BS[0] SA_MA[7] DDR_A_MA8 SB_BS[0] SB_MA[7] DDR_B_MA8 B
<12> DDR_A_BS1 AF10 V1 <13> DDR_B_BS1 AA7 T5
SA_BS[1] SA_MA[8] DDR_A_MA9 SB_BS[1] SB_MA[8] DDR_B_MA9
<12> DDR_A_BS2 V6 W5 <13> DDR_B_BS2 R6 R3
SA_BS[2] SA_MA[9] DDR_A_MA10 SB_BS[2] SB_MA[9] DDR_B_MA10
AD8 AB7
V4 R1
W4 T1
<12> DDR_A_CAS# AE8 AF8 <13> DDR_B_CAS# AA10 AB10
SA_CAS# SA_MA[13] DDR_A_MA14 SB_CAS# SB_MA[13] DDR_B_MA14
<12> DDR_A_RAS# AD9 V5 <13> DDR_B_RAS# AB8 R5
SA_RAS# SA_MA[14] DDR_A_MA15 SB_RAS# SB_MA[14] DDR_B_MA15
<12> DDR_A_WE# AF9 V7 <13> DDR_B_WE# AB9 R4
SA_WE# SA_MA[15] SB_WE# SB_MA[15]
Sandy Bridge_rPGA_Rev1p0 Sandy Bridge_rPGA_Rev1p0

@ @
+1.5V
@ R84
1
0_0402_5%
1 2 R85
1K_0402_5%
R86
2
1K_0402_5%
S
H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2
<5> H_DRAMRST# DDR3_DRAMRST# <12,13>
Q5
2
BSS138_NL_SOT23-3
R87
G
2
A 4.99K_0402_1% A
1
R88 +1.5V
0_0402_5%
1 2 DRAMRST_CNTRL close PJP502
<19> DRAMRST_CNTRL_PCH
1 1
<33> DRAMRST_CNTRL_EC R89 1 @ 2 0_0402_5% C233

0.047U_0402_16V4Z
C232
0.047U_0402_16V4Z
1 2 2 Issued Date 2010/05/17 Deciphered Date 2011/05/17 Title
C84
PROCESSOR(3/7) DDRIII
0.047U_0402_16V4Z AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2 Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
JCPUF POWER
+CPU_CORE
Top Socket Cacity 22U *9
Bottom Socket Cacity 22U *10 +1.05VS_VCCP
94A 8.5A
AG35 VCC1
1 1 1 1 1 AG34 AH13 +1.05VS_VCCP
VCC2 VCCIO1
10U_0805_10V6K
C119
10U_0805_10V6K
C124
10U_0805_10V6K
C125
10U_0805_10V6K
C123
10U_0805_10V6K
C126
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AG33 VCC3 VCCIO2 AH10 1 1 1 1 1 1 1 1 1 1
AG32 AG10
VCC4 VCCIO3
C101
C102
C88
C89
C103
C90
C104
C91
C92
C105
AG31 AC10
2 2 2 2 2 VCC5 VCCIO4
AG30 Y10
D VCC6 VCCIO5 2 2 2 2 2 2 2 2 2 2 D
AG29 U10
VCC7 VCCIO6
AG28 P10
VCC8 VCCIO7
AG27 L10
VCC9 VCCIO8
AG26 J14
VCC10 VCCIO9
AF35 J13
VCC11 VCCIO10
1 1 1 1 1 AF34 J12
VCC12 VCCIO11
10U_0805_10V6K
C128
10U_0805_10V6K
C118
10U_0805_10V6K
C95
10U_0805_10V6K
C115
10U_0805_10V6K
C134
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AF33 J11 1 1 1 1 1 1 1 1 1
VCC13 VCCIO12 @ @ @ @ @ @ @
AF32 H14
VCC14 VCCIO13
C106
C107
C108
C109
C110
C111
C112
C113
C114
AF31 H12
2 2 2 2 2 VCC15 VCCIO14
AF30 H11
VCC16 VCCIO15 2 2 2 2 2 2 2 2 2
AF29 G14
VCC17 VCCIO16
AF28 VCC18 VCCIO17 G13
PEG AND DDR

AF27 VCC19 VCCIO18 G12
AF26 VCC20 VCCIO19 F14
AD35 VCC21 VCCIO20 F13
AD34 VCC22 VCCIO21 F12
+CPU_CORE AD33 F11
VCC23 VCCIO22
AD32 VCC24 VCCIO23 E14
330U_D2_2V_Y
330U_D2_2V_Y
AD31 VCC25 VCCIO24 E12 1 1 1
AD30 VCC26
C117
C121
AD29 E11 + + + @ C122
1 1 1 1 1 VCC27 VCCIO25
22U_0805_6.3V6M
C97
22U_0805_6.3V6M
C116
22U_0805_6.3V6M
C98
22U_0805_6.3V6M
C85
22U_0805_6.3V6M
C120
AD28 D14 330U_D2_2V_Y
VCC28 VCCIO26
AD27 VCC29 VCCIO27 D13
AD26 D12 2 2 2
2 2 2 2 2 VCC30 VCCIO28
AC35 VCC31 VCCIO29 D11
AC34 VCC32 VCCIO30 C14
AC30 VCC36 VCCIO34 B14
1 1 1 1 1 AC29 VCC37 VCCIO35 B12
22U_0805_6.3V6M
C100
22U_0805_6.3V6M
C99
22U_0805_6.3V6M
C96
22U_0805_6.3V6M
C94
22U_0805_6.3V6M
C127
AC28 VCC38 VCCIO36 A14
C C
2 2 2 2 2
AA35 VCC41 VCCIO39 A11
AA34 VCC42
AA33 VCC43 VCCIO40 J23
AA32 VCC44
AA31 VCC45
AA30
VCC46
1 1 1 1 1 AA29
VCC47
22U_0805_6.3V6M
C93
22U_0805_6.3V6M
C129
22U_0805_6.3V6M
C130
22U_0805_6.3V6M
C131
22U_0805_6.3V6M
C132
AA28
VCC48
AA27
VCC49
AA26
2 2 2 2 2 VCC50 +1.05VS_VCCP +1.05VS_VCCP
CORE SUPPLY
Y35
VCC51
Y34
VCC52
Y33
VCC53
1
Y32
VCC54 R97 R98
Y31
VCC55 130_0402_5% 75_0402_5%
Y30
VCC56
1 1 1 1 1 Y29
VCC57
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
@ @ @ @ Y28
2
VCC58
C86
C133
C87
C135
C136
Y27
VCC59 R99
Y26
2 2 2 2 2 VCC60 43_0402_1%
V35
VCC61
SVID
V34 AJ29 H_CPU_SVIDALRT# 1 2
VCC62 VIDALERT# H_CPU_SVIDCLK VR_SVID_ALRT# <44>
V33 AJ30 R100 1 2 0_0402_5%
VCC63 VIDSCLK H_CPU_SVIDDAT VR_SVID_CLK <44>
V32 AJ28 R101 1 2 0_0402_5%
VCC64 VIDSOUT VR_SVID_DAT <44>
V31
+CPU_CORE VCC65
V30
VCC66
V29
VCC67 Place the PU
V28
V27
VCC68 resistors close to VR
VCC69
V26
VCC70
330U_D2_2V_Y
C137
330U_D2_2V_Y
C138
B B
1 1 1 1 U35
VCC71
330U_D2_2V_Y
C139
330U_D2_2V_Y
C140
U34
+ + + + VCC72
U33
VCC73
U32
VCC74
U31
2 2 2 2 VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
Bottom Socket Edge U26
VCC80 +CPU_CORE
Place the PU
R35
R34
VCC81 resistors close to CPU
VCC82
R33
VCC83
1
R32
VCC84 R102
R31
VCC85
R30 100_0402_1%
VCC86
R29
VCC87
SENSE LINES
R28
2
VCC88
R27 AJ35 VCCSENSE_R R103 1 2 0_0402_5%
VCCSENSE <44>
VCC89 VCC_SENSE
R26 AJ34 VSSSENSE_R R104 1 2 0_0402_5%
VSSSENSE <44>
VCC90 VSS_SENSE
P35
VCC91
P34
VCC92
1
P33
VCC93 R105
P32 B10 VCCIO_SENSE <41>
VCC94 VCCIO_SENSE
P31 A10 100_0402_1%
VCC95 VSSIO_SENSE R1370
P30
VCC96
P29 2 1
2
VCC97
P28
VCC98 10_0402_5%
P27
VCC99
P26
VCC100
A A
@
PROCESSOR(4/7) PWR,BYPASS
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
+1.5V_CPU_VDDQ Source
+1.5V Q6 +1.5V_CPU_VDDQ
+VSB AO4728L_SO8
8 1
7 2
1
+3VALW 6 3
2
5
R106 R107
100K_0402_5% 470_0603_5%
4
1
2
R108
1
100K_0402_5% RUN_ON_CPU1.5VS3 +1.5V_CPU_VDDQ +1.5V
3
D D
1
D
1
R110 Q7B 1 2 RUN_ON_CPU1.5VS3# C141 2 1 0.1U_0402_10V7K
0_0402_5% RUN_ON_CPU1.5VS3# 5 2N7002DW-T/R7_SOT363-6 G
<33> CPU1.5V_S3_GATE 1 2 C142 S Q8
3
6
R109 0.1U_0402_16V4Z 2N7002E-T1-GE3_SOT23-3 C143 2 1 0.1U_0402_10V7K
4
@ R111 330K_0402_5% 2
2
0_0402_5% Q7A
<28,29,33,35,39,41,43> SUSP# 1 2 2 2N7002DW-T/R7_SOT363-6
1
+VGFX_CORE JCPUG
POWER
26A
Follow DG 0.71 page 6
SENSE
LINES
AT24 VAXG1 VAXG_SENSE AK35 VCC_AXG_SENSE <44>
Top Socket Cacity 22U *2 AT23 VAXG2 VSSAXG_SENSE AK34 VSS_AXG_SENSE <44>
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1 AT21 VAXG3
Top Socket Edge 22U *6
C153
UMA@
C144
UMA@
C145
UMA@
C146
UMA@
C147
UMA@
C148
UMA@
AT20 VAXG4
AT18 +1.5V_CPU_VDDQ
Bottom Socket Cacity 22U *2 VAXG5 R113
AT17 VAXG6
Bottom Socket Edge 22U *6 2 2 2 2 2 2
AR24 VAXG7
0_0402_5%
1
C
AR23 VAXG8 +V_SM_VREF should 2 1
C
AR21 VAXG9
AR20 have 20 mil trace width R114
VAXG10
VREF
AR18 1K_0402_1%
VAXG11
AR17
2
VAXG12 +V_SM_VREF_CNT +V_SM_VREF
AP24 VAXG13 SM_VREF AL1 2 3
AP23 VAXG14
1
AP21 1 @ Q9
VAXG15
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1 AP20 C156 AP2302GN-HF_SOT23-3
VAXG16
C149
UMA@
C150
UMA@
C154
UMA@
C155
UMA@
C151
UMA@
C152
UMA@
AP18 0.1U_0402_16V4Z R115
VAXG17 1 1K_0402_1%
AP17
VAXG18 2 RUN_ON_CPU1.5VS3
AN24
2
2 2 2 2 2 2 VAXG19
AN23
VAXG20
AN21
VAXG21 +1.5V_CPU_VDDQ
AN20
VAXG22 +1.5V
DDR3 -1.5V RAILS

AN18
VAXG23 PJ4
AN17
VAXG24 10A
GRAPHICS
AM24 AF7 2 1
VAXG25 VDDQ1 2 1
AM23 AF4
VAXG26 VDDQ2 @ JUMP_43X118
AM21 AF1 1
VAXG27 VDDQ3
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 AM20 AC7 1 1 1 1 1 1
VAXG28 VDDQ4
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
@ @ @ @ AM18 AC4 + C169

1 1 1 1 VAXG29 VDDQ5
C157
UMA@
C158
UMA@
C159
C160
C161
C162
C163
C164
C165
C166
C167
C168
+ + AM17 AC1 330U_D2_2V_Y
VAXG30 VDDQ6
AL24 Y7
VAXG31 VDDQ7 2 2 2 2 2 2 2
AL23 Y4
2 2 2 2 2 2 VAXG32 VDDQ8
AL21 Y1
VAXG33 VDDQ9
AL20 U7
VAXG34 VDDQ10
AL18 U4
VAXG35 VDDQ11
AL17 U1
VAXG36 VDDQ12
AK24 P7
VAXG37 VDDQ13
AK23
VAXG38 VDDQ14
P4 Bottom Socket Edge
Bottom Socket Edge AK21
VAXG39 VDDQ15
P1
AK20
B VAXG40 B
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47 Bottom Socket Cacity 10U *2
AJ17
VAXG48 Bottom Socket Edge 10U *1 +VCCSA
AH24
6A
SA RAIL
VAXG49
AH23
VAXG50 +VCCSA
AH21 M27
VAXG51 VCCSA1
AH20 M26
VAXG52 VCCSA2
AH18 L26
VAXG53 VCCSA3
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
AH17 J26 1 1 1 1 @ R116 1 2 0_0402_5% VCCSA_SENSE
VAXG54 VCCSA4
J25 1
VCCSA5
C170
C171
C172
C173
J24
VCCSA6 + C174
H26
VCCSA7 2 2 2 2 330U_D2_2V_Y
H25
VCCSA8
2
1.8V RAIL
+1.8VS R118
0_0805_5%
1 2 +1.8VS_VCCPLL B6 H23
VCCPLL1 VCCSA_SENSE VCCSA_SENSE <43>
MISC
A6
VCCPLL2
330U_D2_2V_Y
C175
10U_0603_6.3V6M
C176
1U_0402_6.3V6K
C177
1U_0402_6.3V6K
C178
1 1 1 A2
VCCPLL3
1
+ C22 H_FC_C22
@ FC_C22
C24 VCCSA_SEL <43>
2 2 VCCSA_VID1
2
2 2
1
R119
A Sandy Bridge_rPGA_Rev1p0 @ R120 A
10K_0402_5%
@ 1 0_0402_5%
Bottom Socket Edge
2
PROCESSOR(5/7) PWR
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
D D
CFG Straps for Processor

JCPUE
PEG Static Lane Reversal - CFG2 is for the 16x

L7
RSVD28
AG7
RSVD29
AK28 CFG[0] RSVD30 AE7 1: Normal Operation; Lane # definition matches
AK29 CFG[1] RSVD31 AK2 CFG2 socket pin map definition
AL26 CFG[2] RSVD32 W8
AL27 CFG[3]
AK26 CFG[4] 0:Lane Reversed
AL29 CFG[5] RSVD33 AT26
AL30 CFG[6] RSVD34 AM33
CFG7 AM31 AJ27 Display Port Presence Strap
CFG[7] RSVD35
AM32 CFG[8]
AM30 CFG[9]
AM28 CFG[10] 1 : Disabled; No Physical Display Port
AM26 CFG[11] CFG4 attached to Embedded Display Port
<5> CFG12 CFG12 AN28
CFG13 CFG[12]
<5> CFG13 AN31 CFG[13] RSVD37 T8
CFG14 AN26 J16 0 : Enabled; An external Display Port device is
<5>
<5>
CFG14
CFG15
CFG15 AM27
AK31
CFG[14]
CFG[15]
CFG[16]
RSVD38
RSVD39
RSVD40
H16
G16
* connected to the Embedded Display Port
AN29 CFG[17]
PCIE Port Bifurcation Straps
C C
RSVD41 AR35
T6 PAD AJ31 AT34 11: (Default) x16 - Device 1 functions 1 and 2 disabled
T7
T8
PAD
PAD
AH31
AJ33
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
RSVD42
RSVD43
RSVD44
AT33
AP35 CFG[6:5] *10: x8, x8 - Device 1 function 1 enabled ; function 2
T9 PAD AH33 AR34
VSS_VAL_SENSE RSVD45 disabled
01: Reserved - (Device 1 function 1 disabled ; function
AJ26 2 enabled)
RSVD5
RESERVED
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
B34
CPU_RSVD6 RSVD46
B4 A33
CPU_RSVD7 RSVD6 RSVD47
D1
RSVD7 RSVD48
A34 PEG DEFER TRAINING
B35
RSVD49
C35
RSVD50
1
1: (Default) PEG Train immediately following xxRESETB

F25
RSVD8 CFG7 de assertion
R92 R93 F24
1K_0402_1% 1K_0402_1% RSVD9
F23
RSVD10
D24 AJ32 0: PEG Wait for BIOS for training
2
RSVD11 RSVD51
G25 AK32
RSVD12 RSVD52
G24
RSVD13
E23
RSVD14
D23
RSVD15 PAD T10
C30 AH27
RSVD16 VCC_DIE_SENSE
A31 R94
RSVD17
B30
RSVD18 CFG7
B29 1 2
RSVD19
D30 AN35 CLK_RES_ITP <19>
RSVD20 RSVD54 @ 1K_0402_1%
B31 AM35 CLK_RES_ITP# <19>
RSVD21 RSVD55
A30
RSVD22
C29
B RSVD23 B
J20
RSVD24
B18 AT2
RSVD25 RSVD56
A19 AT1
VCCIO_SEL RSVD57
AR1
RSVD58
J15
RSVD27
B1
KEY
@
A A

PROCESSOR(6/7) RSVD,CFG
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
JCPUH JCPUI
D D
AT35 AJ22
VSS1 VSS81
AT32 AJ19
VSS2 VSS82
AT29 AJ16 T35 F22
VSS3 VSS83 VSS161 VSS234
AT27 AJ13 T34 F19
AT25 AJ10 T33 E30
AT22 AJ7 T32 E27
AT19 AJ4 T31 E24
AT16 AJ3 T30 E21
AT13 AJ2 T29 E18
AT10 AJ1 T28 E15
AT7 AH35 T27 E13
AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8
AR10 VSS19 VSS99 AH22 N35 VSS177 VSS250 E3
AR2 VSS22 VSS102 AH7 N32 VSS180 VSS253 D35
AP34 VSS23 VSS103 AH4 N31 VSS181 VSS254 D32
AP31 VSS24 VSS104 AG9 N30 VSS182 VSS255 D29
AP22 VSS27 VSS107 AF6 N27 VSS185 VSS258 D17
AP19 VSS28 VSS108 AF5 N26 VSS186 VSS259 C34
AP16 VSS29 VSS109 AF3 M34 VSS187 VSS260 C31
AP13 VSS30 VSS110 AF2 L33 VSS188 VSS261 C28
AP10 VSS31 VSS111 AE35 L30 VSS189 VSS262 C27
C C
AN30 VSS35 VSS115 AE31 L6 VSS193 VSS266 C1
AN27 VSS36 VSS116 AE30 L5 VSS194 VSS267 B22
AN25 AE29 L4 B19
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
AE28
AE27
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
AN16 AE26 L1 B13
AN13 AE9 K35 B11
AN10 AD7 K32 B9
AN7 AC9 K29 B8
AN4 AC8 K26 B7
AM29 AC6 J34 B5
AM25 AC5 J31 B3
AM22 AC3 H33 B2
AM19 AC2 H30 A35
AM16 AB35 H27 A32
AM13 AB34 H24 A29
AM10 AB33 H21 A26
AM7 AB32 H18 A23
AM4 AB31 H15 A20
AM3 AB30 H13 A3
AM2 AB29 H10
VSS55 VSS135 VSS213
AM1 AB28 H9
VSS56 VSS136 VSS214
AL34 AB27 H8
VSS57 VSS137 VSS215
AL31 AB26 H7
VSS58 VSS138 VSS216
AL28 Y9 H6
VSS59 VSS139 VSS217
AL25 Y8 H5
VSS60 VSS140 VSS218
AL22 Y6 H4
VSS61 VSS141 VSS219
AL19 Y5 H3
VSS62 VSS142 VSS220
AL16 Y3 H2
VSS63 VSS143 VSS221
AL13 Y2 H1
B VSS64 VSS144 VSS222 B
AL10 W35 G35
VSS65 VSS145 VSS223
AL7 W34 G32
VSS66 VSS146 VSS224
AL4 W33 G29
VSS67 VSS147 VSS225
AL2 W32 G26
VSS68 VSS148 VSS226
AK33 W31 G23
VSS69 VSS149 VSS227
AK30 W30 G20
VSS70 VSS150 VSS228
AK27 W29 G17
VSS71 VSS151 VSS229
AK25 W28 G11
VSS72 VSS152 VSS230
AK22 W27 F34
VSS73 VSS153 VSS231
AK19 W26 F31
VSS74 VSS154 VSS232
AK16 U9 F29
VSS75 VSS155 VSS233
AK13 U8
VSS76 VSS156
AK10 U6
VSS77 VSS157
AK7 U5
VSS78 VSS158
AK4 U3
VSS79 VSS159
AJ25 U2
VSS80 VSS160
Sandy Bridge_rPGA_Rev1p0 Sandy Bridge_rPGA_Rev1p0

@ @
A A

PROCESSOR(7/7) VSS
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V +1.5V

+V_DDR_REF JDDRL
+V_DDR_REF 1 2
VREF_DQ VSS1 DDR_A_D4 DDR_A_DQS#[0..7] <7>
3 VSS2 DQ4 4
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5 DDR_A_DQS[0..7] <7>
C179
C180
R122 DDR_A_D1 7 8
1K_0402_1% DQ1 VSS3 DDR_A_DQS#0
1 1 9 VSS4 DQS#0 10 DDR_A_D[0..63] <7>
11 12 DDR_A_DQS0
+V_DDR_REF DM0 DQS0
13 14
2
DDR_A_D2 VSS5 VSS6 DDR_A_D6 DDR_A_MA[0..15] <7>
15 DQ2 DQ6 16
2 2 DDR_A_D3 17 18 DDR_A_D7
DQ3 DQ7
19 20
DDR_A_D8 VSS7 VSS8 DDR_A_D12
21 22
DQ8 DQ12
1
D DDR_A_D9 DDR_A_D13 D
23 24
DQ9 DQ13
25 26
R123 DDR_A_DQS#1 VSS9 VSS10
27 28
1K_0402_1% DDR_A_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 30 DDR3_DRAMRST# <7,13>
DQS1 RESET#
All VREF traces should 31 32
2

33 34
have 10 mil trace width DDR_A_D11 DQ10 DQ14 DDR_A_D15
35
DQ11 DQ15
36 Layout Note:
37 38
DDR_A_D16 39
VSS13 VSS14
40 DDR_A_D20 Place near JDIMM1
DDR_A_D17 DQ16 DQ20 DDR_A_D21 +1.5V
41 42
DQ17 DQ21
43 44
DDR_A_DQS#2 VSS15 VSS16
45 DQS#2 DM2 46
DDR_A_DQS2 47 48
DQS2 VSS17
1U_0402_6.3V6K
C181
1U_0402_6.3V6K
C182
1U_0402_6.3V6K
C183
1U_0402_6.3V6K
C184
49 50 DDR_A_D22
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52 1 1 1 1
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56
DDR_A_D25 DQ24 DQ29 2 2 2 2
59 DQ25 VSS21 60
61 62 DDR_A_DQS#3
VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
DDR_A_D27 DQ26 DQ30 DDR_A_D31
69 DQ27 DQ31 70
71 VSS25 VSS26 72
+1.5V
<7> DDR_CKE0_DIMMA DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA DDR_CKE1_DIMMA <7>

CKE0 CKE1
10U_0603_6.3V6M
C185
10U_0603_6.3V6M
C186
10U_0603_6.3V6M
C187
10U_0603_6.3V6M
C188
10U_0603_6.3V6M
C189
10U_0603_6.3V6M
C190
10U_0603_6.3V6M
C191
330U_D2_2V_Y
C192
75 VDD1 VDD2 76 1
77 78 DDR_A_MA15 1 1 1 1 1 1 1
DDR_A_BS2 NC1 A15 DDR_A_MA14 +
<7> DDR_A_BS2 79 BA2 A14 80
C C
81 VDD3 VDD4 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7 2 2 2 2 2 2 2 2
85 A9 A7 86
87 VDD5 VDD6 88
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD7 VDD8 94
DDR_A_MA1 A3 A2 DDR_A_MA0
97 98
A1 A0
99 100
M_CLK_DDR0 VDD9 VDD10 M_CLK_DDR1
<7> M_CLK_DDR0 101 102 M_CLK_DDR1 <7>
M_CLK_DDR#0 CK0 CK1 M_CLK_DDR#1
<7> M_CLK_DDR#0 103 104 M_CLK_DDR#1 <7>
CK0# CK1# +1.5V
105 106
DDR_A_MA10 VDD11 VDD12 DDR_A_BS1
107 108 DDR_A_BS1 <7>
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
<7> DDR_A_BS0 109 110 DDR_A_RAS# <7>
BA0 RAS#
111 112
VDD13 VDD14
1
<7> DDR_A_WE# DDR_A_WE# 113 114 DDR_CS0_DIMMA# DDR_CS0_DIMMA# <7>
DDR_A_CAS# WE# S0# M_ODT0 R124
<7> DDR_A_CAS# 115 116 M_ODT0 <7>
CAS# ODT0 1K_0402_1%
117 118
DDR_A_MA13 VDD15 VDD16 M_ODT1
119
A13 ODT1
120 M_ODT1 <7> +VREF_CA
Layout Note:
DDR_CS1_DIMMA# 121 122
<7> DDR_CS1_DIMMA#
2
123
S1# NC2
124
Place near JDIMM1.203,204
VDD17 VDD18
125 126
NCTEST VREF_CA
127 128
VSS27 VSS28
2.2U_0603_6.3V6K
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
1
C193
0.1U_0402_16V4Z
C194
DDR_A_D33 131 132 DDR_A_D37 +0.75VS
DQ33 DQ37 R125
133 134 1 1
DDR_A_DQS#4 VSS29 VSS30 1K_0402_1%
135 136
DDR_A_DQS4 DQS#4 DM4
137 138
DQS4 VSS31 DDR_A_D38
139 140
2
VSS32 DQ38 2 2
1U_0402_6.3V6K
C195
1U_0402_6.3V6K
C196
1U_0402_6.3V6K
C197
1U_0402_6.3V6K
C198
DDR_A_D34 141 142 DDR_A_D39
DDR_A_D35 DQ34 DQ39
143 144 1 1 1 1
B DQ35 VSS33 DDR_A_D44 B
145 146
147 148
DDR_A_D41 DQ40 DQ45
149 150
DQ41 VSS35 DDR_A_DQS#5 2 2 2 2
151 152
VSS36 DQS#5 DDR_A_DQS5
153 154
DM5 DQS5
155 156
157 158
159 160
DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
DDR_A_DQS#6 VSS41 VSS42
169 170
DDR_A_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR_A_D54
173
VSS44 DQ54
174 For EMI
DDR_A_D50 175 176 DDR_A_D55
DDR_A_D51 DQ50 DQ55 +3VS +0.75VS
177 178
DQ51 VSS45 DDR_A_D60
179 180
181 182
DDR_A_D57 DQ56 DQ61
183 184
DQ57 VSS47 DDR_A_DQS#7
185 186
+3VS VSS48 DQS#7 DDR_A_DQS7
187 188
R1 DM7 DQS7
189 190
VSS49 VSS50
0.1U_0402_16V4Z
C234
0.1U_0402_16V4Z
C235
0.1U_0402_16V4Z
C236
0.1U_0402_16V4Z
C237
0.1U_0402_16V4Z
C238
4.7K_0402_5% DDR_A_D58 191 192 DDR_A_D62
DQ58 DQ62
2
DDR_A_D59 DDR_A_D63
G
1 2 +3VS 193 194 1 1 1 1 1

DQ59 DQ63
195 196
D_CK_SDATA VSS51 VSS52
<19> PCH_SMBDATA 1 3 197
SA0 EVENT#
198
199 200 D_CK_SDATA
D
+3VS VDDSPD SDA D_CK_SDATA <13,14,29> 2 2 2 2 2

Q1 201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK <13,14,29>
2N7002E-T1-GE3_SOT23-3 +0.75VS 203 204 +0.75VS
VTT1 VTT2
1
+3VS
0.1U_0402_16V4Z
C199
2.2U_0603_6.3V6K
C200
10K_0402_5%
R134
10K_0402_5%
R135
205 G1 G2 206
2
A R4 A
1 1
4.7K_0402_5% LCN_DAN06-K4526-0100
2
G
1 2 +3VS @
2
1 3 D_CK_SCLK 2 2
<19> PCH_SMBCLK
1
D
Q2
2N7002E-T1-GE3_SOT23-3
DDRIII DIMMA
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
+V_DDR_REF +1.5V +1.5V

JDDRH
+V_DDR_REF 1 2
VREF_DQ VSS1 DDR_B_D4
3 VSS2 DQ4 4
2.2U_0603_6.3V6K
C201
0.1U_0402_16V4Z
C202
1 1 DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5 DDR_B_DQS#[0..7] <7>
7 DQ1 VSS3 8
All VREF traces should 9 10 DDR_B_DQS#0
VSS4 DQS#0 DDR_B_DQS0 DDR_B_DQS[0..7] <7>
11 DM0 DQS0 12
have 10 mil trace width 2 2 13 14 DDR_B_D[0..63] <7>
DDR_B_D2 VSS5 VSS6 DDR_B_D6
15 DQ2 DQ6 16
DDR_B_D3 17 18 DDR_B_D7
DQ3 DQ7 DDR_B_MA[0..15] <7>
19 20
21 22
DDR_B_D9 DQ8 DQ12 DDR_B_D13
23 24
D DQ9 DQ13 D
25 26
DDR_B_DQS#1 VSS9 VSS10
27 28
DDR_B_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 30 DDR3_DRAMRST# <7,12>
DQS1 RESET#
31 32
33 34
35 36
DQ11 DQ15 +1.5V
37 38
39 40
41 42
DQ17 DQ21
43 44
VSS15 VSS16
1U_0402_6.3V6K
C203
1U_0402_6.3V6K
C204
1U_0402_6.3V6K
C205
1U_0402_6.3V6K
C206
DDR_B_DQS#2 45 46
DDR_B_DQS2 DQS#2 DM2
47 DQS2 VSS17 48 1 1 1 1
49 50 DDR_B_D22
DDR_B_D18 VSS18 DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS19 DDR_B_D28 2 2 2 2
55 VSS20 DQ28 56
DDR_B_D24 57 58 DDR_B_D29
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_B_DQS#3
VSS22 DQS#3 DDR_B_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
DDR_B_D26 67 68 DDR_B_D30 Layout Note:
69 70
71
DQ27 DQ31
72
Place near JDIMMB
VSS25 VSS26 +1.5V
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
<7> DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB <7>
10U_0603_6.3V6M
C207
10U_0603_6.3V6M
C208
10U_0603_6.3V6M
C209
10U_0603_6.3V6M
C210
10U_0603_6.3V6M
C211
10U_0603_6.3V6M
C212
10U_0603_6.3V6M
330U_D2_2V_Y
C214
75 VDD1 VDD2 76 1
C213
77 78 DDR_B_MA15 1 1 1 1 1 1 1
DDR_B_BS2 NC1 A15 DDR_B_MA14 +
<7> DDR_B_BS2 79 BA2 A14 80
81 82 @
C DDR_B_MA12 VDD3 VDD4 DDR_B_MA11 C
83 A12/BC# A11 84
DDR_B_MA9 DDR_B_MA7 2 2 2 2 2 2 2 2
85 A9 A7 86
87 VDD5 VDD6 88
DDR_B_MA8 89 90 DDR_B_MA6
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 VDD7 VDD8 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 98
A1 A0
99 100
M_CLK_DDR2 VDD9 VDD10 M_CLK_DDR3
<7> M_CLK_DDR2 101 102 M_CLK_DDR3 <7>
M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3
<7> M_CLK_DDR#2 103 104 M_CLK_DDR#3 <7>
CK0# CK1#
105 106
DDR_B_MA10 VDD11 VDD12 DDR_B_BS1
107 108 DDR_B_BS1 <7>
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
<7> DDR_B_BS0 109
BA0 RAS#
110 DDR_B_RAS# <7> Layout Note:
111 112
DDR_B_WE# 113
VDD13 VDD14
114 DDR_CS2_DIMMB# Place near JDIMMB.203,204
<7> DDR_B_WE# WE# S0# DDR_CS2_DIMMB# <7>
<7> DDR_B_CAS# DDR_B_CAS# 115 116 M_ODT2 M_ODT2 <7> +0.75VS
CAS# ODT0
117 118
DDR_B_MA13 VDD15 VDD16 M_ODT3
119 120 M_ODT3 <7>
DDR_CS3_DIMMB# A13 ODT1
<7> DDR_CS3_DIMMB# 121 122
S1# NC2 +VREF_CA
123 124
VDD17 VDD18
1U_0402_6.3V6K
C215
1U_0402_6.3V6K
C216
1U_0402_6.3V6K
C217
1U_0402_6.3V6K
C218
125 126 1 1 1 1
NCTEST VREF_CA
127 128
129 130
DQ32 DQ36
2.2U_0603_6.3V6K
C219
0.1U_0402_16V4Z
C220
DDR_B_D33 131 132 DDR_B_D37
DQ33 DQ37 2 2 2 2
133 134 1 1
135 136
137 138
DQS4 VSS31 DDR_B_D38
139 140
DDR_B_D34 VSS32 DQ38 DDR_B_D39 2 2
141 142
DDR_B_D35 DQ34 DQ39
143 144
DQ35 VSS33 DDR_B_D44
145 146
B DDR_B_D40 VSS34 DQ44 DDR_B_D45 B
147 148
DDR_B_D41 DQ40 DQ45
149 150
DQ41 VSS35 DDR_B_DQS#5
151 152
VSS36 DQS#5 DDR_B_DQS5
153 154
DM5 DQS5
155 156
157 158
159 160
DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
169 170
171 172
DQS6 VSS43 DDR_B_D54
173 174
175 176
+3VS +3VS DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR_B_D60
179 180
181 182
DDR_B_D57 DQ56 DQ61
183 184
DQ57 VSS47
1
0.1U_0402_16V4Z
C221
2.2U_0603_6.3V6K
C222
1 1 185 186 DDR_B_DQS#7

R149 VSS48 DQS#7 DDR_B_DQS7
187 188
10K_0402_5% DM7 DQS7
189 190
191 192
2 2 DDR_B_D59 DQ58 DQ62 DDR_B_D63
193 194
2
DQ59 DQ63
195 196
VSS51 VSS52
197 198
SA0 EVENT# D_CK_SDATA
199 200 D_CK_SDATA <12,14,29>
VDDSPD SDA D_CK_SCLK
201 202 D_CK_SCLK <12,14,29>
SA1 SCL
+0.75VS 203 204 +0.75VS
VTT1 VTT2
1
205 206
R150 G1 G2
A 10K_0402_5% LCN_DAN06-K4926-0100 A
@
2

DDRIII DIMMB
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
A B C D E F G H
1 1
SM010014520 3000ma 220ohm@100mhz DCR 0.04

@ L1 +CLK_3VS
FBMA-L11-201209-221LMA30T_0805 40mil
+3VS 2 1
10U_0603_6.3V6M
C2
0.1U_0402_16V4Z
C3
0.1U_0402_16V4Z
C4
1 1 1 1
@ C1 @ L2 +CLK_1.05VS
40mil
10U_0603_6.3V6M @ @ @ FBMA-L11-201209-221LMA30T_0805
@ L3 +1.05VS_PCH 2 1
2 FBMA-L11-201209-221LMA30T_0805 2 2 2
10U_0603_6.3V6M
C6
0.1U_0402_16V4Z
C7
0.1U_0402_16V4Z
C8
2 1 1 1 1 1
C5 @ @ @ @
10U_0603_6.3V6M
+CLK_1.5VS 2 2 2 2
40mil
+1.5VS @ L4 2 1
1 FBMA-L11-201209-221LMA30T_0805
10U_0603_6.3V6M
C10
0.1U_0402_16V4Z
C11
0.1U_0402_16V4Z
C13
0.1U_0402_16V4Z
C12
1 1 1 1
C9 @
10U_0603_6.3V6M @ @ @ @
2
2 2 2 2
2
Use internal Clock first, reseve external clock. 2
@ U1
+CLK_1.5VS 1 23 CLK_BCLK R2 @ 2 1 33_0402_5% CLK_BUF_CPU_BCLK CLK_BUF_CPU_BCLK <5>

VDD_DOT CPU_0
+CLK_3VS 5 VDD_27
22 CLK_BCLK# R3 @ 2 1 33_0402_5% CLK_BUF_CPU_BCLK#
CPU_0# CLK_BUF_CPU_BCLK# <5>
+CLK_1.05VS 15 VDDSRC_IO
18
VDDCPU_IO
20
CPU_1
+CLK_1.5VS 17
VDDSRC_3.3
24 19
VDDCPU_3.3 CPU_1#
+CLK_3VS 29
VDDREF_3.3
10 CLK_SATA R5 @ 2 1 33_0402_5% CLK_BUF_PCIE_SATA
SRC_1/SATA CLK_BUF_PCIE_SATA <19>
11 CLK_SATA# R6 @ 2 1 33_0402_5% CLK_BUF_PCIE_SATA#
SRC_1/SATA# CLK_BUF_PCIE_SATA# <19>
Silego Have Internal Pull-Up @ R25 0_0402_5%
<12,13,29> D_CK_SDATA D_CK_SDATA 2 1 D_CK_SDATA_R 31 13 CLK_DMI R7 @ 2 1 33_0402_5% CLK_BUF_CPU_DMI
+CLK_3VS SDA SRC_2 CLK_BUF_CPU_DMI <19>
IDT 9LVS3199AKLFT NC
D_CK_SCLK 2 1 D_CK_SCLK_R 32 14 CLK_DMI# R8 @ 2 1 33_0402_5% CLK_BUF_CPU_DMI#
<12,13,29> D_CK_SCLK SCL SRC_2# CLK_BUF_CPU_DMI# <19>
@ R26 0_0402_5%
@R9
@ R9 1 2 10K_0402_5% H_STP_CPU# 3 CLK_96M R10 @ 2 1 33_0402_5% CLK_BUF_DREF_96M CLK_BUF_DREF_96M <19>
H_STP_CPU# DOT_96
16
CPU_STOP# CLK_96M#
DOT_96#
4 R11 @ 2 1 33_0402_5% CLK_BUF_DREF_96M# CLK_BUF_DREF_96M# <19>
@ R12
0_0402_5%
2 1 CK505_PWRGD 25
<20,33,44> VGATE CKPWRGD/PD#
6
27MHz
7
3 27MHz_SS 3
CLK_XTAL_OUT
CLK_XTAL_IN 28
CLK_XTAL_IN XTAL_IN
Y1
CLK_XTAL_OUT 27
XTAL_OUT
2 1
2
14.31818MHZ_20P_1BX14318BE1A @ R15
@R15 VSS_DOT
8
@ 33_0402_5% VSS_27
2 2 9
CLK_BUF_ICH_14M REF_0/CPU_SEL 30 VSS_SATA
<19> CLK_BUF_ICH_14M 2 1 12
C15 C14 REF_0/CPU_SEL VSS_SRC
21
33P_0402_50V8J 33P_0402_50V8J VSS_CPU
26
1 1 VSS_REF
33
EP
@ @
SLG8SP585VTR_QFN32_5X5
Standard
IDT: 9LRS3199AKLFT, SA000030P00
SILEGO: SLG8SP587V(WF), SA00002XY10
IDT Have Internal Pull-Down

FOR Realtek
R16 1 2 10K_0402_5% REF_0/CPU_SEL
@
4 4
PIN 30 CPU_0 CPU_1
0 (Default) 133MHz 133MHz
1 100MHz 100MHz
Clock Generator (CK505)
Custom 1.0
PBL20 LA6772P M/B
A B C D E F G H
5 4 3 2 1
+LCD_VDD
1
@ 0_0402_5% R1440 R698
1 2 LCD_BL_PWM 2 1 +3VS 300_0603_5% +3VS
<33> INVT_PWM +3VS
R1438 4.7K_0402_5%
6 2
<21> VGA_BL_PWM 2 1 Vds=-20V
1
1 Id=-3A
D 0_0402_5% R1441 D
C958 Q61A R688 2 Rds=130m ohm
180P_0402_50V8J 2N7002DW-T/R7_SOT363-6 2 100K_0402_5% C908
2 0.1U_0402_16V7K Vgs=-4.5
3
S
Vth=-1
1
1 G
Q18
1 2 2
3
R697 47K_0402_5% AO3413_SOT23
D
2
1
Q61B C712
2 1 5 0.01U_0402_25V7K +LCD_VDD
<21> VGA_ENVDD
R1379 2N7002DW-T/R7_SOT363-6 1
W=80mils
4
0_0402_5% 1 L24 2 +LCDVDD_R
1 1 0_0805_5%
1
1 1
@ C711 C713 C710 C709
R693 4.7U_0805_10V4Z 0.1U_0402_16V4Z
100K_0402_5% 2 2 4.7U_0805_10V4Z 0.1U_0402_16V4Z
2 2
2
Close to JLVDS
C
LCD/PANEL BD. Conn. C
W=30mils
@ C912 47P_0402_50V8J
R1427 0_0603_5% 2 1
+3VS 2 1
R1426 0_0603_5% @ JLVDS

+5VS 2 1 2
2 1
1
USB20_P10_R 4 3 LCD_TXCLK+
4 3 LCD_TXCLK+ <21>
USB20_N10_R 6 5 LCD_TXCLK-
6 5 LCD_TXCLK- <21>
8 7
LCD_TXOUT0+ 8 7 LCD_TZCLK+
<21> LCD_TXOUT0+ 10 9 LCD_TZCLK+ <21>
LCD_TXOUT0- 10 9 LCD_TZCLK-
<21> LCD_TXOUT0- 12 11 LCD_TZCLK- <21>
LCD_TXOUT1+ 12 11
<21> LCD_TXOUT1+ 14 13
LCD_TXOUT1- 14 13 EDID_CK R1382 1
<21> LCD_TXOUT1- 16 15 2 0_0402_5% LCD_EDID_CLK <21>
R432 0_0402_5% LCD_TXOUT2+ 16 15 EDID_DAT R1392 1
<21> LCD_TXOUT2+ 18
18 17
17 2 0_0402_5% LCD_EDID_DATA <21>
2 1 LCD_TXOUT2- 20 19
<21> LCD_TXOUT2- 20 19
22 21
USB20_P10_R LCD_TZOUT0+ 22 21 +3VS
<22> USB20_P10 3 4 <21> LCD_TZOUT0+ 24 23
3 4 LCD_TZOUT0- 24 23 LCD_BL_PWM
<21> LCD_TZOUT0- 26 25
L26 WCM2012F2SF-900T04_0805 LCD_TZOUT1+ 26 25
<21> LCD_TZOUT1+ 28 27
28 27
1
@2 1 USB20_N10_R LCD_TZOUT1- 30 29 1 1
<22> USB20_N10 2 1 <21> LCD_TZOUT1- 30 29 100K_0402_5%
<21> LCD_TZOUT2+ LCD_TZOUT2+ 32 31 +LCDVDD_R @
LCD_TZOUT2- 32 31 BKOFF#_R C399 C714 R1191
2 1 <21> LCD_TZOUT2- 34 33
34 33 0.1U_0402_16V4Z 0.1U_0402_16V4Z
36 35
R433 0_0402_5% 36 35 +LCD_INV B+ 2 2
38 37
2
38 37
2
+LCD_INV 40 39 L23
40 39
42 41 2 1
GND2GND1 FBMA-L11-201209-221LMA30T_0805 8/25 For +3VS leakage
ACES_87142-4041-BS 1 1.5A 1 Rated Current 1MAX:3000mA
B @ B
C715 C319 @ C400
PJDLC05C_SOT23-3 68P_0402_50V8J 0.1U_0402_25V4K 680P_0402_50V7K
D21 2 2 2
1
R27
33_0402_5%
2 1 BKOFF#_R
<33> BKOFF#
1
R1421
10K_0402_5%
2
A A

LVDS Connector
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
A B C D E
1
1 1
D30 D31
@ @
PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
+3VS
+CRT_VCC
2
2
2
CRT@
CRT@ R700 L18 CRT@
R699 1 2 CRT_R_L
<21> VGA_CRT_R
4.7K_0402_5%
4.7K_0402_5%
NBQ100505T-800Y_0402
1
L19 CRT@
1 2 CRT_G_L
<21> VGA_CRT_G
NBQ100505T-800Y_0402
2
CRT@
Q157A L20 CRT@
<21> VGA_CRT_DATA 1 6 CRT_DDC_DAT 1 2 CRT_B_L
<21> VGA_CRT_B
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
NBQ100505T-800Y_0402
5
2N7002DW-T/R7_SOT363-6
150_0402_1%
150_0402_1%
150_0402_1%
CRT@ Q157B 1 1 1 1 1 1
1
<21> VGA_CRT_CLK 4 3 CRT_DDC_CK
1 1 R701 R702 R703 C723 C722 C720 C724 C721 C719
1 1 2N7002DW-T/R7_SOT363-6 CRT@ CRT@ CRT@ CRT@ CRT@ CRT@ CRT@ CRT@ CRT@
@ C717 @ C716 2 2 2 2 2 2
@C866
@ C866 @ C867 470P_0402_50V8J 470P_0402_50V8J
2
33P_0402_50V8K 33P_0402_50V8K 2 2
2 2
2 2
+5VS
40mil
D58 +CRT_VCC_R +CRT_VCC
2 F3 CRT@
1 1 2
3 RB491D_SOT23-3 1
CRT@ 1.1A_6V_MINISMDC110F-2
C718
0.1U_0402_16V4Z
@ 2
+CRT_VCC
CRT@ R1436 10K_0402_5%
1 2 2 1
C725 CRT@
5
1
0.1U_0402_16V4Z
CRT@
OE#
P
2 4 D_CRT_HSYNC 1 2 HSYNC
<21> VGA_CRT_HSYNC A Y L21 10_0402_5%
G
3 U46 3
SN74AHCT1G125GW_SOT353-5 JCRT
3
+CRT_VCC CRT@ 6
PAD T76 CRT_TEST1 RGND
11
CRT@ CRT_R_L ID0
1
Red
1 2 7
GGND
C868 CRT_DDC_DAT 12
SDA
5
1
0.1U_0402_16V4Z CRT_G_L 2
CRT@ Green
8
OE#
P
D_CRT_VSYNC1 VSYNC HSYNC BGND

<21> VGA_CRT_VSYNC 2 4 2 13
A Y L22 10_0402_5% CRT_B_L Hsync
3
Blue
G
U45 +CRT_VCC 9
+5V
10P_0402_50V8J
10P_0402_50V8J
SN74AHCT1G125GW_SOT353-5 VSYNC 14
3
CRT@ PAD T75 CRT_TEST2 Vsync

1 1 4
res
10
@ C726 @ C727
@C727 CRT_DDC_CK SGND
15
SCL
5
2 2 GND
16
GND
17
GND
SUYIN_070546FR015S293ZR
@
4 4

CRT Connector
Custom 1.0
PBL20 LA6772P M/B
A B C D E
5 4 3 2 1
For EMI
Change 90 ohm
P/N:SM070000K00
VGA_DVI_TXC- 1 @ 2 R225 HDMI_R_CK-
0_0402_5% +5VS_HDMI
D L14 HDMI@ RB161M-20_SOD123-2 D32 @ D
1
1 2 2 +5VL 2 1 40mil
1.1A_6V_MINISMDC110F-2
4 3 RB161M-20_SOD123-2 D53 HDMI@ F2 HDMI@
4 3
+5VS 2 1 2 1 +HDMI_5V_OUT
WCM-2012-121T_0805 1
VGA_DVI_TXC+ 1 @ 2 R227 HDMI_R_CK+ C308
0_0402_5% HDMI@
0.1U_0402_16V4Z
2
+3VS
VGA_DVI_TXD0- 1 @ 2 R237 HDMI_R_D0-
1
0_0402_5%
L15 HDMI@ R1568
1 1M_0402_5%
1 2 2
2
2N7002_SOT23-3
2
4 3 Q16 HDMI@
4 3 HDMI_HPD 1 3 VGA_HDMI_HPD <21>
WCM-2012-121T_0805
S
VGA_DVI_TXD0+ 1 @ 2 R236 HDMI_R_D0+
2
0_0402_5% C728 2
HDMI@ HDMI@
+3VS +3VS 20K_0402_1%
0.1U_0402_16V4Z
+HDMI_5V_OUT R573
VGA_DVI_TXD1- 1 @ 2 R249 HDMI_R_D1- 1
1
0_0402_5%
L12 HDMI@
1
1
1
1
1 1 2 2 R1328 R1329 R1332 R1331
2
2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
HDMI@ HDMI@ HDMI@ HDMI@
G
4 4 3 3
C C
2
2
2
2
WCM-2012-121T_0805 HDMI_SCLK 1 3 VGA_HDMI_CLK <21>
2
0_0402_5% Q182 BSH111_SOT23-3
G S
BSH111_SOT23-3 HDMI@
HDMI@ Q183
VGA_DVI_TXD2- 1 @ 2 R251 HDMI_R_D2- HDMI_SDATA 1 3 VGA_HDMI_DATA <21>
0_0402_5%
L13 HDMI@
S
1
1 2 2
4 3
4 3
WCM-2012-121T_0805
0_0402_5%
HDMI_R_CK+ 1 2
R1560
HDMI_R_CK- 1
680_0402_5%
2
Intel spec suggest HDMI Connector
R1561 680_0402_5%
HDMI_R_D1- 1 2
to use 680 ohm JHDMI
R1562 680_0402_5% HDMI_HPD 19
HDMI_R_D1+ 1 HP_DET
2 +HDMI_5V_OUT 18
R1563 680_0402_5% +5V
17
HDMI_R_D0- 1 HDMI_SDATA DDC/CEC_GND
2 16
SDA
R1564 680_0402_5% HDMI_SCLK 15
HDMI_R_D0+ 1 SCL
2 14
Reserved
R1565 680_0402_5% 13
HDMI_R_D2+ 1 HDMI_R_CK- CEC
2 12
CK- GND
20
R1566 680_0402_5% 11 21
B HDMI_R_D2- 1 HDMI_R_CK+ CK_shield GND B
2 10 22
R1567 680_0402_5% HDMI_R_D0- CK+ GND
9 23
D0- GND
1
D HDMI@ 8
Q15 HDMI_R_D0+ D0_shield
+3VS 2 7
D0+
CV178 1 2 0.1U_0402_16V7K HDMI@ VGA_DVI_TXC- G 2N7002_SOT23-3 HDMI_R_D1- 6
<21> PCIE_MTX_GRX_HDMI_N3 D1-
CV174 1 2 0.1U_0402_16V7K HDMI@ VGA_DVI_TXD2- S 5
3
<21> PCIE_MTX_GRX_HDMI_N0 VGA_DVI_TXD1- HDMI_R_D1+ D1_shield
CV172 1 2 0.1U_0402_16V7K HDMI@ 1 HDMI@ 2 4
<21> PCIE_MTX_GRX_HDMI_N1 VGA_DVI_TXD0- HDMI_R_D2- D1+
CV179 1 2 0.1U_0402_16V7K HDMI@ 1 R704 100K_0402_5% 3
<21> PCIE_MTX_GRX_HDMI_N2 D2-
C309 2
HDMI_R_D2+ D2_shield
1
CV176 1 VGA_DVI_TXC+ D2+
<21> PCIE_MTX_GRX_HDMI_P3 2 0.1U_0402_16V7K HDMI@ 0.1U_0402_16V4Z
CV175 1 2 0.1U_0402_16V7K HDMI@ VGA_DVI_TXD2+ 2 HDMI@ SUYIN_100042MR019S153ZL
<21> PCIE_MTX_GRX_HDMI_P0 VGA_DVI_TXD1+
CV173 1 2 0.1U_0402_16V7K HDMI@ @
<21> PCIE_MTX_GRX_HDMI_P1 VGA_DVI_TXD0+
CV177 1 2 0.1U_0402_16V7K HDMI@
<21> PCIE_MTX_GRX_HDMI_P2
A A

HDMI Level Shift & Conn
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
PCH_RTCX1
1 2 PCH_RTCX2
R151 10M_0402_5%
32.768KHZ_12.5PF_Q13MC14610002
1
4
Y2
OSC
OSC
18P_0402_50V8J
1 1
NC
NC C225 CMOS
C224 18P_0402_50V8J
2
D 2 2 U4A D
SHORT PADS
JCMOS1
+RTCVCC PCH_RTCX1 A20 C38 LPC_AD0
1 RTCX1 FWH0 / LAD0 LPC_AD0 <28,33>
1
A38 LPC_AD1
LPC
PCH_RTCX2 FWH1 / LAD1 LPC_AD2 LPC_AD1 <28,33>
C226 C20 B37
1U_0603_10V6K RTCX2 FWH2 / LAD2 LPC_AD3 LPC_AD2 <28,33>
C37
2
+RTCVCC 2 PCH_RTCRST# FWH3 / LAD3 LPC_AD3 <28,33>
1 2 D20
RTCRST#
R177 20K_0402_5% D36 LPC_FRAME#
FWH4 / LFRAME# LPC_FRAME# <28,33>
R170 1 2 1M_0402_5% SM_INTRUDER# 1 2 PCH_SRTCRST# G22
R180 20K_0402_5% SRTCRST#
1 E36
RTC
LDRQ0#
1
SHORT PADS
JME1
R171 1 2 330K_0402_5% PCH_INTVRMEN SM_INTRUDER# K22 K36
C227 INTRUDER# LDRQ1# / GPIO23
1U_0603_10V6K PCH_INTVRMEN SERIRQ
INTVRMEN C17 V5 SERIRQ <28,33>
2
INTVRMEN SERIRQ
Κ
2
* Κ H Integrated VRM enable +3VS

L Integrated VRM disable AM3 SATA_PRX_C_DTX_N0
SATA0RXN SATA_PRX_C_DTX_N0 <27>
2
G
Q10 HDA_BIT_CLK N34 AM1 SATA_PRX_C_DTX_P0
HDA_BCLK SATA0RXP SATA_PRX_C_DTX_P0 <27>
SATA 6G
(INTVRMEN should always be pull high.) BSS138_NL_SOT23-3 AP7 SATA_PTX_DRX_N0
HDA_SYNC SATA0TXN SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 <27>
3 1 L34 AP5 SATA_PTX_DRX_P0 <27>
HDA_SYNC SATA0TXP
S
D
+3VS HDA_SPKR
<31> HDA_SPKR T10 SPKR SATA1RXN AM10 NB HDD
SATA1RXP AM8
R176 1 @ 2 1K_0402_5% HDA_SPKR 1 2 HDA_RST# K34 AP11
HDA_RST# SATA1TXN
SATA1TXP AP10
HIGH= Enable ( No Reboot ) @ R188
LOW= Disable (Default) 0_0402_5% <31> HDA_SDIN0 HDA_SDIN0 E34 AD7 SATA_PRX_C_DTX_N2
* HDA_SDIN0 SATA2RXN
SATA2RXP AD5 SATA_PRX_C_DTX_P2 SATA_PRX_C_DTX_N2 <27>
SATA_PRX_C_DTX_P2 <27>
G34 AH5 SATA_PTX_DRX_N2
+3VALW_PCH HDA_SDIN1 SATA2TXN SATA_PTX_DRX_N2 <27>
@ R179 AH4 SATA_PTX_DRX_P2
HDA_SYNC_R
SATA2TXP SATA_PTX_DRX_P2 <27>

1K_0402_5% C34
IHDA
HDA_SDOUT R172 HDA_SDIN2
2 1 AB8
@ R178 SATA3RXN
C 0_0402_5%
1 2 A34 HDA_SDIN3 SATA3RXP AB10 NB ODD C
SATA3TXN AF3
<33> HDA_SDO 2 1 1M_0402_5% AF1
HDA_SDOUT SATA3TXP
A36
SATA
HDA_SDO
HDA_SDO SATA4RXN Y7
Y5
SATA4RXP +3VS
ME debug mode,this signal has a weak internal PD C36 HDA_DOCK_EN# / GPIO33 SATA4TXN AD3
Low = Disabled (Default) Prevent back drive issue. AD1
* High = Enabled [Flash Descriptor Security Overide] <29> PCH_KILL_SW#
PCH_KILL_SW# N32
HDA_DOCK_RST# / GPIO13
SATA4TXP
Y3 BBS_BIT0_R R182 2 1 10K_0402_5%
R189 SATA5RXN
Y1
+3VALW_PCH 51_0402_5% SATA5RXP SERIRQ R174
SATA5TXN
AB3 2 1 10K_0402_5%
2 1 PCH_JTAG_TCK J3 AB1
JTAG_TCK SATA5TXP
R181 2 1 1K_0402_5% HDA_SYNC SATA_LED# R175 2 1 10K_0402_5%
PCH_JTAG_TMS H7 Y11 R192 +1.05VS_VCC_SATA
JTAG
JTAG_TMS SATAICOMPO 37.4_0402_1%
This signal has a weak internal pull-down
PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
JTAG_TDI SATAICOMPI
On Die PLL VR Select is supplied by For EMI C929
PCH_JTAG_TDO H1 PCH_GPIO21 @ R205 2 1 10K_0402_5%
JTAG_TDO +1.05VS_SATA3 +3VS
1.5V when smapled high 2 1 AB12 R195
* 1.8V when sampled low
SATA3RCOMPO 49.9_0402_1%
@ AB13 SATA3_COMP 1 2
Needs to be pulled High for Huron River platfrom 10P_0402_50V8J SATA3COMPI R207 2 1 10K_0402_5%
PCH_SPI_CLK 1 2 PCH_SPICLK T3 AH1 RBIAS_SATA3 1 2

<28> PCH_SPI_CLK SPI_CLK SATA3RBIAS
R184 R1457 0_0402_5% R200 750_0402_1%
33_0402_5% PCH_SPI_CS0# Y14
<28> PCH_SPI_CS0# SPI_CS0#
<31> HDA_BITCLK_AUDIO 1 2 HDA_BIT_CLK
R186 T1
SPI
33_0402_5% SPI_CS1# SATA_LED#
P3 SATA_LED# <34>
HDA_SYNC_R SATALED#
<31> HDA_SYNC_AUDIO 1 2
R190 PCH_SPI_MOSI V4 V14 PCH_GPIO21
<28> PCH_SPI_MOSI SPI_MOSI SATA0GP / GPIO21
33_0402_5%
B B
<31> HDA_RST_AUDIO# 1 2 HDA_RST# <28> PCH_SPI_MISO
PCH_SPI_MISO U3 P1 BBS_BIT0_R T72 PAD
R191 SPI_MISO SATA1GP / GPIO19
33_0402_5%
<31> HDA_SDOUT_AUDIO 1 2 HDA_SDOUT COUGARPOINT_FCBGA989~D XDP Connector @ JXDP1
1
1
2
2
3
+3VALW_PCH +3VALW_PCH +3VALW_PCH 3
4
4
5
R399 5
6
6
1
0_0402_5% 7
R197 R198 R199 XDP_RSMRST# 7
<20,33> PCH_RSMRST# 2 1 8
8
200_0402_5% 200_0402_5% 200_0402_5% 1 2 XDP_HOOK1 9
<20,33> PBTN_OUT# 9
@ R264 0_0402_5% 10
10
11
2
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI 11

+1.05VS_VCCP 1 2 12
@ R398 0_0402_5% 12
13
13
1
+3VS 14
R201 R203 14
R202 15
XDP_DBRESET# 15
100_0402_1% 100_0402_1% 100_0402_1% <5,20> XDP_DBRESET# 16
16
17
PCH_JTAG_TDO 17
18
2
18
19
PCH_JTAG_TDI 19
20
PCH_JTAG_TMS 20
21
21
22
22
23
PCH_JTAG_TCK 23
24
24
W=20mils trace width 10mil W=20mils 25
25 G1
27
26 28
+RTCBATT +CHGRTC +RTCVCC 26 G2
A ACES_87152-26051 A
D1
R209 2
1K_0402_5%
2 1 1
BAS40-04_SOT23-3
C230
1 Security Classification Compal Secret Data Compal Electronics, Inc.
1U_0603_10V6K
Place CH7 close to PCH. 2
PCH (1/8) SATA,HDA,SPI, LPC, XDP
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
U4B +3VALW_PCH
<30> PCIE_PRX_C_LANTX_N1 BG34 LID_SW_OUT# R210 1 2 10K_0402_5%

PERN1 LID_SW_OUT#
<30> PCIE_PRX_C_LANTX_P1 BJ34 PERP1 SMBALERT# / GPIO11 E12 LID_SW_OUT# <33>
LAN C223 1 2 0.1U_0402_16V7K PCIE_PTX_LANRX_N1 AV32 DRAMRST_CNTRL_PCH R211 1 2 1K_0402_5%
<30> PCIE_PTX_C_LANRX_N1 PCIE_PTX_LANRX_P1 PETN1 PCH_SMBCLK
C228 1 2 0.1U_0402_16V7K AU32 H14
<30> PCIE_PTX_C_LANRX_P1 PETP1 SMBCLK PCH_SMBCLK <12> PCH_SMBCLK R212 1 2 2.2K_0402_5%
<29> PCIE_PRX_WLANTX_N2 BE34 C9 PCH_SMBDATA PCH_SMBDATA <12>
PERN2 SMBDATA PCH_SMBDATA R213 2.2K_0402_5%
<29> PCIE_PRX_WLANTX_P2 BF34 PERP2 1 2
WLAN C231 1 2 0.1U_0402_16V7K PCIE_PTX_WLANRX_N2 BB32
<29> PCIE_PTX_C_WLANRX_N2 PCIE_PTX_WLANRX_P2 PETN2 PCH_GPIO74
C229 1 2 0.1U_0402_16V7K AY32 R214 1 2 10K_0402_5%
SMBUS
<29> PCIE_PTX_C_WLANRX_P2 PETP2 DRAMRST_CNTRL_PCH
A12 DRAMRST_CNTRL_PCH <7>
SML0ALERT# / GPIO60 PCH_SML1CLK R215 2.2K_0402_5%
BG36 1 2
PERN3 PCH_SML0CLK
BJ36 C8
D PERP3 SML0CLK PCH_SML1DATA R216 2.2K_0402_5% D
AV34 1 2
PETN3 PCH_SML0DATA
AU34 G12
PETP3 SML0DATA PCH_GPIO47 R217 10K_0402_5%
1 2
BF36
PERN4 PCH_SML0CLK R242 2.2K_0402_5%
BE36 1 2
PERP4 PCH_GPIO74
AY34 C13
PETN4 SML1ALERT# / PCHHOT# / GPIO74 PCH_SML0DATA R244 2.2K_0402_5%
BB34 1 2
PETP4 PCH_SML1CLK
E14
PCI-E*
PCIE_PRX_NEWTX_N5 SML1CLK / GPIO58
<29> PCIE_PRX_NEWTX_N5 BG37
NEW@ PCIE_PRX_NEWTX_P5 PERN5 PCH_SML1DATA
<29> PCIE_PRX_NEWTX_P5 BH37 M16
C499 2 PCIE_PTX_NEWRX_N5 PERP5 SML1DATA / GPIO75
NewCard <29> PCIE_PTX_C_NEWRX_N5 1 0.1U_0402_16V7K AY36
PETN5
C500 2 1 0.1U_0402_16V7K PCIE_PTX_NEWRX_P5 BB36
<29> PCIE_PTX_C_NEWRX_P5 PETP5
NEW@ Q11A
BJ38 PERN6
BG38 2N7002DW-T/R7_SOT363-6
Controller
PERP6 PCH_SML1CLK EC_SMB_CK2
AU36 PETN6 CL_CLK1 M7 6 1 EC_SMB_CK2 <33>
AV36 PETP6
Link
BG40 T11
2
PERN7 CL_DATA1 Q11B
BJ40 PERP7
AY40 2N7002DW-T/R7_SOT363-6
PETN7 PCH_SML1DATA 3 EC_SMB_DA2
BB40 PETP7 CL_RST1# P10 4 EC_SMB_DA2 <33>
BE38 PERN8
BC38
5
PERP8
AW38 PETN8 +3VS
AY38 PETP8
M10 PCH_GPIO47
PEG_A_CLKRQ# / GPIO47
Y40 CLKOUT_PCIE0N
Y39 CLKOUT_PCIE0P
CLKOUT_PEG_A_N AB37
CLOCKS
C PCH_GPIO73 C
J2 PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P AB38
R152 1 2 0_0402_5% CLK_R_WLAN# AB49 AV22 CLK_CPU_DMI# CLK_BUF_CPU_DMI# R238 1 2 10K_0402_5%

<29> CLK_WLAN# CLK_R_WLAN CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI CLK_CPU_DMI# <5> CLK_BUF_CPU_DMI
R1212 1 2 0_0402_5% AB47 AU22 R239 1 2 10K_0402_5%
<29> CLK_WLAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI <5>
WLAN CLKREQ_WLAN# CLKIN_DMI2#
<29> CLKREQ_WLAN# M1 R241 1 2 10K_0402_5%
PCIECLKRQ1# / GPIO18 T73 PAD CLKIN_DMI2 R243 10K_0402_5%
AM12 1 2
+3VS CLKOUT_DP_N / CLKOUT_BCLK1_N T74 PAD
AM13
CLKOUT_DP_P / CLKOUT_BCLK1_P CLK_BUF_DREF_96M# R245 10K_0402_5%
AA48 1 2
R218 CLKREQ_WLAN# CLKOUT_PCIE2N CLK_BUF_DREF_96M
2 1 10K_0402_5% AA47
CLKOUT_PCIE2P
R246 1 2 10K_0402_5%
BF18 CLK_BUF_CPU_DMI#
PCH_GPIO20 PCH_GPIO20 CLKIN_DMI_N CLK_BUF_CPU_DMI CLK_BUF_CPU_DMI# <14> CLK_BUF_PCIE_SATA#
R220 2 1 10K_0402_5% V10 BE18 R248 1 2 10K_0402_5%
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P CLK_BUF_CPU_DMI <14> CLK_BUF_PCIE_SATA R250 1 2 10K_0402_5%
R1213 1 2 0_0402_5% CLK_R_LAN# Y37 BJ30 CLKIN_DMI2# CLK_BUF_ICH_14M R252 1 2 10K_0402_5%

<30> CLK_LAN# CLKOUT_PCIE3N CLKIN_DMI2_N
R1214 1 2 0_0402_5% CLK_R_LAN Y36 BG30 CLKIN_DMI2
<30> CLK_LAN CLKOUT_PCIE3P CLKIN_DMI2_P
LAN
<30> CLKREQ_LAN# A8
PCIECLKRQ3# / GPIO25 CLK_BUF_DREF_96M#
G24 CLK_BUF_DREF_96M# <14>
CLKIN_DOT_96N CLK_BUF_DREF_96M
E24 CLK_BUF_DREF_96M <14>
CLK_NEW# CLKIN_DOT_96P
<29> CLK_NEW# Y43
CLK_NEW CLKOUT_PCIE4N
NewCard <29> CLK_NEW Y45
CLKOUT_PCIE4P CLK_BUF_PCIE_SATA#
AK7 CLK_BUF_PCIE_SATA# <14>
CLKREQ_NEW# CLKIN_SATA_N / CKSSCD_N CLK_BUF_PCIE_SATA
<29> CLKREQ_NEW# L12 AK5 CLK_BUF_PCIE_SATA <14>
PCIECLKRQ4# / GPIO26 CLKIN_SATA_P / CKSSCD_P
XTAL25_IN
V45 K45 CLK_BUF_ICH_14M
+3VALW_PCH CLKOUT_PCIE5N REFCLK14IN CLK_BUF_ICH_14M <14>
V46 XTAL25_OUT 1 2
CLKOUT_PCIE5P R255 1M_0402_5%
R224 2 1 10K_0402_5% PCH_GPIO73 PCH_GPIO44 L14 H45 CLK_PCI_LPBACK
PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK <22>
Y3
B R226 CLKREQ_LAN# B
2 1 10K_0402_5% 2 1
AB42 V47 XTAL25_IN
R228 CLKREQ_NEW# CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT
2 1 10K_0402_5% AB40 V49 1 25MHZ_20PF_7A25000012 1
CLKOUT_PEG_B_P XTAL25_OUT
R229 2 1 10K_0402_5% PCH_GPIO44 PCH_GPIO56 E6 R256 +1.05VS_VCCDIFFCLKN C239 C240
PEG_B_CLKRQ# / GPIO56 90.9_0402_1% 18P_0402_50V8J 18P_0402_50V8J
R230 2 1 10K_0402_5% PCH_GPIO45 Y47 XCLK_RCOMP 1 2 2 2
XCLK_RCOMP
V40
R231 PCH_GPIO46 CLKOUT_PCIE6N
2 1 10K_0402_5% V42
CLKOUT_PCIE6P
R235 2 1 10K_0402_5% PCH_GPIO56 PCH_GPIO45 T13
PCIECLKRQ6# / GPIO45
V38 K43 CLK_FLEX0 T70 PAD
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
FLEX CLOCKS
V37
CLKOUT_PCIE7P CLK_FLEX1 T69 PAD
F47
PCH_GPIO46 CLKOUTFLEX1 / GPIO65
K12
PCIECLKRQ7# / GPIO46 CLK_FLEX2 R299
H47 1 2 0_0402_5%
R258 @ CLK_BCLK_ITP# CLKOUTFLEX2 / GPIO66 CLK_48M_CR <32>
<10> CLK_RES_ITP# 2 1 0_0402_5% AK14
R260 @ CLK_BCLK_ITP CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_FLEX3
<10> CLK_RES_ITP 2 1 0_0402_5% AK13 K49 T71 PAD
CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLKOUTFLEX3 / GPIO67
COUGARPOINT_FCBGA989~D For EMI @ R265 @ C241

33_0402_5% 22P_0402_50V8J
CLK_BUF_ICH_14M 2 1 1 2
@ R269 @ C242
33_0402_5% 22P_0402_50V8J
CLK_PCI_LPBACK 2 1 1 2
A A
Security Classification Compal Secret Data

PCH (2/8) PCIE, SMBUS, CLK
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
D D
U4C
DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0

<6> DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 <6>
DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1
<6> DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 <6>
<6> DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2 FDI_CTX_PRX_N2 <6>
DMI_CTX_PRX_N3 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N3
<6> DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3 <6>
DMI3RXN FDI_RXN3 FDI_CTX_PRX_N4
BC12 FDI_CTX_PRX_N4 <6>
DMI_CTX_PRX_P0 FDI_RXN4 FDI_CTX_PRX_N5
<6> DMI_CTX_PRX_P0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_CTX_PRX_N5 <6>
DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6 For ESD
<6> DMI_CTX_PRX_P1 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 <6>
DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7
<6> DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 <6>
<6> DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 BJ20 H_PM_SYNC 2 1
DMI3RXP FDI_CTX_PRX_P0
FDI_RXP0 BG14 FDI_CTX_PRX_P0 <6>
DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1 220P_0402_50V8K C23
<6> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 <6>
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 FDI_CTX_PRX_P3 <6>
<6> DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P4
AV18 BE12
DMI
FDI
BG12 FDI_CTX_PRX_P5 FDI_CTX_PRX_P5 <6>
DMI_CRX_PTX_P0 FDI_RXP5 FDI_CTX_PRX_P6
<6> DMI_CRX_PTX_P0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_CTX_PRX_P6 <6>
DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7
<6> DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 <6> +RTCVCC
DMI_CRX_PTX_P2 AY18
<6> DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI2TXP
<6> DMI_CRX_PTX_P3 AU18 DMI3TXP
AW16 FDI_INT
FDI_INT FDI_INT <6> DSWODVREN R272 2 1 330K_0402_5%
+1.05VS_PCH BJ24 AV12 FDI_FSYNC0
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 <6>
R273 2 @ 1 330K_0402_5%
1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1
Κ
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 <6>
R274 49.9_0402_1% DSWODVREN - On Die DSW VR Enable
Κ
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0 H Enable
C R275 750_0402_1% DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 <6> * L Disable
C
4mil width and place BB10 FDI_LSYNC1

FDI_LSYNC1 FDI_LSYNC1 <6>
within 500mil of the PCH
@ R277
A18 DSWODVREN 0_0402_5%
DSWVRMEN
1 2 PCH_RSMRST#_R
+3VALW_PCH
System Power Management

<33> SUSACK# 1 2 SUSACK#_R C12
SUSACK# DPWROK
E22 EC_DPWROK
EC_DPWROK <33>
R278 0_0402_5% R281 WAKE# R279 1 2 10K_0402_5%
0_0402_5%
<5,18> XDP_DBRESET# 1 2 PCH_DBRESET#_R K3 B9 WAKE# 1 2 PCH_PCIE_WAKE# <29,30> PCH_GPIO29 R282 1 @ 2 10K_0402_5%
R280 0_0402_5% SYS_RESET# WAKE#
SYS_PWROK P12 N3 PM_CLKRUN#

+3VS SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUN# <28>
+3VS
PM_PWROK 1 2 PM_PWROK_R L22 G8 SUS_STAT# R305 1 @ 2 8.2K_0402_5%
PWROK SUS_STAT# / GPIO61 SUS_STAT# <28>
5
U6 R285 0_0402_5%
PM_CLKRUN# R284 2 1 10K_0402_5%
VCC
1 1 2 APWROK L10 N14 SUSCLK

<33> PM_PWROK IN1 <33> PCH_APWROK APWROK SUSCLK / GPIO62 SUSCLK <33>
4 R286 0_0402_5%
OUT SYS_PWROK <5>
2 T13 PAD
GND
<14,33,44> VGATE IN2 PM_DRAM_PWRGD B13 D10 PM_SLP_S5#

<5> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# <33>
MC74VHC1G08DFT2G_SC70-5 T14 PAD
3
1 2 PCH_RSMRST#_R C21 H4 PM_SLP_S4#

<18,33> PCH_RSMRST# RSMRST# SLP_S4# PM_SLP_S4# <33>
R288 0_0402_5%
T15 PAD
R276 2 1 10K_0402_5% SYS_PWROK 1 2 SUSWARN#_R K16 F4 PM_SLP_S3#
<33> SUSWARN# SUSWARN# / SUS_PWR_DN_ACK / GPIO30 SLP_S3# PM_SLP_S3# <33>
R290 0_0402_5%
Can be left NC
B PBTN_OUT#_R B
<18,33> PBTN_OUT# 1 2 E20 G10 when IAMT is not
R291 0_0402_5% PWRBTN# SLP_A#
support on the
T16 PAD
PCH_ACIN PM_SLP_SUS# platfrom
<33,37> ACIN 1 2 H20
ACPRESENT / GPIO31 SLP_SUS#
G16 PM_SLP_SUS# <33>
D2 CH751H-40PT_SOD323-2
T17 PAD
PCH_GPIO72 E10 AP14 H_PM_SYNC
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <5>
R283
0_0402_5% RI# A10 K14 PCH_GPIO29
SUSACK#_R SUSWARN#_R RI# SLP_LAN# / GPIO29
2 1
@
COUGARPOINT_FCBGA989~D
+3VALW_PCH
R289 2 1 200_0402_5% PM_DRAM_PWRGD
R292 2 1 10K_0402_5% SUSWARN#
R293 2 1 330K_0402_5% PCH_ACIN

A R294 PCH_GPIO72 A
2 1 10K_0402_5%
R295 2 1 10K_0402_5% RI#
R296 2 1 10K_0402_5% PCH_RSMRST# Security Classification Compal Secret Data Compal Electronics, Inc.
PCH (3/8) DMI,FDI,PM,
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
ENBKL R297 2 1 0_0402_5% IGPU_BKLT_EN

<33> ENBKL
2
R298
100K_0402_5%
1
D D
Pull high at LVDS conn side.

U4D
IGPU_BKLT_EN J47 AP43
+3VS L_BKLTEN SDVO_TVCLKINN
<15> VGA_ENVDD M45 AP45
L_VDD_EN SDVO_TVCLKINP
R300 1 2 2.2K_0402_5% CTRL_CLK P45 AM42
<15> VGA_BL_PWM L_BKLTCTL SDVO_STALLN
SDVO_STALLP AM40
R302 1 2 2.2K_0402_5% CTRL_DATA T40
<15> LCD_EDID_CLK L_DDC_CLK
<15> LCD_EDID_DATA K47 L_DDC_DATA SDVO_INTN AP39
CTRL_CLK SDVO_INTP AP40 SDVO_CTRLDATA strap pull high
T45 L_CTRL_CLK
CTRL_DATA P39 at level shift page
2.37K_0402_1% L_CTRL_DATA
RH244 2 1 LVDS_IBG AF37 P38
LVD_IBG SDVO_CTRLCLK VGA_HDMI_CLK <17>
AF36 LVD_VBG SDVO_CTRLDATA M39 VGA_HDMI_DATA <17>
0_0402_5% LVD_VREF AE48
RH290 LVD_VREFH
2 1 AE47 LVD_VREFL DDPB_AUXN AT49
DDPB_AUXP AT47
DDPB_HPD AT40 VGA_HDMI_HPD <17>
LCD_TXCLK- AK39
LVDS
<15> LCD_TXCLK- LVDSA_CLK#
LCD_TXCLK+ AK40 AV42 PCIE_MTX_GRX_HDMI_N0 PCIE_MTX_GRX_HDMI_N0 <17>
<15> LCD_TXCLK+ LVDSA_CLK DDPB_0N PCIE_MTX_GRX_HDMI_P0
+3VS AV40 PCIE_MTX_GRX_HDMI_P0 <17> HDMI D2
LCD_TXOUT0- DDPB_0P PCIE_MTX_GRX_HDMI_N1
<15> LCD_TXOUT0- AN48 LVDSA_DATA#0 DDPB_1N AV45 PCIE_MTX_GRX_HDMI_N1 <17>
RH291 1 2 2.2K_0402_5% VGA_CRT_CLK LCD_TXOUT1- AM47 AV46 PCIE_MTX_GRX_HDMI_P1 HDMI D1
Digital Display Interface

C <15> LCD_TXOUT1- LVDSA_DATA#1 DDPB_1P PCIE_MTX_GRX_HDMI_P1 <17> C
LCD_TXOUT2- AK47 AU48 PCIE_MTX_GRX_HDMI_N2
<15> LCD_TXOUT2- LVDSA_DATA#2 DDPB_2N PCIE_MTX_GRX_HDMI_N2 <17>
RH292 1 2 2.2K_0402_5% VGA_CRT_DATA AJ48 AU47 PCIE_MTX_GRX_HDMI_P2 HDMI D0
LVDSA_DATA#3 DDPB_2P PCIE_MTX_GRX_HDMI_P2 <17>
AV47 PCIE_MTX_GRX_HDMI_N3 PCIE_MTX_GRX_HDMI_N3 <17>
LCD_TXOUT0+ DDPB_3N PCIE_MTX_GRX_HDMI_P3
<15> LCD_TXOUT0+ LCD_TXOUT1+
AN47 LVDSA_DATA0 DDPB_3P AV49 PCIE_MTX_GRX_HDMI_P3 <17> HDMI CLK
<15> LCD_TXOUT1+ AM49 LVDSA_DATA1
RH131 1 2 150_0402_1% VGA_CRT_B LCD_TXOUT2+ AK49
<15> LCD_TXOUT2+ LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
RH132 1 2 150_0402_1% VGA_CRT_G P42
DDPC_CTRLDATA
RH133 1 2 150_0402_1% VGA_CRT_R LCD_TZCLK- AF40
<15> LCD_TZCLK- LCD_TZCLK+ LVDSB_CLK#
<15> LCD_TZCLK+ AF39 AP47
LVDSB_CLK DDPC_AUXN 100K_0402_5%
AP49
LCD_TZOUT0- DDPC_AUXP R1475
<15> LCD_TZOUT0- AH45 AT38 2 1
LCD_TZOUT1- LVDSB_DATA#0 DDPC_HPD @
<15> LCD_TZOUT1- AH47
LCD_TZOUT2- LVDSB_DATA#1
<15> LCD_TZOUT2- AF49 AY47
LVDSB_DATA#2 DDPC_0N
AF45 AY49
LVDSB_DATA#3 DDPC_0P
AY43
LCD_TZOUT0+ DDPC_1N
<15> LCD_TZOUT0+ AH43 AY45
LCD_TZOUT1+ LVDSB_DATA0 DDPC_1P
<15> LCD_TZOUT1+ AH49 BA47
+3VS LCD_TZOUT2+ LVDSB_DATA1 DDPC_2N
<15> LCD_TZOUT2+ AF47 BA48
LVDSB_DATA2 DDPC_2P
AF43 BB47
R301 LCD_EDID_CLK LVDSB_DATA3 DDPC_3N
1 2 2.2K_0402_5% BB49
DDPC_3P
R304 1 2 2.2K_0402_5% LCD_EDID_DATA
VGA_CRT_B N48 M43
<16> VGA_CRT_B VGA_CRT_G CRT_BLUE DDPD_CTRLCLK
<16> VGA_CRT_G P49 M36
VGA_CRT_R CRT_GREEN DDPD_CTRLDATA
<16> VGA_CRT_R T49
CRT_RED
AT45
CRT
VGA_CRT_CLK DDPD_AUXN 100K_0402_5%
<16> VGA_CRT_CLK T39 AT43
VGA_CRT_DATA CRT_DDC_CLK DDPD_AUXP R1476
<16> VGA_CRT_DATA M40 BH41 2 1
CRT_DDC_DATA DDPD_HPD @
B B
BB43
VGA_CRT_HSYNC DDPD_0N
<16> VGA_CRT_HSYNC M47 BB45
VGA_CRT_VSYNC CRT_HSYNC DDPD_0P
<16> VGA_CRT_VSYNC M49 BF44
CRT_VSYNC DDPD_1N
BE44
DDPD_1P
BF42
DDPD_2N
2 1 CRT_IREF T43
DAC_IREF DDPD_2P
BE42
R1250 1K_0402_1% T42 BJ42
CRT_IRTN DDPD_3N
BG42
DDPD_3P
A A

PCH (4/9) LVDS,CRT,DP,HDMI
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
U4E
+3VS AY7
NV_CE#0
NV_CE#1 AV7
RP1 BG26 AU3
PCI_PIRQA# TP1 NV_CE#2
8 1 BJ26 TP2 NV_CE#3 BG4
7 2 PCI_PIRQD# BH25
PCI_PIRQC# TP3
6 3 BJ16 TP4 NV_DQS0 AT10
5 4 PCI_PIRQB# BG16 BC8
TP5 NV_DQS1
AH38
8.2K_0804_8P4R_5% TP6
AH37 AU2
TP7 NV_DQ0 / NV_IO0
AK43 AT4
D RP3 TP8 NV_DQ1 / NV_IO1 D
AK45 AT3
PCH_WL_OFF# TP9 NV_DQ2 / NV_IO2
8 1 C18
TP10 NV_DQ3 / NV_IO3
AT1
7 2 PCH_GPIO51 N30 AY3
PCH_GPIO5 TP11 NV_DQ4 / NV_IO4
6 3 H3
AT5
5 4 PCH_GPIO53 AH12 AV3
NVRAM
AM4 AV1
8.2K_0804_8P4R_5% TP14 NV_DQ7 / NV_IO7
AM5 BB1
Y13 BA3
RP2 TP16 NV_DQ9 / NV_IO9
K24 BB5
8 1 L24
BB3
7 2 PCH_GPIO54 AB46 BB7
6 3 AB45 BE8
RSVD
ODD_DA# TP20 NV_DQ13 / NV_IO13
5 4 NV_DQ14 / NV_IO14 BD4
NV_DQ15 / NV_IO15 BF6
8.2K_0804_8P4R_5%
B21 TP21 NV_ALE AV5
M20 AY1 NV_CLE
R310 PCH_GPIO52 TP22 NV_CLE
1 2 8.2K_0402_5% AY16 TP23
BG46 TP24 NV_RCOMP AV10
R311 1 2 8.2K_0402_5% PCH_GPIO50 AT8

NV_RB#
DMI Termination Voltage
BE28 TP25 NV_RE#_WRB0 AY5
BC30 TP26 NV_RE#_WRB1 BA2 Set to Vcc when HIGH
BE32 TP27
NV_CLE
BJ32 TP28 NV_WE#_CK0 AT12 Set to Vss when LOW
BC28 TP29 NV_WE#_CK1 BF3
BE30 TP30
BF32 +1.8VS
TP31 USB20_N0
BG32 TP32 USBP0N C24 USB20_N0 <29>
AV26 A24 USB20_P0 R-CONN
TP33 USBP0P USB20_P0 <29>
1
BB26 C25 USB20_N1
C TP34 USBP1N USB20_P1 USB20_N1 <29> C
AU28 B25 R-CONN R313
TP35 USBP1P USB20_N2 USB20_P1 <29>
AY30 C26 2.2K_0402_5%
TP36 USBP2N USB20_P2 USB20_N2 <29>
AU26 TP37 USBP2P A26 USB20_P2 <29> L-CONN
AY26 K28
2
TP38 USBP3N NV_CLE
AV28 TP39 USBP3P H28 2 1 H_SNB_IVB# <5>
AW30 E28 R314 1K_0402_5%
TP40 USBP4N
USBP4P D28
USBP5N
C28 CLOSE TO THE BRANCHING POINT
A28
USBP5P
C29
USBP6N
B29
PCI_PIRQA# USBP6P
K40 N28
PCI_PIRQB# PIRQA# USBP7N
K38 M28
PCI
PCI_PIRQC# PIRQB# USBP7P USB20_N8
H38 L30 USB20_N8 <29>
PCI_PIRQD# PIRQC# USBP8N USB20_P8
G38
PIRQD# USBP8P
K30
USB20_N9 USB20_P8 <29> NewCard
G30 USB20_N9 <27,29>
PCH_GPIO50 USBP9N USB20_P9 +3VALW_PCH
C46 E30 Smart Card
USB
REQ1# / GPIO50 USBP9P USB20_P9 <27,29>
PCH_GPIO52 C44 C30 USB20_N10
REQ2# / GPIO52 USBP10N USB20_N10 <15>
PCH_GPIO54 E40 A30 USB20_P10 Camera RP4
REQ3# / GPIO54 USBP10P USB20_N11 USB20_P10 <15> USB_OC1#
L32 USB20_N11 <32> 4 5
PCH_GPIO51 USBP11N USB20_P11 PCH_GPIO9
PCH_GPIO53
D47
GNT1# / GPIO51 USBP11P
K32 USB20_P11 <32> Card Reader EXP_CPPE#
3 6
E42 G32 2 7
PCH_WL_OFF# GNT2# / GPIO53 USBP12N USB_OC0#
<29> PCH_WL_OFF# F46 E32 1 8
GNT3# / GPIO55 USBP12P USB20_N13
C32 USB20_N13 <29>
USBP13N USB20_P13 10K_1206_8P4R_5%
PCH_GPIO2 USBP13P
A32 USB20_P13 <29> BT
G42
ODD_DA# PIRQE# / GPIO2
<27> ODD_DA#
PCH_GPIO4
G40
PIRQF# / GPIO3 USBRBIAS
Within 500 mils
C42 C33 1 2
PCH_GPIO5 PIRQG# / GPIO4 USBRBIAS# R315 22.6_0402_1%
D44
PIRQH# / GPIO5 PCH_GPIO10 2 1
R112 100K_0402_5% B33
PAD T18 @ USBRBIAS R23 10K_0402_5%
1 2 K10
B PME# B
PLT_RST# C6 A14 USB_OC0#
<5,28,29,30,33> PLT_RST# PLTRST# OC0# / GPIO59 USB_OC1# USB_OC0# <29>
K20 USB_OC1# <29>
OC1# / GPIO40 PCH_GPIO41
B17
CLK_PCI_LPBACK R316 CLK_PCI0 OC2# / GPIO41 PCH_GPIO42
<19> CLK_PCI_LPBACK 2 1 22_0402_5% H49 C16
CLK_PCI_LPC R317 CLK_PCI1 CLKOUT_PCI0 OC3# / GPIO42 PCH_GPIO43
<33> CLK_PCI_LPC 1 2 22_0402_5% H43
CLKOUT_PCI1 OC4# / GPIO43
L16
CLK_PCI_TPM R318 1 2 22_0402_5% CLK_PCI2 J48 A16 PCH_GPIO9
<28> CLK_PCI_TPM CLK_PCI3 CLKOUT_PCI2 OC5# / GPIO9 PCH_GPIO10
PAD T20 @ K42 D14
PAD T21 @ CLK_PCI4 CLKOUT_PCI3 OC6# / GPIO10 EXP_CPPE#
H40 C14 EXP_CPPE# <29>
CLKOUT_PCI4 OC7# / GPIO14
COUGARPOINT_FCBGA989~D +3VALW_PCH
GPIO43 GPIO42 GPIO41
2
R13 R14 R19
PBL00 0 0 0 10K_0402_5% 10K_0402_5% 10K_0402_5%
@ @
1
PCH_GPIO41
PBL01 0 0 1 PCH_GPIO42
PCH_GPIO43
Boot BIOS Strap bit1 BBS1

PBL10 0 1 0
2
Boot BIOS PBL11 0 1 1 R20 R21 R22
Destination 10K_0402_5% 10K_0402_5% 10K_0402_5%
Bit11 Bit10 @
PBL20 1 0 0
1
A A
BBS bit1 0 1 Reserved
/BBS bit0 1 0 PCI PBL21 1 0 1
1 1 SPI
*
0 0 LPC
PCH (5/9) PCI, USB, NVRAM
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
+3VALW_PCH
R352 1 2 10K_0402_5%
R327 1 @ 2 1K_0402_5% EC_SMI#
˥˸̆˸̅̉˸ʳ˹̂̅ʳ˜˖˖
D ˸́˴˵˿˸ˁ D
H_CPUPWRGD 2 1
220P_0402_50V8K C19
GPIO28
On-Die PLL Voltage Regulator For ESD
This signal has a weak internal pull up
* H
L
Κ
ΚOn-Die voltage regulator enable
On-Die PLL Voltage Regulator disable
+3VS
+3VALW_PCH
KB_RST# R326 1 2 10K_0402_5%

R351 1 2 10K_0402_5%
R325 1 @ 2 1K_0402_5% PCH_GPIO28 U4F 10K_0402_5% 2 1 R428 +3VS

PCH_GPIO0 T7 C40 ODD_EN#
BMBUSY# / GPIO0 TACH4 / GPIO68 ODD_EN# <27>
PCH_GPIO1 A42 B41 PCH_GPIO69 @ T24 PAD
TACH1 / GPIO1 TACH5 / GPIO69
PCH_GPIO6 H36 C41 PCH_GPIO70 @ T25 PAD +3VS
TACH2 / GPIO6 TACH6 / GPIO70
PCH_GPIO27 (Have internal Pull-High) EC_SCI# E38 A40 PCH_GPIO71 @ T22 PAD
<33> EC_SCI# TACH3 / GPIO7 TACH7 / GPIO71
2
*High: VCCVRM VR Enable
Low: VCCVRM VR Disable <33> EC_SMI# EC_SMI# C10 GPIO8
R329
10K_0402_5%
PCH_GPIO12 C4
C LAN_PHY_PWR_CTRL / GPIO12 C
1
R328 1 @ 2 10K_0402_5% PCH_GPIO27 PCH_GPIO15 G2 P4
GPIO15 A20GATE GATEA20 <33>
AU16 PCH_PECI_R 1 @ 2
CPU/MISC
PCH_GPIO16 PECI H_PECI <5,33>
U2 0_0402_5% R331
SATA4GP / GPIO16 KB_RST#
RCIN# P5 KB_RST# <33>
GPIO
PCH_GPIO17 D40 AY11
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD <5>
PCH_GPIO22 T5 AY10 PCH_THRMTRIP#_R 1 2 H_THRMTRIP#
SCLOCK / GPIO22 THRMTRIP# H_THRMTRIP# <5>
R334 390_0402_5%
PCH_GPIO24 E8 T14
PCH_GPIO37 GPIO24 / MEM_LED INIT3_3V# INIT3_3V
PCH_GPIO27 E16
GPIO27
This signal has weak internal
+3VS PCH_GPIO28 P8
GPIO28 PU, can't pull low
AH8
@ PCH_BT_PWRON NC_1
<29> PCH_BT_PWRON K1
R426 PCH_GPIO37 STP_PCI# / GPIO34
1 2 10K_0402_5% AK11
PCH_GPIO35 NC_2
K4
GPIO35
AH10
R332 ODD_DETECT# NC_3
1 2 10K_0402_5% <27> ODD_DETECT# V8
SATA2GP / GPIO36
AK10
PCH_GPIO37 NC_4
M5
SATA3GP / GPIO37
Intel schematic review recommand.
P37
PCH_GPIO38 NC_5
N2
SLOAD / GPIO38
PCH_GPIO39 M3
SDATAOUT0 / GPIO39
PCH_GPIO48 V13 BG2 @ T26 PAD
SDATAOUT1 / GPIO48 VSS_NCTF_15
PCH_GPIO49 V3 BG48 @ T27 PAD
B SATA5GP / GPIO49 VSS_NCTF_16 B
+3VS PCH_GPIO57 D6 BH3 @ T28 PAD
GPIO57 VSS_NCTF_17
R425 1 2 10K_0402_5% PCH_GPIO24 BH47 @ T29 PAD
VSS_NCTF_18
R424 1 2 10K_0402_5% PCH_GPIO0 PAD T30 @ A4 BJ4 @ T31 PAD
VSS_NCTF_1 VSS_NCTF_19
NCTF
R340 1 2 10K_0402_5% PCH_GPIO38 PAD T42 @ B3 C2 @ T43 PAD
R341 1 2 10K_0402_5% PCH_GPIO39 PAD T44 @ B47 C48 @ T45 PAD
R342 1 2 10K_0402_5% ODD_DETECT# PAD T46 @ BD1 D1 @ T47 PAD
R343 1 2 10K_0402_5% PCH_BT_PWRON PAD T48 @ BD49 D49 @ T49 PAD
R344 1 2 10K_0402_5% PCH_GPIO48 PAD T50 @ BE1 E1 @ T51 PAD
R345 1 2 10K_0402_5% PCH_GPIO49 PAD T52 @ BE49 E49
PAD T54 @ BF1 F1 @ T55 PAD
+3VALW_PCH VSS_NCTF_13 VSS_NCTF_31
PAD T56 @ BF49 F49
A R346 PCH_GPIO12 VSS_NCTF_14 VSS_NCTF_32 A
1 2 10K_0402_5%
R347 1 2 1K_0402_5% PCH_GPIO15 COUGARPOINT_FCBGA989~D
R349 1 2 10K_0402_5% PCH_GPIO57

@
R350 1 2 10K_0402_5% PCH_GPIO35
PCH (6/9) GPIO, CPU, MISC
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
L5
2.2_0603_5% PCH Power Rail Table

+1.05VS_VCCP U4G POWER +3VS S0 Iccmax
L5 Voltage Rail Voltage Current (A)
@ JP2 1300mA MBK1608221YZF_2P
2 1 +1.05VS_PCH AA23 U48 +VCCADAC 2 1
VCCCORE[1] 1mA VCCADAC @
AC23 VCCCORE[2] 1 1 1 V_PROC_IO 1.05 0.001
10U_0603_6.3V6M
C245
1U_0402_6.3V6K
C246
1U_0402_6.3V6K
C244
1U_0402_6.3V6K
C247
0.01U_0402_16V7K
C248
0.1U_0402_10V7K
C249
CRT
AD21
PAD-OPEN 4x4m 1 1 1 1 VCCCORE[3] C250
AD23 U47
VCCCORE[4] VSSADAC 10U_0603_6.3V6M
VCC CORE
AF21
VCCCORE[5]
V5REF 5 0.001
AF23 2 2 2
D 2 2 2 2 VCCCORE[6] R423 +3VS D
AG21
VCCCORE[7] 0_0805_5%
AG23
VCCCORE[8]
V5REF_Sus 5 0.001
AG24 AK36 +VCCA_LVDS 1 2
VCCCORE[9] 1mA VCCALVDS
AG26
VCCCORE[10]
AG27
VCCCORE[11] VSSALVDS
AK37 Vcc3_3 3.3 0.266
AG29
VCCCORE[12]
AJ23
LVDS
VCCCORE[13]
AJ26
VCCCORE[14] VCCTX_LVDS[1]
AM37 VccADAC 3.3 0.001
AJ27 +1.8VS
VCCCORE[15] L6
AJ29 AM38
VCCCORE[16] VCCTX_LVDS[2] 0.1UH_MLF1608DR10KT_10%_1608
AJ31
VCCCORE[17]
VccADPLLA 1.05 0.08
+1.05VS_PCH AP36 +VCCTX_LVDS 2 1
60mA VCCTX_LVDS[3] 0.1uH inductor, 200mA
1 1 1
22U_0805_6.3V6M
VCCTX_LVDS[4] AP37 VccADPLLB 1.05 0.08
R353 2 1 0_0603_5% +1.05VS_VCCDPLLEXP AN19 C251 C252
VCCIO[28]
C253
0.01U_0402_16V7K 0.01U_0402_16V7K
2 2 2 VccCore 1.05 1.3
PAD T58 @ +VCCAPLLEXP BJ22 R355 +3VS
VCCAPLLEXP 0_0805_5%
This pin can be left as no connect in V33 +3VS_VCC3_3_6 1 2 VccDMI 1.05 0.042
HVCMOS
VCC3_3[6]
AN16 VCCIO[15]
On-Die VR enabled mode (default). 1
AN17 VCCIO[16]
VccIO 1.05 2.925
V34 C254
VCC3_3[7]
0.1U_0402_10V7K
2 VccASW 1.05 1.01
AN21 VCCIO[17]
AN26 VCCIO[18]
VccSPI 3.3 0.02
AN27 2925mA AT16 +VCCAFDI_VRM
VCCIO[19] VCCVRM[3]
+1.05VS_PCH R356 AP21 +VCCP_VCCDMI R357 +1.05VS_VCCP VccDSW 3.3 0.003
C 0_0805_5% VCCIO[20] 0_0805_5% C
1 2 +1.05VS_VCC_EXP AP23 AT20 +VCCP_VCCDMI 1 2
VCCIO[21] VCCDMI[1]
1 VccpNAND 1.8 0.19
DMI
+1.05VS_PCH
10U_0603_6.3V6M
C256
1U_0402_6.3V6K
C257
1U_0402_6.3V6K
C258
1U_0402_6.3V6K
C259
1U_0402_6.3V6K
C260
1 1 1 1 1 AP24 R358
VCCIO
VCCIO[22] 0_0805_5% C255
AP26 20mA AB36 +1.05VS_VCC_DMI_CCI 1 2 1U_0402_6.3V6K VccRTC 3.3 6 uA
VCCIO[23] VCCIO[1] 2
2 2 2 2 2 1
AT24
VCCIO[24] C261 VccSus3_3 3.3 0.119
1U_0402_6.3V6K
AN33 2
VCCIO[25]
VccSusHDA 3.3 / 1.5 0.01
AN34 AG16
+3VS R359 VCCIO[26] VCCPNAND[1] +VCCPNAND R360 +1.8VS
0_0805_5% 0_0805_5% VccVRM 1.8 / 1.5 0.16
NAND / SPI
1 2 +3VS_VCCA3GBG BH29 AG17 1 2
VCC3_3[3] 190mA VCCPNAND[2]
1
C262 VccCLKDMI 1.05 0.02
0.1U_0402_10V7K AJ16 1
VCCPNAND[3] C263
2 +VCCAFDI_VRM AP16 0.1U_0402_10V7K VccSSC 1.05 0.095
+1.05VS_PCH @ R361 VCCVRM[2]
AJ17
VCCPNAND[4] 2
0_0603_5% Place C264 Near BG6 pin
2 1 +1.05VS_VCCAPLL_FDI BG6 VccDIFFCLKN 1.05 0.055
VCCFDIPLL
+1.05VS_PCH R363 R362
1
1 2 +1.05VS_VCCDPLL_FDI AP17 VCCIO[27]
0_0805_5% VccALVDS 3.3 0.001
FDI
@ C264
@C264 0_0805_5% V1 +3V_VCCPSPI 1 2
20mA VCCSPI +3VS
1U_0402_6.3V6K
2 AU20 VccTX_LVDS 1.8 0.06
+VCCP_VCCDMI VCCDMI[2] 1
C265
B COUGARPOINT_FCBGA989~D 1U_0402_6.3V6K B
2
+VCCAFDI_VRM
+1.5VS
A A
R364 2 1 0_0603_5% +VCCAFDI_VRM
+1.8VS
R365 2 @ 1 0_0603_5%
Intel recommand VCCVRM==>1.5V FOR MOBILE

stuff R364 and unstuff R365 VCCVRM==>1.8V FOR DESKTOP
VCCVRM = 160mA detal waiting for newest spec THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (7/9) PWR
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
Have internal VRM

+3VS @ R366 +1.05VS_PCH @ R367 VCC3_3 = 266mA detal waiting for newest spec
0_0805_5% 0_0603_5%
1 2 2 1 +VCCACLK VCCDMI = 42mA detal waiting for newest spec
L7 +5VALW @R368
@ R368
10UH_LB2012T100MR_20% 0_0603_5%
1 2 +3VS_VCC_CLKF33 +3VALW_PCH R370 2 1
1 1 0_0603_5% U4J POWER R369 +1.05VS_PCH
10U_0603_6.3V6M
C266
1U_0402_6.3V6K
C267
1 2 +VCCPDSW 0_0603_5% Q14
AD49 N26 +1.05VS_VCCUSBCORE 2 1 R372 AO3413_SOT23-3 +5VALW_PCH
1 VCCACLK VCCIO[29]
1 0_0603_5%
2 2
D
C268 P26 2 1 3 1
0.1U_0402_10V7K VCCIO[30] C269
T16 3mA
2 VCCDSW3_3
0.1U_0402_10V7K
C271
20K_0402_5%
R373
D C270 1U_0402_6.3V6K D
P28
VCCIO[31]
1
0.1U_0402_10V7K 2
G
1
2
2 1 +PCH_VCCDSW V12 T27
@ DCPSUSBYP VCCIO[32]
T29 <35> PCH_PWR_EN#
+3VS_VCC_CLKF33 VCCIO[33] R374 +3VALW_PCH 2
T38
2
+1.05VS_PCH @ R371 L8 VCC3_3[5] 0_0603_5%
0_0603_5% 10UH_LB2012T100MR_20% T23 +3V_VCCPUSB 2 1
1 2 +VCCAPLL_CPY 1 2 +VCCAPLL_CPY_PCH BH23
119mA VCCSUS3_3[7]
VCCAPLLDMI2 +3VALW_PCH
0.1U_0402_10V7K
C273
T24 1 R376
R375 +VCCDPLL_CPY VCCSUS3_3[8] +5VALW_PCH +3VALW_PCH
1 +1.05VS_PCH 1 2 0_0603_5% AL29
VCCIO[14]
0_0603_5%
V23 +3V_VCCAUBG 2 1
USB
@ C272 VCCSUS3_3[9]
1
2
10U_0603_6.3V6M +VCCSUS1 AL24 V24 2 C274
2 DCPSUS[3] VCCSUS3_3[10] 0.1U_0402_10V7K R377 D3
1
@ P24 100_0402_5% CH751H-40PT_SOD323-2
C275 VCCSUS3_3[6] 2 R378 +1.05VS_PCH
1U_0402_6.3V6K AA19 0_0603_5%
1
2 VCCASW[1] +1.05VS_VCCAUPLL +PCH_V5REF_SUS
VCCIO[34] T26 2 1
+1.05VS_PCH R379 AA21 1010mA
VCCASW[2] 1
0_0805_5%
1 2 +1.05VM_VCCASW AA24 M26 +PCH_V5REF_SUS C276
VCCASW[3] 1mA V5REF_SUS 0.1U_0603_25V7K
1 1 2
22U_0805_6.3V6M
C277
22U_0805_6.3V6M
C278
Clock and Miscellaneous

AA26 @
VCCASW[4] +VCCA_USBSUS C279
DCPSUS[4] AN23 1 2 1U_0402_6.3V6K
AA27 VCCASW[5]
2 2 AN24 +3V_VCCPSUS
VCCSUS3_3[1]
AA29 VCCASW[6]
AA31 +5VS +3VS
VCCASW[7]
AC26 P34 +PCH_V5REF_RUN R380 +3VALW_PCH
VCCASW[8] 1mA V5REF
2
C 0_0603_5% C
1 1 1
1U_0402_6.3V6K
C280
1U_0402_6.3V6K
C281
1U_0402_6.3V6K
C282
AC27 2 1 R381 D4
VCCASW[9] +3V_VCCPSUS 100_0402_5% CH751H-40PT_SOD323-2
N20 1
PCI/GPIO/LPC
VCCSUS3_3[2] C283
AC29 VCCASW[10]
2 2 2 N22 1U_0402_6.3V6K
1
+1.05VS_PCH VCCSUS3_3[3] +PCH_V5REF_RUN
AC31 VCCASW[11]
R382 L9 P20 2 R383 +3VS
VCCSUS3_3[4] 1
0_0805_5% 10UH_LB2012T100MR_20% AD29 0_0805_5%
+VCCA_DPLL_L +1.05VS_VCCA_A_DPL VCCASW[12] C284
1 2 1 2 VCCSUS3_3[5]
P22 2 1
AD31 1 1U_0603_10V6K
VCCASW[13] C285 2
1 2 +1.05VS_VCCA_B_DPL W21 AA16 +3VS_VCCPCORE 0.1U_0402_10V7K
L10 VCCASW[14] VCC3_3[1]
2 +3VS
220U_B2_2.5VM_R35
C286
1U_0402_6.3V6K
C288
220U_B2_2.5VM_R35
C287
1U_0402_6.3V6K
C289
10UH_LB2012T100MR_20% 1 1 W23 W16 R384

VCCASW[15] VCC3_3[8] 0_0603_5%
1 1
+ + W24 T34 +3VS_VCCPPCI 2 1
VCCASW[16] VCC3_3[4]
1
W26 C290
2 2 2 2 VCCASW[17] 0.1U_0402_10V7K
W29 R385 +3VS
VCCASW[18] 0_0603_5% 2
W31 AJ2 +VCC3_3_2 2 1
+1.05VS_PCH R386 VCCASW[19] VCC3_3[2] +1.05VS_SATA3 R387 +1.05VS_PCH
1
0_0603_5% W33 0_0805_5%
+VCCDIFFCLK VCCASW[20] C291
2 1 AF13 2 1
VCCIO[5] 0.1U_0402_10V7K
2 1
1 +VCCRTCEXT N16
C294 DCPRTC C292
1 AH13
1U_0402_6.3V6K C293 VCCIO[12] 1U_0402_6.3V6K
0.1U_0402_10V7K +VCCAFDI_VRM Y49 AH14 +1.05VS_SATA3 2
+1.05VS_PCH R388 2 +1.05VS_VCCDIFFCLKN VCCVRM[4] VCCIO[13]
0_0603_5% 2 @ @
B
2 1 +1.05VS_VCCDIFFCLKN AF14 L11 R389 +1.05VS_PCH B
+1.05VS_VCCA_A_DPL VCCIO[6] 10UH_LB2012T100MR_20% 0_0805_5%
1 BD47
SATA
VCCADPLLA 80mA +VCCSATAPLL +VCCSATAPLL_R2
AK1 1 2 1
C295 +1.05VS_VCCA_B_DPL VCCAPLLSATA +VCCAFDI_VRM
BF47 80mA
1U_0402_6.3V6K VCCADPLLB
2 1
AF11 +VCCAFDI_VRM @ C296
+1.05VS_PCH R390 +VCCDIFFCLK VCCVRM[1] +1.05VS_VCC_SATA R391 +1.05VS_PCH 10U_0603_6.3V6M
AF17
VCCIO[7]
0_0603_5% AF33
VCCIO[8]
0_0805_5% Place C296 Near AK1 pin
2 1 +1.05VS_SSCVCC AF34 55mA AC16 +1.05VS_VCC_SATA 2 1 2
+1.05VS_VCCDIFFCLKN VCCIO[9] VCCIO[2]
1 AG34
VCCIO[11]
AC17 1
C297 VCCIO[3] C298
1U_0402_6.3V6K +1.05VS_SSCVCC AG33 AD17 1U_0402_6.3V6K
2 VCCIO[10] 95mA VCCIO[4]
+1.05VS_PCH @ R392 2
0_0603_5% +VCCSST V16 +1.05VS_PCH
+1.05VM_VCCSUS DCPSST
2 1 1
1 C299 +1.05VM_VCCSUS T17 T21 +VCCME_22 R393 2 1 0_0603_5%

0.1U_0402_10V7K DCPSUS[1] VCCASW[22]
V19
DCPSUS[2]
MISC
C300 2
1U_0402_6.3V6K +1.05VS_VCCP R395 V21 +VCCME_23 R394 2 1 0_0603_5%
2 0_0603_5% VCCASW[23]
CPU
1 2 +V_CPU_IO BJ8
V_PROC_IO 1mA +VCCME_21 R396
T19 2 1 0_0603_5%
VCCASW[21]
1 1 1
+RTCVCC +3VALW_PCH
4.7U_0603_6.3V6K
C301
0.1U_0402_10V7K
C302
0.1U_0402_10V7K
C303
RTC
A22 P32 +VCCSUSHDA R397 2 1 0_0603_5%

HDA
2 2 2 VCCRTC 10mA VCCSUSHDA

1U_0402_6.3V6K
C304
0.1U_0402_10V7K
C305
0.1U_0402_10V7K
C306
1 1 1 1
COUGARPOINT_FCBGA989~D C307
A 0.1U_0402_16V4Z A
2 2 2 2

2010/05/17 2011/05/17 Title
Issued Date Deciphered Date PCH (8/9) PWR
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
U4I
AY4 VSS[159] VSS[259] H46

AY42 VSS[160] VSS[260] K18
AY46 K26
VSS[161] VSS[261]
AY8 K39
VSS[162] VSS[262]
B11 K46
D U4H VSS[163] VSS[263] D
B15 K7
VSS[164] VSS[264]
H5 B19 L18
VSS[0] VSS[165] VSS[265]
B23 L2
VSS[166] VSS[266]
AA17 AK38 B27 L20
VSS[1] VSS[80] VSS[167] VSS[267]
AA2 AK4 B31 L26
VSS[2] VSS[81] VSS[168] VSS[268]
AA3 AK42 B35 L28
VSS[3] VSS[82] VSS[169] VSS[269]
AA33 AK46 B39 L36
VSS[4] VSS[83] VSS[170] VSS[270]
AA34 AK8 B7 L48
VSS[5] VSS[84] VSS[171] VSS[271]
AB11 AL16 F45 M12
VSS[6] VSS[85] VSS[172] VSS[272]
AB14 AL17 BB12 P16
VSS[7] VSS[86] VSS[173] VSS[273]
AB39 AL19 BB16 M18
VSS[8] VSS[87] VSS[174] VSS[274]
AB4 VSS[9] VSS[88] AL2 BB20 VSS[175] VSS[275] M22
AC19 VSS[13] VSS[92] AL27 BB30 VSS[179] VSS[279] M34
AC33 VSS[17] VSS[96] AL48 BC14 VSS[183] VSS[283] M46
AC34 VSS[18] VSS[97] AM11 BC18 VSS[184] VSS[284] M8
AC48 VSS[19] VSS[98] AM14 BC2 VSS[185] VSS[285] N18
AD10 VSS[20] VSS[99] AM36 BC22 VSS[186] VSS[286] P30
AD11 VSS[21] VSS[100] AM39 BC26 VSS[187] VSS[287] N47
AD19 VSS[24] VSS[103] AM46 BC36 VSS[190] VSS[290] T33
AD26 VSS[26] VSS[105] AN2 BC42 VSS[192] VSS[292] P43
AD27 VSS[27] VSS[106] AN29 BC48 VSS[193] VSS[293] P47
AD33 VSS[28] VSS[107] AN3 BD46 VSS[194] VSS[294] P7
AD34 VSS[29] VSS[108] AN31 BD5 VSS[195] VSS[295] R2
C C
AD36 VSS[30] VSS[109] AP12 BE22 VSS[196] VSS[296] R48
AD37 VSS[31] VSS[110] AP19 BE26 VSS[197] VSS[297] T12
AD38 VSS[32] VSS[111] AP28 BE40 VSS[198] VSS[298] T31
AD39 VSS[33] VSS[112] AP30 BF10 VSS[199] VSS[299] T37
AD40 VSS[35] VSS[114] AP38 BF16 VSS[201] VSS[301] W34
AD43 AP42 BF22 T47
VSS[37] VSS[116] VSS[203] VSS[303]
AD45 AP46 BF24 T8
VSS[38] VSS[117] VSS[204] VSS[304]
AD46 AP8 BF26 V11
VSS[39] VSS[118] VSS[205] VSS[305]
AD8 AR2 BF28 V17
VSS[40] VSS[119] VSS[206] VSS[306]
AE2 AR48 BD3 V26
VSS[41] VSS[120] VSS[207] VSS[307]
AE3 AT11 BF30 V27
VSS[42] VSS[121] VSS[208] VSS[308]
AF10 AT13 BF38 V29
VSS[43] VSS[122] VSS[209] VSS[309]
AF12 AT18 BF40 V31
VSS[44] VSS[123] VSS[210] VSS[310]
AD14 AT22 BF8 V36
VSS[45] VSS[124] VSS[211] VSS[311]
AD16 AT26 BG17 V39
VSS[46] VSS[125] VSS[212] VSS[312]
AF16 AT28 BG21 V43
VSS[47] VSS[126] VSS[213] VSS[313]
AF19 AT30 BG33 V7
VSS[48] VSS[127] VSS[214] VSS[314]
AF24 AT32 BG44 W17
VSS[49] VSS[128] VSS[215] VSS[315]
AF26 AT34 BG8 W19
VSS[50] VSS[129] VSS[216] VSS[316]
AF27 AT39 BH11 W2
VSS[51] VSS[130] VSS[217] VSS[317]
AF29 AT42 BH15 W27
VSS[52] VSS[131] VSS[218] VSS[318]
AF31 AT46 BH17 W48
VSS[53] VSS[132] VSS[219] VSS[319]
AF38 AT7 BH19 Y12
VSS[54] VSS[133] VSS[220] VSS[320]
AF4 AU24 H10 Y38
VSS[55] VSS[134] VSS[221] VSS[321]
AF42 AU30 BH27 Y4
VSS[56] VSS[135] VSS[222] VSS[322]
AF46 AV16 BH31 Y42
VSS[57] VSS[136] VSS[223] VSS[323]
AF5 AV20 BH33 Y46
VSS[58] VSS[137] VSS[224] VSS[324]
AF7 AV24 BH35 Y8
VSS[59] VSS[138] VSS[225] VSS[325]
AF8 AV30 BH39 BG29
VSS[60] VSS[139] VSS[226] VSS[328]
AG19 AV38 BH43 N24
B VSS[61] VSS[140] VSS[227] VSS[329] B
AG2 AV4 BH7 AJ3
VSS[62] VSS[141] VSS[228] VSS[330]
AG31 AV43 D3 AD47
VSS[63] VSS[142] VSS[229] VSS[331]
AG48 AV8 D12 B43
VSS[64] VSS[143] VSS[230] VSS[333]
AH11 AW14 D16 BE10
VSS[65] VSS[144] VSS[231] VSS[334]
AH3 AW18 D18 BG41
VSS[66] VSS[145] VSS[232] VSS[335]
AH36 AW2 D22 G14
VSS[67] VSS[146] VSS[233] VSS[337]
AH39 AW22 D24 H16
VSS[68] VSS[147] VSS[234] VSS[338]
AH40 AW26 D26 T36
VSS[69] VSS[148] VSS[235] VSS[340]
AH42 AW28 D30 BG22
VSS[70] VSS[149] VSS[236] VSS[342]
AH46 AW32 D32 BG24
VSS[71] VSS[150] VSS[237] VSS[343]
AH7 AW34 D34 C22
VSS[72] VSS[151] VSS[238] VSS[344]
AJ19 AW36 D38 AP13
VSS[73] VSS[152] VSS[239] VSS[345]
AJ21 AW40 D42 M14
VSS[74] VSS[153] VSS[240] VSS[346]
AJ24 AW48 D8 AP3
VSS[75] VSS[154] VSS[241] VSS[347]
AJ33 AV11 E18 AP1
VSS[76] VSS[155] VSS[242] VSS[348]
AJ34 AY12 E26 BE16
VSS[77] VSS[156] VSS[243] VSS[349]
AK12 AY22 G18 BC16
VSS[78] VSS[157] VSS[244] VSS[350]
AK3 AY28 G20 BG28
VSS[79] VSS[158] VSS[245] VSS[351]
G26 BJ28
COUGARPOINT_FCBGA989~D VSS[246] VSS[352]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
A A

PCH (9/9) VSS
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
D D
SATA HDD1 Conn.
+5VS
SATA ODD Conn
Place closely JP25 SATA CONN. +5VS_ODD
1.2A
1.7A
1 1 1 1
C387 C388 C389 C390
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 1 1 1 1
C952 C414 C415 C416
2 2 2 2 @ ODD@ ODD@ @ C417 C418
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 1U_0402_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 ODD@ 2 ODD@
Place component's closely ODD CONN.
13.3" HDD 13.3" ODD
JHDD JODD
1 ODD@
GND SATA_PTX_C_DRX_P2 C518 1
GND 1 A+ 2 2 0.01U_0402_25V7K SATA_PTX_DRX_P2 <18>
C SATA_PTX_C_DRX_P0C512 1 SATA_PTX_C_DRX_N2 C
2 2 0.01U_0402_25V7K SATA_PTX_DRX_P0 <18> 3 C519 1 2 0.01U_0402_25V7K SATA_PTX_DRX_N2 <18>
A+ SATA_PTX_C_DRX_N0C513 1 A-
A- 3 2 0.01U_0402_25V7K SATA_PTX_DRX_N0 <18> GND 4 ODD@ ODD@
4 5 SATA_PRX_DTX_N2 C424 1 2 0.01U_0402_25V7K
GND SATA_PRX_DTX_N0 B- SATA_PRX_DTX_P2 SATA_PRX_C_DTX_N2 <18>
5 C410 1 2 0.01U_0402_25V7K 6 C425 1 2 0.01U_0402_25V7K
B- SATA_PRX_DTX_P0 SATA_PRX_C_DTX_N0 <18> B+ SATA_PRX_C_DTX_P2 <18>
6 C412 1 2 0.01U_0402_25V7K 7 ODD@
B+ SATA_PRX_C_DTX_P0 <18> GND
GND 7
8 ODD_DETECT#_R 0_0402_5% 2 ODD@ 1 R834
DP ODD_DETECT# <23>
9 +5VS_ODD +5VS_ODD
+5V
8 10
V33 +5V ODD_DA#_R 0_0402_5%
9 11 2 ODD@ 1 R833
ODD_DA# <22>
V33 MD
10 14 12
V33 GND1 GND
11 15 13
GND GND2 GND 0_0402_5%
12 2 SCO@ 1 R836
USB20_N9 <22,29>
GND SANTA_206001-1 0_0402_5% R835
GND
13 2 1 USB20_P9 <22,29> Smart Card
14 @ SCO@
V5 +5VS
15
V5
16
V5
17
GND
18
Reserved
19
GND
20
V12
24 21
GND V12
23 22
GND V12
SUYIN_127085FR022G211ZR
@
B B
+5VS +5VS_ODD
R415
0_0805_5%
+VSB 1 2
@
1.7A
D
6
S
2
1 5 4
1U_0402_6.3V6K
CS27 ODD@
R832 2
470K_0402_5% 1 Q62
ODD@ SI3456BDV-T1-E3 1N TSOP6
G
2 ODD@
3
ODD_EN
1
2
D
1.5M_0402_5%
R831 ODD@
0.1U_0402_16V4Z
C870 ODD@
1
2 Q63
<23> ODD_EN#
G SSM3K7002FU_SC70-3
S ODD@
3
1
A A

HDD & ODD Connector
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
SPI ROM For Basic ME ROM size TPM 1.2

(w/o Braidwood & system BIOS):
4MByte
C764 close pin 24 C765 close pin 10
+5VALW +3VS
+5VALW
2
D C398 D
1 1
1 2 R416 C764 C765
10K_0402_5% IN_TPM@
Debug@ 0.1U_0402_16V4Z Debug@ 0.1U_0402_16V4Z 1U_0402_6.3V4Z
8
R303 U142A Debug@ IN_TPM@ 2 2
1
1 2 3
P
+5VALW +
1
EC_ON O
2
100K_0402_5% -
G
1
1
R418 LM393DG_SO8 C397
4
100K_0402_5% Debug@ 0.1U_0402_16V4Z
Debug@ Debug@
+5VALW 2 +3VALW +3VALW +3VL
2
1
+5VALW
R419 R1428 R1429
10K_0402_5% D5 Debug@ 0_0603_5% 0_0603_5%
8 Debug@ RB715F_SOT323-3 @
1
U142B D IN_TPM@
2
2
5 1 2 Q19
P
<9,29,33,35,39,41,43> SUSP# +
7 3 G AO3416_SOT23-3
O Debug@ +3VS
6 S
3
-
G
1
LM393DG_SO8 C396 +VTPM
4
1
Debug@ 0.1U_0402_16V4Z +3V_SPI IN_TPM@
Debug@ R417 R733 10K_0402_5%
2 1 2
100K_0402_5% +3VS
R46 R61 Debug@
24
19
10
5
+5VALW 2 1 2 1 U37 0_0402_5%
2
R726 1 2
VSB
VDD
VDD
VDD
SUS_STAT# <20>
@
C 10K_0402_5% 10K_0402_5% C
LPC_AD0 SUS_STAT#_R R659
Debug@ Debug@ <18,33> LPC_AD0 26 28
LPC_AD1 LAD0 LPCPD#
<18,33> LPC_AD1 23 LAD1 TESTB1/BADD 9 1 2 +3VS
<18,33> LPC_AD2 LPC_AD2 20 8 TPM_TEST1 1 2
LAD2 TEST1
1
LPC_AD3 17 IN_TPM@ 4.7K_0402_5%
<18,33> LPC_AD3 LAD3
14 TPM_XTALO 0_0402_5% R662 IN_TPM@
XTALO
4.7K_0402_5%
13 TPM_XTALI R661
TPM XTALI @
PCH_SPI_CLK_R 1 @ 2 CLK_PCI_TPM 21 SLB 9635 TT 1.1 Base I/O Address
2
<22> CLK_PCI_TPM LPC_FRAME# LCLK
R1455 0_0402_5% 22 2
<18,33> LPC_FRAME# PLT_RST# LFRAME# GPIO2
<5,22,29,30,33> PLT_RST# 16
LRESET# GPIO
6 0 = 02Eh
1 SERIRQ 27 * 1 = 04Eh
<18,33> SERIRQ PM_CLKRUN# SERIRQ
@ 15
<20> PM_CLKRUN# CLKRUN#
C928 +3VS 1 2 7 1
10P_0402_50V8J R665 4.7K_0402_5% PP NC
3
2 IN_TPM@ NC
12
GND
GND
GND
GND
NC
For EMI close U59
+VTPM 1 2 SLB-9635-TT-1.2_TSSOP28
4
11
18
25
R667 4.7K_0402_5% IN_TPM@
PCH_SPI_MOSI 2 R1550 1 0_0402_5% @
MP@
PCH_SPI_CLK 2 R1551 1 0_0402_5%
MP@
2
PCH_SPI_CS0# 2 R1552 1 0_0402_5%
MP@ R772
PCH_SPI_MISO 2 R1553 1 0_0402_5% @ 0_0402_5%
MP@
1
B U7 Debug@ B
1
1OE# PCH_SPI_MISO_R
4
2OE#
10
3OE#
13
4OE# U59
PCH_SPI_MISO 2 3 PCH_SPI_MOSI_R 5 2
<18> PCH_SPI_MISO PCH_SPI_CS0# 1A 1B SI SO
<18> PCH_SPI_CS0# 5 6
PCH_SPI_CLK 2A 2B PCH_SPI_CLK_R
<18> PCH_SPI_CLK 9 8 6
PCH_SPI_MOSI 3A 3B SCLK
<18> PCH_SPI_MOSI 12 11
4A 4B PCH_SPI_CS0#_R 1 CS
+3VS 14 7
VCC GND
7 HOLD
1 SN74CBT3125PWRG4_TSSOP14
C395 3
0.1U_0402_16V4Z WP
For ESD
Debug@ +3V_SPI 8 4
2 VCC GND C766 IN_TPM@
MX25L3205AZMC-20G_SON8 15P_0402_50V8J
SA00000CA00 1
C393 CLK_PCI_TPM TPM_XTALI
0.1U_0402_16V4Z
10M_0402_5%
U11 Debug@
1
2 R669
P/N: SA00003K800 1
OSC NC
2
IN_TPM@
EC_ON 1 @ 10_0402_5%
<33,34,38> EC_ON 1OE#
4 4 3
2OE# OSC NC
R668
10
1
3OE# 32.768KHZ_12.5PF_Q13MC14610002
13 2 Y4
2
4OE#
C768 TPM_XTALO
For KB930 <32,33> KSI3 2
5
1A 1B
3
6 change to 4MB for SW demand @ 15P_0402_50V8J
<32,33> KSI7 2A 2B 1
9 8 C767 IN_TPM@
<32,33> KSI6 3A 3B
12 11 15P_0402_50V8J
A <32,33> KSI5 4A 4B A
+3V_SPI 14 VCC GND 7
1 2 SN74CBT3125PWRG4_TSSOP14 R1549
+3VS 2 1 +3V_SPI
C394 0.1U_0402_16V4Z
Debug@ 0_0402_5%
MP@
SPI ROM
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
A B C D E
Function Board
Left USB +5VALW +USB_VCCB +5VALW
U26
ACES_85201-24051
1 GND VOUT 8 W=60mils
2 VIN VOUT 7 W=30mils 1 1
3
VIN VOUT
6 2
2 For ESD
<33> USB_EN# 4 EN FLG 5 1 2 USB_OC1# <22> 3
3
1 R427 0_0402_5% 4
4
1 AP2301SG_SO8-13 1
D22 5
C439 5 +5VS
6
1U_0603_10V6K 6
3 <22> USB_OC0# 7
2 @ USB_EN# 7
1 8
8
2 9
USB20_N1 9
<22> USB20_N1 10
10
0.1U_0402_16V4Z
C20
0.1U_0402_16V4Z
C21
USB20_N2 <22> <22> USB20_P1 USB20_P1 11 1 1
PJDLC05C_SOT23-3 11
12
@ @ 12
13
R420 0_0402_5% USB20_N0 13
<22> USB20_N0 14
+USB_VCCB JUSB3 USB20_P0 14 2 2
2 1 <22> USB20_P0 15
15
1 VBUS 16 16
3 4 USB20_N2_R USB20_N2_R 2 17
3 4 USB20_P2_R D- 17
3 D+ <31> HP_R 18 18
L16 WCM2012F2SF-900T04_0805 4 19
GND HeadPhone/LINE Out JACK <31> HP_L 19
3
2 1 USB20_P2_R 5 20
2 1 D19 GND MIC1_L 20
6 GND <31> MIC1_L 21 21
2 1 PJDLC05C_SOT23-3 7 MIC1_R 22
GND <31> MIC1_R 22
@ 8 23
R421 0_0402_5% For EMI
GND Ext.MIC/LINE IN JACK <31> NBA_PLUG
24
23
<31> MIC_SENSE 24
@ ACON_UARBG-4K1926
P/N:SM070000K00
USB20_P2 <22> @
25
1
GND1
26 GND2
@ JUSB
2 2
Slot 1 Half PCIe Mini Card-WLAN & BT2.0 +3VS +3VS

Smart Card and New Card Kill SWITCH
2
+3VS +1.5VS
2
D24
0.1U_0402_16V4Z 0.1U_0402_16V4Z DAN217_SC59 R580
1 1 1 1 @
1
100K_0402_5%
CM17 CM18 CM19 CM20 CM21 CM22
1
1BS003-1211L_3P
2
2 2 2 2
47P_0402_50V8J 4.7U_0805_10V4Z 47P_0402_50V8J 4.7U_0805_10V4Z 3 KILL_SW#
@ JSMART For SED request For SED request 3
+5VS 1 2
USB20_N9 0_0402_5%2 SC@ 1 2
<22,27> USB20_N9 1 R838 2
USB20_P9 0_0402_5%2 2
Smart Card <22,27> USB20_P9 1 R837 3
SC@ 3
4 1
4 1
5
G1
6
G2
SW2
ACES_85201-0405N
+1.5VS +3VS
JWLAN
PCH_PCIE_WAKE# 1 2 WLAN_WAKE 1 2
3 <20,30> PCH_PCIE_WAKE# 1 2 3
R126 0_0402_5% 3 4 1 2 BT_PWRON
BT_PWRON 3 4 <33> EC_BT_PWRON
5 6 R132 0_0402_5%
JNEW 5 6
<19> CLKREQ_WLAN# 7 8 <23> PCH_BT_PWRON 1 2
7 8 R133 @ 0_0402_5%
9 10
USB20_N8 9 10
<22> USB20_N8 26 28 <19> CLK_WLAN# 11 12
USB20_P8 KSO0 G2 11 12
NewCard <22> USB20_P8 25
KSO1 G1
27 <19> CLK_WLAN 13
13 14
14
24 15 16
KSO2 ES2@ 15 16
<19> CLK_NEW# 23 17 18
KSO3 BT_PWRON 17 18 XMIT_OFF#
<19> CLK_NEW 22 1 2 19 20
KSO4 R127 0_0402_5% 19 20 PLT_RST#
21 21 22 PLT_RST# <5,22,28,30,33>
KSO5 21 22
<19> PCIE_PRX_NEWTX_N5 20 <19> PCIE_PRX_WLANTX_N2 23 24 1 2 +3VS
KSO6 23 24 R129 0_0402_5%
<19> PCIE_PRX_NEWTX_P5 19 <19> PCIE_PRX_WLANTX_P2 25 26
KSO7 25 26
18 27 28
KSO8 27 28
<19> PCIE_PTX_C_NEWRX_N5 17 29 30 D_CK_SCLK <12,13,14>
KSO9 29 30
<19> PCIE_PTX_C_NEWRX_P5 16 <19> PCIE_PTX_C_WLANRX_N2 31 32 D_CK_SDATA <12,13,14>
KSO10 31 32
15 <19> PCIE_PTX_C_WLANRX_P2 33 34
CLKREQ_NEW# KSO11 33 34
<19> CLKREQ_NEW# 14 35 36 USB20_N13 <22>
KSO12 35 36
+3VALW
EXP_CPPE#
13
KSO13 WLAN/ WiFi 37
37 38
38 USB20_P13 <22> Bluetooth 2.0
<22> EXP_CPPE# 12 +3VS 39 40
PCH_PCIE_WAKE# KSO14 39 40
11 41 42
SUSP# KSO15 41 42
<9,28,33,35,39,41,43> SUSP# 10 43 44
SYSON KSO16 43 44
<33,35,40> SYSON 9 45 46
KSO17 45 46
8 47 48
KSI0 47 48
+3VS 7 <33> E51_TXD 1 2 49 50
KSI1 49 50
6 <33> E51_RXD 1R1430 0_0402_5%
2 51 52
D_CK_SCLK KSI2 R1431 0_0402_5% 51 52 +3VS
5
D_CK_SDATA KSI3 CM29 0.1U_0402_16V4Z
4 53 54
PLT_RST# KSI4 GND1 GND2
3
KSI5
Debug card using 1 2
1
2 <33> EC_WL_OFF# 1 2
KSI6
5
+1.5VS 1 R28 ACES_88910-5204 R136 0_0402_5%
KSI7 100K_0402_5% 1.1K_0402_1%2_5% @ 1 2 WL_OFF# 2
P
R1315 <22> PCH_WL_OFF# B XMIT_OFF#
QS@ R137 @ 0_0402_5% 4
4 Y 4
PS_HPF05052-261000R 1 2 KILL_SW# 1
2
<33> EC_KILL_SW# A
G
@ BT_PWRON R130 0_0402_5%
1 2 UM1
3
<18> PCH_KILL_SW#
R131 @ 0_0402_5% NC7SZ08P5X_NL_SC70-5

Function Board/Left USB Port/WLAN/BT
Custom 1.0
PBL20 LA6772P M/B
A B C D E
5 4 3 2 1
UL1 8111E@
<19> PCIE_PRX_C_LANTX_P1 CL1 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_P1 22 31

HSOP LED3/EEDO
37
LED1/EESK
<19> PCIE_PRX_C_LANTX_N1 CL2 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_N1 23
HSON LED0
40 LL1,CL13 will be changed to
+LAN_VDD10
D PCIE_PTX_C_LANRX_P1
2.2uH&4.7uF after EVT test D
17 30 RL2 2 1 10K_0402_5%
<19> PCIE_PTX_C_LANRX_P1 PCIE_PTX_C_LANRX_N1 HSIP EECS/SCL
18 32 RL1 2 1 10K_0402_5% LL1
<19> PCIE_PTX_C_LANRX_N1 HSIN EEDI/SDA +LAN_REGOUT 1 2
4.7UH_1008HC-472EJFS-A_5%_1008 Close to Pin 27,39,12,47,48 +3V_LAN
RL19 0_0402_5% 16 1 LAN_MDI0+ 1 2
<19> CLKREQ_LAN# CLKREQB MDIP0 LAN_MDI0- Layout Note: LL1 must be
2
PLT_RST# MDIN0 LAN_MDI1+ within 200mil to Pin36, CL13 CL9
<5,22,28,29,33> PLT_RST# 25 4 1
2
+3V_LAN PERSTB MDIP1 LAN_MDI1- CL13,CL9 must be within 22U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL10
5
@ CLK_LAN MDIN1 LAN_MDI2+ 200mil to LL1 2 1
<19> CLK_LAN 19 7 1
2
REFCLK_P NC/MDIP2
1 2PCH_PCIE_WAKE# <19> CLK_LAN#
CLK_LAN# 20
REFCLK_N NC/MDIN2
8 LAN_MDI2- 0.1U_0402_16V4Z CL4
RL3 100K_0402_5% 10 LAN_MDI3+ 1 2
+3VS NC/MDIP3 LAN_MDI3- 0.1U_0402_16V4Z CL5
NC/MDIN3 11
LAN_X1 43 1 2
CKXTAL1 0.1U_0402_16V4Z CL6
1
LAN_X2 44 13 +LAN_VDD10 1 2
RL6 CKXTAL2 DVDD10 0.1U_0402_16V4Z CL7 8111E@
DVDD10 29
RTL8105E RTL8111E 1K_0402_1% 41 CL7 close to pin12
PCH_PCIE_WAKE# DVDD10 +LAN_VDD10 +LAN_EVDD10
<20,29> PCH_PCIE_WAKE# 28 LANWAKEB
Pin14 NC NC
2 ISOLATEB 26 ISOLATEB DVDD33 27 +3V_LAN 2 1
Pin15 NC 10K ohm PD 39 0_0603_5% LL2 1 2
DVDD33
Pin38 1K ohm Pull-high 14 12 1U_0402_6.3V6K CL17
NC/SMBCLK AVDD33 +3V_LAN
RL7 RL21 2 8111E@ 1 10K_0402_5% 15 42 +3V_AVDDXTAL CL18 0.1U_0402_16V4Z Close to Pin 3,6,9,13,29,41,45
15K_0402_5% RL22 1 NC/SMBDATA AVDD33 2 1
+3V_LAN 2 1K_0402_5% 38 GPO/SMBALERT AVDD33 47
48 +LAN_VDD10
AVDD33
Close to Pin 21
ENSWREG 33 1 2
ENSWREG 0.1U_0402_16V4Z CL19
EVDD10 21 +LAN_EVDD10
+LAN_VDDREG 34 VDDREG 1 2
35 3 +LAN_VDD10 0.1U_0402_16V4Z CL20
VDDREG AVDD10
AVDD10 6 1 2
C 0.1U_0402_16V4Z CL21 C
AVDD10 9
1 2 46 RSET AVDD10 45 1 2
RL5 2.49K_0402_1% +3V_LAN +LAN_VDDREG 0.1U_0402_16V4Z CL22
24 36 +LAN_REGOUT 1 2
GND REGOUT 0.1U_0402_16V4Z CL23 8111E@
49 PGND 60 mils 2 1
0_0603_5% LL3 1 2 1 2
0.1U_0402_16V4Z CL24 8111E@
RTL8111E-GR_QFN48_6X6 CL28 CL29 1 2
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL25 8111E@
2 1
+3VALW TO +3V_LAN CL23,CL24,CL25 close to pin6,9,41, respectively
Vgs=-4.5V,Id=3A,Rds<97mohm +3V_AVDDXTAL RL8 +3V_LAN

0_0402_5%
RL9 +LAN_VDD10
@ 0_0402_5% +3V_LAN
+3VALW +3V_LAN Reserved For 1.05V Crystal LAN Conn.
1
CL11 RL4 JLAN
PJ35 0.1U_0402_16V4Z 0_0402_5%
2 RJ45_MIDI3- 8
CL11 close to pin42 PR4-
2 1
2 1 ENSWREG RJ45_MIDI3+ 7
PR4+
JUMP_43X79 1 1
RJ45_MIDI1- 6
@ CL840 1U_0402_6.3V6K YL1 RL23 PR2-
4.7U_0805_10V4Z CL841 LAN_X1 1 2 LAN_X2 0_0402_5% RJ45_MIDI2- 5
@ 2 2 PR3-
@
25MHZ_20PF_7A25000012 RJ45_MIDI2+ 4
PR3+
B
1 1 B
RJ45_MIDI1+ 3
CL26 CL27 PR2+
27P_0402_50V8J 27P_0402_50V8J RJ45_MIDI0- 2
2 2 PR1-
9
RJ45_MIDI0+ SHLD1
1 10
PR1+ SHLD2
SANTA_130452-C
UL5 8111E@
CL39 1000P_0402_50V7K @
1
TCT1 MCT1
24 2 1 1 8111E@ 2
LAN_MDI3- 2 23 8111E@ RL11 75_0402_1% RJ45_MIDI3-
LAN_MDI3+ TD1+ MX1+ RJ45_MIDI3+
3 22
TD1- MX1- CL40 1000P_0402_50V7K
4 21 2 1 1 8111E@ 2
LAN_MDI2- TCT2 MCT2 8111E@ RL12 75_0402_1% RJ45_MIDI2-
5 20
6 19
TD2- MX2- CL41 1000P_0402_50V7K
For P/N and footprint 7 18 2 1 1 2 RJ45_GND 1 2 1000P_1808_3KV7K LANGND
LAN_MDI1- TCT3 MCT3 RL13 75_0402_1% RJ45_MIDI1- CL36
Please place them to ISPD page 8 17 1 1
LAN_MDI1+ TD3+ MX3+ RJ45_MIDI1+ CL37 CL38
9 16
UL1 TD3- MX3- CL42 1000P_0402_50V7K
10 15 2 1 1 2 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
LAN_MDI0- TCT4 MCT4 RL15 75_0402_1% RJ45_MIDI0- 2 2
11 14
12 13
TD4- MX4-
8105E 10/100M 1 RJ45_GND

8105E@ SUPERWORLD_SWG150401 For ESD
CL34
UL5 Place CL34 colse 0.1U_0402_25V4K D6 D7
to LAN chip 2
2 2 2 2
A A
1 1 1 1
3 3 3 3
@
AZC199-02SPR7G_SOT23-3 AZC199-02SPR7G_SOT23-3
10/100M transformer
8105E@

RTL8105E/8111E
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
RA2
+PVDD1 600 mA 0.1U_0402_16V4Z 2 1 0.1U_0402_16V4Z +5VS
1 1 0_0603_1% 1 1
CA57 CA44
CA56 CA43
2
0_0603_5% RA1 +3VS_DVDD RA32 0_0603_5%
1 2 35 mA +DVDD_IO 2 1 JA1 2 2 2 2
2
+3VS +3VS
1 1 JUMP_43X39 10U_0805_10V4Z 10U_0805_10V4Z
@ JMIC 1 1
1
1 MIC CA8 CA7 @ place close to chip
1 CA1 CA2
2 10U_0805_10V4Z 0.1U_0402_16V4Z 2 1 +1.5VS
1
2 2 2
0.1U_0402_16V4Z 10U_0805_10V4Z
3 2 2 RA33 0_0603_5% RA12
GND +PVDD2 0.1U_0402_16V4Z
D GND
4 place close to chip @
2 1 +5VS D
place close to chip 1 1 0_0603_1% 1 1
ACES_88231-02001 0.1U_0402_16V4Z CA60 @ CA59 CA58
+AVDD CA61 @ @ @
RA3
68 mA 10U_0805_10V4Z 0.1U_0402_16V4Z 2 1 2 2 2 2
+5VS
0_0603_1% 10U_0805_10V4Z 10U_0805_10V4Z
UA12
MIC1_LINE1_R_R CA9 1 2 4.7U_0402_4V7K 1 1 1 1
22 1 CA3 CA4 CA5 CA6
MIC1_LINE1_R_L CA11 1 MIC1_R DVDD
2 4.7U_0402_4V7K 21
MIC1_L DVDD_IO
9
MIC 1 2 MIC2R_R CA26 2 1 1U_0402_6.3V6K MIC2_R 17 25 2 2 2 2
RA25 1K_0402_5% MIC2_L 16 MIC2_R AVDD1 10U_0805_10V4Z 0.1U_0402_16V4Z
MIC2_L AVDD2 38
1 2 MIC2R_L CA28 2 1 1U_0402_6.3V6K
RA26 1K_0402_5% +MIC1_VREFO_L 31 39 +PVDD1 place close to chip
MIC1_VREFO_L PVDD1 +PVDD2
+MIC1_VREFO_R 30 MIC1_VREFO_R PVDD2 46 For EMI
+MIC2_VREFO 29 @ @
MIC2_VREFO RA72 CA30
Ext. RA39 RA34
0_0402_5% 0_0402_5% 15 45 SPKR+ HDA_BITCLK_AUDIO 1 2 1 2
Mic/LINE IN @ @ LINE2_R SPK_OUT_R+ SPKR-
14 LINE2_L SPK_OUT_R- 44
10_0402_5% 10P_0402_50V8J
3
1 20 40 SPKL+
MONO_OUT SPK_OUT_L+ SPKL-
2 1 2 +MIC2_VREFO SPK_OUT_L- 41
1 2 MONO_IN 12
DA10 RA51 4.7K_0402_5% CA12 100P_0402_50V8J PCBEEP_IN
PESD5V0U2BT_SOT23-3 HDA_SYNC_AUDIO 10 33 RA4 75_0402_1%
<18> HDA_SYNC_AUDIO SYNC HPOUT_R HP_R <29>
HPOUT_L 32
11 RA5 75_0402_1%
<18> HDA_RST_AUDIO# RESET# HP_L <29>
5 HDA_SDOUT_AUDIO HDA_SDOUT_AUDIO <18>
SDATA_OUT HDA_SDIN0_R
SDATA_IN 8 2 1 HDA_SDIN0 <18>
C 20K_0402_1% 1 RA10 2 AC_JDREF RA6 33_0402_5% C
19 JDREF
CA35 2 110U_0805_10V4Z28 6 HDA_BITCLK_AUDIO
AC_VREF 27 LDO_CAP BITCLK HDA_BITCLK_AUDIO <18>
2.2U_0603_6.3V6K 2 CA14CPVEE VREF
1 34 CPVEE
1 2 35 24
CA16 CBN NC
1 1 36 CBP NC 23
2.2U_0603_6.3V6K 48
CA17 CA18 NC
10U_0805_10V4Z
2 2
2
3
GPIO0/DMIC_DATA
26
Speaker Connector
0.1U_0402_16V4Z GPIO1/DMIC_CLK AVSS1
AVSS2
37
AGND placement near Audio Codec
42
SENSE_A PVSS1 RA13
place close to chip 13
SENSE_A PVSS2
43
SENSE_B 18 7 SPKL+ 2 1 SPK_L1
SENSE_B DVSS DGND 0_0603_1% 1
EAPD 47 DA8
<33> EAPD EAPD
EC_MUTE# 4 49 CA19 2
<33> EC_MUTE# PD# THERMAL_PAD
+AVDD 1 2 @ 10U_0805_10V4Z 2 1
RA27 1K_0402_5% 2
3
ALC259-VB5-GR_QFN48_7X7 CA42
@ 1
1U_0402_6.3V6K PESD5V0U2BT_SOT23-3
CA46 1 @ JSPK
RA14 @ 10U_0805_10V4Z SPK_L2 1
SPKL- 2 SPK_L2 SPK_L1 1
2 1 2
2
0_0603_1% SPK_R2 3 5
RA15 SPK_R1 3 G1
4 6
Ext.MIC/LINE IN JACK SPKR+ 2
0_0603_1%
1 SPK_R1
DA9
4 G2
ACES_88266-04001
1
2 @
CA47 1 2 0.1U_0603_50V7K RA47 2 RA48 1 +MIC1_VREFO_R CA51 1
1K_0402_5% 4.7K_0402_5% @ 10U_0805_10V4Z 2 3
CA48 1 2 0.1U_0603_50V7K MIC1_LINE1_R_R 2 1 2
B MIC1_R <29> CA45 B
1 PESD5V0U2BT_SOT23-3
CA49 1 2 0.1U_0603_50V7K 1U_0402_6.3V6K
MIC1_LINE1_R_L 2 1 CA39 1 @
MIC1_L <29>
CA50 1 2 0.1U_0603_50V7K 1K_0402_5% RA44 @ 10U_0805_10V4Z
RA45 RA46 1 SPKR- 2 SPK_R2
2 +MIC1_VREFO_L 2 1
1 2 4.7K_0402_5% 0_0603_1%
RA43 0_0603_5%
place close to chip Beep sound

Sense Pin Impedance Codec Signals Function EC Beep RA8
<33> EC_BEEP# 1 2
<29> MIC_SENSE 1 2 SENSE_A 47K_0402_5%
39.2K PORT-A (PIN 39, 41) Headphone out RA18 20K_0402_1%
1 2
20K PORT-B (PIN 21, 22) Ext. MIC
<29> NBA_PLUG
PCI Beep RA9
CA15
SENSE A RA16 39.2K_0402_1% 1 2 1 2 MONO_IN
<18> HDA_SPKR
47K_0402_5%
10K PORT-C (PIN 23, 24) 0.1U_0402_16V4Z
1 2 SENSE_B
1
5.1K PORT-D (PIN 35, 36) RA19 20K_0402_1% 1
A RA11 CA20 A
39.2K PORT-E (PIN 14, 15) 10K_0402_5% 0.1U_0402_16V4Z

2
2
20K PORT-F (PIN 16, 17) Int. MIC
SENSE B
10K PORT-H (PIN 37) Security Classification Compal Secret Data Compal Electronics, Inc.
5.1K PORT-I (PIN 32, 33) HD Audio Codec ALC259
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
A B C D E
For EMI
3 in 1 Card Reader RC2
@
CC2
@
CLK_48M_CR 1 2 1 2
10_0402_5% 10P_0402_50V8J
1 2
@ CC15 100P_0402_50V8J
RC4
6.19K_0402_1% UC2
2 1 1
REFE
1 CARD@ 1
17
USB20_N11 GPIO0
<22> USB20_N11 2
+3VS +3VS_CR USB20_P11 DM CLK_48M_R
<22> USB20_P11 3
DP CLK_IN
24 1 2 CLK_48M_CR <19> < 48MHz >
RC5 RC28 0_0402_5%
0_0603_5% +3VS_CR 4 23
CARD@ 3V3_IN XD_D7
+VCC_3IN1 5
V1_8 CARD_3V3 MSBS
1 1 CC8 6
V18 SP14
22
CC11 0.1U_0402_16V4Z 1 21 SD_DATA2_MS_DATA5
CARD@ CARD@ CARD@ SP13 MS_DATA1_SD_DATA3
7 20
4.7U_0805_10V4Z 1U_0402_6.3V6K XD_CD# SP12
19
2 2 CC12 SDWP_MSCLK_R SDWP_MSCLK SP11 SDCMD
1 2 8
SP1 SP10
18
2 RC25 0_0402_5% MSCD# 9 16 MS_DATA0_SD_DATA5
SD_DATA1 SP2 SP9 MS_DATA2_SDCLK MS_DATA2_SDCLK_R
1 10 SP3 SP8 15 1 2
EPAD
SD_DATA0 11 14 RC23 0_0402_5%
CC14 MS_DATA3_SD_DATA7 SP4 SP7 SDCD#
12 SP5 SP6 13 1 CC13
10P_0402_50V8J 10P_0402_50V8J
2 RTS5138-GR_QFN24_4X4 @
@
25
CARD@
2
@ JCR
1 SDWP_MSCLK_R
SD-WP-SW SD_DATA1
SD-DAT1 2
3 SD_DATA0
SD-DAT0
SD-GND 4
MS-GND 5
6 MSBS
MS-BS MS_DATA2_SDCLK_R
SD-CLK 7
8 MS_DATA1_SD_DATA3
MS-DAT1 MS_DATA0_SD_DATA5
MS-DAT0 9
SD-VCC 10 +VCC_3IN1
MS-DAT2 11
2 2
SD-GND 12 1 CARD@ 1
13 MSCD# CC16 CARD@
MS-INS MS_DATA3_SD_DATA7 1U_0402_6.3V6K Close to OSC1
MS-DAT3 14
15 SDCMD 0.1U_0402_16V4Z CC17 48MHz_SSW048000I3CH
SD-CMD 2 2
MS-SCLK 16
MS-VCC 17 2 GND CONT 1 1 2 +3VS_CR
18 RC27 0_0402_5%
SD-DAT3 @
19
MS-GND SD_DATA2_MS_DATA5
22 20
GND1 SD-DAT2 SDCD# CLK_48M_R OSC_48M_CR
23 21 1 2 3 4 +3VS_CR
GND2SD-CD-SW RC26 0_0402_5% OUT VDD
TAITW_R009-121-LK_RV @ OSC1
@ 1
CC7
0.1U_0402_16V4Z
@
2
For EMC
KSO17 1 2
KSO16
C809
1
100P_0402_50V8J
2
KEYBOARD CONN.
C806 100P_0402_50V8J
KSO10 1 2
C803 100P_0402_50V8J JKB
3 KSO11 3
1 2 28
C804 100P_0402_50V8J GND
27
KSO12 1
C805
2
100P_0402_50V8J
GND
26
25
26
25
KSI7
KSI6
SPI Flash (1MByte*1) Lid SW
KSO15 1 2 24 KSI5
C807 100P_0402_50V8J 24 KSI4
23
KSI7 23 KSI3
1 2 22 +3VALW 1 2 2 1 +3VALW
C808 100P_0402_50V8J 22 KSI2 R744 3VALW@ 0_0402_5% 0_0402_5% R748
21
KSI2 21 KSI1
1 2 20 +3VL 1 2 2 1 +3VL
C810 100P_0402_50V8J 20 KSI0 R745 3VL@ 0_0402_5% 0_0402_5% @ R747
19
KSI3 19 KSO17
1 2 18
18
C824 100P_0402_50V8J 17 KSO16 1 20mils
KSI4 17 KSO15 C789 U49
1 2 16
16
C826 100P_0402_50V8J 15 KSO14 8 4
15 VCC VSS LID_SW# <33>
3
KSI0 1 2 14 KSO13 0.1U_0402_16V4Z
C823 100P_0402_50V8J 14 KSO12 2 U36
13 3
OUTPUT
VDD
KSI5 13 KSO11 W
1 2 12 AH180WG-7_SC59-3
C825 100P_0402_50V8J 12 KSO10
11 7
KSI6 11 KSO9 HOLD
1 2 10
GND
C871 100P_0402_50V8J 10 KSO8
9 <33> SPI_CS# 1 1 1
KSI1 9 KSO7 S
1 2 8
C822 100P_0402_50V8J 8 KSO6 C648 C649
7 6
1
KSO2 7 KSO5 <33> SPI_CLK C
1 2 6 0.1U_0402_16V4Z 0.1U_0402_16V4Z
C793 100P_0402_50V8J 6 KSO4 2 2
5 <33> EC_SO_SPI_SI 5 2 EC_SI_SPI_SO <33>
KSO1 5 KSO3 D Q
1 2 4
C790 100P_0402_50V8J 4 KSO2 MX25L2005CMI-12G SO8
3
KSO0 3 KSO1
1 2 2
2
C791 100P_0402_50V8J 1 KSO0
KSO4 1 2
1 P/N :SA00002C100
C792 100P_0402_50V8J ACES_88514-2601
KSO3 1 2 @
C795 100P_0402_50V8J @ C931 @R1369
@ R1369
4 KSO5 SPI_CLK 4
1 2 2 1 2 1
C796 100P_0402_50V8J
KSO14 1 2 6P_0402_50V 10_0402_5%
C797 100P_0402_50V8J KSI[0..7]
KSI[0..7] <28,33>
KSO6 1 2
C798 100P_0402_50V8J KSO[0..17]
KSO7 KSO[0..17] <33>
1 2
C799 100P_0402_50V8J
KSO13 1 2
C800 100P_0402_50V8J Issued Date 2010/05/17 2011/05/17 Title
KSO8 Deciphered Date
1 2
C801 100P_0402_50V8J
RTS5138 CR/KB/EC SPI/LID
KSO9 1 2 Size Document Number Rev
C802 100P_0402_50V8J Custom 1.0
PBL20 LA6772P M/B
A B C D E
5 4 3 2 1
R715
+3VALW 0_0805_5% 3VALW@
1 2
@ C744 @ R716
22P_0402_50V8J 33_0402_5% R714 L53
2 1 2 1 CLK_PCI_LPC +3VL 0_0805_5% 3VL@ FBMA-L11-160808-800LMT_0603
1 2 +3VALW_EC 1 2 +EC_VCCA
1 1 1 1 2 2 1
0.1U_0402_16V4Z
C737
0.1U_0402_16V4Z
C738
0.1U_0402_16V4Z
C739
0.1U_0402_16V4Z
C740
1000P_0402_50V7K
C741
1000P_0402_50V7K
C742
C743
D 0.1U_0402_16V4Z D
2 2 2 2 1 1 2
ECAGND
111
125
22
33
96
67
U32
9
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
C930
+3VALW_EC R718 2 1 47K_0402_5% ECRST# For EMI
GATEA20 CPU1.5V_S3_GATE R1458
1 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F 21 CPU1.5V_S3_GATE <9> 1 2
C745 2 0.1U_0402_16V4Z <23> GATEA20 KB_RST# EC_BEEP#
1 <23> KB_RST# 2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 EC_BEEP# <31>
SERIRQ 3 26 EC_DPWROK
<18,28> SERIRQ SERIRQ# FANPWM1/GPIO12 EC_DPWROK <20> 10P_0402_50V8J
LPC_FRAME# 4 27 ACOFF
<18,28> LPC_FRAME# LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <37> 10_0402_5%
<18,28> LPC_AD3 5 LAD3
LPC_AD2 7 PWM Output C746 2 1 100P_0402_50V8J ECAGND SPI_CLK_R 2 1
+3VALW_EC <18,28> LPC_AD2 LPC_AD1 LAD2 BATT_TEMPA SPI_CLK <32>
8 63 0_0402_5% R1458
<18,28> LPC_AD1 LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 P_USB_EN# BATT_TEMPA <36>
10/1 ENE Recommand @
<18,28> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I
ADP_I/AD2/GPIO3A 65 ADP_I <36,37>
R723 1 2 47K_0402_5% KSO1 CLK_PCI_LPC 12 AD Input 66 Board_ID
<22> CLK_PCI_LPC PCICLK AD3/GPIO3B
<5,22,28,29,30> PLT_RST# 13 PCIRST#/GPIO05 AD4/GPIO42 75
R728 1 2 47K_0402_5% KSO2 ECRST# 37 76 IMON 2 1
ECRST# SELIO2#/AD5/GPIO43 IMVP_IMON <44>
EC_SCI# 20 R742 @ 0_0402_5%
<23> EC_SCI# SCI#/GPIO0E
R743 1 2 10K_0402_5% USB30_OC# PAD T64 @ 38 CLKRUN#/GPIO1D
68 P_USB_EN# 1 2 PWR_USB_EN#
DAC_BRIG/DA0/GPIO3C EN_DFAN1 R750 @ 0_0402_5%
EN_DFAN1/DA1/GPIO3D 70 EN_DFAN1 <5>
DA Output 71 IREF
IREF/DA2/GPIO3E IREF <37>
KSI0 55 72 CHGVADJ
KSI1 KSI0/GPIO30 DA3/GPIO3F CHGVADJ <37>
56 KSI1/GPIO31
KSI2 57
+3VALW_EC KSI3 KSI2/GPIO32 EC_MUTE# +3VALW_EC
58 KSI3/GPIO33 PSCLK1/GPIO4A 83
C KSI4 USB_EN# EC_MUTE# <31> C
59 KSI4/GPIO34 PSDAT1/GPIO4B 84 USB_EN# <29>
KSI5 60 85 PWR_USB_LED# Board_ID R117 1 @ 2 100K_0402_5%
EC_SMB_DA1 KSI6 KSI5/GPIO35 PSCLK2/GPIO4C DRAMRST_CNTRL_EC PWR_USB_LED# <34>
R729 1 2 2.2K_0402_5% 61 PS2 Interface 86
KSI7 KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK DRAMRST_CNTRL_EC <7>
62 87 R749 1 2 0_0402_5%
EC_SMB_CK1 KSI[0..7] KSO0 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_DATA TP_CLK <34>
R731 1 2 2.2K_0402_5% 39 88 @
<28,32> KSI[0..7] KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <34>
40 KSO1/GPIO21
KSO[0..17] KSO2 41
<32> KSO[0..17] KSO2/GPIO22
@ C748 @ R732 KSO3 42 97 SUSACK# SUSACK# <20>
22P_0402_50V8J 33_0402_5% KSO4 KSO3/GPIO23 SDICS#/GPXOA00 EC_WL_OFF#
43 98 EC_WL_OFF# <29>
KSO5 KSO4/GPIO24 SDICLK/GPXOA01 HDA_SDO +3VALW_EC
KSO5/GPIO25 Int. K/B
2 1 1 2 44 99 HDA_SDO <18>
KSO6 SDIDO/GPXOA02 VGATE
45 109
KSO7 KSO6/GPIO26 Matrix SDIDI/GPXID0 VGATE <14,20,44>
LID_SW#
46
KSO7/GPIO27 SPI Device Interface R766 1 2 47K_0402_5%
Reserve for EMI please close to U32 KSO8 47
KSO9 KSO8/GPIO28 EC_SI_SPI_SO
48 119 EC_SI_SPI_SO <32>
KSO10 KSO9/GPIO29 SPIDI/RD# EC_SO_SPI_SI
49 120 EC_SO_SPI_SI <32>
+3VS KSO11 KSO10/GPIO2A SPIDO/WR# SPI_CLK_R
50
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
126
KSO12 51 128 SPI_CS# +5VS
KSO12/GPIO2C SPICS# SPI_CS# <32>
R738 1 2 2.2K_0402_5% EC_SMB_CK2 KSO13 52
KSO13/GPIO2D
KSO14 53 TP_CLK R720 1 2 4.7K_0402_5%
KSO14/GPIO2E
R739 1 2 2.2K_0402_5% EC_SMB_DA2 KSO15 54
KSO15/GPIO2F CIR_RX/GPIO40
73 PM_PWROK
PM_PWROK <20>
KSO16 81 74 EC_PECI R740 1 2 43_0402_1% TP_DATA R727 1 2 4.7K_0402_5%
KSO16/GPIO48 CIR_RLC_TX/GPIO41 H_PECI <5,23>
R741 1 2 10K_0402_5% EC_SCI# KSO17 82 89 FSTCHG
FSTCHG <37>
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 BATT_FULL_LED# +3VS
90 BATT_FULL_LED# <34>
BATT_CHGI_LED#/GPIO52 CAPS_LED#
91 CAPS_LED# <34>
EC_SMB_CK1 CAPS_LED#/GPIO53 BATT_CHG_LOW_LED# GFX_CORE_PWEGD R722
<36> EC_SMB_CK1 77
SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54
92 BATT_CHG_LOW_LED# <34> 1 2 10K_0402_5%
EC_SMB_DA1 78 93 PWR_ON_LED#
<36> EC_SMB_DA1 EC_SMB_CK2 SDA1/GPIO45 SUSP_LED#/GPIO55 SYSON PWR_ON_LED# <34> BKOFF#
<19> EC_SMB_CK2 79
SCL2/GPIO46 SM Bus SYSON/GPIO56
95 SYSON <29,35,40>
R724 1 2 10K_0402_5%
EC_SMB_DA2 80 121 VR_ON
<19> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <44>
127 PM_SLP_S4#
AC_IN/GPIO59 PM_SLP_S4# <20>
+3VALW
PM_SLP_S3# 6 100 PCH_RSMRST#
B <20> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 PCH_RSMRST# <18,20> B
PM_SLP_S5# 14 101 LID_SW_OUT# EC_MUTE# R717 2 1 10K_0402_5%
<20> PM_SLP_S5# EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 PWR_USB_EN# LID_SW_OUT# <19>
15 102 @
<23> EC_SMI# GFX_CORE_PWEGD EC_SMI#/GPIO08 EC_ON/GPXO05 EC_BT_PWRON PWR_USB_EN# <34>
<44> GFX_CORE_PWEGD 16 103 EC_BT_PWRON <29>
WL_BT_LED# LID_SW#/GPIO0A EC_SWI#/GPXO06 H_PROCHOT#_EC
<34> WL_BT_LED# 17 104
PM_SLP_SUS# SUSP#/GPIO0B ICH_PWROK/GPXO06 BKOFF#
<20> PM_SLP_SUS# 18
PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08
105 BKOFF# <15> +3VALW_EC
SUSWARN# 19 GPIO 106 ENBKL
<20> SUSWARN# INVT_PWM EC_PME#/GPIO0D WL_OFF#/GPXO09 PCH_APWROK ENBKL <21>
<15> INVT_PWM 25 107 PCH_APWROK <20>
FAN_SPEED1 EC_THERM#/GPIO11 GPXO10 SA_PGOOD R730
28
FAN_SPEED1/FANFB1/GPIO14 GPXO11
108 SA_PGOOD <43> 2 1 200K_0402_5%
<5> FAN_SPEED1 PCH_PWR_EN
<35> PCH_PWR_EN 29
E51_TXD FANFB2/GPIO15
<29> E51_TXD 30
E51_RXD EC_TX/GPIO16 EC_ACIN
<29> E51_RXD 31 110 2 1 ACIN <20,37>
EAPD EC_RX/GPIO17 PM_SLP_S4#/GPXID1 EC_ON D15 CH751H-40PT_SOD323-2
<31> EAPD 32 112 EC_ON <28,34,38>
USB30_OC# ON_OFF/GPIO18 ENBKL/GPXID2 ON/OFFBTN#
34 114 ON/OFFBTN# <34>
NUM_LED# PWR_LED#/GPIO19 GPXID3 LID_SW# EC_ACIN C749
<34> NUM_LED# 36 GPI 115 LID_SW# <32> 2 1 100P_0402_50V8J
NUMLED#/GPIO1A GPXID4 SUSP#
116 SUSP# <9,28,29,35,39,41,43>
GPXID5 PBTN_OUT#
117 PBTN_OUT# <18,20>
GPXID6 EC_KILL_SW#
118 EC_KILL_SW# <29>
GPXID7
122
XCLK1 +EC_V18R
<20> SUSCLK 123 124
XCLK0 V18R
1
AGND
C753
GND
GND
GND
GND
GND
4.7U_0805_10V4Z R737
KB930QF A1 LQFP 128P 2 0_0402_5%
11
24
35
94
113
69
20mil VR_HOT# 2 1 H_PROCHOT# <5>

<36,44> VR_HOT#
L54
ECAGND 2 1
1
FBMA-L11-160808-800LMT_0603 D
H_PROCHOT#_EC 2
G
C18 R24
Q37 S
3
2N7002_SOT23
A A
0_0402_5% 100K_0402_5%
For EMI
@ @
C18 R24
2 1 2 1 SUSCLK
10P_0402_50V8J
C747
10_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
22P_0402_50V8J
2 1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB930
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
Power Button/ PWR/B Touch/B Connector
JPOWER @
1 1 +5VALW For ESD
2 2 ON/OFFBTN#_R PWR_ON_LED# <33> P/N:SCA00001900
3 3 +5VS
For ESD 4 4 C755
P/N:SCA00000W00 G1 5
G2 6 1 2
TP_CLK LEFT_BTN#
PJDLC05C_SOT23-3
ACES_85201-0405N
0.1U_0402_16V4Z TP_DATA RIGHT_BTN#
3
1
2
PWR_ON_LED# 2 JTP
1 D18 D16
1
D20 2 TP_CLK <33> PJDLC05C_SOT23-3 PJDLC05C_SOT23-3
2
3 TP_DATA <33>
+3VALW +3VL 3 LEFT_BTN#
4 1 1
4 RIGHT_BTN# @ @
1 2 5
5
100P_0402_50V8J
C757
100P_0402_50V8J
C759
6
C24 220P_0402_50V8K 3VALW@ 3VL@ 6
7
R168 R765 GND 2 2
8
1
100K_0402_5% 100K_0402_5% GND
D9 ACES_85201-06051
1
7236LGH ON/OFFBTN#_R
2 ON/OFFBTN# <33>
@
2 1 1
R153 @ 10K_0603_5% 3 1 R746 2 51_ON# <36>
2 1 1 3VALW@ 0_0402_5%
R154 @ 10K_0603_5% @ C646 CHN202UPT SC-70
%RWWRP6LGH 0.1U_0402_16V4Z SW9 SW4
1
D SMT1-05-A_4P SMT1-05-A_4P
2 2 Q20 LEFT_BTN# 3 1 RIGHT_BTN# 3 1
<28,33,38> EC_ON G 2N7002_SOT23-3
2
S 4 2 4 2
3
R514
10K_0402_5%
5
6
5
6
1
Screw Hole
ISPD H1 H2 H3 H4 H5
LED ZZZ ZZZ1 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8
1
R658
820_0402_5% @ @ @ @ @
1 2 2 1 LED2
PCB H6 H7 H8 H9 H10 H11 H12
+5VS SATA_LED# <18>
HT-191NB_BLUE_0603 PCB LA-6772P REV01 PCB LA-6772P REV01
DA6@ DAZ@ H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_3P6x2P6N H_2P6N
1
R660
820_0402_5%
PWR_ON_LED# @ @ @ @ @ @ @
+5VALW 1 2 2 1 LED3 PJPDC1
HT-191NB_BLUE_0603
DC-IN
R663 HT-191UD_AMBER_0603 PJPDC1
820_0402_5% Amber 45@ JWLAN
+5VALW 1 2 2 1 LED4 BATT_CHG_LOW_LED# <33>
H20
R664 Blue
+5VALW 1 2 2 1 LED5 BATT_FULL_LED# <33>
820_0402_5% H_1P1
1
HT-191NB_BLUE_0603
@
R666
820_0402_5% LED6 Amber CPU
+5VS 1 2 2 1 WL_BT_LED# <33>
H22 H23 H24 H25
HT-191UD_Amber_0603 +5VALW +5VS JLED
BT/WLAN LED 10
9
GND H_4P2 H_4P2 H_4P2 H_4P2
1
GND
W=20mils 8
8
7
PWR_USB 7 @ @ @ @
6
PWR_USB_LED# 6
<33> PWR_USB_LED# 5
CAPS_LED# 5
<33> CAPS_LED# 4
+3VALW NUM_LED# 4
<33> NUM_LED# 3
3
2
1
2
1 PCB Fedical Mark PAD
1
R515 @
3
2
ACES_85201-08051
10K_0402_5% D33 D34
PSOT24C_SOT23 PSOT24C_SOT23 FD1 FD2 FD3 FD4
2
D25 @
2 PWR_USB_EN#
PWR_USB PWR_USB_EN# <33>
1 For ESD
1
1
3 51_ON#
P/N:SCA00000W00
BAV70W_SOT323-3 @ @ @ @
For ESD
1 2 PWR_USB_LED#
Power B/TP/LED
C25 220P_0402_50V8K B 1.0
PBL20 LA6772P M/B
A B C D E
+5VALW
+5VALW TO +5VS +3VALW TO +3VALW_PCH
2
R802
+5VALW +5VS 100K_0402_5%
+3VALW +3VALW_PCH
1
1 1 2 2 J2 @ SYSON#
Q33 C852 C845 C853 C855 1 2
1 2
6
470_0805_5%
8 1 1U_0402_6.3V6K 4.7U_0805_10V4Z
D S
2
7 2 JUMP_43X79 0.1U_0402_16V7K
D S 2 2 R782 1 1 0.1U_0402_16V7K Q44A
6
D S
3 40mil SYSON
5 4 <29,33,40> SYSON 2
D G DMN66D0LDW-7_SOT363-6
1 1 2 2
1
1 SI4800BDY_SO8 RUN_ON 1
1 R785 2 +VSB Q38 C848 C839 4.7U_0805_10V4Z C875 C846
3 1
1
470_0805_5%
0.1U_0603_25V7K
4.7U_0805_10V4Z
2 1 1 47K_0402_5% 0.1U_0402_16V7K 8 1 1U_0402_6.3V6K R805

D S
2
C856 0.1U_0402_16V7K 7 2 100K_0402_5%
C842 C843 R788 Q36A D S 2 2 R791 1 1
6 3
330K_0402_5% Q36B D S
5 4
2
1 2 2 SUSP 5 D G
2
2N7002DW-T/R7_SOT363-6 SI4800BDY_SO8 1 R790 2 +VSB
3 1
0.022U_0402_25V7K
4.7U_0805_10V4Z
2N7002DW-T/R7_SOT363-6 2 1 1 10mil 47K_0402_5%
6
C874 C847 +5VALW
20mil
0.1U_0402_16V7K C849 R792 Q216A
SB548000210 330K_0402_5% Q216B
2
1 2 2 2 PCH_PWR_EN#5
2N7002DW-T/R7_SOT363-6 R808
2
2N7002DW-T/R7_SOT363-6 100K_0402_5%
4
0.1U_0402_16V7K
1
SB548000210 SUSP
<5,42> SUSP
3
+3VALW TO +3VS
Vgs=-0V,Id=9A,Rds=18.5mohm Q44B
5 DMN66D0LDW-7_SOT363-6
<9,28,29,33,39,41,43> SUSP#
+3VALW +3VS 0.1U_0402_16V7K
1
0.1U_0402_16V7K
4
R809
1 1 2 2 10K_0402_5%
Q32 C828 C827 4.7U_0805_10V4Z C873 C844
470_0805_5%
8 1 1U_0402_6.3V6K
2
D S
2
7 D S 2
2 2 R781 1 1
6 D S 3
5 D G 4
2 +5VALW 2
SI4800BDY_SO8 1 R784 2 +VSB
3 1
0.022U_0402_25V7K
4.7U_0805_10V4Z
2 1 1 47K_0402_5%
1
2
C872 C834
C830 R787 Q35A R813
330K_0402_5% Q35B 100K_0402_5%
1 2 2 2 SUSP 5
2N7002DW-T/R7_SOT363-6
2
1
2N7002DW-T/R7_SOT363-6 PCH_PWR_EN#
1
<25> PCH_PWR_EN#
0.1U_0402_16V7K
SB548000210
1
D
<33> PCH_PWR_EN 2 Q49
G 2N7002E-T1-GE3_SOT23-3
1
S
3
R816
100K_0402_5%
2
+1.5V to +1.5VS
Vgs=10V,Id=14.5A,Rds=6mohm
+1.5V +1.5VS
1 1
Q34 C838
470_0805_5%
8 1 1U_0402_6.3V6K C829
D S
2
3 4.7U_0805_10V4Z 3
7 2
D S 2 2
6 3
D S R783
5 4
D G
SI4856ADY_SO8 1 R786 2 +VSB
3 1
4.7U_0805_10V4Z
1 220K_0402_5%
1
6
0.1U_0603_25V7K
FDS6676AS 1
C836 R789 Q214A
C837 820K_0402_5% Q214B
2 2 SUSP 5 2 1
2 +3VS +1.05VS_PCH
2N7002DW-T/R7_SOT363-6
2
2N7002DW-T/R7_SOT363-6 @ C878 0.1U_0402_16V7K

1
+3VS 2 1 +3VALW
@ C876 0.1U_0402_16V7K
+3VS 2 1 +3VALW
@ C877 0.1U_0402_16V7K
For EMI
2009/08/14
CP_S3PowerReduction
WhitePaper_Rev0.9 @ C880 @ C881 @C879
@ C879 @ C886
0.75VS speed up discharge +3VS 2 1 +CPU_CORE +3VS 2 1 +1.05VS_PCH +3VS 2 1 +3VALW +3VS 2 1 +3VALW
1 0.1U_0402_16V7K 1 1 0.1U_0402_16V7K 1 1 0.1U_0402_16V7K 1 1 0.1U_0402_16V7K 1

+0.75VS
+1.05VS_VCCP +1.8VS +1.5V C889 C890 C882 C883 C884 C885 C887 C888
0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K
1
4 2 2 2 2 2 2 2 2 4
@ @ @ @ @ @ @ @
2
R826
22_0603_5% R827 R828 @ R829
470_0603_5% 470_0603_5% 470_0603_5%
For ESD
2
1 1
1 1
1 1
1
D D D D
2 SUSP 2 SUSP 2 SUSP 2 SYSON#
G G G G Issued Date 2010/05/17 Deciphered Date 2011/05/17 Title
Q57 Q58 Q59 @ Q60
S S S S
DC Interface
3
2N7002E-T1-GE3_SOT23-3 2N7002E-T1-GE3_SOT23-3 2N7002E-T1-GE3_SOT23-3 2N7002E-T1-GE3_SOT23-3

Custom 1.0
PBL20 LA6772P M/B
A B C D E
A B C D
PL1
DCIN jack P/N:DC301008L00 HCB2012KF-121T50_0805
PH1 under CPU botten side :
need doble confirm P/N with ME 1 2
VIN CPU thermal protection at 93 +-3 degree C
PL2
HCB2012KF-121T50_0805
Recovery at 56 +-3 degree C
ADPIN 1 2 VL
@ SINGA_4TRJW T-R2513
1000P_0402_50V7K
1000P_0402_50V7K
<33,37> ADP_I
100P_0402_50V8J
100P_0402_50V8J
1 1
21.5K_0402_1%
2 2
1
PC1
PC2
PC3
PC4
1
3 3 1
PR1
PC5 PR26
4 4
2
0.1U_0603_16V7K 7.87K_0402_1%
2
PJPDC1
X7R type
2
PU1
1 8 OTP_N_001
VCC TMSNS1
VL 2 7 OTP_N_002 2 1
GND RHYST1
2
ADP_OCP_3
100K_0402_1%
3 6 PR2 10K_0402_1%
<33,44> VR_HOT# OT1 TMSNS2
PR23
1
4 5 ADP_OCP_2
1 2
OT2 RHYST2
OTP_N_003
2
G718TM1U_SOT23-8 PR24 51.1K_0402_1% PH1
1
1
D PR25 100K_0402_1%_NCP15W F104F03RC
PQ4 2 ADP_OCP_1 100K_0402_1%
2
SSM3K7002FU_SC70-3 G 2 1
S EN0 <38>
1
PR3 @0_0402_5%
PL3
HCB2012KF-121T50_0805 2 1
1 2 VS_ON <38>
PJP2 PR4 0_0402_5%
11 VMB If EC use 3VL and can not detect VGATE,
GND
GND 10 PL4 must connect EN0
9 HCB2012KF-121T50_0805
9
8 8 1 2 BATT+
7 7
B/I
Install when EC use +3VL
6 6
5 5 TS_A and SUSP was Pull high to +3VL.
1
4 EC_SMDA
@PJSOT24CW_SOT323-3
4
2
2
3 EC_SMCA PC6 PC7 2
3 1000P_0402_50V7K 0.01U_0402_25V7K
2 Reserve when EC use +3VALW.
2
2 GND
1 1 PR27 PJ1
1K_0402_1%
1
PD1 2 1
1
@ALLTO_C144FE-109A7-L 2 1
JUMP_43X39
2
100_0402_1%
B+ 3 1 +VSBP
1
1
100_0402_1%
PR31
PR28
100K_0402_1%
0.1U_0603_25V7K
0.22U_0603_25V7K
1
PD2
1
PC8
PC9
PR10
2
1
2
2
2
2
@PJSOT24CW _SOT323-3 PQ1
VL PR12 TP0610K-T1-E3_SOT23-3
EC_SMB_CK1 <33>
22K_0402_1%
1 2 VSB_N_001
EC_SMB_DA1 <33>
1VSB_N_003
PR13
1 2 100K_0402_1%
+3VALW
1K_0402_1%
1
PR29 PR16
1
D
PR30
6.49K_0402_1% 0_0402_5%
<38> POK 1 2VSB_N_002 2 PQ2
3
G SSM3K7002FU_SC70-3 3
.1U_0402_16V7K
S
2
3
1
PC10
BATT_TEMPA <33>
Reserve when EC use +3VL.
2
Install when EC use +3VALW.
VIN
2
PD3
PJ2
RLS4148_LL34-2
2 1
VS_N_001
+VSBP +VSB
1
2 1
JUMP_43X39
BATT+ 2 1 (120mA,40mils ,Via NO.= 1)

1
PD4
RLS4148_LL34-2 PQ3 PR17
TP0610K-T1-E3_SOT23-3 68_1206_5%
PR18
68_1206_5%
RTC Battery
+3VL
2
N1 3 1 VS
- PBJ1 + PR19
560_0603_5%
PR20
560_0603_5%
PJ3 3.3V
1
2 1 +RTCBATT1 1 2+RTCBATT2 1 2 +RTCBATT 2 1

+CHGRTC 2 1
1
PC12
PR21 PC11 0.1U_0603_25V7K JUMP_43X39
100K_0402_1% 0.22U_0603_25V7K
2
MAXEL_ML1220T10
2
1 2 VS_N_002
Must close PBJ1 4
<34> 51_ON#
PR22
22K_0402_1%
SP093MX0000
Change RTC For Cost Down
Reserve when EC use +3VL.
Install when EC use +3VALW.
DCIN / BATT CONN / OTP
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B
A B C D
A B C D
PC127 @10U_0805_25V6K
1 2
need change to 1206 size
PC126 @10U_0805_25V6K PL103
since ME limit 1.2UH_1231AS-H-1R2N=P3_2.9A_30%
1 2 1 2 B+
PQ101
AO4407AL_SO8 P2 PQ102 P3
PR101 B+ PL102 CHG_B+ PQ103
S TR AO4409 1P SO8 0.02_2512_1% @HCB2012KF-121T50_0805 AO4407AL_SO8
VIN 8 1 1 8 1 4 1 2 1 8
7 2 2 7 2 7
6 3 3 6 2 3 CSIN 3 6
10U_0805_25V6K
@10U_0805_25V6K
4.7U_0805_25V6-K
5 5 5
2200P_0402_25V7K
0.1U_0402_25V6
CSIP
4
1
1
1 1
PC103
PC104
PC125
VIN
PC105
PC106
CHG_N_005
3
PQ104 PR107 PR108
5600P_0402_25V7K
2
2
DTA144EUA_SC70-3 200K_0402_1% 191K_0402_1% PR110
0.1U_0603_25V7K
PC107
6251VDD 1 2 ACSETIN 47K_0402_1%
2
1
1
2 1 2
2.2U_0603_6.3V6K
1
1CHG_N_010
2
VIN
PC108
PC109
RB751V-40TE17_SOD323-2
2
PR109
1
47K_0402_1% PD101 PC110 PR112
14.3K_0402_1%
1000P_0402_25V8J 10K_0402_1%
2
PR111
1
CHG_VIN 1
1CHG_N_0081
CHG_N_003
2
CHG_N_001
PR113 PR115
2 PR114 ACSETIN 1 2 100K_0402_1%
PQ105 1 10K_0402_1% 1 2 CHG_N_001
DTC115EUA_SC70-3 2 1 PU101 10_1206_5% PC112
DCIN
<33> FSTCHG 1U_0603_25V6K
100K_0402_1%
PR116 1 24 1 2
3
VDD DCIN
1
150K_0402_1% PQ106
6
PR117
DTC115EUA_SC70-3 2 CHG_N_006
2
2 23 ACPRN
PQ107A ACSET ACPRN PR118
2 20_0603_5%
2
PQ108
3CHG_N_002
1
SSM6N7002FU-2N_SOT363-6 6251_EN CHG_CSON 1 CSON D
3 22 2
3
EN CSON
1
PC113 PC114 2 ACPRN
1
0.047U_0603_16V7K AON7408L_DFN8-5 @2200P_0402_25V7K G

4 21 CHG_CSOP 1 2 CSOP S PQ109
3
CELLS CSOP PR119 @SSM3K7002FU_SC70-3
PQ107B PC116 6800P_0402_25V7K 20_0603_5%
2
SSM6N7002FU-2N_SOT363-6 1 2 CHG_ICOMP 5 20 CHG_CSIN 2 1 4 2
ICOMP CSIN
2
PC118 PR120
CHG_N_009 5 PC117 PR121 6.81K_0402_1% 0.1U_0603_25V7K 20_0603_5%
1 2CHG_VCOMP1 1 2 CHG_VCOMP 6 19 CHG_CSIP 1 2
1
VCOMP CSIP PL101 PR102
4
3
2
1
0.01U_0402_25V7K PR123 100_0402_1% PR122 10U_LF919AS-100M-P3_5.3A_20% 0.02_1206_1% BATT+
PR124 1 2CHG_ICM 7 ICM PHASE 18 LX_CHG 2.2_0603_1% 1 2 CHG 1 4
1
22K_0402_5%
@4.7_1206_5%
5
6
7
8
PR125
PACIN 1 2 PC120 must close EC pin. 1 2 2 3
PC120 6251VREF DH_CHG
10U_0805_25V6K
10U_0805_25V6K
8 VREF UGATE 17
PR103 .1U_0402_16V7K PR126 PC121
<33,36>
150K_0402_1% ADP_I 0_0603_5% 0.1U_0603_25V7K
CHG_SNUB 2
1
PC101
PC102
2 1 CHG_CHLIM 9 16 BST_CHG 1 2 BST_CHGA 2 1
<33> IREF CHLIM BOOT
1
1
PR127 4
226K_0402_1% PD106
0.01U_0402_25V7K
2
6251VREF 1 2 6251aclim 10 15 6251VDDP RB751V-40TE17_SOD323-2
ACLIM VDDP
1
1
PC122
ACOFF PQ111 PR104 26251VDD
@680P_0603_50V7K
<33> ACOFF 2 Rtop 1
3
2
1
DTC115EUA_SC70-3 140K_0402_1% PR128 11 14 DL_CHG
VADJ LGATE
1
20K_0402_1% PR129 PQ110
2
PC124
4.7_0603_5% AO4468L_SO8
2
CHG_VADJ 12 13 PC123
3
2
GND PGND 4.7U_0805_6.3V6K
ISL6251AHAZ-T QSOP 24P
PR105
18.2K_0402_1%
1 2
<33> CHGVADJ
1
3
PR106 3
31.6K_0402_1%
2
6251VDD
PR133
1
10K_0402_1%
PR131 1 2 ACIN <20,33>
CP= 85%*Iada; 47K_0402_1% PR132
10K_0402_1%
Iada=0~4.737A(90W);CP=4.03A;where Racdet=0.020ohm,where Rtop=12.4K PACIN
2
90W for Dis:Rtop:SD00000AJ80
1
Iada=0~3.421A(65W);CP=2.91A;where Racdet=0.020ohm,where Rtop=226K C
1
ACPRN 2 PQ112
65W for UMA:Rtop:SD034226380 B PR136
Astro2010_01_15 need confirm P/N E 20K_0402_1%
Add
3
MMBT3904W _SOT323-3
2
CP mode
Vaclim=VREF*(Rbot//Rinternal/(Rtop//Rinternal+Rbot//Rinternal))
when 90W Vaclim=2.39*(20K//152K/(20K//152K+12.4K//152K))=1.44966V
when 65W Vaclim=2.39*(20K//152K/(20K//152K+226K//152K))=0.38914V
Iinput=(1/Racdet)*((0.05*Vaclim/VREF+0.05))
when 90W,Iinput=(1/0.02)*(0.05*1.44966/2.39+0.05)=4.02A
4 when 65W,Iinput=(1/0.02)*(0.05*0.38914/2.39+0.05)=2.92A 4
CC=0.25A~3A CHGVADJ=(Vcell-4)/0.10627
IREF=1.016*Icharge Vcell CHGVADJ
IREF=0.254V~3.048V 4V 0V
VCHLIM need over 95mV 4.2V 1.882V CHARGER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B 1.0
A B C D
A B C D E
2VREF_6182
1
1 1
PC308
1U_0603_16V6K
2
PR301 PR305
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PR302 PR306
B+ B++
20K_0402_1% 20K_0402_1%
FB_3V FB_5V 1 B++
PL301 1 2 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
PR303 PR307
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
105K_0402_1% 105K_0402_1%
1
1
4.7U_0805_25V6-K
1 2 1 2
1
1
PC309
PC310
PC311
PC312
PC304
PC306
PQ303
2
2
6
1
AON7408L_DFN8-5 PU301
2
5
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
1
PC313 PQ305
4 10U_0805_6.3V6M 25 AON7408L_DFN8-5
P PAD
2
7 VO2 VO1 24 4
2 2
1
2
3
PC314 8 23 PR309 PC315
0.1U_0402_10V7K PR308 VREG3 PGOOD 2.2_0402_5% 0.1U_0402_10V7K
1 2 BST1_3V 1 2 BST_3V 9 22 BST_5V 1 2 BST1_5V 1 2
3
2
1
0_0402_5% BOOT2 BOOT1
PL303 UG_3V 10 21 UG_5V PL305
4.7UH_FMJ-0630T-4R7 HF_5.5A_20% UGATE2 UGATE1 4.7UH_FMJ-0630T-4R7 HF_5.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
1
8
7
6
5
5
6
7
8
1
@4.7_1206_5%
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
PR312
PR313
PQ304
SKIPSEL
VREG5
1
PR314
GND
1
VIN
+
NC
PC303 499K_0402_1%
EN
2
2
4 1 2 4 + PC305
B++ POK <36>
150U_B2_6.3VM_R45M
SNUB_3V
SNUB_5V
13
14
15
16
17
18
150U_B2_6.3VM_R45M 2
S IC RT8205EGQW WQFN 24P PWM PQ306 2
<36> EN0
@680P_0603_50V7K
AO4468L_SO8
1
2
3
3
2
1
680P_0603_50V7K
VL IRF8707GTRPBF_SO8
1
1
PC316
PC317
PR315
95.3K_0402_1% PC320
2
@1U_0603_10V6K
2
1
PC318
4.7U_0805_10V6K
2
1
B++
PC319
2
3 0.1U_0603_25V7K 3
ENTRIP2
2VREF_6182
6 ENTRIP1
PQ307A PQ307B
2 N_3_5V_001 5
SSM6N7002FU-2N_SOT363-6 SSM6N7002FU-2N_SOT363-6 +3VLP +3VL
PJP302
1
PJP305 2 1
+5VALWP 1 2 +5VALW (4.5A,180mils ,Via NO.= 9)
PAD-OPEN 2x2m
PAD-OPEN 4x4m
1 2 VL
@ PR318 PJP303
10K_0402_1% PR317
+3VALWP
1 2 +3VALW (3A,120mils ,Via NO.= 6) VL +5VL
1 2 100K_0402_5%
<28,33,34> EC_ON
1
PJP301
PAD-OPEN 4x4m
2 1
PQ308
<36> VS_ON DTC115EUA_SC70-3 PAD-OPEN 2x2m
1 2 2
VS
40.2K_0402_1%
@0.01U_0402_16V7K
PR319
1
100K_0402_1%
1
PR320
PC321
3
2
2
4 4
EC:+3VL, reserve PR319, install PR318, PR320 100K

EC:+3VALW, reserve PR318, install PR319, PR320 40.2K Security Classification Compal Secret Data Compal Electronics, Inc.
3.3VALWP/5VALWP
Custom PBL20 LA6772P M/B 1.0
A B C D E
A B C D
1 1
PL402
PU401 PL401 <Vo=1.8V> VFB=0.6V
4
+5VALW HCB1608KF-121T30_0603 1UH_FMJ-0630T-1R0 HF_11A_20%
1 2 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
Vo=VFB*(1+PR401/PR402)=0.6*(1+20K/10K)=1.8V
PG
PVIN LX +1.8VSP
22P_0402_50V8J
9 PVIN LX 3
1
4.7_1206_5%
1
1
PC404
PC403 8 SVIN
PR403
22U_0805_6.3VAM PR401
6 1.8VSP_FB 20K_0402_1%
2
2
FB
22U_0805_6.3VAM
22U_0805_6.3VAM
5
2
EN
1
NC
NC
TP
PC401
PC402
<9,28,29,33,35,41,43> SUSP#
11
2
SNUB_1.8VSP
2
1 2 EN_1.8VSP 2
1
1
PR404 0_0402_5%
@0.1U_0402_10V7K
PC405
SY8033BDBC_DFN10_3X3 PR402
1
PR405 10K_0402_1%
@47K_0402_5%
2
2
680P_0603_50V7K
PC406
2
PJP401
+1.8VSP 1 2 +1.8VS (2A, 80mils, Via NO.= 4)

PAD-OPEN 3x3m
3 3
4 4

+1.8VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B 1.0
A B C D
5 4 3 2 1
D D
1.5V_B+
PR503 PL502 B+
2 1 EN_1.5V HCB1608KF-121T30_0603
<29,33,35> SYSON 2 1
0_0402_5% PC505
1
@0.1U_0402_10V7K
10U_0805_25V6K
2200P_0402_50V7K
4.7U_0805_25V6-K
0.1U_0402_25V6
2
PC507
PC503
PC504
PC506
PR504
2
2.2_0402_5%
BST_1.5V 1 2BST1_1.5V 1 2
4
PC508
0.1U_0402_10V7K
15
14
1
PU501 PQ501
PR506 AON7408L_DFN8-5
EN/DEM
NC
BOOT
3
2
1
255K_0402_1% +1.5VP
1 2TON_1.5V 2 TON UGATE 13 UG_1.5V PL501
C 2.2UH_MMD-06CZ-2R2M-V1_8A_20% C
+1.5VP 1 2 VOUT_1.5V 3 12 LX_1.5V 1 2

PR505 0_0402_5% VOUT PHASE
+5VALW 1 V5FILT_1.5V TRIP_1.5V 1 PR508 15K_0402_1%
+5VALW 2 4 VDD CS 11 2
PR507 PR501
5
6
7
8
1
1 2 FB_1.5V 5 10 +5VALW +5VALW 1
100_0402_1% FB VDDP PR509
220U_6.3V_M
VOUT_1.5V
1
1
2.21K_0402_1% LG_1.5V 4.7_1206_5% +
PC501
6 PGOOD LGATE 9
PGND
PC509 PC510
GND
1
4.7U_0603_10V6K 4.7U_0805_10V6K PQ502

2
2
PR502 2
4
2.15K_0402_1% RT8209BGQW _W QFN14_3P5X3P5
1SNUB_1.5V
7
8
IRF8707GTRPBF_SO8
2
3
2
1
PC511
680P_0603_50V7K
2
B B
PJP502
1 2
PAD-OPEN 4x4m
PJP501
+1.5VP 1 2 +1.5V (6A,240mils ,Via NO.= 12)

PAD-OPEN 4x4m
A A

+1.5VP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS PBL20 LA6772P M/B 1.0
5 4 3 2 1
5 4 3 2 1
D D
VCCP_B+
PR703 PL702 B+
2 1 EN_VCCP HCB1608KF-121T30_0603
<9,28,29,33,35,39,43> SUSP# 2 1
0_0402_5% PC705
1
@0.1U_0402_10V7K
10U_0805_25V6K
2200P_0402_50V7K
4.7U_0805_25V6-K
0.1U_0402_25V6
2
5
6
7
8
1
PQ701
PC707
S TR AO4406AL 1N SO8
PC702
PC704
PC706
PR704
2
2.2_0402_5%
BST_VCCP1 2BST1_VCCP 1 2
4
PC708
0.1U_0402_10V7K
15
14
1
PU701
PR705
EN/DEM
NC
BOOT
3
2
1
255K_0402_1% +VCCPP
1 2TON_VCCP 2 TON UGATE 13 UG_VCCP PL701
0.68UH_FMJ-0630T-R68 HF_15.5A_20%
+VCCPP 1 2 VOUT_VCCP 3 12 LX_VCCP 1 2
+5VALW +5VALW 1 2 V5FILT_VCCP 4 11 TRIP_VCCP1 PR708 2 13.7K_0402_1%

C VDD CS C
PR707 PR701
5
6
7
8
1
1 2 FB_VCCP 5 10 +5VALW +5VALW 1
100_0402_1% FB VDDP PQ702 PR709
220U_D2_2VY_R15M
1
1
4.12K_0402_1% LG_VCCP S TR AO4726L 1N SO8 4.7_1206_5% +
PC701
6 PGOOD LGATE 9
PGND
PC709 PC710
GND
1
4.7U_0603_10V6K 4.7U_0805_10V6K
2
1SNUB_VCCP 2
PR702 2
4
FB_VCCP1
10.2K_0402_1% RT8209BGQW _W QFN14_3P5X3P5
8
2
3
2
1
PC711
680P_0603_50V7K
2
PR710
+3VS 1 2
VTTPW RGOOD <43>
2
10K_0402_1%
PR711
0_0402_5% PR712
10_0402_5%
1
PJP701
1 2
PAD-OPEN 4x4m
B VOUT_VCCP B
PJP702
+VCCPP 1 2 +1.05VS_VCCP
VCCIO_SENSE <8>
PAD-OPEN 4x4m (8.5A,340mils ,Via NO.= 17)
PJP703
VSSIO_SENSE connect to GND directly. 1 2
PAD-OPEN 4x4m
A A

PWR+1.05VSP/+VCCPP
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
D D
+1.5V
PU601
1 VIN VCNTL 6 +3VALW
2 GND NC 5
1
PC601 3 7
VREF NC
1
4.7U_0805_6.3V6K
2
PR601 PC603
4 VOUT NC 8
1K_0402_1% 1U_0603_10V6K
2
9
2
TP
G2992F1U_SO8
VREF_G2992
+0.75VSP
0.1U_0402_16V7K
1
PQ602
SSM3K7002FU_SC70-3
1
PR604 D
PR602
1
2 10.75VS_N_002 2 1K_0402_1%
<5,35> SUSP G PC605
2
10U_0805_6.3V6M
PC604
S
2
0_0402_5%
1
PC606
2
@0.1U_0402_10V7K
C C
PJP601
+0.75VSP 1 2 +0.75VS (2A,80mils ,Via NO.= 4)

PAD-OPEN 3x3m
B B
A A

0.75VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS PBL20 LA6772P M/B 1.0
5 4 3 2 1
5 4 3 2 1
PR817
D 2 1 D
<41> VTTPWRGOOD
@0_0402_5%
VCCSA_B+
PR803 PL802 B+
2 1 EN_VCCSA HCB1608KF-121T30_0603
<9,28,29,33,35,39,41> SUSP# 2 1
0_0402_5% PC804
1
@0.1U_0402_10V7K
10U_0805_25V6K
2200P_0402_50V7K
0.1U_0402_25V6
2
PC806
PC802
PC805
PR804 PQ801
2
2.2_0402_5%
BST_VCCSA
1 2BST1_VCCSA1 2 AON7408L_DFN8-5
4
PC807
0.1U_0402_10V7K
15
14
1
PU801
PR805
EN/DEM
NC
BOOT
3
2
1
255K_0402_1% +VCCSAP
1 2TON_VCCSA 2 TON UGATE 13 UG_VCCSA PL801
2.2UH_MMD-06CZ-2R2M-V1_8A_20%
+VCCSAP 1 2 VOUT_VCCSA 3 12 LX_VCCSA 1 2
+5VALW 1 V5FILT_VCCSA TRIP_VCCSA PR808 15K_0402_1%
+5VALW 2 4 VDD CS 11 1 2
C C
220U_D2_2VY_R15M
PR807 PR801
5
6
7
8
1
1 2 FB_VCCSA5 10 +5VALW +5VALW 1
100_0402_1% FB VDDP PR809
1
1
2K_0402_1% LG_VCCSA PQ802 4.7_1206_5% +
PC801
6 PGOOD LGATE 9
PGND
PC808 PC809 IRF8707GTRPBF_SO8
GND
1
4.7U_0603_10V6K 4.7U_0805_10V6K
FB_VCCSA_1
2
1SNUB_VCCSA 2
PR802 2
4
30K_0402_1% RT8209BGQW _W QFN14_3P5X3P5
8
2
3
2
1
PC810
680P_0603_50V7K
2
PR810
+3VS 1 2
SA_PGOOD <33>
2
10K_0402_1%
PR811
0_0402_5% PR812
10_0402_5%
1
B VOUT_VCCSA B
PJP801
+VCCSAP 1 2 +VCCSA(6A,240mils ,Via NO.= 12)

VCCSA_SENSE <9>
PAD-OPEN 4x4m
+5VS
2
PR813
10K_0402_5%
PR814 VID[0] VID[1] VCCSA Vout

1
PQ804 2 1
PMBT2222A_SOT23-3 10K_0402_5% 0 0 0.9V
PC811
<9> VCCSA_SEL
0.01U_0402_16V7K~D
2
G
PR816
100K_0402_5%
1
15K_0402_1% 0 1 0.8V
PR815
1
PR819 3 1 1 2 FB_VCCSA
S
2 1 2
2 PQ803
0_0402_5% SSM3K7002FU_SC70-3
3
2
1
PR818
10K_0402_5%
A A
2

PWR+VCCSAP
Custom 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 CPU_B+ 2 1
CPU_B+
PC276 PR271 PC221
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
5
2 1 2 1 2 1 NTCG
1
330P_0402_50V7K 2K_0402_1% @470P_0402_50V7K
PC214
PC215
PC272
PR203
PC271
2 1 GFX_N_003 2 PH204
1
1000P_0402_50V7K
2
3.83K_0402_1% UGATEG 4
8.06K_0402_1%
1
1
PR204
PR201
2 470KB_0402_5%_ERTJ0EV474J PQ210
PC223
1
PL204
3
2
1
S TR AON6428L 1N DFN-8 0.36UH_PCMC104T-R36MN1R15_30A_20%
2
27.4K_0402_1% +VGFX_CORE PHASEG 1 4 +VGFX_CORE
PR209 PC222
5
2 1 BOOTG 2 PR205 1BOOTG_1 2 1 LFG2 3 VGN
1
PC226 PC225 10_0402_1%
4.7_1206_5%
S TR TPCA8057
330P_0402_50V7K
1
1
1 2 2.2_0603_5% 0.22U_0603_10V7K PR207
D D
PR211 39P_0402_50V7K PR213 PC227 10K_0603_1% PR208
PR206
@499K_0402_1%
1
VCC_AXG_SENSE <9> 1_0402_5%
2 1 2 1GFX_N_001 2 1 330P_0402_50V7K
422_0402_1% PC229 VSS_AXG_SENSE <9> LGATEG PH202 PC224 .1U_0402_16V7K
PQ211
PC228
4
1GFX_SNUB 2
680P_0402_50V7K 2 1 PR210
2
2
PC231 PR215 PR216 1 2 VGN2 1 2 1 2
1GFX_N_0022 1 2 2 1 0.01U_0402_16V7K PR217 7.5K_0402_1%
VGN1
475K_0402_1% 2.55K_0402_1% 2 1 10KB_0603_5%_ERTJ1VR103J
3
2
1
150P_0402_50V8J 10_0402_1% 1 PR212 2
IMONG 11K_0402_1%
680P_0603_50V7K
1
+5VALW 1 2 1 PR214 2
16.2K_0402_1%
PC232
VGN3
0.047U_0603_16V7K
1
PC230 @100_0402_1%
PR237
1
+5VALW .1U_0402_16V7K
PC235
@16.5K_0402_1%
ISPG
PC234
@10K_0402_5%
2
1
1 2
VSS_AXG_SENSE PR220 @470P_0402_50V7K
PR222
@1U_0603_10V6K
1
PC273 590_0402_1%
PR218
@0_0603_5%
2
1
PR221 @0.01U_0402_16V7K
PC233
PR219 2 1
ISNG
2BOOT3_1
@2.2_0603_5%
@0.22U_0603_10V7K
+1.05VS_VCCP
PROG2_GFX
BOOT3
PC236 PL205
2
CPU_B+ HCB2012KF-121T50_0805
UGATEG
PHASEG
LGATEG
COMPG
BOOTG
FCCM_CPU
CPU_B+ 2 1
NTCG
CPU_B+ B+
@10U_0805_25V6K
@10U_0805_25V6K
@0.1U_0402_25V6
@2200P_0402_50V7K
ISNG
2
5
ISPG
FBG
PU202 PC237 PL206
PR223
130_0402_1%
54.9_0402_1% 1 1
@.1U_0402_16V7K
PQ207 HCB2012KF-121T50_0805
PR224
5 1
100U_25V_M
100U_25V_M
1
1
VCC BOOT + +
PC209
PC210
PC239
PC219
2 1
1
UGATE3
PC238
PC218
6 8
+3VS FCCM UGATE
2
2
2 2
49
48
47
46
45
44
43
42
41
40
39
38
37
2 7 4
PWM PHASE
1PWM3_CPU1
3 4
PROG2
GND
COMPG
FBG
VSENG
RTNG
ISPG
ISNG
NTCG
BOOTG
UGG
PHG
LGG
<8> VR_SVID_DAT GND LGATE
1
VWG 1 36 BOOT2 @ISL6208CRZ-T_QFN8 @RJK03B9DPA-00-J53_WPAK8-5 PL203

10K_0402_1%
3
2
1
<8> VR_SVID_ALRT# VWG BOOT2 @0.36UH_PCMC104T-R36MN1R15_30A_20%
UGATE2 PHASE3
PR226
2 35 1 4 +CPU_CORE
<8> VR_SVID_CLK <33> GFX_CORE_PWEGD IMONG UG2
@4.7_1206_5%
2
1
C Alert# PU resister need close CPU, 3 34 PHASE2 PR227 PR229 LF3 2 3 PR230 C
@0_0603_5%
PGOODG PH2 ISEN3
so the PU resister in HW schematic. PQ208 2 1 2 1ISEN1
VR_SVID_DAT @10K_0402_1% @10K_0402_1%
PR228
but DAT and CLK need close PWM-IC, 4 33
SDA VSSP2
V3N
PR231
2
so the PU resister in POWER schematic. VR_SVID_ALRT# 5 32 LGATE2 0_0402_5% +5VALW
2
1CPU_SNUB3
ALERT# LG2 LGATE3 PR232 PR233
1 2 4
VR_SVID_CLK 6 31 VDDP_CPU VSUM+ 2 1 2 1ISEN2
SCLK VDDP
1 PR234 2 @10K_0402_1%
@680P_0603_50V7K
0.047U_0603_16V7K
VSSSENSE 1 PR235 2 VRON_CPU 7 30 PWM3_CPU @S TR AON6788 1N DFN @3.65K_0805_1%

1
<33> VR_ON VR_ON PU201 PWM3 0_0402_5%

26.7K_0402_1%
1U_0603_10V6K
3
2
1
1
0_0402_5% 8 29 LGATE1 PR238

PGOOD ISL95831CRZ-T_TQFN48_6X6 LG1 VSUM-
PR270
PC241
PC242
PC243
PC240
2 1
PR236 9 28 @1_0402_5%
2
2
1
1
IMON VSSP1
1 2
1U_0603_10V6K
+3VS
2
10 27 PHASE1
1.91K_0402_1% VR_HOT# PH1
2
11 26 UGATE1 CPU_B+
ISEN3/ FB2
<33> IMVP_IMON VGATE <14,20,33> NTC UG1
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
5
BOOT1
PROG1
12 25
ISUMN
ISUMP
COMP
VW BOOT1
ISEN2
ISEN1
VSEN
PQ204
VDD
RTN
1
VIN
<33,36> VR_HOT# PC246
PC205
PC206
PC247
FB
1
PR239 PC245 NTC_CPU
PC244
2 1
+1.05VS_VCCP 1 2
13
14
15
16
17
18
19
20
21
22
23
24
2
499_0402_1% PR240 @470P_0402_50V7KPH203 UGATE2 4
2
47P_0402_50V8J
1 2CPU_N_001 1 2
3.83K_0402_1%
470KB_0402_5%_ERTJ0EV474J PROG1_CPU TPC8065_SO8 PL202
3
2
1
2 PR242 1 0.36UH_PCMC104T-R36MN1R15_30A_20%
1
27.4K_0402_1% PHASE2 1 4
PR243 +CPU_CORE
VDD_CPU
VW_CPU PR244
1
1 2 0_0402_5% LF2 2 3
4.7_1206_5%
8.06K_0402_1%
CPU_B+
1000P_0402_50V7K
1
5
VIN_CPU
PR247 PC249
PR246
BOOT2 2 1BOOT2_1 2
V2N
PQ205
PR245
PC248
2
0_0603_5%
ISUMN_CPU
2.2_0603_5%
2
PR248 0.22U_0603_10V7K
1CPU_SNUB2 2
PC250 10P_0402_50V8J 2 1 +5VALW PR249 PR250
2
COMP_CPU LGATE2 ISEN2 ISEN1

PC253
B
2 1 4 2 1 2 1 B
1_0603_5% 10K_0402_1% 10K_0402_1%
ISEN2
ISEN1
ISEN3
1U_0603_10V6K
1
FB_CPU
PC252 S TR TPCA8059-H 1N PPAK56-8
PC251
680P_0603_50V7K
2 1 0.22U_0603_10V7K PR251 PR252
2
3
2
1
@0.22U_0603_10V7K VSUM+ 2 1 2 1 ISEN3
PC257 3.65K_0805_1% @10K_0402_1%
PC254
PR253
PC255 PR254 PC256 VSUM- 2 1 VSUM+ PR255
2
1 2 2 1 2 1FB1_CPU 2 1 0.22U_0603_10V7K VSUM- 2 1
2.61K_0402_1%
1
499_0402_1% PC258 1_0402_5%

@499K_0402_1% 33P_0402_50V8J 470P_0402_50V7K
PR256
2 1
PC259 PR257 PR258 0.22U_0603_10V7K
2 1CPU_N_002 2 1 2 1 CPU_B+
0.1U_0402_16V7K
10KB_0603_5%_ERTJ1VR103J
3.32K_0402_1%
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
0.22U_0603_16V7K
1CPU_N_004 2
5
150P_0402_50V8J 316K_0402_1%
0.068U_0402_16V7K
PQ201
1
1
PC275 PR260
PC201
PC202
PC262
11K_0402_1%
PC260
PC264
PR259
PC261
2 1 2 1
1
PC263
330P_0402_50V7K
2
1
470P_0402_50V7K 2K_0402_1% UGATE1

PC274
2 1 4
330P_0402_50V7K
PC265
<8> VCCSENSE PH201

2
2 1
<8> VSSSENSE PC266 TPC8065_SO8 PL201
3
2
1
0.01U_0402_16V7K PR261 0.36UH_PCMC104T-R36MN1R15_30A_20%
2
2 1 VSUM- PHASE1 1 4 +CPU_CORE

1.47K_0402_1%
1
1
PC267 PR262 LF1 2 3
4.7_1206_5%
.1U_0402_16V7K
5
1 CPU_N_003 2 PR264 PC269
PC268
2 1
BOOT1 1BOOT1_1 2 PQ202
V1N
PR263
2 1
2
@330P_0402_50V7K @100_0402_1% 2.2_0603_5%

0.22U_0603_10V7K
1CPU_SNUB1 2
PR265 PR266
LGATE1 4 ISEN1 2 1 2 1 ISEN2
10K_0402_1% 10K_0402_1%
680P_0603_50V7K
S TR TPCA8059-H 1N PPAK56-8
PR267 PR268
3
2
1
A VSUM+ 2 1 2 1 ISEN3 A
3.65K_0805_1% @10K_0402_1%
PC270
PR269
2
VSUM- 2 1
1_0402_5%

PWR-CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
PBL20 LA6772P M/B
5 4 3 2 1
5 4 3 2 1
PIR (Product Improve Record)

PBL20 LA-6772P SCHEMATIC CHANGE LIST
REVISION CHANGE:
Revision Change: 0.1 to 0.2

NO DATE PAGE MODIFICATION LIST PURPOSE
-----------------------------------------------------------------------------------------
D
1 08/03 17 DELETE U47, C869, R1530 and R572 For HDMI detect issue D
2 08/03 17 Change R573 to 20K For HDMI detect issue

3 08/03 31 Change RA16 to 39.2K For Headphone detect issue
4 08/03 15 DELETE L25, C320 and C401 For cost down
5 08/04 31 Add RA19 For Headphone detect issue
6 08/20 5 Delete R61, R63, R206, R257, R208, R261, R259 and For remove XDP connector
C16
7 08/20 7 Add C233 and C232 For DDR3 1333 EMI issue
8 08/20 15 Delete L25, C401 and C320 For cost down
9 08/20 17 Delete U10, R405, R407, R410, R705, R409, R408, Remove level shift for cost down
R406, R411, R403, R404, R402, R221, R253, R254
, R412, R413, R414 and R222
10 08/20 19 Add C499 and C500 For add new card function
11 08/20 19 Delete R258 and R260 For remove XDP connector
12 08/20 23 Add R425 ODD_EN# pull-up 10K to +3VS
13 08/20 28 Add R303, R46 and R61 For SPI and ME ROM
14 08/20 29 Add JSMART connector For add smart card connector
C
15 08/20 29 Add JNEW For add new card connector C
16 08/20 29 Add R127 ,R28 and R129 For support intel W/L
17 08/20 29 Add R132, R133, R136, R137, R130 and R131 For SW GPIO common
18 08/20 33 Delete X1, C751 and C752 For cost down
19 08/20 34 Add D20 For ESD issue

-----------------------------------------------------------------------------------------
1 09/01 34 Add R515 PWR_USB_EN# pull-up 10K to +3VALW
2 09/01 5 Add C16 FOR ESD issue
3 09/02 35 Add C880, C889, C890, C881, C882, C883, C879, C884 FOR ESD issue
,C885, C886, C887 and C888
4 10/06 34 Add D25 For USB issue
5 10/11 18 Add R172 For Power Saving
6 10/14 27 Add R835 and R836 For smart card with ODD
7 10/14 29 Add R837 and R838 For smart card with ODD
B B
8 10/18 30 Add D6 and D7 For ESD issue
9 10/20 33 Add R743 For common design
10 10/20 22 Add R318 For add TPM 1.2
11 10/20 28 Add C764, C765, U37, R733, R726, R659, R662, R661, For add TPM 1.2
R665, R772, R669, C768, R668, C766, C767 and Y4

-----------------------------------------------------------------------------------------
1 12/01 29 Change JNEW conn. For ME
1 12/03 33 Add R117, R749 and R750 For EC
1 12/01 29 Add D22 For USB power switch issue
A A

HW-PIR
1.0
PBL20 LA6772P M/B
5 4 3 2 1
www.s-manuals.com

Compal PBL20 LA-6772P Rev 1.0 Schematic

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Compal PBL20 LA-6772P Rev 1.0 Schematic

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5 4 3 2 1

LA-6772P REV 1.0 Schematic

Intel Sandy Bridge/Cougar Point(UMA)

Security Classification Compal Secret Data Compal Electronics, Inc.

Compal Confidential CK505

CPU Dual Core

1.5V DDRIII 1066/1333 BANK 0, 1, 2, 3 page 12,13

LCD Conn. USB/B Right USB/B Left Smart Card

New Card PCIeMini Card USB

Power/B HDA Codec

DC/DC Interface CKT. Int.KBD SPI ROM

Security Classification Compal Secret Data Compal Electronics, Inc.

+CPU_CORE Core voltage for CPU ON OFF OFF

+3VS +3VALW to +3VS power rail ON OFF OFF

Full ON HIGH HIGH HIGH HIGH ON ON ON ON

S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

B S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF B

S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF

Security Classification Compal Secret Data Compal Electronics, Inc.

R41 1 @ 2 0_0402_5% CLK_BUF_CPU_BCLK <14>

A28 CLK_CPU_DMI_R R43 1 2 0_0402_5%

T68 PAD SKTOCC# AN34

T5 PAD H_CATERR# AL33

XDP_TMS R55 2 1 51_0402_5%

JTAG & BPM

SN74LVC1G07DCKR_SC70-5 10U_0805_10V4Z +FAN1 1

EN GND 1000P_0402_50V7K GND

PCI EXPRESS* - GRAPHICS

<20> FDI_LSYNC0 J19 G27

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY A

Sandy Bridge_rPGA_Rev1p0 Sandy Bridge_rPGA_Rev1p0

<33> DRAMRST_CNTRL_EC R89 1 @ 2 0_0402_5% C233

PEG AND DDR

DDR3 -1.5V RAILS

@ @ @ @ AM18 AC4 + C169

Bottom Socket Edge

CFG Straps for Processor

PEG Static Lane Reversal - CFG2 is for the 16x

1: (Default) PEG Train immediately following xxRESETB

Security Classification Compal Secret Data Compal Electronics, Inc.

Sandy Bridge_rPGA_Rev1p0 Sandy Bridge_rPGA_Rev1p0

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.5V +1.5V +1.5V

DDR_A_D10 VSS11 VSS12 DDR_A_D14

<7> DDR_CKE0_DIMMA DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA DDR_CKE1_DIMMA <7>

1 2 +3VS 193 194 1 1 1 1 1

+3VS VDDSPD SDA D_CK_SDATA <13,14,29> 2 2 2 2 2

+V_DDR_REF +1.5V +1.5V

1 1 185 186 DDR_B_DQS#7

Security Classification Compal Secret Data Compal Electronics, Inc.

SM010014520 3000ma 220ohm@100mhz DCR 0.04

+CLK_1.5VS 1 23 CLK_BCLK R2 @ 2 1 33_0402_5% CLK_BUF_CPU_BCLK CLK_BUF_CPU_BCLK <5>

IDT Have Internal Pull-Down

R16 1 2 10K_0402_5% REF_0/CPU_SEL

PIN 30 CPU_0 CPU_1

0 (Default) 133MHz 133MHz

R1426 0_0603_5% @ JLVDS

Security Classification Compal Secret Data Compal Electronics, Inc.

D_CRT_VSYNC1 VSYNC HSYNC BGND

CRT@ PAD T75 CRT_TEST2 Vsync