FA7703/04

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FUJI Power Supply Control IC

FA7703/04

Application Note

June -2002
Fuji Electric Co., Ltd.
Matsumoto Factory

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WARNING
1.This Data Book contains the product specifications, characteristics, data, materials, and structures as of
June 2002. The contents are subject to change without notice for specification changes or other
reasons. When using a product listed in this Data Book, be sure to obtain the latest specifications.

2. All applications described in this Data Book exemplify the use of Fuji's products for your reference only.
No right or license, either express or implied, under any patent, copyright, trade secret or other
intellectual property right owned by Fuji Electric Co., Ltd. is (or shall be deemed) granted. Fuji makes
no representation or warranty, whether express or implied, relating to the infringement or alleged
infringement of other's intellectual property rights, which may arise from the use of the applications,
described herein.

3. Although Fuji Electric is enhancing product quality and reliability, a small percentage of semiconductor
products may become faulty. When using Fuji Electric semiconductor products in your equipment, you
are requested to take adequate safety measures to prevent the equipment from causing a physical
injury, fire, or other problem if any of the products become faulty. It is recommended to make your
design fail-safe, flame retardant, and free of malfunction.

4.The products introduced in this Data Book are intended for use in the following electronic and electrical
equipment, which has normal reliability requirements.
• Computers • OA equipment • Communications equipment (terminal devices)
• Measurement equipment • Machine tools • Audiovisual equipment • Electrical home appliances
• Personal equipment • Industrial robots etc.

5.If you need to use a product in this Data Book for equipment requiring higher reliability than normal,
such as for the equipment listed below, it is imperative to contact Fuji Electric to obtain prior approval.
When using these products for such equipment, take adequate measures such as a backup system to
prevent the equipment from malfunctioning even if a Fuji's product incorporated in the equipment
becomes faulty.
• Transportation equipment (mounted on cars and ships) • Trunk communications
equipment
• Traffic-signal control equipment • Gas leakage detectors with an auto-shut-off feature
• Emergency equipment for responding to disasters and anti-burglary devices • Safety devices

6. Do not use products in this Data Book for the equipment requiring strict reliability such as (without
limitation)
• Space equipment • Aeronautic equipment • Atomic control equipment
• Submarine repeater equipment • Medical equipment

7. Copyright © 1995 by Fuji Electric Co., Ltd. All rights reserved. No part of this Data Book may be
reproduced in any form or by any means without the express permission of Fuji Electric.

8. If you have any question about any portion in this Data Book, ask Fuji Electric or its sales agents
before using the product. Neither Fuji nor its agents shall be liable for any injury caused by any use of
the products not in accordance with instructions set forth herein.

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CONTENTS

Page
1. Description ......................................................... 4
2. Features ............................................................. 4
3. Outline ................................................................ 4
4. Block diagram ..................................................... 5
5. Selection Guide.................................................... 5
6. Pin assignment ................................................... 5
7. Ratings and characteristics ................................ 6
8. Characteristics curves.......................................... 9
9. Description of each circuit .................................. 13
10. Design advice ..................................................... 16
11. Application circuit ............................................... 21

Note
• Parts tolerance and characteristics are not defined in all application described in this Data book. When
design an actual circuit for a product, you must determine parts tolerances and characteristics for safe and
stable operation.

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Description
FA7703/04 are the PWM type DC-DC converter control ICs with 2ch output that can directly drive power
MOSFETs. FA7703/04 feature CMOS devices with high breakdown voltage and also low power
consumption are achieved. By means of their small and thin package (1.1mm max.), and high frequency
operation (to 1MHz), FA7703/04 are completely suitable for the use of very small DC-DC converters.
Besides, you can select a Pch or Nch type of MOSFET directly driven by FA7703/04, and also you can
practically design any kind of DC-DC converter circuit like a boost converter, a buck converter, a inverting
converter, a fly-back converter, and so on.
1. Features
Wide range of supply voltage: VCC=2.5 to 20V
Direct driving of MOSFET
Switching Pch/Nch driving is available (channel 1 only)
Low current consumption is achieved by CMOS process:
1.8mA (typ.) in operation
2ch PWM control IC
High frequency operation is available: 50kHz to 1MHz
Simple setting of operation frequency with a timing resistor
Soft start setting is available
Setting of the limitation of maximum output duty cycle is available in each channel
Built-in protection function for undervoltage lockout
Highly accurate reference voltage:
VREF: 1.00V±1%, VB: 1.00V±2%, VREG: 2.20V±2%
Built-in output timer latched short-circuit protection circuit
Thin and small package: TSSOP-16, SOP-16

2. Outline
TSSOP-16 (V) SOP-16 (M)

5.0 ±0.1

0 . 71 ± 0 . 1
5. 3 ± 0. 3

7. 8 ± 0. 2
4 . 40 ± 0. 05

6 .4 ± 0.1

10.2 ± 0.3
1.9 ± 0.2
1.10MAX

1.27 0.4 ±0.05

0.65

units:mm

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3.Block diagram

REG DT1 REF IN1- FB1 SEL1 O UT1 VCC

16 15 14 13 12 11 10 9

Er.Am p1

Reference +
voltage -
+ O N /O FF
2.2V 1V I CS + PW M .C om p1

S.C .P
1.3V
U VLO BIAS 1.5V
+
- 2.0V
-
BIAS S.C .D ET
Power G ood Signal
+ O N /O FF
-
+
Er.Am p2 + PW M .C om p2
FA 7704

O SC

1 2 3 4 5 6 7 8
RT CS DT2 IN2+ IN2- FB2 G ND O UT2

4. Selection Gide
Ch.1(OUT1) Buck, Boost, Fly-back
FA7703
Ch.2(OUT2) Buck, Inverting (Pch driven)
Ch.1(OUT1) Buck, Boost, Fly-back
FA7704
Ch.2(OUT2) Boost, Fly-back (Nch driven)
5. Pin assignment
Pin No Pin
Description
symbol
1 RT Oscillator timing resistor
2 CS Soft start, Timer latched short circuit protection, ON/OFF control
3 DT2 Ch.2 Dead Time Adjustment
4 IN2+ Ch.2 non-inverting input to error amplifier
5 IN2- Ch.2 inverting input to error amplifier
6 FB2 Ch.2 output o error amplifier
7 GND Ground
8 OUT2 Ch.2 output
9 VCC Power supply
10 OUT1 Ch.1 output
11 SEL Selection of type of driven MOSFET (OUT1)
12 FB1 Ch.1 output o error amplifier
13 IN1- Ch.1 inverting input to error amplifier
14 REF Reference voltage
15 DT1 Ch.1 Dead Time Adjustment
16 REG Regulated voltage output

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6.Ratings and characteristics
The contents are subject to change without notice. When using a product, be sure to obtain the latest
specifications.
(1)Absolute maximum ratings
Item Symbol Ratings Units
Power supply voltage VCC 20 V
REF Terminal output current IREF 1 mA
REG Terminal output current IREG 2 mA
OUT1, OUT2 Terminal source current ISOpeak -400(peak) mA
ISOcont -50(continuos) mA
OUT1, OUT2 Terminal sink current ISIpeak +150(peak) mA
ISIcont +50(continuos) mA
RT,CS,REG,REF,IN1-,IN2+,IN2-,FB1, +2.5(max.)
VLOGIC V
FB2,DT1,DT2,SEL1 Terminal voltage -0.3(min.)
Power dissipation TSSOP 300
Pd mW
(Ta≤25°C)* SOP 400
Operating ambient temperature Ta -30 to +85 °C
Operating junction temperature Tj +125 °C
Storage temperature Tstg -40 to +150 °C
*:Maximum dissipation curve at Ta≥25°C is shown under figure.
Maximum power dissipation curve
500
Maximum power dissipation Pd[mW]

SOP
400

300
TSSO

200

100

0
-30 0 30 60 90 120 150
Ambient temperature Ta[°C]

(2)Recommended operating conditions

Item Symbol MIN. TYP. MAX. Units
Supply voltage Vcc 2.5 6 18 V
DC feedback resistor of
RNF 100 kΩ
error amplifier
VCC terminal capacitance* CVCC 0.1 µF
REG terminal capacitance CREG 0.047 0.1 1 µF
CS terminal capacitance CCS 0.01 10 µF
Oscillation frequency fOSC 50 1000 kHz
SEL1 terminal Pch,PNP driving VSEL1L Connect to GND
voltage Nch,NPN driving VSEL1H Connect to REG terminal
*Please select the proper value by input-output conditions of power supply.

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(3)Electrical characteristics [Unless otherwise standard,Ta=25°C,Vcc=6V,RT=22kΩ]

(1) Internal Bias Section (REF terminal voltage)
Item Symbol Conditions MIN. TYP. MAX. Units
Output Voltage REF terminal load current 0.990 1.000 1.010 V
VREF
IREF=0mA
Line Regulation VLINEF Vcc=2.5 to 18V,IREF=0mA ±1 ±5 mV
Load Regulation VLDF IREF=0 to 1mA -10 -3 mV
Variation Ta=-30 to +85°C -0.8 to
VTCF %
with temperature Change rate for value at 25°C +0.2

(2) Regulated Voltage for Internal Control Blocks Section (REG terminal voltage)
Item Symbol Conditions MIN. TYP. MAX. Units
Output Voltage REG terminal load current 2.156 2.200 2.244 V
VREG
IREG=0mA
Line Regulation VLINEG Vcc=2.5 to 18V,IREG=0mA ±4 ±14 mV
Load Regulation VLDG IREG=0 to 2mA -12 -2 mV
Variation Ta=-30 to +85°C -0.8 to
with temperature VTCG %
Change rate for value at 25°C +0.2

(3) Oscillator Section

Item Symbol Conditions MIN. TYP. MAX. Units
Oscillation frequency fOSC RT=22kΩ 160 190 220 kHz
Line Regulation f LINE Vcc=2.5 to 18V ±0.1 %
Variation fTC1 Ta=+25 to -30°C, f=50k to 1MHz ±2 %
With temperature fTC2 Ta=+25 to +85°C, f=50k to1MHz ±3 %

(4) Error Amplifier Section (Input:IN1-,IN2+,IN2-,Output:FB1,FB2 terminal)

Item Symbol Conditions MIN. TYP. MAX. Units
Reference Voltage VB IN1- terminal threshold voltage 0.980 1.000 1.020 V
(ch1)
Input offset (ch2) VOFST (IN2+) - (IN2-) - - ±10 mV
Common mode input 0.3 1.4 V
VIN
voltage
Input Current IIN -100 0 +100 nA
Open Loop Gain AVO 70 dB
Unity Gain Bandwidth fT 1.5 MHz
Output Source Current
IOHE
FB1,2 -220 -160 -100 µA
terminal voltage=VREF-0.5V
Output sink Current IOLE FB1,2 terminal voltage=0.5V 3 6 12 mA

(5) Pulse Width Modulation Section (FB1,FB2 terminal)

Item Symbol Conditions MIN. TYP. MAX. Units
Input threshold voltage VFB0 Duty Cycle=0% 0.550 0.650 0.750 V
Input threshold voltage VFB100 Duty Cycle=100% 1.000 1.100 1.200 V

(6) Dead Time Adjustment Circuit Section (DT1, DT2 terminal)

Item Symbol Conditions MIN. TYP. MAX. Units
Input threshold voltage VDT0 Duty Cycle=0% 0.550 0.650 0.750 V
Input threshold voltage VDT100 Duty Cycle=100% 1.000 1.100 1.200 V

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(7) Under Voltage Lock-Out Section (VCC terminal)
Item Symbol Conditions MIN. TYP. MAX. Units
ON threshold VCCON 2.00 2.25 V
OFF threshold VCCOF 1.40 1.85 V
Hysteresis Voltage VCCHY 0.05 0.15 0.35 V
Variation Ta=-30 to +25°C +0.3 mV/°C
with temperature VCCHY
Ta=+25to +85°C -0.1 mV/°C

(8) Soft Start Section (CS terminal)

Item Symbol Conditions MIN. TYP. MAX. Units
Output source current ICS CS=0V -2.8 -2.2 -1.6 µA
Threshold Voltage1 VCS0 Duty Cycle=0% 0.550 0.650 0.750 V
Threshold Voltage2 VCS50 Duty Cycle=50% 0.880 V

(9) Short circuit Protection Section (FB terminal, CS terminal)

Item Symbol Conditions MIN. TYP. MAX. Units
Short Detection FB terminal voltage 1.350 1.500 1.650 V
VFBTH
Threshold Voltage
Latched Mode CS terminal voltage 1.900 2.000 2.100 V
VCSTH
Threshold Voltage
Latched Mode CS terminal voltage 1.830 V
VCSRE
Reset Voltage
Latched Mode CS terminal voltage 30 170 300 mV
VCSHY
Hysteresis
CS terminal VCSCL1 FB terminal voltage<1.35V 1.200 1.270 1.340 V
Clamped Voltage VCSCL2 FB terminal voltage>1.65V 2.120 2.200 2.280 V

(10) Output Stage Section (OUT1,OUT2 terminal,SEL1 terminal)

Item Symbol Conditions MIN. TYP. MAX. Units
High side on resistance RONH VCC=6V,Source Current=-50mA 10 20 Ω
High side on resistance
RONH
VCC=2.5V,Source 18 36 Ω
Current=-50mA
Low side on resistance RONL VCC=6V,Sink Current=+50mA 5 10 Ω
Low side on resistance RONL VCC=2.5V,Sink Current=+50mA 5 10 Ω
Rise Time trn 330pF Load to GND terminal 20 ns
trp 330pF Load to VCC terminal 20 ns
Fall Time tfn 330pF Load to GND terminal 35 ns
tfp 330pF Load to VCC terminal 35 ns
SEL1 terminal Input Pch-MOSFET, 0 0.2 V
VSEL1L
Voltage PNP transistor driving
Nch-MOSFET, VREG- VREG V
VSEL1H 0.2
NPN transistor driving

(11) Overall Section (VCC terminal)

Item Symbol Conditions MIN. TYP. MAX. Units
Operating mode Duty Cycle=0%,OUT1/2:open 1.3 1.9 mA
Supply Current ICC0 CS=0V, FB1,FB2≈VREG
RT=22kΩ,f ≈190kHz
Duty Cycle=80%,OUT1/2:open 1.8 2.7 mA
ICC1
RT=22kΩ,f ≈190kHz
Duty Cycle=80%,OUT1/2:open 3.1 4.7 mA
ICC2
RT=3kΩ,f≈1MHz
Latched mode CS>2.1V,FB1,FB2≈VREG, 1.3 1.9 mA
Supply Current ICCLAT
RT=22kΩ,f ≈190kHz

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7. Characteristics curves

Timing resistor vs.Oscillation frequency Oscillation frequency vs.ambient temperature

Vcc=6V Vcc=6V,RT=22k Ω
1000 195
194
193
Oscillation frequency [kHz]

Oscillation frequency [kHz]

192
191
100 190
189
188
187
186
10 185
1 10 100 -40 -20 0 20 40 60 80 100
Timing resistor RT[kΩ] Ambient temperature Ta[°C]

Regulated voltage vs.Supply voltage VCC Regulated voltage vs.Ambient temperature

IREG=0A,RT=22kΩ IREG=0A,RT=22kΩ
2.22 2.24

2.23
Regulated voltage VREG[V]
Regulated voltage VREG[V]

2.21 2.22

2.21

2.20 2.20

2.19

2.19 2.18

2.17

2.18 2.16
0 5 10 15 20 -40 -20 0 20 40 60 80 100
Supply voltage Vcc[V] Ambient temperature Ta[°C]

Reference voltage vs.Supply voltage VCC Reference voltage vs.Ambient temperature

IREF=0A,RT=22kΩ IREF=0A,RT=22kΩ
1.010 1.02
Reference voltage VREF[V]

Reference voltage VREF[V]

1.005 1.01

1.000 1.00

0.995 0.99

0.990 0.98
0 5 10 15 20 -40 -20 0 20 40 60 80 100
Supply voltage Vcc[V] Ambient temperature Ta[°C]

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FB terminal voltage vs.Duty cycle FB terminal voltage vs.Duty cycle
FA7703/04:OUT1 Nch driven (SEL1=REG) FA7703/04:OUT1 Pch driven (SEL1=GND)
FA7704:OUT2 FA7703:OUT2
100 100
90 90
80 80
fosc=1MHz
70 70 fosc=1MHz
Duty cycle [%]

Duty cycle [%]

60 60
50 50
40 40
30 30
20 20
fosc=190kHz fosc=190kHz
10 10
0 0
0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
FB terminal voltage [V] FB terminal voltage [V]

DT terminal voltage vs.Duty cycle DT terminal voltage vs.Duty cycle

FA7703/04:OUT1 Nch driven (SEL1=REG) FA7703/04:OUT1 Pch driven (SEL1=GND)
FA7704:OUT2 FA7703:OUT2
100 100
90 90
80 80
fosc=1MHz
70 70
fosc=1MHz
Duty cycle [%]

Duty cycle [%]

60 60
50 50
40 40
30 30
20 20
fosc=190kHz fosc=190kHz
10 10
0 0
0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
DT terminal voltage [V] DT terminal voltage [V]

CS terminal voltage vs.Duty cycle CS terminal voltage vs.Duty cycle

FA7703/04:OUT1 Nch driven (SEL1=REG) FA7703/04:OUT1 Pch drivenb (SEL1=GND)
FA7704:OUT2 FA7703:OUT2
100 100
90 90
80 80
fosc=1MHz
70 70
fosc=1MHz
Duty cycle [%]

Duty cycle [%]

60 60
50 50
40 40
30 30
20 20
fosc=190kHz fosc=190kHz
10 10
0 0
0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
CS terminal voltage [V] CS terminal voltage [V]

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Duty cycle vs. Ambient temperature Duty cycle vs. Ambient temperature
FA7703/04:OUT1 Nch drive (SEL1=REG) FA7703/04:OUT1 Pch drive (SEL1=GND)
FA7704:OUT2 FA7703:OUT2
94 94
DT terminal voltage≈1.05V DT terminal voltage≈1.05V
92 92

90 90
fosc=190kHz fosc=190kHz

duty cycle [%]

duty cycle [%]

88 88

86 86

84 84
fosc=1MHz
82 82

80 80 fosc=1MHz

78 78
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Ambient temperature Ta[°C] Ambient temperature Ta[°C]

Operating mode supply current vs.Supply voltage CS terminal voltage vs.Ambient temperature
Duty=80%, FB1,FB2<1.35V
3.0 1.33
IN(-)-FB:shorted
fosc=1MHz
Operating mode supply current [mA]

2.5 1.31
CS terminal voltage [V]

2.0 1.29
fosc=190kHz

1.5 1.27

1.0 1.25

0.5 1.23

0.0 1.21
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -40 -20 0 20 40 60 80 100
Supply voltage Vcc[V] Ambient temperature Ta[°C]

Operating supply current vs.Ambient temperature

Duty=80%
RT=22kΩ
2.5
Operating supply current [mA]

2.0

Vcc=6V

1.5

1.0
-40 -20 0 20 40 60 80 100
Ambient temperature Ta[°C]

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OUT terminal High side voltage vs. OUT terminal Low side voltage vs.Sink current
Source current OUT1/2
450 200
OUT1/2
400 180
OUT terminal source urrent [mA]

OUT terminal sink current [mA]

Vcc=20V
350 160
140
300
120
250
Vcc=6.0V 100
200
80
150 Vcc=4.5V 60
100 40
Vcc=2.5V
50 20
0 0
0 5 10 15 20 25 0.0 0.5 1.0 1.5 2.0 2.5
OUT terminal voltage [V] OUT terminal voltage [V]

Error Amplifier gain and Phase vs.frequency

CS terminal source current vs.Ambient temperature
80 180 -2.00
70 160
-2.05
60 GAIN 140
CS terminal source current [ A]

50 120 -2.10
PHASE [deg]

40 100 -2.15
GAIN [dB]

30 PHASE 80
-2.20
20 60
-2.25
10 1M Ω
40
390 Ω

0 20 -2.30
-10 0
-2.35
-20 -20
1 10 1k 10k 100k 1M 10M -2.40
Frequency [Hz] -40 -20 0 20 40 60 80 100
Ambient temperature Ta[°C]

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8. Description of each circuit The oscillator output is connected to PWM
(1)Reference Voltage Circuit comparator.
The reference voltage circuit of FA7703/04
generates the reference voltage (VREF) of OSC
1.00V±1% compensated in temperature from
VCC voltage, and the regulated voltage (VREG) 1
RT
of 2.2V ±2% for internal controlling. These
voltages start to output when the undervoltage
Fig.1 RT
lockout protection (UVLO) is cancelled, and
they stabilize after the supply voltage (VCC)
RT value: small RT value: large
reaches up to approx. 2.4V or higher. The
1.10V
reference voltage (VREF) is connected to the
non-inverting input of Error Amplifier 1 and
serves as the reference voltage of Error
0.65V
Amplifier 1. Because of Error Amplifiers have
Fig.2
offset voltage then, the precision of voltage in
practical use is 1.00V±2%. The voltage (VREF) (3)Error Amplifier Circuit
outputs externally from REF terminal, therefore, Error Amplifier 1 of FA7703/04 has the inverting
it can serve as a stabilized power source. When input IN1(-) terminal (Pin13). The non-Inverting
using it, be sure to set the output current 1mA input is internally connected to the reference
or below. voltage (VB) of 1.00V±2% at 25°C. Because
The regulated voltage (VREG) for internal error Amplifier 2 of FA7703/04 has the inverting
controlling serves as the stabilized power input IN2(-) terminal (Pin5) and non-inverted
source for maximum output duty setting or the input IN2(+) terminal (Pin4) outputting externally,
like. Be sure to set the output current 2mA or various circuit can be designed by kinds of
below in operation in this case. This voltage external circuit structures. FB terminals (Pin6,
also serves as the control power source of all Pin12) are the outputs of Error Amplifiers.
the internal circuits of FA7703/04. A capacitor Voltage Gain and phase compensation can be
for stabilization (CREG) is needed to be set by connecting a capacitor (C) and a resistor
connected to the VREG terminal. See (R) between FB terminal and IN(-) terminal.(Fig.
recommended operating conditions to 3) For more information about the connection for
determine capacitance. each output voltage of power supply, refer to
Design Advice.
(2)Oscillator
The oscillator of FA7703/04 generates R NF 1
triangular waveforms by charging and
Vout1
discharging the built-in capacitor. Any desired
oscillation frequency can be obtained by setting R1 IN1- Er.Am p.1
13 FB1
the value of the resistor connected to RT R2 12

terminal (Fig. 1). 14

REF Com p
The voltage oscillates between approximately VB
(1.0V)
0.65V and 1.10V in charging and discharging
with almost the same gradients (Fig. 2). Your Vout2 IN2+ Er.Am p.2 Com p
desired oscillation frequency can be determined 4 FB2
R4 6
by changing the gradient using the resistor (RT) 5

connected to RT terminal. (Large RT: Low R3 IN2-

frequency, small RT: High frequency) The

waveforms of oscillator cannot be observed from
the outside because a terminal for this purpose R NF2
Fig.3
is not provided.
Approximately DC 1V is output to RT terminal.

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 FA7703/04
(4)PWM comparator
PWM comparator of FA7703/04 has 4 input
terminals. (Fig. 4) The oscillator output 2 is
compared with the CS terminal voltage 1, the
DT terminal voltage 3, and the Error Amplifier
output 4. Among those 3 inputs of 1, 3, and
4, the one with the lowest voltage is chosen and
given priority. While the value of the chosen
voltage is lower than the value of the waveform
of oscillator output, PWM comparator output is
set to LOW. Similarly, while the value of the
chosen voltage is higher than the waveform of
oscillator output, PWM comparator output is set
to HIGH. (Fig. 5)
When FA7703/04 are turning ON, the soft start
function starts according to the CS terminal
voltage 1, then the output pulses begin to widen
gradually. The maximum pulse width is adjusted
by changing the DT terminal voltage. In steady
operation, the pulse width is determined with the
condition of the Error Amplifier output 4, and
then the output voltage of DC-DC converter is
stabilized. The operation flow chart of PWM
comparator and OUT terminal is shown in Fig. 5.
The output polarity of OUT1 terminal changes
according to the condition of SEL1 terminal. The
polarity of OUT 2 terminal is different between
FA7703 and FA7704; accordingly, select the type
for your desired circuit design.
1 CS term inal voltage
2 Oscillation voltage
3 DT term inal voltage
4 Error Am plifier output
Fig.4
4 Error Am plifier output
3 DT term inal voltage
2 Oscillation voltage 1 CS term inal voltage
PW M
output
O UT1
Nch driv en
(SEL1:REG )
O UT1
Pch driv en
(SEL1:G ND)
O UT2
FA7703
O UT2
FA7704
Fig.5
Quality is our message
(5)Soft start function
As described in Fig. 6, a capacitor C CS is
connected to CS terminal. When the power
supply of FA7703/04 starts and the undervoltage
lockout protection circuit (UVLO) is cancelled,
the capacitor C CS is charged by the internal
current source (2.2µA. typ.), and the voltage of
CS terminal rises gradually. Since the voltage of
CS terminal is connected to PWM comparator,
the output pulses begin to widen gradually, and
then the soft start function starts as a result. (Fig.
5)
CS
2
2.2 µ A
VCC
output off
C CS 1.27V
U V LO
S .C .P
+
-
2.0V
1.5V
-
S .C .D E T
FB
Fig.6
(6)Timer latch short-circuit protection circuit
The short-circuit protection circuit of FA7703/04
consists of two comparators. (S.C. DET
comparator, S.C.P comparator) In steady
operation, the output of Error Amplifier is
+
- PW M output approximately 1V, accordingly, the output of
+ S.C.DET comparator is set to High, and the
+ voltage of CS terminal is clamped at 1.27V. If the
output voltage drops due to a short-circuit or the
like, the output voltage of Error Amplifiers rises.
When the output voltage of Error Amplifiers
exceeds 1.5V(typ.), the output of S.C.DET
comparator is set to Low, and the clamp action
at the CS terminal voltage of 1.27V is cancelled,
then the voltage of CS terminal rises up to the
VREG voltage. When the voltage of CS terminal
exceeds 2.0V(typ.), the output of S.C.P
comparator is set to High, accordingly, the
output of FA7703/04 is shut off. In this case,
FA7703/04 operate in OFF latch mode and the
current consumption in this mode is 1.3mA(typ.).
The operating waveform of the voltage of CS
terminal is shown in Fig. 7.
The approximate time (tp) between the
occurrence of a short-circuit in the output and
the triggering of the short-circuit protection
14
 FA7703/04
Quality is our message
function can be calculated with (8)Power good signal/Undervoltage lockout
protection circuit (UVLO)
0.7 × CCS
tp[s] ≈ To protect FA7703/04 from malfunction when
ICS the supply voltage drops, there is built-in
where, C CS : Capacitance of CS terminal [µF] undervoltage lockout as a protection circuit.
I CS : Output source current of CS terminal [µA] When the supply voltage rises from 0V, the
(2.2µΑ, typ.) UVLO circuit is canceled at VCC of 2.0V(typ.).
You can reset the timer latch action for the When the supply voltage drops, the UVLO circuit
short-circuit protection function by changing the shuts off the output at VCC of 1.85V(typ.). In this
voltage of either VCC terminal or CS terminal to case, CS terminal is reset to Low level.
the following values. Power good signal circuit monitors the voltage
VCC terminal: below UVLO voltage (1.85V typ.) of REG terminal, and it stops the output of
CS terminal: below 1.83V(typ.) FA7703/04 until the voltage of REG terminal
exceeds approximately 1.9V in order to protect
2.2V the ICs from malfunction.
2.0
CS terminal voltage [V]

1.5
short circuit
1.27V protection
tp
1.0
Start-up
short circuit
0.5 momentary short circuit

soft start
0
Time

Fig.7
(7)Output circuit
FA7703/04 contain a push-pull output stage
and can directly drive MOSFETs. The peak
current of OUT terminal is the maximum sink
current of +150mA, and the source current of
-400mA. FA7703/04 can also drive both NPN
and PNP type transistors. And in such cases,
the maximum continuous current is ±50mA.
When designing the value of output current, be
sure to consider the allowable loss accordingly.
(See Design advice)
Ch1 of FA7703/04 is available for driving both
types of MOSFETs and you can determine the
type of MOSFET, which is connected externally
by selecting the connection of SEL1 terminal
(Pin11). If SEL terminal is connected to GND
terminal, FA7703/04 can drive a Pch MOSFET. If
SEL terminal is connected to REG terminal, they
can drive Nch MOSFET.
You can accordingly design a buck converter
circuit by Pch MOSFET driving, and a boost
circuit or a fly-back converter circuit by Nch
MOSFET driving.
DO NOT leave SEL1 terminal open in operation,
and be sure to connect it to either GND terminal
or REG terminal.

15
FA7703/04
9. Design advice
(1)Setting oscillation frequency
As described in “(2) Oscillator” of “Description
of each circuit”, any desired oscillation frequency
can be obtained by setting the value of the
resistor connected to RT terminal. (Fig. 1) The
desired oscillation frequency should be set
between 50kHz and 1MHz. The oscillation
frequency to RT can be obtained from the chart
of “Oscillation frequency vs. timing resistor”
characteristic curves or by calculating with the
formulas below.
fosc = 3 ×10 3 × RT -0.907
1.1
 3 × 10 3 
RT =  
 fosc 
where, fosc: Oscillation frequency [kHz]
R T : Timing resistor [kΩ]
These formulas can only be used for rough
calculation; accordingly, be careful when
designing, because the value obtained is not
guaranteed. The operation frequency varies due
to the conditions of the tolerance of IC influence
for noises, or external discrete components etc.
When determining the values, be sure to verify
the effectiveness of the values you calculated in
an actual circuit operation.
Because it is easily affected by noises by the
high impedance, the resistor RT should be
connected as shortly as possible near RT
terminal and GND terminal,
(2)Operation around the maximum or the
minimum output duty cycle
As described in the charts of “FB terminal
voltage vs. output duty cycle”, “DT terminal
voltage vs. output duty cycle”, “CS terminal
voltage vs. output duty cycle” characteristic
curves, the output duty of FA7703/04 changes
sharply around the minimum and the maximum
output duty. This phenomenon occurs more
conspicuously when operating in a high
frequency (i.e. when the pulse width is narrow).
Cautious care must be taken when using high
frequency.
Quality is our message
(3)Determining soft start period
The time from the start of charging CS terminal
to n% output duty cycle can be roughly
calculated by the following expression.
VCSn × CCS
ts[ s ] =
ICS
where, VCSn : CS terminal voltage in the output
duty of n% [V]
C CS : Capacitance of capacitor of CS terminal
[µF]
I CS : Output source current of CS terminal [µA]
2.2µΑ (typ.)
V CSn represents the voltage of CS terminal in
the output duty of n%, and it changes according
to the operation frequency. The value is obtained
simply from the chart of “CS terminal voltage vs.
output duty cycle” characteristic curves.
Since the output source current of CS terminal
is 2.2µΑ, which it is rather small, if the capacitor
has leak current, then the period of soft start (ts)
is easily affected. Therefore, cautious care must
be taken when determining the value.
Charging of CS terminal begins after UVLO is
cancelled. Note that the time from power-on of
Power supply to start of charging Ccs is t0 which
is not zero as described in Fig. 8. be careful.
To reset the soft start function, the voltage of
CS terminal is discharged with FA7703/04’s
internal switch triggered by lowering the voltage
of Power supply below the voltage of UVLO
(1.85V, typ.). If Power supply restarts before the
voltage is sufficiently discharged, the soft start
function might not properly operate. accordingly,
cautious care must be taken about it.
Vcc
Threshold
voltage
CS terminal voltage
VCSn
t0 ts
t0 : Time from power-on of VCC to reaching
unlock voltage of UVLO
Fig.8
16
FA7703/04
(4)Setting the maximum output duty
If you need to control the maximum output duty
in the DC-DC converter circuit, you can control
pulse width by connecting REG terminal to DT
terminal divided with resistors R5 and R6, as
described in Fig. 9. The output duty of the
voltage of DT terminal in this case changes
according to the operation frequency, as
described in the chart of “DT terminal voltage vs.
output duty cycle” characteristic curves. Set the
output duty accordingly based on your required
operation frequency. If the maximum output duty
setting is not needed, be sure to connect DT
terminal directly to REG terminal. In this case,
the pulse width widens up to the output duty of
100%.
The voltage of DT terminal should be set in the
range of 0.65V to 1.1V(typ.). There is a
possibility of distortion of the output pulses if
strong noises or the like are applied to DT
terminal. When conducting pattern wiring, do it
as close to each terminal of the IC as possible.
Besides, it is strongly recommended to connect
a capacitor C DT for a filter of noise prevention.
Quality is our message
(6)Restriction of external discrete
components/Recommended operating
conditions
To achieve a stable operation of FA7703/04, the
values of external discrete components
connected to VCC, REF, and CS terminals of
this IC should be within the range of
recommended operating conditions. And also
the voltage and the current applied to each
terminal should be within the recommended
operating conditions.
A Pch MOSFET is installed between VCC
terminal and OUT1 terminal, and between VCC
terminal and OUT2 terminal. Since the Pch
MOSFET has a parasitic diode, if the voltage of
OUT1 and OUT2 terminals becomes higher than
the VCC terminal voltage, the current flows from
each terminal to VCC terminal. Cautious care
must be taken accordingly when designing.
V IN
9
Vcc

16 REG 16 REG
OUT1
DT1 or DT2 DT1 or DT2
R5 10
3 15 3 15

G ND G ND
7 7
R6 C DT
GND
7
setting Not needed
m axim um m axim um Duty
Duty cycle cycle

Fig.9 V IN

(5)Pull-up/Pull-down resistor at the output

section 9
Vcc
The power source of FA7703/04 to control the
output section is supplied from the voltage of OUT2
VREG, the voltage of this power source is 8

accordingly not stationary below the UVLO

voltage. On the other hand, OUT terminal
GND
becomes unsteady condition while Power supply 7

voltage is below UVLO voltage. Be sure to

connect a pull-up resistor/pull-down resistor
Fig.10
according to Fig. 10. (See Fig. 10)

17
FA7703/04
Quality is our message
(7)Loss Calculation speed, it is quite effective to install a capacitor
Since it is difficult to measure IC loss directly, C B in addition.
the calculation to obtain the approximate loss of
power supply
the IC connected directly to a MOSFET is
described below. Vcc
9

When the supply voltage is VCC, the current CB

OUT1
consumption of the IC is I CC1 , the total input 2

gate charge of the driven MOSFET is Qg and 10 8

RB
the switching frequency is fsw, the total loss Pd
of the IC can be calculated by: GND
7
Pd ≈ VCC ×(ICC1 +Qg×fsw).
The value in this expression is influenced by
the effects of the dependency of supply voltage, Fig.11
the characteristics of temperature, or the
tolerance of parameter. Therefore, evaluate the (10)ON/OFF control
appropriateness of IC loss sufficiently FA7703/04 can be turned ON/OFF at CS
considering the range of values of above terminal by external signal. The way to conduct
parameters under all conditions. ON/OFF control is also shown in Fig. 12. When
the voltage of CS terminal is below the threshold
Example) voltage, the duty becomes 0% and the output
I CC1 =1.8mA for VCC=6.0V in the case of a turns OFF. The current consumption in this case
typical IC from the characteristics curve. is 1.3mA(typ.). To switch the ICs ON, just turning
Qg=6nC, fsw=190kHz, the IC loss ”Pd” is as CS terminal open, then the soft start function
follows. restarts, and the output turns back ON. ON/OFF
Pd ≈ 6.0× (1.6mA+6nC×190kHz) ≈17.6mW control at CS terminal is used for both channel,
if two MOSFETs are driven under the same and the control of each channel is not allowed.
condition for 2 channels, Pd is as follows:
Pd ≈ 6.0×{1.8mA+2× (6nC×190kHz)}=24.5mW O scillation
output +
- output
D T term inal +
(8)Performance of output stage voltage +
12

The performance of the output stage of Error Am plifier

output
FA7703/04 is the maximum sink current of O N/O FF
2
+
C S term inal
voltage - output
150mA and the maximum source current of +
D T term inal
400mA. The switching element externally voltage + PW M.Com p
6

attached to FA7703/04 might affect switching Error Am plifier

output
speed of the ICs. Cautious care must be taken
7

about it especially in high frequency operation. If

the performance of the ICs is not sufficient for Fig.12
your design, consider adding a buffer circuit to
improve the performance.

(9)In the case of bipolar driving

If using a bipolar transistor as the switching
element, there is a possibility of the damage
from burnout due to excessive current flow
because the ICs doesn’t contain an internal
limiter resistance. Therefore, be sure to install a
base resistor. (Fig. 11) In the case of driving a
bipolar transistor, control the output current of
OUT terminal within 50mA(continuous) in
operation. If you want to speed up the switching

18
FA7703/04
Quality is our message
(11)Setting of the output voltage of DC-DC
C h1:B uck(FA 7703/04)
converter
V out1
Figure 13 shows the ways to set each channel
11
of the output voltage of DC-DC converter. The R1 SEL1

precision of output voltage based on 13

IN 1-
-
12
+ F B1
V out1
FA7703/04’s characteristics depends on the R2
VB
(1.0V)
variation of the voltage of VB (±2%) and VREF OUT1
10

7
(±1%), and also on offset voltage, and
temperature characteristics.

C h1:B oost(F A 7703/04)

selection Guide
V out1
Ch1 Buck, Boost, Fly-back
FA7703 16 11
Ch2 Buck, Inverting (Pch driven) R1 R EG SEL1

Ch1 Buck, Boost, Fly-back

FA7704 13 -
12
Ch2 Boost, Fly-back (Nch driven) R2
IN 1-
+ F B1
V out1
VB
(1.0V)
10
OUT1
If using FA7703/04, and building: 7

In the case of a boost, a buck, or a fly-back circuit

in ch1, the output voltage can be calculated with:
R1 + R 2 C h2:B uck (FA 7703)
Vout1 = × VB V out2
R2
If using FA7703, and building: R4 14
R EF
A buck circuit in ch2, the output voltage can be 5
IN 2-
-
calculated with: + F B2
6
V out2
R3
R3 + R 4
4
IN 2+
Vout 2 = × VREF OUT2
8

R3 7

A inverting circuit in ch2, the output voltage can

be calculated
with the following formula. (the output voltage is Ch2:Inverting(FA7703)
negative.)
R7
R3 + R 4 R4 R3 14
REF
Vout 2 = ×V1 − × VREF 4

R3 R3 IN2+ +
6
Vout2
R8 R4
- FB2
,where V 1 = × VREF V1 5
IN2-
R 7 + R8 O UT2
8

The ratio of resistance can be calculated with: 7

R8
R3 VREF − V 1 Vout2
=
R 4 Vout 2 + V 1
C h2:B oost(FA 7704)
V out2
(Use the absolute value of Vout2 voltage)
If setting R7=R8, then, R4 14
REF
5

 R3 − R 4  IN 2-
-
Vout 2 = V REF ×  +
6
V out2
 2 R3  R3 4
IN 2+
F B2

OUT2 8
If using FA7704, and building: 7

A boost, or fly-back circuit in ch2, the output

voltage can be calculated with: Fig.13
R3 + R 4
Vout 2 = × VREF Please note that DO NOT leave SEL1 terminal
R3 open in operation, and be sure to connect it to
GND or VREG terminal.

19
FA7703/04
Quality is our message
(12)To protect FA7703/04 from application of
negative voltage
If rather large negative voltage is applied to any
terminal of FA7703/04, then internal parasitic
elements start operating, and they may cause
malfunctions. Accordingly, the negative voltage,
which is applied to each terminal of the ICs,
must be kept above -0.3V.
In the case of OUT terminal, in particular, the
oscillation of voltage occurring after MOSFET’s
turning off can be applied to OUT terminal
through MOSFET’s parasitic capacitance. As a
result, there is a possibility that the negative
voltage is applied to OUT terminal. If this
negative voltage reaches -0.3V or below,
connect an Schottky barrier diode between OUT
terminal and GND terminal as shown in Fig. 14.
The Schottky barrier diode’s forward direction
voltage clamps the voltage applied to OUT
terminal. In this case, use the Schottky barrier
diode with low voltage drop in forward direction.
Other terminals should be kept above -0.3 V
also based on the same reasons.

9
Vcc

OUT1
2
10 8

GND SBD
7

Fig.14

(13)Forbidden use of external forcible

latched operation for CS terminal
If the external voltage of 2.0V or more is
forcibly applied to CS terminal in normal
operation (clamped at 1.2V), the IC may be
seriously damaged because the clamp circuit is
not equipped with any resistor for limiter.
Therefore, DO NOT apply external high voltage
to CS terminal.

20
FA7703/04
Quality is our message
10.Application circuit

10V/100mA
1k Ω 9k Ω
Vin
2.5 to 8.0V

1k Ω
11k Ω

10k Ω

2200pF
-7.5V/100mA
16 15 14 13 12 11 10 9
R EG DT1 R EF IN 1- FB1 SEL1 OUT1 VC C

0.1 µ F FA7703
11k Ω
RT CS DT2 IN 2+ IN 2- FB2 GND OUT2
1 2 3 4 5 6 7 8

4700pF
10k Ω

10k Ω 1µ F 22k Ω

10k Ω 10k Ω

1k Ω 16k Ω

5V/500mA
1k Ω
Vin 4k Ω

8 to 18V

10k Ω
4700pF

30V/20mA
16 15 14 13 12 11 10 9
R EG DT1 R EF IN 1- FB1 SEL1 OUT1 VC C

0.1 µ F FA7704
11k Ω
RT CS DT2 IN 2+ IN 2- FB2 GND OUT2
1 2 3 4 5 6 7 8

10k Ω
10k Ω
4700pF

0.1 µ F

10k Ω

1.5k Ω 43k Ω

21