Applied Physics Lab

Lab 07: DC circuits (2)

Section: BEE-10A

Group: B4

Group members:
Muiz Alvi

Saad Muhammad

Ali Abdul Rehman

Syed Kamran Shafqat

Asad Khalil Rao

Ali Haider Tahir

Date of experiment: 6th Decemeber, 2018

 EXPERIMENT 1
Abstract:
In this experiment, we will draw a circuit with different types and combinations of resistors.
After the circuit is made, the different nodes and branch currents are identified. The purpose of
this experiment is to verify KVL and KCL by connecting the resistors with a voltage supply in a
circuit.

Theory:
Kirchhoff's Voltage Law (KVL):

Kirchhoff's Voltage Law (KVL) is Kirchhoff's law that deals with the conservation of energy
around a closed circuit path. ... His voltage law states that for a closed loop series path the
algebraic sum of all the voltages around any closed loop in a circuit is equal to zero. In any given
loop of a circuit, the sum of the voltages would be equal to zero that is:

V1 + V2 + V3 + V4 = 0

Kirchhoff's Current Law (KCL):

Kirchhoff's Current Law (KCL) is Kirchhoff's first law that deals with the conservation of
charge entering and leaving a junction. In other words the algebraic sum of ALL the currents
entering and leaving a junction must be equal to zero as:

Σ IIN = Σ IOUT

I1 + I 2 = I 3 + I 4

Apparatus:
 AC/DC Electronics Lab Board
 1.5 V battery
 Resistors
 Connecting wire leads
 Digital multimeter

Procedure:
 Measure the values of the resistances by the help of the colour codes.
 Verify the values of the resistances by the help of an ohmmeter.
 Connect the resistors in any combination
 Connect the combination of the resistors the battery with the help of wire leads.
  Measure the voltages across the resistors and note down the value of the voltages
 Measure the current through the resistors and note down the value of the currents.
 Take any loop and verify KVL such that the algebraic sum of the voltages across each
component is zero.
 Take any node and verify KCL such that the current entering the node is equal to the
current exiting the node.

Data analysis and Calculations:

The measured values of the resistances are:

S NO. Value (Ω)

R1 327
R2 1002
R3 98.5
R4 150
R5 97.8

Consider the circuit:

The values of voltages are:

S NO. Value (Volts)

VR1 0.619
VR2 0.719
VR3 -0.602
VR4 -0.739
VR5 0.128

Consider loop 1. Algebraic sum of the voltages across the component is:

VR1 + VR5 + VR4

= 0.619 + 0.128 – 0.739

= 0.08 ≈ 0

Hence, verification of KVL.

The values of currents are:

S NO. Value (mA)

IR1 1.86
IR2 0.71
IR3 5.93
IR4 4.8
IR5 1.16
IT 6.60

Consider node Va

Currents leaving = currents entering

IR2 + IR5 = IR1

0.71 + 1.16 = 1.86

1.87 ≈ 1.86

Hence, verification of KCL.

Conclusion:
From the experiment, we conclude two things. First of all the total algebraic sum in a closed
loop of a circuit remains zero. Secondly, the current leaving at a node is equal to the current
exiting from the node. Minor deviations have been shown in the experiment which may be due to
power loss or internal resistance of the wires.
 EXPERIMENT 2
CHARGING AND DISCHARGING OF A CAPACITOR

Abstract:
Capacitors are devices that can store electric charge and energy. Capacitors pass AC current, but
not DC current, so they are used to block the DC component of a signal. A capacitor can be
slowly charged to the necessary voltage and then discharged quickly to provide the energy
needed. It is even possible to charge several capacitors to a certain voltage and then discharge
them in such a way as to get more voltage (but not more energy) out of the system than was put
in. This experiment features an RC circuit, which is one of the simplest circuits having a
capacitor.

Theory:
The charge on a capacitor / potential difference across terminals of a capacitor, when using DC,
is an exponential function in terms of time. The product of R and C gives the time constant
which is defined as “the time taken by capacitor to get charged to 63% of the maximum charge
or get discharged to 37% of the maximum charge”.

The charging time for a capacitor to get charged to 63% of the total charge when seen through a
voltmeter and connected to a 1.5 V battery, is from 0V to 0.95V.

The discharging time for a capacitor to discharge 63% of the total charge is the value on the
voltmeter from maximum to 0.5V.

Apparatus:
 AC/DC Electronics Lab Board
 Capacitors
 Resistors
 Connecting wire leads
 1.5 V battery
 Digital Multimeter
Procedure:
 Connect the battery, capacitors and resistors together on the lab board
 Note down the initial value of resistors and capacitors.
 Place the timer on 0 sec and note down the time the capacitor charges up to 0.95 V.
 Note down the time as charging time.
 Let the capacitor charge to maximum value.
 Place the time on 0 sec and note down the time the capacitor discharges from maximum
value to 0.5V
 Note down the time as discharging time.
 Repeat the experiment for other circuits with capacitances in parallel and series.

Circuit 1:

Charging time = 46.47 sec

Discharging time = 34.41 sec

Circuit 2:

Charging time = 35.19 sec

Discharging time = 29.18 sec

Circuit 2:

Charging time = 195.15 sec

Discharging time = 132.68 sec

Conclusion:
It is found out that by performing the experiments on the three circuits, the time to charge and
discharge a capacitor is much lower while the time to charge and discharge capacitors in parallel
take a longer time to charge.