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E2 Rothschild DSC: rPGA Arrandale + Fcbga PCH Ibexpeak-M + N10M-NS-S
E2 Rothschild DSC: rPGA Arrandale + Fcbga PCH Ibexpeak-M + N10M-NS-S
COMPAL CONFIDENTIAL
MODEL NAME : NCL01
PCB NO : LA-5472P ( DAA00001I00)
1 1
E2 Rothschild DSC
2
rPGA Arrandale + 2
4 4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
MB PCB PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
Part Number Description
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
DAZ0AZ00100 PCB NCL01 LA-5472P LS-5471P/5473P/5574P NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 1 of 66
A B C D E
A B C D E
+DOCK_PWR_BAR
+NBDOCK_DC_IN_SS IEEE1394 USB0 : Right side pair top
+LOM_VCT page 33 USB[0,1] R SIDE
page 38
PCMCIA SLOT On IO/B USB Ports X2 USB1 : Right side pair bottom
+5V_ALW page 37
+3.3V_RUN On IO/B
DAI +5V_RUN page 34
CardBus PCIE/SMBUS +1.05V_RUN_VTT /100MHz
USB[8,9] PCIE3
SATA5 SD/MMC R5U242 HD Audio I/F
DOCK LPC BUS CONN +3.3V_RUN page 33-34
+3.3V_RUN page 33
+1.05V_RUN_ /100MHz PCI Express BUS S-ATA 0/1/4/5 3GB/s Intel Hanksville
SPI
Option 82577LM
PCIE5 PCIE2 PCIE1 SATA1 SATA0 +3.3V_LAN
EXPRESS Mini Card 3 Mini Card2 Mini Card 1 TCM W25Q64BVSSIG E-Module S-HDD +1.0V_LAN page 30
Card BKT FLASH WLAN WWAN SSX44-B +3.3V_M page 15
+3.3V_RUN +3.3V_RUN page 32 64M 4K sector +5V_MOD +5V_HDD
+3.3V_SUS +3.3V_PCIE_BKT +3.3V_WLAN +3.3V_PCIE_SATA_WAN
LPC BUS page 28 page 28 LAN SWITCH
+1.5V_RUNpage 34 +1.5V_RUN page 36 +1.5V_RUN page 36 +1.5V_RUN page 36
+3V_RUN INT.Speaker PI3L720ZHE
3
USB[10] USB[13] USB[4] USB[5] USH TPM1.2 33MHz
W25X32BVSSIG Azalia Codec +3.3V_LAN page 30
3
page 29
BCM5882 +3.3V_M page 15 92HD81B1
+3.3V_RUN
+3.3V_ALW +VDDC_5882 32M 4K sector
Smart Card TDA8034HN +2.5V_ALW_AVDD +5V_RUN page 29
HeadPhone &
page 31 +1.2V_ALW_AVDD
+5V_ALW +1.2V_ALW_PLL page 31-32 RJ45
+3.3V_ALW
+SC_PWR page 31
MIC Jack
RFID USB[7] SMSC KBC DOCK LPC BUS +VREFOUT
page 31
USBH WiFi ON/OFF
MEC5045
SMBUS +RTC_CELL BC BUS On IO/B
+3.3V_ALW page 40 SMSC SIO MDC DAI DOCK
Trough Cable TI TLV320AIC3004
+VCC_GFXCORE BC BUS ECE5028 +3.3V_ALW_PCH
page 37
+3.3V_RUN
+1.8V_RUN page 29
page 52 page 40 +3.3V_ALW page 39 On IO/B
Touch Pad ECE1077
Biometric +5V_ALW Stick Dig. MIC
+5V_RUN +3.3V_ALW page 41
+3.3V_RUN page 37 +3.3V_ALW page 41
0.75V +3.3V_RUN RJ11
4 page 47 4
CHARGER 1.5V DC IN & BATT IN Power On/Off DC/DC Interface Block Diagram
page 51 page 46 page 44
SW & LED page 43 page 42
Size Document Number Rev
A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 2 of 66
A B C D E
5 4 3 2 1
D
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON ON 1 JUSB1 (Ext Right Side Bottom) D
S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH HIGH ON ON ON OFF OFF 2 JESA1 (Ext Left Side Top)
S4 (Suspend to DISK) / M1 LOW LOW HIGH LOW HIGH ON ON OFF OFF OFF 3 JESA1 (Ext Left Side Bottom)
S5 (SOFT OFF) / M1 LOW LOW LOW LOW HIGH ON ON OFF OFF OFF 4 WLAN
PCH
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH HIGH LOW ON OFF ON OFF OFF 5 WWAN
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF OFF 6 Bluetooth
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF OFF 7 USH->BIO
8 DOCKING
C
PM TABLE 9 DOCKING C
S0 ON ON ON ON
ON PCI EXPRESS DESTINATION
S3 ON ON OFF ON OFF
Lane 1 MINI CARD-1 WWAN
S5 S4/AC ON OFF OFF ON OFF
B Lane 2 MINI CARD-2 WLAN B
Lane 7 None
Lane 8 None
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 3 of 66
5 4 3 2 1
5 4 3 2 1
MODC_EN
HDDC_EN
EN_INVPWR FDC654P
+BL_PWR_SRC
Q17
ADAPTER
D SI3456BDV SI3456BDV D
(Q32) (Q29)
ALWON
+15V_ALW
MAX17020
CHARGER +5V_ALW RUN_ON
(PU19)
C C
FDS8878
+3.3V_ALW (Q55)
AUX_EN_WOWL
PCH_ALW_ON
AUX_ON
+5V_RUN
SUS_ON
RUN_ON
M_ON
MAX17030 VT356 TPS51100 ISL8014 NCP5222
(PU20) (PU4) (PU5) (PU301) (PU10) SI3456BDV SI3456BDV S13456 SI3456 NTMS4107 SI3456BDV
(Q47) (Q54) (Q60) (Q2) (Q61) (Q66)
0.75V_DDR_VTT_ON
CPU_VTT_ON
IMVP_VR_ON
M_ON
DDR_ON
RUN_ON
Pop option
B B
REGCTL_PNP10
Pop option
RUN_ON
+3.3V_M
GFX_MEM_VTT_ON
DCP69
AO4430 S1S406 FDS8878 SI4164 (Q45)
(Q200) (Q151) (Q183) (Q57)
Pop option
+1.05V_M
A A
Pop option
+1.5V_CPU_VDDQ +1.5V_RUN +1.5V_RUN +1.0V_LAN
+1.05V_RUN DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
SI4164 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
+1.5V_MEM_GFX NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
(Q58) PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 4 of 66
5 4 3 2 1
5 4 3 2 1
2.2K
2.2K
+3.3V_ALW_PCH
H14 MEM_SMBCLK 202
2.2K
202
PCH
D
2.2K
+3.3V_LAN 200 DIMMB
SMBUS Address [TBD] D
C6 LAN_SMBCLK 28
3A 3A B4 127 2.2K
+3.3V_RUN
1A DOCK_SMB_CLK
129 DOCKING 2N7002
A3 DOCK_SMB_DAT 14
1A G Sensor
2.2K SMBUS Address [TBD] 2N7002 13 SMBUS Address [TBD]
2.2K +LCD_VDD
B5 LCD_SMBCLK 17
1B LCD
C C
A4 LCD_SMDATA 18 SMBUS Address [TBD]
1B (JeDP1)
2.2K
+3.3V_ALW
2.2K
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY SMBUS Address [TBD]
1C B59 PBAT_SMBDAT 100 ohm
KBC 2.2K
CONN
+3.3V_ALW
2.2K
1E A50 USH_SMBCLK M9
1E B53 USH_SMBDAT L9 USH SMBUS Address [TBD]
2.2K
+3.3V_ALW
B
2.2K B
7
2B A49 CARD_SMBCLK
8 Express card SMBUS Address [TBD]
2B B52 CARD_SMBDAT
2.2K
+3.3V_RUN 0 ohm 0 ohm
2.2K
B7 CKG_FFS_SMBDAT 31
2D
32 CLK GEN SMBUS Address [TBD]
A7 CKG_FFS_SMBCLK
2D
2.2K
+3.3V_RUN
A 2.2K A
B49 DAI_GPU_R3P_SMBCLK
2A 8
B48 DAI_GPU_R3P_SMBDAT 9
A/D,D/A SMBUS Address [TBD]
2A converter
+3.3V_RUN
R92
+3.3V_RUN +CK_VDD_MAIN +CLK_VDD_IO 10K_0402_5%~D
H_STP_CPU# 1 2
D L89 D
1 2 +1.05V_RUN 1 2
BLM18AG601SN1D_0603~D L2
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 1 1 1 1 1 BLM18AG601SN1D_0603~D CLKREF
1 1 1
C2
C3
C4
C5
C6
C7
1
C8
C10
C9
2 2 2 2 2 2 @C1707
@ C1707
2 2 2 10P_0402_50V8J~D
2
EMI
+CK_VDD_MAIN
+CLK_VDD_IO
U1
1 23
VDD_DOT CPU_0
5
VDD_27
22
C CPU_0# C
15
VDDSRC_IO
18 VDDCPU_IO
20 BUF_BCLK 1 2 CLK_BUF_BCLK
CPU_1 CLK_BUF_BCLK 16
17 R11 0_0402_5%~D
VDDSRC_3.3 BUF_BCLK# CLK_BUF_BCLK#
24 VDDCPU_3.3 CPU_1# 19 1 2 CLK_BUF_BCLK# 16
29 R13 0_0402_5%~D
VDDREF_3.3
10 BUF_CKSSCD 1 2 CLK_BUF_CKSSCD CLK_BUF_CKSSCD 16
SRC_1/SATA R1181 0_0402_5%~D
11 BUF_CKSSCD# 1 2 CLK_BUF_CKSSCD# CLK_BUF_CKSSCD# 16
SRC_1/SATA# R1180 0_0402_5%~D
3 DOT96 1 2 CLK_BUF_DOT96
DOT_96 CLK_BUF_DOT96 16
H_STP_CPU# 16 R37 0_0402_5%~D
CPU_STOP# DOT96# CLK_BUF_DOT96#
4 1 2 CLK_BUF_DOT96# 16
DOT_96# R38 0_0402_5%~D
+3.3V_RUN
CLK_PWRGD 25
X1 CKPWRGD/PD# CLK_NV CLK_NV_27M
6 1 2 CLK_NV_27M 53
27MHz
1
2 1 14.31MHZ_16PF_X5H01431AFG1HX~D @ R43 33_0402_5%~D
C16 7 CLK_NVSS 1 2 CLK_NVSS_27M R132
27MHz_SS CLK_NVSS_27M 53
1
C17 CLK_XTAL_IN 28
2
27P_0402_50V8J~D XTAL_IN R369
2
1
D
9
CLK_PCH_14M R33 CLKREF VSS_SATA Q136
16 CLK_PCH_14M 1 2 30
REF_0/CPU_SEL VSS_SRC
12 49 CLK_EN# 2
33_0402_5%~D 21 G SSM3K7002FU_SC70-3~D
VSS_CPU
26 S
3
VSS_REF
33
EP
SLG8SP585VTR_QFN32_5X5~D
+3.3V_RUN
+1.05V_RUN
1
1
@ R41 @ C1392
4.7K_0402_5%~D 0.1U_0402_16V4Z~D
1
2 U23 @ @ R372
REF_O/CPU_SEL 0_0402_5%~D
NC
2
2 4 1 2
CLKREF A Y
PIN 30 CPU0 CPU1
G
1(0.7~1.5v) 100MHz 100MHz NC7SZ04P5X_NL_SC70-5~D
3
1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Clock Generator
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 6 of 66
5 4 3 2 1
5 4 3 2 1
JCPUI
JCPUA K27
PEG_IRCOMP_R R1084 VSS161
PEG_ICOMPI B26 1 2 49.9_0402_1%~D K9 VSS162
PEG_ICOMPO A26 K6 VSS163
DMI_CRX_PTX_N0 A24 B27 K3
17 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_RX#[0] PEG_RCOMPO EXP_RBIAS VSS164
C23 A25 R1129 1 2 750_0402_1%~D J32
17 DMI_CRX_PTX_N1 DMI_RX#[1] PEG_RBIAS VSS165
DMI_CRX_PTX_N2 B22 J30
D 17 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI_RX#[2] PEG_CRX_GTX_N0 PEG_CRX_GTX_N[0..15] 53 VSS166 D
17 DMI_CRX_PTX_N3 A21 K35 J21
DMI_RX#[3] PEG_RX#[0] PEG_CRX_GTX_N1 VSS167
J34 J19
DMI_CRX_PTX_P0 PEG_RX#[1] PEG_CRX_GTX_N2 VSS168
17 DMI_CRX_PTX_P0 B24 J33 H35
DMI_CRX_PTX_P1 DMI_RX[0] PEG_RX#[2] PEG_CRX_GTX_N3 VSS169
17 DMI_CRX_PTX_P1 D23 G35 H32
DMI_RX[1] PEG_RX#[3] VSS170
DMI
DMI_CRX_PTX_P2 B23 G32 PEG_CRX_GTX_N4 H28
17 DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4] VSS171
DMI_CRX_PTX_P3 A22 F34 PEG_CRX_GTX_N5 H26
17 DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] PEG_CRX_GTX_N6 VSS172
F31 H24
DMI_CTX_PRX_N0 PEG_RX#[6] PEG_CRX_GTX_N7 VSS173
17 DMI_CTX_PRX_N0 D24 D35 H22
DMI_CTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] PEG_CRX_GTX_N8 VSS174
17 DMI_CTX_PRX_N1 G24 E33 H18
DMI_CTX_PRX_N2 DMI_TX#[1] PEG_RX#[8] PEG_CRX_GTX_N9 VSS175
17 DMI_CTX_PRX_N2 F23 C33 H15
DMI_CTX_PRX_N3 DMI_TX#[2] PEG_RX#[9] PEG_CRX_GTX_N10 VSS176
17 DMI_CTX_PRX_N3 H23 D32 H13
DMI_TX#[3] PEG_RX#[10] PEG_CRX_GTX_N11 VSS177
B32 H11
DMI_CTX_PRX_P0 PEG_RX#[11] PEG_CRX_GTX_N12 VSS178
17 DMI_CTX_PRX_P0 D25 DMI_TX[0] PEG_RX#[12] C31 H8 VSS179
17 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 F24 B28 PEG_CRX_GTX_N13 H5
DMI_CTX_PRX_P2 DMI_TX[1] PEG_RX#[13] PEG_CRX_GTX_N14 VSS180
17 DMI_CTX_PRX_P2 E23 DMI_TX[2] PEG_RX#[14] B30 H2 VSS181
17 DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 G23 A31 PEG_CRX_GTX_N15 G34
DMI_TX[3] PEG_RX#[15] PEG_CRX_GTX_P[0..15] 53 VSS182
G31 VSS183
J35 PEG_CRX_GTX_P0 G20
PEG_RX[0] PEG_CRX_GTX_P1 VSS184
H34 G9
PEG_RX[1] PEG_CRX_GTX_P2 VSS185
H33 G6
PEG_RX[2] PEG_CRX_GTX_P3 VSS186
E22 FDI_TX#[0] PEG_RX[3] F35 G3 VSS187
D21 G33 PEG_CRX_GTX_P4 F30
FDI_TX#[1] PEG_RX[4] PEG_CRX_GTX_P5 VSS188
D19 FDI_TX#[2] PEG_RX[5] E34 F27 VSS189
D18 F32 PEG_CRX_GTX_P6 F25
FDI_TX#[3] PEG_RX[6] PEG_CRX_GTX_P7 VSS190
G21 FDI_TX#[4] PEG_RX[7] D34 F22 VSS191
E19 F33 PEG_CRX_GTX_P8 F19
FDI_TX#[5] PEG_RX[8] PEG_CRX_GTX_P9 VSS192
F21 FDI_TX#[6]
PCI EXPRESS -- GRAPHICS PEG_RX[9] B33 F16 VSS193
Intel(R) FDI
G18 D31 PEG_CRX_GTX_P10 E35
FDI_TX#[7] PEG_RX[10] PEG_CRX_GTX_P11 VSS194
A32 E32
D22
FDI_TX[0]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
C30
A28
PEG_CRX_GTX_P12
PEG_CRX_GTX_P13
E29
E24
VSS195
VSS196
VSS197
VSS
C21 B29 PEG_CRX_GTX_P14 E21
C FDI_TX[1] PEG_RX[14] PEG_CRX_GTX_P15 VSS198 C
D20 A30 E18
FDI_TX[2] PEG_RX[15] VSS199
C18 FDI_TX[3] E13 VSS200
G22 L33 PEG_CTX_GRX_C_N0 PEG_CTX_GRX_P[0..15] E11
FDI_TX[4] PEG_TX#[0] PEG_CTX_GRX_C_N1 PEG_CTX_GRX_P[0..15] 53 VSS201
E20 FDI_TX[5] PEG_TX#[1] M35 E8 VSS202
F20 M33 PEG_CTX_GRX_C_N2 PEG_CTX_GRX_N[0..15] E5
FDI_TX[6] PEG_TX#[2] PEG_CTX_GRX_C_N3 PEG_CTX_GRX_N[0..15] 53 VSS203
G19 FDI_TX[7] PEG_TX#[3] M30 E2 VSS204 VSS_NCTF1 AT35
L31 PEG_CTX_GRX_C_N4 D33 AT1
FDI_GND PEG_TX#[4] PEG_CTX_GRX_C_N5 VSS205 VSS_NCTF2
F17 FDI_FSYNC[0] PEG_TX#[5] K32 D30 VSS206 VSS_NCTF3 AR34
E17 M29 PEG_CTX_GRX_C_N6 PEG_CTX_GRX_C_P0 C1666 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_P0 D26 B34
FDI_FSYNC[1] PEG_TX#[6] PEG_CTX_GRX_C_N7 PEG_CTX_GRX_C_N0 C1667 2 PEG_CTX_GRX_N0 VSS207 VSS_NCTF4
J31 1 0.1U_0402_10V7K~D D9 B2
NCTF
PEG_TX#[7] PEG_CTX_GRX_C_N8 VSS208 VSS_NCTF5
C17 FDI_INT PEG_TX#[8] K29 D6 VSS209 VSS_NCTF6 B1
H30 PEG_CTX_GRX_C_N9 PEG_CTX_GRX_C_P1 C1668 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_P1 D3 A35
PEG_TX#[9] PEG_CTX_GRX_C_N10 PEG_CTX_GRX_C_N1 C1669 2 PEG_CTX_GRX_N1 VSS210 VSS_NCTF7
F18
FDI_LSYNC[0] PEG_TX#[10]
H29 1 0.1U_0402_10V7K~D C34
VSS211
D17 F29 PEG_CTX_GRX_C_N11 C32
FDI_LSYNC[1] PEG_TX#[11] PEG_CTX_GRX_C_N12 PEG_CTX_GRX_C_P2 C1670 2 PEG_CTX_GRX_P2 VSS212
PEG_TX#[12]
E28 1 0.1U_0402_10V7K~D C29
VSS213
D29 PEG_CTX_GRX_C_N13 PEG_CTX_GRX_C_N2 C1671 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_N2 C28
PEG_TX#[13] VSS214
2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Arrandale (1/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 7 of 66
5 4 3 2 1
5 4 3 2 1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1879 1 GND0 GND1 2
1 1 XDP_PREQ# 3 4 CFG8
OBSFN_A0 OBSFN_C0 CFG8 10
1
+3.3V_ALW2 1 2 @ @ XDP_PRDY# 5 6 CFG9
OBSFN_A1 OBSFN_C1 CFG9 10
C19
C20
R1505 7 8
10K_0402_5%~D XDP_OBS0 GND2 GND3 CFG0
9 10 CFG0 10
0.1U_0402_16V4Z~D 2 2 XDP_OBS1 OBSDATA_A0 OBSDATA_C0 CFG1
11 12 CFG1 10
OBSDATA_A1 OBSDATA_C1
1
13 14
2
D R1503 U141 XDP_OBS2 GND4 GND5 CFG2 D
15 16 CFG2 10
OBSDATA_A2 OBSDATA_C2
5
+1.5V_CPU_VDDQ 100K_0402_5%~D 1.5V_PWRGD 74AHC1G08GW_SOT353-5~D XDP_OBS3 17 18 CFG3
OBSDATA_A3 OBSDATA_C3 CFG3 10
1 19 20
P
IN1 GND6 GND7 CFG10
4 Place near JXDP1 21 22 CFG10 10
2
O OBSFN_B0 OBSFN_D0
1
1
D CFG11
2 23 24 CFG11 10
IN2 OBSFN_B1 OBSFN_D1
G
R1504 1.5V_CPU_VDDQ_PWRGD#2 Q207 25 26
GND8 GND9
1
1K_0402_5%~D G BSS138_SOT23~D XDP_OBS4 27 28 CFG4
CFG4 10
3
R879 XDP_OBS5 OBSDATA_B0 OBSDATA_D0 CFG5
S 29 30 CFG5 10
3
1.5K_0402_1%~D OBSDATA_B1 OBSDATA_D1
R1507 31 32
2
GND10 GND11
1
C +1.5V_CPU_VDDQ XDP_OBS6 33 34 CFG6
1.5V_CPU_VDDQ_PWRGD 1.5V_CPU_VDDQ_PWRGD_R XDP_OBS7 OBSDATA_B2 OBSDATA_D2 CFG7 CFG6 10
1 2 2 Q205 @ R6 35 36 CFG7 10
2
B PMST3904_SOT323-3~D 1K_0402_5%~D OBSDATA_B3 OBSDATA_D3
37 38
1.8K_0402_5%~D E PM_DRAM_PWRGD_R H_CPUPWRGD H_CPUPWRGD_XDP GND12 GND13 CLK_CPU_ITP
2 1 2 1 2 39 40
3
@ R1518 CFD_PWRBTN#_XDP PWRGOOD/HOOK0 ITPCLK/HOOK4 CLK_CPU_ITP#
15,17 SIO_PWRBTN#_R 1 2 41 HOOK1 ITPCLK#/HOOK5 42
C1880 1.1K_0402_1%~D @ R68 0_0402_5%~D 43 44 @ R7 1K_0402_5%~D
VCC_OBS_AB VCC_OBS_CD
1
0.22U_0402_6.3V6K~D H_PWRGD_XDP 1 2 PWRGD_XDP_R 45 46 XDP_RST#_R 2 1 H_CPURST#
1 R880 @ R19 0_0402_5%~D HOOK2 RESET#/HOOK6 XDP_DBRESET#
47 HOOK3 DBR#/HOOK7 48
750_0402_1%~D 49 50
@ R1551 1 GND14 GND15 XDP_TDO
13,14,15,16,28 DDR_XDP_SMBDAT 2 0_0402_5%~D 51
SDA TD0
52
@ R1552 1 2 0_0402_5%~D 53 54 XDP_TRST#
13,14,15,16,28 DDR_XDP_SMBCLK
2
SCL TRST# XDP_TDI
55 TCK1 TDI 56
XDP_TCLK 57 58 XDP_TMS
TCK0 TMS
59 GND16 GND17 60
MISC
H_COMP2 AT24 B16 CPU_BCLK# 1 2
COMP2 BCLK# CLK_CPU_BCLK# 19
R1133 0_0402_5%~D
H_COMP1 CLK_CPU_ITP +1.05V_RUN_VTT
CLOCKS
G16 AR30
COMP1 BCLK_ITP CLK_CPU_ITP#
AT30
C H_COMP0 BCLK_ITP# C
AT26
COMP0 CPU_DMI R1136 1 H_THERMTRIP#
E16 2 0_0402_5%~D CLK_CPU_DMI 16 1 2
PEG_CLK CPU_DMI# R1285 56_0402_5%~D +3.3V_RUN
PEG_CLK# D16 1 2 CLK_CPU_DMI# 16
40 CPU_DETECT# CPU_DETECT# AH24 R1137 0_0402_5%~D 1 2 H_CATERR#
SKTOCC# R1232 49.9_0402_1%~D R60
DPLL_REF_SSCLK A18
A17 1 2 1 2 H_PROCHOT# XDP_DBRESET# 2 1
H_CATERR# DPLL_REF_SSCLK# @ R1469 0_0402_5%~D R1233 68_0402_1%~D 1K_0402_5%~D
39 H_CATERR# AK14
CATERR#
THERMAL
1 2 H_CPURST#_R
@ R1234 68_0402_1%~D
D
F6 DDR3_DRAMRST#_CPU 3 1
H_PECI SM_DRAMRST# DDR3_DRAMRST# 13,14
19 H_PECI AT15 PECI
AL1 SM_RCOMP0 Q199
SM_RCOMP[0]
100K_0402_5%~D
SM_RCOMP1 BSS138_SOT23~D
G
AM1
2
SM_RCOMP[1]
1
AN1 SM_RCOMP2 +1.05V_RUN_VTT
SM_RCOMP[2]
R529
49 H_PROCHOT# H_PROCHOT# AN26
PROCHOT# PM_EXTTS# XDP_TMS @ R64
AN15 DDR_HVREF_RST_GATE 40 2 1 51_0402_1%~D
PM_EXT_TS#[0]
0.1U_0402_16V4Z~D
AP15
DDR3
MISC
C1889
1 2 H_THERMTRIP#_R AK15
23 H_THERMTRIP# THERMTRIP#
R1286 XDP_PREQ# @ R1149 2 1 51_0402_1%~D
0_0402_5%~D
XDP_PRDY# 2 XDP_TDO @ R3
place R1286 56ohm near CPU AT28 2 1 51_0402_1%~D
PRDY# XDP_PREQ#
AP27
PREQ#
AN28 XDP_TCLK
H_CPURST# TCK
49 H_CPURST# 1 2 H_CPURST#_R AP26 AP28 XDP_TMS @ R67
RESET_OBS# TMS
PWR MANAGEMENT
1 2 PCH_PLTRST#_R AL14
For ESD concern, please put near CPU
18,32,34,36,39,40 PCH_PLTRST#_EC RSTIN#
1
R1144 1.5K_0402_1%~D
@ R1157 Scan Chain Stuff -> R1153,R1156,R1157
REV1.0
2
0_0402_5%~D
Refer to CRB 1.51 R1143 TYCO_CALPELLA_AUBURNDALE (Default) No stuff -> R1154,R1155
750_0402_1%~D
2
+1.05V_RUN_VTT @ R1155
0_0402_5%~D CPU Only Stuff -> R1153,R1154
1
XDP_TDI_M 1 2
No stuff -> R1154,R1155,R1157
1
@ R1156
R25 0_0402_5%~D
10K_0402_5%~D XDP_TDO_R 1 2 PCH Only Stuff -> R1155,R1156
No stuff -> R1153,R1154,R1157
2
H_COMP2 SM_RCOMP0
H_COMP3 @ R1145
100_0402_1%~D
130_0402_1%~D
24.9_0402_1%~D
12.4K_0402_1%~D
DELL CONFIDENTIAL/PROPRIETARY
1
1
20_0402_1%~D
20_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
1
R1140
R1141
R1142
2
R1235
R1093
R1094
R1095
Title
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Arrandale (2/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 8 of 66
5 4 3 2 1
5 4 3 2 1
JCPUC JCPUD
REV1.0
TYCO_CALPELLA_AUBURNDALE
REV1.0
TYCO_CALPELLA_AUBURNDALE
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Arrandale (3/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 9 of 66
5 4 3 2 1
5 4 3 2 1
CFG0
1
JCPUE @ R1107
3.01K_0402_1%~D
AJ13 PAD~D T186 @
RSVD32 PAD~D T187 @
AJ12
2
RSVD33
AP25 RSVD1
AL25 RSVD2 RSVD34 AH25
AL24 AK26 PAD~D T188 @
RSVD3 RSVD35
AL22 RSVD4
AJ33 AL26 PAD~D T189 @
RSVD5 RSVD36
AG9 AR2
RSVD6 RSVD_NCTF_37
M27
D RSVD7 D
L28
RSVD8 RSVD38
AJ26 PCI-Express Configuration Select
@ T184PAD~D DIMM0_VREF_R J17 AJ27
@ T185PAD~D DIMM1_VREF_R SA_DIMM_VREF RSVD39
H17
SB_DIMM_VREF
G25
RSVD11 1 : Single PEG
G17
RSVD12 CFG0
E31
RSVD13 RSVD_NCTF_40
AP1 0 : Bifurcation enable
E30 AT2 PAD~D T190 @
RSVD14 RSVD_NCTF_41
AT3
RSVD_NCTF_42
AR1
RSVD_NCTF_43
RSVD45 AL28
CFG0 AM30 AL29
8 CFG0 CFG[0] RSVD46
CFG1 AM28 AP30 CFG3
8 CFG1 CFG2 CFG[1] RSVD47
8 CFG2 AP31 CFG[2] RSVD48 AP32
1
CFG3 AL32 AL27
8 CFG3 CFG4 CFG[3] RSVD49
AL30 AT31 @ R1108
8 CFG4 CFG5 CFG[4] RSVD50
AM31 AT32 3.01K_0402_1%~D
8 CFG5 CFG[5] RSVD51
CFG6 AN29 AP33
8 CFG6 CFG7 CFG[6] RSVD52
8 CFG7 AM32 AR33
2
CFG8 CFG[7] RSVD53
8 CFG8 AK32 CFG[8] RSVD_NCTF_54 AT33
CFG9 AK31 AT34
RESERVED
8 CFG9 CFG10 CFG[9] RSVD_NCTF_55
8 CFG10 AK28 CFG[10] RSVD_NCTF_56 AP35
CFG11 AJ28 AR35
8 CFG11 CFG12 CFG[11] RSVD_NCTF_57
@ T18 PAD~D AN30 AR32
@ T19 PAD~D CFG13 CFG[12] RSVD58
AN32 CFG[13]
@ T20 PAD~D CFG14 AJ32 PCI-Express Static Lane Reversal
@ T21 PAD~D CFG15 CFG[14]
AJ29 E15
@ T22 PAD~D CFG16 CFG[15] RSVD_TP_59
AJ30 F15
CFG17 CFG[16] RSVD_TP_60
C
@ T23 PAD~D AK30
CFG[17] KEY
A2 1 : Normal Operation C
@ T24 PAD~D CFG18 H16 D15 CFG3
RSVD_TP_86 RSVD62
RSVD63 C15 0 : Lane Number Reversed
RSVD64 AJ15
RSVD65 AH15 15->0, 14->1 ...
B19 RSVD15
A19
RSVD16
H_RSVD17 A20
H_RSVD18 RSVD17
B20 RSVD18
RSVD_TP_66 AA5
U9 AA4
RSVD19 RSVD_TP_67
1
1
0_0402_5%~D
0_0402_5%~D
T9 R8
RSVD20 RSVD_TP_68
@ R830
@ R831
AD3
RSVD_TP_69 CFG4
AC9 AD2
RSVD21 RSVD_TP_70
AB9 AA2
RSVD22 RSVD_TP_71
1
AA1
2
RSVD_TP_72 @R1109
@ R1109
R9
RSVD_TP_73 3.3K_0402_1%~D
AG7
RSVD_TP_74
C1 AE3
RSVD_NCTF_23 RSVD_TP_75
A3
2
RSVD_NCTF_24
V4
RSVD_TP_76
V5
RSVD_TP_77
N2
RSVD_TP_78
J29 AD5
RSVD26 RSVD_TP_79
J28 RSVD27 RSVD_TP_80 AD7
RSVD_TP_81 W3
A34 RSVD_NCTF_28 RSVD_TP_82 W2
A33 RSVD_NCTF_29 RSVD_TP_83 N3 Display Port Presence
RSVD_TP_84 AE5
C35 RSVD_NCTF_30 RSVD_TP_85 AD9
B B
B35
RSVD_NCTF_31 1 : Disabled; No Physical Display Port
CFG4 attached to Embedded Display Port
AP34
VSS
0 : Enabled; An external Display Port device is
REV1.0 connected to the Embedded Display Port
TYCO_CALPELLA_AUBURNDALE
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Arrandale (4/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 10 of 66
5 4 3 2 1
5 4 3 2 1
JCPUF
+VCC_CORE
+VCC_CORE +1.05V_RUN_VTT
48A 18A
AG35 VCC1 VTT0_1 AH14
AG34 VCC2 VTT0_2 AH12 1 1 1 1 1
4 1 AG33 VCC3 VTT0_3 AH11
AG32 AH10 C1196 C1204 C1197 C1198 C1199
+ C1872 VCC4 VTT0_4 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D
AG31 J14
1000U_1212_2V-Q~D VCC5 VTT0_5 2 2 2 2 2
AG30 J13
VCC6 VTT0_6
AG29 H14
D 3 2 VCC7 VTT0_7 D
AG28 H12
VCC8 VTT0_8
AG27 G14
VCC9 VTT0_9
AG26 G13 1
VCC10 VTT0_10
AF35 G12
VCC11 VTT0_11 C1200
AF34 G11
VCC12 VTT0_12 10U_0805_4VAM~D
AF33 F14
VCC13 VTT0_13 2
AF32 F13
VCC14 VTT0_14
AF31 F12
VCC15 VTT0_15
AF30 F11
VCC16 VTT0_16
AF29 E14
VCC17 VTT0_17
AF28 E12
VCC18 VTT0_18
AF27 D14
VCC19 VTT0_19
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
AF26 VCC20 VTT0_20 D13
C1087
C1085
AD33 C14 C1103
VCC23 VTT0_23 22U_0805_6.3V6M~D
AD32 VCC24 VTT0_24 C13
AD31 C12 2 2 2
VCC25 VTT0_25
AD30 C11
VCC26 VTT0_26
AD29 B14
VCC27 VTT0_27
AD28 VCC28 VTT0_28 B12
AD27 A14
VCC29 VTT0_29
AD26 VCC30 VTT0_30 A13
AC35 VCC31 VTT0_31 A12
AC34 VCC32 VTT0_32 A11
AC33 VCC33
+VCC_CORE AC32 +1.05V_RUN_VTT
VCC34
AC31 VCC35
AC30 AF10
VCC36 VTT0_33
22U_0805_6.3V6M~D
AC29 AE10
VCC37 VTT0_34
1 1 1 1 1 1 AC28 AC10 1 1
VCC38 VTT0_35
C1082
AC27 AB10 C1083
C C44 C45 C47 C48 C49 VCC39 VTT0_36 22U_0805_6.3V6M~D C
C46 AC26 Y10
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 22U_0805_6.3V6M~D 22U_0805_6.3V6M~D VCC40 VTT0_37
AA35 VCC41 VTT0_38 W10
2 2 2 2 2 2 2 2
AA34 VCC42 VTT0_39 U10
AA33 VCC43 VTT0_40 T10
AA32 VCC44 VTT0_41 J12
AA31 VCC45 VTT0_42 J11
AA30 J16
VCC46 VTT0_43
AA29 VCC47 VTT0_44 J15
AA28 VCC48
1 1 1 1 1 1 AA27 VCC49
AA26 VCC50
C50 C51 C52 C53 C54 C55 Y35
22U_0805_6.3V6M~D 22U_0805_6.3V6M~D 22U_0805_6.3V6M~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC51
Y34
2 2 2 2 2 2 VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
1 1 Y27
VCC59
Y26
C56 C57 VCC60 H_PSI#
V35 AN33 H_PSI# 49
10U_0805_4VAM~D 10U_0805_4VAM~D VCC61 PSI#
V34
2 2 VCC62
POWER
V33
VCC63 VID0
V32 AK35 VID0 49
VCC64 VID[0] VID1
V31 AK33 VID1 49
VCC65 VID[1] VID2
V30 VCC66 VID[2] AK34 VID2 49
V29 AL35 VID3
VCC67 VID[3] VID3 49
CPU VIDS
V28 AL33 VID4
VCC68 VID[4] VID5 VID4 49
V27 VCC69 VID[5] AM33 VID5 49
V26 AM35 VID6
VCC70 VID[6] H_DPRSLPVR_R VID6 49
U35 VCC71 PROC_DPRSLPVR AM34 1 2 H_DPRSLPVR 49
B R1115 0_0402_5%~D B
U34
VCC72
U33
VCC73
U32
VCC74
VTT_SELECT = low, 1.1V
U31 G15
VCC75 VTT_SELECT
U30
VCC76
VTT_SELECT = high, 1.05V
U29
VCC77
U28
VCC78
U27
VCC79 +VCC_CORE
U26
VCC80
R35
VCC81
R34
VCC82
1
R33
VCC83 IMVP_IMON R1116
R32 AN35 IMVP_IMON 23,49
VCC84 ISENSE
R31 100_0402_1%~D
VCC85
R30
VCC86
R29
2
VCC87 VCCSENSE
SENSE LINES
1
P34 B15 VTT_SENSE VTT_SENSE 48 Place R1116 and R1117 near CPU
VCC92 VTT_SENSE R1236
P33 A15
VCC93 VSS_SENSE_VTT
1 1 P32
VCC94 100_0402_1%~D Route VCCSENSE and VSSSENSE trace at
P31
+ @ C60 + @ C61 VCC95 27.4 ohms, 7 mils spacing
P30
2
470U_D2T_2VM~D 470U_D2T_2VM~D VCC96
P29
VCC97
P28
2 3 2 3 VCC98
P27
VCC99
P26
VCC100
A A
JCPUG
22A AT21 VAXG1
AT19 VAXG2 VAXG_SENSE AR22
SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22
AT16 VAXG4
AR21 VAXG5
AR19 JCPUH
VAXG6
AR18
VAXG7
AR16 AM22 AT20 AE34
VAXG8 GFX_VID[0] VSS1 VSS81
AP21 AP22 AT17 AE33
D VAXG9 GFX_VID[1] VSS2 VSS82 D
GRAPHICS VIDs
AP19 AN22 AR31 AE32
VAXG10 GFX_VID[2] VSS3 VSS83
AP18 AP23 AR28 AE31
VAXG11 GFX_VID[3] VSS4 VSS84
AP16 AM23 AR26 AE30
VAXG12 GFX_VID[4] VSS5 VSS85
AN21 AP24 AR24 AE29
VAXG13 GFX_VID[5] VSS6 VSS86
GRAPHICS
AN19 AN24 AR23 AE28
VAXG14 GFX_VID[6] VSS7 VSS87
AN18 AR20 AE27
VAXG15 VSS8 VSS88
AN16 AR17 AE26
VAXG16 R1465 VSS9 VSS89
AM21 AR25 AR15 AE6
VAXG17 GFX_VR_EN 1K_0402_5%~D VSS10 VSS90
AM19 AT25 AR12 AD10
VAXG18 GFX_DPRSLPVR VSS11 VSS91
AM18 AM24 1 2 AR9 AC8
VAXG19 GFX_IMON VSS12 VSS92
AM16 AR6 AC4
VAXG20 VSS13 VSS93
AL21 AR3 AC2
VAXG21 VSS14 VSS94
AL19 VAXG22 AP20 VSS15 VSS95 AB35
AL18 AP17 AB34
AL16
VAXG23 3A AP13
VSS16 VSS96
AB33
VAXG24 VSS17 VSS97
AK21 VAXG25 VDDQ1 AJ1 +1.5V_CPU_VDDQ AP10 VSS18 VSS98 AB32
AK19 VAXG26 VDDQ2 AF1 AP7 VSS19 VSS99 AB31
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AK18 AE7 AP4 AB30
- 1.5V RAILS
VAXG27 VDDQ3 1 VSS20 VSS100
AK16 AE4 1 1 1 1 1 AP2 AB29
VAXG28 VDDQ4 + C1165 VSS21 VSS101
AJ21 AC1 AN34 AB28
VAXG29 VDDQ5 VSS22 VSS102
C1096
C1097
C1098
C1099
C1100
AJ19 AB7 330U_D2_2VM_R6M~D AN31 AB27
VAXG30 VDDQ6 VSS23 VSS103
AJ18 AB4 AN23 AB26
VAXG31 VDDQ7 2 2 2 2 2 2 VSS24 VSS104
AJ16 VAXG32 VDDQ8 Y1 AN20 VSS25 VSS105 AB6
AH21 VAXG33 VDDQ9 W7 AN17 VSS26 VSS106 AA10
AH19 W4 AM29 Y8
POWER
VAXG34 VDDQ10 VSS27 VSS107
AH18 VAXG35 VDDQ11 U1 AM27 VSS28 VSS108 Y4
AH16 VAXG36 VDDQ12 T7 AM25 VSS29 VSS109 Y2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
VDDQ13 T4 AM20 VSS30 VSS110 W35
C1101
C1102
P1 1 1 AM17 W34
VDDQ14 VSS31 VSS111
N7 AM14 W33
+1.05V_RUN_VTT VDDQ15 VSS32 VSS112
N4 AM11 W32
VDDQ16 VSS33 VSS113
DDR3
L1 AM8 W31
C VDDQ17 2 2 VSS34 VSS114 C
J24 H1 AM5 W30
VTT1_45 VDDQ18 VSS35 VSS115
FDI
J23 VTT1_46 AM2 VSS36 VSS116 W29
H25 AL34 W28
VTT1_47
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
VTT0_59 P10 +1.05V_RUN_VTT AL20 VSS40 VSS120 W6
10U_0805_4VAM~D
10U_0805_4VAM~D
N10 AL17 V10
VTT0_60 VSS41 VSS121
VTT0_61 L10 1 1 AL12 VSS42 VSS122 U8
C1107
C1108
VTT0_62 K10 AL9 VSS43 VSS123 U4
AL6 VSS44 VSS124 U2
AL3 VSS45 VSS125 T35
2 2 AK29 T34
VSS46 VSS126
AK27 T33
VSS47 VSS127
1.1V
J22 AK25 T32
VTT1_63 VSS48 VSS128
+1.05V_RUN_VTT K26 J20 AK20 T31
VTT1_48 VTT1_64 VSS49 VSS129
J27 J18 +1.05V_RUN_VTT AK17 T30
VTT1_49 VTT1_65 VSS50 VSS130
PEG & DMI
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
J25 H20 AJ23 T28
VTT1_51 VTT1_67 VSS52 VSS132
C1111
C1112
H27 H19 1 1 AJ20 T27
VTT1_52 VTT1_68 VSS53 VSS133
G28 AJ17 T26
VTT1_53 VSS54 VSS134
G27 AJ14 T6
VTT1_54 VSS55 VSS135
G26 AJ11 R10
F26
VTT1_55 600mA 2 2 AJ8
VSS56 VSS136
P8
VTT1_56 VSS57 VSS137
E26 L26 AJ5 P4
VTT1_57 VCCPLL1 VSS58 VSS138
1.8V
E25 L27 AJ2 P2
VTT1_58 VCCPLL2 VSS59 VSS139
M26 +1.8V_RUN AH35 N35
VCCPLL3 VSS60 VSS140
AH34 VSS61 VSS141 N34
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2.2U_0603_6.3V6K~D
4.7U_0603_6.3V6M~D
22U_0805_6.3V6M~D
1 1 1 1 1 AH33 VSS62 VSS142 N33
C1117
AH32 VSS63 VSS143 N32
C1115
C1116
C67
C65
AH31 VSS64 VSS144 N31
AH30 VSS65 VSS145 N30
2 2 2 2 2
B REV1.0 AH29
AH28
VSS66
VSS67
VSS146
VSS147
N29
N28 B
TYCO_CALPELLA_AUBURNDALE AH27 N27
VSS68 VSS148
AH26 N26
VSS69 VSS149
AH20 N6
VSS70 VSS150
AH17 M10
VSS71 VSS151
AH13 L35
+1.5V_CPU_VDDQ Source AH9
VSS72 VSS152
L32
VSS73 VSS153
AH6 L29
+1.5V_MEM Q200 +1.5V_CPU_VDDQ C1881 VSS74 VSS154
2 1 0.1U_0402_10V7K~D AH3 L8
+3.3V_ALW2 +15V_ALW AO4728L 1N_SOIC-8~D VSS75 VSS155
AG10 L5
VSS76 VSS156
8 1 AF8
VSS77 VSS157
L2
7 2 C1882 2 1 0.1U_0402_10V7K~D AF4 K34
VSS78 VSS158
1
20K_0402_5%~D
6 3 1 AF2
VSS79 VSS159
K33
10U_0805_10V4Z~D
5 AE35 K30
VSS80 VSS160
1
C1875
R1498
100K_0402_5%~D 2
REV1.0
2
@ C1884 2 1 0.1U_0402_10V7K~D
RUN_ON_CPU1.5VS3 TYCO_CALPELLA_AUBURNDALE
2
@ PJP906
Q201B 1 1 2
RUN_ON_CPU1.5VS3# 5 DMN66D0LDW-7_SOT363-6~D
C1878 PAD-OPEN 4x4m
4700P_0402_25V7K~D +1.5V_CPU_VDDQ +1.5V_MEM
4
2 @ PJP907
6
1 2
A R1501 A
40 CPU1.5V_S3_GATE 1 2
0_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Arrandale (6/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 12 of 66
5 4 3 2 1
5 4 3 2 1
R87
0_0402_5%~D
1 2 +1.5V_MEM +1.5V_MEM
+V_DDR_REF
JDIMMA
DIMM0_VREF 1 2
9 DDR_A_DQS#[0..7] VREF_DQ VSS
3 4 DDR_A_D4
VSS DQ4 +1.5V_MEM
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_A_D0 5 6 DDR_A_D5
9 DDR_A_D[0..63] DDR_A_D1 DQ0 DQ5 R1509
7 DQ1 VSS 8
1 1 9 10 DDR_A_DQS#0 DDR3_DRAMRST# 2 1
9 DDR_A_DM[0..7] DDR_A_DM0 VSS DQS0# DDR_A_DQS0
11 DM0 DQS0 12
C1119
C1120
9 DDR_A_DQS[0..7] Populate R87 for Intel DDR3 13 VSS VSS 14 1K_0402_5%~D
DDR_A_D2 15 16 DDR_A_D6
VREFDQ multiple methods M1 2 2 DDR_A_D3 17
DQ2 DQ6
18 DDR_A_D7
9 DDR_A_MA[0..15] DQ3 DQ7
19 20
DDR_A_D8 VSS VSS DDR_A_D12
21 22
D DDR_A_D9 DQ8 DQ12 DDR_A_D13 D
23 24
DQ9 DQ13
25 26
DDR_A_DQS#1 VSS VSS DDR_A_DM1
27 28
DDR_A_DQS1 DQS1# DM1 DDR3_DRAMRST#
29 30 DDR3_DRAMRST# 8,14
DQS1 RESET#
Layout Note: Note: 31
VSS VSS
32
DDR_A_D10 33 34 DDR_A_D14
Place near JDIMMA Check voltage tolerance of DDR_A_D11 35
DQ10 DQ14
36 DDR_A_D15
DQ11 DQ15
VREF_DQ at the DIMM socket 37
VSS VSS
38
DDR_A_D16 39 40 DDR_A_D20
DDR_A_D17 DQ16 DQ20 DDR_A_D21
41 42
DQ17 DQ21
43 44
DDR_A_DQS#2 VSS VSS DDR_A_DM2
45 46
+1.5V_MEM DDR_A_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_A_D22
DDR_A_D18 VSS DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D DDR_A_D28
55 VSS DQ28 56
1 1 1 1 DDR_A_D24 57 58 DDR_A_D29
DQ24 DQ29
C1121
C1122
C1123
C1124
DDR_A_D25 59 60
DQ25 VSS DDR_A_DQS#3
61 62
DDR_A_DM3 VSS DQS3# DDR_A_DQS3
63 DM3 DQS3 64
2 2 2 2 65 66
DDR_A_D26 VSS VSS DDR_A_D30
67 DQ26 DQ30 68
DDR_A_D27 69 70 DDR_A_D31
DQ27 DQ31
71 VSS VSS 72
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
9 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 9
75 76
VDD VDD DDR_A_MA15
77 78
+1.5V_MEM DDR_A_BS2 NC A15 DDR_A_MA14
9 DDR_A_BS2 79 80
BA2 A14
81 82
C DDR_A_MA12 VDD VDD DDR_A_MA11 C
83 84
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
87 VDD VDD 88
DDR_A_MA8 89 90 DDR_A_MA6
A8 A6
330U_SX_2VY~D
1 DDR_A_MA5 91 92 DDR_A_MA4
A5 A4
1 1 1 1 1 1 93 VDD VDD 94
C1126
C1127
C1128
C1129
C1130
C1131
C1125
+ DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
99 VDD VDD 100
2 2 2 2 2 2 2 M_CLK_DDR0 101 102 M_CLK_DDR1
9 M_CLK_DDR0 M_CLK_DDR#0 CK0 CK1 M_CLK_DDR#1 M_CLK_DDR1 9
9 M_CLK_DDR#0 103 CK0# CK1# 104 M_CLK_DDR#1 9
105 106
DDR_A_MA10 VDD VDD DDR_A_BS1
107 108 DDR_A_BS1 9
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
9 DDR_A_BS0 109 110
BA0 RAS# DDR_A_RAS# 9
111 112
DDR_A_WE# VDD VDD DDR_CS0_DIMMA#
9 DDR_A_WE# 113 114 DDR_CS0_DIMMA# 9
DDR_A_CAS# WE# S0# M_ODT0
9 DDR_A_CAS# 115 116 M_ODT0 9
CAS# ODT0
117 118
DDR_A_MA13 VDD VDD M_ODT1
119 120 M_ODT1 9
DDR_CS1_DIMMA# A13 ODT1
Layout Note: 9 DDR_CS1_DIMMA# 121
S1# NC
122
123 124
Place near JDIMMA.203,204 125
VDD VDD
126
TEST VREF_CA +V_DDR_REF
127 128
VSS VSS
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_A_D32 129 130 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
131 132
DQ33 DQ37
133 134 1 1
DDR_A_DQS#4 VSS VSS DDR_A_DM4
135 DQS4# DM4 136
C1132
C1133
DDR_A_DQS4 137 138
DQS4 VSS DDR_A_D38
139 VSS DQ38 140
+0.75V_DDR_VTT DDR_A_D34 141 142 DDR_A_D39 2 2
DDR_A_D35 DQ34 DQ39
143 DQ35 VSS 144
145 146 DDR_A_D44
B DDR_A_D40 VSS DQ44 DDR_A_D45 B
147 148
DDR_A_D41 DQ40 DQ45
149 150
DQ41 VSS
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
C1135
C1136
C1137
C1138
2.2U_0603_6.3V6K~D
C1142
+0.75V_DDR_VTT
205 GND1 GND2 206
A 2 2 A
FOX_AS0A626-U4SN-7F
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT1
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 13 of 66
5 4 3 2 1
5 4 3 2 1
R88
0_0402_5%~D
1 2 +1.5V_MEM +1.5V_MEM
+V_DDR_REF
JDIMMB
DIMM1_VREF 1 2
VREF_DQ VSS DDR_B_D4
3 VSS DQ4 4
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5
7 DQ1 VSS 8
1 1 9 10 DDR_B_DQS#0
9 DDR_B_DQS#[0..7] DDR_B_DM0 VSS DQS0# DDR_B_DQS0
11 DM0 DQS0 12
C1143
C1144
9 DDR_B_D[0..63] Populate R88 for Intel DDR3 13 VSS VSS 14
DDR_B_D2 15 16 DDR_B_D6
VREFDQ multiple methods M1 2 2 DDR_B_D3 17
DQ2 DQ6
18 DDR_B_D7
9 DDR_B_DM[0..7] DQ3 DQ7
19 20
DDR_B_D8 VSS VSS DDR_B_D12
9 DDR_B_DQS[0..7] 21 22
D DDR_B_D9 DQ8 DQ12 DDR_B_D13 D
23 24
DQ9 DQ13
9 DDR_B_MA[0..15] 25 26
DDR_B_DQS#1 VSS VSS DDR_B_DM1
27 28
DDR_B_DQS1 DQS1# DM1 DDR3_DRAMRST#
29 30 DDR3_DRAMRST# 8,13
DQS1 RESET#
31 32
DDR_B_D10 VSS VSS DDR_B_D14
33 34
DDR_B_D11 DQ10 DQ14 DDR_B_D15
Note: 35
DQ11 DQ15
36
37 38
Check voltage tolerance of DDR_B_D16 39
VSS VSS
40 DDR_B_D20
DQ16 DQ20
VREF_DQ at the DIMM socket DDR_B_D17 41
DQ17 DQ21
42 DDR_B_D21
43 44
DDR_B_DQS#2 VSS VSS DDR_B_DM2
45 46
DDR_B_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_B_D22
DDR_B_D18 VSS DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS DDR_B_D28
Layout Note: 55 VSS DQ28 56
DDR_B_D24 57 58 DDR_B_D29
Place near JDIMMB DDR_B_D25 59
DQ24 DQ29
60
DQ25 VSS DDR_B_DQS#3
61 62
DDR_B_DM3 VSS DQS3# DDR_B_DQS3
63 DM3 DQS3 64
65 66
DDR_B_D26 VSS VSS DDR_B_D30
67 DQ26 DQ30 68
DDR_B_D27 69 70 DDR_B_D31
DQ27 DQ31
71 VSS VSS 72
+1.5V_MEM
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
9 DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB 9
75 76
VDD VDD DDR_B_MA15
77 78
NC A15
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_B_BS2 79 80 DDR_B_MA14
9 DDR_B_BS2 BA2 A14
1 1 1 1 81 82
VDD VDD
C1145
C1146
C1147
C1148
C DDR_B_MA12 DDR_B_MA11 C
83 84
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
87 VDD VDD 88
2 2 2 2 DDR_B_MA8 DDR_B_MA6
89 A8 A6 90
DDR_B_MA5 91 92 DDR_B_MA4
A5 A4
93 VDD VDD 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD VDD 100
M_CLK_DDR2 101 102 M_CLK_DDR3
9 M_CLK_DDR2 M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3 M_CLK_DDR3 9
9 M_CLK_DDR#2 103 CK0# CK1# 104 M_CLK_DDR#3 9
+1.5V_MEM 105 106
DDR_B_MA10 VDD VDD DDR_B_BS1
107 108 DDR_B_BS1 9
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
9 DDR_B_BS0 109 110
BA0 RAS# DDR_B_RAS# 9
111 112
VDD VDD
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1 117 118
DDR_B_MA13 VDD VDD M_ODT3
1 1 1 1 1 1 119 120 M_ODT3 9
A13 ODT1
C1150
C1151
C1152
C1153
C1154
C1155
C1149
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_B_D32 129 130 DDR_B_D36
DDR_B_D33 DQ32 DQ36 DDR_B_D37
131 132
DQ33 DQ37
133 134 1 1
DDR_B_DQS#4 VSS VSS DDR_B_DM4
135 DQS4# DM4 136
C1156
C1157
DDR_B_DQS4 137 138
DQS4 VSS DDR_B_D38
139 VSS DQ38 140
DDR_B_D34 141 142 DDR_B_D39 2 2
DDR_B_D35 DQ34 DQ39
143 DQ35 VSS 144
145 146 DDR_B_D44
B DDR_B_D40 VSS DQ44 DDR_B_D45 B
147 148
DDR_B_D41 DQ40 DQ45
Layout Note: 149
DQ41 VSS
150
151 152 DDR_B_DQS#5
Place near JDIMMB.203,204 DDR_B_DM5 153
VSS DQS5#
154 DDR_B_DQS5
DM5 DQS5
155 156
DDR_B_D42 VSS VSS DDR_B_D46
157 158
DDR_B_D43 DQ42 DQ46 DDR_B_D47
159 160
DQ43 DQ47
161 162
DDR_B_D48 VSS VSS DDR_B_D52
163 164
DDR_B_D49 DQ48 DQ52 DDR_B_D53
165 166
DQ49 DQ53
167 168
+0.75V_DDR_VTT DDR_B_DQS#6 VSS VSS DDR_B_DM6
169 170
DDR_B_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_B_D54
173 174
DDR_B_D50 VSS DQ54 DDR_B_D55
175 176
DDR_B_D51 DQ50 DQ55
177 DQ51 VSS 178
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C1159
C1160
C1161
0.1U_0402_16V4Z~D
2.2U_0603_6.3V6K~D
R1184
10K_0402_5%~D
10K_0402_5%~D
R1185
C1163
A A
FOX_AS0A626-U8SN-7F
2
2 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT2
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 14 of 66
5 4 3 2 1
5 4 3 2 1
0.1U_0402_16V4Z~D
USB_OC3# @ R102 1 2 33_0402_5%~D XDP_FN3 1 7 8
+3.3V_RUN 18 USB_OC3# USB_OC4# XDP_FN4 XDP_FN0 GND2 GND3 XDP_FN8
@ R103 1 2 33_0402_5%~D @ 9 10
18 USB_OC4# OBSDATA_A0 OBSDATA_C0
C1375
ME_CLR1 TPM setting USB_OC5# @ R104 1 2 33_0402_5%~D XDP_FN5 XDP_FN1 11 12 XDP_FN9
18 USB_OC5# USB_OC6# XDP_FN6 OBSDATA_A1 OBSDATA_C1
@ R105 1 2 33_0402_5%~D 13 14
18 USB_OC6# GND4 GND5
1
USB_OC7# @ R106 33_0402_5%~D XDP_FN7 2 XDP_FN2 XDP_FN10
Shunt Clear ME RTC Registers 18 USB_OC7# PCMCLK_REQ#
1 2
XDP_FN8 XDP_FN3
15 OBSDATA_A2 OBSDATA_C2 16
XDP_FN11
@R62
@ R62 @ R107 1 2 33_0402_5%~D 17 18
16,34 PCMCLK_REQ# LANCLK_REQ# XDP_FN9 OBSDATA_A3 OBSDATA_C3
Open Keep ME RTC Registers 10K_0402_5%~D @ R108 1 2 33_0402_5%~D 19 20
16,30 LANCLK_REQ# HDD_DET#_R XDP_FN10 GND6 GND7
@ R109 1 2 33_0402_5%~D 21 22
GPIO19 @ R110 33_0402_5%~D XDP_FN11 OBSFN_B0 OBSFN_D0
1 2 23 24
2
CONTACTLESS_DET# @ R111 33_0402_5%~D XDP_FN12 OBSFN_B1 OBSFN_D1
19,31 CONTACTLESS_DET# 1 2 25
GND8 GND9
26
D +RTC_CELL GPIO37 @ R112 1 2 33_0402_5%~D XDP_FN13 XDP_FN4 27 28 XDP_FN12 D
PCH_AZ_SYNC 19 GPIO37 EN_ESATA_RPTR# XDP_FN14 XDP_FN5 OBSDATA_B0 OBSDATA_D0 XDP_FN13
@ R113 1 2 33_0402_5%~D 29 30
19,37 EN_ESATA_RPTR# TEMP_ALERT# @ R114 33_0402_5%~D XDP_FN15 OBSDATA_B1 OBSDATA_D1
19,39 TEMP_ALERT# 1 2 31
GND10 GND11
32
1
1
TOUCH_SCREEN_DET# @ R115 1 2 33_0402_5%~D XDP_FN16 XDP_FN6 33 34 XDP_FN14
19 TOUCH_SCREEN_DET# SIO_EXT_SCI#_R XDP_FN17 XDP_FN7 OBSDATA_B2 OBSDATA_D2 XDP_FN15
R217 @R120
@ R120 @ R116 1 2 33_0402_5%~D 35 36
19 SIO_EXT_SCI#_R OBSDATA_B3 OBSDATA_D3
330K_0402_1%~D 100K_0402_5%~D 37 38
RESET_OUT# GND12 GND13 +3.3V_ALW_PCH
17,40 RESET_OUT# 39 40
PWRGOOD/HOOK0 ITPCLK/HOOK4
8,17 SIO_PWRBTN#_R 1 2 PCH_PWRBTN#_XDP 41 42
2
2
PCH_INTVRMEN @ R69 0_0402_5%~D HOOK1 ITPCLK#/HOOK5
43 44
VCC_OBS_AB VCC_OBS_CD PLTRST1#_XDP
45 46
HOOK2 RESET#/HOOK6 XDP_DBRESET#
47 48
HOOK3 DBR#/HOOK7 XDP_DBRESET# 8,17
INTVRMEN- Integrated SUS On Die PLL VR is supplied by C296 49
GND14 GND15
50
2 1 PCH_RTCX1 @ R1553 1 2 0_0402_5%~D 51 52 PCH_JTAG_TDO
1.1V VRM Enable 1.5V when sampled high, 1.8 V 8,13,14,16,28 DDR_XDP_SMBDAT
@ R1554 1 2 0_0402_5%~D 53
SDA TD0
54 PCH_JTAG_RST#_R 1 2 PCH_JTAG_RST#
8,13,14,16,28 DDR_XDP_SMBCLK SCL TRST#
High - Enable Internal VRs when sampled low 12P_0402_50V8J~D 55 TCK1 TDI 56 PCH_JTAG_TDI @ R117 0_0402_5%~D
1
PCH_JTAG_TCK 57 58 PCH_JTAG_TMS
TCK0 TMS
3
R222 59 60
GND16 GND17
NC NC
Y1 10M_0402_5%~D
32.768K_12.5PF_Q13MC30610018~D SAMTE_BSH-030-01-L-D-A
U73A
2
R223 REV1.0
C297 0_0402_5%~D B13 D33 LPC_LAD0
RTCX1 FWH0 / LAD0 LPC_LAD0 31,32,39,40
2 1 1 2 PCH_RTCX2 D13 B33 LPC_LAD1
RTCX2 FWH1 / LAD1 LPC_LAD1 31,32,39,40
C32 LPC_LAD2
FWH2 / LAD2 LPC_LAD2 31,32,39,40
12P_0402_50V8J~D A32 LPC_LAD3 LPC_LAD3 31,32,39,40 @ R118
PCH_RTCRST# FWH3 / LAD3 1K_0402_5%~D
+RTC_CELL 1 2 C14 RTCRST#
R224 20K_0402_1%~D C34 LPC_LFRAME# PLTRST1#_XDP 1 2
SRTCRST# FWH4 / LFRAME# LPC_LFRAME# 31,32,39,40 PLTRST_XDP# 18
1 2 D17 SRTCRST#
R225 20K_0402_5%~D A34 LPC_LDRQ0#
RTC
LPC
INTRUDER# LDRQ0# LPC_LDRQ1# LPC_LDRQ0# 39
1 2 A16
INTRUDER# LDRQ1# / GPIO23
F34
R226 1M_0402_5%~D LPC_LDRQ1# 39
2 1 PCH_INTVRMEN A14 AB9 IRQ_SERIRQ +3.3V_RUN
C INTVRMEN SERIRQ IRQ_SERIRQ 31,32,39,40 C
@ C300 R265
27P_0402_50V8J~D R236 10K_0402_5%~D
1 2 1 2 33_0402_5%~D IRQ_SERIRQ 2 1
1 2 1 2 PCH_AZ_BITCLK
37 PCH_AZ_MDC_BITCLK 1 2 A30 HDA_BCLK
SATA0RXN AK7 PSATA_PRX_DTX_N0_C 28
1 2 PCH_AZ_SYNC D29 AK6
37 PCH_AZ_MDC_SYNC HDA_SYNC SATA0RXP PSATA_PRX_DTX_P0_C 28
@ @ R238 33_0402_5%~D
SATA0TXN
AK11
PSATA_PTX_DRX_N0_C 28 HDD
ME1 SHORT PADS~D CMOS1 SHORT PADS~D P1 AK9
29 SPKR SPKR SATA0TXP PSATA_PTX_DRX_P0_C 28
1 2 1 2
C298 1U_0402_6.3V6K~D C299 1U_0402_6.3V6K~D 1 2 PCH_AZ_RST# C30
37 PCH_AZ_MDC_RST# HDA_RST#
CMOS place near DIMM R240 33_0402_5%~D AH6
SATA1RXN SATA_ODD_PRX_DTX_N1_C 28
AH5 SATA_ODD_PRX_DTX_P1_C 28
PCH_AZ_CODEC_SDIN0 SATA1RXP
+3.3V_RUN 29 PCH_AZ_CODEC_SDIN0 G30
HDA_SDIN0 SATA1TXN
AH9
SATA_ODD_PTX_DRX_N1_C 28 ODD
AH8
PCH_AZ_MDC_SDIN1 SATA1TXP SATA_ODD_PTX_DRX_P1_C 28
37 PCH_AZ_MDC_SDIN1 F30
HDA_SDIN1
AF11
ME_FWP SATA2RXN
1 2 E32 AF9
IHDA
R1558 10K_0402_5%~D HDA_SDIN2 SATA2RXP
AF7
SATA2TXN
F32 AF6
HDA_SDIN3 SATA2TXP
SATA
R239 33_0402_5%~D HDA_DOCK_EN# / GPIO33
AD9 ESATA_PRX_DTX_N4_C 37
SATA4RXN
1
2 JTAG_TCK SATA5RXN
SATA5RXP AD1 SATA_PRX_DKTX_P5_C 38
B PCH_JTAG_TMS B
R807 2 1 200_0402_5%~D K3
JTAG_TMS SATA5TXN
AB3
SATA_PTX_DKRX_N5_C 38 DOCKED
AB1
R805 2 PCH_JTAG_TDI SATA5TXP SATA_PTX_DKRX_P5_C 38
1 200_0402_5%~D K1
JTAG_TDI
JTAG
R806 2 1 200_0402_5%~D PCH_JTAG_TDO J2 AF16 +1.05V_RUN
JTAG_TDO SATAICOMPO
PCH_JTAG_RST# SATA_COMP
200 MIL SO8 J4
TRST# SATAICOMPI
AF15 1
R1201
2
37.4_0402_1%~D
1
1
100_0402_5%~D
100_0402_5%~D
100_0402_5%~D
R1282
R1315
C328
For iAMT 1 2 PCH_SPI_CLK BA2
SPI_CLK
1
1
R298 0.1U_0402_16V4Z~D PCH_SPI_CS0# AV3
2
PCH_SPI_CS0# 1 8
2
2
/CS VCC PCH_SPI_DO HDD_DET#_R
AY1 SPI_MOSI SATA0GP / GPIO21 Y9 1 2 HDD_DET# 28
PCH_SPI_DIN 2 7 R131 0_0402_5%~D
SPI
DO /HOLD PCH_SPI_DIN 1 2 PCH_SPI_DIN_R AV1 SPI_MISO SATA1GP / GPIO19 V1 GPIO19 2 1 +3.3V_RUN
SPI_WP#_SEL 1 2 3 6 PCH_SPI_CLK R1247 33_0402_5%~D R58 10K_0402_5%~D
@R1246
@ R1246 0_0402_5%~D /WP CLK
4 5 PCH_SPI_DO IBEXPEAK-M_FCBGA1071~D
GND DIO +3.3V_RUN
SPI_WP#_SEL 39
PCH JTAG Enable PCH JTAG Disable Production @R264
@ R264
W25Q64BVSSIG_SO8~D 1K_0402_5%~D
+3.3V_M SPKR 2 1
C1205 PCH Pin Ref. ES1 ES2 ES1 ES2 All
1 2
R806 No Stuff 200 ohm No Stuff No Stuff 200 ohm No Reboot Strap
1
A 3.3K_0402_5%~D SPKR A
32Mb Flash ROM R1238 R807 200 ohm 200 ohm No Stuff No Stuff 200 ohm High = No Reboot
U13 3.3K_0402_5%~D TMS
2
PCH_SPI_CS1# 1 8 R1281 100 ohm 100 ohm No Stuff No Stuff 100 ohm
/CS VCC
DELL CONFIDENTIAL/PROPRIETARY
2
PCH_SPI_DIN 2 7 R805 200 ohm 200 ohm 20K ohm No Stuff 200 ohm
DO /HOLD
TDI
SPI_WP#_SEL 1 PCH_SPI_CLK R1282 100 ohm 100 ohm 10K ohm No Stuff 100 ohm
@ R1060
2
0_0402_5%~D
3 /WP CLK 6 Compal Electronics, Inc.
4 5 PCH_SPI_DO TCK R804 4.7K ohm 4.7K ohm 4.7K ohm 4.7K ohm 51 ohm Title
GND DIO
R808 20K ohm No Stuff No Stuff No Stuff No Stuff PCH (1/8)
W25Q32BVSSIG_SO8~D TRST# Size Document Number Rev
R1316 10K ohm No Stuff No Stuff No Stuff No Stuff A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 15 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
2
MEM_SMBCLK 6 1 DDR_XDP_SMBCLK
DDR_XDP_SMBCLK 8,13,14,15,28
@ Q190A
5
DMN66D0LDW-7_SOT363-6~D
D D
MEM_SMBDATA 3 4 DDR_XDP_SMBDAT
DDR_XDP_SMBDAT 8,13,14,15,28
@ Q190B
DMN66D0LDW-7_SOT363-6~D
U73B
PCIE_PRX_WANTX_N1 BG30
REV1.0 B9 PCH_SMB_ALERT#
1
R51
2
0_0402_5%~D
36 PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 BJ30 PERN1 SMBALERT# / GPIO11
36 PCIE_PRX_WANTX_P1 PERP1
MiniWWAN (Mini Card 1)---> C317 1 2 0.1U_0402_10V7K~D PCIE_PTX_WANRX_N1 BF29 H14 MEM_SMBCLK 1 2
36 PCIE_PTX_WANRX_N1_C C319 1 PCIE_PTX_WANRX_P1 BH29 PETN1 SMBCLK
36 PCIE_PTX_WANRX_P1_C 2 0.1U_0402_10V7K~D PETP1
R54 0_0402_5%~D
C8 MEM_SMBDATA
PCIE_PRX_WLANTX_N2 AW30 SMBDATA
36 PCIE_PRX_WLANTX_N2 PERN2 +3.3V_ALW_PCH
PCIE_PRX_WLANTX_P2 BA30
36 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 BC30 PERP2
MiniWLAN (Mini Card 2)---> 36 PCIE_PTX_WLANRX_N2_C
C320 1 2 0.1U_0402_10V7K~D PETN2 SML0ALERT# / GPIO60 J14
C321 1 2 0.1U_0402_10V7K~D PCIE_PTX_WLANRX_P2 BD30
36 PCIE_PTX_WLANRX_P2_C PETP2 LAN_SMBCLK SML1_SMBCLK
SML0CLK C6 1 2
PCIE_PRX_PCMTX_N3 LAN_SMBCLK 30 R1178 2.2K_0402_5%~D
AU30
SMBus
33 PCIE_PRX_PCMTX_N3 PCIE_PRX_PCMTX_P3 PERN3 LAN_SMBDATA SML1_SMBDATA
33 PCIE_PRX_PCMTX_P3 AT30 G8 LAN_SMBDATA 30 1 2
PCIE_PTX_PCMRX_N3 PERP3 SML0DATA
PCMCIA---> 33 PCIE_PTX_PCMRX_N3_C
C1373 1 2 0.1U_0402_10V7K~D AU32
PETN3
R1179 2.2K_0402_5%~D
C1374 1 2 0.1U_0402_10V7K~D PCIE_PTX_PCMRX_P3 AV32
33 PCIE_PTX_PCMRX_P3_C PETP3
M14
PCIE_PRX_EXPTX_N4 SML1ALERT# / GPIO74
34 PCIE_PRX_EXPTX_N4 BA32 PERN4
PCIE_PRX_EXPTX_P4 BB32 E10 SML1_SMBCLK
34 PCIE_PRX_EXPTX_P4 PCIE_PTX_EXPRX_N4 PERP4 SML1CLK / GPIO58 SML1_SMBCLK 40
Express card---> 34 PCIE_PTX_EXPRX_N4_C
C1008 1 2 0.1U_0402_10V7K~D BD32 PETN4 +3.3V_ALW_PCH
C1009 1 2 0.1U_0402_10V7K~D PCIE_PTX_EXPRX_P4 BE32 G12 SML1_SMBDATA
34 PCIE_PTX_EXPRX_P4_C PETP4 SML1DATA / GPIO75 SML1_SMBDATA 40
PCI-E*
PCIE_PRX_WPANTX_N5 BF33
36 PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 BH33 PERN5 PCH_CL_CLK1 MEM_SMBCLK
MiniPCIE/SATA 36 PCIE_PRX_WPANTX_P5 PERP5 CL_CLK1
T13 PCH_CL_CLK1 36 2 1
Controller
C1025 1 2 0.1U_0402_10V7K~D PCIE_PTX_WPANRX_N5 BG32 @ R252 2.2K_0402_5%~D
(Mini Card 3)---> 36 PCIE_PTX_WPANRX_N5_C C1024 1 2 0.1U_0402_10V7K~D PCIE_PTX_WPANRX_P5 BJ32 PETN5
T11 PCH_CL_DATA1 MEM_SMBDATA 2 1
36 PCIE_PTX_WPANRX_P5_C PETP5 CL_DATA1 PCH_CL_DATA1 36
@ R255 2.2K_0402_5%~D
Link
C PCIE_PRX_GLANTX_N6 PCH_CL_RST1# PCH_SMB_ALERT# 2 C
30 PCIE_PRX_GLANTX_N6 BA34 T9 1
PCIE_PRX_GLANTX_P6 PERN6 CL_RST1# PCH_CL_RST1# 36 R1175 10K_0402_5%~D
30 PCIE_PRX_GLANTX_P6 AW34 PERP6
10/100/1G LAN ---> C326 1 2 0.1U_0402_10V7K~D PCIE_PTX_GLANRX_N6 BC34
30 PCIE_PTX_GLANRX_N6_C C327 1 PCIE_PTX_GLANRX_P6 PETN6
30 PCIE_PTX_GLANRX_P6_C 2 0.1U_0402_10V7K~D BD34 PETP6
H1 PEG_A_CLKRQ# 1 2
PEG_A_CLKRQ# / GPIO47 CLK_REQ# 53
AT34 R1303 0_0402_5%~D
PERN7 +3.3V_LAN
AU34
PERP7 CLK_PCIE_VGA#
AU36 PETN7 CLKOUT_PEG_A_N AD43
CLK_PCIE_VGA CLK_PCIE_VGA# 53
AV36 PETP7 CLKOUT_PEG_A_P AD45 CLK_PCIE_VGA 53 LAN_SMBCLK 2 1
BG34 AN4 CLK_CPU_DMI# R309 2.2K_0402_5%~D
PERN8 CLKOUT_DMI_N CLK_CPU_DMI# 8
PEG
BJ34 AN2 CLK_CPU_DMI LAN_SMBDATA 2 1
PERP8 CLKOUT_DMI_P CLK_CPU_DMI 8 R377 2.2K_0402_5%~D
BG36
PETN8
BJ36
PETP8
AT1
CLKOUT_DP_N / CLKOUT_BCLK1_N
AT3
CLKOUT_DP_P / CLKOUT_BCLK1_P
AK48
CLKOUT_PCIE0N @R1
@ R1
AK47
CLKOUT_PCIE0P
1
+3.3V_ALW_PCH R1206 2 1 0_0402_5%~D
R523 10K_0402_5%~D EXPCLK_REQ# M9 AF38 1 2 @ R685
34 EXPCLK_REQ# PCIECLKRQ4# / GPIO26 XCLK_RCOMP +1.05V_RUN
R686 90.9_0402_1%~D 1M_0402_5%~D
@ Y6
2 1 PCIE_MINI2# AJ50 T45 SIO_14M R1223 2 1 22_0402_5%~D 25MHZ_18PF_1Y725000CE1A~D
36 CLK_PCIE_MINI2# CLK_SIO_14M 39
2
R1203 PCIE_MINI2 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
36 CLK_PCIE_MINI2 2 1 0_0402_5%~D AJ52 2 1
CLKOUT_PCIE5P
MiniWLAN (Mini Card 2)---> +3.3V_ALW_PCH R1196 2 1 0_0402_5%~D
12P_0402_50V8J~D
R45 10K_0402_5%~D MINI2CLK_REQ# H6 P43 PCI_TCM 3@ R1220 2 1 22_0402_5%~D
Clock Flex
1
C1168
2 1 PCIE_MINI1# AK53 T42 PCI_TPM R1219 2 1 22_0402_5%~D R381
36 CLK_PCIE_MINI1# CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 CLK_PCI_TPM 31
R1195 2 1 0_0402_5%~D PCIE_MINI1 AK51 0_0402_5%~D
36 CLK_PCIE_MINI1 CLKOUT_PEG_B_P 1
MiniWWAN (Mini Card 1)---> +3.3V_ALW_PCH R1202 2 1 0_0402_5%~D
R40 10K_0402_5%~D MINI1CLK_REQ# P13 N50 JETWAY_14M 2 1 JETWAY_CLK14M @
36 MINI1CLK_REQ# JETWAY_CLK14M 32
2
PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 R910 @ 22_0402_5%~D
Place R910 close to PCH
IBEXPEAK-M_FCBGA1071~D
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (2/8)
Size Document Number Rev
A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 16 of 66
5 4 3 2 1
5 4 3 2 1
SIO_SLP_LAN# 2 1
R380 10K_0402_5%~D
PCH_RI# 2 1
R267 10K_0402_5%~D
LVDS
DMI_CRX_PTX_P3 BD18 BJ14 AV53
7 DMI_CRX_PTX_P3 DMI3TXP FDI_INT LVDSA_CLK#
AV51 BD42
DMI
FDI
CRT
R53 0_0402_5%~D BF37
CRT_IREF DDPD_2N
AD48 BH37
AC_PRESENT DAC_IREF DDPD_2P
40 AC_PRESENT P7 N2 AB51 BE36
ACPRESENT / GPIO31 TP23 CRT_IRTN DDPD_3N
REV1.0 DDPD_3P
BD36
1
T6 PAD~D
+3.3V_ALW_PCH 1 2 PCH_BATLOW# A6
BATLOW# / GPIO72 PMSYNCH
BJ10 H_PM_SYNC
H_PM_SYNC 8
IBEXPEAK-M_FCBGA1071~D
R275 8.2K_0402_5%~D R672
1K_0402_5%~D
PCH_RI# F14 F6 SIO_SLP_LAN#
2
RI# SLP_LAN# / GPIO29 SIO_SLP_LAN# 30,39
A IBEXPEAK-M_FCBGA1071~D A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (3/8)
Size Document Number Rev
A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 17 of 66
5 4 3 2 1
5 4 3 2 1
Stuff: R78,R89,R101~R116
+3.3V_RUN PCH XDP ENABLE
No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
1 2 PCI_DEVSEL#
R1471 8.2K_0402_5%~D
1 2 PCI_PIRQA# Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
R1472 8.2K_0402_5%~D PCH XDP DISABLE
1 2 PCI_PLOCK#
R1473 8.2K_0402_5%~D No Stuff: R78,R89,R101~R116
1 2 PCI_PERR#
R1474 8.2K_0402_5%~D
PCI_TRDY# U73E
1 2
D R1475 8.2K_0402_5%~D D
1 2 PCI_FRAME#
H40
N34
AD0 REV1.0 NV_CE#0
AY9
BD1
R1477 8.2K_0402_5%~D AD1 NV_CE#1
C44 AP15
PCI_REQ1# AD2 NV_CE#2
1 2 A38 BD8
R1476 8.2K_0402_5%~D AD3 NV_CE#3 +VCCPNAND no support?
C36
PCI_PIRQD# AD4
1 2 J34
AD5 NV_DQS0
AV9
R1478 8.2K_0402_5%~D A40 BG8
AD6 NV_DQS1
1
1 2 PCI_PIRQB# D45
R1479 8.2K_0402_5%~D AD7 @R872
@ R872
E36 AP7
PCI_REQ0# AD8 NV_DQ0 / NV_IO0 10K_0402_5%~D
1 2 H48 AP6
R1480 8.2K_0402_5%~D AD9 NV_DQ1 / NV_IO1
E40 AT6
PCI_SERR# AD10 NV_DQ2 / NV_IO2
1 2 C40 AT9
2
R1481 8.2K_0402_5%~D AD11 NV_DQ3 / NV_IO3 NV_ALE
M48 AD12 NV_DQ4 / NV_IO4 BB1
1 2 PCI_IRDY# M45 AV6
R1482 8.2K_0402_5%~D AD13 NV_DQ5 / NV_IO5
F53 AD14 NV_DQ6 / NV_IO6 BB3
1 2 PCI_STOP# M40 BA4
R1483 8.2K_0402_5%~D AD15 NV_DQ7 / NV_IO7
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
1 2 LVDS_CBL_DET# J36 BB6 Danbury Technology Enabled
R1484 8.2K_0402_5%~D AD17 NV_DQ9 / NV_IO9
K48 BD6
PCI_PIRQC# AD18 NV_DQ10 / NV_IO10
1 2 F40 BB7
AD19 NV_DQ11 / NV_IO11
R1485 8.2K_0402_5%~D C42 AD20 NV_DQ12 / NV_IO12 BC8 High = Enabled (Default)
1 2 CAM_MIC_CBL_DET# K46 BJ8 NV_ALE
AD21 NV_DQ13 / NV_IO13
R212 8.2K_0402_5%~D M51 AD22 NV_DQ14 / NV_IO14 BJ6 Low = Disabled
1 2 BT_DET# J52 BG6
R590 8.2K_0402_5%~D AD23 NV_DQ15 / NV_IO15
K51 AD24
L34 BD3 NV_ALE
AD25 NV_ALE NV_CLE
F42 AD26 NV_CLE AY6
J40 AD27
G46
AD28
F44 AU2
AD29 NV_RCOMP +VCCPNAND
M47
AD30
PCI
H36 AV7
C AD31 NV_RB# C
1
J50 C/BE0# NV_WR#0_RE# AY8
G42 AY5 @ R866
C/BE1# NV_WR#1_RE# 1K_0402_5%~D
H47 C/BE2#
G34 C/BE3# NV_WE#_CK0 AV11
BF5
2
PCI_PIRQA# NV_WE#_CK1
G38
PCI_PIRQB# PIRQA# NV_CLE
H51 PIRQB#
PCI_GNT3# PCI_PIRQC# USBP0-
PCI_PIRQD#
B37
A44
PIRQC# USBP0N H18
J18 USBP0+ USBP0- 37 ----->Right Side Top
PIRQD# USBP0P USBP1- USBP0+ 37
USBP1N A18 USBP1- 37 ----->Right Side Bottom
1
USB
PCH_PCIRST# USBP9-
@R121
@R121
1 2
0_0402_5%~D
K6 PCIRST# USBP9N E22
F22 USBP9+
USBP9- 38 ----->DOCK
PCI_SERR# USBP9P USBP10- USBP9+ 38 +3.3V_ALW_PCH
Low = A16 swap E44 SERR# USBP10N A22 USBP10- 33 ----->Express Card
PCI_GNT#3 PCI_PERR# E50 C22 USBP10+
PERR# USBP10P USBP11- USBP10+ 33
High = Default USBP11N G24 USBP11- 24 ----->Camera
H24 USBP11+ USB_OC0# R1486 2 1 10K_0402_5%~D
B USBP11P USBP11+ 24 B
PCI_IRDY# A42 L24
IRDY# USBP12N USB_OC1# R1487
H44
PAR USBP12P
M24 2 1 10K_0402_5%~D
PCI_DEVSEL# USBP13-
PCI_FRAME#
F46
C46
DEVSEL# USBP13N
A24
C24 USBP13+ USBP13- 36 ----->WPAN USB_OC3# R1488 2 1 10K_0402_5%~D
FRAME# USBP13P USBP13+ 36
PCI_PLOCK# D49 Within 500 mils USB_OC4# R1489 2 1 10K_0402_5%~D
PLOCK# USBRBIAS
B25 1 2
PCI_STOP# USBRBIAS# R303 USB_OC5# R1490
D41 2 1 10K_0402_5%~D
R124 0_0402_5%~D PCI_TRDY# STOP# 22.6_0402_1%~D
53 PLTRST_GPU# 1 2 C48 D25
R100 0_0402_5%~D TRDY# USBRBIAS USB_OC6# R1491
31 PLTRST_USH# 1 2 2 1 10K_0402_5%~D
R97 1 2 0_0402_5%~D M7
33 PLTRST_R5U242# PME#
@ R94 1 2 0_0402_5%~D N16 USB_OC0#_R R71 1 2 0_0402_5%~D USB_OC7# R1493 2 1 10K_0402_5%~D
15 PLTRST_XDP# PCH_PLTRST# OC0# / GPIO59 USB_OC1#_R USB_OC0# 37
R14 1 2 0_0402_5%~D D5 J16 R77 1 2 0_0402_5%~D
30 PLTRST_LAN# PLTRST# OC1# / GPIO40 USB_OC2# USB_OC1# 37 USB_OC2#
F16 R1494 2 1 10K_0402_5%~D
OC2# / GPIO41 USB_OC2# 15
R1216 2 1 22_0402_5%~D PCI_5028 N52 L16 USB_OC3#
39 CLK_PCI_5028 PCI_MEC CLKOUT_PCI0 OC3# / GPIO42 USB_OC4# USB_OC3# 15
R1217 1 2 47_0402_5%~D P53 E14
40 CLK_PCI_MEC CLKOUT_PCI1 OC4# / GPIO43 USB_OC4# 15
R1215 1 2 47_0402_5%~D PCI_DOCK P46 G16 USB_OC5#
38 CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# USB_OC5# 15
P51 CLKOUT_PCI3 OC6# / GPIO10 F12 USB_OC6# 15
16 CLK_PCI_LOOPBACK
R63 2 1 22_0402_5%~D PCI_LOOPBACKOUT P48 T15 USB_OC7#
USB_OC7# 15
CLKOUT_PCI4 OC7# / GPIO14
+3.3V_RUN USB_OC0#_R 15
IBEXPEAK-M_FCBGA1071~D
C40 USB_OC1#_R 15
1 2
0.1U_0402_16V4Z~D
5
U11
PCH_PLTRST# 1
P
B PCH_PLTRST#_EC
O
4 PCH_PLTRST#_EC 8,32,34,36,39,40 Boot BIOS Strap
2 A
G
A PCI_GNT0# A
TC7SH08FU_SSOP5~D PCI_GNT#1 PCI_GNT#0 Boot BIOS Location
3
PCI_GNT1#
1K_0402_5%~D
1K_0402_5%~D
0 0 LPC
DELL CONFIDENTIAL/PROPRIETARY
1
1
@ R79
@ R93
0 1 Reserved (NAND) Compal Electronics, Inc.
Title
2
D D
U73F
15 SIO_EXT_SCI#_R
SIO_EXT_SCI# 1 2 Y3 AH45
40 SIO_EXT_SCI# BMBUSY# / GPIO0 CLKOUT_PCIE6N
R130 0_0402_5%~D AH46
GPIO1 CLKOUT_PCIE6P
C38
TACH1 / GPIO1
GPIO6 D37
TACH2 / GPIO6 +3.3V_RUN
AF48
CLKOUT_PCIE7N
MISC
1394_DET# J32 AF47
33 1394_DET# TACH3 / GPIO7 CLKOUT_PCIE7P
SIO_EXT_SMI# F10 SIO_A20GATE 2 1
40 SIO_EXT_SMI# GPIO8 R230 8.2K_0402_5%~D
PM_LANPHY_ENABLE K9 U2 SIO_A20GATE SIO_RCIN# 2 1
30 PM_LANPHY_ENABLE LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE 40
R231 10K_0402_5%~D
T7 1394_DET# 1 2
39 SIO_EXT_WAKE# GPIO15 R836 10K_0402_5%~D
EN_ESATA_RPTR# AA2 AM3 CLK_CPU_BCLK# SIO_EXT_SCI# 1 2
15,37 EN_ESATA_RPTR# SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# 8
@ R99 R272 10K_0402_5%~D
1K_0402_5%~D SPEAKER_DET# F38 AM1 CLK_CPU_BCLK +1.05V_RUN_VTT
29 SPEAKER_DET# TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK 8
1 2 SIO_EXT_SMI#
DGPU_PWROK Y7 BG10 H_PECI
39,52 DGPU_PWROK SCLOCK / GPIO22 PECI H_PECI 8
1
GPIO
H10 T1 SIO_RCIN# R237
36 PCIE_MCARD1_DET# GPIO24 RCIN# SIO_RCIN# 40
56_0402_5%~D
TP_ONDIE_PLL_VR AB12 BE10 H_CPUPWRGD
GPIO27 PROCPWRGD H_CPUPWRGD 8
CPU
2
TOUCH_SCREEN_DET# V13 BD10 PCH_THRMTRIP#_R
15 TOUCH_SCREEN_DET# GPIO28 THRMTRIP#
PCH_GPIO34 M11 1
+3.3V_ALW_PCH STP_PCI# / GPIO34
Internal pull up GPIO27 to USB_MCARD1_DET# V6 C33
C 36 USB_MCARD1_DET# SATACLKREQ# / GPIO35 0.1U_0402_16V4Z~D C
enable VccVRM
1
CONTACTLESS_DET# 2
15,31 CONTACTLESS_DET# AB7 SATA2GP / GPIO36 TP1 BA22
R1284 +3.3V_ALW_PCH
8.2K_0402_5%~D GPIO37 AB13 AW22
15 GPIO37 SATA3GP / GPIO37 TP2
@
TPM_ID0 V3 BB22 IO_LOOP 2 1
2
NCTF
VSS_NCTF_2
RSVD
R1557 2.2K_0402_5%~D VSS_NCTF_3 A5 AK41
VSS_NCTF_4 VSS_NCTF_3 TP12
A50
VSS_NCTF_5 VSS_NCTF_4
A52 AK42
VSS_NCTF_6 VSS_NCTF_5 TP13
A53 VSS_NCTF_6
+3.3V_RUN VSS_NCTF_7 B2 M32
VSS_NCTF_8 VSS_NCTF_7 TP14
B4 VSS_NCTF_8
VSS_NCTF_9 B52 N32
CONTACTLESS_DET# VSS_NCTF_10 VSS_NCTF_9 TP15
2 1 B53
R1242 10K_0402_5%~D VSS_NCTF_11 VSS_NCTF_10
BE1 VSS_NCTF_11 TP16 M30
B GPIO37 VSS_NCTF_12 B
2 1 BE53
VSS_NCTF_12
R1243 10K_0402_5%~D VSS_NCTF_13 BF1 N30
EN_ESATA_RPTR# VSS_NCTF_14 VSS_NCTF_13 TP17
2 1 BF53
VSS_NCTF_14
R1244 10K_0402_5%~D VSS_NCTF_15 BH1 H12
TEMP_ALERT# VSS_NCTF_16 VSS_NCTF_15 TP18
2 1 All NCTF pins should have thick VSS_NCTF_17
BH2
VSS_NCTF_16
R1245 10K_0402_5%~D BH52 AA23
1 2 GPIO1 traces at 45°from the pad. VSS_NCTF_18 BH53
VSS_NCTF_17 TP19
R1510 10K_0402_5%~D VSS_NCTF_19 VSS_NCTF_18
BJ1 AB45
GPIO6 VSS_NCTF_20 VSS_NCTF_19 NC_1
1 2 BJ2
R1506 10K_0402_5%~D VSS_NCTF_21 VSS_NCTF_20
BJ4 AB38
SPEAKER_DET# VSS_NCTF_22 VSS_NCTF_21 NC_2
1 2 BJ49
VSS_NCTF_22
R95 8.2K_0402_5%~D VSS_NCTF_23 BJ5 AB42
PCH_GPIO34 VSS_NCTF_24 VSS_NCTF_23 NC_3
1 2 BJ50
VSS_NCTF_24
R1511 10K_0402_5%~D VSS_NCTF_25 BJ52 AB41
VSS_NCTF_26 VSS_NCTF_25 NC_4
BJ53
VSS_NCTF_27 VSS_NCTF_26
D1 VSS_NCTF_27 NC_5 T39
VSS_NCTF_28 D2
VSS_NCTF_29 VSS_NCTF_28
D53 VSS_NCTF_29
VSS_NCTF_30 E1 P6 INIT3_3V# PAD~D T7 @
VSS_NCTF_31 VSS_NCTF_30 INIT3_3V#
E53 VSS_NCTF_31
REV1.0 TP24
C10
IBEXPEAK-M_FCBGA1071~D
+3.3V_RUN
+3.3V_RUN
10K_0402_5%~D
5@
2
4@ R787
R273
20K_0402_5%~D
A A
2
1
1
10K_0402_5%~D
6@ China TPM 0 0
3@ R339 DELL CONFIDENTIAL/PROPRIETARY
R922
Title
TPM 1 1 PCH (5/8)
Size Document Number Rev
A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 19 of 66
5 4 3 2 1
5 4 3 2 1
10U_0805_4VAM~D
1U_0402_6.3V6K~D
1 1 AB28 VCCCORE[3] VCCADAC[2] AE52
AD26
VCCCORE[4]
C1139
C77
CRT
AD28
VCCCORE[5] VSSA_DAC[1]
AF53 V5REF 5 < 1 (mA)
AF26
D 2 2 VCCCORE[6] D
VCC CORE
AF28 AF51
VCCCORE[7] VSSA_DAC[2]
AF30
VCCCORE[8]
V5REF_Sus 5 < 1 (mA)
AF31
VCCCORE[9]
AH26
VCCCORE[10]
AH28
VCCCORE[11]
Vcc3_3 3.3 0.357
AH30
VCCCORE[12]
AH31 AH38
VCCCORE[13] VCCALVDS
AJ30
VCCCORE[14]
VccAClk 1.1 0.052
AJ31 AH39
VCCCORE[15] VSSA_LVDS
VccADAC 3.3 0.069
+1.05V_RUN AP43
VCCTX_LVDS[1]
VCCTX_LVDS[2] AP45
AT46 VccADPLLA 1.1 0.068
LVDS
VCCTX_LVDS[3]
AK24 VCCIO[24] VCCTX_LVDS[4] AT45
1U_0402_6.3V6K~D
1 VccapllEXP 1.1 0.04
AN20 VCCIO[25] VCC3_3[3] AB35
C78
Place C78 Near BJ24 pin AN22
HVCMOS
VCCIO[26]
AN23 VCCIO[27] VCC3_3[4] AD35 +3.3V_RUN VccCore 1.1 1.432
2 @
AN24 VCCIO[28]
AN26 VCCIO[29] 1
AN28 VCCIO[30]
VccDMI 1.1 0.058
BJ26 C93
VCCIO[31]
BJ28 VCCIO[32] 0.1U_0402_10V7K~D
AT26 2 VccDMI 1.1 0.061
VCCIO[33]
AT28
+1.05V_RUN VCCIO[34]
AU26
VCCIO[35] +1.5V_1.8V_RUN_VCCADMI_VRM
AU28
VCCIO[36]
VccFDIPLL 1.1 0.037
C C
AV26
VCCIO[37]
AV28 VCCIO[38] VCCVRM[2] AT24 1 2 +1.05V_+1.5V_1.8V_RUN
AW26 VCCIO[39]
R391 0_0603_5%~D VccIO 1.1 3.062
10U_0805_4VAM~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 AW28 VCCIO[40]
DMI
BA26 VCCIO[41] VCCDMI[1] AT16
C80
C81
C82
C83
C84
BA28 VCCIO[42]
VccLAN 1.1 0.32
BB26 AU16 +1.05V_RUN_VTT
2 2 2 2 2 VCCIO[43] VCCDMI[2]
BB28 VCCIO[44] 1
BC26 VCCIO[45]
VccME 1.1 1.849
PCI E*
BC28 C1140
VCCIO[46] 1U_0402_6.3V6K~D
BD26 VCCIO[47]
BD28 2 VccME3_3 3.3 0.085
VCCIO[48] +VCCPNAND
BE26 AM16
+3.3V_RUN VCCIO[49] VCCPNAND[1]
BE28 AK16
VCCIO[50] VCCPNAND[2]
BG26
VCCIO[51] VCCPNAND[3]
AK20 1 2 +3.3V_RUN VccpNAND 1.8 0.156
BG28 AK19 @ R489 0_0805_5%~D
VCCIO[52] VCCPNAND[4]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
BH27 AK15
VCCIO[53] VCCPNAND[5]
1 VCCPNAND[6]
AK13 1 1 2 +1.8V_RUN VccRTC 3.3 2 (mA)
AN30 AM12 R495 0_0805_5%~D
VCCIO[54] VCCPNAND[7]
C85
C94
NAND / SPI
AN31 AM13
VCCIO[55] VCCPNAND[8]
VCCPNAND[9]
AM15 VccSATAPLL 1.1 0.031
2 2
AN35
VCC3_3[1]
VccSus3_3 3.3 0.163
+VCCAFDI_VRM AT22
VCCVRM[1]
Place C22 Near BJ18 pin VccSusHDA 3.3 0.006
BJ18 VCCFDIPLL VCCME3_3[1] AM8 +3.3V_M
VCCME3_3[2] AM9
FDI
1U_0402_6.3V6K~D
C95
B 0.1U_0402_10V7K~D VccVRM 1.05 < 1 (mA) B
2 @ REV1.0 2
IBEXPEAK-M_FCBGA1071~D
VccALVDS 3.3 < 1 (mA)
R390
0_0603_5%~D
1 2 +VCCAFDI_VRM
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
+1.05V_+1.5V_1.8V_RUN
NOTE:Refer to schematic check list rev2.0, VccVRM no support
2 1
@ R96 0_0603_5%~D 1.5V and R96 can be removed.
+1.8V_RUN
2 1
R387 0_0603_5%~D
+1.05V_RUN
2 1
@ R80 0_0603_5%~D
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (6/8)
Size Document Number Rev
A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 20 of 66
5 4 3 2 1
5 4 3 2 1
1U_0402_6.3V6K~D
R651
1
U73J POWER R499 0_0402_5%~D
REV1.0 0_0603_5%~D 2 1 1 3
S
C39
0.1U_0402_10V7K~D
AP51 V24 +1.05V_RUN_VCCUSBCORE 2 1
VCCACLK[1] VCCIO[5] +1.05V_RUN
V26 Q10
VCCIO[6]
1
2 @ AP53 Y24 SSM3K7002FU_SC70-3~D
1 1
G
2
+1.05V_M R669 VCCACLK[2] VCCIO[7] R57
Y26
VCCIO[8]
C18
D 0_0603_5%~D C96 20K_0402_5%~D D
1 2 +1.05V_M_VCCAUX AF23 V28 1U_0402_6.3V6K~D
VCCLAN[1] VCCSUS3_3[1] 2 42 ALW_ENABLE 2
1U_0402_6.3V6K~D
1 U28
2
VCCSUS3_3[2]
AF24 U26
VCCLAN[2] VCCSUS3_3[3]
C100
U24
VCCSUS3_3[4]
P28
2 +TP_PCH_VCCDSW Y20 VCCSUS3_3[5]
P26
DCPSUSBYP VCCSUS3_3[6] R500
1 N28
VCCSUS3_3[7] 0_0603_5%~D
N26
C110 VCCSUS3_3[8] +3.3V_ALW_VCCPUSB
AD38 M28 2 1 +3.3V_ALW_PCH
0.1U_0402_10V7K~D VCCME[1] VCCSUS3_3[9] +5V_ALW_PCH +3.3V_ALW_PCH
M26
+1.05V_M 2 VCCSUS3_3[10]
0.1U_0402_10V7K~D
R674 AD39 L28
USB
0_0805_5%~D VCCME[2] VCCSUS3_3[11]
VCCSUS3_3[12] L26 1
2
1 2 +1.05V_M_VCCEPW AD41 J28
VCCME[3] VCCSUS3_3[13]
C97
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
1 1 1 J26 R313 D16
VCCSUS3_3[14] 100_0402_5%~D
AF43 VCCME[4] VCCSUS3_3[15] H28 RB751S40T1_SOD523-2~D
2
C116
C112
C101
VCCSUS3_3[16] H26
AF41 G28
1
2 2 @ 2 VCCME[5] VCCSUS3_3[17] +PCH_V5REF_SUS
G26
VCCSUS3_3[18]
AF42 F28 1
VCCME[6] VCCSUS3_3[19]
VCCSUS3_3[20] F26
V39 E28 C342
VCCME[7] VCCSUS3_3[21] 1U_0603_10V6K~D
E26
0.1U_0402_10V7K~D
V41 VCCME[8] VCCSUS3_3[23] C28
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
1 1 1 VCCSUS3_3[24] C26 1
V42 VCCME[9] VCCSUS3_3[25] B27 Follow DG 1.11
C117
C111
C102
C99
VCCSUS3_3[26] A28
Y39 VCCME[10] VCCSUS3_3[27] A26
2 2 @ 2 2
Y41 U23 +5V_RUN +3.3V_RUN
VCCME[11] VCCSUS3_3[28]
Y42 V23 +1.05V_RUN
VCCME[12] VCCIO[56]
2
C C
F24 +PCH_V5REF_SUS R311 D15
V5REF_SUS 100_0402_5%~D RB751S40T1_SOD523-2~D
+VCCRTCEXT V9 DCPRTC
1
1
+PCH_V5REF_RUN
C103 K49 +PCH_V5REF_RUN 1
0.1U_0402_10V7K~D V5REF R517 +3.3V_RUN
+1.05V_+1.5V_1.8V_RUN AU24 VCCVRM[3]
PCI/GPIO/LPC
2 0_0805_5%~D C335
J38 +3.3V_RUN_VCCPPCI 2 1 1U_0603_10V6K~D
VCC3_3[8] 2
+1.05V_RUN BB51 VCCADPLLA[1]
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 BB53 L38 1
VCCADPLLA[2] VCC3_3[9]
Place C105 Near BB51 pin
C105
C106
C106 Near BD51 pin M36 C356
VCC3_3[10] 0.1U_0402_10V7K~D
BD51
+1.05V_RUN 2 @ 2 @ VCCADPLLB[1] 2
BD53 N36
VCCADPLLB[2] VCC3_3[11] +3.3V_RUN
AH23 P36
VCCIO[21] VCC3_3[12]
AJ35
VCCIO[22]
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AH35 U35 1
VCCIO[23] VCC3_3[13]
1 1 1
AF34 C1203
VCCIO[2]
C108
C138
C139
AD13 0.1U_0402_10V7K~D
VCC3_3[14] 2
AH34
2 2 2 VCCIO[3]
AF32
VCCIO[4]
VCCSATAPLL[1] AK3
1U_0402_6.3V6K~D
+VCCSST V12 AK1 +VCCSATAPLL
DCPSST VCCSATAPLL[2]
1 Place C610 Near AK3 pin
0.1U_0402_10V7K~D
C610
C217
0.1U_0402_10V7K~D
+DCPSUS Y22
B DCPSUS 2 @ B
1 AH22
2 VCCIO[9]
C677
0_0805_5%~D R557
PCI/GPIO/LPC
AH19
+3.3V_ALW_VCCPSUS VCCIO[10] 0_0805_5%~D
1 2 U20
VCCSUS3_3[31] +VCCIO
1 AD20 2 1 +1.05V_RUN
VCCIO[11]
U22
VCCSUS3_3[32]
C759
1U_0402_6.3V6K~D
AF22 1
VCCIO[12]
2
C611
AD19
+3.3V_RUN R691 VCCIO[13]
V15 AF20
0_0805_5%~D VCC3_3[5] VCCIO[14] 2
AF19
+3.3_RUN_VCCPCORE VCCIO[15]
1 2 V16 AH20
VCC3_3[6] VCCIO[16]
1
Y16 VCC3_3[7] VCCIO[17] AB19
C760 AB20
0.1U_0402_10V7K~D VCCIO[18] +1.05V_M
VCCIO[19] AB22
+1.05V_RUN_VTT R692 2 AD22
0_0603_5%~D VCCIO[20]
AT18
V_CPU_IO[1]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C113
0.1U_0402_10V7K~D
R650
1 1 1 0_0603_5%~D
IBEXPEAK-M_FCBGA1071~D
A
C781
C783
C672 A
1U_0402_6.3V6K~D
2 2 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (7/8)
Size Document Number Rev
A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 21 of 66
5 4 3 2 1
5 4 3 2 1
U73I
AY7 VSS[159] VSS[259] H49
B11 VSS[160] VSS[260] H5
B15 J24
VSS[161] VSS[261]
B19 K11
VSS[162] VSS[262]
B23 K43
D U73H VSS[163] VSS[263] D
B31 K47
VSS[164] VSS[264]
AB16 B35 K7
VSS[0] VSS[165] VSS[265]
B39 L14
VSS[166] VSS[266]
AA19 AK30 B43 L18
VSS[1] VSS[80] VSS[167] VSS[267]
AA20 AK31 B47 L2
VSS[2] VSS[81] VSS[168] VSS[268]
AA22 AK32 B7 L22
VSS[3] VSS[82] VSS[169] VSS[269]
AM19 AK34 BG12 L32
VSS[4] VSS[83] VSS[170] VSS[270]
AA24 AK35 BB12 L36
VSS[5] VSS[84] VSS[171] VSS[271]
AA26 AK38 BB16 L40
VSS[6] VSS[85] VSS[172] VSS[272]
AA28 AK43 BB20 L52
VSS[7] VSS[86] VSS[173] VSS[273]
AA30 AK46 BB24 M12
VSS[8] VSS[87] VSS[174] VSS[274]
AA31 AK49 BB30 M16
VSS[9] VSS[88] VSS[175] VSS[275]
AA32 VSS[10] VSS[89] AK5 BB34 VSS[176] VSS[276] M20
AB11 VSS[11] VSS[90] AK8 BB38 VSS[177] VSS[277] N38
AB15 VSS[12] VSS[91] AL2 BB42 VSS[178] VSS[278] M34
AB23 VSS[13] VSS[92] AL52 BB49 VSS[179] VSS[279] M38
AB30 VSS[14] VSS[93] AM11 BB5 VSS[180] VSS[280] M42
AB31 VSS[15] VSS[94] BB44 BC10 VSS[181] VSS[281] M46
AB32 AD24 BC14 M49
VSS[16] VSS[95] VSS[182] VSS[282]
AB39 AM20 BC18 M5
VSS[17] VSS[96] VSS[183] VSS[283]
AB43 VSS[18] VSS[97] AM22 BC2 VSS[184] VSS[284] M8
AB47 AM24 BC22 N24
VSS[19] VSS[98] VSS[185] VSS[285]
AB5 VSS[20] VSS[99] AM26 BC32 VSS[186] VSS[286] P11
AB8 VSS[21] VSS[100] AM28 BC36 VSS[187] VSS[287] AD15
AC2 VSS[22] VSS[101] BA42 BC40 VSS[188] VSS[288] P22
AC52 VSS[23] VSS[102] AM30 BC44 VSS[189] VSS[289] P30
AD11 VSS[24] VSS[103] AM31 BC52 VSS[190] VSS[290] P32
AD12 VSS[25] VSS[104] AM32 BH9 VSS[191] VSS[291] P34
AD16 AM34 BD48 P42
VSS[26] VSS[105] VSS[192] VSS[292]
AD23 AM35 BD49 P45
VSS[27] VSS[106] VSS[193] VSS[293]
AD30 AM38 BD5 P47
VSS[28] VSS[107] VSS[194] VSS[294]
AD31 AM39 BE12 R2
C VSS[29] VSS[108] VSS[195] VSS[295] C
AD32 AM42 BE16 R52
VSS[30] VSS[109] VSS[196] VSS[296]
AD34 VSS[31] VSS[110] AU20 BE20 VSS[197] VSS[297] T12
AU22 VSS[32] VSS[111] AM46 BE24 VSS[198] VSS[298] T41
AD42 VSS[33] VSS[112] AV22 BE30 VSS[199] VSS[299] T46
AD46 VSS[34] VSS[113] AM49 BE34 VSS[200] VSS[300] T49
AD49 VSS[35] VSS[114] AM7 BE38 VSS[201] VSS[301] T5
AD7 AA50 BE42 T8
VSS[36] VSS[115] VSS[202] VSS[302]
AE2 VSS[37] VSS[116] BB10 BE46 VSS[203] VSS[303] U30
AE4 VSS[38] VSS[117] AN32 BE48 VSS[204] VSS[304] U31
AF12 VSS[39] VSS[118] AN50 BE50 VSS[205] VSS[305] U32
Y13 VSS[40] VSS[119] AN52 BE6 VSS[206] VSS[306] U34
AH49 AP12 BE8 P38
VSS[41] VSS[120] VSS[207] VSS[307]
AU4 AP42 BF3 V11
VSS[42] VSS[121] VSS[208] VSS[308]
AF35 AP46 BF49 P16
VSS[43] VSS[122] VSS[209] VSS[309]
AP13 AP49 BF51 V19
VSS[44] VSS[123] VSS[210] VSS[310]
AN34 AP5 BG18 V20
VSS[45] VSS[124] VSS[211] VSS[311]
AF45 AP8 BG24 V22
VSS[46] VSS[125] VSS[212] VSS[312]
AF46 AR2 BG4 V30
VSS[47] VSS[126] VSS[213] VSS[313]
AF49 AR52 BG50 V31
VSS[48] VSS[127] VSS[214] VSS[314]
AF5 AT11 BH11 V32
VSS[49] VSS[128] VSS[215] VSS[315]
AF8 BA12 BH15 V34
VSS[50] VSS[129] VSS[216] VSS[316]
AG2 AH48 BH19 V35
VSS[51] VSS[130] VSS[217] VSS[317]
AG52 AT32 BH23 V38
VSS[52] VSS[131] VSS[218] VSS[318]
AH11 AT36 BH31 V43
VSS[53] VSS[132] VSS[219] VSS[319]
AH15 AT41 BH35 V45
VSS[54] VSS[133] VSS[220] VSS[320]
AH16 AT47 BH39 V46
VSS[55] VSS[134] VSS[221] VSS[321]
AH24 VSS[56] VSS[135] AT7 BH43 VSS[222] VSS[322] V47
AH32 VSS[57] VSS[136] AV12 BH47 VSS[223] VSS[323] V49
AV18 VSS[58] VSS[137] AV16 BH7 VSS[224] VSS[324] V5
AH43 VSS[59] VSS[138] AV20 C12 VSS[225] VSS[325] V7
AH47 VSS[60] VSS[139] AV24 C50 VSS[226] VSS[326] V8
AH7 VSS[61] VSS[140] AV30 D51 VSS[227] VSS[327] W2
B B
AJ19 AV34 E12 W52
VSS[62] VSS[141] VSS[228] VSS[328]
AJ2 AV38 E16 Y11
VSS[63] VSS[142] VSS[229] VSS[329]
AJ20 AV42 E20 Y12
VSS[64] VSS[143] VSS[230] VSS[330]
AJ22 AV46 E24 Y15
VSS[65] VSS[144] VSS[231] VSS[331]
AJ23 AV49 E30 Y19
VSS[66] VSS[145] VSS[232] VSS[332]
AJ26 AV5 E34 Y23
VSS[67] VSS[146] VSS[233] VSS[333]
AJ28 AV8 E38 Y28
VSS[68] VSS[147] VSS[234] VSS[334]
AJ32 AW14 E42 Y30
VSS[69] VSS[148] VSS[235] VSS[335]
AJ34 AW18 E46 Y31
VSS[70] VSS[149] VSS[236] VSS[336]
AT5 AW2 E48 Y32
VSS[71] VSS[150] VSS[237] VSS[337]
AJ4 BF9 E6 Y38
VSS[72] VSS[151] VSS[238] VSS[338]
AK12 AW32 E8 Y43
VSS[73] VSS[152] VSS[239] VSS[339]
AM41 AW36 F49 Y46
VSS[74] VSS[153] VSS[240] VSS[340]
AN19 AW40 F5 P49
VSS[75] VSS[154] VSS[241] VSS[341]
AK26 AW52 G10 Y5
VSS[76] VSS[155] VSS[242] VSS[342]
AK22 VSS[77] VSS[156] AY11 G14 VSS[243] VSS[343] Y6
AK23 VSS[78] VSS[157] AY43 G18 VSS[244] VSS[344] Y8
AK28 VSS[79] REV1.0 VSS[158] AY47 G2
G22
VSS[245] VSS[345] P24
T43
IBEXPEAK-M_FCBGA1071~D VSS[246] VSS[346]
G32 VSS[247] VSS[347] AD51
G36 AT8
VSS[248] VSS[348]
G40 AD47
VSS[249] VSS[349]
G44 Y47
VSS[250] VSS[350]
G52 AT12
VSS[251] VSS[351]
AF39 AM6
VSS[252] VSS[352]
H16 AT13
VSS[253] VSS[353]
H20 AM5
VSS[254] VSS[354]
H30 AK45
VSS[255] VSS[355]
H34 AK39
VSS[256] VSS[356]
H38 AV14
VSS[257] VSS[366]
H42
VSS[258]
A A
REV1.0
IBEXPEAK-M_FCBGA1071~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (8/8)
Size Document Number Rev
A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 22 of 66
5 4 3 2 1
5 4 3 2 1
D D
+3.3V_M
+3.3V_M
+3.3V_M
FAN1_DET# 2 1
1
10K_0402_5%~D
R1517 10K_0402_5%~D
1
R134
8.2K_0402_5%~D
R142
JFAN1
FAN1_DET# 1
2
2
2
RB751S40T1_SOD523-2~D
R135 FAN1_TACH_FB 3 5
3 G1
1
22U_0805_6.3VAM~D
2.2K_0402_5%~D C 1 4
4 G2
6
Discrete
1
1 2 2 1
D2
C219
B C218 MOLEX_53398-0471~D
40 BC_DAT_EMC4002
Q5 E 0.1U_0402_16V4Z~D VGA_THERMDP
VGA_THERMDP 54
3
2
PMST3904_SOT323-3~D Place under CPU 40 BC_CLK_EMC4002 2
8 H_THERMTRIP# Place C223 close to the Q8 as possible 1
2
Place C224, close to the Guardian pins as possible
C1706
470P_0402_50V7K~D
1
2 C 2 VGA_THERMDN 2
C224 VGA_THERMDN 54
@ C223 2
100P_0402_50V8K~D B 2200P_0402_50V7K~D Place Capacitor close to Guardian Chip
E Q8
3
1 MMBT3904WT1G_SC70-3~D 1
C C
Diode circuit at DP2/DN2 is used Place C221 close to the U3
for skin temp sensor (placed Guardian pins as possible.
BC_DAT_EMC4002 10
optimally BC_CLK_EMC4002 SMDATA/BC-LINK_DATA
11 SMCLK/BC-LINK_CLK VIN1 39
1
MMBT3904WT1G_SC70-3~D 2 1 +3.3V_M
R1218 1 2 22_0402_5%~D +VCC_4002 4 R141 10K_0402_5%~D
+3.3V_M VDD
12 BC_INT#_EMC4002 40
ATF_INT#/BC-LINK_IRQ# POWER_SW#
1 +RTC_CELL 21 26
RTC_PWR3V POWER_SW#
1U_0402_6.3V6K~D
1 27 ACAV_IN 40,50,51
C229 +3.3V_M ACAVAIL_CLR PWM
20 2 1 +3.3V_M
THERMTRIP_SIO/PWM1/GPIO5
C230
THERMATRIP3# 24 19 2 1
R137 THERMTRIP3# LDO_SHDN# R211 10K_0402_5%~D
8.2K_0402_5%~D VSET 42 34
B VSET LDO_POK B
1
1 2 1 3 33 LDO_SET
+VCC_4002
2
1
0.1U_0402_16V4Z~D 953_0402_1%~D 6 32
2 VDDH1 VDDH2
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
1 5 31 R154
2
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
2
2
C234
Rset=953,Tp=88degree 1 1 +FAN1_VOUT 7 29
FAN_OUT1 LDO_OUT/FAN_OUT2
8 30
2 2 FAN_OUT1 LDO_OUT/FAN_OUT2
C236
C237
FAN1_TACH_FB 15 16 FAN1_DET#
2 2 TACH1/GPIO3 TACH2/GPIO4
14 13 PM_EXTTS# 8
CLK_IN/GPIO2 PWM2/GPIO1
VSS
EC_32KHZ_OUT
40 EC_32KHZ_OUT
EMC4002-HZH C_QFN48_7X7~D
49
+3.3V_M
+3.3V_RUN
+RTC_CELL C1050
0.1U_0402_16V4Z~D
1
1 2
R155 Pull-up Resistor For Remote1 SMBUS
1
5
8.2K_0402_5%~D
P
B DOCK_PWR_SW# 40
R1401
2.2K_0402_5%~D POWER_SW# 4
2
O
* <= 4.7K +/- 5% 2N3904 2F(r/w) A
2 POWER_SW_IN# 40
G
THERMATRIP3#
2
A A
10K 2N3904 2E(r/w)
3
1
C 1
THERM_B3 2 Q188 18K Thermistor 2F(r/w)
B PMST3904_SOT323-3~D C240
E 0.1U_0402_16V4Z~D >= 33K Thermistor 2E(r/w)
DELL CONFIDENTIAL/PROPRIETARY
3
2
53 THERMTRIP_VGA#
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, FAN & Thermal Sensor
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 23 of 66
5 4 3 2 1
5 4 3 2 1
D
MGND2 GND EDP_LANE_N1 @ C225 2 +LCDVDD
47 42 1 0.1U_0402_10V7K~D 6
S
MGND3 LANE1_N EDP_LANE_P1 @ C359 2 DPD_GPU_LANE_N1 54 +LCDVDD +15V_ALW
48 41 1 0.1U_0402_10V7K~D 4 5
MGND4 LANE1_P DPD_GPU_LANE_P1 54
1
0.1U_0402_16V4Z~D
49 MGND5 GND 40 2
100_0402_5%~D
50 39 EDP_LANE_N0 C358 2 1 0.1U_0402_10V7K~D 1
MGND6 LANE0_N DPD_GPU_LANE_N0 54
100K_0402_5%~D
51 38 EDP_LANE_P0 C271 2 1 0.1U_0402_10V7K~D R158 Q12
G
MGND7 LANE0_P DPD_GPU_LANE_P0 54 1 1
1
DMN66D0LDW-7_SOT363-6~D
R161
52 37 100K_0402_5%~D SI3456BDV-T1-E3_TSOP6~D
3
MGND8 GND
C244
R162
53 36 MB_EDP_AUX C295 1 2 0.1U_0402_10V7K~D C241
DPD_GPU_EDP_AUX 54
2
MGND9 AUX_CH_P MB_EDP_AUX# C314 1
54 MGND10 AUX_CH_N 35 2 0.1U_0402_10V7K~D DPD_GPU_EDP_AUX# 54
0.1U_0402_16V4Z~D
2 2
DMN66D0LDW-7_SOT363-6~D
55 34
6 2
MGND11 GND
0.1U_0402_25V4Z~D
56 33
2
MGND12 LCD_VCC
3
57 32 +LCDVDD 1
MGND13 LCD_VCC
LCD_VCC
31 Close to JEDP1.18,19
Q13A
Q13B
C242
D LCD_TST D
30 1 2 LCD_TST 39
TEST R667 1K_0402_5%~D D3
29 2 5
GND EDP_HPD BAT54CW_SOT323-3~D 2
28 EDP_HPD 53
HPD
1
27 +3.3V_RUN
4
BL_GND
26
BL_GND
25 39 LCD_VCC_TEST_EN 3
BL_PWR
1
24
BL_PWR R165 EN_LCDPWR
23 +BL_PWR_SRC 1 2
BL_PWR 10K_0402_5%~D
22 39,53 ENVDD_GPU 2
BL_PWR C246 1 0.1U_0603_50V4Z~D Q15
21 2
BL_GND PDTC124EU_SC70-3~D
20
2
BL_GND
19 1 2 BIA_PWM_GPU 53
3
BL_PWM LCD_SMBCLK @ R166
@R166
SMBUS_CLK 18 LCD_SMBCLK 40
17 LCD_SMBDAT 0_0402_5%~D
SMBUS_DATA LCD_SMBDAT 40
ALS_VCC 16 +3.3V_RUN
15 ALS_INT# ALS_INT# 39
ALS_INT#
GND 14
CAM_MIC_CBL_DET# 13 CAM_MIC_CBL_DET# 18
12 USBP11_D+
USB+ USBP11_D-
11
USB-
USB_VCC 10 +CAMERA_VDD Q17
9 DMIC_CLK
MIC_CLK DMIC_CLK 29 FDC654P_SSOT6~D
+PWR_SRC
MIC_GND 8
DMIC0 40mil
7
40mil
D
MIC_DAT DMIC0 29
6 6
S
GND +BL_PWR_SRC
5 BREATH_BLUE_LED 4 5
PWR_LED BATT_YELLOW_LED BREATH_BLUE_LED 43
BATT2_LED 4 BATT_YELLOW_LED 43 2
1000P_0402_50V7K~D
3 BATT_BLUE_LED 1
BATT1_LED BATT_BLUE_LED 43
G
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
2 1
GND
1
1 1
3
CONNTST
D49
R167 C247
C248
D48
100K_0402_5%~D 0.1U_0603_50V4Z~D
C I-PEX_20505-044E-011G @ 2 C
@ USBP11+ USBP11_D+ 2
18 USBP11+ 4 3
2
4 3
PWR_SRC_ON
USBP11- 1 USBP11_D-
18 USBP11- 1 2 2 Q18
DLW21SN121SQ2L_4P~D SSM3K7002FU_SC70-3~D
R1028 1 2 100K_0402_5%~D EDP_HPD @ L59
1 2
R457 0_0402_5%~D 1 2 1 3
S
R168 47K_0402_5%~D
1 2
R513 0_0402_5%~D
G
2
@ U50
1
GND VCC
4 +CAMERA_VDD
EN_INVPWR
FDC654P: P CHANNAL
40 EN_INVPWR
2 1 USBP11_D- 2 3 USBP11_D+ Panel backlight power control by EC
+LCDVDD IO1 IO2
R180 0_0402_5%~D
LCD_SMBCLK 2 1 2 1 PRTR5V0U2X_SOT143-4~D
+3.3V_RUN
R548 2.2K_0402_5%~D @ R181 0_0402_5%~D
LCD_SMBDAT 2 1
R549 2.2K_0402_5%~D
@ R995
0_0603_5%~D
1 2
B
For Webcam B
+CAMERA_VDD Q132
R997 PMV45EN_SOT23-3~D
0_0603_5%~D
S
2 1 +CAMERA_VDD_R 3 1 +3.3V_RUN
0.1U_0402_16V4Z~D
10U_1206_16V4Z~D
1 1
2
C249
C250
2 2
1
C1043
0.1U_0402_16V4Z~D
2
+15V_ALW
1
R169
100K_0402_5%~D
2
D
SSM3K7002FU_SC70-3~D
CCD_OFF 2 1
39 CCD_OFF
Q133
G
A C1044 A
S
3
0.1U_0402_25V4Z~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
eDP & CAM Conn
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 24 of 66
5 4 3 2 1
5 4 3 2 1
D D
+3.3V_RUN
AUX/DDC SW for DPB to E-DOCK 2 1
C337
0.1U_0402_16V4Z~D
C272 U86
0.1U_0402_10V7K~D 1 14
DPB_AUX_C BE0 VCC
54 DPB_GPU_AUX/DDC 2 1 2
A0 BE3 13
C C
3 12 DPB_GPU_AUX/DDC
38 DPB_DOCK_AUX B0 A3
4 BE1 B3 11
2 1 DPB_AUX#_C 5 10
54 DPB_GPU_AUX#/DDC A1 BE2
C274 0.1U_0402_10V7K~D
6 9 DPB_GPU_AUX#/DDC
38 DPB_DOCK_AUX# B1 A2
7 GND B2 8
PI3C3125LEX_TSSOP14~D
+5V_RUN
2 1 1 2 DPB_CA_DET
R996 1M_0402_5%~D
C277
1
0.1U_0402_16V4Z~D U8
P
NC
2 4 DPB_CA_DET#
38 DPB_CA_DET A Y
G
NC7SZ04P5X_NL_SC70-5~D
3
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DPB AUX SW for DOCK
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 25 of 66
5 4 3 2 1
2 1
2
0_1206_5%~D
F1 @
R184
1.5A_6V_1206L150PR~D
1
+VDISPLAY_VCC
0.1U_0402_10V7K~D
10U_0805_10V4Z~D
B B
1 1
C1075
C275
U9
2 2
54 DPC_GPU_LANE_P0
C316 2 1 0.1U_0402_10V7K~D DPC_LANE_P0_C 55 IN_P1 OUT1_1P 33 DPC_MB_LANE_P0 C278 2 1 0.1U_0402_10V7K~D MBDP_LANE_P0
C312 2 1 0.1U_0402_10V7K~D DPC_LANE_N0_C 56 32 DPC_MB_LANE_N0 C279 2 1 0.1U_0402_10V7K~D MBDP_LANE_N0
54 DPC_GPU_LANE_N0 IN_N1 OUT1_1N
C309 2 1 0.1U_0402_10V7K~D DPC_LANE_P1_C 1 IN_P2 OUT1_2P 30 DPC_MB_LANE_P1 C280 2 1 0.1U_0402_10V7K~D MBDP_LANE_P1
54 DPC_GPU_LANE_P1 C301 2 1 0.1U_0402_10V7K~D DPC_LANE_N1_C 2 29 DPC_MB_LANE_N1 C281 2 1 0.1U_0402_10V7K~D MBDP_LANE_N1
54 DPC_GPU_LANE_N1 IN_N2 OUT1_2N
C315 2 1 0.1U_0402_10V7K~D DPC_LANE_P2_C 4 25 DPC_MB_LANE_P2 C282 2 1 0.1U_0402_10V7K~D MBDP_LANE_P2 JDP1
54 DPC_GPU_LANE_P2 IN_P3 OUT1_3P
C318 2 1 0.1U_0402_10V7K~D DPC_LANE_N2_C 5 IN_N3 OUT1_3N 24 DPC_MB_LANE_N2 C283 2 1 0.1U_0402_10V7K~D MBDP_LANE_N2 20 DP_PWR
54 DPC_GPU_LANE_N2
19
RTN
C338 2 1 0.1U_0402_10V7K~D DPC_LANE_P3_C 6
IN_P4 OUT1_4P
22 DPC_MB_LANE_P3 C284 2 1 0.1U_0402_10V7K~D MBDP_LANE_P3 DPC_MB_HPD 18
HP_DET
54 DPC_GPU_LANE_P3
54 DPC_GPU_LANE_N3
C322 2 1 0.1U_0402_10V7K~D DPC_LANE_N3_C 7
IN_N4 OUT1_4N
21 DPC_MB_LANE_N3 C285 2 1 0.1U_0402_10V7K~D MBDP_LANE_N3 DPC_MB_AUX# 17
AUX_CH-
16
DPC_MB_AUX GND
15
AUX_CH+
54 DPC_GPU_AUX/DDC
C90 2 1 0.1U_0402_10V7K~D DPC_AUX_C 8 19 DPC_MB_AUX DPC_MB_P14 14
AUXP_S SCL1 GND
54 DPC_GPU_AUX#/DDC
C91 2 1 0.1U_0402_10V7K~D DPC_AUX#_C 9 AUXN_S SDA1 18 DPC_MB_AUX# DPC_MB_CA_DET 13 CA_DET
MBDP_LANE_N3 12 LAN3-
11 LAN3_shield GND 21
DPC_MB_HPD 17 MBDP_LANE_P3 10 22
DPC_DOCK_HPD HPD1 DPC_DOCK_P0 C286 MBDP_LANE_N2 LAN3+ GND
38 DPC_DOCK_HPD 36
HPD2 OUT2_1P
49 2 1 0.1U_0402_10V7K~D 9
LAN2- GND
23
DPC_AUX_C DPC_DOCK_N0 C287 DPC_DOCK_LANE_P0 38
1 2 48 2 1 0.1U_0402_10V7K~D 8 24
C1597 100P_0402_50V8J~D OUT2_1N DPC_DOCK_LANE_N0 38 MBDP_LANE_P2 LAN2_shield GND
7 LAN2+
DPC_MB_CA_DET 26 46 DPC_DOCK_P1 C288 2 1 0.1U_0402_10V7K~D MBDP_LANE_N1 6
DPC_DOCK_CA_DET CAD1 OUT2_2P DPC_DOCK_N1 C289 DPC_DOCK_LANE_P1 38 LAN1-
38 DPC_DOCK_CA_DET 27 CAD2 OUT2_2N 45 2 1 0.1U_0402_10V7K~D 5 LAN1_shield
DPC_DOCK_LANE_N1 38 MBDP_LANE_P1 4
DPC_AUX#_C DPC_DOCK_P2 C290 MBDP_LANE_N0 LAN1+
1 2 OUT2_3P
43 2 1 0.1U_0402_10V7K~D 3
LAN0-
C1598 100P_0402_50V8J~D DPC_GPU_AUX#/DDC 11 DPC_DOCK_N2 C291 DPC_DOCK_LANE_P2 38
42 2 1 0.1U_0402_10V7K~D 2
DPC_GPU_AUX/DDC 10 SDA_S OUT2_3N DPC_DOCK_LANE_N2 38 MBDP_LANE_P0 LAN0_shield
1
SCL_S DPC_DOCK_P3 LAN0+
Place C1597,C1598 close 41 C292 2 1 0.1U_0402_10V7K~D
DP_PRIORITY OUT2_4P DPC_DOCK_N3 C293 DPC_DOCK_LANE_P3 38
to U9 pin8 & pin9 39 DP_PRIORITY 35 40 2 1 0.1U_0402_10V7K~D MOLEX_105088-0001
HPDSEL OUT2_4N DPC_DOCK_LANE_N3 38
2
100K_0402_5%~D
38 DPC_DOCK_AUX
SCL2 DPC_DOCK_AUX# DPC_DOCK_AUX 38
@PAD~D T30 14 37
EQ_S0/SDA_CTL SDA2 DPC_DOCK_AUX# 38
R190
@PAD~D T27 15
OEB/SCL_CNTL
@PAD~D T28 34 12 +3.3V_RUN
DPC_GPU_HPD 53
1
CAD_S
28 T40 PAD~D @
1 2 DPC_MB_AUX#
@PAD~D T37 54 R278 100K_0402_5%~D
CEC_S P1_OC1
P1_OC1 13
@PAD~D T38 52 23 P1_OC0
@PAD~D T39 CEC1 P1_OC0
53 CEC2 +3.3V_RUN
50 P2_OC1 1 2 DPC_GPU_HPD
P2_OC1 P2_OC0 R191 100K_0402_5%~D
+3.3V_RUN 44 47
+3.3V_RUN VDD4 P2_OC0 P1_OC1 2 DPC_DOCK_CA_DET
31 1 1 2
VDD3 @ R1542 4.7K_0402_5%~D R1098 1M_0402_5%~D
20
VDD2 P1_OC0 2
3 51 1 1 2 DPC_MB_AUX
VDD1 Vbias @ R1543 4.7K_0402_5%~D R1024 100K_0402_5%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
39 P2_OC1 2 1 1 2 DPC_MB_CA_DET
GND @ R1544 4.7K_0402_5%~D R185 1M_0402_5%~D
57
GPAD P2_OC0 2
1 1 1 1 1 1 2 DPC_MB_HPD
R1516 4.7K_0402_5%~D R186 100K_0402_5%~D
C92
C104
C98
C107
1 2 DPC_MB_P14
PI3VDP8200ZBEX_TQFN56_8X8~D R797 5.1M_0603_1%~D
2 2 2 2
Reserve for back-up plan
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Display port
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 26 of 66
2 1
2 1
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
+5V_RUN
2
3
@ @ @
D5
D6
D7
+3.3V_RUN
NC
D8
BAT1000-7-F_SOT23-3~D
1
+5V_RUN_CRT
RED_CRT L61 1 2
27NH_LL1608-FSL27NJ_5%~D
GREEN_CRT L62 1 2
27NH_LL1608-FSL27NJ_5%~D +CRT_VCC
5A_125V_R451005.MRL~D
1U_0402_6.3V6K~D
BLUE_CRT L63 1 2
27NH_LL1608-FSL27NJ_5%~D
2
2P_0402_50V8C~D
2P_0402_50V8C~D
2P_0402_50V8C~D
0_1206_5%~D
1
2
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
@ F2
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
1 1 1
R171
C254
1 1 1
C390
C518
C996
R172
R173
R174
2
C251
C252
C253
1
2 2 2
1
2 2 2 JCRT1
6
11
R 1
+5V_RUN_SYNC 7
12
G 2
B B
8 16
2.2K_0402_5%~D
2.2K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
JVGA_HS 13 17
1
B 3
R794
R793
@ R175
@ R176
+CRT_VCC 9
JVGA_VS 14
M_ID2# 4
10
2
15
5
DAT_DDC2_CRT
CLK_DDC2_CRT SUYIN_070546FR015H358ZR~D
1
L11 C258
BLM18AG121SN1D_0603~D
HSYNC_CRT 1 2 HSYNC_L2 1 2 2 0.1U_0402_16V4Z~D
R177 0_0402_5%~D
VSYNC_CRT 1 2 VSYNC_L2 1 2
R178 0_0402_5%~D L12
BLM18AG121SN1D_0603~D
12P_0402_50V8J~D
12P_0402_50V8J~D
1 1
@ C267
@ C268
2 2
2
GPU_CRT_GRN 6 29
53 GPU_CRT_GRN GPU_CRT_BLU A3 VDD
53 GPU_CRT_BLU 7 32
A4 VDD D9
CRT_SWITCH 8 27 VSYNC_BUF SDM10U45-7_SOD523-2~D
SEL1 0B1 HSYNC_BUF
25
1
1B1 RED_CRT
22
GPU_CRT_DAT_DDC 2B1 GREEN_CRT +5V_RUN_SYNC
53 GPU_CRT_DAT_DDC 9 20 1 2 1 2
GPU_CRT_CLK_DDC A5 3B1 BLUE_CRT R179 1K_0402_5%~D
53 GPU_CRT_CLK_DDC 10 18
A6 4B1 DAT_DDC2_CRT C269
12
5B1
1
CRT_SWITCH 30 14 CLK_DDC2_CRT 0.1U_0402_16V4Z~D
39 CRT_SWITCH SEL2 6B1
OE#
P
HSYNC_BUF 2 4 HSYNC_CRT
VSYNC_DOCK A Y
26
0B2 VSYNC_DOCK 38
G
24 HSYNC_DOCK U5
1B2 RED_DOCK HSYNC_DOCK 38 74AHCT1G125GW_SOT353-5~D
3 21
3
A GND 2B2 GREEN_DOCK RED_DOCK 38 A
11 GND 3B2 19 GREEN_DOCK 38
28 17 BLUE_DOCK 1 2
GND 4B2 DAT_DDC2_DOCK BLUE_DOCK 38
31 GND 5B2 13
DAT_DDC2_DOCK 38
1
33 15 CLK_DDC2_DOCK C270
GPAD 6B2 CLK_DDC2_DOCK 38 0.1U_0402_16V4Z~D
OE#
P
PI3V712-AZLEX_TQFN32_6X3~D VSYNC_BUF 2 4 VSYNC_CRT
A Y
G
+3.3V_RUN U6
74AHCT1G125GW_SOT353-5~D
3
SEL1/SEL2 Chanel Source
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0 A=B1 MB
1 1 1 1 1 1
1 A=B2 APR/SPR
C259
C260
C261
C262
C263
C264
2 2 2 2 2 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, CRT/Video switch
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 27 of 66
2 1
5 4 3 2 1
JSATA1
1
1 +3.3V_ALW2
GND
+5V_MOD
15 SATA_ODD_PTX_DRX_P1_C
C311 2 1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_P1 2
RX+
R316
D D
15 SATA_ODD_PTX_DRX_N1_C
C310 2 1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_N1 3
RX-
100K_0402_5%~D
1
2
5
6
4
GND
1000P_0402_50V7K~D
0.1U_0402_16V4Z~D
2
15 SATA_ODD_PRX_DTX_N1_C TX- 100K_0402_5%~D G SI3456BDV-T1-E3_TSOP6~D
1 1 6
TX+
C375 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P1 7 2 MOD_EN 3
15 SATA_ODD_PRX_DTX_P1_C GND
C376
C377
3
DMN66D0LDW-7_SOT363-6~D
ODD_DET# 8 +5V_MOD +5V_RUN
4
2 2 40 ODD_DET# DP
0.1U_0603_50V4Z~D
+5V_MOD 9 PJP15
+5V
Q31B
10 1 2
+5V
10U_0805_10V4Z~D
100K_0402_5%~D
+3.3V_RUN 1 2 11 5 1
MD
1
R1239 10K_0402_5%~D 12 14 1 @ PAD-OPEN 4x4m
GND GND1
6
DMN66D0LDW-7_SOT363-6~D
C378
13 15
4
GND GND2
C379
R318
2
Q31A
TYCO_2-1759838-8
2
39 MODC_EN 2
2
Pleace near ODD CONN
1
Main SATA +5V Default R319
100K_0402_5%~D
2
C C
+3.3V_RUN
Free Fall Sensor HDD PWR
+5V_ALW
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
+15V_ALW
1 1
U139 +3.3V_ALW2
1
C435
C436
DE351DLTR R320
1
2
5
6
2 2 1 100K_0402_5%~D
VDD_IO
1
6 2 D Q32
VDD GND G SI3456BDV-T1-E3_TSOP6~D
4
2
HDD_FALL_INT1 GND R321 HDD_EN_5V
8 5 3
18,40 HDD_FALL_INT1 FFS_INT2 INT 1 GND 100K_0402_5%~D S
9 10
19 FFS_INT2 INT 2 GND
DMN66D0LDW-7_SOT363-6~D
+5V_HDD +5V_RUN
4
3
12 PJP16
SDO
0.1U_0603_50V4Z~D
HDD_SMBDAT @R1555
@ R1555 1 2 0_0402_5%~D HDD_SMBDAT_R 13 1 2
40 HDD_SMBDAT SDA / SDI / SDO
Q34B
10U_0805_10V4Z~D
HDD_SMBCLK @
@R1556
R1556 1 2 0_0402_5%~D HDD_SMBCLK_R 14
40 HDD_SMBCLK SCL / SPC
100K_0402_5%~D
3 +3.3V_RUN 5 1 1 @ PAD-OPEN 4x4m
RSVD
1
8,13,14,15,16 DDR_XDP_SMBDAT
R1549 1 2 0_0402_5%~D 7
CS RSVD
11 Open
6
DMN66D0LDW-7_SOT363-6~D
C382
C383
R322
4
R1550 1 2 0_0402_5%~D
8,13,14,15,16 DDR_XDP_SMBCLK 2 2
Q34A
DE351DLTR8_LGA14_3X5~D
39 HDDC_EN 2
2
1
1
B
+3.3V_RUN For HDD R323
100K_0402_5%~D +5V_HDD Source
B
JSATA2
1 2 HDD_SMBDAT_R 1
2
GND
R445 2.2K_0402_5%~D
15 PSATA_PTX_DRX_P0_C
C308 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_P0 2
RX+
1 2 HDD_SMBCLK_R C307 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_N0 3
15 PSATA_PTX_DRX_N0_C RX-
R463 2.2K_0402_5%~D 4
SATA_PRX_DTX_N0 GND
2 1 5
15 PSATA_PRX_DTX_N0_C TX-
C380 2 1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0 6
15 PSATA_PRX_DTX_P0_C C381 0.01U_0402_16V7K~D TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
15 HDD_DET# GND
13
GND
+5V_HDD 14 5V
15 5V
16 5V
17 GND
FFS_INT2_Q 18 23
Reserved GND1
19 24
GND GND2
20
12V
21
+5V_HDD +3.3V_RUN +5V_HDD 12V
22
12V
TYCO_1775707-3_RV
1000P_0402_50V7K~D
0.1U_0402_16V4Z~D
C385
2
G
A 2 2 A
FFS_INT2 3 1 1 2 FFS_INT2_Q
S
Q118 D10
SSM3K7002FU_SC70-3~D SDM10U45-7_SOD523-2~D DELL CONFIDENTIAL/PROPRIETARY
Pleace near HDD CONN Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT ODD/HDD CONNECTOR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 28 of 66
5 4 3 2 1
2 1
Speaker Connector
15 mils trace JSPK1 +3.3V_RUN +3.3V_RUN
1
INT_SPK_R+ 1
2 2
1
INT_SPK_R- 3
3 Close pin 24 Close pin 18 Close pin 25
INT_SPK_L+ 4 R365 2 1
4
0.1U_0402_10V7K~D
1U_0603_10V6K~D
10U_0805_10V6K~D
0.1U_0402_10V7K~D
1U_0603_10V6K~D
0.1U_0402_10V7K~D
1U_0603_10V6K~D
INT_SPK_L- 5 100K_0402_5%~D L70
5 47UH_CBMF1608T470K_10%~D
19 SPEAKER_DET# 6
6
1 1 1 1 1 1 1
2
7
GND
C429
C458
C428
C398
C397
C431
C463
8 PCH_AZ_CODEC_RST# 1 2 RST#
GND @R50
@ R50 U15
2 2 2 2 2 2 2
100P_0402_50V8J~D
100P_0402_50V8J~D
100P_0402_50V8J~D
100P_0402_50V8J~D
0.1U_0402_10V7K~D
TYCO_1775765-6~D 33_0402_5%~D 1
connector list: 1775765-6 +3.3V_RUN_I2S_VDD 25 5 I2S_DO
AVDD DOUT
C433
27 AUD_DOCK_MIC_IN_L_R
LEFT_LO AUD_DOCK_MIC_IN_R_R
1 1 1 1 18 29
2 DRVDD RIGHT_LO
@ C423
@ C424
@ C425
@ C426
Place close to JSPK1 24
DRVDD
@D1
@ D1 L18 +1.8V_RUN 32 20
2 2 2 2 INT_SPK_R+ INT_SPK_L+ BLM18EG601SN1D_2P~D DVDD NC
1 6 19
V I/O V I/O +3.3V_RUN_IOVDD NC
+3.3V_RUN 1 2 7
IOVDD NC
22
2 5 +5V_RUN 23
Ground V BUS NC
0.1U_0402_10V7K~D
1U_0603_10V6K~D
I2S_BCLK 2 28
INT_SPK_R- INT_SPK_L- I2S_DI# BCLK NC
3 4 1 1 4 11
V I/O V I/O XTALI_12MHZ DIN NC
1 13
MCLK NC
C392
C393
IP4223CZ6_SO6~D 14
AUD_DOCK_HP_L_C NC
10 16
+5V_RUN 2 2 AUD_DOCK_HP_R_C LINEL NC
12 LINER NC 15
L77 30
+3.3V_RUN +3.3V_RUN +CODEC_DVDD_CORE BLM21PG600SN1D_0805~D RST# NC
1 1 31
+VDDA_AVDD RESET#
1 2 17
AVSS1
10U_0805_10V6K~D
0.1U_0402_10V7K~D
1U_0603_10V6K~D
4700P_0402_25V7K~D
C1066
4700P_0402_25V7K~D
C1067
DAI_GPU_R3P_SMBCLK 8 26
SCL AVSS2
1U_0603_10V6K~D
B 1 B
2 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D L3 DAI_GPU_R3P_SMBDAT 9
1 1 SDA DRVSS 21
C403
1 1 1 +VDDA_PVDD 1 2 @ @
U16
C399
C454
BLM21PG600SN1D_0805~D I2S_LRCLK 3 6
2 WCLK DVSS
C405
C402
C404
2 2
0.1U_0402_10V7K~D
1U_0603_10V6K~D
10U_0805_10V6K~D
1 DVDD_CORE AVDD 27 GPAD 33
2 2 2 38
AVDD 1 1 1
9 TLV320AIC3004IRHBR_QFN32_5X5~D
DVDD
C401
C456
C400
39 +3.3V_RUN
PVDD
3 45
DVDD_IO PVDD 2 2 2
13 AUD_SENSE_A
SENSE_A DAI_GPU_R3P_SMBCLK 40,53
PCH_AZ_CODEC_BITCLK 6 14 AUD_SENSE_B
15 PCH_AZ_CODEC_BITCLK HDA_BITCLK SENSE_B R18
X4 DAI_GPU_R3P_SMBDAT 40,53
1 2 PCH_AC_SDIN0_R 8 0_0402_5%~D
15 PCH_AZ_CODEC_SDIN0 HDA_SDI
0.1U_0402_10V7K~D
R332 33_0402_5%~D 28 1 2 4 1
HP0_PORT_A_L AUD_EXT_MIC_L 37 VDD ST/OE
15 PCH_AZ_CODEC_SDOUT 5 29 AUD_EXT_MIC_R 37 1
HDA_SDO HP0_PORT_A_R
C432
23 XTALI_12MHZ 3
VREFOUT_A_or_F +VREFOUT OUT GND 2
15 PCH_AZ_CODEC_SYNC 10 HDA_SYNC
31 12MHZ_15PF_SIT8102AC3333E12T~D Close pin 32
HP1_PORT_B_L AUD_HP_OUT_L 37 2
15 PCH_AZ_CODEC_RST# 11 HDA_RST# HP1_PORT_B_R 32 AUD_HP_OUT_R 37 +1.8V_RUN
PORT_C_L 19
PORT_C_R 20
0.1U_0402_10V7K~D
1U_0603_10V6K~D
VREFOUT_C 24
24 DMIC_CLK 1 2 DMIC_CLK_R 2 1 1
L4 BLM18BB221SN1D_2P~D DMIC_CLK/GPIO1 INT_SPK_L+
24 DMIC0 4 DMIC0/GPIO2 SPKR_PORT_D_L+ 40
150P_0402_50V8J~D
150P_0402_50V8J~D
C430
C459
41 INT_SPK_L- C1893 1 2 1000P_0402_50V7K~D
SPKR_PORT_D_L-
1 1 46
@ @ R1296 DMIC1/GPIO0/SPDIF_OUT_1 C1894 1 2 2
SPKR_PORT_D_R-
43 INT_SPK_R- 2 1000P_0402_50V7K~D @ R1090 10M_0402_5%~D
C676
C679
10U_0805_10V6K~D
1U_0603_10V6K~D
4.7U_0603_6.3V6M~D
@R344
@ R344 @R343
@ R343 4.7U_0603_6.3V6M~D +3.3V_RUN +3.3V_RUN
47_0402_5%~D 10_0402_5%~D 1 1 1 1 20K PORT B (HP1) PORT F
C455
C414
C415
0.1U_0402_16V7K~D
C457
2
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
@C416
@C416 @ C412
@C412 2
C413
0.1U_0402_10V7K~D 10P_0402_50V8J~D 5.11K SPDIFOUT0 SPDIFOUT1 (DMIC0) @ @ @ @
2 2
D17
D18
D19
D55
2.49K Pull-up to AVDD 1 U17
16
1
VCC
I2S_BCLK 2 3
+VDDA_AVDD 1A 1Y# DAI_BCLK# 38
A A
Place closely to Pin 34 I2S_LRCLK 4 5
R346 +VDDA_AVDD 2A 2Y# DAI_LRCK# 38
Place closely to Pin 13. 2.49K_0402_1%~D R347 I2S_DO 6 3A 3Y# 7 DAI_DO# 38
AUD_SENSE_A 2 1 2.49K_0402_1%~D
AUD_SENSE_B 2 1 XTALI_12MHZ 10 9
+3.3V_RUN 4A 4Y# DAI_12MHZ# 38
1000P_0402_50V7K~D
1000P_0402_50V7K~D
+3.3V_RUN
39.2K_0402_1%~D
20K_0402_1%~D
1 1 12 11
5A 5Y#
1
39.2K_0402_1%~D
20K_0402_1%~D
+3.3V_RUN
1
+3.3V_RUN
R348
R349
C417
C420
14 13 I2S_DI#
+3.3V_RUN 6A 6Y#
R352
R351
R350
1
100K_0402_5%~D 2 2
39 EN_I2S_NB_CODEC# 1 OE1#
1
2
R355 2 1 15 8
2
OE2# GND
1
100K_0402_5%~D CD74HC366M96_SO16~D
2
1
37 AUD_MIC_SWITCH 2 5 AUD_HP_NB_SENSE 37,39
Q38A Q38B DAI_DI 38
39 DOCK_HP_DET 2 5 DOCK_MIC_DET 39
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
Q40A Q40B
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Azalia (HD) Codec
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 29 of 66
2 1
5 4 3 2 1
+3.3V_LAN +3.3V_LAN
+3.3V_RUN
R370
10K_0402_5%~D
0_1210_5%~D
10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
@ R75 1 2 TP_LAN_JTAG_TMS +1.05V_M for VC10 not the 1 2 1 1
R699
10K_0402_5%~D
correct or complete
C804
C805
@ R76 1 2 TP_LAN_JTAG_TCK
1
implementation to connect to
0_1210_5%~D
10K_0402_5%~D
2 2
+1.05V SVR.
R371
U79
0.01U_0402_16V7K~D
1 2 LANCLK_REQ#_R
2
15,16 LANCLK_REQ#
1
R1528 0_0402_5%~D 48 13 LAN_TX0+ 1
CLK_REQ_N MDI_PLUS0 LAN_TX0- R72 +3.3V_LAN_R
18 PLTRST_LAN# 36 14
PE_RST_N MDI_MINUS0
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
C1118
D 4.99K_0402_1%~D D
CLK_PCIE_LAN 44 17 LAN_TX1+
16 CLK_PCIE_LAN CLK_PCIE_LAN# PE_CLKP MDI_PLUS1 LAN_TX1- 2 Trace=12mil
16 CLK_PCIE_LAN# 45 18 1 1
2
PCIE
PE_CLKN MDI_MINUS1
MDI
C466
C465
16 PCIE_PRX_GLANTX_P6 2 1 PCIE_PRX_GLANTX_P6_C 38 20 LAN_TX2+
C451 0.1U_0402_10V7K~D PETp MDI_PLUS2 LAN_TX2-
39 21
PETn MDI_MINUS2
3
2 1 PCIE_PRX_GLANTX_N6_C Trace=12mil 2 2
+3.3V_LAN 16 PCIE_PRX_GLANTX_N6 LAN_TX3+
C452 0.1U_0402_10V7K~D 41 23
16 PCIE_PTX_GLANRX_P6_C PERp MDI_PLUS3 LAN_TX3- REGCTL_PNP10 R73 1
16 PCIE_PTX_GLANRX_N6_C 42 24 2 1
PERn MDI_MINUS3 0_0402_5%~D
1
Q45
R44 LAN_SMBCLK 28 6 DCP69A-13_SOT223-3~D
16 LAN_SMBCLK
2
4
SMBUS
10K_0402_5%~D LAN_SMBDATA SMB_CLK VCT +1.05V_M
16 LAN_SMBDATA 31 SMB_DATA
1 +RSVD_VCC3P3_1 R70 2 1 3.01K_0402_1%~D +1.0V_LAN @ R119
RSVD_VCC3P3_1 +3.3V_LAN
SMBus Device Address 0xC8 2 +RSVD_VCC3P3_2 R1291 2 1 3.01K_0402_1%~D 0_0805_5%~D
2
RSVD_VCC3P3_2
VDD3P3_IN 5 1 2
10U_0805_10V4Z~D
0.1U_0402_10V7K~D
1 2 LAN_DISABLE#_R 3
19 PM_LANPHY_ENABLE LAN_DISABLE_N +3.3V_LAN_OUT
R42 0_0402_5%~D 4 1 1
VDD3P3_OUT
C474
39 LAN_DISABLE#_R
C806
15 +3.3V_LAN_OUT_R 2 1 1
VDD3P3_15
1
LED
10K_0402_5%~D LOM_SPD10LED_GRN# 25 1U_0603_10V6K~D
LED2 2
47 +1.0V_LAN +1.0V_LAN
2
VDD1P0_47
VDD1P0_46 46
PAD~D @ TP_LAN_JTAG_TDI 32 37 +1.0V_LAN_4 2 1
T176 JTAG_TDI VDD1P0_37
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PAD~D @ TP_LAN_JTAG_TDO 34 R694 0_0603_5%~D
T177 JTAG_TDO
JTAG
TP_LAN_JTAG_TMS 33 43 +1.0V_LAN_3 2 1
TP_LAN_JTAG_TCK JTAG_TMS VDD1P0_43 R695 0_0603_5%~D
35 1 1 1 1
JTAG_TCK +1.0V_LAN_2
11 2 1
VDD1P0_11
C800
C801
C802
C803
R696 0_0603_5%~D
C C427 2 XTALO C
1 10P_0402_50V8J~D 9
XTAL_OUT VDD1P0_40
40
XTALI 2 2 2 2
10 XTAL_IN VDD1P0_22 22
Y2 16
25MHZ_18PF_1Y725000CE1A~D VDD1P0_16
VDD1P0_8 8
1 2 LAN_TEST_EN 30 TEST_EN
33P_0402_50V8J~D
33P_0402_50V8J~D
RES_BIAS 12 7 REGCTL_PNP10
RBIAS CTRL_1P0
2 1
1K_0402_5%~D
C476
3.01K_0402_1%~D
1
C475
R1200
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
WG82577LM-QLDT-A2_QFN48_6X6~D
1 2
R59
0.1U_0402_10V7K~D
1 1 1 1
C477
C478
C479
C480
2
2 2 2 2
Need to verify A3 silicon drive R1200 Resistor Value:
power before removing C427 3.01 kohm for Hanksville-M LOM +3.3V_M
2.37 kohm for Hanksville-D LOM
2
@ R373
+3.3V_LAN 0_1210_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2 2 2
+3.3V_ALW +3.3V_LAN
C460
C461
C462
Q2
LAN ANALOG SI3456BDV-T1-E3_TSOP6~D
B 1 1 1 +15V_ALW B
SWITCH
D
6
S
+3.3V_ALW2 5 4
39
30
21
14
8
4
1
1
U25 2
10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
R1310 1 1 1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
38 SW_LAN_TX0+ 100K_0402_5%~D
G
B0+ SW_LAN_TX0+ 37
C482
C481
37 SW_LAN_TX0-
SW_LAN_TX0- 37
3
B0-
1
LAN_TX0+ 1 2 LAN_TX0+R 2
2
L20 22NH_0603CS-220EJTS_5%~D A0+ SW_LAN_TX1+ R1311 ENAB_3VLAN 2 2
34 SW_LAN_TX1+ 37
LAN_TX0- LAN_TX0-R B1+ SW_LAN_TX1- 100K_0402_5%~D
1 2 3
A0- B1-
33 SW_LAN_TX1- 37
DMN66D0LDW-7_SOT363-6~D
2200P_0402_50V7K~D
L21 22NH_0603CS-220EJTS_5%~D
29 SW_LAN_TX2+
2
B2+ SW_LAN_TX2+ 37
Q184B
LAN_TX1+ 1 2 LAN_TX1+R 6 28 SW_LAN_TX2- 1
L22 22NH_0603CS-220EJTS_5%~D A1+ B2- SW_LAN_TX2- 37
5
C1414
LAN_TX1- 1 2 LAN_TX1-R 7 25 SW_LAN_TX3+
A1- B3+ SW_LAN_TX3+ 37
DMN66D0LDW-7_SOT363-6~D
L23 22NH_0603CS-220EJTS_5%~D 24 SW_LAN_TX3-
SW_LAN_TX3- 37
4
B3- 2
Q184A
LAN_TX2+ 1 2 LAN_TX2+R 9 17 LAN_ACTLED_YEL#
A2+ LEDB0 LED_100_ORG# LAN_ACTLED_YEL# 37
L24 22NH_0603CS-220EJTS_5%~D 18 R2 1 2 2
LAN_TX2- LAN_TX2-R LEDB1 LED_10_GRN# LED_100_ORG# 37 40 AUX_ON
1 2 10 41 0_0402_5%~D
A2- LEDB2 LED_10_GRN# 37
L25 22NH_0603CS-220EJTS_5%~D
1
36 DOCK_LOM_TRD0+ 1 2
LAN_TX3+ 1 LAN_TX3+R C0+ DOCK_LOM_TRD0- DOCK_LOM_TRD0+ 38 17,39 SIO_SLP_LAN#
2 11 35 @ R47 0_0402_5%~D
A3+ C0- DOCK_LOM_TRD0- 38
L26 22NH_0603CS-220EJTS_5%~D
LAN_TX3- 1 2 LAN_TX3-R 12 32 DOCK_LOM_TRD1+
A3- C1+ DOCK_LOM_TRD1+ 38
L27 22NH_0603CS-220EJTS_5%~D 31 DOCK_LOM_TRD1-
C1- DOCK_LOM_TRD1- 38
DOCKED 13 27 DOCK_LOM_TRD2+
39 DOCKED SEL C2+ DOCK_LOM_TRD2- DOCK_LOM_TRD2+ 38 +3.3V_LAN
26
C2- DOCK_LOM_TRD2- 38
LOM_ACTLED_YEL# 15 23 DOCK_LOM_TRD3+
LOM_SPD100LED_ORG# LEDA0 C3+ DOCK_LOM_TRD3- DOCK_LOM_TRD3+ 38
16 LEDA1 C3- 22 DOCK_LOM_TRD3- 38
A LOM_SPD10LED_GRN# A
Layout Notice : Place bead as 42 LEDA2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
19 DOCK_LOM_ACTLED_YEL#
close PI3L720 as possible LEDC0 DOCK_LOM_ACTLED_YEL# 38
1
5 20 DOCK_LOM_SPD100LED_ORG#
PD LEDC1 DOCK_LOM_SPD10LED_GRN# DOCK_LOM_SPD100LED_ORG# 38
40 @ @ @
LEDC2 DOCK_LOM_SPD10LED_GRN# 38
R392
R393
R394
43 PAD_GND DELL CONFIDENTIAL/PROPRIETARY
1: TO DOCK 2
2
FROM NIC DOCKED
0: TO RJ45
Compal Electronics, Inc.
PI3L720ZHEX_TQFN42_9X3P5~D TO Title
LOM_ACTLED_YEL#
DOCK LOM_SPD10LED_GRN# Intel 82577/82578 (Hanksville) / LAN SW
LOM_SPD100LED_ORG# Size Document Number Rev
A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 30 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW JTAG_CLK_USH
+3.3V_ALW
@
R895
1 2 PLTRST1#_USH 0_0402_5%~D
@ R1059 10K_0402_5%~D 1 2 JTAG_RST#_USH 1 2 RST_N 1 2
1 2 USH_LPCEN R737 1K_0402_5%~D R810 4.7K_0402_5%~D U32D
5@ R841 4.7K_0402_5%~D 2 USH_LPCEN 2 OVSTB JTAG_TDI_USH
@ R474
1 2 LPD#
4.7K_0402_5%~D
1
6@ R483 4.7K_0402_5%~D
1
R484
1
4.7K_0402_5%~D
2 FP_RESET# REF_XIN G14
BCM5882 D4 UART_TX/GPIO1
REFCLK_XTALIN UART_TX_GPIO_1
1 2 IRQ_SERIRQ_R R1034 4.7K_0402_5%~D JTAG_TDO_USH REF_XOUT F14 REFCLK_XTALOUT UART_RX_GPIO_0 C4 UART_RX/GPIO0
@
R843 4.7K_0402_5%~D R896 B3
UART
USH_SMBCLK U32A 0_0402_5%~D UART_CTS_GPIO_2 CLKDIV1 FP_RESET# 37
1 2 UART_RTS_GPIO_3 A3
CLK
R490 2.2K_0402_5%~D RST_N
R626
1 2 USH_SMBDAT
2.2K_0402_5%~D R468 1 2 0_0402_5%~D USBP7-_R P5
BCM5882 P7 FP_USBD-
1
JTAG_TMS_USH
2 G1 RST_N
@
R630 4.7K_0402_5%~D P11 R897 JTAG_TDI_USH M1 J1 CONTACTLESS_DET#
USBH_OC1 USBH_DN_1 0_0402_5%~D JTAG_TDO_USH JTAG_TDI GPIO_4 SCC_CMDVCC_N_R
1 2 P12 N1 D2
JTAG
R637 4.7K_0402_5%~D CLK_PCI_TPM USBH_UP_1 USBH_OC1 JTAG_TMS_USH JTAG_TDO GPIO_14 BCM5882_GPIO15
16 CLK_PCI_TPM P2 LCLK USBH_OC_1 P10 1 2 N2 JTAG_TMS GPIO_15 C2
15,32,39,40 LPC_LAD0 LPC_LAD0 R615 1 2 0_0402_5%~D N3 JTAG_RST#_USH L3 B1 CLKDIV2
+3.3V_ALW_PCH LPC_LAD1 R618 1 LAD0_GPIO_20 JTCE_USH JTCE_USH JTAG_TRSTN GPIO_16
15,32,39,40 LPC_LAD1 2 0_0402_5%~D M4 LAD1_GPIO_21 L2 JTCE
15,32,39,40 LPC_LAD2 LPC_LAD2 R619 1 2 0_0402_5%~D K5
LPC_LAD3 R620 1 LAD2_GPIO_22
2 0_0402_5%~D N4 G3 SPI_CLK UART_RX/GPIO0 D3 CLKOUT
@
15,32,39,40 LPC_LAD3 LAD3_GPIO_23 SSP_CLK0_GPIO_6 CLKOUT T154 PAD~D
2
@
15,32,39,40 LPC_LFRAME# LPC_LFRAME# R621 1 2 0_0402_5%~D K4 G2 SPI_CS R894 @ R899 OVSTB E1
LFRAME_N_GPIO_18 SSP_FSS0_GPIO_7 OVSTB
4.7K_0402_5%~D
H2 SPI_TXD 1 2 C1 SPI_RST
SSP_TXD0_GPIO_9 RSTOUT_N
R1515
SPI
USH_LPCEN M5 C3 BCMGPIO_10 UART_TX/GPIO1 @ T158PAD~D
@@@@
T145PAD~D
LPC
1
R466 1 LPCEN SSP_CLK1_GPIO_10
32,39 SP_TPM_LPC_EN 2 0_0402_5%~D LPD# N6 LPCPD_N_GPIO_24 SSP_FSS1_GPIO_11 B2 BCMGPIO_11 T148PAD~D
A2 BCMGPIO_12 SBOOT E2 J13 POR_MONITOR
@
T149PAD~D T156PAD~D
1
S
A1 BCMGPIO_13 T150PAD~D HF_RX_TEST0
SSP_TXD1_GPIO_13
Q209
@
G
2 USH_SMBCLK M9 R907
40 USH_SMBCLK SMBCLK
USH_SMBDAT L9 0_0402_5%~D USH_TESTMODE D1 K11 SWV
@
40 USH_SMBDAT SMBDAT TESTMODE SWV T155PAD~D
D BCM5882_ALERT# K9 1 2
1
39 BCM5882_ALERT# SMBALERT_N
SSM3K7002FU_SC70-3~D
Smard Card
SC_DET R1460 1 2 150_0402_5%~D M7 M11 R472 2 1 0_0402_5%~D BCM5882_SCCLK
1K_0402_5%~D
SMB_GPIO_0 SC_CLK
1
2
D SMB_GPIO1 R533 2 AUX1UC HF_RX_TEST1 POR_EXTR PLL_TESTOUT
N8 M12 1 0_0402_5%~D J14 C13
@
PAD~D T147 SMB_GPIO_1 SC_FCB POR_EXTR PLL_TESTOUT T157PAD~D
Q210
@R1522
@
2 USB_GPIO27 F2 R767 2 1 0_0402_5%~D BCM5882_GPIO25
SC_SEL5V_GPIO_25
R1522
G F1 R766 2 1 0_0402_5%~D BCM5882_GPIO26 HF_RX_TEST2
SC_SEL18V_GPIO_26
@
USH_PWR_STATE#_R R774 2 1 0_0402_5%~D BCM5882_SCDET R908
SM BUS
S 39 USH_PWR_STATE# 1 2 L7 M2
3
1
1.5K_0402_5%~D SC_IO R771 2 BCM5882_SCRST
1 2 K1 IDDQ_EN SC_RST M10 1 0_0402_5%~D 1 2
R738 1K_0402_5%~D N14 +SC_PWR
USB_GPIO27 1 R482 SC_PWR_N14 HF_RX_TEST3
2 1 2 P1 CORE_PWRDN SC_PWR_P14 P14
@ 0_0402_5%~D CLK_PCI_TPM R739 1K_0402_5%~D L10 SC_TEST 2 1 SCC_CMDVCC_N U32C
SC_VCC R775
1 2 E12 ALDO_PWRDN
BCM5882
1
10_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6M~D
10U_0603_6.3V6M~D
Y3 2 E9 HF_RX_TEST3
HF_RX_TEST3
4.7K_0402_5%~D
5.1M_0402_5%~D
XI 1 3 XO
IN OUT
2
C589
2 2 1 2 2 1 1 +2.5V_ALW_AVDD C6 D7 +RFID_AVDD1P2
HF_RFIDTAG_AVDD2P5_C6 HF_TX_AVDD1P2
R485
R476
C1176
C1177
2 GND GND 4 E6 HF_RFIDTAG_AVDD2P5_E6 HF_RX_AVDD1P2 F8
1
C601
C602
C605
C606
C1021
1 1 HF_RX_ADC_AVDD1P2 D10
27.12MHZ_12PF_1N227120CC0B~D SCC_CMDVCC_N_R 2 1 SCC_CMDVCC_N
C608 C609 @ R776 0_0402_5%~D 1 1 2 1 1 2 2 +RFID_AVDD2P5
F9
1
12P_0402_50V8J~D 15P_0402_50V8J~D HF_RX_AVDD2P5
D6 HF_RFIDTAG_AVSS_D6 HF_TX_AVDD2P5 A7
2 2
Disable RFID: pop R1061-R1065 B5 HF_RFIDTAG_AVSS_B5
SBOOT D8 +RFID_AVDD3P3
+3.3V_ALW POR_EXTR HF_TX_AVDD3P3_D8
A4 B7
Smart Card HF_RFIDTAG_DVSS HF_TX_AVDD3P3_B7
2 3.3M_0402_5%~D
+3.3V_ALW
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V6M~D
HF_TX_AVSS_C7 C7
R488
1 2 PORADJ 1 1 1 HF_TX_AVSS_C8 C8
C622
C620
+5V_ALW
15K_0402_1%~D
1 2 PORADJ @ R538 4.7K_0402_5%~D
HF_TX_AVSS_E7 E7
1
C706
10U_0805_10V6M~D
R555
R532 4.7K_0402_5%~D B11
C639 HF_RX_AVSS_B11
2 1
U33 1U_0603_10V7K~D E8
2
HF_RX_ADC_AVSS1
C1014
C709
1 RFREADER_RXP 1 2 RFREADER_RXP_C D9
B PORADJ VDD(intf) L71 HF_RX_ADC_AVSS2 B
18 PORadj VDD 17
CLKDIV1 1 2 150NH_LLQ1608-FR15G_2%~D
6 CLKDIV1 +3.3V_ALW 3
CLKDIV2 7 16 1 RFREADER_TXP1 1 2 BCM5882KFBG_FBGA196~D
CLKDIV2 VDDP
2
390P_0603_50V8G~D
390P_0603_50V8G~D
BCM5882_SCRST 3 15 +SC_VCC 1 1
RSTIN VCC
C1070
C1887
SCC_CMDVCC_N 5 @ D31 DA204U_SOT323-3~D +3.3V_ALW 3
BCM5882_GPIO25 CMDVCCN R773 0_0402_5%~D SC_RST
2 EN_5V/3VN RST 14 1 2 1
BCM5882_GPIO26 4 13 R772 1 2 47_0402_5%~D SC_CLK 3 2
AUX1UC
AUX2UC
21
EN_1.8VN
AUX1UC
CLK
I/O
AUX1
9
10
R491
R493
R492
1
1
2
2
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
SC_IO
SC_C4
SC_C8
+3.3V_ALW
2
1
@ D32
DA204U_SOT323-3~D
2 2
RFID
22 11 1 2
@
10P_0402_50V8J~D
15K_0402_1%~D
BCM5882_SCCLK 23 24 RFREADER_TXN1_PI 2
XTAL1 XTAL2 +SC_VCC RFREADER_TXP1, and ESD diodes should be placed 2
2 2 3 3
1
between Pi filter and connector.
.47U_0402_6.3V6-K~D
C633
C1015
25 GPAD GND 12 4 4
R633
RFID MODE RFREADER_TXP1_PI 5 7
5 G1
TDA8034HN_HVQFN24_4X4~D 1 15,19 CONTACTLESS_DET# 6 6 G2 8
1 1
Component VOLTAGE CURRENT
C718
2
regular SC trace width to carry R494,R498 NOPOP 3K L72
2 150NH_LLQ1608-FR15G_2%~D
+SC_VCC ~60mA max. current per ISO spec R555,R633 3K NOPOP RFREADER_TXN1 1 2
Connector list: 2041084-6
390P_0603_50V8G~D
390P_0603_50V8G~D
C1031 and C646 should be placed +3.3V_ALW
0.1U_0402_16V4Z~D
0.22U_0402_6.3V6K~D
C1071
C1888
+3.3V_ALW 3
Place C718 close +3.3V_ALW C641,C647 NOPOP 150P 1
1 1 1
@ C1031
C644
to U33 pin15 2
2 2 Hardware enable for USH TPM:Populate D70 & R841,
C646
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
1U_0603_10V6K~D
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
1U_0603_10V6K~D
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
SC_IO
SC_C8
4
3
4 4 GND DIO 5 SPI_TXD M45PE16-VMW6TG_SO8W8~D
1 2 1 2 2 1 1 1 1
Compal Electronics, Inc.
3
C626
SC_DET 2 Title
2
C631
C624
C625
C630
C632
C627
C628
C629
1 2 1 W25X32VSSIG_SO8~D BCM5882_GPIO15 1 2
1 R341 4.7K_0402_5%~D USH BCM5882 (1/2)
R1468 FCI_10089709-010010LF~D 2 1 2 1 1 2 2 2 2 Size Document Number Rev
1.5K_0402_5%~D A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 31 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW +1.2V_ALW_PLL
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
U32B
1 1 1
BCM5882
C1178
2 2 2 2 2 2 2 1
C1179
C592
C593
+1.2V_ALW_PLL H14 AVDD_1P2I_REF
C613
C614
C615
C616
C617
C618
C619
+1.2V_ALW_AVDD A11 AVDD_1P2O_A11
2 2 2 A12 C11
1 1 1 1 1 1 1 2 AVDD_1P2O_A12 AVSS_LDO12
+2.5V_ALW_AVDD
H13 B13
AVDD_2P5I AVSS_LDO25_B13
E10 C12
D +3.3V_ALW AVDD_2P5O_E10 AVSS_LDO25_C12 D
E11
AVDD_2P5O_E11
B14
AVSS_PLL
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
A13
AVDD25_LDO12_A13
4.7U_0603_6.3V6M~D
B12 F13
AVDD25_LDO12_B12 AVSS_REF
2 2 2 2 2 2 2
1 D12
PLL_AVSS
C621
C635
C636
C637
C638
C875
C612
A14
AVDD25_PLL_A14
C1017
E13
1 1 1 1 1 1 1 PLL_DVSS
2
D11
AVDD33_LDO25
POR_AVSS G13
+SC_PWR P13 OTP_PWR
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PD R922 @ @ POP H3 VDDO_33CORE_H3 VSSC_H11 H11
H4 VDDO_33CORE_H4 VSSC_H12 H12
2 2 2 2 J3 VDDO_33CORE_J3 VSSC_J9 J9
VSSC_J12 J12
C596
C597
C598
C599
M13 K2
VDDO_33SC_M13 VSSC_K2
N13 K6
1 1 1 1 VDDO_33SC_N13 VSSC_K6
K13
VSSC_K13
L6 K14
VDDO_LPC_L6 VSSC_K14
M6 L5
VDDO_LPC_M6 VSSC_L5
M8
VSSC_M8
M14
VSSC_M14
K10 N9
VDDO_SC_K10 VSSC_N9
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
LOW:Power Down Mode K12
L12
VDDO_SC_K12 VSSC_N11
N11
N12
VDDO_SC_L12 VSSC_N12
High:Working Mode L13 P3
China TPM: ZTE & Jetway co-lay 2 2 1 VDDO_SC_L13 VSSC_P3
C1180
P4
VSSC_P4
C873
C877
D5
VDDO_VAR_D5
E5
+3.3V_RUN 1 1 2 VDDO_VAR_E5
N5 VESD
3@ U24
10 BCM5882KFBG_FBGA196~D
VDD_0
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0603_6.3V6M~D
VDD_1 19
VDD_2 24
B B
2 2 2 1
3@ 3@ 3@ 3@
C1171
C1172
C1173
C1174
3@ R893 1 2 0_0402_5%~D C_TPM_LPC_EN28
31,39 SP_TPM_LPC_EN LPC_LAD0_R LPCPD#
3@ R901 1 2 0_0402_5%~D 26 11
15,31,39,40 LPC_LAD0 LAD0 GND_11 1 1 1 2
3@ R902 1 2 0_0402_5%~D LPC_LAD1_R 23 18
15,31,39,40 LPC_LAD1 LPC_LAD2_R LAD1 GND_18
3@ R903 1 2 0_0402_5%~D 20 25
15,31,39,40 LPC_LAD2 LPC_LAD3_R LAD2 GND_25
3@ R904 1 2 0_0402_5%~D 17 4
15,31,39,40 LPC_LAD3 LAD3 GND_4
21 5 JETWAY_PIN5
16 CLK_PCI_TPM_CHA LCLK NC_5
3@ R905 1 2 0_0402_5%~D LPC_LFRAME#_R 22 12
15,31,39,40 LPC_LFRAME# PCI_RST#_R LFRAME# NC_12 JETWAY_CLK14M
3@ R906 1 2 0_0402_5%~D 16 13
8,18,34,36,39,40 PCH_PLTRST#_EC LRESET# NC_13 JETWAY_CLK14M 16
+3.3V_RUN 27
15,31,39,40 IRQ_SERIRQ SERIRQ
3@ R909 1 2 0_0402_5%~D CLKRUN#_R 15 1
17,39,40 CLKRUN# CLKRUN# NC_1
1 2 7 2 +3.3V_RUN
@ R1210 4.7K_0402_5%~D TCM_BA1 PP NC_2
3 BA_1 NC_6 6
TCM_BA0 9 8
BA_0 NC_8
1U_0402_6.3V6K~D
NC_P 14
1
10K_0402_5%~D
10K_0402_5%~D
@ R1022
@ R1025
1 3@
C23
2
SSX44-B_TSSOP28~D 2
JETWAY_PIN5 TCM_BA0
TCM_BA1
2
@ C1175
@C1175 TCM Vender POP
1K_0402_5%~D
3@ R1023
1K_0402_5%~D
3@ R1026
0.1U_0402_16V4Z~D
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USH BCM5882 (2/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 32 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
+CBS_VCC
1U_0402_6.3V6K~D
1
1@ C495
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
2
1@ C496
1 1 @
+5V_RUN
C497
1@ U27
2 2
1U_0402_6.3V6K~D
11 9
VCC3IN VCCOUT
1@ C498
1 14
D VCCOUT D
12
VCCOUT
13
2 VCC5IN
15
VCC5IN +CBS_VPP
VPPEN0 3 8
34 VPPEN0 EN0 VPPOUT
0.1U_0402_16V4Z~D
0.01U_0402_16V7K~D
VPPEN1 4
34 VPPEN1 EN1
1 1
1@ C499
@
C500
Crystal close to U94 VCC3EN# 2
34 VCC3EN# VCC5EN# VCC3_EN
2 1 34 VCC5EN# 1
VCC5_EN 2 2
C514 C645,Close to U94.C10
15P_0402_50V8J~D
2
+3.3V_RUN C603,Close to U94.J4/K3 5 7
X3 U94A FLG NC
16 GND NC 6
24.57MHZ_12PF_X5H024576FC1HH~D NC 10
30ppm C695,Close to U94.M13
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C515
1
15P_0402_50V8J~D R5U241_XI A8 C10 1 1
2 1 2 R421 1 R5U241_XO B8
XI VCC_3V0
J4
C697,Close to U94.M11/N11 R5531V002-E2-FA_SSOP16~D
XO VCC_3V1 C698,Close to U94.J3
C603
C645
100_0402_5%~D K3
TPAP0 VCC_3V2
A5
TPAP0 2 2
C699,Close to U94.C8
TPAN0 B5
+3.3V_RUN TPBIAS0 TPAN0 JSD1
C7 TPBIAS0
TPBP0 A6
TPBN0 TPBP0 +PCIE_PHY SDDAT3/MMCDAT3
B6 TPBN0 14 DAT3/SD1
1 2 CPS D4 SDCMD/MMCCMD 12
R1146 0_0402_5%~D CPS CMD/SD2
PCIE_VOUT0 C8 10 VSS1/SD3
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
J3 +3.3V_RUN_CARD 9
PCIE_VOUT1 SDCLK/MMC_CLK VCC/SD4
16 CLK_PCIE_PCM N8 1 1 1 1 1 8
REFCLKP CLK/SD5
16 CLK_PCIE_PCM# M8 6
REFCLKN GND/VSSS2/SD6
C695
C697
C698
C699
M13 C700 SDDAT0/MMCDAT0 4
PCIE_VIN0 DAT7/SD7
10P_0402_50V8J~D
C PCIE_PRX_PCMTX_P3_C N12 10U_0805_10V4Z~D SDDAT1/MMCDAT1 C
C710,C713 as close 16 PCIE_PRX_PCMTX_P3
C710 1 2 0.1U_0402_10V7K~D TXP PCIE_VIN1
M11
2 2 2 2 2
3
DAT1/SD8
C713 1 2 0.1U_0402_10V7K~D PCIE_PRX_PCMTX_N3_C N13 N11 1 SDDAT2/MMCDAT2 15
as possible to U94 16 PCIE_PRX_PCMTX_N3 TXN PCIE_VIN2 DAT2/SD9
C491
MMCDAT4 13
MMCDAT5 DAT4/MMC10
16 PCIE_PTX_PCMRX_P3_C N10 RXP 11 DAT5/MMC11
2 MMCDAT6
16 PCIE_PTX_PCMRX_N3_C M10 RXN PCIe / Power / 7 DAT6/MMC12
MMCDAT7 5
1394 / MultiCard DAT7/MMC13
AVCC_3V D7 +3.3V_RUN
1U_0402_6.3V6K~D
0.1U_0402_16V4Z~D
PLTRST_R5U242# M12 1 1 SDCD#/MMCCD# 17
18 PLTRST_R5U242# PERST# +3.3V_RUN_CARD CD_SW/SD
RXC L9 SDWP# 18
RXC +3.3V_RUN_CARD WP_SW/SD
C701
C702
CPO L10 SDCD#/MMCCD# 2
RREF CPO SDWP# CD_SW_TAISOL/SD
L11 1
RREF 2 2 WP/SW_TAISOL/SD
47U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
150K_0402_5%~D
0.1U_0402_16V4Z~D
D13
MF_VOUT
0.022U_0402_16V7K~D
1 1 1 16
GND_SW
1
1
1500P_0402_7K~D
1 1 SDWP# H13
MFIO00
C21
C767
R1464
C703
R1148 SDDAT1/MMCDAT1 1 2 SDDAT1/MMCDAT1_RH12
MFIO01
C707
C705
1U_0402_6.3V6K~D
R35 0_0402_5%~D MMCDAT7 G12 20
2 2 MMCDAT6 MFIO03 CD_WP_SW/GRD
R8 Close to U94 F13 K11 1 C703,Close to U94.D13
2
2
MFIO04 AGND0
C1890
SDCLK/MMC_CLK 1 2 SDCLK/MMC_CLK_R F12 L12 FOX_2WX131A1-31DD-7F~D
SDCLK/MMC_CLK R8 0_0402_5%~D D12
MFIO05 AGND1
A7
need shield GND MMCDAT5 MFIO06 GND0
D10 B7
SDCMD/MMCCMD SDCMD/MMCCMD_R C13 MFIO07 GND1 2
1 2 C6 Place close to JSD1.9
MMCDAT4 MFIO08 GND2
R34 0_0402_5%~D C12
MFIO09 GND3
D11 only for MMC/SD
C707,C705,R1148 as close SDDAT3/MMCDAT3 1 2 SDDAT3/MMCDAT3_RB13 E12
SDDAT2/MMCDAT2 R32 SDDAT2/MMCDAT2_RC11 MFIO10 GND4 C21 need to change to 47uF for R5U242 (SDXC)
as possible to U94 1 2 0_0402_5%~D MFIO11 GND5 E13 R46:
R31 0_0402_5%~D A13 K4
B12
MFIO12 GND8
L8
For R5U241 should be 0 ohm,
MFIO13 GND9 R5U242 should be 1uF
A12 MFIO14 GND10 M9
GND11 N9
0.33U_0603_10V7K~D
SDCD#/MMCCD# F11 L5 2A currect caoacity request between TPBIAS0
MFCD0# GND12
56.2_0402_1%~D
56.2_0402_1%~D
B B
G11 R5U242 and SD slot 1
MFCD1#
1
1@ R802 G10
MFCD2#
R398
R399
C493
0_0402_5%~D
2 1 USBP10-_R1 H1
18 USBP10- USBDP 2
2 1 USBP10+_R1 H2
18 USBP10+ USBDM J1394
2
2@ R671 1@ R803 R5U242-CSP144P_CSP144~D 1
0_0402_5%~D 0_0402_5%~D TPAP0 1
2
TPAN0 2
34 USBP10-_EXP 2 1 3
TPBP0 3
34 USBP10+_EXP 2 1 4
4
2@ R745 TPBN0 5
0_0402_5%~D 5
6
19 1394_DET# 6
1
1
7
R403 R401 GND
8
56.2_0402_1%~D 56.2_0402_1%~D GND
TYCO_1775765-6~D
2
MFIO Pin Assignment Table
2
Z3008 connector list: 1775765-6
2
MFIO SD8 XD MS8 2
R407
00 WP D7 BS C494 5.1K_0402_1%~D
01 D1 D6 - 270P_0402_50V7K~D
1
02 D0 D5 D1
1
Close to U94
03 D7 D4 -
04 D6 D3 D5
05 CLK D2 D0
06 - D1 -
A A
07 D5 D0 D4
08 CMD WP# D2
09 D4 WE# D6
10 D3 ALE D3 DELL CONFIDENTIAL/PROPRIETARY
11 D2 CLE -
12 - CE# - Compal Electronics, Inc.
13 - RE# D7 Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
14 - R/B# CLK TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT R5U242 (1/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Date: Wednesday, January 20, 2010 Sheet 33 of 66
5 4 3 2 1
5 4 3 2 1
+1.5V_CARD
+1.5V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_6.3V6M~D
U94B +3.3V_SUS +3.3V_RUN
0.1U_0402_16V4Z~D
2@ C997
2@ C999
2@ C1000
2@ C1012
1 1 1 1 +3.3V_CARD
L2 CBS_CAD19
CADR25 CBS_CAD17
C9 GND CADR24 K2
0.1U_0402_16V4Z~D
2@ C134
0.1U_0402_16V4Z~D
2@ C135
A10 H4 CBS_CFRAME# 1 1
GND CADR23 2 2 2 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_6.3V6M~D
A9 J1 CBS_CTRDY# 2@ U52
+3.3V_RUN GND CADR22 CBS_CDEVSEL#
B9 G3 12 11
GND CADR21 1.5Vin 1.5Vout
2@ C1001
2@ C1002
2@ C1003
B11 F3 CBS_CSTOP# 14 13 1 1 1
GND CADR20 CBS_CBLOCK# 2 2 1.5Vin 1.5Vout
A11 G2
GND CADR19
1
D CBS_DATA18 D
CADR18
F2 R410 Close to U94, CBS_CCLK need shield GND.
R1151 E2 CBS_CAD16 2 3
47K_0402_5%~D CADR17 CBS_CCLK_R CBS_CCLK 3.3Vin 3.3Vout 2 2 2
H10 H3 2 1 4 5
NC CADR16 CBS_CIRDY# 1@ R410 3.3Vin 3.3Vout
B10 J2
R81 GND CADR15 CBS_CPERR# 0_0402_5%~D
G1 17 15 +3.3V_CARDAUX
2
0.1U_0402_16V4Z~D
10U_0805_6.3V6M~D
1 2 K12 K1 CBS_CC/BE2# 6 19
15,16 PCMCLK_REQ# UDIO1 CADR12 8,18,32,36,39,40 PCH_PLTRST#_EC SYSRST# OC#
2@ C1006
2@ C1016
J13 C2 CBS_CAD12
UDIO2 CADR11 CBS_CAD9
J12 C3 39 EXPRCRD_STDBY# 1 2 20 8 1 1
UDIO3 CADR10 CBS_CAD14 @ R1495 0_0402_5%~D SHDN# PERST#
J11 D2
UDIO4 CADR9 CBS_CC/BE1# EXPRCRD_STDBY#_R
H11 E3 12,39,42,47,52 RUN_ON 1 2 1 16
SPKROUT UDIO5 CADR8 CBS_CAD18 2@ R683 0_0402_5%~D STBY# NC
J10 L1
SPKROUT CADR7 CBS_CAD20 EXPRCRD_CPPE# 2 2
L13 WAKE# CADR6 M1 39 EXPRCRD_PWREN# 1 2 10 CPPE# GND 7
PWR_ON_RST K9 M2 CBS_CAD21 @ R1496 0_0402_5%~D
GBRST# CADR5 CBS_CAD22 CPUSB#
SROM: SPKROUT CADR4 L3 9 CPUSB#
Pull-Hi: Disable K10 M3 CBS_CAD23
TEST CADR3 CBS_CAD24
N3 18
B3 CBS_CAD6
2
CDATA2 N7
N6 CBS_CAD29
CDATA1 CBS_CAD27
CDATA0 N5 +1.5V_CARD: Max. 650mA, Average 500mA
CBS_CAD11
OE# C1
CBS_CGNT# +3.3V_CARD: Max. 1300mA, Average 1000mA
Power-On-Reset: GBRST# WE#
F4
CBS_CAD10
CE2# D3
(Global Reset) CE1# D5 CBS_CC/BE0#
L4 CBS_CC/BE3#
Note: De-asserted BEFORE REG#
N1 CBS_CRST#
RESET
PERST# de-assertion WAIT#
N2 CBS_CSERR#
L7 CBS_CCLKRUN#
WP#/IOIS16# CBS_CINT# +1.5V_CARD +3.3V_SUS
G4
RDY/IREQ# CBS_CAUDIO
L6
BVD2
0.1U_0402_16V4Z~D
K7 CBS_CSTSCHNG
BVD1 CBS_CVS2
K5
VS2#
2@ C1007
2.2K_0402_5%~D
2.2K_0402_5%~D
E4 CBS_CVS1 1 2 1
VS1#
1
2@ R126
2@ R127
VPPEN1 D9 K8 CBS_CCD2# @ R791 0_0402_5%~D
33 VPPEN1 VPPEN0 VPPEN1 CD2# CBS_CCD1#
E10 D6
33 VPPEN0 VCC3EN# VPPEN0 CD1# CBS_CREQ#
F10 K6
33 VCC3EN# VCC5EN# VCC3EN# INPACK# CBS_CAD13 2
E11 D1 1 2
33 VCC5EN# VCC5EN# IORD# CBS_CAD15 @ R792 0_0402_5%~D 2@
E1 33 USBP10-_EXP
2
IOWR# USBP10_D- JEXP1
4 3
4 3
1
R5U242-CSP144P_CSP144~D GND1
2
USBP10_D+ USB_D-
33 USBP10+_EXP 1 1 2 2 3 USB_D+
CPUSB# 4
2@L64 CPUSB#
5 RESERVED
DLW21SN900SQ2_0805~D 6
CARD_SMBCLK RESERVED
40 CARD_SMBCLK 7 SMB_CLK
CARD_SMBDAT 8
B 40 CARD_SMBDAT SMB_DAT B
1@ JCBUS1 9
+1.5V
1 35 10
CBS_CAD0 GND1 GND3 CBS_CCD1# PCIE_WAKE# +1.5V
2 36 11
CBS_CAD1 CAD0 CCD1# CBS_CAD2 36,39 PCIE_WAKE# WAKE#
3 37 +3.3V_CARDAUX 12
CBS_CAD3 CAD1 CAD2 CBS_CAD4 +CBS_VPP CARD_RESET# +3.3VAUX
4 38 13
CAD3 CAD4 PERST#
0.1U_0402_10V7K~D
0.1U_0402_16V4Z~D
CBS_CAD5 5 39 CBS_CAD6 14
CAD5 CAD6 +3.3V_CARD +3.3V
CBS_CAD7 6 40 CBS_DATA14 1 15
CAD7 CB_D14 1@ C769 +3.3V
2@ C1004
CBS_CC/BE0# 7 41 CBS_CAD8 1 16
CBS_CAD9 CCBE0# CAD8 CBS_CAD10 16 EXPCLK_REQ# EXPRCRD_CPPE# CLKREQ#
8 42 17
CBS_CAD11 CAD9 CAD10 CBS_CVS1 CPPE#
9 43 16 CLK_PCIE_EXP# 18
CAD11 CVS1 2 REFCLK-
0.1U_0402_16V4Z~D
CBS_CAD12 10 44 CBS_CAD13 19
CAD12 CAD13 2 16 CLK_PCIE_EXP REFCLK+
CBS_CAD14 11 45 CBS_CAD15 20
CAD14 CAD15 GND
2@ C1005
CBS_CC/BE1# 12 46 CBS_CAD16 1 21
CCBE1# CAD16 16 PCIE_PRX_EXPTX_N4 PER_N0
CBS_CPAR 13 47 CBS_DATA18 22
CPAR CB_D18 16 PCIE_PRX_EXPTX_P4 PER_P0
CBS_CPERR# 14 48 CBS_CBLOCK# 23
CBS_CGNT# CPERR# CBLOCK# CBS_CSTOP# GND
15 CGNT# CSTOP# 49 16 PCIE_PTX_EXPRX_N4_C 24 PET_N0
CBS_CINT# CBS_CDEVSEL# 2
16 CINT# CDEVSEL# 50 16 PCIE_PTX_EXPRX_P4_C 25 PET_P0
17 51 Close to JCBUS1 Pin18/52 26
+CBS_VCC VCC VCC +CBS_VCC GND
+CBS_VPP 18 VPP1 VPP2 52 +CBS_VPP
CBS_CCLK 19 53 CBS_CTRDY# 27
CBS_CIRDY# CCLK CTRDY# CBS_CFRAME# GND
20 54 28
CBS_CC/BE2# CIRDY# CFRAME# CBS_CAD17 GND
21 55 29
CBS_CAD18 CCBE2# CAD17 CBS_CAD19 +CBS_VCC GND
22 56 30
CBS_CAD20 CAD18 CAD19 CBS_CVS2 GND
23 57
CBS_CAD21 CAD20 CVS2 CBS_CRST# MOLEX_48326-0001_RT
24 58
CBS_CAD22 CAD21 CRST# CBS_CSERR#
25 59
CAD22 CSERR#
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
10U_0805_10V4Z~D
CBS_CAD23 26 60 CBS_CREQ#
CAD23 CREQ#
1@ C541
1@ C542
1@ C543
CBS_CAD24 27 61 CBS_CC/BE3#
CBS_CAD25 CAD24 CCBE3# CBS_CAUDIO
28 62 1 1 1
CBS_CAD26 CAD25 CAUDIO CBS_CSTSCHNG
29 63
CBS_CAD27 CAD26 CSTSCHG CBS_CAD28
30 64
CBS_CAD29 CAD27 CAD28 CBS_CAD30
31 CAD29 CAD30 65
A CBS_DATA2 32 66 CBS_CAD31 2 2 2 A
CBS_CCLKRUN# CB_D2 CAD31 CBS_CCD2#
33 CCLKRUN# CCD2# 67
34 GND2 GND4 68
Close to JCBUS1 pin23,63
69 GND5 GND7 71 DELL CONFIDENTIAL/PROPRIETARY
70 GND6 GND8 72
Compal Electronics, Inc.
MOLEX_48315-0013_RT Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT R5U241 (2/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 34 of 66
5 4 3 2 1
5 4 3 2 1
D D
Power Control for Mini card2 Power Control for Mini card3
Power Control for Mini card1
+15V_ALW +3.3V_ALW +3.3V_WLAN
C C
100K_0402_5%~D
+3.3V_PCIE_SATA_WAN
D
6 +15V_ALW +3.3V_ALW +3.3V_PCIE_BKT
S
1
100K_0402_5%~D
+15V_ALW +3.3V_ALW 5 4
R432
100K_0402_5%~D
2
D
100K_0402_5%~D
1 Q47 6
S
1
D
R431
100K_0402_5%~D
6 SI3456BDV-T1-E3_TSOP6~D 5 4
S
G
1
1
100K_0402_5%~D
R436
5 4 1 2 +3.3V_RUN 2
3
1
R453
1
DMN66D0LDW-7_SOT363-6~D
R435
1 Q51 0_0805_5%~D 20K_0402_5%~D SI3456BDV-T1-E3_TSOP6~D
G
1
3
R451
4700P_0402_25V7K~D
SI3456BDV-T1-E3_TSOP6~D R1547
G
3
R1545 1 20K_0402_5%~D
2
2
Q53B
DMN66D0LDW-7_SOT363-6~D
20K_0402_5%~D
2
3
DMN66D0LDW-7_SOT363-6~D
C551
4700P_0402_25V7K~D
5
2
3
4700P_0402_25V7K~D
1
2
6
2
Q192B
1 Q53A
4
Q193B
C553
DMN66D0LDW-7_SOT363-6~D 5
C571
6
2 Q192A 2
39 AUX_EN_WOWL
4
6
Q193A 2 DMN66D0LDW-7_SOT363-6~D
4
1
DMN66D0LDW-7_SOT363-6~D
1
R437 2
36,39 MCARD_PCIE_BKT_PWREN
2 100K_0402_5%~D
39 MCARD_WWAN_PWREN
1
1
R450
1
2
R452 100K_0402_5%~D
100K_0402_5%~D
2
2
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCIE PWR
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 35 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW_PCH
+3.3V_ALW_PCH PCIE_MCARD1_DET# 1 2
R443 100K_0402_5%~D
+3.3V_RUN
USB_MCARD2_DET# 2 1
R447 100K_0402_5%~D 1 2 USB_MCARD1_DET# 1 2
+3.3V_RUN @ R428 0_0402_5%~D R438 100K_0402_5%~D
1 2 WLAN_RADIO_DIS#_R
39 WLAN_RADIO_DIS#
PCIE_MCARD2_DET# 1 2 D21
R449 100K_0402_5%~D RB751S40T1_SOD523-2~D
D D
USB_MCARD2_DET# 1 2 PCIE_MCARD2_DET#
Mini WWAN @R740
@ R740 0_0402_5%~D
0.047U_0402_16V4Z~D
51 51 52 52 16 PCH_CL_DATA1 47 47 48 48 1 2 MSDATA 40
16 PCH_CL_RST1# 1 2 PCH_CL_RST1#_R 49 49 50 50 @ R1409 0_0402_5%~D
1 1 53 54 R448 0_0402_5%~D 51 52
GND1 GND2 51 52
C569
C570
53 54
TYCO_1775861-1~D +1.5V_RUN +3.3V_WLAN GND1 GND2
2 2
330U_D2E_6.3VM_R25~D
TYCO_1775861-1~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6M~D
1
+3.3V_PCIE_SATA_WAN 1 1 1 1 1 1 1 1 @
C554
@ +
C555
C556
C557
C558
C559
C560
C561
C562
Primary Power Aux Power
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
22U_0805_6.3VAM~D
33P_0402_50V8J~D
330U_D2E_6.3VM_R25~D
PWR Voltage 2 2 2 2 2 2 2 2 2
1 Rail Tolerance
1 1 1 1 1
+
Peak Normal Normal
C564
C565
C566
C567
C568
C563
2 2 2 2 2 2
+3.3V +-9% 1000 750
250 (Wake enable)
+3.3Vaux +-9% 330 250 5 (Not wake enable) USB_MCARD3_DET# 1 2 PCIE_MCARD3_DET# WPAN Noise
@ R742 0_0402_5%~D
USB_MCARD3_DET#
+1.5V +-5% 500 375 NA PCIE/BKT Card 1
+SIM_PWR
SIM Card +3.3V_PCIE_BKT +3.3V_PCIE_BKT C572
4700P_0402_25V7K~D
JMINI3 2
B JSIM1 PCIE_WAKE# B
1 2
COEX2_WLAN_ACTIVE R454 1 1 2
1
VCC GND
5 2 0_0402_5%~D 3
3 4
4
UIM_RESET 2 6 UIM_VPP 5 6
RST VPP 5 6 +1.5V_RUN
UIM_CLK 3 7 UIM_DATA MINI3CLK_REQ#_Q 7 8
CLK I/O 7 8
4
NC NC
8 9
9 10
10 Confirm with DELL about UWB
9 CLK_PCIE_MINI3# 11 12
GND 16 CLK_PCIE_MINI3# 11 12
1U_0402_6.3V6K~D
10 CLK_PCIE_MINI3 13 14
GND 16 CLK_PCIE_MINI3 13 14
1 15 16
MOLEX_475531001 15 16
17 18
17 18
C573
19 20 UWB_RADIO_DIS#
19 20 UWB_RADIO_DIS# 39
21
21 22
22 2 1 PCH_PLTRST#_EC
2 23 24 R456 0_0402_5%~D
16 PCIE_PRX_WPANTX_N5 23 24
25 26
16 PCIE_PRX_WPANTX_P5 25 26
27 28
U31 27 28
29 30
29 30
16 PCIE_PTX_WPANRX_N5_C 31 31 32 32
33 34
UIM_RESET 1 6 UIM_VPP
Reserved for test 16 PCIE_PTX_WPANRX_P5_C
18 PCIE_MCARD3_DET#
PCIE_MCARD3_DET#
35
37
33
35
37
34
36
38
36
38
USBP13-
USBP13+ USBP13- 18
USBP13+ 18
39 40 USB_MCARD3_DET#
+3.3V_RUN 39 40 USB_MCARD3_DET# 15
2 5 +SIM_PWR +3.3V_PCIE_BKT 41 42
41 42
43 44
43 44
45 46
UIM_CLK UIM_DATA PCIE_MCARD3_DET# 2 45 46
3 4 1 47
47 48
48
100K_0402_5%~D R458 49 50
49 50
1
+1.5V_RUN
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
+3.3V_PCIE_BKT 51 52
@ @ @ @ @ R1529 51 52
1 1 1 1
SRV05-4.TCT_SOT23-6~D R1492 100K_0402_5%~D 53 54
GND1 GND2 +3.3V_ALW_PCH
C574
C575
C576
C577
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6M~D
1 2
0_0402_5%~D
2
2 2 2 2 TYCO_1775861-1~D
1 1 1 1 1 1 1 1
@ Q212 @ USB_MCARD3_DET# 2 1
C578
C579
C580
C581
C582
C583
C584
C585
A SSM3K7002FU_SC70-3~D 100K_0402_5%~D R266 A
MINI3CLK_REQ# MINI3CLK_REQ#_Q 2 2 2 2 2 2 2 2
1 3
D
16 MINI3CLK_REQ#
DELL CONFIDENTIAL/PROPRIETARY
G
2
+5V_ESATA/USB3 +5V_ESATA/USB2
@ L29
DLW21SN121SQ2L_4P~D
1 FP_USB_D+ +5V_ALW PJP23 U53
31 FP_USBD+ 1 2 2 JUMP_43X79 1 GND FAULT1# 10 USB_OC1# 18
2 +5V_ALW_USB
FP_USB_D- 2 1 1 2 IN OUT1 9
+3.3V_RUN
31 FP_USBD- 4 4 3 3 3 IN OUT2 8
0.1U_0402_16V4Z~D
10U_1206_16V4Z~D
4 7 R28 1 2
39 ESATA_USB_PWR_EN# EN1# ILIM
1 2 5 6 24.9K_0402_1%~D
R422 0_0402_5%~D EN2# FAULT#2
1 1 11
T-PAD
ESATA Repeater
C546
C547
1 2
@
R423 0_0402_5%~D TPS2560DRCR_SON10_3X3~D
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
R1298
R1299
2
2
2 2
D Fingerprint CONN. +3.3V_RUN
R1513
1 1
D
C1378
C1379
1 2
JBIO1
0_0402_5%~D
0_0402_5%~D
@ R1514 0_0402_5%~D
2 2
0.1U_0402_16V4Z~D
1 39 EN_ESATA_RPTR 1 2 ESATA_PWRSAVE
+3.3V_RUN
1
1 0_0402_5%~D
2
2 FP_USB_D- U95
3 1
3 FP_USB_D+
4 7 6
4 EN VCC
C770
5 ESATA_PTX_DRX_P4_C 2 1 ESATA_PTX_DRX_P4 10
5 FP_RESET# 31 15 ESATA_PTX_DRX_P4_C VCC
6 C304 0.01U_0402_16V7K~D 1 16
6 2 ESATA_PTX_DRX_N4_C ESATA_PTX_DRX_N4 RX_1P VCC
7 15 ESATA_PTX_DRX_N4_C 2 1 2 20
GND C303 0.01U_0402_16V7K~D RX_1N VCC
8
GND ESATA_PRX_DTX_P4_C 2 1 ESATA_PRX_DTX_P4 5
TX_2P PE1
9
15 ESATA_PRX_DTX_P4_C
TYCO_2041070-6 +3.3V_RUN Place close to C1380 0.01U_0402_16V7K~D 4 TX_2N PE2 8
ESATA_PRX_DTX_N4_C 2 1 ESATA_PRX_DTX_N4
JBIO1.1 15 ESATA_PRX_DTX_N4_C C1381 0.01U_0402_16V7K~D 3 15 ESATA_PTX_DRX_P4_RP
GND TX_1P ESATA_PTX_DRX_N4_RP
13 GND TX_1N 14
U51 17 GND ESATA_PRX_DTX_N4_RP
1 GND VCC 4 +3.3V_RUN 18 GND RX_2N 12
19 11 ESATA_PRX_DTX_P4_RP
GND RX_2P
21
FP_USB_D- FP_USB_D+ PAD
2 IO1 IO2 3
1
1
0_0402_5%~D
0_0402_5%~D
SN75LVCP412ARTJR_QFN20_4X4~D
R1301
R1300
PRTR5V0U2X_SOT143-4~D
2
2
+5V_ESATA/USB3
@ R1520
@R1520
0_0402_5%~D
150U_D2_6.3VY_R15M~D
1 2 EN_ESATA_RPTR# EN_ESATA_RPTR# 15,19
0.1U_0402_16V4Z~D
C C
1
1
1
PCH_AZ_MDC_RST1# D +
1 3
D
15 PCH_AZ_MDC_RST#
C544
C545
ESATA_PWRSAVE 2 @ Q211
+5V_ALW G SSM3K7002FU_SC70-3~D
Q35 2 2
100K_0402_5%~D
S
G
2
3
1
10K_0402_5%~D
SSM3K7002FU_SC70-3~D
R325
1
JESA1
R326
1 A_VBUS
USBP3_D- 2
2
USBP3_D+ A_D-
3
+5V_ESATA/USB2 A_D+
4
2
A_GND
39 MDC_RST_DIS#
5 USB
B_VBUS
150U_D2_6.3VY_R15M~D
0.1U_0402_16V4Z~D
USBP2_D- 6
USBP2_D+ B_D-
1 7
B_D+
1 8
+ B_GND
double check pin define with IO board.
C588
C548
ESATA_PTX_DRX_P4_RP 1 2 SATA_PTX_DRX_P4 9
C1376 0.01U_0402_16V7K~D GND
10
2 2 ESATA_PTX_DRX_N4_RP A+
2 SATA_PTX_DRX_N4 ESATA
I/O board CONN. 1
C1377 0.01U_0402_16V7K~D
11
12
A-
GND
ESATA_PRX_DTX_N4_RP 1 2 SATA_PRX_DTX_N4 13
B-
Connector need updated C549 0.01U_0402_16V7K~D 14
B+
ESATA_PRX_DTX_P4_RP 1 2 SATA_PRX_DTX_P4 15
JIO1 C550 0.01U_0402_16V7K~D GND
1 26 DETECT_GND 16
30 SW_LAN_TX3+ 1 26 G1
2 27 L65 17
30 SW_LAN_TX3- 2 27 AUD_EXT_MIC_L 29 USBP2- USBP2_D- G2
3 3 28 28 18 USBP2- 1 1 2 2 18 G3
AUD_EXT_MIC_R 29
30 SW_LAN_TX2- 4 4 29 29 19 G4
30 SW_LAN_TX2+ 5 5 30 30 +VREFOUT
B USBP2+ USBP2_D+ FCI_10100446-003RLF B
6 31 18 USBP2+ 4 3
6 31 AUD_MIC_SWITCH 29 4 3
30 SW_LAN_TX1+ 7 32 LAN_ACTLED_YEL# 30
7 32 HCMC0805-900MFS_4P~D
30 SW_LAN_TX1- 8 33 LED_10_GRN# 30
8 33
9 34 LED_100_ORG# 30 1 2
9 34 @ R1524 0_0402_5%~D
30 SW_LAN_TX0- 10 35 +3.3V_ALW_PCH
10 35
30 SW_LAN_TX0+ 11 36 +LOM_VCT_IO 1 2
11 36 @ R1525 0_0402_5%~D
12 37 USB_SIDE_EN# 39
12 37 L66
+3.3V_LAN 13 38
13 38 USB_OC0# 18 USBP3- USBP3_D-
14 39 18 USBP3- 1 2
14 39 1 2
18 USBP0+ 15 40
15 40
18 USBP0- 16 41 PCH_AZ_MDC_BITCLK 15
16 41 PCH_AZ_MDC_RST1# USBP3+ USBP3_D+
17 42 18 USBP3+ 4 3
17 42 4 3
18 USBP1+ 18 43
18 43 PCH_AZ_MDC_SDOUT 15 HCMC0805-900MFS_4P~D
18 USBP1- 19 44 PCH_AZ_MDC_SYNC 15
19 44
20 45 PCH_AZ_MDC_SDIN1 15 1 2
20 45 @R1526
@ R1526 0_0402_5%~D
21 21 46 46
AUD_HP_NB_SENSE 29,39
22 22 47 47 1 2
23 48 @R1527
@ R1527 0_0402_5%~D
23 48 AUD_HP_OUT_L 29
+5V_ALW 24 24 49 49 AUD_HP_OUT_R 29
25 25 50 50
19 IO_LOOP
0.1U_0402_16V4Z~D
1
TYCO_1759898-1 @ D4
C623
USBP2_D+ 1 6 USBP2_D-
V I/O V I/O
2 2 5
Ground V BUS +5V_ALW_USB
USBP3_D- 3 4 USBP3_D+
V I/O V I/O
IP4223CZ6_SO6~D
+3.3V_LAN +VREFOUT +LOM_VCT_IO +3.3V_ALW_PCH
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1U_0402_6.3V6K~D
0.1U_0402_16V4Z~D
1 1 1 1
@
A A
C768
C634
C712
C711
2 2 2 2
DELL CONFIDENTIAL/PROPRIETARY
Place close Place close Place close Place close Compal Electronics, Inc.
Title
to JIO1.13 to JIO1.30 to JIO1.36 to JIO1.35 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USB 2.0 PORT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 37 of 66
5 4 3 2 1
2 1
JDOCK1
DOCK_DET_1 1 2 DOCK_AC_OFF
1 2 DOCK_AC_OFF 39,50
3 3 4 4
30 DOCK_LOM_SPD10LED_GRN# DPB_CA_DET DOCK_LOM_SPD100LED_ORG# 30
5 5 6 6
26 DPC_DOCK_CA_DET DPB_CA_DET 25
7 7 8 8
9 10 DPB_DOCK_LANE_P0 C361 2 1 0.1U_0402_10V7K~D
26 DPC_DOCK_LANE_P0 9 10 DPB_DOCK_LANE_N0 DPB_GPU_LANE_P0 54
11 12 C357 2 1 0.1U_0402_10V7K~D
26 DPC_DOCK_LANE_N0 11 12 DPB_GPU_LANE_N0 54
13 13 14 14
15 16 DPB_DOCK_LANE_P1 C355 2 1 0.1U_0402_10V7K~D
26 DPC_DOCK_LANE_P1 15 16 DPB_DOCK_LANE_N1 DPB_GPU_LANE_P1 54
17 18 C313 2 1 0.1U_0402_10V7K~D
26 DPC_DOCK_LANE_N1 17 18 DPB_GPU_LANE_N1 54
19 20
19 20 DPB_DOCK_LANE_P2 C360 2
26 DPC_DOCK_LANE_P2 21
21 22
22 1 0.1U_0402_10V7K~D DPB_GPU_LANE_P2 54
23 24 DPB_DOCK_LANE_N2 C362 2 1 0.1U_0402_10V7K~D
26 DPC_DOCK_LANE_N2 23 24 DPB_GPU_LANE_N2 54
25 26
25 26 DPB_DOCK_LANE_P3 C364 2
26 DPC_DOCK_LANE_P3 27 28 1 0.1U_0402_10V7K~D DPB_GPU_LANE_P3 54
27 28 DPB_DOCK_LANE_N3 C363 2
26 DPC_DOCK_LANE_N3 29 30 1 0.1U_0402_10V7K~D DPB_GPU_LANE_N3 54
29 30
31 32
31 32
26 DPC_DOCK_AUX 33 34 DPB_DOCK_AUX 25
33 34
26 DPC_DOCK_AUX# 35 36 DPB_DOCK_AUX# 25
35 36
37 38
37 38
26 DPC_DOCK_HPD 39 40
DPC_DOCK_HPD 39 40 DPB_GPU_HPD 53
+NBDOCK_DC_IN_SS 41 42 ACAV_DOCK_SRC# 50
41 42
1 43 44 1
BLUE_DOCK 43 44
27 BLUE_DOCK 45 45 46 46 DAT_DDC2_DOCK 27
C985 47 48 C986
47 48 CLK_DDC2_DOCK 27
2
0.033U_0402_16V7K~D 49 50 0.033U_0402_16V7K~D
2 49 50 2
B
R796 Close to DOCK 51 51 52 52
B
100K_0402_5%~D RED_DOCK 53 54 SATA_PRX_DKTX_P5 2 1
Its for Enhance ESD on dock issue. 27 RED_DOCK 53 54 SATA_PRX_DKTX_N5 SATA_PRX_DKTX_P5_C 15
55 55 56 56 C586 2 1 0.01U_0402_16V7K~D SATA_PRX_DKTX_N5_C 15 Close to DOCK
57 58 C587 0.01U_0402_16V7K~D
Its for Enhance ESD on dock issue.
1
GREEN_DOCK 57 58 SATA_PTX_DKRX_P5
27 GREEN_DOCK 59 60 1 2
59 60 SATA_PTX_DKRX_N5 C306 1 SATA_PTX_DKRX_P5_C 15
61 61 62 62 2 0.01U_0402_16V7K~D SATA_PTX_DKRX_N5_C 15
63 64 C305 0.01U_0402_16V7K~D
63 64
27 HSYNC_DOCK 65 65 66 66 USBP8+ 18
27 VSYNC_DOCK 67 67 68 68 USBP8- 18
69 69 70 70
40 CLK_MSE 71 71 72 72 USBP9+ 18
+3.3V_RUN 73 74
40 DAT_MSE 73 74 USBP9- 18 DPB_GPU_HPD
75 75 76 76
29 DAI_BCLK# 77 78 CLK_KBD 40
77 78
29 DAI_LRCK# 79 80 DAT_KBD 40
79 80
1
+15V_ALW 81 82
81 82
2
R1539 83 84
29 DAI_DI 83 84
2.2K_0402_5%~D 85 86 R798
29 DAI_DO# 85 86
87 88 100K_0402_5%~D
87 88 +PWR_SRC +VCHGR
29 DAI_12MHZ# 89 90
2
89 90
1
+3.3V_ALW2 1 2 91 92
1
R1537 @ R1538 0_0402_5%~D 91 92 C1028
93 93 94 94
100K_0402_5%~D 95 96 1 2
95 96
39 D_LAD0 97 98
97 98 BREATH_LED# 40,43
1
D 0.1U_0402_25V4K~D +3.3V_ALW
39 D_LAD1 99 100
2
99 100 DOCK_LOM_ACTLED_YEL# 30
1
DMN66D0LDW-7_SOT363-6~D
+LOM_VCT
DMN66D0LDW-7_SOT363-6~D
115 116
1
39 D_DLDRQ1# 117 118 +LOM_VCT
117 118
1
Q213A
2
125 126 2
40 DOCK_SMB_CLK 127 128 DOCK_LOM_TRD3+ 30 1
2
127 128
40 DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- 30
129 130 @C590
@C590
1 2 131 132
@ R1523 0_0402_5%~D 131 132 4.7P_0402_50V8C~D
40,44 DOCK_SMB_ALERT# 133 134 DOCK_DCIN_IS+ 51
133 134 2
44 DOCK_PSID 135 136 DOCK_DCIN_IS- 51
135 136
137 137 138 138
1
D D71
40 DOCK_PWR_BTN# 139 139 140 140 DOCK_POR_RST# 40
2 Q215 141 142 RB751S40T1_SOD523-2~D
G SSM3K7002FU_SC70-3~D SLICE_BAT_PRES# 141 142 DOCK_DET_R#
39,44,50 SLICE_BAT_PRES# 143 143 144 144 1 2 DOCK_DET# 39
S
3
0.1U_0603_50V4Z~D
4.7U_0805_25V6K~D
147 151
PWR1 PWR2
3
2
4.7U_0805_25V6K~D
0.1U_0603_50V4Z~D
@ D64
1 1 @
C1033
C1898
1 1 153 159
Shield_G Shield_G
C1897
154 160
+3.3V_RUN Shield_G Shield_G
155 161
Shield_G Shield_G 2 2
156 162
1
2 2 Shield_G Shield_G
157 163
Shield_G Shield_G
1
+3.3V_ALW2 1 2
R1535 @ R1536 0_0402_5%~D
A 100K_0402_5%~D A
1
D
2
1
2 Q217
R1534 G SSM3K7002FU_SC70-3~D
3
DMN66D0LDW-7_SOT363-6~D
100K_0402_5%~D S
3
Q216B
2
5 DPB_DOCK_AUX
+3.3V_RUN
6
DMN66D0LDW-7_SOT363-6~D
1
Q216A
DPB_CA_DET 2 R1531
2.2K_0402_5%~D
1
1 2
@R1533
@ R1533 0_0402_5%~D
1
D
2
G
Q218
SSM3K7002FU_SC70-3~D Compal Electronics, Inc.
S Title
3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DOCKING CONN
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
DPB_DOCK_AUX# NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 38 of 66
2 1
5 4 3 2 1
2
1 2 SLICE_BAT_PRES# For Experss card stuff
R503 100K_0402_5%~D 1@ R882 +3.3V_ALW
1 2 DCIN_CBL_DET# 100K_0402_5%~D
R883
R862 100K_0402_5%~D
1 2 PWR_BTN_BD_DET#
1
R754 100K_0402_5%~D 1 1 1 1
DET_PCCRD_EXPSCRD# 1
C1072 C648 C649 C650
2
10U_0805_10V4Z~D 0.1U_0402_16V4Z~D C652 0.1U_0402_10V7K~D 0.1U_0402_16V4Z~D
2@ R883 2 2 0.1U_0402_16V4Z~D 2 2
100K_0402_5%~D 2
D D
A17
B30
A43
A54
U35
+3.3V_ALW2 B68 +3.3V_ALW
VCC1
VCC1
VCC1
VCC1
NC
B35
PBAT_PRES# NC +3.3V_ALW
44 PBAT_PRES# B52 B34
USB_SIDE_EN# GPIOA[0] NC
1 2 A49
GPIOA[1] NC
B1
R502 10K_0402_5%~D 43 SCRL_LED#
B53 B5
43 NUM_LED# GPIOA[2] VCC1
0.1U_0402_16V4Z~D
1 2 ESATA_USB_PWR_EN# DCIN_CBL_DET# A50 B8 DOCK_MIC_DET
44 DCIN_CBL_DET# PBATT_OFF GPIOA[3] GPIOJ[7] TEMP_ALERT# DOCK_MIC_DET 29 TP_DET#
R923 10K_0402_5%~D 50 PBATT_OFF B54 B11 2 1
MDC_RST_DIS# GPIOA[4] GPIOK[4] TEMP_ALERT# 15,19
A51 R756 100K_0402_5%~D
37 MDC_RST_DIS#
34,36 PCIE_WAKE#
PCIE_WAKE# B55
GPIOA[5]
GPIOA[6]
ECE5028-LZY GPIOI[1] B63 SIO_SLP_M#
SIO_SLP_M# 17,48
1
C653
A52 GPIOA[7]
A5 SIO_SLP_LAN#
GPIOJ[2] SIO_SLP_LAN# 17,30 2
+3.3V_RUN WIRELESS_ON#/OFF B13 B6
43 WIRELESS_ON#/OFF BT_RADIO_DIS# GPIOH[0] GPIOJ[3] DOCK_HP_DET
41 BT_RADIO_DIS# A13 GPIOH[1] GPIOJ[6] A7 DOCK_HP_DET 29
EXPRCRD_PWREN# B14 B7 CRT_SWITCH
34 EXPRCRD_PWREN# GPIOH[4] GPIOJ[5] CRT_SWITCH 27
EXPRCRD_STDBY# A14 A8 ME_FWP ME_FWP 15 +3.3V_RUN
34 EXPRCRD_STDBY# BC_INT#_ECE5028 GPIOH[5] GPIOK[0]
40 BC_INT#_ECE5028 A29 B9
WIRELESS_ON#/OFF BC_DAT_ECE5028 BC_INT# GPIOK[1] DP_PRIORITY
1 2 40 BC_DAT_ECE5028 B31 BC_DAT GPIOK[3] A10 DP_PRIORITY 26
R874 100K_0402_5%~D BC_CLK_ECE5028 D_CLKRUN#
1 2 SP_TPM_LPC_EN 40 BC_CLK_ECE5028 A30
BC_CLK GPIO GPIOK[2]
GPIOK[5]
B10
A11 RUN_ON 1.8V_RUN_PWRGD 47
RUN_ON 12,34,42,47,52
2
R510
1
100K_0402_5%~D
@ R788 10K_0402_5%~D A1 B12 CPU_CATERR# D_SERIRQ 2 1
LCD_TST GPIOE[0]/RXD GPIOK[6] R511 100K_0402_5%~D
1 2 B2
R816 100K_0402_5%~D DGPU_PWROK GPIOE[1]/TXD D_DLDRQ1#
19,52 DGPU_PWROK A2 GPIOE[2]/RTS# GPIOI[6] B66 1 2 IMVP_VR_ON 49 2 1
1 2 PANEL_BKEN_DGPU B3 A62 R509 0_0402_5%~D R512 100K_0402_5%~D
R505 10K_0402_5%~D DET_PCCRD_EXPSCRD# GPIOE[3]/DSR# GPIOI[5] 0.75V_DDR_VTT_ON IMVP_PWRGD 8,49
A3 GPIOE[4]/CTS# GPIOI[2] A60
SYS_LED_MASK# +CAP_LDO8mil 0.75V_DDR_VTT_ON 47
1 2 B45
GPIOE[5]/DTR# CAP_LDO
B46
R658 10K_0402_5%~D A42 B67 C1051
DGPU_PWR_EN GFX_MEM_VTT_ON GPIOE[6]/RI# GPIOJ[0] AUX_EN_WOWL 35 +3.3V_ALW 0.1U_0402_16V4Z~D
1 2 56 GFX_MEM_VTT_ON B4
GPIOE[7]/DCD#
R1318 100K_0402_5%~D 1 2
C GFX_MEM_VTT_ON USB_SIDE_EN# C
1 2 37 USB_SIDE_EN# A33
GPIOB[0]/INIT#
R1319 100K_0402_5%~D EN_I2S_NB_CODEC# B36
29 EN_I2S_NB_CODEC# USH_PWR_STATE# GPIOB[1]/SLCTIN# ACAV_IN_NB 40,50,51
31 USH_PWR_STATE# A34 GPIOC[2]/SLCT TEST_PIN B19 2 1
5
EN_DOCK_PWR_BAR R514
50 EN_DOCK_PWR_BAR B37 GPIOC[3]/PE TEST 1K_0402_5%~D ACAV_IN_NB
A35
GPIO 1
P
ENVDD_GPU GPIOC[4]/BUSY B
24,53 ENVDD_GPU B38 GPIOC[5]/ACK# O 4D65 2 1
LCD_TST DOCK_AC_OFF 38,50
24 LCD_TST A36 2
GPIOC[6]/ERROR# A
G
PSID_DISABLE# A37 A63 DOCK_AC_OFF_EC RB751S40T1_SOD523-2~D RUN_ON 2 1
44 PSID_DISABLE# GPIOC[7]/ALF# GPIOI[7]
1
PANEL_BKEN_DGPU B40 B65 U69 R515 100K_0402_5%~D
SIO_SLP_S3# 17
3
53 PANEL_BKEN_DGPU DOCKED GPIOD[0]/STROBE# GPIOI[4] TC7SH08FU_SSOP5~D R1078
A38 GPIOC[1]/PD7 GPIOI[3] A61 SIO_SLP_S4# 17
30 DOCKED DOCK_DET# DOCK_AC_OFF_EC 50 33K_0402_5%~D CPU_VTT_ON
38 DOCK_DET# B41 GPIOC[0]/PD6 2 1
AUD_NB_MUTE A39 R518 100K_0402_5%~D
29 AUD_NB_MUTE MCARD_WWAN_PWREN GPIOB[7]/PD5
B42 LPC_LAD[0..3] 15,31,32,40
2
35 MCARD_WWAN_PWREN LCD_VCC_TEST_EN GPIOB[6]/PD4 LPC_LAD0 0.75V_DDR_VTT_ON 2
24 LCD_VCC_TEST_EN A40 A27 1
CCD_OFF GPIOB[5]/PD3 LAD0 LPC_LAD1 R520 100K_0402_5%~D
24 CCD_OFF B43 A26
AUD_HP_NB_SENSE GPIOB[4]/PD2 LAD1 LPC_LAD2 PBATT_OFF
29,37 AUD_HP_NB_SENSE A41 B26 2 1
ESATA_USB_PWR_EN# GPIOB[3]/PD1 LAD2 LPC_LAD3 R521 100K_0402_5%~D
37 ESATA_USB_PWR_EN# B44 B25
GPIOB[2]/PD0 LAD3 LPC_LFRAME#
A21 LPC_LFRAME# 15,31,32,40
LID_CL_SIO# LFRAME# PCH_PLTRST#_EC
48 CPU_VTT_ON
CPU_VTT_ON
B32
A31
GPIOD[1]
GPIOD[2]
LPC LRESET#
PCICLK
B22
A28 CLK_PCI_5028 PCH_PLTRST#_EC 8,18,32,34,36,40
CLK_PCI_5028 18
B20 CLKRUN#
CLKRUN# CLKRUN# 17,32,40
DGPU_PWR_EN B33 A23 LPC_LDRQ0#
52 DGPU_PWR_EN GPIOD[3]/VBUS_DET LDRQ0# LPC_LDRQ1# LPC_LDRQ0# 15
B15 A22 LPC_LDRQ1# 15
+3.3V_RUN MCARD_PCIE_BKT_PWREN GPIOD[4]/OCS1_N LDRQ1# IRQ_SERIRQ
35,36 MCARD_PCIE_BKT_PWREN A15 B21 IRQ_SERIRQ 15,31,32,40
HDDC_EN GPIOD[5]/OCS2_N SER_IRQ
28 HDDC_EN B16
MODC_EN GPIOD[6]/OCS3_N CLK_SIO_14M
28 MODC_EN A16 A32 CLK_SIO_14M 16
ALS_INT# GPIOD[7]/OCS4_N CLKI (14.318 MHz) CLK_SIO_14M CLK_PCI_5028
1 2
R258 2.2K_0402_5%~D SLICE_BAT_PRES# B17 B51
38,44,50 SLICE_BAT_PRES# PWR_BTN_BD_DET# GPIOH[6] VSS
43 PWR_BTN_BD_DET# B18 GPIOH[7]
1
B29 D_LAD0
+3.3V_ALW LAN_DISABLE#_R DLAD0 D_LAD1 D_LAD0 38 ME_FWP @R506
@ R506 R527
30 LAN_DISABLE#_R B47 GPIOG[0] DLAD1 B28
D_LAD2 D_LAD1 38 10_0402_5%~D 10_0402_5%~D
A45 GPIOG[1] DLAD2 A25
43 CAP_LED# D_LAD2 38
2
B VGA_ID_DISC SYS_LED_MASK# D_LAD3 B
1
R875
2
100K_0402_5%~D
43 SYS_LED_MASK#
ALS_INT#
B48
A46
GPIOG[2] DLPC DLAD3
A24
B23 D_LFRAME# D_LAD3 38 @ R649
24 ALS_INT# D_LFRAME# 38
2
VGA_ID_UMA R526 1 GPIOG[3] DLFRAME# D_CLKRUN#
1 2 19 SIO_EXT_WAKE# 2 0_0402_5%~D B49
GPIOG[4] DCLK_RUN#
A19 D_CLKRUN# 38
1K_0402_5%~D
@R881
@ R881 100K_0402_5%~D EN_ESATA_RPTR A47 B24 D_DLDRQ1# 1 1
37 EN_ESATA_RPTR GPIOG[5] DLDRQ1# D_DLDRQ1# 38
PCH_PCIE_WAKE# B50 A20 D_SERIRQ
D_SERIRQ 38
1
VGA_ID_DISC 17 PCH_PCIE_WAKE# WLAN_RADIO_DIS# GPIOG[6] DSER_IRQ @C654
@C654 C656
1 2 36 WLAN_RADIO_DIS# A48
@R522
@ R522 100K_0402_5%~D GPIOG[7] 4.7P_0402_50V8C~D 4.7P_0402_50V8C~D
VGA_ID_UMA 1 2 WWAN_RADIO_DIS# A53 2 2
36 WWAN_RADIO_DIS# GPU_CLKDWN SYSOPT1/GPIOH[2]
R558 100K_0402_5%~D B57
53 GPU_CLKDWN SYSOPT0/GPIOH[3]
A4 RUNPWROK_R1R1130 2 1 10K_0402_5%~D +3.3V_RUN
PWRGD
B58
VGA_ID_UMA GPIOF[7] SP_TPM_LPC_EN
A55 B56 SP_TPM_LPC_EN 31,32
VGA_ID_DISC GPIOF[6] OUT65
B59
UWB_RADIO_DIS# GPIOF[5]
VGA_ID_UMA VGA_ID_DISC 36 UWB_RADIO_DIS# A56
GPIOF[4]
R528 A6
10K_0402_5%~D GPIOJ[4] GPIO_PSID_SELECT 44 +3.3V_ALW
Discrete 0 1 B60 IRTX VSS A9
2 1 A57 A12
IRRX GPIOK[7] SPI_WP#_SEL 15
UMA 1 0 VSS A18 1
B61 GPIOF[3]/IRMODE/IRRX3B VSS B27
1
SG 1 1 A58 B39 C657
BCM5882_ALERT# GPIOF[2]/IRTX2 VSS 4.7U_0603_6.3V6M~D R524
31 BCM5882_ALERT# B62 A44
GPIOF[1]/IRRX2 VSS 2 +3.3V_RUN 100K_0402_5%~D
A59 B64
GPIOF[0]/IRMODE/IRRX3A VSS
A64
GPIOJ[1] R525
EP
2
1
10_0402_5%~D
TP_DET# 41
R1288 LID_CL_SIO# 2 1 LID_CL#
LID_CL# 43
C1
8.2K_0402_5%~D
1
2
+1.05V_RUN_VTT CPU_CATERR# C655
R1289 0.047U_0402_16V4Z~D
1
2.2K_0402_5%~D C 2
A
1 A
ECE5028-LZY_DQFN132_11X11~D 1 2 2
B C1372
Q182 E 0.1U_0402_16V4Z~D
3
PMST3904_SOT323-3~D 2
8 H_CATERR#
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ECE5028
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 39 of 66
5 4 3 2 1
5 4 3 2 1
+RTC_CELL
1
R539
100K_0402_5%~D 1 2
+3.3V_ALW @ C658
2
1U_0402_6.3V6K~D
POWER_SW_IN# 1 2
23 POWER_SW_IN# POWER_SW#_MB 41,43
1 2 BC_DAT_ECE5028 1 R541 10K_0402_5%~D
R543 100K_0402_5%~D
2 1 BC_DAT_EMC4002 +RTC_CELL C659
R545 100K_0402_5%~D +3.3V_ALW 1U_0402_6.3V6K~D
2 1 BC_DAT_ECE1077 2
R546 100K_0402_5%~D 1 2 +RTC_CELL_VBAT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2 1 DOCK_SMB_ALERT# R544 1
D R547 10K_0402_5%~D 0_0402_5%~D D
1 2 PBAT_SMBDAT C660 +RTC_CELL
1 1 1 1 1 1 1 1 1
C661
R551 2.2K_0402_5%~D 0.1U_0402_16V4Z~D
2
C662
C663
C664
C665
C666
C667
C668
1 2 PBAT_SMBCLK C651
1
R552 2.2K_0402_5%~D 0.1U_0402_16V4Z~D
2 1 LPC_LDRQ#_MEC 2 2 2 2 2 2 2 2 2
@ R837 100K_0402_5%~D 1 2
B64
A11
A22
B35
A41
A58
A52
A26
CHARGER_SMBDAT R550
B3
1 2
R29 2.2K_0402_5%~D U36 100K_0402_5%~D @ C669
2
1 2 CHARGER_SMBCLK 1U_0402_6.3V6K~D
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
R30 2.2K_0402_5%~D DOCK_PWR_SW# 1 2
23 DOCK_PWR_SW# DOCK_PWR_BTN# 38
1 R554 10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
100K_0402_5%~D
R1410
R575
2
+3.3V_ALW CLK_PCI_MEC A29 B50 CHARGER_SMBCLK CKG_FFS_SMBDAT 2 1
18 CLK_PCI_MEC PCI_CLK GPIO140/I2C1G_CLK CHARGER_SMBCLK 51
LPC_LFRAME# B31 B52 CARD_SMBDAT R578 R540 2.2K_0402_5%~D
15,31,32,39 LPC_LFRAME# LFRAME# GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBDAT 34
LPC_LAD0 A30 A49 CARD_SMBCLK 10K_0402_5%~D CKG_FFS_SMBCLK 2 1
15,31,32,39 LPC_LAD0 LAD0 GPIO142/I2C1F_CLK/I2C2B_CLK CARD_SMBCLK 34
LPC_LAD1 B32 B53 USH_SMBDAT R542 2.2K_0402_5%~D
15,31,32,39 LPC_LAD1 LAD1 GPIO143/I2C1E_DATA USH_SMBDAT 31
10K_0402_5%~D
49.9_0402_1%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
1
LAD2 GPIO144/I2C1E_CLK
1
B LPC_LAD3 B33 B
15,31,32,39 LPC_LAD3 LAD3
R580
R581
R582
R583
2
A59
2
1
G1 3 JTAG_CLK R587 0_0402_5%~D XTAL2 VCI_IN0# ACAV_IN R657 100K_0402_5%~D
8 G2 4 4 B62 GPIO160/32KHZ_OUT VCI_OVRD_IN B1 ACAV_IN 23,50,51
1
5 JTAG_TDO A1 DOCK_PWR_SW#
5 23 EC_32KHZ_OUT VCI_IN3#
VR_CAP[1]
6 R560
6
VSS_RO
100K_0402_5%~D 1 2
VSS[2]
VSS[5]
VSS[7]
VSS[8]
AGND
ACES_85204-06001~D +3.3V_ALW
NC1
NC2
NC3
NC4
NC5
NC6
NC7
@ C1885
EP
10K_0402_5%~D
1U_0402_6.3V6K~D
1
MEC5045-LZY_DQFN132_11X11~D LAT_ON_SW# 1 2 LAT_ON_SW#_R 43
B17
B34
A46
A48
B51
A64
B68
B66
B27
B60
B11
B28
B12
B54
C1
1 R1512 10K_0402_5%~D
R579
Place closely pin 58 C1886
8mil +VR_CAP
2
Same as Laguna CLK_PCI_MEC 2
15mil
JTAG_RST#
1
0.1U_0402_16V4Z~D
@ R588 1
1
C1040
C671
100_0402_1%~D
@
1
R585
Y4 R85 R98
240K 4700p X00
2
32.768K_12.5PF_Q13MC30610018~D 2 1K_0402_5%~D
1 1K_0402_5%~D
MEC_XTAL2 4 1 2 JTAG1
130K 4700p X01
2
@ C673 @SHORT PADS~D
1
2
33P_0402_50V8J~D
33P_0402_50V8J~D
3 2 SYSTEM_ID BOARD_ID @
NC NC 4.7P_0402_50V8C~D
2 33K 4700p X02
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1 1
2
C674
C675
2
+3.3V_M SYSTEM_ID for BID
2 2 2K 4700p ***
C918
C919
function
A
1K 4700p A00 A
1
2 2
R640
100K_0402_5%~D
2
PCH_PWRGD# PCH_PWRGD# 23
DELL CONFIDENTIAL/PROPRIETARY
1
D
RESET_OUT# 2
G
Q189
SSM3K7002FU_SC70-3~D
Compal Electronics, Inc.
S PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
3
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, EMC5045
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 40 of 66
5 4 3 2 1
5 4 3 2 1
BlueTooth +3.3V_RUN
C1703
1 2
Touch Pad 0.1U_0402_16V4Z~D
D D
+3.3V_ALW JBT
1
1
2
18 BT_DET# COEX1_BT_ACTIVE 2
36 COEX1_BT_ACTIVE 3
3
4.7K_0402_5%~D
4.7K_0402_5%~D
4
4
2
5
5
R613
R614
6
43 BT_ACTIVE 6
39 BT_RADIO_DIS# 7
COEX2_WLAN_ACTIVE 7
36 COEX2_WLAN_ACTIVE 8
8
9
1
9
10
TP_DATA R1564 1 DAT_TP_SIO 10
2 100_0603_5%~D DAT_TP_SIO 40 18 USBP6- 11 11
12 @ FAN
TP_CLK CLK_TP_SIO 18 USBP6+ 12
R1565 1 2 100_0603_5%~D 13 Part Number Description
CLK_TP_SIO 40 G1
14 G2
10P_0402_50V8J~D
10P_0402_50V8J~D
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
10P_0402_50V8J~D
10P_0402_50V8J~D
1 1 1 1 E&T_3703-E12N-03R
@ Speak
C680
C681
C682
C683
100P_0402_50V8J~D
Part Number Description
33P_0402_50V8J~D
10K_0402_5%~D
1
2 2 2 2
@C1334
@
1 1 PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
C1704
R1407
C1334
@SM CARD BODY
2 2 Part Number Description
2
SP070007V0L S SOCKET TYCO 1770551-1
10P H5.9 SMART
@PCMCIA BODY
Part Number Description
C PCMCIA TYCO C
DC000001Q0L
1759096-1
+3.3V_ALW
JTP1
+5V_RUN
Power Switch for debug Part Number Description
H-CONN SET ZJX
1 DC02000840L
1 MB-B/T-TP-FP
2
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
3
3 @ LVDS cable
40 BC_CLK_ECE1077 4 1
4
1 40 BC_DAT_ECE1077 5 Part Number Description
5
C678
6 POWER_SW#_MB 1 2
40 BC_INT#_ECE1077 6 40,43 POWER_SW#_MB 1 2
C771
0.1U_0402_16V4Z~D
17 G1 1 GC20323MX00 BATT CR2032 3V
B B
18 1 2 220MAH MAXELL
G2 1 2
C1413
2
HRS_FH12-16S-0P5SH(55)~D PWRSW2
@SHORT PADS~D
Place
@ on Bottom
TP_CLK
TP_DATA
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
1
@ @
D53
D54
2
A
Place close to JTP1 connector A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Touch PAD/Int KB/LID
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 41 of 66
5 4 3 2 1
5 4 3 2 1
D
+3.3V_ALW2 6 FDS8878_SO8~D
S
1
5 4 8 1
10U_0805_10V4Z~D
10U_0805_10V4Z~D
R598 2 7 2
1
100K_0402_5%~D 1 1 R597 6 3 1
1
100K_0402_5%~D 5 R600
C686
C687
R602 R601 R599 20K_0402_5%~D
3
100K_0402_5%~D ALW_ENABLE 20K_0402_5%~D 100K_0402_5%~D
4
21 ALW_ENABLE 2 5V_RUN_ENABLE 2
2
3
D D
2
2200P_0402_50V7K~D
Q57B 1
ALW_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D Q56B
C688 RUN_ON_ENABLE# 5 DMN66D0LDW-7_SOT363-6~D 1
6
3300P_0402_50V7K~D
4
2
C689
4
Q57A
6
DMN66D0LDW-7_SOT363-6~D 2
40 PCH_ALW_ON 2
Q56A
DMN66D0LDW-7_SOT363-6~D
1
2
+15V_ALW +3.3V_SUS Source 12,34,39,47,52 RUN_ON
+3.3V_ALW Q60
1
SI3456BDV-T1-E3_TSOP6~D +3.3V_SUS
1 +3.3V_RUN Source
D
R603 6
S
+3.3V_ALW2 100K_0402_5%~D 5 4 +3.3V_ALW Q61 +3.3V_RUN
2 +15V_ALW NTMS4107NR2G_SO8~D
1
10U_0805_10V4Z~D
20K_0402_5%~D
1 1 8 1
2
R605
7 2
G
1
1
C690
8 1.5V_PWRGD 1 R1508 2 0.75V_VR_EN 47 6 3
3
R604 SUS_ENABLE 100K_0402_5%~D 5
1
2
20K_0402_5%~D
100K_0402_5%~D R606 1
2
3
R607
10U_0805_10V4Z~D
100K_0402_5%~D
C691
2
2
Q62B @
SUS_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D 3.3V_RUN_ENABLE 2
1
2
Q208
6
C692 BSS138_SOT23~D
4
1
4700P_0402_25V7K~D D D
2 1
Q62A RUN_ON_ENABLE# 1 2 2 2
C DMN66D0LDW-7_SOT363-6~D R1548 0_0402_5%~D G G Q64 C693 C
40 SUS_ON 2
S S SSM3K7002FU_SC70-3~D 470P_0402_50V7K~D
3
2
1
RUN_ON_CPU1.5VS3# 1 2
@ R1521 0_0402_5%~D
+3.3V_ALW2 Q151
D
39_0603_5%~D
6 +15V_ALW +1.5V_MEM SIS406DN-T1-GE3_POWERPAK8-5~D
S
1
1
5 4 1
R610
10U_0805_10V4Z~D
2 @ 2
1
1
20K_0402_5%~D
R616
100K_0402_5%~D
1 1 3
R612
R1224
R611 5
G
1
C694
20K_0402_5%~D
10U_0805_10V4Z~D
100K_0402_5%~D
2
C1190
R1225
M_ENABLE
+3.3V_M_CHG
1
4
2
2
2
3
1.5V_RUN_ENABLE
2
2
SSM3K7002FU_SC70-3~D
Q68B
M_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D 1
1
D
1
6
1
D
Q72
C696 M_ON_3.3V# 2
4
3
B
2 S 2 B
40,48 M_ON
3
1
+1.05V_RUN Source
+1.05V_RUN
Discharg Circuit
+1.5V_CPU_VDDQ +0.75V_DDR_VTT +1.05V_M Q183
+5V_RUN +1.5V_RUN +3.3V_RUN +1.05V_RUN +15V_ALW SI7658ADP-T1-GE3_POWERPAK8-5~D
+3.3V_SUS +3.3V_ALW_PCH 1
1
39_0603_5%~D
2
1
1
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
39_0402_5%~D
R1502 R624 5 3
1
@ R622
@ R623
@ R636
@ R628
R625
10U_0805_10V4Z~D
100K_0402_5%~D
1
1
+1.5V_CPU_VDDQ_CHG
2
C1411
1.05V_RUN_ENABLE R1307
+5V_RUN_CHG
+1.5V_RUN_CHG
+3.3V_RUN_CHG
+1.05V_RUN_CHG
2
+DDR_CHG
20K_0402_5%~D
+3.3V_ALWPCH_CHG
2
+3.3V_SUS_CHG
1
D
2200P_0402_50V7K~D
2
2 Q1
G SSM3K7002FU_SC70-3~D 1
12 RUN_ON_CPU1.5VS3#
S
C1412
1
D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1
D D D D 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q78
@ @ @ 2
1
D D D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q76
Q77
Q79
Q80
@ @ RUN_ON_ENABLE# 2 2 2 2 G
Q81
Q82
Q202
SUS_ON_3.3V# 2 ALW_ON_3.3V# 2 G G G G 2 S
3
G G S S S S G
3
A A
S S S
3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, POWER CONTROL
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 42 of 66
5 4 3 2 1
5 4 3 2 1
@ H1 @ H2 @ H3 @ H4 @ H5 @ H6 @ H7
@H_3P0 @H_3P0 @H_3P0 @H_3P0 @H_3P0 @H_3P0 @H_3P0
+3.3V_RUN JSNIF1 Fiducial Mark
HDD LED solution for Blue LED 39 PWR_BTN_BD_DET#
PWR_BTN_BD_DET# 1
2
1
EMI CLIP @ FD1
1
+3.3V_ALW
1
2
1
+5V_RUN LID_CL# 3 CLIP1
39 LID_CL# 3
R654 BREATH_BLUE_LED_SNIFF 4 EMI_CLIP FIDUCIAL MARK~D
4
0.1U_0402_16V4Z~D
10K_0402_5%~D 5
40,41 POWER_SW#_MB 5 @ FD2
2 6 1
40 LAT_ON_SW#_R 6 GND
7 1
2
7
C685
WIRELESS_ON#/OFF 8 @ H8 @ H9 @ H10 @ H11 @ H12 @ H13 @ H14
39 WIRELESS_ON#/OFF 8
9 @H_3P0 @H_3P0 @H_3P2 @H_3P2 @H_3P2 @H_3P2 @H_3P1X2P1 CLIP2 FIDUCIAL MARK~D
1 9 EMI_CLIP
10
10
D
3 1 SATA_ACT# 2 11 13 @ FD3
15 SATA_ACT#_R 11 GND
12 14 1 1
1
Q93 Q92 12 GND GND
PDTA114EU_SC70-3~D TYCO_1-2041070-2~D FIDUCIAL MARK~D
G
SSM3K7002FU_SC70-3~D
2
D D
MASK_BASE_LEDS# R659 @ FD4
1
1K_0402_5%~D @ H15 @ H16 @ H18 1
1 2 SATA_LED 2 1 @H_5P2 @H_3P2 @H_4P5N
+5V_ALW FIDUCIAL MARK~D
D42
LTST-C191ZBKT-Q_BLUE~D
1
3
+3.3V_WLAN 2
39 CAP_LED#
+5V_RUN Q120
Keyboard Status LED
3
PDTA114EU_SC70-3~D
1
R662 D67
1
3
100K_0402_5%~D SDM10U45-7_SOD523-2~D 2 1 2 R_CAP_LED# 2 1
39 NUM_LED#
R556 1K_0402_5%~D
Q121 D57
2
3
PDTA114EU_SC70-3~D
S
3 1 1 2 2 LTST-C191ZBKT-Q_BLUE~D
36 LED_WLAN_OUT#
Q98 Q97
1
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D R_NUM_LED#
G
39 SCRL_LED# 2 1 2 2 1
2
R596 1K_0402_5%~D
MASK_BASE_LEDS# Q122 D58
1
PDTA114EU_SC70-3~D LTST-C191ZBKT-Q_BLUE~D
1
1 2 R_SCRL_LED# 2 1
R655 1K_0402_5%~D
R663 D45 +5V_ALW D59
1K_0402_5%~D LTST-C191ZBKT-Q_BLUE~D
1
D
1 2 WLAN_LED 2 1 R1006
3
100K_0402_5%~D MASK_BASE_LEDS# 2
LTST-C191ZBKT-Q_BLUE~D +5V_ALW 1 2 G
+3.3V_ALW Q150 S
3
2 SSM3K7002FU_SC70-3~D
C WLAN LED solution for Blue LED C
6
Q99
C1058
Q144A PDTA114EU_SC70-3~D Battery LED
1
DMN66D0LDW-7_SOT363-6~D D46
+3.3V_RUN R89 1 2 2 +5V_ALW BLUE
1
47K_0402_5%~D 1 2 BATT_BLUE 2 1
+5V_RUN R665 1K_0402_5%~D
1
0.1U_0402_16V4Z~D
1
1
2
R206 R1004 +5V_ALW BATT_YELLOW 4 3
NC
P
100K_0402_5%~D BAT2_LED# 2 4 BAT2_LED 100K_0402_5%~D
40 BAT2_LED# A Y
3
YEL
Q142
3
G
SSM3K7002FU_SC70-3~D
U63 LTST-C155TBJSKT_Blue/YEL~D
2
2
NC7SZ04P5X_NL_SC70-5~D SSM3K7002FU_SC70-3~D
1
D
S
36 LED_WWAN_OUT# 3 1 2
D
MASK_BASE_LEDS#
Q141
Q115 5 3 1 2 2
Q116 PDTA114EU_SC70-3~D Q144B G
SSM3K7002FU_SC70-3~D DMN66D0LDW-7_SOT363-6~D Q139
G
S
2
3
R125 PDTA114EU_SC70-3~D
G
2
MASK_BASE_LEDS# 1K_0402_5%~D
39 SYS_LED_MASK#
1
1 2 WWAN_LED 2 1
1
+3.3V_ALW
D61
LTST-C191ZBKT-Q_BLUE~D R1007
3
100K_0402_5%~D
WWAN LED solution for Blue LED +3.3V_ALW 1 2
+3.3V_ALW 2
Q145A
6
DMN66D0LDW-7_SOT363-6~D Q101
+3.3V_RUN PDTA114EU_SC70-3~D
C1059
1
+5V_RUN R666
C1337 R82 1 2 2 +3.3V_ALW 150_0402_5%~D
1
1 2 47K_0402_5%~D 1 2
1
0.1U_0402_16V4Z~D
3
1
0.1U_0402_16V4Z~D U117
2
5
NC
P
BAT1_LED# 2 4 BAT1_LED 100K_0402_5%~D
NC
P
40 BAT1_LED# A Y
S
41 BT_ACTIVE BT_ACTIVE 2 4 3 1 2
A Y Q143
3
G
B B
U64
2
G
Q95
10K_0402_5%~D
3
1
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D
G
3
D
5 3 1 2 1 2 BATT_BLUE_LED 24
R748
4
1K_0402_5%~D D43 DMN66D0LDW-7_SOT363-6~D PDTA114EU_SC70-3~D
G
2
2
1 2 WPAN_LED 2 1 R1003
150_0402_5%~D
39 SYS_LED_MASK#
1
LTST-C191ZBKT-Q_BLUE~D 1 2 BATT_YELLOW_LED 24
WPAN LED solution for Blue LED +5V_ALW
1
+5V_ALW
R999
100K_0402_5%~D
LED Circuit Control Table
3
Q134B
2
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK# LID_CL# 4 3 2
+3.3V_ALW
6
Q134A Q137
DMN66D0LDW-7_SOT363-6~D PDTA114EU_SC70-3~D
Mask All LEDs (Sniffer Function) 0 X
5
C1060 +5V_ALW
Mask Base MB LEDs (Lid Closed) 1 0 2
1
1
1 2 1 2 BREATH_BLUE_LED BREATH_BLUE_LED 24
39 SYS_LED_MASK#
R90 R664 1K_0402_5%~D
Do not Mask LEDs (Lid Opened) 1 1
1
47K_0402_5%~D +5V_ALW
0.1U_0402_16V4Z~D R1000
5
100K_0402_5%~D
2
3
NC
P
BREATH_LED#_R Q135B
38,40 BREATH_LED# 2 4
2
A Y DMN66D0LDW-7_SOT363-6~D
G
U42 4 3 2
NC7SZ04P5X_NL_SC70-5~D
3
+3.3V_ALW Q138
A PDTA114EU_SC70-3~D A
C1061
5
Q135A
1 2 2 DMN66D0LDW-7_SOT363-6~D R1001
1
MASK_BASE_LEDS# 150_0402_5%~D
1 2 BREATH_BLUE_LED_SNIFF
1
0.1U_0402_16V4Z~D
5
U65
SYS_LED_MASK# 1
P
39 SYS_LED_MASK# B
4 MASK_BASE_LEDS#
LID_CL# 2
A
O DELL CONFIDENTIAL/PROPRIETARY
G
TC7SH08FU_SSOP5~D
Compal Electronics, Inc.
3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PAD and Standoff
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 43 of 66
5 4 3 2 1
5 4 3 2 1
+COINCELL
COIN RTC Battery
1
PR1
1K_0402_5%~D
+3.3V_RTC_LDO
2
JRTC1
+3.3V_ALW 1
Z4012
+COINCELL 1
2 4
2 G1
3 5
3 G2
D ESD Diodes D
MOLEX_53398-0371~D
3
+RTC_CELL
2
PD1
1
PL1 RB715F UMD3 1
PD2 PD3 PD4 FBMA-L18-453215-900LMA90T_1812~D +3.3V_ALW PC1
1
@ DA204U_SOT323~D @ DA204U_SOT323~D @ DA204U_SOT323~D 1 2 1U_0603_10V4Z~D
2
Primary Battery Connector
PJP1 Move to power schematic
1
PBATT+_C 1 2
10K_0402_1%~D
PBATT+
0.1U_0603_25V7K~D
1
PR2
11 PAD-OPEN 4x4m
GND
PC2
10
GND PR3
9
2
9 100_0402_5%~D PR4
8
8 Z4304 100_0402_5%~D PR5
7 1 2 PBAT_SMBCLK <40>
2200P_0402_50V7K~D
7 Z4305 100_0402_5%~D
6 1 2 PBAT_SMBDAT <40>
6 Z4306
5 1 2 PBAT_PRES# <39>
5
1
PC3
4
4 PQ1
3
3
2
2
2 FDN338P_NL_SOT23-3~D
1
1 PD6
1 2 1 3
3
DOCK_SMB_ALERT# <38,40>
PBATT1
SUYIN_200275MR009G50PZR RB751V-40_SOD323-2~D
2
2
PR7
GND 1 2
<38,39,50> SLICE_BAT_PRES#
0_0402_5%~D
C C
1
PC87
1500P_0402_7K~D
2
+5V_ALW
+3.3V_ALW
DA204U_SOT323~D
2
@ PR8 PU1
PD7
2.2K_0402_5%~D
2
1 2 GND <38> DOCK_PSID 1 6 GPIO_PSID_SELECT <39>
0_0402_5%~D NO IN
PR9
2 5 +5V_ALW
PL2 PR10 GND V+
1
BLM18BD102SN1D_0603~D 33_0402_5%~D
NB_PSID NB_PSID_TS5A63157
S
2 1 1 3 1 2 3 4 PS_ID <40>
NC COM
100K_0402_1%~D PQ2 TS5A63157DCKR_SC70-6~D
2 FDV301N_NL_SOT23-3~D +5V_ALW
G
2
+5V_ALW
PR11
DA204U_SOT323~D
+5V_ALW
2
2
PD9
10K_0402_1%~D
DA204U_SOT323~D
1
C
PQ3
PR12
2
3
B MMST3904-7-F_SOT323~D @
PD10
E
15K_0402_1%~D
3
2
@
1
1
@ PD8
PR13
SM24_SOT23 PR14
GND 1 2
1
PSID_DISABLE# <39>
1
PR15 @ 10K_0402_5%~D
0_0402_5%~D
1 2 DCIN_CBL_DET# <39>
.47U_0402_6.3V6-K~D
B B
DC_IN+ Source
2
PC4
@ +DC_IN +DC_IN_SS
PQ74
FDS6679AZ_SO8~D
1 8
PL3 S D
2 7
FBMJ4516HS720NT_1806~D S D
3 6
+DC_IN S D
1 2 4 5
G D
1
1M_0402_5%~D
VZ0603M260APT_0603
2
0.022U_0805_50V7K~D
4.7K_0805_5%~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
PC5
PR16
1
PD11
1
1
PC6
PC7
PC8
PR17
PC10
2
2
0.1U_0603_25V7K~D
1
PJPDC1 PR20
4.7K_0805_5%~D
2
1
1 @ 1 2
2
0.1U_0603_25V7K~D
1
1
PC9
2 10K_0402_5%~D
2
2 -DCIN_JACK
@ PR18
3
1M_0402_5%~D
3
1
2
PC11
4
2
4 +DCIN_JACK
PR19
5
2
5
6
6 @ <50> SOFT_START_GC
7
7
2
MOLEX_87438-0743 PL4
FBMJ4516HS720NT_1806~D
1 2
0.1U_0603_25V7K~D
1
PC12
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +DCIN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 44 of 66
5 4 3 2 1
5 4 3 2 1
+DC1_PWR_SRC
PJP48
+PWR_SRC 1 2
2
PJP49 +5V_VCC1
0_0805_5%~D
0_0805_5%~D
D D
1 2
+5V_ALW2
Peak current : 7.061A
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
PR22
PR23
5 Volt +/-5%
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
PR24
OCP_MIN : 8.473A
1
PAD-OPEN1x1m 10_0603_5%~D
Thermal Design Current : 5.936A
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
1
1
PC19
PC20
PC21
PC22
PC23
2 1
4.7U_0805_6.3V6K~D
PC14
PC15
PC16
PC17
PC18
Peak Current : 8.481A
2
Fsw = 300KHz
1
@
PC24
OCP_MIN : 10.177A @
+3.3V_ALW2
2
0.1U_0603_25V7K~D
Fsw = 400KHz
1
PC25
1U_0402_6.3V4Z~D
@ PR26
0_0402_5%~D
1U_0603_10V6K~D
1
1
0_0402_5%~D
PC26
2
1
PR25
PC27
1 2
2
@ PR27
2
0_0402_5%~D
2
1 2
+5V_ALW2P
5V_3V_REF
EN_3V_5V
+3.3V_ALW2
+3.3V_RTC_LDO PC28
0.1U_0603_25V7K~D
1
GNDA_3V5V 1 2 GNDA_3V5V PR29
VIN
0_0402_5%~D
LDOREFIN 1 2
0.1U_0402_10V7K~D
SI4134DY-T1-GE3 1N SO8
@ PR28
PR30
2
0.1U_0402_10V7K~D
3
0_0603_5%~D @
PC30
33
8
7
6
5
4
3
2
1
5
6
7
8
GNDA_3V5V PU19 1 2
D
1
+5V_ALWP 0_0402_5%~D
PC29
PAD
LDOREFIN
IN
RTC
VCC
TON
D
D
D
D
REF
LDO
ONLDO
REFIN2
SI4128DY-T1-GE3 1N SO8
PQ6
2
2
PQ7
2 @ PR31
G 365K_0402_1%~D
9 32 4
+5V_ALWP PR32 BYP REFIN2 GNDA_3V5V G
10 31 1 2
OUT1 ILIM2
S
S
S
S
C GNDA_3V5V 1 2 12 29 2 PR33 10_0402_5%~D +3.3V_ALWP C
1
3
2
1
EN_3V_5V PGOOD1 PG00D2 EN_3V_5V PL6
14 27
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D +5V_ALW_UGATE ON1 ON2 +3.3V_ALW_UGATE 4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
15 26
+5V_ALWP +5V_ALW_PHASE DH1 DH2 +3.3V_ALW_PHASE +3.3V_ALWP
1 2 16 25 2 1
LX1 LX2
SECFB
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
AGND
PGND
GNDA_3V5V @
BST1
BST2
0_0402_5%~D
0_0402_5%~D
VDD
0.1U_0603_25V7K~D
5
6
7
8
1
DL1
DL2
FDMS7692 1N POWER56-8
PC32
PC31
D
330U_D3L_6.3VM_R25~D
330U_D3L_6.3VM_R25~D
0.1U_0603_25V7K~D
PR34
PR35
D
D
D
D
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
PC35
PC36
1 1
17
18
19
20
21
22
23
24
SI4134DY-T1-GE3 1N SO8
PQ8
@ MAX17020ETJ+_TQFN32_5X5~D
2
1
1
+ @ +
PC33
PC34
PC37
PC38
2
2
G
SECFB
PQ9
4
G
2
2
PR36 PR39 @ PR37
2
2
2 2
S
S
S
S
1 2+5V_ALW_BOOT +3.3V_ALW_BOOT 1 2
0_0402_5%~D
1
1
1
@
0_0402_5%~D
4.7_1206_5%~D
3
2
1
+3.3V_ALW_LGATE
PR38
PR41
1
1
PR40
@
2
2
+5V_ALW_LGATE
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V PC39 PJP50
1U_0603_10V6K~D
1
+5V_ALWP 2 0.1U_0603_25V7K~D 1 2
+3.3V_ALWP +3.3V_ALWP
PC40
1 1 2
3
+5V_ALW2
2
0.1U_0603_25V7K~D
PAD-OPEN1x1m
1
PD12 GNDA_3V5V
100K_0402_1%~D
100K_0402_1%~D
PC41
BAT54SW-7-F_SOT323-3~D
2
2
PC42
PR42
PR43
2 0.1U_0603_25V7K~D PD14
1
1 1 2 BAT54CW_SOT323~D
B B
3 @
1
PR44 PD13 POK2
2K_0402_5%~D
2 1 BAT54SW-7-F_SOT323-3~D
<40> ALWON
3
0_0402_5%~D
1
200K_0402_5%~D
2
PR45
PR47
0_0402_5%~D
PR46
<23> THERM_STP# 2 1
2
1
POK1
PJP5 ALW_PWRGD_3V_5V <40>
1 2
PAD-OPEN1x1m
2
PR49
PC43
PJP8 39K_0402_5%~D
1 2 +3.3V_ALW
2
+3.3V_ALWP
1
PAD-OPEN 4x4m
PJP9
1 2
PAD-OPEN 4x4m
GNDA_3V5V
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL DC/DC +3V/ +5V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 45 of 66
5 4 3 2 1
5 4 3 2 1
+1.5V_SUS_P(TPS51318)
1U_0402_6.3V6K~D
DC_5V_ALW1
2
+3.3V_ALW
PC104
+1.5V_VX
17
16
2
@ PU15
PC89 @
VIN
VIN
1
GNDA_TPS_1.5V @ 0.22U_0603_10V7K~D
1.5 Volt +/-5%
1
@ PR377
D @ PC103 100P_0402_50V8J~D 0_0603_5%~D D
2 1 1
VCCA VBST
15 TPS51318_BST 1 2 Thermal Design Current : 7.876A
@ 2
GND PGOOD
14 1.5V_SUS_PWRGD Peak current : 11.251A
@PR79
@ PR79 5.6K_0402_5%~D PC93 680P_0402_50V7K~D
2 1 2 1 TPS51318_COMP 3
COMP EN
13 DDR_EN OCP_MIN : 13.501A
22.1K_0402_1%~D
TPS51318_VFB 4 12 TPS51318_FSET 2 1
@ PR78 2K_0402_5%~D VFB FSET @ PR74
2 1 +1.5V_SUS_P 5 11 TPS51318_MODE
VOUT MODE
2
+1.5V_SUS_P
10K_0402_5%~D
2 1 1 2 TPS51318_SS 6 10 TPS51318_IMON
SS IMON
2200P_0402_50V7K~D
PR72
1
1
0_0402_5%~D
1.33K_0402_1%~D
PGND
PGND
PC91
1800P_0402_50V7K~D
SW
@ PR76 @ PC92 @
1
PR75
@ TPS51318RUW_QFN17_3P5X3P5~D
1
@
1.33K_0402_1%~D
+1.5V_VX
PR80
GNDA_TPS_1.5V GNDA_TPS_1.5V PJP19
1 2
2
@
PAD-OPEN1x1m
C C
+1.5V_SUS_P(VT356)
PL9
FBMJ4516HS720NT_1806~D
DC_5V_ALW1 1 2 +5V_ALW
2
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
1U_0603_10V6K~D
0.1U_0603_25V7K~D
PC66
PC67
PR59
1
10_0402_1%~D
PC81
PC64
PC65
1
2
AVDD1
0.22U_0402_10V6K~D
1
PC68
D5
D4
D3
D2
D1
PU4
2
VX
VX
VX
VX
VX
BIAS A1 C5
GNDA_1.5V BIAS VDD
+1.5V_R_SEL/LOAD A2 C4 PL8
R_SEL/ILOAD VDD 0.42UH_MPC0740LR42C_20A_20%~D
+1.5V_VDES A3 C3 +1.5V_VX 2 1
VDES GND
PR265 VSENSE1 A4 C2
VSENSE+ GND
1
B 0_0402_5%~D @ B
<40,47> DDR_ON 1 2 DDR_EN A5 C1 PC69
OE GND
AGND
AVDD
TEMP
STAT
0.1U_0603_25V7K~D
IRIPL
2
+1.5V_SUS_P
2200P_0402_50V7K~D
2200P_0402_50V7K~D
B1
B2
B3
B4
B5
54.9K_0402_1%~D
68.1K_0402_1%~D
6.49K_0402_1%~D
VT356FCX-ADJ_CSP20~D
1
2
44.2K_0402_0.5%
1
PR61
PR62
@ PR63
PC95
PC70
PR70
PR60
7.68K_0805_1%~D
1
1.5V_SUS_PWRGD
2
6800P_0402_25V7K~D
PC79
PC80
33.2K_0402_1%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
0.1U_0603_25V7K~D
2
1
1
1
@ @ PR65
PR64
PC94
PC90
@ PC71
PC72
PC73
PC74
PC75
PC76
PC77
PC78
0_0402_5%~D
AVDD1
2
VSENSE1
@
2
1
2
PR61 PR66
0_0402_5%~D 1
PJP13
2
@ PR67
0_0402_5%~D
2
UMA 5.9K
1
PAD-OPEN1x1m
GNDA_1.5V
+3.3V_ALW PJP14
1 2
DSC 6.49K PAD-OPEN 4x4m
100K_0402_1%~D
PJP20
1
+1.5V_SUS_P 1 2 +1.5V_MEM
A A
PR68
PAD-OPEN 4x4m
2
DELL CONFIDENTIAL/PROPRIETARY
1.5V_SUS_PWRGD <40>
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.5V_MEM
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A00
LA-5472P
Date: Wednesday, January 20, 2010 Sheet 46 of 66
5 4 3 2 1
5 4 3 2 1
+1.8V_RUN
+3.3V_ALW PJP301
2 1 +1.8V_PWR_SRC
PAD-OPEN 2x2m~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
1
0_0603_5%~D
0.1U_0603_25V7K~D
PR418
2
1
PC323
PC322
PC321
1
2
D PC320 D
2 1 1.8 Volt +/-5%
100P_0402_50V8J~D Thermal Design Current : 1.148A
0_0402_5%~D
@
GNDA_1.8V
Peak current : 1.640 A
PR416
1.8V_VDD
OCP_MIN : 4.7 A
0_0402_5%~D @
2
2 1
PR417
PU301
1
SYNCH
VDD
VIN
VIN
1 2 5
EN TPAD
17 GNDA_1.8V
<34,39,42> RUN_ON +1.8V_RUN
PR405 0_0402_5%~D
16
NC PL401
6 NC PJP303
2UH +-20% #A915AY-H-2R0M=P3 3.3A
ISL8014IRZ-T_QFN16_4X4~D 15 1.8V_LX 2 1 1.8V_RUNP 2 1
LX
7 PG PAD-OPEN 2x2m~D
680P_0603_50V8J~D
LX 14
PC312
1
150P_0402_50V8F~D
1.8V_FB 8 13
VFB NC
47P_0402_50V8J~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
SGND
SGND
PGND
PGND
124K_0402_1%~D
C @ C
1
1
1
PC319
PR414
PC318
PC317
PC316
1.8V_RUN_PWRGD <39>
10
11
12
1
2
PR406
2
PR407
4.7_0805_5%~D
100K_0402_5%~D
2
100K_0402_1%~D
GNDA_1.8V @
PR415
+3.3V_RUN
2
GNDA_1.8V
PJP302
1 2
PAD-OPEN1x1m
GNDA_1.8V
B B
+0.75V_DDR_VTT
DDR3 Termination
+5V_ALW
+0.75V_P
PC88
2 1
+V_DDR_REF
4.7U_0805_10V4Z~D 0.75Volt +/-5%
PU5
10 3
Thermal Design Current: 0.525A
VIN VTT
+1.5V_SUS_P 2
PJP31
1 DC_1+0.75V_VTT_PWR_SRC 2 5
Peak current: 0.750A
VLDOIN VTTSNS
OCP mini: 0.900A
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
PAD-OPEN 2x2m~D 1 6
VDDQSNS VTTREF
0.1U_0402_10V7K~D
@ PR117 0_0402_5%~D
1 2 7
S3 PGND
4
2
<39> 0.75V_DDR_VTT_ON
PC83
PC84
8
GND
2
PC82
10U_0805_6.3V6M~D
0.1U_0603_25V7K~D
9 11
PR128 S5 BP PJP18
1
1
PC85
2 1 +0.75V_P
A 42 0.75V_VR_EN
PC86
PAD-OPEN 2x2m~D A
1
1 2
<40,46> DDR_ON
PR118 0_0402_5%~D DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT +0.75V_DDR_VT/+1.8V_RUN
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 47 of 66
5 4 3 2 1
5 4 3 2 1
D D
@ PR92
0_0402_5%~D
2 1 VTT_SENSE <11>
2
PR203
13.7K_0402_1%~D
13.7K_0402_1%~D
PR199
20_0603_1%~D
1
1
PR83
1
2
PC131
1 2
GNDA_VTT GNDA_VTT
1500P_0402_7K~D
PR71
0_0402_5%~D
NCP5222_COMP2
NCP5222_COMP1
1
2
<40,42> M_ON 2 1 GNDA_VTT
NCP5222_FB2
NCP5222_FB1
@ PR214 PR96 @
NCP5222_VIN
0_0402_5%~D 0_0402_5%~D
@ PR85
0_0402_5%~D CPU_VTT_ON <39>
1
2 1
<17,39> SIO_SLP_M# NCP5222_ICS2 NCP5222_ICS1
1
+1.05V_MP PU16 NCP5222_CS1-/Vo1 PJP30
SIS412DN-T1-GE3 1N POWERPAK1212-8
SIS412DN-T1-GE3 1N POWERPAK1212-8
VTT_B+ VTT_B+ 1 2
ICS2
FB2
COMP2
COMP1
FB1
ICS1
VIN
+PWR_SRC
NCP5222_CS2+ NCP5222_CS1+
PR211 PAD-OPEN 4x4m
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
5
C NCP5222_EN2/SKIP2 0_0402_5%~D C
SIR472DP-T1-GE3
5
8 28 NCP5222_EN1/SKIP1 1 2
CS2-/Vo2 CS1-/Vo1
1
1
PC97
PC203
PC206
PQ13
PQ15
PC96
PC98
PC99
PC204
PC205
9 27
CS2+ CS1+
2
2
PC132 PR84 PR82 PC100
PQ16
4 10 26
0.1U_0603_25V7K~D 2_0603_5%~D EN2/SKIP2 EN1/SKIP1 2_0603_5%~D 0.1U_0603_25V7K~D4 4
1 2 2 1NCP5222_BST2 11 25 NCP5222_BST1 2 1 1 2
BST2 BST1
NCP5222_UGATE2 12 24 NCP5222_UGATE1
1
2
3
3
2
1
3
2
1
NCP5222_PHASE2 13 23 NCP5222_PHASE1 0.56UH +-20% MPC1040LR56C 23A +1.05VTTP
+1.05V_MP PL7 SWN2 SWN1
0.6UH +-20% MPC0750LR60C 17A 14 22 NCP5222_LGATE1 4 1
DL2 DL1
DRVS/2CH
2 1
PGOOD2
PGOOD1
5
3 2
PGND2
PGND1
5
AGND
VCCP
VCC
220U_V_2.5VM_R9M
220U_V_2.5VM_R9M
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 1
1
PR204
PC122
0.1U_0603_25V7K~D
1
1
+ + PR207 NCP5222MNR2G_QFN28_4X4~D 5.23K_0402_1%~D
PC202
PC136
PC135
PC120
PC121
@ PC210
AON6704L
AON6704L
29
15
NCP5222_PGD2 16
17
18
19
NCP5222_PGD1 20
21
PC134 4.32K_0402_1%~D
PQ12
PQ14
PC211
@ PC220
PC102
4 4 1 2 1 2
AON6704L
2
NCP5222_LGATE2
PQ17
1 2 1 2 4
2
2
0.1U_0603_25V7K~D
1
2 2
NCP5222_VCC
PC119
0.1U_0603_25V7K~D @ @ 0.1U_0603_25V7K~D
PC133
GNDA_VTT
4.7_1206_5%~D
2
3
2
1
3
2
1
2
PR208 1 2
1
2
3
PR87
1 2
2
PR205
6.49K_0402_1%~D 24K_0402_1%~D
PD27 PD19 @
4.7_1206_5%~D
330U_D2E_2.5VM_R9~D
330U_D2E_2.5VM_R9~D
+1.05V_MP NCP5222_CS1-/Vo1
PR206
1 2 2 1
330U_D2E_2.5VM_R9~D
1 1 1
1
PC107
PC105
PC109
+5V_ALW 1 2 +5V_ALW
20_0603_1%~D 2 2 @ 2
1
1
B +3.3V_ALW B
PC208 PC207
1U_0603_16V6K~D 1 3.3U_0603_10V6K~D
1NCP5222_DRVS/2CH
0_0402_5%~D
2
2
+5V_ALW
PR73
100K_0402_1%~D
9.31K_0402_1%~D
2
1
GNDA_VTT @
PR69
PR93
PR95
1
2
<40> 1.05V_M_PWRGD 2 PR210 1 2 1
0_0402_5%~D
H_VTTPWRGD <8>
PR86
0_0402_5%~D
2.74K_0402_1%~D
0_0402_5%~D
1
@
2
PR94
@ PC110
1000P_0402_50V7K~D
BRIDGE_G
2
2 1
4
5 3
2
1
Sharing MOSFET gate driver PQ21
FDMS7672 1N POWER56-8
+15V_ALW +5V_ALW
PJP21
100K_0402_5%~D
PJP32
2
1 2 PC215 PC209
47K_0402_5%~D
+1.05V_MP +1.05V_M
1
GNDA_VTT
PR336
1 2
PAD-OPEN 4x4m 0.01U_0402_25V7K~D 0.01U_0402_25V7K~D 1 2
PR335
A A
2
BRIDGE_G PR212
PJP24
1 2
3
DMN66D0LDW-7 2N SOT363-6
DMN66D0LDW-7 2N SOT363-6
1 2 +1.05V_RUN_VTT
+1.05VTTP 1 2
6
PQ77A 499K_0603_1%~D
5
2 NCP5222_DRVS/2CH
Current Sharing JUMP_43X79
PJP25
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
4
PQ77B 1 2
PJP22
1
1 2 Title
2 1
JUMP_43X79 +1.05V_M/+1.05VTT_RUN
PAD-OPEN1x1m Size Document Number Rev
A00
GNDA_VTT LA-5472P
Date: Wednesday, January 20, 2010 Sheet 48 of 66
5 4 3 2 1
8 7 6 5 4 3 2 1
+1.05V_RUN_VTT +CPU_PWR_SRC
@ @ @
PJP26
PR318
PR319
PR320
PR321
PR322
PR323
PR324
1 2 +PWR_SRC
1
PAD-OPEN 4x4m
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
1 1 1
PC127
PC128
PC129
2
1
<11> VID0 + + +
PC123
PC125
PC126
H H
PC124
<11> VID1
2
2 2 2
3
<11> VID2
@ @ @
D
<11> VID3
PR325
PR326
PR327
SIR472DP-T1-GE3
1
1
<11> VID4
PQ46
2
G
Iccmax : 48A
<11> VID5
PR330
PR331
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
@
I_TDC : 33.6A
PR328 1K_0402_1%~D
PR329 1K_0402_1%~D
S
<11> VID6
OCP mini : 57.6A
1
1
1
1K_0402_1%~D
1K_0402_1%~D
CSP1 PR101 PC130
0_0603_5%~D 0.22U_0603_10V7K~D Load line : -1.9 mV/A
1
1
CSN1 PC198 BOOT1 2 1 BOOT1_2 1 2
PR102 1200P_0402_50V7K~D PL11
1.1_0603_1%~D UGATE1 MPC1040LR45CP 24A
2
0.022U_0402_25V7K~D
G G
0.22U_0603_25V7K~D
1000P_0603_50V7K~D
1
3
PC219
3 2
0.022U_0402_50V7~D
1
1
PC271
2
PC199
PC266
2
1
+3.3V_RUN 1.74K_0402_1%~D 1
PC192
2
H_CPURST#
AON6704L 1N DFN8
GNDA_VCORE LGATE1 @
PQ18
2
<8> G
100K +-5% TSM0B104J4702RE 0402
CSP3 40.2K_0402_1%~D
10K_0402_1%~D
1
0.022U_0402_50V7~D
2
1
@
2.2_1206_1%~D
PR310
1
S
CSN3 PC255 PR122 PH3
PR141
PR301
PR103 0_0402_5%~D 2 1 1 2
1
1
1.1_0603_1%~D 1200P_0402_50V7K~D
PC197
2
0.22U_0603_25V7K~D
0.022U_0402_25V7K~D
@ 2.49K_0402_1%~D 10K_0402_1%_TSM0A103F34D1RZ
1 1
2
1 2
1 2
2
GNDA_VCORE @ PR123 0_0402_5%~D @
1
2
@ PC200
PC258
PR114 CSP1
PH1
PC272
1 2
F PC256 F
100K_0402_5%~D
2
1200P_0402_50V7K~D 0.022U_0402_50V7~D
2
+CPU_PWR_SRC
1
GNDA_VCORE +5V_ALW CSN1
1U_0603_10V6K~D
GNDA_VCORE
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
1
3
PR127
PC263
10U_1206_25V6M~D
10U_1206_25V6M~D
<11,23> IMVP_IMON 2 1
40
39
38
37
36
35
34
33
32
31
1
0_0402_5%~D PU20
PC217
2
2
PC270
PC214
PC218
PC216
CSN1
CSP1
D6
D5
D4
D3
D2
D1
D0
PGD_IN
SIR472DP-T1-GE3
0.033U_0402_16V7K~D
PQ51
2
PR132 30 PR197 PC212 2
1
S
2 27
+5V_ALW VCORE_THRM 3 CSP3 DL1
26
1
VCORE_IMON THRM VDD VRHOT# PL12
PR140 4 25
IMON VRHOT
1
1000P_0603_50V7K~D
FB BST2
3
vcore_vcc 9 3 2
2
DRVSKP
0.022U_0402_50V7~D
FBAC
1
PWRGD
FBAC 10 2 1 LGATE2
CLKEN
D
GNDS +1.05V_RUN_VTT
PWM3
2
SHDN
CSN2
CSP2
PC267
TON
2
PSI
2
PAD
1
PC269 1.74K_0402_1%~D PR305
PC194
2 1
AON6704L 1N DFN8
H_PROCHOT# <8>
PQ22
MAX17030GTL+_TQFN40_5X5~D 2 @ 1 2
1
11
12
13
14
15
16
17
18
19
20
PR116 0_0402_5%~D G
1
0.022U_0402_50V7~D
1
PWM3 @ 40.2K_0402_1%~D
2.2_1206_1%~D
S
PSI#
GNDA_VCORE
PR302
DPRSLPVR
VCORE_TON
VR_ON
1
1
2 PR311
PC233
1 1 2
@ PC265 0.022U_0402_50V7~D 1 2 +3.3V_RUN @
2
@ PR121 PR112 10K_0402_5%~D 2.49K_0402_1%~D 10K_0402_1%_TSM0A103F34D1RZ
2
<11> VCCSENSE 1 2 1K_0402_5%~D @
2 1 PWRGD 1 2 IMVP_PWRGD <8,39>
D PR134 10_0402_5%~D PR113 0_0402_5%~D @ PC213 D
2
CSP2 1 2
PR142 2 1
27.4 +-1% 0402~D PR119 0.022U_0402_50V7~D
PR137 1 2 1 2 +CPU_PWR_SRC
@ +3.3V_RUN
4.75K_0402_1%~D PR111 1.91K_0402_1%~D
1
10U_1206_25V6M~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
3
PC236
1 2
10U_1206_25V6M~D
<11> VSSSENSE 1 2 PR136 PC154
D
+CPU_PWR_SRC
2
1
PR135 10_0402_5%~D PU17 0_0603_5%~D 0.22U_0603_10V7K~D
PC145
PR133 200K_0402_1%~D BOOT3 2 1BOOT3_2 2
PC146
PC147
PC148
5 1 1
SIR472DP-T1-GE3
VDD BST
2
PQ48
2
PR143 GNDA_VCORE 1 2 2 1 +1.05V_RUN_VTT 6 8 UGATE3 2
@ PR110 1K_0402_5%~D SKIP DH G
27.4 +-1% 0402~D
@ @ PC264 0.022U_0402_50V7~D 2 7
PWM LX
S
2 1 H_PSI# <11>
1
C PR115 0_0402_5%~D 3 4 C
1
PR144 GND DL
GNDA_VCORE 2 1 33K_0402_5%~D 9 PL13
PR334 10K_0402_5%~D EP MPC1040LR45CP 24A
2
3
1K_0402_1%~D PR332
PC259
3 2
0.022U_0402_50V7~D
1
1
PR104
1000P_0603_50V7K~D
2
0.022U_0402_25V7K~D
1.1_0603_1%~D
PC268
2 1
0_0402_5%~D PR109 H_DPRSLPVR <11> PR309
2
1
1.74K_0402_1%~D PR306
PC196
12
1
AON6704L 1N DFN8
LGATE3 @
PQ26
PC261
2 1 2 1 2
GNDA_VCORE @ 1K_0402_1%~D PR333 G
PC273
1
0.022U_0402_50V7~D
1
@ 40.2K_0402_1%~D
2
S
CSN2
2.2_1206_1%~D
PR312 PH5
PR303
1
1
1
PC260
PC234
2 1 1 2
2
B 1200P_0402_50V7K~D @ 2.49K_0402_1%~D 10K_0402_1%_TSM0A103F34D1RZ B
2
2
@
GNDA_VCORE @ PC254
CSP3 1 2
PR108 0.022U_0402_50V7~D
<39> IMVP_VR_ON 1 2
0_0402_5%~D CSN3
PJP27
1 2
PAD-OPEN1x1m
GNDA_VCORE
DELL CONFIDENTIAL/PROPRIETARY
A A
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +VCORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 49 of 66
8 7 6 5 4 3 2 1
5 4 3 2 1
PD20
B540C-13-F_SMC2~D
2 1
PQ37
+DOCK_PWR_BAR 8 D S 1
7 D S 2
6 3
D S
0.47U_0805_25V7K~D
5 4
D G
D D
PC226
FDS6679AZ_SO8~D
PR227
330K_0402_5%~D
2
2
PR257
2 1 STSTART_DCBLOCK_GC
0_0402_5%~D
PD21
2
1
PR240 3
330K_0402_5%~D
PDS5100H-13_POWERDI5-3~D
1 2
PQ41 PBATT+ PQ40 PQ42
SI4835DDY-T1-E3_SO8~D FDS6679AZ_SO8~D 8 1
D S
8 1 1 S D 8 7 D S 2
7 2 2 S PBATT_IN_SS
+VCHGR D 7 6 D S 3 +PWR_SRC
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
6 3 3 S D 6 5 D G 4
1
1K_1206_5%~D
5 4
G D
5
PR248
PR260 FDS6679AZ_SO8~D
1
PC227
PC228
2 1
4
C 0_0402_5%~D C
2
1
1U_0603_25V6-K~D
PR259 PC229
1 2 BLK_MOSFET_GC 1U_0805_25V4Z~D
PC230
0_0402_5%~D
2
2
PR279
1
0_0402_5%~D
+DOCK_PWR_BAR 1 2 DK_PWR_BAR PR258
PR277 0_0402_5%~D 0_0402_5%~D
1
1 2 3301_DC_IN_SS
DSCHRG_MOSFET_GC
2
<51> +CHGR_DC_IN
+DC_IN 1 2 CD3301_DCIN
PR280 47_0805_5%~D
1
PC225
0.1U_0603_50V4Z~D
2
P50ALW
36
35
34
33
32
31
30
29
28
1 2 +5V_ALW
PR281 100K_0402_5%~D PU902 PR271 0_0402_5%~D
1 2 <44> SOFT_START_GC
GPIO Input from NB
PBatt+
DC_IN_SS
NC
CHARGERVR_DCIN
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
<38> ACAV_DOCK_SRC#
1
PR261
2
0_0402_5%~D
ACAVDK_SRC
1 2 DOCK_AC_OFF <38,39>
Embedded Controller
1 27 PR273 0_0402_5%~D
DC_IN P50ALW
2 26 1 2
ERC1 SS_GC PBATT_OFF DK_AC_OFF
+SDC_IN 1 2 3 25
PR263 0_0402_5%~D ERC1 DK_AC_OFF_EN 3301_ACAV_IN_NB ACAV_IN_NB <39,40,51> 1M_0402_5%~D
4 24 1 2
ACAVDK_SRC ACAV_IN_NB PR276 0_0402_5%~D PR285
5 23
CD3301_SDC_IN GND GND DK_AC_OFF_EN DOCK_AC_OFF_EC <39>
6 22 1 2
SDC_IN DK_AC_OFF_EN SL_BAT_PRES# PR275 0_0402_5%~D
7 21
<51> DC_BLOCK_GC ACAVIN 8 DC_BLK_GC SL_BAT_PRES# BLKNG_MOSFET_GC
20
P33ALW2 9 ACAV_IN BLKNG_MOSFET_GC
19
P33ALW2 NBDK_DCINSS
EN_DK_PWRBAR
<23,40,51> ACAV_IN 1 2
SS_DCBLK_GC
PR264 0_0402_5%~D
SLICE_BAT_PRES# <38,39,44>
DK_CSS_GC
1 2 1 2
PWR_SRC
P33ALW
37 TP
ERC3
ERC2
2 1 1 2
GND
+3.3V_ALW2 +NBDOCK_DC_IN_SS
PR270 0_0402_5%~D
@ PD22
RB751S40T1_SOD523-2~D CD3301RHHR_QFN36_6X6~D
10
11
12
13
14
15
16
17
18
<51> CSS_GC
0.1U_0603_25V7K~D
P33ALW 1 2
ERC2
+3.3V_ALW
1
@ PR282 ERC3
180_0402_1%~D
EN_DOCK_PWR_BAR <39>
0.047U_0603_25V7K~D
EN_DK_PWRBAR 1 2
2
0.1U_0402_25V4Z~D
PR268 0_0402_5%~D
2
1 2
PC232
1M_0402_5%~D
PC235
STSTART_DCBLOCK_GC
A @ PR283 A
2
@ 3301_PWRSRC 1 2 +PWR_SRC
PR267 0_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Selector
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 50 of 66
5 4 3 2 1
5 4 3 2 1
PD15 B540C~D
2 1
PQ80
SI4835DDY-T1-E3 1P SO8 +SDC_IN PR145 +PWR_SRC CHAGER_SRC
8 1 0.01_1206_1%~D
7 2 PJP28
TBD_0603_25V7K~D
6 3 1 4 1 2
+DC_IN_SS
5
0.1U_0603_25V7K~D
@ 2 3 PAD-OPEN 4x4m
NTR4502PT1G_SOT23-3~D
2200P_0402_50V7K~D
4
1
PC160
PC158
PC159
PR402
NTR4502PT1G_SOT23-3~D
<50> DC_BLOCK_GC 1 2
2
1
0_0402_5%~D PR403 1 @ @
<50> CSS_GC
PQ28
D D
1 2 2
0_0402_5%~D 2
E2 AC_OK = 17.7V
1
1
3
3
PQ29
2
2 PQ71B
NTGD4161PT1G_TSOP6~D
PR161 3
S
TI BQ24745 = 316K 2 4
D
DOCK_DCIN_IS+ <38>
G
3
Maxim MAX8731 = 383K
10_0402_1%~D
S
2 1 5 6
D
DOCK_DCIN_IS- <38>
100K_0402_5%~D
100K_0402_5%~D
10_0402_1%~D
1
1
+SDC_IN
PR155
PR153
1
10K_0402_5%~D
G
1
PR354
PR156
PR157
ISL88731_VDDP ISL88731_VREF @ PC162 PC163
10K_0402_1%~D
0_0402_5%~D
0.1U_0603_25V7K~D 0.1U_0402_10V7K~D
2
2
226K_0402_1%~D
PR161
PR404 1 2 1 2 2 1 PR412
2
1
PR160
28
27
GNDA_CHG
1
1
@ PC351 GNDA_CHG PU10
2
.1U_0805_25V7K~D
CSSP
NC
CSSN
2
PR162 2 1 22 26
49.9K_0402_1%~D DCIN VCC PR164 PR163
RB751V_SOD323~D
2 1 2 2.2_0603_1%~D 33_0603_1%~D
PR165 ACIN
25 1 2
BOOT
15.8K_0402_1%~D
PC166 1 2 13
1
<23,40,50> ACAV_IN ACOK
1
PC167
0.1U_0603_25V7K~D
0_0402_5%~D
1
PD17
C C
SI4800BDY-T1_SO8~D
SI4800BDY-T1_SO8~D
2 1 11
VDDSMB
5
6
7
8
5
6
7
8
PR166
0.01U_0402_25V7K~D 10 PC168
2
SCL
2200P_0402_50V7K~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
@ 1U_0603_10V6K~D
PQ30
PQ31
GNDA_CHG +3.3V_ALW 9 21 ISL88731_VDDP 1 2
2
SDA VDDP
1
PC169
PC170
PC171
PC172
GNDA_CHG 14 4 4
NC CHG_UGATE
UGATE 24
ISL88731_ICM 8
2
ICM
1
23 2 PR167 1
PC173 PHASE 0_0603_1%~D
6
3
2
1
3
2
1
VCOMP
3300PF_0402_50V7K~D
0.1U_0402_10V7K~D
2
1 2 5 PC174
@ PR168 NC 220P_0402_50V7K~D
2
130P_0402_10V7K~D
2.2K_0402_5%~D
1
@ PC175 @ PR169 PR171
<40> CHARGER_SMBCLK
1
+VCHGR
PC176
2000P_0402_10V7K~D 7.5K_0402_5%~D 0.01_1206_1%~D
PR170
<40> CHARGER_SMBDAT
2
2
PC177
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
2200P_0402_50V7K~D
1.8K_1206_5%~D
0.1U_0603_25V7K~D
18
CSOP
5
6
7
8
SI4812BDY-T1-E3_SO8~D
<23> MAX8731_IINP @ PC178 @ PR172 5.6U_HMU1356B-5R6-F 8A 2 3
2
1
130P_0402_10V7K~D@ 1 2 7 17 @
D
D
D
D
NC CSON
1
10_0402_1%~D
PR173
6.81K_0402_1%~D
0.1U_0402_10V7K~D
1 2 0_0402_5%~D @ PC179
1
1
10_0402_1%~D
PC186
PC187
PC188
PC189
PC300
0.1U_0402_10V7K~D
15 1 PR174 2 +VCHGR
VFB
1
1
PR175
PC180
1U_0603_10V6K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
12 1000P_0603_50V7K
1 2
2
GND
1
PQ32
16 100_0402_5%~D 4
2
NC G
1
1
PC181
PC182
PC183
PC184
PC185
PR176
PR355
4.7_1206_5%
29 @
2
GND
PR177
@ @
2
S
S
S
2
RHU002N06_SOT323
@ @ @ ISL88731_TQFN28~D
3
2
1
@ PC191
1
PJP29 D
1 2 1 2 2 1
PQ33
B B
1 2 2
@ PC190 0.1U_0402_10V7K~D G
0.1U_0603_25V7K~D @ PC350 S
3
PAD-OPEN1x1m 0.1U_0603_25V7K~D @
GNDA_CHG GNDA_CHG GNDA_CHG
For Maxim Charger only GNDA_CHG ACAV_IN
+3.3V_ALW ISL88731_VREF
+DC_IN ISL88731_VREF PR422
100K_0402_5%~D
100K_0402_5%~D
1M_0402_5%~D
232K_0402_1%~D
1 2
1
1
47K_0402_1%~D
1
PR423
PR341
PR362
PR420
+5V_ALW
@
2
2
2
4
5 PR401 PU11A
P
21.5K_0402_1%
7 1 2 2 LM393DR_SO8~D
G
O 0_0402_5%~D IN-
6 1
IN- O
G
1
100P_0402_50V8J
42.2K_0402_1%~D
PU11B 3
IN+
1
P
PC352
PR192
LM393DR_SO8~D
4
1
8
1
PC330
PR421
2
2
A A
2
PC193 @ PC195 @
2
0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
2
1
+5V_ALW DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 51 of 66
5 4 3 2 1
5 4 3 2 1
D D
GPU_CORE
PJP905
+GPU_PWR_SRC 1 2 +PWR_SRC
Thermal Design Current : 11.587A
PAD-OPEN 43X118 Peak current : 14.990A
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
+5V_RUN
1 1 2
OCP min : 17.988A
1
PC904
PC903
PC901
PC902
2
PC909 2 2 1
1
1U_0603_10V6K~D
1 2 PR901
2.2_0805_5%~D
3
GPU_CORE_VCC
GPU_LGATE
D
1U_0603_10V6K~D
0.1U_0402_10V7K~D
1
1
PC908
PC907
SIR472DP-T1-GE3
PQ50
2
2
2 G
20
1
S
PU901
PVCC
LGATE
1
GNDA_GPU_CORE GNDA_GPU_CORE PL901
0.56UH +-20% MPC1040LR56C 23A
2 19
PGND VCC PR921
C 4 1 +VCC_GFX_CORE C
2.2_0603_1%~D PC906
2200P_0402_50V7K~D
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
GNDA_GPU_CORE 3 18 GPU_BOOT1 2 1 2 3 2
0.1U_0402_10V7K~D
GND BOOT
1 1
1
0.22U_0603_10V7K~D @ PC905
1
GPU_EN GPU_UGATE 1000P_0603_50V7K~D + +
PQ55
PC919
PC918
PC917
2 1 4 17
AON6704L
D
10_0402_5%~D
<39,42,47> RUN_ON EN UGATE
@ PR903 0_0402_5%~D
PR924
PC920
1 2
2
2
2
GPU_VID1 5 16 GPU_PHASE PR923 2 2
VID1 PHASE @PR922
@ PR922
<39> DGPU_PWR_EN 2 1 2 3.3K +-1% 0402
2
PR904 0_0402_5%~D G 2.2_1206_1%~D
GPU_VID0 6 15 GPU_LGATE
PC916
1
VID0 NC
S
+3.3V_RUN
2
2 1
1
SREF 7 14 GPU_OCSET
SREF OCSET 0.18U_0603_16V7K~D
.056U_0603_16V7~D
1
2
1 2 GPU_VDD_SENSE <55>
10K_0402_5%~D
1
SET1 FB
PGOOD
1
PR916
SET2
PR926
<53> GPU_VID_1 2 1
1
GNDA_GPU_CORE 2 1
PR936 ISL62872HRUZ_TQFN20_1P8X3P2~D
10
11
0_0402_5%~D 18.7K_0402_1%
3.3K +-1% 0402
2
PC911 PR907
PR920 1 2 2 1
2
SET2
10K_0402_5%~D
GPU_PWRGD
1 2
PR908
255K_0402_1%~D
1
45.3K_0402_1%~D 2 1
PR934
+3.3V_RUN 24.9K_0402_1%~D
B B
2
1
2
PR909
@ PR910 49.9K_0402_1%~D
10K_0402_5%~D GNDA_GPU_CORE
2
1
PR911
2 1 +3.3V_RUN
<53> GPU_VID_0
0_0402_5%~D GNDA_GPU_CORE
2
PR927 PR905
10K_0402_5%~D 10K_0402_5%~D
1
<19> DGPU_PWROK 1 2
PR906
0_0402_5%~D
A A
PJP901
PJP902
1 2 2 1
PAD-OPEN 43X118
1.0V 0.85V 0.8V 0.75V
PAD-OPEN1x1m
GPU_VID_0 0 1 0 1
PJP903
+VCC_GFX_CORE 1 2 +GPU_CORE
GPU_VID_1 0 0 1 1 DELL CONFIDENTIAL/PROPRIETARY
GNDA_GPU_CORE
PAD-OPEN 43X118
Compal Electronics, Inc.
Title
output voltage adjustable network
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ISL62870 GPU core
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 52 of 66
5 4 3 2 1
5 4 3 2 1
U106A
Part 1 of 5
PEG_CTX_GRX_P[0..15] PEG_CTX_GRX_P0 AE12 N1 ENVDD_GPU 1 2
7 PEG_CTX_GRX_P[0..15] PEG_CTX_GRX_N0 PEX_RX0 GPIO0 DPB_GPU_HPD
AF12 G1 R1327 10K_0402_5%~D
PEG_CTX_GRX_N[0..15] PEG_CTX_GRX_P1 PEX_RX0_N GPIO1 BIA_PWM_GPU DPB_GPU_HPD 38 BIA_PWM_GPU
7 PEG_CTX_GRX_N[0..15] AG12 PEX_RX1 GPIO2 C1 BIA_PWM_GPU 24 1 2
PEG_CTX_GRX_N1 AG13 M2 ENVDD_GPU ENVDD_GPU 24,39 @ R1347 10K_0402_5%~D
PEG_CRX_GTX_P[0..15] PEG_CTX_GRX_P2 PEX_RX1_N GPIO3 PANEL_BKEN_DGPU
7 PEG_CRX_GTX_P[0..15] AF13 PEX_RX2 GPIO4 M3 PANEL_BKEN_DGPU 39
PEG_CTX_GRX_N2 AE13 K3 GPU_VID_0 GPU_VID_0 52
PEG_CRX_GTX_N[0..15] PEG_CTX_GRX_P3 PEX_RX2_N GPIO5 GPU_VID_1
7 PEG_CRX_GTX_N[0..15] AE15 K2 GPU_VID_1 52
PEG_CTX_GRX_N3 PEX_RX3 GPIO6
AF15 J2
D PEG_CTX_GRX_P4 PEX_RX3_N GPIO7 THERMTRIP_VGA# D
AG15 C2 THERMTRIP_VGA# 23
GPIO
PEG_CTX_GRX_N4 PEX_RX4 GPIO8
AG16 M1
PEG_CTX_GRX_P5 PEX_RX4_N GPIO9
AF16 D2
PEG_CTX_GRX_N5 PEX_RX5 GPIO10
AE16 D1
PEG_CRX_GTX_P0 0.1U_0402_10V7K~D C1439 PEG_CRX_GTX_C_P0 PEG_CTX_GRX_P6 PEX_RX5_N GPIO11 GPU_CLKDWN
2 1 AE18 J3 GPU_CLKDWN 39
PEG_CRX_GTX_N0 0.1U_0402_10V7K~D C1440 PEG_CRX_GTX_C_N0 PEG_CTX_GRX_N6 PEX_RX6 GPIO12
2 1 AF18
PEX_RX6_N GPIO13
J1
PEG_CTX_GRX_P7 AG18 K1
PEG_CRX_GTX_P1 0.1U_0402_10V7K~D C1441 PEG_CRX_GTX_C_P1 PEG_CTX_GRX_N7 PEX_RX7 GPIO14 DPC_GPU_HPD
2 1 AG19
PEX_RX7_N GPIO15
F3 DPC_GPU_HPD 26
PEG_CRX_GTX_N1 0.1U_0402_10V7K~D 2 1 C1442 PEG_CRX_GTX_C_N1 PEG_CTX_GRX_P8 AF19 G3
PEG_CTX_GRX_N8 PEX_RX8 GPIO16
AE19 G2
PEG_CRX_GTX_P2 0.1U_0402_10V7K~D 2 1 C1443 PEG_CRX_GTX_C_P2 PEG_CTX_GRX_P9 AE21
PEX_RX8_N GPIO17
F1
Close to GPU
PEG_CRX_GTX_N2 0.1U_0402_10V7K~D C1444 PEG_CRX_GTX_C_N2 PEG_CTX_GRX_N9 PEX_RX9 GPIO18 EDP_HPD
2 1 AF21
PEX_RX9_N GPIO19
F2 EDP_HPD 24
PEG_CTX_GRX_P10 AG21 GPU_CRT_RED 1 2
PEG_CRX_GTX_P3 0.1U_0402_10V7K~D C1446 PEG_CRX_GTX_C_P3 PEG_CTX_GRX_N10 PEX_RX10 GPU_CRT_HSYNC R1367 150_0402_1%~D
2 1 AG22 PEX_RX10_N DACA_HSYNC AD2 GPU_CRT_HSYNC 27
PEG_CRX_GTX_N3 0.1U_0402_10V7K~D 2 1 C1447 PEG_CRX_GTX_C_N3 PEG_CTX_GRX_P11 AF22 AD1 GPU_CRT_VSYNC GPU_CRT_GRN 1 2
PEX_RX11 DACA_VSYNC GPU_CRT_VSYNC 27
PEG_CTX_GRX_N11
DACA
AE22 R1368 150_0402_1%~D
PEG_CRX_GTX_P4 0.1U_0402_10V7K~D C1448 PEG_CRX_GTX_C_P4 PEG_CTX_GRX_P12 PEX_RX11_N GPU_CRT_RED GPU_CRT_BLU
2 1 AE24 PEX_RX12 DACA_RED AE2 GPU_CRT_RED 27 1 2
PEG_CRX_GTX_N4 0.1U_0402_10V7K~D 2 1 C1449 PEG_CRX_GTX_C_N4 PEG_CTX_GRX_N12 AF24 AD3 GPU_CRT_BLU R1369 150_0402_1%~D
PEG_CTX_GRX_P13 PEX_RX12_N DACA_BLUE GPU_CRT_GRN GPU_CRT_BLU 27
AG24 AE3 GPU_CRT_GRN 27
PEG_CRX_GTX_P5 0.1U_0402_10V7K~D C1450 PEG_CRX_GTX_C_P5 PEG_CTX_GRX_N13 PEX_RX13 DACA_GREEN
2 1 AF25
PEG_CRX_GTX_N5 0.1U_0402_10V7K~D C1451 PEG_CRX_GTX_C_N5 PEG_CTX_GRX_P14 PEX_RX13_N DACA_VREF C1456 1
2 1 AG25 PEX_RX14 DACA_VREF AF1 2 0.1U_0402_10V7K~D
PEG_CTX_GRX_N14 DACA_RSET
PCI EXPRESS
AG26 AE1 1 2
PEG_CRX_GTX_P6 0.1U_0402_10V7K~D C1452 PEG_CRX_GTX_C_P6 PEG_CTX_GRX_P15 PEX_RX14_N DACA_RSET R1325 124_0402_1%~D +3.3V_RUN
2 1 AF27 PEX_RX15
PEG_CRX_GTX_N6 0.1U_0402_10V7K~D 2 1 C1453 PEG_CRX_GTX_C_N6 PEG_CTX_GRX_N15 AE27 U6
PEX_RX15_N DACB_HSYNC
DACB_VSYNC U4
PEG_CRX_GTX_P7 0.1U_0402_10V7K~D 2 1 C1454 PEG_CRX_GTX_C_P7 PEG_CRX_GTX_C_P0 AD10
DACB
PEG_CRX_GTX_N7 0.1U_0402_10V7K~D C1455 PEG_CRX_GTX_C_N7 PEG_CRX_GTX_C_N0 PEX_TX0
2 1 AD11 T5
PEX_TX0_N DACB_RED
1
PEG_CRX_GTX_C_P1 AD12 R4 @ R1421
PEG_CRX_GTX_P8 0.1U_0402_10V7K~D C1457 PEG_CRX_GTX_C_P8 PEG_CRX_GTX_C_N1 PEX_TX1 DACB_BLUE
2 1 AC12
PEX_TX1_N DACB_GREEN
T4
PEG_CRX_GTX_N8 0.1U_0402_10V7K~D C1458 PEG_CRX_GTX_C_N8 PEG_CRX_GTX_C_P2 10K_0402_5%~D
2 1 AB11
PEX_TX2
PEG_CRX_GTX_C_N2 AB12 R6
PEG_CRX_GTX_P9 0.1U_0402_10V7K~D C1459 PEG_CRX_GTX_C_P9 PEG_CRX_GTX_C_P3 PEX_TX2_N DACB_VREF
2 1 AD13 V6
2
C PEG_CRX_GTX_N9 0.1U_0402_10V7K~D C1460 PEG_CRX_GTX_C_N9 PEG_CRX_GTX_C_N3 PEX_TX3 DACB_RSET GPU_TESTMODE C
2 1 AD14
PEX_TX3_N
PEG_CRX_GTX_C_P4 AD15
PEG_CRX_GTX_P10 0.1U_0402_10V7K~D C1461 PEG_CRX_GTX_C_P10 PEG_CRX_GTX_C_N4 PEX_TX4
2 1 AC15 PEX_TX4_N
1
PEG_CRX_GTX_N10 0.1U_0402_10V7K~D 2 1 C1462 PEG_CRX_GTX_C_N10 PEG_CRX_GTX_C_P5 AB14 AF3 GPU_JTAG_TCK R1338
PEG_CRX_GTX_C_N5 PEX_TX5 JTAG_TCK GPU_JTAG_TDI TV9
AB15 PEX_TX5_N JTAG_TDI AG4 TV7
PEG_CRX_GTX_P11 0.1U_0402_10V7K~D C1463 PEG_CRX_GTX_C_P11 PEG_CRX_GTX_C_P6 GPU_JTAG_TDO 10K_0402_5%~D
2 1 AC16 AE4
TEST
PEX_TX6 JTAG_TDO TV8
PEG_CRX_GTX_N11 0.1U_0402_10V7K~D 2 1 C1464 PEG_CRX_GTX_C_N11 PEG_CRX_GTX_C_N6 AD16 AF4 GPU_JTAG_TMS
PEX_TX6_N JTAG_TMS TV6
PEG_CRX_GTX_C_P7 AD17 AG3 GPU_JTAG_TRST# R1372 1 2
2
PEG_CRX_GTX_P12 0.1U_0402_10V7K~D C1465 PEG_CRX_GTX_C_P12 PEG_CRX_GTX_C_N7 PEX_TX7 JTAG_TRST_N 1K_0402_1%~D
2 1 AD18 PEX_TX7_N
PEG_CRX_GTX_N12 0.1U_0402_10V7K~D 2 1 C1466 PEG_CRX_GTX_C_N12 PEG_CRX_GTX_C_P8 AC18 AD25 GPU_TESTMODE
PEG_CRX_GTX_C_N8 PEX_TX8 TESTMODE
AB18 PEX_TX8_N
PEG_CRX_GTX_P13 0.1U_0402_10V7K~D 2 1 C1468 PEG_CRX_GTX_C_P13 PEG_CRX_GTX_C_P9 AB19
PEG_CRX_GTX_N13 0.1U_0402_10V7K~D C1469 PEG_CRX_GTX_C_N13 PEG_CRX_GTX_C_N9 PEX_TX9
2 1 AB20
PEX_TX9_N
PEG_CRX_GTX_C_P10 AD19 R1 GPU_CRT_CLK_DDC_R R1418 1 2 33_0402_5%~D
PEG_CRX_GTX_P14 PEG_CRX_GTX_C_P14 PEG_CRX_GTX_C_N10 PEX_TX10 I2CA_SCL GPU_CRT_DAT_DDC_R R1419 1 GPU_CRT_CLK_DDC 27
0.1U_0402_10V7K~D 2 1 C1470 AD20 T3 2 33_0402_5%~D
PEG_CRX_GTX_N14 PEG_CRX_GTX_C_N14 PEG_CRX_GTX_C_P11 PEX_TX10_N I2CA_SDA GPU_CRT_DAT_DDC 27
0.1U_0402_10V7K~D 2 1 C1471 AD21
PEG_CRX_GTX_C_N11 PEX_TX11 I2CB_SCL
AC21 R2
PEG_CRX_GTX_P15 0.1U_0402_10V7K~D C1472 PEG_CRX_GTX_C_P15 PEG_CRX_GTX_C_P12 PEX_TX11_N I2CB_SCL I2CB_SDA
2 1 AB21
PEX_TX12 I2CB_SDA
R3
PEG_CRX_GTX_N15 0.1U_0402_10V7K~D 2 1 C1473 PEG_CRX_GTX_C_N15 PEG_CRX_GTX_C_N12 AB22
PEG_CRX_GTX_C_P13 PEX_TX12_N I2CC_SCL
AC22 A2
I2C
PEG_CRX_GTX_C_N13 PEX_TX13 I2CC_SCL I2CC_SDA
AD22 B1
PEG_CRX_GTX_C_P14 PEX_TX13_N I2CC_SDA
AD23
PEG_CRX_GTX_C_N14 PEX_TX14 HDCP_CLK
AD24 A3
PEG_CRX_GTX_C_P15 PEX_TX14_N I2CH_SCL HDCP_DAT
AE25 A4
PEG_CRX_GTX_C_N15 PEX_TX15 I2CH_SDA
AE26
PEX_TX15_N DAI_GPU_R3P_SMBCLK
T1 DAI_GPU_R3P_SMBCLK 29,40
I2CS_SCL DAI_GPU_R3P_SMBDAT
AB10 PEX_REFCLK I2CS_SDA T2 DAI_GPU_R3P_SMBDAT 29,40
16 CLK_PCIE_VGA
AC10 PEX_REFCLK_N
16 CLK_PCIE_VGA# R1417 1 +3.3V_RUN
2 10K_0402_5%~D
PEX_TSTCLK_OUT
Differential signal 1
@ R1345
2
200_0402_1%~D PEX_TSTCLK_OUT#
AF10
AE10
PEX_TSTCLK_OUT
D11 XTALSSIN @R1317
@ R1317 1 2 0_0402_5%~D CLK_NVSS_27M 6
PEX_TSTCLK_OUT_N XTAL_SSIN
B XTALOUTBUFF R1416 1 DAI_GPU_R3P_SMBCLK B
2 1 AG10
PEX_TERMP XTAL_OUTBUFF
E9 2 10K_0402_5%~D @ R1336 1 2 2.2K_0402_5%~D
R1351 2.49K_0402_1%~D
1 2 PLTRST_GPU#_R AD9 E10 1 2 NV_CLK_27M_OUT DAI_GPU_R3P_SMBDAT @ R1337 1 2 2.2K_0402_5%~D
CLK
18 PLTRST_GPU# PEX_RST_N XTAL_OUT
R1346 0_0402_5%~D R1541 0_0402_5%~D
+3.3V_RUN 1 2 CLK_REQ# AE9 D10 CLK_27M_IN 1 2 CLK_NV_27M 6
R9 10K_0402_5%~D PEX_CLKREQ_N XTAL_IN @R631
@ R631 0_0402_5%~D
N10M-NS-S-A2_BGA533~D
16 CLK_REQ#
Y7 27MHZ_10PF_X3S027000BA1H-U~D
CLK_27M_IN 1 3 NV_CLK_27M_OUT
2 G1 +3.3V_RUN
G2 4
10P_0402_50V8J~D
10P_0402_50V8J~D
1 1
C1892
C1891
1 2 GPU_CRT_CLK_DDC
R1455 4.7K_0402_5%~D
2 2 1 2 GPU_CRT_DAT_DDC
R1454 4.7K_0402_5%~D
1 2 HDCP_DAT
R1359 2.2K_0402_5%~D
2 1 HDCP_WP
+3.3V_RUN R1362 10K_0402_5%~D
2 1 I2CB_SCL
R1363 2.2K_0402_5%~D
1
2 1 I2CB_SDA
R1328 +3.3V_RUN R1364 2.2K_0402_5%~D
2.2K_0402_5%~D @ C1499
@C1499 2 1 I2CC_SCL
1 2 R1365 2.2K_0402_5%~D
2 1 I2CC_SDA
2
A A
8 VCC A0 1 1 2
@ R1329 HDCP_WP 7 WP 2 @ R1356 0_0402_5%~D
10K_0402_5%~D HDCP_CLK A1
6 SCL A2 3 1 2
HDCP_DAT 5 SDA 4 @ R1358
GND 0_0402_5%~D
2
190-00001-0001-T03 AT88SC0808C_SO8~D
U106C
Part 3 of 5
1 2 DPB_GPU_AUX/DDC AC4 C15
R646 100K_0402_5%~D IFPA_TXC NC
AD4 D15
NC
DPB_GPU_AUX#/DDC IFPA_TXC_N NC U106E
1 2 V5 IFPA_TXD0 NC J5
R647 100K_0402_5%~D V4 B2 Part 5 of 5 U2
DPD_GPU_EDP_AUX IFPA_TXD0_N GND GND
1 2 AA5 IFPA_TXD1 B5 GND GND U5
R648 100K_0402_5%~D AA4 B8 U11
DPD_GPU_EDP_AUX# IFPA_TXD1_N GND GND
1 2 W4
IFPA_TXD2
B11
GND GND
U12
R652 100K_0402_5%~D Y4 T6 B14 U13
DPC_GPU_AUX/DDC IFPA_TXD2_N DBG_DATA0 GND GND
DBG
1 2 AB4
IFPA_TXD3 DBG_DATA1
W6 B17
GND GND
U14
D R653 100K_0402_5%~D D
AB5 Y6 B20 U15
DPC_GPU_AUX#/DDC IFPA_TXD3_N DBG_DATA2 GND GND
1 2 DBG_DATA3
AA6 B23
GND GND
U16
R656 100K_0402_5%~D N3 B26 U17
DBG_DATA4 GND GND
AB3 E2 U23
IFPB_TXC GND GND
AB2 E5 U26
IFPB_TXC_N GND GND
W1 E8 V9
IFPB_TXD4 STRAP0 GND GND
V1 C7 E11 V19
IFPB_TXD4_N STRAP0 GND GND
STRAP
W3 E17 W11
LVDS / TMDS
IFPB_TXD5 STRAP1 GND GND
W2 B9 E20 W14
IFPB_TXD5_N STRAP1 GND GND
AA2 E23 W17
IFPB_TXD6 STRAP2 GND GND
AA3 A9 E26 Y2
IFPB_TXD6_N STRAP2 GND GND
AB1 H2 Y5
IFPB_TXD7 GND GND
GND
AA1 IFPB_TXD7_N H5 GND GND Y23
J11 GND GND Y26
J14 GND GND AC2
25 DPB_GPU_AUX/DDC G4 IFPC_AUX_I2CW_SCL BUFRST_N N5 Use DP8 and DN8 for GFX J17 GND GND AC5
G5 K9 AC6
25 DPB_GPU_AUX#/DDC
P4
IFPC_AUX_I2CW_SDA_N thermal monitor K19
GND GND
AC8
38 DPB_GPU_LANE_P0 IFPC_L0 GND GND
N4 L2 AC11
GENERAL
38 DPB_GPU_LANE_N0 IFPC_L0_N GND GND
TO DOCKING 38 DPB_GPU_LANE_P1
M5
M4
IFPC_L1 THERMDN
D8
1
VGA_THERMDN 23 L5
L11
GND GND
AC14
AC17
38 DPB_GPU_LANE_N1 IFPC_L1_N GND GND
L4 D9 L12 AC20
38 DPB_GPU_LANE_P2 IFPC_L2 THERMDP @ C1467 GND GND
K4 IFPC_L2_N L13 GND GND AC23
38 DPB_GPU_LANE_N2 2200P_0402_25V7K~D
H4 IFPC_L3 L14 GND GND AC26
38 DPB_GPU_LANE_P3 2
J4 IFPC_L3_N VGA_THERMDP 23 L15 GND GND AF2
38 DPB_GPU_LANE_N3
NC N2 L16 GND GND AF5
R1366 L17 AF8
SPDIF_OUT_GPU GND GND
D3 IFPD_AUX_I2CX_SCL NC F9 1 2 M12 GND GND AF11
24 DPD_GPU_EDP_AUX
D4 M13 AF14
24 DPD_GPU_EDP_AUX# IFPD_AUX_I2CX_SDA_N 36K_0402_5%~D GND GND
F5 M14 AF17
24 DPD_GPU_LANE_P0 IFPD_L0 GND GND
24 DPD_GPU_LANE_N0
F4
IFPD_L0_N refer DS-03984-001_v04, M15
GND GND
AF20
E4 B10 N10M-NS remove CEC, S/PDIF?? M16 AF23
C 24 DPD_GPU_LANE_P1 IFPD_L1 ROM_CS_N GND GND C
D5 P2 AF26
SERIAL
24 DPD_GPU_LANE_N1 IFPD_L1_N ROM_SCLK_GPU GND GND
C3 IFPD_L2 ROM_SCLK C9 P5 GND GND T16
IFPD for eDP & DP only C4
B3
IFPD_L2_N
A10 ROM_SI_GPU
P9
P19
GND GND T15
T14
IFPD_L3 ROM_SI GND GND
B4 IFPD_L3_N P23 GND GND F6
C10 ROM_SO_GPU P26
ROM_SO GND
T12 A15 1 2
GND FB_CAL_PU_GND R1433 40.2_0402_1%~D
F7 IFPE_AUX_I2CY_SCL T13 GND
26 DPC_GPU_AUX/DDC
26 DPC_GPU_AUX#/DDC G6 IFPE_AUX_I2CY_SDA_N FB_CAL_TERM_GND B16 1 2
D6 R1434 60.4_0402_1%~D
26 DPC_GPU_LANE_P0 IFPE_L0
C6 IFPE_L0_N IFPAB_RSET AB6 W16 GND_SENSE MULTI_STRAP_REF0_GND F11 1 2
26 DPC_GPU_LANE_N0 R1467 40.2K_0402_1%~D
TO MB/DOCKING 26 DPC_GPU_LANE_P1
A6
A7
IFPE_L1
R5 R1429 1 2 1K_0402_1%~D E14 F10 1 2
26 DPC_GPU_LANE_N1 IFPE_L1_N IFPC_RSET GND_SENSE MULTI_STRAP_REF1_GND R1466 40.2K_0402_1%~D
B6
26 DPC_GPU_LANE_P2 IFPE_L2 R1430
B7
IFPE_L2_N IFPD_RSET
M6 1 2 1K_0402_1%~D
26 DPC_GPU_LANE_N2 N10M-NS-S-A2_BGA533~D
E6
26 DPC_GPU_LANE_P3 IFPE_L3 R1431
E7 F8 1 2 1K_0402_1%~D
26 DPC_GPU_LANE_N3 IFPE_L3_N IFPE_RSET
N10M-NS-S-A2_BGA533~D
+3.3V_RUN
4.99K_0402_1%~D
4.99K_0402_1%~D
45.3K_0402_1%~D
24.9K_0402_1%~D
4.99K_0402_1%~D
2
2
34.8K_0402_1%~D
R1333
R1334
R1335
R1330
R1331
R1332
@ @ @
1
B B
1
STRAP0
STRAP1
STRAP2
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU
Resistor Values Pull-up to +3V Pull-down to Gnd
34.8K_0402_1%~D
10K_0402_1%~D
4.99K_0402_1%~D
4.99K_0402_1%~D
15K_0402_1%~D
15K_0402_1%~D
5K 01111 11111
2
2
R1339
R1341
R1344
@ R1340
R1342
X76@ R1343
U106D
Part 4 of 5 Close to Pin C1747 to be close to the GPU
+GPU_CORE J9 A13
VDD FBVDDQ 2.97A
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
J10 VDD FBVDDQ B13 +1.5V_MEM_GFX
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
10U_0805_6.3V6M~D
NV DG for VDD Cap: J12 VDD FBVDDQ C13
0.01uF 10% X7R x6 J13 D13 1 1 1 1 @ 1 1
VDD FBVDDQ
C1749
C1746
C1745
C1748
C1747
C1768
0.047uF 10% X7R x3 1 L9 VDD FBVDDQ D14
C1736
M9 VDD FBVDDQ E13
0.1uF 10% X7R x1 M11 F13
VDD FBVDDQ 2 2 2 2 2 2
4.7uF 10% X5R x1 M17 VDD FBVDDQ F14 N10M SPEC FBVDDQ TYP. 1.8V.
2 N9 F15
VDD FBVDDQ
N11 VDD FBVDDQ F16
N12 F17
VDD FBVDDQ
N13 F19
VDD FBVDDQ
N14 F22 +1.5V_MEM_GFX
VDD FBVDDQ
0.047U_0402_10V7K~D
0.047U_0402_10V7K~D
0.047U_0402_10V7K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
10U_0805_6.3V6M~D
D D
N15 H23
VDD FBVDDQ
0.1U_0402_10V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
N16 H26 1 1 1 1 @ 1 1
VDD FBVDDQ
C1767
C1766
C1765
C1764
N17 J15 @
VDD FBVDDQ
C1763
C1762
1 1 1 1 1 1 1 N19 J16
VDD FBVDDQ
C1732
C1733
C1734
C1722
C1723
C1724
C1725
P11 J18
VDD FBVDDQ 2 2 2 2 2 2
P12 J19
VDD FBVDDQ
P13 L19
2 2 2 2 2 2 2 VDD FBVDDQ
P14 L23
VDD FBVDDQ
P15 L26
VDD FBVDDQ
P16 M19
VDD FBVDDQ +1.05V_RUN_VTT_GFX
P17 N22
VDD FBVDDQ
R9 U22
VDD FBVDDQ
R11 Y22
POWER
VDD FBVDDQ
0.047U_0402_10V7K~D
0.047U_0402_10V7K~D
0.047U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
22U_0805_6.3VAM~D
R12 VDD
10U_0805_4VAM~D
R13 VDD PEX_IOVDDQ AG6
R14 VDD PEX_IOVDDQ AF6 1 1 1 1 1 1 1
1 1 1 R15 VDD PEX_IOVDDQ AE6
C1729
C1730
C1731
C1750
C1751
C1752
C1753
C1754
C1755
C1861
R16 VDD PEX_IOVDDQ AD6
R17 AC13
VDD PEX_IOVDDQ 2 2 2 2 2 2 2
T9 AC7
2 2 2 VDD PEX_IOVDDQ
T11 AB17
T17
VDD 2A PEX_IOVDDQ
AB16
VDD PEX_IOVDDQ
U9 VDD PEX_IOVDDQ AB13
U19 AB9 +1.05V_RUN_VTT_GFX
+3.3V_RUN L95 220R 100MHZ W9
VDD PEX_IOVDDQ
AB8
PLACE CLOSE TO BALL PLACE NEAR GPU
BLM18PG221SN1D_2P~D VDD PEX_IOVDDQ
W10 VDD PEX_IOVDDQ AB7
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
22U_0805_6.3VAM~D
10U_0805_4VAM~D
1 2 +3.3V_RUN_VDD33 W12 VDD
W13 VDD PEX_IOVDD AG7 1 1 1 1 1 1 1
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1756
C1757
W18 AF7
VDD PEX_IOVDD
C1758
C1759
C1760
C1862
C1761
1 1 1 1 1 W19 AE7
VDD PEX_IOVDD
AD8
2A PEX_IOVDD 2 2 2 2 2 2 2
C1777
C1776
C1775
C1856
C1857
AD7
C 120mA A12
PEX_IOVDD
AC9 C
2 2 2 2 2 VDD33 PEX_IOVDD
B12 VDD33
C12 VDD33 PEX_PLLVDD AF9 +PEX_PLLVDD
D12 VDD33
E12 K6 +PLLVDD
F12
VDD33 VID_PLLVDD 45mA
+3.3V_RUN VDD33
L6
45mA
+SP_PLLVDD 120mA
SP_PLLVDD
120mA AG9 K5
60mA PLACE NEAR GPU 220R 100MHZ
PEX_SVDD_3V3 PLLVDD
0.01U_0402_25V7K~D
1 1 R19 +FB_AVDD 2 1
FB_PLLAVDD +1.05V_RUN_VTT_GFX
C1774
C1773
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
2 1 V3
IFPA_IOVDD 100mA
R1456 10K_0402_5%~D AC19 1 1
FB_PLLAVDD
C1789
C1790
2 1 V2
2 2 R1461 10K_0402_5%~D IFPB_IOVDD
FB_DLLAVDD
T19 100mA
J6
285mA IFPCD_IOVDD 2 2
+IFPCDE_IOVDD H6 AG2 +DACA_VDD
285mA IFPE_IOVDD DACA_VDD
W5 1 2
+IFPAB_PLLVDD DACB_VDD R1420 10K_0402_5%~D
2 1 AD5
+1.05V_RUN_VTT_GFX 180R 100MHZ R1428 10K_0402_5%~D IFPAB_PLLVDD
L90 P6 B15 +1.5V_MEM_VDDQ 2 1
100NH_LLQ1608-FR10G_2%~D 150mA , 10mil 220mA IFPC_PLLVDD FB_CAL_PD_VDDQ R1432 40.2_0402_1%~D
+1.5V_MEM_GFX
2 1 +PLLVDD +IFPCD_PLLVDD N6 W15
220mA IFPD_PLLVDD VDD_SENSE GPU_VDD_SENSE 52
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+IFPE_PLLVDD D7 E15
1 1 1 1 1 220mA IFPE_PLLVDD VDD_SENSE
C1710
C1711
C1735
C1712
C1713
route as 50ohm
N10M-NS-S-A2_BGA533~D
2 2 2 2 2
B B
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1 1 1 1 1
@ C1511
@ C1512
C1770
+3.3V_RUN 220mA +3.3V_RUN 220mA
C1513
C1514
220R 100MHZ 220R 100MHZ
L83 BLM18PG221SN1D_2P~D L87 BLM18PG221SN1D_2P~D
2 1 +IFPCD_PLLVDD 2 1 +IFPE_PLLVDD 2 2 2 2 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 1 1 1 1 1 1 1 1 1 1 1 1
C1576
C1575
C1574
C1780
C1870
C1871
C1863
C1592
C1591
C1590
C1783
C1865
C1866
2 2 2 2 2 2 2 2 2 2 2 2 2
300ohm 100MHz ESR0.25ohm
BLM18PG331SN1D_2P~D
+DACA_VDD 120mA 2 1 +3.3V_RUN
L92
1U_0402_6.3V6K~D
4700P_0402_25V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
470P_0402_50V7K~D
0.1U_0402_10V7K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
L96
45mA 1 1 1 1 1 1 1 1
C1769
C1869
C1868
C1867
C1717
100NH_LLQ1608-FR10G_2%~D
C1716
C1718
C1719
2 1 +SP_PLLVDD
+1.05V_RUN_VTT_GFX 220R 100MHZ 285mA +1.05V_RUN_VTT_GFX
2 2 2 2 2 2 2 2
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
L84 BLM18PG221SN1D_2P~D 1 1 1
C1858
C1859
C1860
2 1 +IFPCDE_IOVDD
A A
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2 2 2
1 1 1 1 1 1
C1579
C1600
C1577
C1784
C1785
C1583
2 2 2 2 2 2
FBAD[0..63]
FBAD[0..63] 57,58
FBA_CMD[0..30]
FBA_CMD[0..30] 57,58
DQMA#[0..7]
DQMA#[0..7] 57,58
DQSA_RN[0..7]
DQSA_RN[0..7] 57,58
DQSA_WP[0..7]
DQSA_WP[0..7] 57,58
D D
U106B
Part 2 of 5 Mode C - Mirror Mode Mapping
FBAD0 D22 F26 FBA_CMD0
FBAD1 FBA_D0 FBA_CMD0 FBA_CMD1
E24
FBA_D1 FBA_CMD1
J24 DATA Bus
FBAD2 E22 F25 FBA_CMD2
FBAD3 FBA_D2 FBA_CMD2 FBA_CMD3
D24
FBA_D3 FBA_CMD3
M23 Address 0..31 32..63
FBA_CMD0 FBAD4 D26 N27 FBA_CMD4
FBAD5 FBA_D4 FBA_CMD4 FBA_CMD5
D27
FBA_D5 FBA_CMD5
M27 CMD0 CKE_L
1
MEMORY INTERFACE
FBA_D16 FBA_CMD16
1
FBAD17 F21 K24 FBA_CMD17 CMD6 A5 A4 7 2
FBA_D17 FBA_CMD17
1
10U_0805_10V4Z~D
FBAD18 D20 G22 FBA_CMD18 R642 6 3
FBA_D18 FBA_CMD18
1
20K_0402_5%~D
FBAD19 F20 K25 FBA_CMD19 CMD7 A0 A12 100K_0402_5%~D 5 1
10K_0402_5%~D FBAD20 FBA_D19 FBA_CMD19 FBA_CMD20 R643
D17 FBA_D20 FBA_CMD20 H22
R1382
C714
R641
FBAD21 F18 M26 FBA_CMD21 CMD8 CAS# CAS# 100K_0402_5%~D
4
FBAD22 FBA_D21 FBA_CMD21 FBA_CMD22 GFX_MEM_VTT_EN
D16 H24
2
2
FBA_D23 FBA_CMD23
3
FBAD24 A22 J26 FBA_CMD24
FBA_D24 FBA_CMD24
2200P_0402_50V7K~D
FBAD25 C24 G24 FBA_CMD25 CMD10 A9 A11
FBAD26 FBA_D25 FBA_CMD25 FBA_CMD26 Q197B
D21 G27
FBAD27 FBA_D26 FBA_CMD26 FBA_CMD27 GFX_MEM_VTT_ON# 5
C
B22
FBA_D27 FBA_CMD27
M24 CMD11 CS0#_H DMN66D0LDW-7_SOT363-6~D 1
C
FBAD28 C22 K22 FBA_CMD28
FBA_D28 FBA_CMD28
C715
FBA_CMD25 FBAD29 A25 J22 FBA_CMD29 CMD12 BA0 BA0
4
FBAD30 FBA_D29 FBA_CMD29 FBA_CMD30
B25 FBA_D30 FBA_CMD30 L22
1
6
FBAD31 2
A26 FBA_D31 CMD13 BA2 A15
FBAD32 U24 C26 DQMA#0 Q197A
10K_0402_5%~D FBAD33 FBA_D32 FBA_DQM0 DQMA#1
V24 FBA_D33 FBA_DQM1 B19 CMD14 A3 BA1 DMN66D0LDW-7_SOT363-6~D
R1384 FBAD34 V23 D19 DQMA#2 2
FBA_D34 FBA_DQM2 39 GFX_MEM_VTT_ON
FBAD35 R24 D23 DQMA#3 CMD15 CS1#_H
2
1
FBAD37 FBA_D36 FBA_DQM4 DQMA#5
R23 FBA_D37 FBA_DQM5 AA23 CMD16 ODT_H
FBAD38 P24 AB27 DQMA#6
FBAD39 FBA_D38 FBA_DQM6 DQMA#7
P22
FBA_D39 FBA_DQM7
T26 CMD17 A4 A5
FBAD40 AC24
FBAD41 FBA_D40 DQSA_RN0
AB23
FBA_D41 FBA_DQS_RN0
D25 CMD18 A13 A14 +1.05V_RUN_VTT_GFX Source
FBA_CMD27 FBAD42 AB24 A18 DQSA_RN1
FBAD43 FBA_D42 FBA_DQS_RN1 DQSA_RN2
W24
FBA_D43 FBA_DQS_RN2
E18 CMD19 WE# A10
1
1
R1386 FBAD47 V22 AA27 DQSA_RN6 CMD21 A10 WE# 8 1
FBA_D47 FBA_DQS_RN6
10U_0805_10V4Z~D
FBAD48 AA25 R27 DQSA_RN7 R645 7 2
2
FBA_D48 FBA_DQS_RN7
1
20K_0402_5%~D
FBAD49 W27 CMD22 A12 A0 100K_0402_5%~D 6 3 1
FBAD50 FBA_D49 DQSA_WP0
W26 C25 5
FBA_D50 FBA_DQS_WP0
C717
R644
FBAD51 W25 A19 DQSA_WP1 CMD23 CS1#_L
2
FBAD52 FBA_D51 FBA_DQS_WP1 DQSA_WP2
AB25 E19
4
FBAD53 FBA_D52 FBA_DQS_WP2 DQSA_WP3 2
AB26 A24 CMD24 RAS# RAS#
2
FBAD54 FBA_D53 FBA_DQS_WP3 DQSA_WP4 1.05V_RUN_VTT_GFX#_EN
AD26 FBA_D54 FBA_DQS_WP4 T22
FBA_CMD28 FBAD55 AD27 AA24 DQSA_WP5 CMD25 ODT_L
FBA_D55 FBA_DQS_WP5
1
D
2200P_0402_50V7K~D
FBAD56 V25 AA26 DQSA_WP6
FBA_D56 FBA_DQS_WP6
1
3
R1387 FBA_D59 FB_VREF
C716
B FBAD60 B
R26
FBAD61 FBA_D60
T25 F24 CLKA0 57 CMD28 RST RST
2
N10M-NS-S-A2_BGA533~D
+1.5V_MEM_GFX
1.1K_0402_1%~D 1.1K_0402_1%~D
1
@ R1376
16mil
2
+FB_VREF
1
0.01U_0402_25V7K~D
@ C1502
1
@R1377
@ R1377
2
2
A A
C CLKA0# C
56 CLKA0# K7
CK# VDD
R1 K7
CK# VDD
R1 CMD9 BA1 A3
R1393 FBA_CMD0 K9 R9 FBA_CMD0 K9 R9
243_0402_1%~D CKE VDD CKE VDD
CMD10 A9 A11
FBA_CMD25 K1 A1 FBA_CMD25 K1 A1 CMD11 CS0#_H
1
1
+FBA_VREF0 M8 B1 +FBA_VREF0 M8 B1
VREFCA VSSQ VREFCA VSSQ
H1 VREFDQ VSSQ B9 H1 VREFDQ VSSQ B9 CMD24 RAS# RAS#
R1437 D1 R1438 D1
B VSSQ VSSQ B
243_0402_1%~D
VSSQ
D8 243_0402_1%~D
VSSQ
D8 CMD25 ODT_L
E2 E2
2
2
VSSQ VSSQ
J1
NC VSSQ
E8 J1
NC VSSQ
E8 CMD26 A6 A7
J9 F9 J9 F9
NC VSSQ NC VSSQ
L1
NC VSSQ
G1 L1
NC VSSQ
G1 CMD27 CKE_H
L9 G9 L9 G9
NC VSSQ NC VSSQ
T7
NC
T7
NC CMD28 RST RST
96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 CMD29 A14 A13
H5TQ1G63BFR-12C_FBGA96~D H5TQ1G63BFR-12C_FBGA96~D
CMD30 A15 BA2
+1.5V_MEM_GFX
+1.5V_MEM_GFX
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 1 1 1 1 1 1 1 1 1 1 1 1 1
C1792
C1793
C1794
C1795
C1797
C1798
C1799
C1800
C1801
C1802
C1803
C1804
C1805
C1796
2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
FBAD[0..63]
FBAD[0..63] 56,57
FBA_CMD[0..30]
FBA_CMD[0..30] 56,57
D DQMA#[0..7] D
DQMA#[0..7] 56,57
DQSA_RN[0..7]
DQSA_RN[0..7] 56,57
DQSA_WP[0..7]
DQSA_WP[0..7] 56,57
U111 X76@ U112 X76@
16mil
E3 FBAD35 E3 FBAD61
16mil DQL0
F7 FBAD32 DQL0
F7 FBAD57
DQL1 FBAD38 DQL1 FBAD58
F2 F2
FBA_CMD22 DQL2 FBAD33 FBA_CMD22 DQL2 FBAD60
N3
A0 DQL3
F8 Group4 N3
A0 DQL3
F8
FBA_CMD4 P7 H3 FBAD37 FBA_CMD4 P7 H3 FBAD56 Group7
FBA_CMD20 A1 DQL4 FBAD34 FBA_CMD20 A1 DQL4 FBAD62
+1.5V_MEM_GFX FBA_CMD9
P3
N2
A2
A3
DQL5
DQL6
H8
G2 FBAD39 FBA_CMD9
P3
N2
A2
A3
DQL5
DQL6
H8
G2 FBAD59 Mode C - Mirror Mode Mapping
FBA_CMD6 P8 H7 FBAD36 FBA_CMD6 P8 H7 FBAD63
FBA_CMD17 A4 DQL7 FBA_CMD17 A4 DQL7
P2 A5 P2 A5 DATA Bus
1
FBA_CMD3 R8 FBA_CMD3 R8
FBA_CMD26 A6 FBAD42 FBA_CMD26 A6 FBAD51
R1395 R2 A7 DQU0 D7 R2 A7 DQU0 D7 Address 0..31 32..63
FBA_CMD1 T8 C3 FBAD46 FBA_CMD1 T8 C3 FBAD52
FBA_CMD5 A8 DQU1 FBAD40 FBA_CMD5 A8 DQU1 FBAD49
1.1K_0402_1%~D R3
A9 DQU2
C8 R3
A9 DQU2
C8 Group6 CMD0 CKE_L
FBA_CMD19 L7 C2 FBAD45 FBA_CMD19 L7 C2 FBAD53
2
FBA_CMD12 M2 B2 FBA_CMD12 M2 B2
FBA_CMD14 BA0 VDD FBA_CMD14 BA0 VDD
N8
BA1 VDD
D9 N8
BA1 VDD
D9 CMD5 A11 A9
FBA_CMD30 M3 G7 FBA_CMD30 M3 G7
BA2 VDD BA2 VDD
C VDD
K2
VDD
K2 CMD6 A5 A4 C
K8 K8
VDD VDD
VDD N1 VDD N1 CMD7 A0 A12
J7 N9 CLKA1 J7 N9
56 CLKA1 CK VDD CLKA1# CK VDD
56 CLKA1# K7 CK# VDD R1 K7 CK# VDD R1 CMD8 CAS# CAS#
FBA_CMD27 K9 R9 FBA_CMD27 K9 R9
CLKA1 CKE VDD CKE VDD
CMD9 BA1 A3
FBA_CMD16 K1 A1 FBA_CMD16 K1 A1 CMD10 A9 A11
ODT VDDQ ODT VDDQ
2
FBA_CMD24 J3 A8 FBA_CMD24 J3 A8
FBA_CMD11 RAS# VDDQ FBA_CMD11 RAS# VDDQ
R1399
243_0402_1%~D
L2 CS# VDDQ C1 L2 CS# VDDQ C1 CMD11 CS0#_H
FBA_CMD8 K3 C9 FBA_CMD8 K3 C9
FBA_CMD21 CAS# VDDQ FBA_CMD21 CAS# VDDQ
L3
WE# VDDQ
D2 L3
WE# VDDQ
D2 CMD12 BA0 BA0
E9 E9
1
VDDQ VDDQ
VDDQ
F1
VDDQ
F1 CMD13 BA2 A15
CLKA1# DQSA_WP4 F3 H2 DQSA_WP7 F3 H2
DQSA_WP5 DQSL VDDQ DQSA_WP6 DQSL VDDQ
C7
DQSU VDDQ
H9 C7
DQSU VDDQ
H9 CMD14 A3 BA1
CMD15 CS1#_H
DQMA#4 E7 A9 DQMA#7 E7 A9
DQMA#5 DML VSS DQMA#6 DML VSS
D3
DMU VSS
B3 D3
DMU VSS
B3 CMD16 ODT_H
E1 E1
VSS VSS
VSS
G8
VSS
G8 CMD17 A4 A5
DQSA_RN4 G3 J2 DQSA_RN7 G3 J2
DQSA_RN5 DQSL VSS DQSA_RN6 DQSL VSS
B7
DQSU VSS
J8 B7
DQSU VSS
J8 CMD18 A13 A14
M1 M1
VSS VSS
VSS
M9
VSS
M9 CMD19 WE# A10
VSS P1 VSS P1
FBA_CMD28 T2 P9 FBA_CMD28 T2 P9 CMD20 A1 A2
RESET VSS RESET VSS
VSS T1 VSS T1
L8 ZQ VSS T9 L8 ZQ VSS T9 CMD21 A10 WE#
1
CMD22 A12 A0
1
B +FBA_VREF1 +FBA_VREF1 B
M8 B1 M8 B1
VREFCA VSSQ VREFCA VSSQ
H1
VREFDQ VSSQ
B9 R1440 H1
VREFDQ VSSQ
B9 CMD23 CS1#_L
R1439 D1 243_0402_1%~D D1
VSSQ VSSQ
243_0402_1%~D D8 D8 CMD24 RAS# RAS#
2
VSSQ VSSQ
E2 E2
2
VSSQ VSSQ
J1
NC VSSQ
E8 J1
NC VSSQ
E8 CMD25 ODT_L
J9 F9 J9 F9
NC VSSQ NC VSSQ
L1
NC VSSQ
G1 L1
NC VSSQ
G1 CMD26 A6 A7
L9 G9 L9 G9
NC VSSQ NC VSSQ
T7
NC
T7
NC CMD27 CKE_H
96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 CMD28 RST RST
H5TQ1G63BFR-12C_FBGA96~D H5TQ1G63BFR-12C_FBGA96~D
CMD29 A14 A13
+1.5V_MEM_GFX
+1.5V_MEM_GFX CMD30 A15 BA2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 1 1 1 1 1 1
C1806
C1807
C1808
C1809
C1810
C1811
C1812
1 1 1 1 1 1 1
C1813
C1814
C1815
C1816
C1817
C1818
C1819
2 2 2 2 2 2 2
2 2 2 2 2 2 2
A A
2 30 HW 7/13/2009 COMPAL follow M09 +3.3V_LAN enable control circuit Depop R47 X01
4 31 HW 7/23/2009 Broadcom Change C718 value Change C718 from .47uF to .22uF X01
5 23 HW 7/23/2009 DELL Follow DELL request to remove R3P circuit Delete U140, R136, R138, R156,R507, R516, R519, R529, R531, R534~R536,
X01
R594, R1457, R1458, R1462, R1463, C434, C72, C73, C391, C406, pop R142,
C C
D2, C219
6 41,37 HW 7/23/2009 Compal Per M09 lesson learn request Re-define JTP1, JBIO1 X01
10 24 HW 7/23/2009 Compal CAM Module change from 7 pin to 8 pin Change pin define for JEDP1 X01
11 31 HW 7/23/2009 Broadcom R898 and R485 pop at the same time Depop R898 X01
12 24 HW 7/29/2009 Compal NVidia BIA_PWM implementation POP R165, de-pop R166 X01
B Depop all related components where are B
13 8,15 HW 7/29/2009 Compal Depop JXDP1, JXDP2, JDEG1, JP2 connector X01
located at 0 Z-hight area
For load switches Vout over 5% range
14 42 HW 7/29/2009 Compal Change Q151 to SIS406D,Q183 to SI7658ADP,Q58 to SI4164DY
concern by power team . X01
20 42 HW 7/29/2009 Compal Base on de-rating report. Change Q61 from AO4456 to NTMS4107. X01
A A
X01
21 37, 39 HW 7/29/2009 Compal GPIO MAP update Add reserved R1513 between U95.18 and +3.3V_RUN, add R1514 between
U95.18 and 5028.A47 named EN_ESATA_RPTR. DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (1/1)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 59 of 66
5 4 3 2 1
5 4 3 2 1
23 31 HW 7/29/2009 Broadcom Resolve smart cart can't work problem. pop R775, R537, depop R776. X01
24 36 HW 7/29/2009 Compal Change PU power rail for USB_MCARD1_DET# Change USB_MCARD1_DET# PU power rail to +3.3V_RUN X01
27 15 HW 7/29/2009 Compal Base on crystal EA result. Change external Load Capacitor Value C296 and C297 to 12 pF of Y1. X01
Change external Load Capacitor Value C476 to 33 pF and C427 change to
28 30 HW 7/29/2009 Compal Base on crystal EA result. X01
200 ohm (R808) of Y2.
C C
29 40 HW 7/29/2009 Compal Base on crystal EA result. Change external Load Capacitor Value C674 and C675 to 33 pF of Y4. X01
30 33 HW 7/29/2009 Compal Base on crystal EA result. Change external Load Capacitor Value C514 and C515 to 22 pF of X3. X01
31 29 HW 7/29/2009 Compal EMI solution. Change R1215 from 22ohm to 47ohm. X01
32 29 HW 7/29/2009 Compal Prevent floating of PCH_GPIO34 Add R1511 10K PD. X01
Change docking connector from SP030000F0L(JAE_WD2F144WB1_144P-T) to
33 38 HW 7/29/2009 Compal Based on DFX team request X01
SP030000F0L(JAE_WD2F144WB1R300_144P).
34 36 HW 7/29/2009 Compal Change PU power rail for PCIE_MCARD3_DET# Change PCIE_MCARD3_DET# PU power rail to +3.3V_RUN X01
37 33 HW 10/08/2009 Compal Base on crystal EA result. Change C514 C514 to 15pF and R421 to 100 ohm. X01
Change VGA_ID_DISC & VGA_ID_UMA PU power rail from +3.3V_RUN to
38 38 HW 11/08/2009 Compal Change VGA_ID_DISC & VGA_ID_UMA PU power rail X01
+3.3V_ALW
39 38 HW 11/08/2009 Compal Change ODD_DET# PU power rail. Change ODD_DET# PU power rail to +3.3V_RUN X01
42 39 HW 11/08/2009 SMSC per SMSC 5045 AN 19.6, 4002 AN 16.11 R541, R554, R1512 should be 10K. X01
43 23 HW 11/08/2009 Compal FAN1_DET# should have 10K PU to +3.3V_M Add R1517 X01
A Delete T159, R494, R498, R631, R634, R898, C640, C641, C642 C647, C1026, X01 A
44 31 HW 11/08/2009 Broadcom Follow Broadcom request L73, add R1522, C1887, C1888, change connection for R496, R497 to GND,
change connection for JCS1pin3 and pin4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (2/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 60 of 66
5 4 3 2 1
5 4 3 2 1
48 27 HW 12/08/2009 Compal RGB EA result C251-C253 to 8.2pF; L61-L63 to 10-Ohm Bead ; De-pop C390,C518,C996 X01
49 29 HW 12/08/2009 DELL Use the SiTimes part due to the cost Change X4 from TXC to SiTimes SIT8102AC3333E12T X01
savings
50 8 HW 12/08/2009 Intel Intel review schematic feedback Add R529 and C1889 X01
51 33 HW 12/08/2009 Richo Change pop option for R5U242 Change C21 from 10U to 47U, change R46 to C1889 (1uF) X01
52 31 HW 12/08/2009 Broadcom drain I/O type, we need to have 4.7K Add R638 X01
pull-up to 3.3V_ALW
Delete R652 & C41,Rename IO VCT to +LOM_VCT_IO & reserve C712 pad
53 30 36 HW 13/08/2009 Compal Disconnect IO & DOCK VCT X01
for test.
54 31 HW 13/08/2009 Compal Broadcom review request USB_GPIO27 Should have a 0ohm but de-pop resistor. X01
55 39 HW 14/08/2009 SMSC SMSC review Change R561 and R1046 from 1M ohm to 100K ohm. X01
56 39 HW 14/08/2009 SMSC SMSC review Remove R587, base on crystal EA result that only need to change X01
caps value.
57 10 HW 14/08/2009 Intel Follow Intel recommand to add debug TP. Add T186~T190 X01
Change R772 to 47 Ohm and C1015 to 10pF for resolving SC_CLK
58 31 HW 14/08/2009 Compal Smart card EA result X01
B Rise/Fail timing issue and also change C633 to 10pF. B
Change Pop otion for express card, pop L64, depop R791 R792.For X01
62 34 HW 14/08/2009 Compal By EMI request,pop common choke USB2,3 pop L65,L66 and reserve R1524,R1525,R1526 and R1527.
66 26 HW 8/19/2009 Pericom 8200 pin 8,9 add caps to minimize noise Add C1597 & C1598 X01
67 53 HW 8/19/2009 NV Reserve crystal for 27M. Add @R1541,@Y7, @C1891, @C1892 X01
68 24 HW 8/20/2009 Compal Follow Marguax schematic Depop R279,R1027 X01
69 53 HW 8/20/2009 Compal Add PU/PD resistor for 8200 back-up plan Add R1542~R1544, but depop. X01
70 35 HW 8/24/2009 Compal Add PD resistor for back-drive issue Add R1545~R1547 X01
71 24 HW 8/25/2009 Compal No need PD/PU resistors at EDP AUX channel Delete R279 & R1027 X01
72 21 HW 8/25/2009 Compal Add by pass caps populate C39 & C610 X01
Un-populate pop option for double
73 42 HW 8/25/2009 Compal Un-populate R612,R607 and R1498 X01
discharge path
C 74 11 HW 8/25/2009 Compal Base on power team FDIM test Change C48,C49,C50,C51,and C52 to 22uF. X01 C
75 30 HW 8/26/2009 Intel Follow Intel WW35 ‘09 Change R808 to C427 10pF and change C475 to 33pF X01
Follow Marguax to populate 27MHz
76 53 HW 8/27/2009 Compal Populate Y7,C1891,C1892,R1541 and de-pop R631 X01
crystal for PT build.
77 6,53 HW 9/28/2009 Compal Populate 27MHz crystal. Depop R43,R39,R1317, pop R1417 X02
79 15,18 HW 9/28/2009 Compal Depop XDP circuit component Depop R118,R94 X02
80 53 HW 9/29/2009 NV GPU_JTAG_TRST# should be pull down Pop R1372 and cahnge to 1K 0hm. X02
83 36 HW 10/20/2009 Compal Correct USB_MCARD2_DET# PU power rail Chnage power rail from +3.3V_RUN to +3.3V_ALW_PCH X02
Follow schematic check list 2.0, change
84 17 HW 10/20/2009 Compal Chnage R268 from 1K to 10K X02
resistor value
85 16 HW 10/20/2009 Compal Change R910 value and placement Change R910 form 0 ohm to 22 ohm and place near PCH side. X02
86 37 HW 10/26/2009 Compal Chnage USB common choke by EMI request Change L95 L96 from DLW21SN900SQ2_0805~D to HCMC0805-900MFS_4P~D X02
87 23 HW 10/26/2009 Compal Change OTP temperature change R151 from 953ohm to 1.82Kohm X02
88 53 HW 10/27/2009 Compal To solve 27 Mhz noise issue Connect Y7 pin 2 and 4 to GND. X02
L71, L72 68nH, 2%, 400mA; C1070, C1071 1500pF, 2%, 50V; C1886, C1887
89 31 HW 10/27/2009 Broadcom For 5882-B0 request X02
150pF, 2%, 50V
A A
90 15 HW 10/29/2009 Compal Change flash ROM part number Due to W25X32VSSIG will be EOL, change part number to W25Q32BVSSIG. X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.G (4/4)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 62 of 66
5 4 3 2 1
5 4 3 2 1
Create a low pass filter with the pole set De-pop C1066 & C1067, R1090, R1089 ; R340 & R342, R1091 & R1092 change
X02
92 29 HW 10/29/2009 Compal at 36kHz to filter out of band noise to 2k, add C1893-C1896 1000pF.
93 40 HW 11/02/2009 Compal Change BID Change R98 form 130K ohm to 33K ohm. X02
96 43 HW 11/05/2009 Compal To avoid golden finger was scraped on FFC. Change sniffer connector from TYCO_1-1734820-2 to TYCO_1-2041070-2. X02
97 41 HW 11/05/2009 Compal Chnage TP SMbus PU power rail. Change power rail from +5V_ALW to +3.3V_ALW X02
98 31 HW 11/05/2009 BRCM Delete 2nd ROM for BRCN5882 By BRCM review result ,delete U14. X02
C C
99 24 HW 11/10/2009 Compal LCD power sequencing issue change R161 from 470 to 100 ohm . X02
PCH driving the siganl low at GPIO15 Add R1557 2.2K PU resistor to +3.3V_ALW_PCH on the SIO_EXT_WAKE#
100 19 HW 11/11/2009 DELL X02
initial. signal.
To change the pin on the EC side to OD
101 15 HW 11/11/2009 DELL Add R1558 10K PU resistor to +3.3V_RUN on the ME_FWP signal. X02
and add a pull-up to PCH’s core well
Y1 & Y4 change from 1TJS125DJ4A420P to Q13MC30610018.Opreating
102 15,40 HW 11/11/2009 Compal RTC timing issue temperature should -40~+85 degree to meet test requirement. X02
103 19 HW 11/17/2009 Compal Chnage GPIO34 of PCH from PD to PU Change from PD to PU +3.3V_RUN X02
105 31 HW 11/17/2009 Compal To solve touch pad ESD issue Change L41 and L42 to 100 ohm (R1564 & R1565) X02
B B
106 15 HW 11/19/2009 Compal Follow Intel check list rev2.0 Change R2244 to tolerance from 5% to 1% X02
107 15 HW 11/19/2009 Compal Follow DGU 414044 Rev2.0 Depop R123 ,R804~807 and R1281,R1282 R1315. X02
108 38 HW 12/22/2009 Compal Simplo battery slice EMI issue Add C1897 and C1898(Depop,reserve for EMI test) A00
DFB issue ,finger printer connector Change finger printer connector from TYCO_1734242-6_6P-T to
109 37 HW 12/22/2009 Compal A00
will easy shift during reflow process. TYCO_2041070-6_6P-T
Change L71,L72 from 68nH to 150nH, C1070,C1071 from 1500pF to
110 31 HW 12/22/2009 Compal By Broadcom recommend A00
390pF.C1887,C1888 from 150pF to 390pF.
111 32 HW 12/22/2009 Compal Change TCM to T1 version Change TCM from SSX44B-D-T to SSX44-D-T1 A00
112 40 HW 12/22/2009 Compal Change BID Change R98 form 33K ohm to 1K ohm. A00
Depop CPU XDP and JTAG circuit for for Depop C19,C20,R6,R68,R19,R7,R3,
113 08 HW 12/22/2009 Compal A00
production systems R780~R785,R22,R24,R1153,R1156,R66,R1241,R1257
A A
Depop PCH JTAG circuit for for production
114 15 HW 12/22/2009 Compal Depop R123, R804~R807,R1281,R1282,R1315 A00
systems
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.G (5/5)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 63 of 66
5 4 3 2 1
5 4 3 2 1
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.G (6/6)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD A00
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5472P
Date: Wednesday, January 20, 2010 Sheet 64 of 66
5 4 3 2 1
5 4 3 2 1
D 1 50 Selector 7/20 TI CSS GC logic wrong issue Add PR282 180_ohm to GND X01 D
2 Compal ADC
46 1.5V_MEM 7/20 Guangyong Add droop resistor for TI solution Add PR77 X01
5 50 Selector 8/17 TI new version CD3301 (PG2.1) don't need PD22 depop PD22 add PR282, pop PR430 X01
and PR282
Dell / change PU901 to ISL62872 to support NV VID change PU901 to ISL62872 from ISL62870 and support circuit.
7 52 ISL62872_GPU 8/17 X01
intersil fixture
C C
+VCORE change thermistor package from 0603 to 0402 Change PH3,PH4 and PH5 from SL200000B0L to SL200000W0L
8 49 MAX17030 8/17 Compal for cost down X01
Title
PIR
14 49 Vcore 8/25 MAXIM Vender recommend PSI# pull down 10k Change PR334 from SD03410018L (1k) to SD02810028L(10k) X01
17 49 Vcore 8/27 Compal Reseve resistor pad for debug Add PR122 and PR123 X01
C
20 49 Vcore 9/01 MAXIM Make sure DPRSLPVE low level under 0.33V Change PR109 from SD03449908L (499 Ohm) to SD02800008L (0 Ohm) X01 C
Fine tune H_VTTPWRGD voltage level meet Change PR94 from SD03410028L (10k) to SD03427418L (2.74K)
24 48 +1.05VTT 10/28 INTEL Vih(min) = 0.75 * Vtt Change PR93 from SD03428728L (28.7k) to SD03493118L (9.31K) X02
26 52 GPU_Core 11/12 Compal For NVIDIA output voltage +/- 30mV criteria Change PC918 from SGA19331D1L (330u/9m Ohm) to SGA0000420L (470u/4.5m Ohm) X02
B B
+1.05VTT/
27 48 11/16 ON Bost diode over stress Change PD19 and PD27 from SC1B751V08L(RB751V) to SCS00003M0L(BAT54HT1) X02
+1.05VM
Reduce Pin33,34 and 35 of the CD3301 Change PC351 from SE00000130L (1u/0805) to SE043104M8L (0.1u/0805)
28 51 Charger 01/12 Compal A00
surge current Change PR404 from SD02800008L (0 Ohm) to SD028100B8L (1 Ohm)
A A
Title
PIR