XIAMEN UNIVERSITY MALAYSIA

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

ACADEMIC YEAR 2022

TEST 2

COM207 DIGITAL ELECTRONICS

DATE: TUESDAY, 21 APRIL 2022

TIME: 2:00 to 2:40 PM (40 minutes)
PLEASE LOG IN TO MICROSOFT TEAMS AT 1:50 PM
Submission 2:40 to 2:55 PM Submission time 2:55 to 3:00 PM
Time: (15 minutes) with PENALTY (5 minutes)
(20%)

Instructions to Candidates:
Answer ALL sub-questions.
• There is ONE (1) question of 20 marks.
• This is an open book online assessment. You MUST answer the questions on your own
without any assistance from other persons.
o You must submit your answers within the following time frame allowed for this online
assessment.
• Penalty as below WILL BE IMPOSED on students who submit their answers late as
follows:
o The final marks will be reduced by 4 marks for answer scripts that are submitted
within 5 minutes after the deadline for the submission.
o The final marks will be downgraded to zero (0) mark for any answer scripts that are
submitted after 20 minutes from the end time of the test. In another words, submission
will NOT be entertained after 3:00 PM.

Page 1 of 3
Specific Instructions to Candidates:
• Write down your name at the top left corner on every page.
• Write down the page number of your answer sheet at the top right corner in the format of
Page X of Y where X is the page number and Y is the total number of pages.
• Arrange your answer sheets in proper order.
• Use CamScanner OR other device to convert your handwritten answer to pdf with a
filename in the format of yourname_207.pdf. For example, if your name is Lee Chong Wei,
the file name is leechongwei_207.pdf

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COM207 DIGITAL ELECTRONICS APRIL 2022

Question 1 (20 marks)

a) WITHOUT using the clear (CLR) input of the flip-flops, design a synchronous UP counter
from the first principles that counts until 510 (1012) and returns to zero. The count sequence
is as shown in Table Q1(a). Use positive edge-triggered S-R flip-flops for your design.
The excitation table of S-R flip-flop is shown in Table Q1(b). Sketch the final schematic
diagram. You need not sketch the timing diagram. Note that there are two unused states,
1102 and 1112.

(12 marks)

Table Q1(a) Table Q1(b)

Decimal Binary
Value Value
0 000
1 001
2 010
3 011
4 100
5 101

b) The unused states of the synchronous counter are 1102 and 1112. If the designed circuit
is switched on, one of the unused states occurs at the output. What would be the next
state of each of the unused states? Explain your answers.
(4 marks)

c) If the clear (CLR) input of the flip-flops is used to design the synchronous UP counter
that counts until 510 (1012) described in Part (a), explain how this could be done. Which
design would you prefer (Part (a) or this)? And why?
(4 marks)

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