Professional Documents
Culture Documents
System Design Example
System Design Example
System Design Example
ADC 0808
INT IR0 Timer
8259
CAS0
CAS1
CAS2
SP/EN
5V
D0
LT a
RBO
RBI
h
5V
PA0 A
PA1 B D0
C Vcc
PA2 D 5V LT a
RBO
PA3 GND RBI
5V h
7447 5V
PA4 A
PA5 B
C Vcc
PA6 D 5V
PA7 GND
5V
7447
I/O Memory Interfacing-
8255, 8254 & 8259
Memory mapped/ IO mapped ? 80 10000000
How many addresses? 82 10000010
84 10000100
Address
86 10000110
80 - 86H -8255 88 10001000
88H - 8EH – 8254 8A 10001010
90H – 92H - 8259 8C 10001100
8E 10001110
Incremental Addressing
90 10010000
92 10010010
94 10010100
96 10010110
Memory Interfacing
How much memory ?
ROM/RAM?
RAM – minimum 2k chip- 4k
ROM – minimum 2k chip – 4k + 4k
ROM1 00000H
RAM 01000H
ROM2 FF000H
Step 9: Software
Main
Branch to end
of IVT
Initialize 8255,
8254,8259
A
A
Start Conversion
for sensor
Wait for
done=1
N All
sensors
Read, done=0 ISR1 ISR2
Y
Find average, Enable conversion Read ADC
EC=0 EC=1 Done=1
B IRET IRET
A
B
Select ADC Channel
B
I/O Memory Interfacing-
8255, 8254 & 8259
Memory mapped/ IO mapped ? 80 10000000
How many addresses? 82 10000010
84 10000100
Address
86 10000110
80 - 86H -8255 88 10001000
88H - 8EH – 8254 8A 10001010
90H – 92H - 8259 8C 10001100
8E 10001110
Incremental Addressing
90 10010000
92 10010010
94 10010100
96 10010110
D0
LT a
RBO
RBI
h
5V
PA0 A
PA1 B D0
C Vcc
PA2 D 5V LT a
RBO
PA3 GND RBI
5V h
7447 5V
PA4 A
PA5 B
C Vcc
PA6 D 5V
PA7 GND
5V
7447
CLK IN0
IN1
IN2
Temp
DB0 – IN3 sensors
PB0 –PB7 DB7 IN4
IN5
IN6
PC0 AD0 IN7
PC1 AD1
PC2 AD2 VREF+ 5V
INTR EOC VREF- 0V
PC3 Vcc Supply
OE
PC4 GND
SOC
PC5 ALE
ADC 0808
Initializing 8255
i8255: mov al,10000010b
out 86H , al
ICW2
Cascade?
ICW3
ICW4?
ICW4