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Final Examination: Subject: Digital Logic Design Laboratory Date: Monday, May 30, 2022. Duration: 75 Minutes
Final Examination: Subject: Digital Logic Design Laboratory Date: Monday, May 30, 2022. Duration: 75 Minutes
Final Examination: Subject: Digital Logic Design Laboratory Date: Monday, May 30, 2022. Duration: 75 Minutes
FINAL EXAMINATION
Subject: Digital Logic Design Laboratory
Date: Monday, May 30th, 2022.
Duration: 75 minutes
Instructor Grade
Signature:
Student’s Name:
ID:
IMPORTANT INFORMATION
● The Final exam is conducted using SimuliDE software and the Laboratory
experiment kits. Any access to the Internet during the exam is PROHIBITED.
● After finishing your simulation, copy simulation circuit figures under each of the
Problems given in the Question sheet. Answer any questions available in the
Question sheet. If the question has the practical circuit build-up requirement,
kindly show the result to the instructor for achieving full marks of that respective
question.
● Convert the Question sheet with the answered questions into “pdf” file format
A B C F
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
c. Using K-map to simplify function above, and implement the simplified circuit in the
simulation program with full notation. (You can use the created squares to your
simplification process and write down the simplified expression)
A \ BC 00 01 11 10
0
1
1
Simulation circuit: (10pts)
2 Full Adder
/40pts
1
A B Cin S Cout
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
S=¿ (10pts)
C out =¿ (10pts)
2
3 Counters
/20 pts
Design an asynchronous up counter having M = 7 from the above circuit. Implement the
circuit via simulation software and paste the result in the bellow box.
Implement the circuit using the Laboratory experiment kit. Show the result to the instructor. (10pts)