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    Xiaomi Mi A3 Schematic

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    tipu ahmed
    This document is confidential and proprietary to Qualcomm Technologies. It contains technical data that may be subject to export laws. The document includes a table of contents listing 53 schematic sheets for an electronic design. The sheets cover components and systems for devices including communications chips, power management chips, audio chips, cameras, sensors, batteries and more.

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    Xiaomi Mi A3 Schematic

    Uploaded by

    tipu ahmed
    295 views58 pages
    This document is confidential and proprietary to Qualcomm Technologies. It contains technical data that may be subject to export laws. The document includes a table of contents listing 53 schematic sheets for an electronic design. The sheets cover components and systems for devices including communications chips, power management chips, audio chips, cameras, sensors, batteries and more.

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    Xiaomi_Mi_A3_Schematic

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    This document is confidential and proprietary to Qualcomm Technologies. It contains technical data that may be subject to export laws. The document includes a table of contents listing 53 schematic sheets for an electronic design. The sheets cover components and systems for devices including communications chips, power management chips, audio chips, cameras, sensors, batteries and more.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    295 views58 pages

    Xiaomi Mi A3 Schematic

    Uploaded by

    tipu ahmed
    This document is confidential and proprietary to Qualcomm Technologies. It contains technical data that may be subject to export laws. The document includes a table of contents listing 53 schematic sheets for an electronic design. The sheets cover components and systems for devices including communications chips, power management chips, audio chips, cameras, sensors, batteries and more.

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    © All Rights Reserved
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    of 58

    8 7 6 5 4 3 2 1

    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D

    SHEET BLOCK SCHEMATIC SHEET BLOCK SCHEMATIC SHEET BLOCK SCHEMATIC SHEET BLOCK SCHEMATIC
    1 TITLE 51 Reserved_6
    2 TABLE_OF_CONTENTS 52 Reserved_7
    3 GPIO TABLE 53 QPA8687
    4 BLOCK DIAGRAM 54 DRX_QDM2302
    5 SM6150 CONTROL 55 DRX_Reserved_1
    6 SM6150 GPIO 56 DRX_Reserved_2
    7 SM6150 LP GPIO 57 DRX_Reserved_3
    8 SM6150 EBI0/1 58 DRX_Reserved_4
    9 SM6150 MIPI-CSI/DSI 59 QAT3522
    10 SM6150 WCSS/RF 60 QAT3518_DRX_ANT1
    11 SM6150 PWR_1 61 WCN3950_SH
    12 SM6150 PWR_2 62 WLAN_RF_SH
    13 SM6150 PWR_3 63 WCS_NFC_SN100U
    14 SM6150 DECAPS 64 SHEILDING_FRAME
    15 SM6125 GND 65 CHANGE LIST
    16 Reserved_1
    17 PM6125 HK/IO
    18 PM6125_Bucks_S1-S4
    C 19 PM6125_Bucks_S5-S8 C
    20 PM6125_LDOs
    21 DECAPS
    22 PMI632_Control
    23 PMI632_Charger/PD PHY
    24 PMI632_LCD/VIB/RGB/Flash
    25 SMB1355
    26 eMCP/uMCP
    27 eMCP_POWER
    28 WCD9370
    29 AUDIO
    30 DISPLAY
    31 FRONT CAMERA
    32 REAR CAMERA
    33 CAM eLDO
    34 Sensors
    35 PM8008 CAM_LDO
    36 SIM/SD
    37 KEYPAD/INDICATOR
    38 BATT/B2B
    39 Audio over Type C
    40 RCM/DEBUG
    B 41 SDR480_POWER B
    42 SDR480_GND
    43 SDR480_PRX_DRX_FBRX
    44 QPA8673
    45 QET4101
    46 Reserved_4
    47 Reserved_5
    48 PRx_HB
    49 PRx_MB
    50 PRx_LB

    A A
    Title REV: V10
    Page Name = 01_TABLE_OF_CONTENTS
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    TABLE_OF_CONTENTS Date: Page Modify Date = Wednesday, May 15, 2019Sheet 1 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.
    U0501A

    MFG_NO

    D D
    CONTROL

    AB34 C32
    R0205 [16] LN_BB_CLK1 CXO SDC1_RCLK
    D32
    [16,17] PON_RESET_N SDC1_CLK

    0;0.5A;0201 D31
    R0225 SDC1_CMD
    AF24 C34
    [16,77] SLEEP_CLK SLEEP_CLK SDC1_DATA_0
    C0203 B33
    0;0.5A;0201
    0.047uF;20%;6.3V;0201 SDC1_DATA_1
    SDM_RESIN_N_R
    AH19 D33
    RESIN_N SDC1_DATA_2
    AE23 D34
    RESOUT_N SDC1_DATA_3
    C33
    SDC1_DATA_4
    1 AG29 B34
    TP0203 MODE_0 SDC1_DATA_5
    1 AF29 A33
    TP0204 MODE_1 SDC1_DATA_6
    C31
    R0206 SDC1_DATA_7
    AG21
    [16] PS_HOLD PS_HOLD

    0;0.5A;0201
    SDC2_CLK_R R0211 22;5%;0201
    AC32 AH21
    [47] JTAG_SRST_N SRST_N SDC2_CLK SDC2_CLK [45]

    AC33 AJ22
    [47] JTAG_TCK TCK SDC2_CMD SDC2_CMD [45]

    AA32 AH22
    [47] JTAG_TDI TDI SDC2_DATA_0 SDC2_DATA_0 [45]

    AD33 AH23
    [47] JTAG_TDO TDO SDC2_DATA_1 SDC2_DATA_1 [45]

    AB32 AJ24
    [47] JTAG_TMS TMS SDC2_DATA_2 SDC2_DATA_2 [45]

    AD34 AH24
    [47] JTAG_TRST_N TRST_N SDC2_DATA_3 SDC2_DATA_3 [45]

    C C
    W33
    USB0_DP_AUX_M
    B30 W34
    [11] UFS_RESET UFS_RESET_N USB0_DP_AUX_P
    A30
    [11] UFS_REF_CLK UFS_REFCLK
    P33
    USB0_HS_DM USB0_HS_DM [19,47,48]

    P34
    USB0_HS_DP USB0_HS_DP [19,47,48]

    USB0_HS_REXT R0213 4.02K;1%;0201


    D17 R34
    [11] UFS_RX_M UFS_L0_RX_M USB0_HS_REXT USB0_HS_REXT: 6.04K on Internal test chip, 4.02K on SM6125
    USB0_SS_REXT
    [11] UFS_RX_P
    E17
    UFS_L0_RX_P USB0_SS_REXT
    T34 R0208 NF_100;5%;0201 R34 can connect to GND if USB0 is not used
    D16
    [11] UFS_TX_M UFS_L0_TX_M USB0_SS_REXT: 0OHM on Internal test chip, 100OHM on SM6125
    [11] UFS_TX_P
    E16 V33 T34 can float if DP/USB0 is not used
    UFS_L0_TX_P USB0_SS_RX0_M
    V34
    USB0_SS_RX0_P
    T32
    R0210 USB0_SS_TX0_M
    UFS_REXT
    B16 T31
    UFS_REXT USB0_SS_TX0_P

    100;5%;0201
    UFS_REXT: DNI on Internal test chip, 100 OHM on SM6125 U33
    Can float if UFS is not used USB0_SS_RX1_M
    AE13 U34
    QPHY_TPA USB0_SS_RX1_P
    R32
    USB0_SS_TX1_M
    R31
    USB0_SS_TX1_P

    P32
    USB0_SS_TPA

    B AH27
    PLL_TEST_SE B
    AJ30
    ATEST0 R0215
    AE29 AH18
    ATEST1 PMIC_SPMI_CLK PMIC_SPMI_CLK [16,17]

    AJ19 0;0.5A;0201
    PMIC_SPMI_DATA PMIC_SPMI_DATA [16,17]

    C0201 C0202

    NF_33pf;30%;50V;0201 NF_33pf;30%;50V;0201
    QUIET_THERM [16]
    Place near to the SDM about 1cm and put ino the shielding
    1

    NTC0201
    100K;1%;0201
    2

    A A
    Title REV: V10
    Page Name = 02_SM6125 CONTROL
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 CONTROL Date: Page Modify Date = Wednesday, May 15, 2019Sheet 2 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    U0501B
    MFG_NO

    D D
    GPIO

    L33 AH17
    GPIO_0 GPIO_65
    L34 AG16
    BOOT_CONFIG [9]
    I2C BUS PULL-UPs
    [42] IRTX_OUT GPIO_1 GPIO_66 GRFC11 [48]

    L32 AG15
    GPIO_2 GPIO_67 GRFC_ANT_DET [61]

    L31 AH16
    GPIO_3 GPIO_68
    [3,37] SPK_SDA AG34 AJ16
    GPIO_4 GPIO_69 GRFC13 [48]

    AD32 AH15
    [3,37] SPK_SCL GPIO_5 GPIO_70
    N34 AJ15
    [3,40] TS_I2C_SDA GPIO_6 GPIO_71 BOOT_CONFIG [7]
    VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]
    M33 AJ21 VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]
    [3,40] TS_I2C_SCL GPIO_7 GPIO_72 UIM2_DATA [45]

    N33 AG19 R0301


    [40] LCD_ID GPIO_8 GPIO_73 UIM2_CLK [45]
    2.2K;5%;0201
    M31 AH20 R0307 R0308
    [3] BOARD_ID1 GPIO_9 GPIO_74 UIM2_RESET [45] 2.2K;5%;0201 2.2K;5%;0201
    L4 AE18 R0302
    [77] WCN_UART_CTS_N GPIO_10 GPIO_75 UIM2_PRESENT [45] 2.2K;5%;0201
    K1 AF18
    [77] WCN_UART_RFR_N GPIO_11 GPIO_76 UIM1_DATA [45]

    K2 AE17 [3,44,61] SNS_I2C_SCL


    [77] WCN_UART_TX_N GPIO_12 GPIO_77 UIM1_CLK [45]

    L5 AG18 [3,40] TS_I2C_SCL


    [77] WCN_UART_RX_N GPIO_13 GPIO_78 UIM1_RESET [45]
    [3,44,61] SNS_I2C_SDA
    AF34 AE16
    [21] CAM0_DVDD_EN GPIO_14 GPIO_79 UIM1_PRESENT [45] [3,40] TS_I2C_SDA

    AE33 AH29
    [21] CAM0_AVDD_EN GPIO_15 GPIO_80 ACCEL_INT [44]

    AF33 AG28
    [47] DBG_UART_TX GPIO_16 GPIO_81 GYRO_INT [44] VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]

    AE32 AH28
    [47] DBG_UART_RX GPIO_17 GPIO_82 IR_LED_EN [21] VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]
    R0348
    AH1 AE22 2.2K;5%;0201
    GPIO_18 GPIO_83 FP_LDO_EN [43]

    C
    R0346
    AG1
    GPIO_19 GPIO_84
    AE21 2.2K;5%;0201
    R0349
    2.2K;5%;0201
    C
    AF2 AJ28
    [21] CAM1_2_3_AVDD_EN GPIO_20 GPIO_85 INT_SMARTPA [37] R0347
    2.2K;5%;0201
    AF1 AG27
    [21] CAM1_2_DVDD_EN GPIO_21 GPIO_86
    [3,44] SNS_I3C_SDA
    [3,44] SNS_I3C_SDA
    AH34
    GPIO_22 GPIO_87
    AH32 BOOT_CONFIG [15] TS_RESET_N [40] [3,37] SPK_SDA
    [3,44] SNS_I3C_SCL
    AG33 AG31
    [3,44] SNS_I3C_SCL GPIO_23 GPIO_88 TS_INT_N [40]
    [3,37] SPK_SCL
    AF32 AH31
    GPIO_24 GPIO_89 MDP_VSYNC_P [40]
    [40] VDDI_1P8_EN
    AH33 AJ31
    GPIO_25 GPIO_90 LCD_RESET_N [40]

    AJ33 AG30
    33pf;30%;50V;0201 33pf;30%;50V;0201 GPIO_26 GPIO_91 ALSP_INT_N [44]
    C0301 C0302 C0303
    AG32 AF30
    GPIO_27 GPIO_92 FP_INT_N [48]
    33pf;30%;50V;0201 AE31 AH30
    [3,44,61] SNS_I2C_SDA GPIO_28 GPIO_93 FP_RST_N [48]

    AC31 AJ9
    [3,44,61] SNS_I2C_SCL GPIO_29 GPIO_94 TP_LDO_EN [40]

    AB31 AE9
    [48] FP_SPI_MISO GPIO_30 GPIO_95 AUDIO_PA_RST [37]

    AB30 AJ8 VREG_L12A_1P8 [3,15,41]


    WCN_SW_CTRL [77] VREG_L12A_1P8 [3,15,41]
    [48] FP_SPI_MOSI GPIO_31 GPIO_96
    BOOT_CONFIG [2] AC30 AH9
    [48] FP_SPI_SCLK GPIO_32 GPIO_97
    AD30 AF19
    [48] FP_SPI_CS_N GPIO_33 GPIO_98 SD_CARD_DET_N [45]
    R0325
    R0311 R0312
    AH5 AF25 2.2K;5%;0201 2.2K;5%;0201
    [41] CAM_MCLK0 GPIO_34 GPIO_99 FORCED_USB_BOOT [47]
    R0313
    AG6 AF27 R0309
    0;0.5A;0201 R0310
    [41] CAM_MCLK1 R0314 GPIO_35 GPIO_100 2.2K;5%;0201
    2.2K;5%;0201
    0;0.5A;0201 AD7 AF28
    [41] CAM_MCLK2 GPIO_36 GPIO_101
    [3,41] CCI_I2C_SCL1
    AE7 AF9 [3,41] CCI_I2C_SCL0
    0;0.5A;0201 USB_PHY_PS [19]
    [3,41] CCI_I2C_SDA0 GPIO_37 GPIO_102
    AE6 AG9
    [3,41] CCI_I2C_SCL0 GPIO_38 GPIO_103 WMSS_RESET [58] [3,41] CCI_I2C_SDA1
    R0324 [3,41] CCI_I2C_SDA0
    AF6 L2 Force USB boot pol sel
    [3,41] CCI_I2C_SDA1 GPIO_39 GPIO_104 VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]

    AG5 L3 NF_2.2K;5%;0201
    [3,41] CCI_I2C_SCL1 GPIO_40 GPIO_105 MSS_LTE_COXM_RXD [77]

    B [41] CAM3_RST_N
    AH4
    GPIO_41 GPIO_106
    N3
    SWR_TX_CLK [20] B
    AJ3 N4
    [41] CAM2_RST_N GPIO_42 GPIO_107 SWR_TX_DATA0 [20]

    AH3 N5
    GPIO_43 GPIO_108 SWR_TX_DATA1 [20]
    R0328
    AH8 M1
    [41] CAM_MCLK3 GPIO_44 GPIO_109 MSS_LTE_COXM_TXD [77]

    AG8 M2 0;0.5A;0201
    GPIO_45 GPIO_110 SWR_RX_CLK [20]

    AH7 L1
    [41] CAM1_RST_N GPIO_46 GPIO_111 SWR_RX_DATA0 [20]

    AE8 M5
    GPIO_47 GPIO_112 SWR_RX_DATA1 [20]

    AD8 AF3
    [41] CAM0_RST_N GPIO_48 GPIO_113
    AG7 AJ2
    [21] CAM0_AVDD_EN2 GPIO_49 GPIO_114 CAM_SW_EN [41]

    AG20 AH2
    [58] QLINK_REQUEST GPIO_50 GPIO_115 R0350 FCAM_SEL [41]
    BOARD_ID
    AE19 AG2 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8
    [58] QLINK_ENABLE GPIO_51 GPIO_116 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8
    AG26 AH6 10K;5%;0201 R0340 R0342 R0344
    GPIO_52 GPIO_117
    NF_1K;5%;0201 200K;1%;0201 NF_1K;5%;0201
    AF21 AJ6
    GRFC1 GPIO_53 BOOT_CONFIG[3] GPIO_118
    [3] BOARD_ID1
    AG22 AJ5
    GRFC2 GPIO_54 GPIO_119 [16] BOARD_ID2
    [16] BOARD_ID3
    AJ27 AF7
    [67] GRFC3 GPIO_55 GPIO_120 WCD_RESET_N [20]
    R0343 R0345
    R0341
    AE20 P5 68K;5%;0201 1K;5%;0201
    [69] GRFC4 GPIO_56 BOOT_CONFIG[0] GPIO_121 QCA_SB_CLK [77] 1K;5%;0201

    AH26 P4
    [69] GRFC5 GPIO_57 GPIO_122 QCA_SB_DATA [77]
    D_GND D_GND D_GND
    AH25 N1
    GRFC8 GPIO_58 GPIO_123 CAM_AFVDD_EN [21]

    AJ25 N2
    GRFC9 GPIO_59 GPIO_124 VCI_3P0_EN [40]
    BOOT_CONFIG [10] AF16 AG4
    [58] RFFE1_DATA GPIO_60 GPIO_125 I2S1_SCK [37]

    AG17 AF5
    [58] RFFE1_CLK GPIO_61 GPIO_126 I2S1_WS [37]
    BOOT_CONFIG [11] AE15 AG3
    [62,67,70,75] RFFE2_DATA GPIO_62 GPIO_127 I2S1_DATA0 [37]

    AD15 AE4
    A [62,67,70,75] RFFE2_CLK

    AJ18
    GPIO_63 GPIO_128
    AF22
    I2S1_DATA1 [37]
    A
    [48] GRFC10 BOOT_CONFIG [8] GPIO_64 GPIO_129
    AG23
    GPIO_130
    AG24 Title REV: V10
    GPIO_131 SAR_INT_GRFC0 [61] Page Name = 03_SM6125 GPIO
    AG25
    GPIO_132 DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 GPIO Date: Page Modify Date = Wednesday, May 15, 2019Sheet 3 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED. U0501C

    MFG_NO

    D
    EBI0

    [11] EBI0_CA_CS_0
    D8
    EBI0_LP4X_CS0_LP3_CA0 EBI0_CAL
    F15
    R0401

    VREG_L6A_0P6 [9,11,12,15]
    D
    D9 240;1%;0201
    [11] EBI0_CA_CS_1 EBI0_LP4X_CS1_LP3_CA2

    E11
    [11] EBI0_CA_CK_C EBI0_LP4X_CLK_C
    D11
    [11] EBI0_CA_CK_T EBI0_LP4X_CLK_T

    E9
    [11] EBI0_CA_CKE_0 EBI0_LP4X_CKE0_LP3_CKE0
    E10
    [11] EBI0_CA_CKE_1 EBI0_LP4X_CKE1
    A6
    EBI0_LP4X_DQ0_LP3_DQ20 EBI0_DQ_0 [11]

    D6 B6
    [11] EBI0_DMI_0 EBI0_LP4X_DMI0_LP3_DQ21 EBI0_LP4X_DQ1_LP3_DQ19 EBI0_DQ_1 [11]

    A12 B7
    [11] EBI0_DMI_1 EBI0_LP4X_DMI1_LP3_DQ2 EBI0_LP4X_DQ2_LP3_DQ23 EBI0_DQ_2 [11]

    A8
    EBI0_LP4X_DQ3_LP3_DMI2 EBI0_DQ_3 [11]

    D7 E5
    [11] EBI0_DQS_C_0 EBI0_LP4X_DQS0_C_LP3_DQS2_C EBI0_LP4X_DQ4_LP3_DQ18 EBI0_DQ_4 [11]

    E7 B8
    [11] EBI0_DQS_T_0 EBI0_LP4X_DQS0_T_LP3_DQS2_T EBI0_LP4X_DQ5_LP3_DQ22 EBI0_DQ_5 [11]

    E6
    EBI0_LP4X_DQ6_LP3_DQ16 EBI0_DQ_6 [11]

    E13 D5
    [11] EBI0_DQS_C_1 EBI0_LP4X_DQS1_C_LP3_DQS0_C EBI0_LP4X_DQ7_LP3_DQ17 EBI0_DQ_7 [11]

    D13 E14
    [11] EBI0_DQS_T_1 EBI0_LP4X_DQS1_T_LP3_DQS0_T EBI0_LP4X_DQ8_LP3_DQ7 EBI0_DQ_8 [11]

    D14
    EBI0_LP4X_DQ9_LP3_DMI0 EBI0_DQ_9 [11]

    D10 B14
    [11] EBI0_CA_CA_0 EBI0_LP4X_CA0_LP3_CS0 EBI0_LP4X_DQ10_LP3_DQ3 EBI0_DQ_10 [11]

    B11 B12
    [11] EBI0_CA_CA_1 EBI0_LP4X_CA1_LP3_CS1 EBI0_LP4X_DQ11_LP3_DQ1 EBI0_DQ_11 [11]

    A9 B13
    [11] EBI0_CA_CA_2 EBI0_LP4X_CA2 EBI0_LP4X_DQ12_LP3_DQ4 EBI0_DQ_12 [11]

    B9 A11
    C [11] EBI0_CA_CA_3

    B10
    EBI0_LP4X_CA3_LP3_CA3 EBI0_LP4X_DQ13_LP3_DQ0
    E12
    EBI0_DQ_13

    EBI0_DQ_14
    [11]

    [11]
    C
    [11] EBI0_CA_CA_4 EBI0_LP4X_CA4_LP3_CA4 EBI0_LP4X_DQ14_LP3_DQ5
    E8 D12
    [11] EBI0_CA_CA_5 EBI0_LP4X_CA5_LP3_CA1 EBI0_LP4X_DQ15_LP3_DQ6 EBI0_DQ_15 [11]

    U0501D

    MFG_NO

    EBI1

    E25 F18
    [11] EBI1_CA_CS_0 EBI1_LP4X_CS0_LP3_CA7 EBI1_TEST
    E24
    [11] EBI1_CA_CS_1 EBI1_LP4X_CS1_LP3_CA6

    D22 B29
    [11] EBI1_CA_CK_C EBI1_LP4X_CLK_C_LP3_CLK_C DDR_RESET_N DDR_RESET_N [11]

    E22
    [11] EBI1_CA_CK_T EBI1_LP4X_CLK_T_LP3_CLK_T

    D24
    [11] EBI1_CA_CKE_0 EBI1_LP4X_CKE0
    D23
    [11] EBI1_CA_CKE_1 EBI1_LP4X_CKE1_LP3_CKE1
    A26
    B E27
    EBI1_LP4X_DQ0_LP3_DQ27
    B26
    EBI1_DQ_0

    EBI1_DQ_1
    [11]

    [11]
    B
    [11] EBI1_DMI_0 EBI1_LP4X_DMI0_LP3_DQ26 EBI1_LP4X_DQ1_LP3_DQ28
    A20 B25
    [11] EBI1_DMI_1 EBI1_LP4X_DMI1_LP3_DQ14 EBI1_LP4X_DQ2_LP3_DQ24 EBI1_DQ_2 [11]

    A24
    EBI1_LP4X_DQ3_LP3_DMI3 EBI1_DQ_3 [11]

    E26 D28
    [11] EBI1_DQS_C_0 EBI1_LP4X_DQS0_C_LP3_DQS3_C EBI1_LP4X_DQ4_LP3_DQ29 EBI1_DQ_4 [11]

    D26 B24
    [11] EBI1_DQS_T_0 EBI1_LP4X_DQS0_T_LP3_DQS3_T EBI1_LP4X_DQ5_LP3_DQ25 EBI1_DQ_5 [11]

    D27
    EBI1_LP4X_DQ6_LP3_DQ31 EBI1_DQ_6 [11]

    D20 E28
    [11] EBI1_DQS_C_1 EBI1_LP4X_DQS1_C_LP3_DQS1_C EBI1_LP4X_DQ7_LP3_DQ30 EBI1_DQ_7 [11]

    E20 D19
    [11] EBI1_DQS_T_1 EBI1_LP4X_DQS1_T_LP3_DQS1_T EBI1_LP4X_DQ8_LP3_DQ8 EBI1_DQ_8 [11]

    E19
    EBI1_LP4X_DQ9_LP3_DMI1 EBI1_DQ_9 [11]

    E23 B18
    [11] EBI1_CA_CA_0 EBI1_LP4X_CA0_LP3_CA5 EBI1_LP4X_DQ10_LP3_DQ12 EBI1_DQ_10 [11]

    B21 B20
    [11] EBI1_CA_CA_1 EBI1_LP4X_CA1 EBI1_LP4X_DQ11_LP3_DQ13 EBI1_DQ_11 [11]

    A23 B19
    [11] EBI1_CA_CA_2 EBI1_LP4X_CA2_LP3_CA8 EBI1_LP4X_DQ12_LP3_DQ11 EBI1_DQ_12 [11]

    B23 A21
    [11] EBI1_CA_CA_3 EBI1_LP4X_CA3 EBI1_LP4X_DQ13_LP3_DQ15 EBI1_DQ_13 [11]

    B22 D21
    [11] EBI1_CA_CA_4 EBI1_LP4X_CA4 EBI1_LP4X_DQ14_LP3_DQ10 EBI1_DQ_14 [11]

    D25 E21
    [11] EBI1_CA_CA_5 EBI1_LP4X_CA5_LP3_CA9 EBI1_LP4X_DQ15_LP3_DQ9 EBI1_DQ_15 [11]

    A A
    Title REV: V10
    Page Name = 04_SM6125 EBI0_1
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 EBI0/1 Date: Page Modify Date = Wednesday, May 15, 2019Sheet 4 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D

    compatible MIPI interface camera U0501E

    MFG_NO

    MIPI

    R4
    [41] MIPI_CSI0_CLK_P CSI0_NC_CLK_P
    R3
    [41] MIPI_CSI0_CLK_M CSI0_A0_CLK_M
    Depth R2
    [41] MIPI_CSI0_L0_P CSI0_B0_LN0_P
    R1 F33
    [41] MIPI_CSI0_L0_M CSI0_C0_LN0_M DSI0_CLK_M MIPI_DSI0_CLK_M [40]

    T4 F34
    CSI0_A1_LN1_P DSI0_CLK_P MIPI_DSI0_CLK_P [40]

    T3 G33
    CSI0_B1_LN1_M DSI0_LN0_M MIPI_DSI0_L0_M [40]

    U4 G34
    CSI0_C1_LN2_P DSI0_LN0_P MIPI_DSI0_L0_P [40]

    U3 J33
    CSI0_A2_LN2_M DSI0_LN1_M MIPI_DSI0_L1_M [40]

    U2 J34
    CSI0_B2_LN3_P DSI0_LN1_P MIPI_DSI0_L1_P [40]

    U1 G31
    CSI0_C2_LN3_M DSI0_LN2_M MIPI_DSI0_L2_M [40]

    V1 G32
    [41] MIPI_CSI1_CLK_P CSI1_NC_CLK_P DSI0_LN2_P MIPI_DSI0_L2_P [40]

    V2 H32
    [41] MIPI_CSI1_CLK_M CSI1_A0_CLK_M DSI0_LN3_M MIPI_DSI0_L3_M [40]

    V3 H31
    [41] MIPI_CSI1_L0_P CSI1_B0_LN0_P DSI0_LN3_P MIPI_DSI0_L3_P [40]

    V4
    C [41] MIPI_CSI1_L0_M

    W3
    CSI1_C0_LN0_M
    K34
    R0502
    C
    [41] MIPI_CSI1_L1_P CSI1_A1_LN1_P DSI0_REXT_PLL MIPI_DSI0_REXT_PLL: DNI on Internal test chip, 1.4K on SM6150
    Rear CAMERA W4 1.4K;1%;0201
    [41] MIPI_CSI1_L1_M CSI1_B1_LN1_M
    Y1 J31
    [41] MIPI_CSI1_L2_P CSI1_C1_LN2_P DSI1_CLK_M
    Y2 J32
    [41] MIPI_CSI1_L2_M CSI1_A2_LN2_M DSI1_CLK_P
    Y3
    [41] MIPI_CSI1_L3_P CSI1_B2_LN3_P
    Y4
    [41] MIPI_CSI1_L3_M CSI1_C2_LN3_M
    AA3
    [41] MIPI_CSI2_CLK_P CSI2_NC_CLK_P
    AA4
    [41] MIPI_CSI2_CLK_M CSI2_A0_CLK_M
    AB1
    [41] MIPI_CSI2_L0_P CSI2_B0_LN0_P
    AB2
    [41] MIPI_CSI2_L0_M CSI2_C0_LN0_M
    AB3
    FRONT/WIDE CAMERA [41] MIPI_CSI2_L1_P CSI2_A1_LN1_P
    AB4
    [41] MIPI_CSI2_L1_M CSI2_B1_LN1_M
    AC3
    [41] MIPI_CSI2_L2_P CSI2_C1_LN2_P
    AC4
    [41] MIPI_CSI2_L2_M CSI2_A2_LN2_M
    AD1
    [41] MIPI_CSI2_L3_P CSI2_B2_LN3_P
    AD2
    [41] MIPI_CSI2_L3_M CSI2_C2_LN3_M

    B B

    A A
    Title REV: V10
    Page Name = 05_SM6125 MIPI-CSI_DSI
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 MIPI-CSI/DSI Date: Page Modify Date = Wednesday, May 15, 2019Sheet 5 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D

    U0501F

    MFG_NO

    WLAN_QLINK

    H1 E1
    [77] WLAN_BT_COEX_CLK WLAN_CXM_CLK WLAN_XO_CLK WLAN_XO_CLK [16]

    J1
    [77] WLAN_BT_COEX_DATA WLAN_CXM_DATA
    R0602
    AA33
    QREFS_CXO_REXT
    3.01K;1%;0201
    F1
    [77] WL_CMD_CLK WLAN_BBD_CLK
    G1
    [77] WL_CMD_DATA WLAN_BBD_DATA

    AF11
    QLINK_CLK_M QPHY_CLK_M [58]

    R0601 G2 AG11
    WLAN0_REXT QLINK_CLK_P QPHY_CLK_P [58]
    6.04K;1%;0201

    C [77] WL_Rx_BB_I_N
    B2
    WLAN_RX_I_M QLINK_DL0_M
    AH13
    QPHY_DL0_M [58]
    C
    A2 AJ13
    [77] WL_Rx_BB_I_P WLAN_RX_I_P QLINK_DL0_P QPHY_DL0_P [58]

    B1 AG12
    [77] WL_Rx_BB_Q_N WLAN_RX_Q_M QLINK_DL1_M QPHY_DL1_M [58]

    C1 AF12
    [77] WL_Rx_BB_Q_P WLAN_RX_Q_P QLINK_DL1_P QPHY_DL1_P [58]

    AJ11
    QLINK_DL2_M QPHY_DL2_M [58]
    C0601 C0602 C0603
    C0604
    2.7pF;0.25pF;50V;0201 AH11
    2.7pF;0.25pF;50V;0201 2.7pF;0.25pF;50V;0201 QLINK_DL2_P QPHY_DL2_P [58]
    2.7pF;0.25pF;50V;0201
    J4 AG13
    WLAN_TX_I_M QLINK_UL0_M QPHY_UL0_M [58]

    H4 AF13
    WLAN_TX_I_P QLINK_UL0_P QPHY_UL0_P [58]

    H3
    WLAN_TX_Q_M
    [77] WL_Tx_BB_I_N
    J3
    WLAN_TX_Q_P
    [77] WL_Tx_BB_I_P

    [77] WL_Tx_BB_Q_N

    [77] WL_Tx_BB_Q_P

    C0605 C0606 C0607 C0608


    2.7pF;0.25pF;50V;0201 2.7pF;0.25pF;50V;0201 2.7pF;0.25pF;50V;0201 2.7pF;0.25pF;50V;0201

    Add C1001-C1008 caps place holder for CLK desense to improve sensitivity.

    B B

    A A
    Title REV: V10
    Page Name = 06_SM6125 WCSS_RF
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 WCSS/RF Date: Page Modify Date = Wednesday, May 15, 2019Sheet 6 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    U0501G

    D MFG_NO D

    PWR1

    VREG_S5A [9,14,15] AA19 L28 [8,9,15,16] VREG_L10A_1P8


    VDDMX_1_1 VDD_QFPROM
    AA20
    VDDMX_1_2
    AA28
    VDDMX_1_3
    AB28 AC18 [8,16] VREF_MSM
    VDDMX_1_4 VDDPX_VBIAS_SDC
    J12
    VDDMX_1_5

    2
    J26 AA25 C0702
    VDDMX_1_6 VDD_APC0_1 C0712
    JP0701 0.1uF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201

    1
    1 L9 2 L11 AA26
    [14] VREG_S5A_SNS VDDMX_1_7 VDD_APC0_2

    TOP;BOT L12 AB25


    VDDMX_1_8 VDD_APC0_3
    C0701 C0726
    1.0UF;20%;6.3V;0201 10uF;20%;6.3V;0402 L13 AB26

    2
    VDDMX_1_9 VDD_APC0_4

    2
    L15 AC25 [13] VREG_S1A_S2A
    C0705 C0720
    C0718 VDDMX_1_10 VDD_APC0_5

    1
    1.0UF;20%;6.3V;0201 NF_10uF;20%;6.3V;0402

    1
    C0704 10uF;20%;6.3V;0402 L16 AC26
    1.0UF;20%;6.3V;0201 VDDMX_1_11 VDD_APC0_6
    L17 AD25
    VDDMX_1_12 VDD_APC0_7
    L19 AD26
    VDDMX_1_13 VDD_APC0_8 BULK CAPS JP0702
    L20 U24 1 L9 2 [13] RMT_VREG_S1A_S2A_P
    VDDMX_1_14 VDD_APC0_9
    L21 U26 TOP;BOT
    VDDMX_1_15 VDD_APC0_10
    L22 V25
    VDDMX_1_16 VDD_APC0_11
    L23 V26
    VDDMX_1_17 VDD_APC0_12
    L24 W20 C0719 C0722 C0725 C0721 C0724
    C0723

    2
    VDDMX_1_18 VDD_APC0_13 10uF;20%;6.3V;0402 10uF;20%;6.3V;0402

    C
    10uF;20%;6.3V;0402 10uF;20%;6.3V;0402 10uF;20%;6.3V;0402
    L26 W21
    C0730
    1.0UF;20%;6.3V;0201
    10uF;20%;6.3V;0402
    C

    1
    VDDMX_1_19 VDD_APC0_14
    N9 W22

    MX T24
    VDDMX_1_20

    VDDMX_1_21
    VDD_APC0_15

    VDD_APC0_16
    W25

    U11 Y20
    VDDMX_1_22 VDD_APC0_17
    U12 Y21
    VDDMX_1_23 VDD_APC0_18
    JJP0703
    U13 Y22
    VDDMX_1_24 VDD_APC0_19 1 L9 2 [13] RMT_VREG_S1A_S2A_M

    U14 Y23
    TOP;BOT
    2
    VDDMX_1_25 VDD_APC0_20
    2

    2
    2

    C0708 U15 Y24


    C0707 C0709 C0710 C0711
    C0706 VDDMX_1_26 VDD_APC0_21
    1.0UF;20%;6.3V;02011.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
    1
    1

    1
    1.0UF;20%;6.3V;0201
    1

    1.0UF;20%;6.3V;0201 U16 Y25


    1.0UF;20%;6.3V;0201 VDDMX_1_27 VDD_APC0_22
    U17 Y26
    VDDMX_1_28 VDD_APC0_23
    U18
    VDDMX_1_29
    U19
    VDDMX_1_30 C0703
    C0727
    C0729 C0728 C0717 2.2uF;20%;6.3V;0201
    U20
    VDDMX_1_31 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 2.2uF;20%;6.3V;0201
    0.1uF;20%;6.3V;0201 C0715
    C0713 C0714 C0716
    U22 2.2uF;20%;6.3V;0201
    VDDMX_1_32 2.2uF;20%;6.3V;0201 2.2uF;20%;6.3V;0201 2.2uF;20%;6.3V;0201

    U23
    VDDMX_1_33
    U28
    VDDMX_1_34
    V10
    VDDMX_1_35
    W28
    VDDMX_1_36
    Y18
    VDDMX_1_37

    B B

    A A
    Title REV: V10
    Page Name = 07_SM6125 PWR_1
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 PWR_1 Date: Page Modify Date = Wednesday, May 15, 2019Sheet 7 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D

    U0501H

    MFG_NO

    PWR2

    VREG_S3A_S4A [13] K13 AC14 [16,17] VIO_OUT


    VDDCX_1_1 VDDPX_0
    K14
    VDDCX_1_2
    K15 F11
    VDDCX_1_3 VDDPX_1_A
    K16
    VDDCX_1_4 VDDPX_1_B
    F14 DDR [11,12,14,15] VREG_S8A

    K17 F19
    VDDCX_1_5 VDDPX_1_C
    K18 F22
    VDDCX_1_6 VDDPX_1_D
    K19 G26
    VDDCX_1_7 VDDPX_1_E
    K20
    VDDCX_1_8
    K24
    VDDCX_1_9 VDDPX_2
    AC19 SDC2 [15,45] VREG_L5A_2P96

    K25
    VDDCX_1_10
    N10 AA6 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8

    MODEM N12
    VDDCX_1_11

    VDDCX_1_12
    VDDPX_3_1

    VDDPX_3_2
    AC10

    MSM PX_3
    C0811
    N14 AC29 1.0UF;20%;6.3V;0201
    VDDCX_1_13 VDDPX_3_3

    2
    C0812 C0813 C0814
    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
    BULK CAPS N16 AD17 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8

    2
    JP0802 VDDCX_1_14 VDDPX_3_4

    1
    C 1 L9 2 N18 AD20
    C

    1
    [13] RTM_VREG_S3A_S4A_P VDDCX_1_15 VDDPX_3_5 C0815
    N20 F29 1.0UF;20%;6.3V;0201
    TOP;BOT

    2
    VDDCX_1_16 VDDPX_3_6

    2
    C0818
    N22 L30 C0816 C0817

    1
    VDDCX_1_17 VDDPX_3_7 C0819 C0838 C0839

    1
    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
    C0826 C0828 C0831 C0829 C0830 N24 P6 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
    C0827 1.0UF;20%;6.3V;0201
    VDDCX_1_18 VDDPX_3_8
    10uF;20%;6.3V;0402 10uF;20%;6.3V;0402 10uF;20%;6.3V;0402 10uF;20%;6.3V;0402 10uF;20%;6.3V;0402 1.0UF;20%;6.3V;0201
    N26 W30
    10uF;20%;6.3V;0402 VDDCX_1_19 VDDPX_3_9
    R8 F12
    JP0801 VDDCX_1_20 VDDPX_3_A
    1 L9 2 R10 F21
    [13] RTM_VREG_S3A_S4A_M VDDCX_1_21 VDDPX_3_B

    TOP;BOT R11
    VDDCX_1_22
    R12
    VDDCX_1_23 VDDPX_5
    AC16 UIM1 [15,45] VREG_L19A_1P8

    R13
    VDDCX_1_24
    C0833
    C0832 C0834 C0835 R14
    VDDCX_1_25 VDDPX_6
    AC17 UIM2 [15,45] VREG_L20A_1P8
    0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201
    0.1uF;20%;6.3V;0201
    R15
    VDDCX_1_26
    R16
    VDDCX_1_27
    R17
    VDDCX_1_28 VDDPX_7
    G29 eMMC [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8

    R18
    VDDCX_1_29
    R19
    VDDCX_1_30
    R20
    VDDCX_1_31 VDDPX_10
    G28 UFS G28 can float if UFS is not used [9,15] VREG_L18A_1P232

    R21
    VDDCX_1_32
    C0805 R22
    2

    C0804 C0806
    1.0UF;20%;6.3V;0201 C0807 C0808 VDDCX_1_33
    CXO
    2

    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 R23 V30 [7,9,15,16] VREG_L10A_1P8


    2

    C0809 VDDCX_1_34 VDDPX_11


    C0810
    1

    C0803
    1

    1.0UF;20%;6.3V;0201 R24
    1

    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 VDDCX_1_35


    1.0UF;20%;6.3V;0201
    R25
    VDDCX_1_36

    B W8
    VDDCX_1_37 VDDPX_VBIAS_UIM
    AB16 [7,16] VREF_MSM
    B
    W10
    VDDCX_1_38
    W12
    VDDCX_1_39
    W14
    VDDCX_1_40
    W16
    VDDCX_1_41
    W17
    VDDCX_1_42
    Y8 J10
    WCSS CX [15] VREG_L8A_0P736
    VDDCX_1_43 VDD_WCSS_CX_1
    Y10 J11 C0821
    VDDCX_1_44 VDD_WCSS_CX_2 1.0UF;20%;6.3V;0201
    C0825

    2
    Y14
    VDDCX_1_45 C0824
    C0820 C0822 C0823 1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201 C0802

    2
    C0801 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201

    2
    C0836

    2
    4.7uF;20%;6.3V;0402
    0.1uF;20%;6.3V;0201
    0.1uF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201 C0837

    1
    0.1uF;20%;6.3V;0201

    1
    1

    1
    A A
    Title REV: V10
    Page Name = 08_SM6125 PWR_2
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 PWR_2 Date: Page Modify Date = Wednesday, May 15, 2019Sheet 8 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D
    U0501I

    MFG_NO

    [9,15] VREG_L4A_0P928

    PWR3

    VREG_S5A [7,9,14,15] V23


    VDDA_APC0_PLL

    2
    C0931 C0932
    C0929

    1
    C0930 2.2uF;20%;6.3V;0201
    C0901 C0902 1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201 2.2uF;20%;6.3V;0201
    AC12
    1.0UF;20%;6.3V;0201 C0903 VDDA_QLINK_LV_CK

    2
    1

    1
    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 H10 AB12
    VDDA_EBI0_A VDDA_QLINK_LV
    H12
    VDDA_EBI0_B
    H14 F17
    VDDA_EBI0_C VDDA_UFS_CORE
    H19
    VDDA_EBI1_A eMMC compatible UFS soltion
    H21 G17 [7,8,9,15,16] VREG_L10A_1P8
    VDDA_EBI1_B VDDA_UFS_1P8
    H23
    VDDA_EBI1_C
    F13 [4,9,11,12,15] VREG_L6A_0P6
    VDDIO_CK_EBI0

    VREG_L4A_0P928 [9,15] G16 F20


    VDDA_EBI_PLL VDDIO_CK_EBI1

    R28 [15] VREG_L7A_0P928


    C0904 VDDA_USB_SS_DP_CORE
    1.0UF;20%;6.3V;0201 P30

    2
    VDDA_USB_SS_DP_1P8

    2
    C0924 C0925

    2
    C0926 C0927

    1
    1.0UF;20%;6.3V;0201 C0928

    1
    C
    1.0UF;20%;6.3V;0201
    VDD_USB_HS_CORE
    N28
    1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201 2.2uF;20%;6.3V;0201
    C
    T8
    VDDA_CSI0_1P2

    VREG_L18A_1P232 [8,9,15] U8
    VDDA_CSI1_1P2
    V8 N30 [7,8,9,15,16] VREG_L10A_1P8
    C0933 C0905 C0906 C0907 C0908 VDDA_CSI2_1P2 VDDA_USB_HS_1P8
    1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201
    2

    2
    1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201 K29 N29 [15] VREG_L15A_3P104
    1

    1
    1.0UF;20%;6.3V;0201 VDDA_DSI_PLL VDDA_USB_HS_3P1

    H28 F16 [8,9,15] VREG_L18A_1P232


    VDDA_DSI_1P2 VDDA_PLL_HV_CC_EBI

    VREG_S5A [7,9,14,15] J29 K8 [15,77] VREG_L17A_1P304


    VDDA_DSI_0P9 VDDA_WCSS_ADCDAC_0
    J8
    VDDA_WCSS_ADCDAC_1 C0920
    1.0UF;20%;6.3V;0201 C0922

    2
    L10 C0921

    2
    1.0UF;20%;6.3V;0201
    VDDA_AUDIO_PLL C0923
    1.0UF;20%;6.3V;0201

    1
    1.0UF;20%;6.3V;0201
    VREG_L10A_1P8 [7,8,9,15,16] T17 G10
    VDDA_CAMSS_PLL VDDIO_EBI_A1
    G11
    C0911 C0910 C0909 VDDIO_EBI_A2
    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 L7 G14
    2

    VDDA_WCSS_PLL VDDIO_EBI_B1
    G15
    1.0UF;20%;6.3V;0201
    1

    VDDIO_EBI_B2
    H16 G18
    VDDA_CC_EBI VDDIO_EBI_C1
    G19
    VDDIO_EBI_C2
    G25 G22
    VDDA_QREFS_0P9_4 VDDIO_EBI_D1

    VREG_L16A_1P8 [15,77,79] AD28 G23 [4,9,11,12,15] VREG_L6A_0P6


    VDDA_QREFS_0P9_5 VDDIO_EBI_D2

    B VREG_S5A [7,9,14,15] AD22


    VDDA_QREFS_0P9_6 C0916 C0917 C0918
    1.0UF;20%;6.3V;0201
    B
    VREG_L4A_0P928 [9,15] AB13 1.0UF;20%;6.3V;0201

    2
    VDDA_QREFS_0P9_7
    C0919
    10uF;20%;6.3V;0402

    1
    C0912 C0913 C0914 C0915 1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201
    2

    2
    1

    A A
    Title REV: V10
    Page Name = 09_SM6125 PWR_3
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 PWR_3 Date: Page Modify Date = Wednesday, May 15, 2019Sheet 9 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN U0501K
    A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC. MFG_NO

    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,


    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED. U0501L
    GND2

    MFG_NO
    AJ29 C24
    VSSX_0_101 VSSX_0_130
    AJ32 C25
    VSSX_0_102 VSSX_0_131
    AJ34 C26

    D U0501J B5
    VSSX_0_103

    VSSX_0_104
    VSSX_0_132

    VSSX_0_133
    C27
    GND2
    D
    M22 T20
    MFG_NO VSSX_0_201 VSSX_0_246
    B15 C28
    VSSX_0_105 VSSX_0_134
    M24 T21
    B17 C29 VSSX_0_202 VSSX_0_247
    VSSX_0_106 VSSX_0_135
    M26 T22
    B27 D1 VSSX_0_203 VSSX_0_248
    VSSX_0_107 VSSX_0_136
    M29 T23
    GND1 VSSX_0_204 VSSX_0_249
    B28 D2
    VSSX_0_108 VSSX_0_137
    M30 T25
    A5 AD9 VSSX_0_205 VSSX_0_250
    VSSX_0_1 VSSX_0_51 B31 D15
    VSSX_0_109 VSSX_0_138
    M32 T26
    A14 AD11 VSSX_0_206 VSSX_0_251
    VSSX_0_2 VSSX_0_52 B32 D18
    VSSX_0_110 VSSX_0_139
    M34 T29
    A15 AD13 VSSX_0_207 VSSX_0_252
    VSSX_0_3 VSSX_0_53 C5 D29
    VSSX_0_111 VSSX_0_140
    N6 T33
    A17 AD16 VSSX_0_208 VSSX_0_253
    VSSX_0_4 VSSX_0_54 C6 D30
    VSSX_0_112 VSSX_0_141
    N7 U5
    A18 AD19 VSSX_0_209 VSSX_0_254
    VSSX_0_5 VSSX_0_55 C7 E2
    VSSX_0_113 VSSX_0_142
    N31 U6
    A27 AD23 VSSX_0_210 VSSX_0_255
    VSSX_0_6 VSSX_0_56 C8 E15
    VSSX_0_114 VSSX_0_143
    N32 U7
    A29 AD24 VSSX_0_211 VSSX_0_256
    VSSX_0_7 VSSX_0_57 C9 E18
    VSSX_0_115 VSSX_0_144
    A32 AD27 P1 U10
    VSSX_0_8 VSSX_0_58 C10 E29 VSSX_0_212 VSSX_0_257
    VSSX_0_116 VSSX_0_145
    A34 AD29 P2 U21
    VSSX_0_9 VSSX_0_59 C11 E30 VSSX_0_213 VSSX_0_258
    VSSX_0_117 VSSX_0_146
    AA1 AD31 P3 U25
    VSSX_0_10 VSSX_0_60 C12 E33 VSSX_0_214 VSSX_0_259
    VSSX_0_118 VSSX_0_147
    AA2 AE1 P7 U30
    VSSX_0_11 VSSX_0_61 C13 E34 VSSX_0_215 VSSX_0_260
    VSSX_0_119 VSSX_0_148
    P11 U31
    AA5 AE2 VSSX_0_216 VSSX_0_261
    VSSX_0_12 VSSX_0_62 C14 F2
    VSSX_0_120 VSSX_0_149
    P12 U32
    AA7 AE3 VSSX_0_217 VSSX_0_262
    VSSX_0_13 VSSX_0_63 C15 F3
    VSSX_0_121 VSSX_0_150
    P13 V7
    AA8 AE5 VSSX_0_218 VSSX_0_263
    VSSX_0_14 VSSX_0_64 C16 F6
    VSSX_0_122 VSSX_0_151
    P14 V12
    AA21 AE10 VSSX_0_219 VSSX_0_264
    VSSX_0_15 VSSX_0_65 C17 F7
    VSSX_0_123 VSSX_0_152
    P15 V14
    AA22 AE11 VSSX_0_220 VSSX_0_265
    VSSX_0_16 VSSX_0_66 C18 F8
    VSSX_0_124 VSSX_0_153
    P17 V16
    AA24 AE12 VSSX_0_221 VSSX_0_266
    VSSX_0_17 VSSX_0_67 C19 F9

    C AA27
    VSSX_0_18 VSSX_0_68
    AE14
    C20
    VSSX_0_125

    VSSX_0_126
    VSSX_0_154

    VSSX_0_155
    F10
    P18
    VSSX_0_222 VSSX_0_267
    V19
    C
    P19 V20
    AA29 AE24 VSSX_0_223 VSSX_0_268
    VSSX_0_19 VSSX_0_69 C21 F23
    VSSX_0_127 VSSX_0_156
    AA30 AE25 P20 V21
    VSSX_0_20 VSSX_0_70 C22 F24 VSSX_0_224 VSSX_0_269
    VSSX_0_128 VSSX_0_157
    AA31 AE26 P21 V24
    VSSX_0_21 VSSX_0_71 C23 F25 VSSX_0_225 VSSX_0_270
    VSSX_0_129 VSSX_0_158
    P23 V28
    AA34 AE27 VSSX_0_226 VSSX_0_271
    VSSX_0_22 VSSX_0_72 F26
    VSSX_0_159
    AB5 AE28 P24 W1
    VSSX_0_23 VSSX_0_73 G3 F27 VSSX_0_227 VSSX_0_272
    VSSA_WCSS_ADCDAC_0_1 VSSX_0_160
    AB7 AE30 P25 W2
    VSSX_0_24 VSSX_0_74 G4 F28 VSSX_0_228 VSSX_0_273
    VSSA_WCSS_ADCDAC_0_2 VSSX_0_161
    AB9 AE34 P31 W5
    VSSX_0_25 VSSX_0_75 H5 F31 VSSX_0_229 VSSX_0_274
    VSSA_WCSS_ADCDAC_0_3 VSSX_0_162
    R5 W6
    AB11 AF4 VSSX_0_230 VSSX_0_275
    VSSX_0_26 VSSX_0_76 J5 F32
    VSSA_WCSS_ADCDAC_0_4 VSSX_0_163
    R6 W7
    AB14 AF8 VSSX_0_231 VSSX_0_276
    VSSX_0_27 VSSX_0_77 K4 G7
    VSSA_WCSS_ADCDAC_0_5 VSSX_0_164
    R7 W24
    AB23 AF10 VSSX_0_232 VSSX_0_277
    VSSX_0_28 VSSX_0_78 K5 G12
    VSSA_WCSS_ADCDAC_0_6 VSSX_0_165
    R29 W26
    AB24 AF14 VSSX_0_233 VSSX_0_278
    VSSX_0_29 VSSX_0_79 K7 H2
    VSSA_WCSS_ADCDAC_0_7 VSSX_0_166
    R30 W31
    AB29 AF15 VSSX_0_234 VSSX_0_279
    VSSX_0_30 VSSX_0_80 H8
    VSSX_0_167
    R33 W32
    AB33 AF17 VSSX_0_235 VSSX_0_280
    VSSX_0_31 VSSX_0_81 H30
    VSSX_0_168
    T1 Y7
    AC1 AF20 VSSX_0_236 VSSX_0_281
    VSSX_0_32 VSSX_0_82 A1 H33
    VSSA_WCSS_ADCDAC_1_1 VSSX_0_169
    AC2 AF23 T2 Y11
    VSSX_0_33 VSSX_0_83 A3 H34 VSSX_0_237 VSSX_0_282
    VSSA_WCSS_ADCDAC_1_2 VSSX_0_170
    AC5 AF26 T7 Y15
    VSSX_0_34 VSSX_0_84 B3 J2 VSSX_0_238 VSSX_0_283
    VSSA_WCSS_ADCDAC_1_3 VSSX_0_171
    AC6 AF31 T10 Y16
    VSSX_0_35 VSSX_0_85 B4 J13 VSSX_0_239 VSSX_0_284
    VSSA_WCSS_ADCDAC_1_4 VSSX_0_172
    AC7 AG10 T11 Y17
    VSSX_0_36 VSSX_0_86 C2 J14 VSSX_0_240 VSSX_0_285
    VSSA_WCSS_ADCDAC_1_5 VSSX_0_173
    T12 Y19
    AC8 AG14 VSSX_0_241 VSSX_0_286
    VSSX_0_37 VSSX_0_87 C3 J15
    VSSA_WCSS_ADCDAC_1_6 VSSX_0_174
    T13 Y28
    AC9 AH10 VSSX_0_242 VSSX_0_287
    VSSX_0_38 VSSX_0_88 C4 J16
    VSSA_WCSS_ADCDAC_1_7 VSSX_0_175
    T14 Y32
    AC11 AH12 VSSX_0_243 VSSX_0_288
    VSSX_0_39 VSSX_0_89 E3 J18

    B AC13
    VSSX_0_40 VSSX_0_90
    AH14
    E4
    VSSA_WCSS_ADCDAC_1_8

    VSSA_WCSS_ADCDAC_1_9
    VSSX_0_176

    VSSX_0_177
    J19
    T15
    VSSX_0_244 VSSX_0_289
    Y33
    B
    T18 Y34
    AC21 AJ1 VSSX_0_245 VSSX_0_290
    VSSX_0_41 VSSX_0_91 F4 J20
    VSSA_WCSS_ADCDAC_1_10 VSSX_0_178
    AC22 AJ4
    VSSX_0_42 VSSX_0_92 F5 J21
    VSSA_WCSS_ADCDAC_1_11 VSSX_0_179
    AC23 AJ7
    VSSX_0_43 VSSX_0_93 H6 J22
    VSSA_WCSS_ADCDAC_1_12 VSSX_0_180
    AC24 AJ10
    VSSX_0_44 VSSX_0_94 H7 J24
    VSSA_WCSS_ADCDAC_1_13 VSSX_0_181
    AC27 AJ12
    VSSX_0_45 VSSX_0_95 J25
    VSSX_0_182
    AC28 AJ14
    VSSX_0_46 VSSX_0_96 J30
    VSSX_0_183
    AC34 AJ17
    VSSX_0_47 VSSX_0_97 K3
    VSSX_0_184
    AD3 AJ20
    VSSX_0_48 VSSX_0_98 K10
    VSSX_0_185
    AD4 AJ23
    VSSX_0_49 VSSX_0_99 J7 K11
    VSSGR_WCSS_ADC_1 VSSX_0_186
    AD5 AJ26
    VSSX_0_50 VSSX_0_100 K21
    VSSX_0_187
    V22 K22
    VSSA_APC0_PLL VSSX_0_188
    K31
    VSSX_0_189
    M7 K32
    VSSA_WCSS_PLL VSSX_0_190
    K33
    VSSX_0_191
    M8 L6
    VSSA_AUDIO_PLL VSSX_0_192
    L29
    VSSX_0_193
    T16 M4
    VSSA_CAMSS_PLL VSSX_0_194
    M6
    VSSX_0_195
    M12
    VSSX_0_196
    M14
    VSSX_0_197
    M16
    VSSX_0_198

    A VSSX_0_199
    M18

    M20
    A
    VSSX_0_200

    Title
    Page Name = 10_SM6125 GNDREV: V10

    DOCUMENT NO.: Size Custom


    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    SM6125 GND Date: Page Modify Date = Wednesday, May 15, 2019Sheet 10 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,

    RE-EXPORT, OR TRANSFER
    INTERNATIONAL ("EXPORT")
    LAW IS STRICTLY LAWS. DIVERSION CONTRARY TO U.S. AND
    PROHIBITED.
    U1101A

    MFG_NO eMCP and UFS compatible design


    VREG_L6A_0P6 [4,9,12,15] U1101B

    MFG_NO

    LPDDR4_A

    D [4] DDR_RESET_N
    AA16
    RST_N_2
    D
    240;1%;0201
    R1103 B16 LPDDR4_B
    ZQ0
    R1101 240;1%;0201 C16 Y15
    ZQ1 [4] EBI1_CA_CS_0 CS0_B
    W15 AD3
    [4] EBI1_CA_CS_1 CS1_B DQ0_B EBI1_DQ_0 [4]

    E15 U14 AC3


    [4] EBI0_CA_CS_0 CS0_A NC_9 DQ1_B EBI1_DQ_1 [4]

    F15 A3 AB3
    [4] EBI0_CA_CS_1 CS1_A DQ0_A EBI0_DQ_0 [4] DQ2_B EBI1_DQ_2 [4]

    H14 B3 U16 AA3


    NC_7 DQ1_A EBI0_DQ_1 [4] [4] EBI1_CA_CK_T CLK_T_B DQ3_B EBI1_DQ_3 [4]

    C3 V16 AC7
    DQ2_A EBI0_DQ_2 [4] [4] EBI1_CA_CK_C CLK_C_B DQ4_B EBI1_DQ_4 [4]

    H16 D3 AB6
    [4] EBI0_CA_CK_T CLK_T_A DQ3_A EBI0_DQ_3 [4] DQ5_B EBI1_DQ_5 [4]

    G16 B7 Y16 AA7


    [4] EBI0_CA_CK_C CLK_C_A DQ4_A EBI0_DQ_4 [4] [4] EBI1_CA_CKE_0 CKE0_B DQ6_B EBI1_DQ_6 [4]

    C6 W16 AB8
    DQ5_A EBI0_DQ_5 [4] [4] EBI1_CA_CKE_1 CKE1_B DQ7_B EBI1_DQ_7 [4]

    E16 D7 T14 R5
    [4] EBI0_CA_CKE_0 CKE0_A DQ6_A EBI0_DQ_6 [4] NC_10 DQ8_B EBI1_DQ_8 [4]

    F16 C8 R6
    [4] EBI0_CA_CKE_1 CKE1_A DQ7_A EBI0_DQ_7 [4] DQ9_B EBI1_DQ_9 [4]

    J14 K5 T13 R3
    NC_8 DQ8_A EBI0_DQ_8 [4] [8,11,12,14,15] VREG_S8A NC_12 DQ10_B EBI1_DQ_10 [4]

    K6 T3
    DQ9_A EBI0_DQ_9 [4] DQ11_B EBI1_DQ_11 [4]

    J13 K3 AB9 T7
    [8,11,12,14,15] VREG_S8A NC_11 DQ10_A EBI0_DQ_10 [4] [4] EBI1_DQS_T_0 DQS0_T_B DQ12_B EBI1_DQ_12 [4]

    J3 R9 V3
    DQ11_A EBI0_DQ_11 [4] [4] EBI1_DQS_T_1 DQS1_T_B DQ13_B EBI1_DQ_13 [4]

    C9 J7 U6
    [4] EBI0_DQS_T_0 DQS0_T_A DQ12_A EBI0_DQ_12 [4] DQ14_B EBI1_DQ_14 [4]

    K9 G3 AA9 U8
    [4] EBI0_DQS_T_1 DQS1_T_A DQ13_A EBI0_DQ_13 [4] [4] EBI1_DQS_C_0 DQS0_C_B DQ15_B EBI1_DQ_15 [4]

    H6 T9
    DQ14_A EBI0_DQ_14 [4] [4] EBI1_DQS_C_1 DQS1_C_B
    D9 H8
    EBI0_DQ_15 [4]

    C [4]

    [4]
    EBI0_DQS_C_0

    EBI0_DQS_C_1
    J9
    DQS0_C_A

    DQS1_C_A
    DQ15_A

    [4] EBI1_CA_CA_0
    V14
    CA0_B
    C
    W13
    [4] EBI1_CA_CA_1 CA1_B
    G14 AB13
    [4] EBI0_CA_CA_0 CA0_A [4] EBI1_CA_CA_2 CA2_B
    F13 AA13
    [4] EBI0_CA_CA_1 CA1_A [4] EBI1_CA_CA_3 CA3_B
    C13 Y13
    [4] EBI0_CA_CA_2 CA2_A [4] EBI1_CA_CA_4 CA4_B
    D13 AB15
    [4] EBI0_CA_CA_3 CA3_A [4] EBI1_CA_CA_5 CA5_B
    E13
    [4] EBI0_CA_CA_4 CA4_A
    C15 AA5
    [4] EBI0_CA_CA_5 CA5_A [4] EBI1_DMI_0 DMI0_B
    U3
    [4] EBI1_DMI_1 DMI1_B
    D5
    [4] EBI0_DMI_0 DMI0_A
    H3
    [4] EBI0_DMI_1 DMI1_A

    Pls near to the memory


    U1101C

    MFG_NO

    EMMC_UFS_THERM [16]
    1

    NTC1101
    100K;1%;0201 EMMC
    2

    N9

    B RST_N_1
    B
    M9
    CMD

    R1105 0;0.5A;0201 P12


    [2] UFS_REF_CLK CLKM

    R1102
    M12
    [2] UFS_RESET DS

    0;0.5A;0201

    P16
    [2] UFS_RX_P DAT0
    M15
    [2] UFS_TX_M DAT1
    N13
    DAT2
    P15
    [2] UFS_RX_M DAT3

    [2] UFS_TX_P M16


    DAT4
    N14
    DAT5
    L14
    DAT6
    L13
    DAT7

    A A
    Title
    Page Name = 11_eMCP_uMCPREV: V10

    DOCUMENT NO.: Size Custom


    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 11 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    U1101F

    MFG_NO

    D U1101D D
    MFG_NO

    GND

    K13 D6
    VSSM_1 VSS_9
    PWR
    K14 D8
    C1235 VSSM_2 VSS_10
    2 1 L17 A4 [3,8,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8 K16 D14
    VDDI VDD1_1 VSSM_3 VSS_11

    1.0UF;20%;6.3V;0201 A9 L12 D15


    VDD1_2

    2
    C1218 VSSM_4 VSS_12
    C1216
    VREG_L24A_2P96 [15] M17 A15 2.2uF;20%;6.3V;0201 L15 E14
    VCC_1 VDD1_3 C1215 1.0UF;20%;6.3V;0201

    2
    VSSM_5 VSS_13

    1
    C1217
    N17 A16 L16 F14
    VCC_2 VDD1_4 2.2uF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 VSSM_6 VSS_14

    1
    C1203 P17 B15 M8 G4

    2
    C1241

    2
    C1242 VCC_3 VDD1_5 VSSM_7 VSS_15
    C1201 C1202 C1204 AC15 M13 G5
    0.1uF;20%;6.3V;0201 1.0UF;20%;6.3V;0201

    1
    2.2uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 VDD1_6 VSSM_8 VSS_16

    1
    2.2uF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201 J15 AD4 M14 G6
    VCCQ_1 VDD1_7 VSSM_9 VSS_17
    J16 AD9 N8 G13
    VCCQ_2 VDD1_8 VSSM_10 VSS_18
    J17 AD15 N12 G15
    VCCQ_3 VDD1_9 VSSM_11 VSS_19
    K15 AD16 N15 H4
    VCCQ_4 VDD1_10 VSSM_12 VSS_20

    VREG_L11A_1P8 [15] R13 N16 H7


    VCCQ_5 VSSM_13 VSS_21
    R14 A5 [8,11,14,15] VREG_S8A P13 H13
    VCCQ_6 VDD2_1 VSSM_14 VSS_22
    2

    C1208
    2

    C1207 T15 A8 P14 H15


    1.0UF;20%;6.3V;0201 C1205 C1206 VCCQ_7 VDD2_2 VSSM_15 VSS_23
    C1240
    1

    1.0UF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201


    1

    4.7uF;20%;6.3V;0402 T16 B9 R15 J6


    VCCQ_8 VDD2_3 VSSM_16 VSS_24
    B13 JP1201 R16 K4
    VDD2_4 1 L9 2 [14] RTM_VREG_S8A_P VSSM_17 VSS_25
    A6 B14 R17 K7
    VDDQ_1 VDD2_5 TOP;BOT VSSM_18 VSS_26

    C A7
    VDDQ_2 VDD2_6
    G7
    VSS_27
    K8
    C
    A13 G8 R4
    VDDQ_3 VDD2_7 VSS_28
    A14 G9 U13 R7
    VDDQ_4 VDD2_8 VSS_46 VSS_29

    2
    VREG_L6A_0P6 [4,9,11,12,15] B5 K2 C1226 C1228 C1221 U15 R8
    VDDQ_5 VDD2_9 C1225 C1227 C1233 VSS_47 VSS_30

    2
    4.7uF;20%;6.3V;0402 C1223
    H5 L7 10uF;20%;6.3V;0402 1.0UF;20%;6.3V;0201 V13 T6

    1
    C1232
    NF_10uF;20%;6.3V;0402
    VDDQ_6 VDD2_10

    2
    C1219 1.0UF;20%;6.3V;0201 VSS_48 VSS_31

    2
    4.7uF;20%;6.3V;0402

    1
    10uF;20%;6.3V;0402 10uF;20%;6.3V;0402 C1222

    2
    H9 L8 C1224 V15 U4
    1.0UF;20%;6.3V;0201
    2

    2
    VDDQ_7 VDD2_11 VSS_49 VSS_32

    1
    C1212 C1211 C1209 1.0UF;20%;6.3V;0201

    1
    1.0UF;20%;6.3V;0201
    C1229 C1214 C1213

    1
    J4 L9 W14 U7
    2.2uF;20%;6.3V;0201 VDDQ_8 VDD2_12 VSS_50 VSS_33
    1

    1
    2.2uF;20%;6.3V;0201
    10uF;20%;6.3V;0402
    1.0UF;20%;6.3V;0201 J5 P7 Y14 V4
    1.0UF;20%;6.3V;0201
    1.0UF;20%;6.3V;0201 VDDQ_9 VDD2_13 VSS_51 VSS_34
    J8 P8 AA14 V5
    VDDQ_10 VDD2_14 VSS_52 VSS_35
    T4 P9 JP1202 AA15 V6
    VDDQ_11 VDD2_15 1 L9 2 [14] RTM_VREG_S8A_M VSS_53 VSS_36
    T5 R2 AB14 AA4
    VDDQ_12 VDD2_16 TOP;BOT VSS_54 VSS_37
    T8 V7 B4 AA6
    VDDQ_13 VDD2_17 VSS_1 VSS_38
    U5 V8 B6 AA8
    VDDQ_14 VDD2_18 VSS_2 VSS_39
    U9 V9 B8 AB4
    VDDQ_15 VDD2_19 VSS_3 VSS_40
    AC5 AC9 U1101E C4 AB5
    VDDQ_16 VDD2_20 VSS_4 VSS_41
    MFG_NO
    AD6 AC13 C5 AB7
    VDDQ_17 VDD2_21 VSS_5 VSS_42
    AD7 AC14 C7 AC4
    VDDQ_18 VDD2_22 VSS_6 VSS_43
    AD13 AD5 C14 AC6
    VDDQ_19 VDD2_23 VSS_7 VSS_44
    AD14 AD8 D4 AC8
    VDDQ_20 VDD2_24 NC_DNU VSS_8 VSS_45

    M3 A1
    VSF1 DNU_1
    N3 A2
    VSF2 DNU_2
    M4 A17

    B N4
    VSF3

    VSF4
    DNU_3

    DNU_4
    A18 B
    M5 B1
    VSF5 DNU_5
    VREG_L6A_0P6 [4,9,11,12,15]
    N5 B18
    VSF6 DNU_6
    M6 AC1
    VSF7 DNU_7
    N6 AC18
    R1201 VSF8 DNU_8
    NF_240;1%;0201
    M7 AD1
    VSF9 DNU_9
    AD2
    DNU_10
    D16 AD17
    NC_1 DNU_11
    K17 AD18
    NC_2 DNU_12
    N7
    NC_3
    T17
    NC_4
    AB16
    2

    2
    C1236 C1237 NC_5
    AC16
    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 NC_6
    1

    A A
    Title REV: V10
    Page Name = 12_EMCP_POWER
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    eMCP_POWER Date: Page Modify Date = Wednesday, May 15, 2019Sheet 12 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D
    U1301D

    MFG_NO

    Shares input cap with VDD_S5 VREG1

    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] 48 58
    VDD_S1 VREG_S1 RMT_VREG_S1A_S2A_P [7]

    VREG_S1A is REMOTE diff sense,


    L1304
    C1321
    C1322 VREG_Sx & RMT_GND_Sx should be routed as a differential pair
    2

    10uF;20%;6.3V;0402 C1301
    59 VSW_S1 [7] VREG_S1A_S2A
    10uF;20%;6.3V;0402
    1.0UF;20%;6.3V;0201 VSW_S1_1
    Do not route VREG_Sx & RMT_GND_Sx near VIN_Sx
    1

    0.47UH;20%;2016
    71 60

    72
    GND_S1_1 VSW_S1_2
    Do not route VREG_Sx & RMT_GND_Sx near VSW_Sx unless separated by ground shield
    GND_S1_2
    46
    RMT_VREG_S1A_S2A_M [7]
    2

    RMT_GND_S1
    4/L8

    JP1301

    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] 108 70


    VDD_S2 VREG_S2

    Dual-phased buck VREG_S2A is REMOTE diff sense,


    2

    C1302
    L1303
    1.0UF;20%;6.3V;0201
    1

    95 VSW_S2
    VSW_S2_1
    0.47UH;20%;2016
    83 96
    GND_S2_1 VSW_S2_2
    Diff Pair back to PMIC
    84
    from load cap
    2

    GND_S2_2
    4/L8

    RMT_GND_S2
    82 VREG_Sx & RMT_GND_Sx should be routed as a differential pair
    JP1302

    C Do not route VREG_Sx & RMT_GND_Sx near VIN_Sx C


    120
    VDD_S3
    Do not route VREG_Sx & RMT_GND_Sx near VSW_Sx unless separated by ground shield
    142
    VREG_S3 RTM_VREG_S3A_S4A_P [8]

    L1302

    119 VSW_S3 [8] VREG_S3A_S4A


    VSW_S3_1
    0.47UH;20%;2016
    131 132
    GND_S3_1 VSW_S3_2
    143 144
    GND_S3_2 VSW_S3_3
    VREG_S3A is REMOTE diff sense,
    130
    VREG_Sx & RMT_GND_Sx should be routed as a differential pair
    RTM_VREG_S3A_S4A_M [8]
    Do not route VREG_Sx & RMT_GND_Sx near VIN_Sx
    2

    RMT_GND_S3
    4/L8

    JP1303 Do not route VREG_Sx & RMT_GND_Sx near VSW_Sx unless separated by ground shield
    139 118
    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75]
    VDD_S4 VREG_S4
    Dual-phased buck
    L1301
    C1303

    128 VSW_S4
    10uF;20%;6.3V;0402
    VSW_S4_1
    0.47UH;20%;2016
    Diff Pair back to PMIC VREG_S4A is REMOTE diff sense,
    129 140

    141
    GND_S4_1 VSW_S4_2
    from load cap VREG_Sx & RMT_GND_Sx should be routed as a differential pair
    Do not route VREG_Sx & RMT_GND_Sx near VIN_Sx
    2

    GND_S4_2
    4/L8

    117
    JP1304 RMT_GND_S4
    Do not route VREG_Sx & RMT_GND_Sx near VSW_Sx unless separated by ground shield

    B B

    Place Cin as close to PMIC as possible to achieve this requirement.

    Loop inductance from (VIN_Sx to Cin + Cin to GND_Sx) must be < 3nH
    Nicobar Power Grid v1.31 10/31/2018
    S1A-2A: FTS510 0.8V default 8000mA Ipeak 8110.00mA APC
    S3A-4A: FTS510 0.8V default 8000mA Ipeak 8480mA CX, MODEM
    S5A: HFS510 0.912V default 4000mA Ipeak 3620.00mA EBI, MX, nLDO
    S6A: HFS510 1.352V default 4000mA Ipeak 1560mA LDO
    S7A: HFS510 2.04V default 2500mA Ipeak 2350mA LDO
    S8A: FTS510 1.128V default 4000mA Ipeak 1790mA LDO, LPDDR4x

    A A
    Title REV: V10
    Page Name = 13_PM6125_Bucks_S1-S4
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    PM6125_Bucks_S1-S4 Date: Page Modify Date = Wednesday, May 15, 2019Sheet 13 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D

    U1301E

    MFG_NO

    Shares input cap with VDD_S1 VREG2

    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] 36 34
    VDD_S5 VREG_S5 VREG_S5A_SNS [7]

    L1404

    12 VSW_S5
    [7,9,15] VREG_S5A
    VSW_S5_1
    0.47UH;20%;2016
    11 24
    GND_S5_1 VSW_S5_2
    23 35
    GND_S5_2 VSW_S5_3

    2
    4/L8
    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75]
    JP1404
    25 52
    Note: Dedicated trace for connecting the sense(VREG_S6) from bulk caps on layout.
    [15,21] VREG_S6A
    VDD_S6 VREG_S6

    C1407
    C1406

    C
    C1409

    10uF;20%;6.3V;0402
    1
    VSW_S6_1
    13

    26 VSW_S6
    L1402 10uF;20%;6.3V;0402
    10uF;20%;6.3V;0402 C
    GND_S6_1 VSW_S6_2

    2
    0.47UH;20%;2016

    4/L8
    14
    GND_S6_2
    JP1405
    2
    4/L8

    JP1401
    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] 8 54 Note: Dedicated trace for connecting the sense(VREG_S7) from bulk caps on layout.
    [15,21] VREG_S7A
    VDD_S7 VREG_S7
    2

    C1401 C1405
    L1401 C1408 C1403
    1.0UF;20%;6.3V;0201 10uF;20%;6.3V;0402
    1

    7 VSW_S7 10uF;20%;6.3V;0402 NF_10uF;20%;6.3V;0402


    VSW_S7_1
    0.47UH;20%;2016
    6 19

    2
    4/L8
    GND_S7 VSW_S7_2

    JP1408
    2
    4/L8

    JP1402
    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] 3 28
    VDD_S8 VREG_S8 RTM_VREG_S8A_P [12]

    L1403
    2

    C1402
    4 VSW_S8
    [8,11,12,15] VREG_S8A
    1.0UF;20%;6.3V;0201 VSW_S8_1
    1

    0.47UH;20%;2016
    5 16
    GND_S8_1 VSW_S8_2
    17
    GND_S8_2
    29
    RTM_VREG_S8A_M [12]
    2

    RMT_GND_S8
    4/L8

    JP1403

    Load Caps are remote


    B B

    Route diff pair out from Cap back to


    Place Cin as close to PMIC as possible to achieve this requirement. appropriate pins at PMIC
    VREG_S8A is LOCAL diff sense,
    Loop inductance from (VIN_Sx to Cin + Cin to GND_Sx) must be < 3nH
    VREG_Sx & RMT_GND_Sx should be routed as a differential pair
    Do not route VREG_Sx & RMT_GND_Sx near VIN_Sx
    Do not route VREG_Sx & RMT_GND_Sx near VSW_Sx unless separated by ground shield

    A A
    Title REV: V10
    Page Name = 14_PM6125_Bucks_S5-S8
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    PM6125_Bucks_S5-S8 Date: Page Modify Date = Wednesday, May 15, 2019Sheet 14 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN LDO Input Rail Parent Buck Max Current A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT, VDD_L1_L7_L17_L18 VREG_S6 1.13
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED. VDD_L2_L3_L4 VREG_S8 0.816
    VDD_L5_L15_L19_L20_L21_L22 Ext Boost Byp 1.38
    VDD_L6_L8 VREG_S5 0.906
    D VREG_S6A [14,21]

    VDD_L9_L11 VREG_S7 1.01 D


    U1301F

    MFG_NO
    VDD_L10_L13_L14 VREG_S7 1.08
    VREG_S8A [8,11,12,14] VDD_L12_L16 VREG_S7 0.270
    VDD_L23_L24 Ext Boost Byp 1.161
    VREG3

    50 61 [60] VREG_L1A_1P2
    C1525 VDD_L1_L7_L17_L18 VREG_L1

    10uF;20%;6.3V;0402 63 [60] VREG_L2A_1P0


    VREG_L2
    27 64 [60] VREG_L3A_1P0
    VDD_L2_L3_L4_1 VREG_L3
    40 39 [9] VREG_L4A_0P928
    VDD_L2_L3_L4_2 VREG_L4
    113 [8,45] VREG_L5A_2P96
    VREG_L5

    VPH_PWR [13,14,16,18,19,20,21,37,40,42,43,44,62,67,75] 125 9 [4,9,11,12] VREG_L6A_0P6


    VDD_L5_L15_L19_L20_L21_L22 VREG_L6
    49 [9] VREG_L7A_0P928
    VREG_L7

    VREG_S5A [7,9,14] 20 33 [8] VREG_L8A_0P736


    VDD_L6_L8 VREG_L8
    43 [3,8,12,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8
    C1518 VREG_L9
    C1530
    10uF;20%;6.3V;0402 32 [40] VREG_L9_LVS
    NF_10uF;20%;6.3V;0402 VREG_L9_LVS

    VREG_S7A [14,21] 56 81 [7,8,9,16] VREG_L10A_1P8


    VDD_L9_L11 VREG_L10
    45 [12] VREG_L11A_1P8
    VREG_L11
    80 69 [3,41] VREG_L12A_1P8
    VDD_L10_L13_L14 VREG_L12
    105 [60] VREG_L13A_1P8
    VREG_L13
    68 93 [20] VREG_L14A_1P8
    VDD_L12_L16 VREG_L14_1
    94
    VREG_L14_2

    C 42
    VDD_L23_L24 VREG_L15
    114 [9] VREG_L15A_3P104
    C
    57 [9,77,79] VREG_L16A_1P8
    VREG_L16
    38 [9,77] VREG_L17A_1P304
    VREG_L17
    37
    Note: Place LDO input caps near to PMIC VREG_L18
    126
    [8,9]

    [8,45]
    VREG_L18A_1P232

    VREG_L19A_1P8
    VREG_L19
    138 [8,45] VREG_L20A_1P8
    VREG_L20
    136 [67] VREG_L21A_2P704
    VREG_L21

    137 [45] VREG_L22A_2P96


    VREG_L22
    41 [77,78] VREG_L23A_3P304
    VREG_L23
    31 [12] VREG_L24A_2P96
    VREG_L24

    C1531

    2
    C1533
    C1501 C1502
    10uF;20%;6.3V;0402
    C1529 C1528 C1532

    2
    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 C1504 C1519

    2
    1

    1
    C1515 C1516 C1517 C1511 C1512
    2.2uF;20%;6.3V;0201 2.2uF;20%;6.3V;0201 10uF;20%;6.3V;0402 2.2uF;20%;6.3V;0201 NF_4.7uF;20%;6.3V;0402
    10uF;20%;6.3V;0402

    1
    1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201

    1
    1.0UF;20%;6.3V;0201
    NF_10uF;20%;6.3V;0402 10uF;20%;6.3V;0402

    Nicobar Power Grid v1.31 11/12/2018


    B 1.0uF B
    LDO Type Source V_default (est) Target Pin#
    L1 N600 S6A 1.2V (625) QLN,SDR 1,2 61
    L2 N300 S8A 1V (320) SDR VDD 1.0V 63
    L3 N600 S8A 1V (370) SDR VDD 1.0V 64
    L4 N300 S8A 0.928V (126) QLINK, EBI, MIPI 39
    L5 MVP50 VPH 2.96V (22) PX 113
    L6 N1200 S5A 0.624V (1040) VDDQ, EBI 9
    L7 N600
    L8 N300
    S6A 0.928V (54.2) USB 49
    S5A 0.664V (81) CX 33
    2.2uF
    L9 LVP600 S7A 1.8V (754) Sensors, WCD, TMD, PMI_MSM, QET 43
    L10 LVP150 S7A 1.8V (100) QFPROM, USB,UFS, PX 81
    L11 LVP600 S7A 1.8V (925) EMMC/VCCQ 45
    L12 LVP300 S7A 1.8V (121) OV. USB_REDRIVER 69
    L13 LVP300 S7A 1.8V (204) QPM 1.8V, BBRX, GPS 105
    L14 LVP600 S7A 1.8V (650) WCD Buck 94,93
    L15 MVP150 VPH 3.128V (5.28) USB 3.1V, DP PHY 114
    L16 LVP150 S7A 1.8V (92.5) WCSS, WCN_XO 93
    L17 N300 S6A 1.304V (246) WCN, WCSS ADX DAC 38
    L18 N300 S6A 1.232V (133) MIPI, VDDPX 37
    L19 MVP150 VPH/BB 1.8V (60.2) Memory, SN100, PX 126
    L20 MVP150 VPH/BB 1.8V (60.2) Memory, SN100, PX 138
    A L21 MVP600 VPH/BB 2.704V (0.68) QAT, DFE, RTC,QSW 136 A
    L22 MVP600 VPH/BB 2.96V (800) MMC 137
    LDO L5/L9/L10/L11/L12/L13/L14/L15/L16/L19/L20/L21/L22/L23/L24 is the Pseudo-capless LDO, so can dni CAP in BOM
    L23 MVP600 VPH/BB 3.304V (591) WCN 3.3V 41 PSEUDO CAPLESS LDOs Title Page Name = 15_PM6125_LDOSREV: V10

    L24 MVP600 VPH/BB 2.96V (1170) EMMC 31 P-type are psuedo-capless, cap can be at load DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    For CAPLESS LDOs: If decaps on the load side do not DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    PM6125_LDOs add up to LDO spec, then install the cap close to the PMIC
    Date: Page Modify Date = Wednesday, May 15, 2019
    Sheet 15 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    AVDD_BYP should be routed


    D Layout Note:
    No trace shall be present in at-least two immediate layers below XTAL. away from noisy traces D

    Trace from pin to cap and ONE dedicated via from cap to main ground plane. U1301B

    Route XTAL IN/OUT trace with DCR < 200mOhm and ESL < 10nH MFG_NO

    length between 3mm and 10mm Do NOT connect to any other ground.
    PM_AVDD_BYP

    2
    C1602
    53
    1.0UF;20%;6.3V;0201 CMN_GND_1

    2 1
    4/L8
    65
    CMN_GND_2
    Y1601 JP1601 66
    CMN_GND_3
    [16] XO_THERM 4 THERMISTOR 3 67
    XTAL2 CMN_GND_4

    U1301A 78
    CMN_GND_5
    MFG_NO 79
    1 XTAL1 CMN_GND_6

    2
    2 C1601
    GND_XOADC [16] 90
    GND/THERMISTOR
    XTAL_X1E000401000400 1.0UF;20%;6.3V;0201 CMN_GND_7

    1
    133 HK 73
    XTAL_IN_1 AVDD_BYP
    134 74
    XTAL_IN_2 DVDD_BYP TEST_EN_VPP must be grounded in all chipset level
    121
    XTAL_OUT TEST_EN_VPP
    2 and customer-facing HW schematics.
    102 [13,14,15,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR
    VPH_PWR
    77 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8
    VIO_IN
    116 135
    [17] SYS_OK CBL_PWR_N VCOIN If RTC support is not needed when the battery is removed, a backup capacitor can be used on the VCOIN pin.
    C [17,46] KYPDPWR_N
    115
    KPD_PWR_N A ceramic capacitor with an effective capacitance of 10uF can support SMPL for up to 1 second. C
    92 87
    [2,17] PON_RESET_N PON_RESET_N VIO_OUT

    [2] PS_HOLD
    127
    PS_HOLD C1606
    If you use embedded battery ,can remove these capcitors
    103 62 [7,8] VREF_MSM 10uF;20%;6.3V;0402
    [46] RESIN_N RESIN_N VREF_MSM
    107
    [17] FAULT_N FAULT_N C1610
    51
    VREF_LPDDR3 C1613
    0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201

    If USB the LPDDR3 need this VREF voltage, LPDDR4 don't need it.
    104 55
    [2,17] PMIC_SPMI_CLK SPMI_CLK SLEEP_CLK SLEEP_CLK [2,77]

    91
    [2,17] PMIC_SPMI_DATA SPMI_DATA

    C1604
    109
    VREG_RF_CLK JP1602
    VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] 111 110 10uF;20%;6.3V;0402 2 [8,17] VIO_OUT
    VDD_LDO_XO_RF GND_RF

    4/L8

    123
    VREG_XO C1608
    R1601 0;0.5A;0201 100 122 10uF;20%;6.3V;0402
    [58] RF_CLK1 RF_CLK1 GND_XO

    2
    C1603
    R1603 0;0.5A;0201 88
    [77] RF_CLK2 RF_CLK2 1.0UF;20%;6.3V;0201

    1
    101 [7,8,9,15] VREG_L10A_1P8 U1301C
    VREG_BB
    MFG_NO

    R1605 0;0.5A;0201 112 75


    [2] LN_BB_CLK1 LN_BB_CLK1 REF_BYP
    C1611
    R1604

    2
    4/L8
    0;0.5A;0201 89 76
    [6] WLAN_XO_CLK LN_BB_CLK2 REF_GND
    C1607
    15pF;10%;50V;0201 99 0.1uF;20%;6.3V;0201 JP1603 UI
    LN_BB_CLK3 C1609
    0.1uF;20%;6.3V;0201 44
    C1612 GPIO_01

    2
    4/L8
    22pF;30%;50V;0201
    B AMUX_1
    86
    PA_THERM0 [67]
    JP1604
    30
    GPIO_02 B
    97 98 15
    XO_THERM AMUX_2 QUIET_THERM [2] [3] BOARD_ID3 GPIO_03
    R1606
    85 124 47
    GND_XOADC OPTION GPIO_04

    75K;1%;0201 21
    [46] KYPD_VOLP_N

    2
    GPIO_05

    4/L8
    XO_THERM 106
    [16] XO_THERM [11] EMMC_UFS_THERM GPIO_06
    JP1605
    10
    [3] BOARD_ID2 GPIO_07
    22
    GPIO_08
    C1605
    1000pF;10%;25V;0201 18
    GPIO_09

    [16] GND_XOADC
    2
    4/L8

    JP1606

    Placement/Layout Note:
    VREG_RF Cout should be placed close to the PMIC
    Can be prioritized over VREG_XO Cout placement GND_XOADC
    Short dedicated route to VREG_RF/XO cap Critical Layout Guidelines for VREF_RF (go/PmicLayoutChecklist)
    Skinny trace to XTAL components ground.
    Dedicated via directly to main ground plane at the capacitor One dedicated via to main ground place as close to PMIC pin as possible
    Preferred: Short, dedicated route to VREG_RF cap,
    Dedicated trace from REF_BYP to cap. away from noisy signals and dedicated via to main ground plane at cap or PMIC pin.
    Dedicated trace from REF_GND to cap.
    Dedicated via to main ground plane right under PMIC pin (REF_GND) Acceptable: Dedicated via directly to main ground plane at the GND_CLKSXO pin
    or as close to the pin as possible. Critical Layout Guidelines for Clocks (go/PmicLayoutChecklist) and at VREG_RF cap (without routing to cap).
    REF_BYP and REF_GND
    Do NOT add via at cap. should be Coupling to any RFCLK or LNBBCLK output from each aggressor should be < 50 fF.
    routed away from noisy traces 1. SMPS components (Buck, Boost, Charger) Do NOT connect to any other ground.
    SPMI_CLK & SPMI_DATA should be routed away from noisy traces 2. VSW_Sx traces (Buck, Boost, Charger)
    A Route signals as a diff pair as much as possible 3. All other RFCLK, LNBBCLK
    4. Any high speed digital signal
    Loop DCR must be <1000 m?. A
    Loop inductance must be <3 nH.
    5. Any other noisy signals
    Title REV: V10
    Page Name = 16_PM6125_HK_IO
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    PM6125_HK/IO Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 16 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D
    AVDD_BYP should be routed
    U1701A
    away from noisy traces
    MFG_NO

    BLOCKID
    Trace from pin to cap and ONE dedicated via from cap to main ground plane.
    PON DCR < 200mOhm and ESL < 10nH
    VIO_OUT [8,16] 35
    VDD_MSM_IO AVDD_BYP
    63 2
    C1701
    1 Do NOT connect to any other ground.
    1.0UF;20%;6.3V;0201

    2
    4/L8
    2
    [16,46] KYPDPWR_N KYPDPWR_N JP1702
    54
    REF_BYP
    53
    REF_GND
    45 C1702
    [2,16] PON_RESET_N PS_HOLD
    TP1701 0.1uF;20%;6.3V;0201
    1

    44 3
    [16] FAULT_N FAULT_N SYS_OK
    Dedicated trace from REF_BYP to cap.

    2
    4/L8
    [2,16] PMIC_SPMI_CLK
    43
    SPMI_CLK JP1701
    Dedicated trace from REF_GND to cap.
    [2,16] PMIC_SPMI_DATA
    34
    SPMI_DATA
    REF_BYP via
    Dedicated andtoREF_GND
    main groundshould
    planebe
    right under PMIC pin (REF_GND)
    R1701
    routed
    or awaytofrom
    as close noisy
    the pin astraces
    possible.
    52
    OPTION
    Do NOT add via at cap.
    1M;5%;0201

    C 24
    TEST_EN_VPP C
    SYS_OK [16]

    31
    NC2_TST R1702
    [3,8,12,15,16,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8

    NF_100K;1%;0201

    CHARGER_SKIN_THERM [17]
    1

    NTC1102
    100K;1%;0201
    2

    U1701C
    U1701B

    MFG_NO
    MFG_NO

    BLOCKID
    BLOCKID

    CGND
    GPIO

    25
    70 CMN_GND_0
    GPIO1

    B 79
    GPIO2
    33
    CMN_GND_1 B
    42
    69 CMN_GND_2
    [17] CHARGER_SKIN_THERM GPIO3
    51
    78 CMN_GND_3
    GPIO4
    59
    62 CMN_GND_4
    GPIO5
    60
    61 CMN_GND_5
    GPIO6
    68
    GPIO7
    77
    GPIO8

    GPIO# GPIO Function


    A GPIO1 (LV) FMB1 (Output mode) / TypeC_CONN_THERM_SNS / MSM/eMMC THERM A
    GPIO2 (MV) SMB_EN / HRLED / (SINK required ?Fixed 10mA)
    GPIO3_AMUX Skin_Therm_Sns / FLASH_THERM_SNS Title REV: V10
    Page Name = 17_PMI632_CONTROL
    GPIO4 (LV) I2C_IRQ (Output) / TypeC_CONN_THERM_SNS / FMB2 (Output) DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    GPIO5_AMUX (MV) SMB_THERM_SNS / Flash_Strobe / USB_ID DEPARTMENT: DESIGNER:


    DESIGNER = zhanglieqiang

    GPIO6 (LV) WLED_EN


    PMI632_Control GPIO7_AMUX (LV) SMB_VCHG_P Date: Page Modify Date = Wednesday, May 15, 2019Sheet 17 of 53

    8 GPIO8_AMUX 7 (LV) FMB2 (Output) / SMB_VHG_M


    6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D

    U1701E

    MFG_NO

    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75]
    BLOCKID

    LCDB

    2
    C1801

    1.0UF;20%;6.3V;0201 6 36

    1
    VDD_DISP VDISP_P_OUT
    9
    NC1_VDISP_P_OUT

    2
    4/L8
    JP1801

    26
    VSW_DISP
    8
    VDISP_M_OUT

    18
    VDISP_MID
    16
    GND_DISP_M

    15
    DISP_HW_EN

    17
    VDISP_CAP1

    C 27
    PGND_DISP C
    7
    VDISP_CAP2

    Layout Note:VDISP_CAPx
    Place fly cap as close to the pin as possible.
    Avoid routing VDISP_CAP1 trace under VDISP_M_OUT.
    Layout Note:DISP_HW_EN
    This signal is used for "Display Tap to Wake"
    If unused in HW, this pin should be connected to GND

    VMID_USB_IN [19]

    NOTE: U1701F

    C2404 can use the 25V capacitor too, C1805


    MFG_NO

    just for the BOM category normalized 2.2uF;20%;16V;0402


    2
    4/L8

    BLOCKID
    JP1805
    UI

    81 72 [42] FLASH_LED1

    B VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] 23
    VIN_FLASH_1

    PVDD
    F_LED1

    F_LED2
    80 B
    2

    C1803

    1.0UF;20%;6.3V;0201 71 13
    1

    [42] RED_LED
    VIN_FLASH_0 RGB_RED
    2
    4/L8

    4
    RGB_GRN
    JP1806 14
    RGB_BLU

    5 [37] VIB_DRV_LDO_P
    VIB_DRV_LDO_P
    2

    C1802

    1.0UF;20%;6.3V;0201
    1
    2
    4/L8

    JP1807

    A A
    Title REV: V10
    Page Name = 18_PMI632_LCD_VIB_RGB_Flash
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    PMI632_LCD/VIB/RGB/Flash Date: Page Modify Date = Wednesday, May 15, 2019Sheet 18 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    VMID_USB_IN

    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED. NOTE:
    Use C1902= 2.2uF for paraller Charging Config
    Use C1902= 4.7uF for only PMI Charging Config

    VBUS_USB_IN [48]

    D C1909
    C1910 D
    C1902 U1701D
    100pF;30%;50V;0201
    NOTE: 4.7UF;10%;35V;06030.1uF;20%;25V;0201 MFG_NO [18] VMID_USB_IN

    C1902 can use the 25V capacitor too,


    2

    just for the BOM category normalized


    4/L8

    BLOCKID
    C1903
    JP1901
    CHARGER Place mid cap close to pin 4.7UF;10%;35V;0603

    1 19
    USB_IN_0 USB_IN_MID_0
    10 20
    USB_IN_1 USB_IN_MID_1
    11 21
    USB_IN_2 USB_IN_MID_2

    [3] USB_PHY _PS

    C1901
    41 40
    CC_OUT BOOT_CAP
    46 0.027uF;20%;16V;0201
    [47,48] USB_ID CC1_ID
    47
    [47,48] USB_CC2 CC2
    28
    VSW_CHG_0
    C1911 C1912
    220PF;10%;25V;0201 220PF;10%;25V;0201 29 L1901
    VSW_CHG_1
    30 VSW_CHG
    [13,14,15,16,18,20,21,37,40,42,43,44,62,67,75] VPH_PWR
    VSW_CHG_2
    1.0UH;20%;2520
    R1901 2 1 1K;5%;0201 49
    [2,47,48] USB0_HS_DP USB_DP
    R1902 2 1 1K;5%;0201 58
    [2,47,48] USB0_HS_DM USB_DM

    1
    D1901
    37 C1905 C1907
    PGND_CHG_0
    10uF;20%;6.3V;0402 10uF;20%;6.3V;0402
    38

    2
    PGND_CHG_1 ESD56201D04

    74 39
    [36] VBATT_VSNS_P VBATT_SNS_P PGND_CHG_2

    C Layout Note:
    PACK_SNS_M should have a dedicated route
    [36] VBATT_VSNS_M
    75
    PACK_SNS_M C
    NOTE:
    to battery connector negative sense VPH_PWR_0
    55

    recommand to use battery NTC values 100K, B=4250 [36] BATT_THERM


    76
    BAT_THERM VPH_PWR_1
    56

    67 57
    [36] BATT_ID BAT_ID VPH_PWR_2

    50
    GND_CHG
    48
    REF_GND_CHG
    64 [36,47] VBATT
    VBATT_PWR_0
    65
    2

    VBATT_PWR_1
    4/L8

    4/L8

    66
    JP4105 JP1902 VBATT_PWR_2 C1906
    73
    VBATT_PWR_3 10uF;20%;6.3V;0402

    NOTE:
    BOOT_PWR net is 5VDC,cap is 0603. Do not use 0402 as may derate to -80%.
    32
    VARB

    22 BOOT_PWR
    BOOT_PWR
    CAD NOTE: C1908
    0.1uF;20%;6.3V;0201

    Dedicated VIA to Main GND 12


    2

    GND_PSUB_CHG C1904
    4/L8

    4.7uF;10%;10V;0603

    JP1904
    CAD NOTE:
    Dedicated VIA to Main GND
    2
    4/L8

    B JP1903 B

    A A
    Title REV: V10
    Page Name = 19_PMI632_Charger_PD PHY
    DOCUMENT NO.: Size E
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    PMI632_Charger/PD PHY Date: Page Modif y Date = Wednesday , May 15, 2019
    Sheet 19 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.
    U2001

    MFG_NO
    C2016
    [20] WCD_BUCK_FLYB_GND

    D PRELIMINARY 4.7uF;20%;6.3V;0402
    D
    39 35 [15] VREG_L14A_1P8
    [3] WCD_RESET_N RESET_N VDD_BUCK
    11
    VDD_CX
    37 5
    I2C_CLK VDD_EFUSE_BLOW
    31 4 [13,14,15,16,18,19,21,37,40,42,43,44,62,67,75] VPH_PWR
    I2C_DATA VDD_MIC_BIAS
    1 [3,8,12,15,16,17,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8
    C2001 VDD_PX

    2
    2 1 7 33 C2004
    CCOMP VDD_TXRX 1.0UF;20%;6.3V;0201 C2012 C2015

    2
    4/L8

    1
    17 Star route from VREG_L9A_1P8 to VDD_PX and VDD_TXRX.
    1.0UF;20%;6.3V;0201 0.22uF;20%;6.3V;02010.1uF;20%;6.3V;0201
    JP2001 CCOMP_REF C2021
    0.1uF;20%;6.3V;0201

    2
    4/L8
    47
    AUX_OUT_M

    2
    4/L8
    C2009 3
    100pF;30%;50V;0201 51 JP2008
    [38] AMIC1_INP AMIC1_INP AUX_OUT_P
    9 JP2005
    [38] AMIC1_INM AMIC1_INM
    C2006 19 41
    [39] AMIC2_INP
    100pF;30%;50V;0201
    AMIC2_INP EAR_OUT_M EAR_OUT_M [37]

    14 46
    [39] AMIC2_INM AMIC2_INM EAR_OUT_P EAR_OUT_P [37]

    C2007 8 L2003
    [38] AMIC3_INP
    100pF;30%;50V;0201
    AMIC3_INP
    13 30 BUCK_VSW L2001
    [38] AMIC3_INM AMIC3_INM BUCK_VSW
    1000OHM;600mA;0603
    18 34 [20] PA_VPOS
    AMIC4_INP BUCK_OUT
    R2001 R2005 120ohm;350mA;0402
    23
    0;0.5A;02010;0.5A;0201
    JP4106
    AMIC4_INM

    2
    2 C2003
    C2014
    16 1.0UF;20%;6.3V;0201 0.47UF;20%;6.3V;0201

    1
    [3] SWR_RX_CLK 4/L8 CDC_PDM_CLK
    [20] WCD_BUCK_FLYB_GND

    2
    4/L8
    12
    [3] SWR_TX_DATA0 CDC_PDM_TX
    6 JP2006
    [3] SWR_RX_DATA0 CDC_PDM_RX0
    26 L2004
    CDC_PDM_RX0_COMP
    C [3] SWR_RX_DATA1
    22
    CDC_PDM_RX1
    1000OHM;600mA;0603
    [20] WCD_BUCK_FLYB_GND
    C
    36 L2002
    CDC_PDM_RX1_COMP FLYB_VSW
    27 [20] PA_VNEG
    [3] SWR_TX_DATA1 CDC_PDM_RX2
    120ohm;350mA;0402
    32 45
    [3] SWR_TX_CLK CDC_PDM_SYNC FLYB_VSW
    50
    FLYB_VNEG_OUT_CLSH C2017

    2
    C2002
    53 54 FLYB_VNEG_DAC 0.47UF;20%;6.3V;0201
    [39] HPH_L HPH_L FLYB_VNEG_OUT_DAC 1.0UF;20%;6.3V;0201

    2
    4/L8
    1
    48
    [39] HPH_R HPH_R JP2007
    38 55 C2011
    [39] HPH_REF HPH_REF CRN_VNEG_OUT_DAC 0.47UF;20%;6.3V;0201
    [20] WCD_BUCK_FLYB_GND
    C2005
    C2019
    680pF;20%;25V;0201 2
    680pF;20%;25V;0201
    INTR1
    C2013
    470pF;20%;50V;0201 C2023
    0.1uF;20%;6.3V;0201
    10
    LDO_H

    2
    4/L8
    JP2012
    28
    MBHC_HSDET_G
    44
    [39] HSDET_L MBHC_HSDET_L

    MIC_BIAS1 [48] 15
    MIC_BIAS1
    MIC_BIAS2 [39] 24
    MIC_BIAS2
    MIC_BIAS3 [38] 25
    MIC_BIAS3
    JP2002
    C2024 C2022 2 20
    0.1uF;20%;6.3V;0201
    C2018
    0.1uF;20%;6.3V;0201
    MICB_CFILT_REF WCD_GND_A
    0.1uF;20%;6.3V;0201 52
    4/L8
    GND_A
    B R2002 0;0.5A;0201 42
    MODE GND_BUCK
    40
    WCD_BUCK_FLYB_GND [20] B
    21
    GND_D
    49 29

    2
    PA_VNEG GND_RXTX_SRGR

    4/L8

    4/L8
    [20] PA_VNEG

    43 JP2004
    [20] PA_VPOS PA_VPOS JP2003

    A A
    Title REV: V10
    Page Name = 20_WCD9370
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    WCD9370 Date: Page Modify Date = Wednesday, May 15, 2019Sheet 20 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    D D
    LDO for CAM1_2_DVDD_1P2

    800mA LDO for Rear Camera (CAM0_DVDD_1P1)


    [14,15,21] VREG_S7A
    U2103

    C2104 20mil 4 1 20mil 300mA 1.8V


    IN OUT CAM1_2_DVDD_1P2 [41]
    U2106 1.0uF;20%;6.3V;0201
    2
    [14,15] VREG_S6A 4 1 CAM0_DVDD_1P1 [41] 3 GND1 5
    VIN VOUT [3] CAM1_2_DVDD_EN EN GND2 C2105

    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR 2 TP2101 1.0UF;20%;6.3V;0201


    BIAS
    1 SGM2036-1.2YUDH4G/TR
    3 5
    [3] CAM0_DVDD_EN CONTROL GND
    C2112
    LDO-TCR8BM11A
    2.2uF;20%;6.3V;0201
    C2111
    1.0uF;20%;6.3V;0201
    C2113
    GND GND
    0.1uF;20%;6.3V;0201

    LDO for CAM1_2_DVDD_1P05


    GND

    GND

    [14,15,21] VREG_S7A
    U2108

    C2116 20mil 4 1 20mil 300mA 1.8V


    IN OUT CAM1_2_DVDD_1P05 [41]
    1.0uF;20%;6.3V;0201
    2
    3 GND1 5
    [3] IR_LED_EN EN GND2

    C
    C2117

    TP4731
    SGM2036-1.05YUDH4G/TR
    1.0UF;20%;6.3V;0201 C
    1

    LDO for Rear Camera (VCAMA_EXT)


    2.9V
    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR

    LDO for CAM1_2_3_AVDD_2P8


    U2101

    C2106 4 1
    IN OUT CAM0_AVDD_2P9 [41]
    1.0uF;20%;6.3V;0201
    2
    3 GND1 5
    [3] CAM0_AVDD_EN EN GND2 C2103

    SGM2031-2.8YUDH4G/TR 1.0UF;20%;6.3V;0201

    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR
    U2104

    C2107 4 1
    IN OUT CAM1_2_3_AVDD_2P8 [41]
    1.0uF;20%;6.3V;0201
    2
    3 GND1 5
    [3] CAM1_2_3_AVDD_EN EN GND2 C2108

    SGM2031-2.8YUDH4G/TR 1.0UF;20%;6.3V;0201
    TP2104
    1
    LDO for Rear Camera (VCAMA_EXT)
    B 1.8V B

    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR
    U2107
    C2114 4 1
    IN OUT CAM0_AVDD_1P8 [41]
    1.0uF;20%;6.3V;0201
    2
    3 GND1 5
    [3] CAM0_AVDD_EN2 EN GND2 C2115
    SGM2036-1.8YUDH4G/TR 1.0UF;20%;6.3V;0201

    LDO for CAM_AF_2P8兼容TP2.8V

    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR
    U2105

    C2109 4 1
    IN OUT CAM_AF_2P8 [41]
    1.0uF;20%;6.3V;0201
    2
    3 GND1 5
    [3] CAM_AFVDD_EN EN GND2 C2110
    TP2105
    SGM2031-2.8YUDH4G/TR 1.0UF;20%;6.3V;0201
    1

    A A
    Title
    Page Name = 21_CAM eLDOsREV: V10

    DOCUMENT NO.: Size Custom


    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    CAM eLDOs Date: Page Modify Date = Wednesday, May 15, 2019Sheet 21 of 53

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    5 4 3 2 1

    BATTERY
    D D

    CONNECTOR

    SG3603
    2 1
    VBATT_VSNS_P [19]
    L1

    C C

    VBATT [19,47]

    2
    J3601
    D3604

    N2
    D3602

    1
    [47] BATT_ID_CON ESD5651N-2/TR C3603 C3601 C3602
    1 16
    2 POWER/GND 15

    N1
    [47] BATT_THERM_CON
    3 14 0.1uF;20%;6.3V;0201

    2
    10uF;20%;6.3V;0402
    ESD56201D04 33pf;30%;50V;0201

    1
    SDA
    [19] BATT_THERM R3607 1 21K;5%;0201 4 13
    R3608 1 2100;5%;0201 5 12
    [19] BATT_ID
    SG3710
    SCL
    6 11 2 1 GND
    7 10 VBATT_VSNS_M [19]
    8 POWER/GND 9 L1
    2

    D3603 D3601
    N2

    N2

    ESD5651N-2/TR ESD5651N-2/TR BM25-4S/2-V(51)


    N1

    N1
    1

    B B

    A A

    Title
    Page Name = 36_Battery/USBREV:
    IF V10

    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605


    Size D

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 36 of 53

    5 4 3 2 1
    5 4 3 2 1

    Receiver D

    XM-217-XC-173 J3704
    4-00-45979

    Close to BB Close to connector REC_N 1

    SPK
    2

    6mil 6mil R3702 0;1A;0402 J3705


    [20] EAR_OUT_M 4-00-45979

    C3701
    R3703 100pF;30%;50V;0201
    6mil 6mil 0;1A;0402 REC_P 1
    [20] EAR_OUT_P
    2
    D3701
    C3702 C3705 LESD8D5.0CT5G

    1
    1
    D3702

    N1
    N1
    VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] 33pf;30%;50V;0201 33pf;30%;50V;0201 LESD8D5.0CT5G
    [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8

    N2
    N2
    C3706
    1.0UF;20%;6.3V;0201

    2
    2

    2 2
    TP3701 TP3702

    2
    R3707 U3701
    10K;1%;0201
    1

    C3715
    [37] GND_SPK C2 1.0UF;20%;6.3V;0201
    ADDR2 JP3702 JP3703
    F3
    DVDD 4/L8 4/L8
    E5 JP3704 JP3701
    ADDR1 L3702
    D1 4/L8 4/L8
    VREFC
    [3] SPK_SCL E4
    SCL SW
    A1 VPH_PWR [13,14,15,16,18,19,20,21,40,42,43,44,62,67,75]
    LX1
    [3] SPK_SDA F4 A2
    SDA LX2 1.0UH;20%;2016 33pf;30%;50V;0201
    C
    LX3
    B1
    0.1uF;20%;10V;0201 Connecting the GNDs together and C
    E6 B2
    [3] INT_SMARTPA IRQ LX4 C3716
    10uF;10%;10V;0603
    then to main GND through signle via
    R3709 0;0.5A;0201 E1 C3717
    [3] I2S1_SCK BCLK C3707
    C1 GND_SPK [37]
    VBAT
    R3706 0;0.5A;0201 F2
    [3] I2S1_WS LRCLK
    R3705 0;0.5A;0201 D2 VBST
    [3] I2S1_DATA0 DIN
    C3710
    10K;1%;0201 R3713 C3709
    F5 A4 C3714 0.1uF;20%;25V;0201
    ICC/PDMTXCLK PVDD1
    10uF;20%;16V;0603
    F1 B4
    MCLK/PDMRXCLK PVDD2 10uF;20%;16V;0603
    R3708 0;0.5A;0201 E2 B5 GND_SPK [37]
    [3] I2S1_DATA1 DOUT/PDMTXDAT PVDD3
    E3
    WDT/PDMRXDAT
    D6 OUT- B3701
    OUTN2 OUT+ 1 2 0;1A;0603
    A6 32mil SPK_P [48]
    OUTP2 1 2 0;1A;0603
    D5 32mil
    SPK_N [48]
    OUTN1
    A5
    OUTP1 B3702
    F6 B6 SPK_VSENS_P [48]
    [3] AUDIO_PA_RST RESET VSNSP
    C6 SPK_VSENS_N [48]
    PGND1
    PGND2
    PGND3
    PGND4
    PGND5

    VSNSN
    GND1
    GND2

    R3710
    47K;5%;0201 C3711 C3712

    MAX98937
    A3
    B3
    C3
    C4
    C5

    D3
    D4

    33pf;30%;50V;0201 33pf;30%;50V;0201

    XM-217-XC-173

    [37] GND_SPK

    VIB
    2

    J3702
    SG3711 4-00-45979
    4/L10
    L3701
    15mil 75ohm 15mil 1
    [18] VIB_DRV_LDO_P

    1
    B
    2 B
    D3703
    C3703
    C3704 RB521CS-30 J3703
    100pF;30%;50V;0201 4-00-45979
    33pf;30%;50V;0201

    2
    1

    2
    SG3701
    4/L10

    A A

    Title REV: V10


    Page Name = 37_SPK/Receiver/Vibrator
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 37 of 53

    5 4 3 2 1
    5 4 3 2 1

    D Handset 2nd Microphone (Rear - DMNR), AMIC D

    0;0.5A;0201 R3802
    MIC_BIAS3 [20]

    C3809

    MAIN MIC
    C3803
    33pf;30%;50V;0201 0.1uF;20%;6.3V;0201

    2
    JP3801
    4/L8

    R3803
    U3801
    R3806 Close to MIC Close to BB
    1 3
    POWER OUTPUT AMIC3_INP [20]
    [48] AMIC1_INP_CON AMIC1_INP [20] 4 0;0.5A;0201 C3816
    CASE_GND
    C3813 0;0.5A;0201 2 100pF;30%;50V;0201
    SIGNAL_GND
    100pF;30%;50V;0201
    R3807
    MIC-S15OB381-066 AMIC3_INM [20]

    1
    C C
    AMIC1_INM [20] D3801
    [48] AMIC1_INM_CON

    N1
    NF_LESD8D5.0CT5G
    0;0.5A;0201
    R3804
    C3811 NF_0;0.5A;0201
    C3802

    N2
    68pF;2%;50V;0201 C3808
    68pF;2%;50V;0201 C3805
    33pf;30%;50V;0201

    2
    JP4808 33pf;30%;50V;0201
    2

    4/L8

    2
    D_GND

    2
    JP3806
    4/L8 D_GND
    JP3802
    4/L8 JP3803
    4/L8

    Schematic design notice of "63_PERI_AUDIO_IO" page.

    B Note 63-1: 1 uF for ACC mode B

    A A

    Title Page Name = 38_MIC REV: V10

    DOCUMENT NO.: Size


    Design Name = S88512AA1_1_21_20190515_1605 C

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 38 of 53
    5 4 3 2 1
    5 4 3 2 1

    D D

    Note: Ferrite beads and their corresponding bypass capacitors on


    on CDC_HPH_L_P, CDC_HPH_L_M and CDC_HPH_REF
    are needed to reduce noise generated by audio/FM concurrency

    R3914 10K;5%;0201 [20] HSDET_L

    AUDIO JACK

    J3901
    2
    3 R3901 10;5%;0402
    MIC+ / GND B3901 1000OHM;600mA;0603 [20] HPH_R
    R AUDIO
    4 R3902
    B3902 1000OHM;600mA;0603 10;5%;0402 [20] HPH_L
    L AUDIO / DETECT
    DETECT / L AUDIO 5 B3903 1800ohm;100mA;0402
    1
    GND / MIC+

    2
    PH92-6B20C41A C3904
    TVS3901 TVS3902 TVS3903 C3903

    N2

    N2

    N2
    PTVS4V5D1BL PTVS4V5D1BL PTVS4V5D1BL C3901 C3902 R3903
    33pf;30%;50V;0201 NF_100K;5%;0201
    NF_1000pF;20%;50V;0201

    N1

    N1

    N1
    C 33pf;30%;50V;0201 C
    NF_1000pF;20%;50V;0201
    C3905

    1
    33pf;30%;50V;0201

    2
    4/L10

    4/L10
    2
    Note: For Cable detection

    4/L10
    JP3902 JP3905
    JP3901

    [20] MIC_BIAS2

    R3912
    2.2K;5%;0201 C3914
    C3915
    33pf;30%;50V;0201
    R3911
    0.1uF;20%;6.3V;0201
    2.2K;5%;0201

    2
    4/L10
    R3904
    B3904 1000OHM;600mA;0603 10;5%;0402
    JP3913

    [20] AMIC2_INP

    C3906
    R3913 [20] AMIC2_INM
    33pf;30%;50V;0201

    2
    C3907
    TVS3904 NF_0;0.5A;0201 C3912 C3913

    N2
    1000pF;20%;50V;0201
    PTVS4V5D1BL
    33pf;30%;50V;0201 33pf;30%;50V;0201

    N1

    2
    4/L10
    1

    2
    4/L10
    JP3911

    JP3907

    2
    4/L10
    C3908
    JP3915
    [77] FM_ANT

    1000pF;20%;50V;0201
    C3909
    L3901
    2

    NF_18pF;10%;50V;0201 NF_120nH;5%;0201
    TVS3905 L3902
    N2

    B AZ4217-01F 120ohm;900mA;0603
    C3910 need to debug B
    N1

    C0201_NC
    1

    B3905
    [20] HPH_REF

    1800ohm;100mA;0402
    2
    4/L10

    C3911

    JP3908
    33pf;30%;50V;0201

    2
    4/L10
    JP3909

    A A

    Title REV: V10


    Page Name = 39_Earphone
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 39 of 53

    5 4 3 2 1
    5 4 3 2 1

    [15] VREG_L9_LVS 1 2

    R4017 NF_0;0.5A;0201
    U4004

    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR
    4 1
    IN OUT VDDI_1P8 [40]
    2
    3 GND1 5
    [3] VDDI_1P8_EN EN GND2
    C4041
    SGM2036-1.8YUDH4G/TR
    1.0uF;20%;6.3V;0201
    C4042
    1.0uF;20%;6.3V;0201

    LCD-Connector
    D D

    [40] VCI_3P0

    [40] LCM_AVDD_7P6 LCM_ELVDD [40]


    1 2
    [40] VDDI_1P8
    LCM_ELVSS [40]
    R4006 0;0.5A;0201

    C4024 C4022
    C4023 J4001 C4025
    0.1uF;20%;6.3V;0201 0.1uF;20%;25V;0201 C4040
    1 40 0.1uF;20%;6.3V;0201 C4039 27pF;10%;50V;0201
    2 39 27pF;10%;50V;0201
    C4026
    0.1uF;20%;6.3V;0201 3 38 0.1uF;20%;6.3V;0201 1 2
    [3] ERR_INT_N BOARD_ID1 [40]
    4 37
    5 36
    6 35 R4018 0;0.5A;0201
    1 4 7 34
    [5] MIPI_DSI0_L0_M
    3.0V LDO EMI4004
    8 33
    VDDP_EN [40]
    2 3 9 32
    [5] MIPI_DSI0_L0_P EL_ON2 [40]
    1 4 10 31
    U4001 [5] MIPI_DSI0_L1_M LCD_RESET_N [3]
    EMI4002 11 30
    4 1 2 3 12 29 ERR_INT_N
    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR VIN VOUT VCI_3P0 [40] [5] MIPI_DSI0_L1_P MDP_VSYNC_P [3]
    1 4 13 28 R4013 1K;5%;0201
    [5] MIPI_DSI0_CLK_M LCD_ID [3]
    2 EMI4003
    14 27
    3 GND1 5 TS_RESET_N [3]
    [3] VCI_3P0_EN 2 3 15 26
    EN GND2 [5] MIPI_DSI0_CLK_P TS_I2C_SCL [3]
    1 4 16 25
    [5] MIPI_DSI0_L2_M TS_I2C_SDA [3]
    C4031 EMI4005
    17 24
    TS_INT_N [3]
    R4014 AP7343D-30FS4-7B 1.0uF;20%;6.3V;0201 2 3 18 23
    [5] MIPI_DSI0_L2_P
    C4032 100K;5%;0201 1 4 19 22
    [5] MIPI_DSI0_L3_M
    1.0uF;20%;6.3V;0201 EMI4001 20 21
    2 3 TP_VDD3P0 [40]
    [5] MIPI_DSI0_L3_P
    41 44
    42 GND4PIN 43
    C4021 C4005 C4007 C4008 C4009 C4010 C4018 C4019
    0.1uF;20%;6.3V;0201
    BAF04-40083-0500
    NF_33pf;30%;50V;0201NF_33pf;30%;50V;0201NF_33pf;30%;50V;0201
    NF_27pF;10%;50V;0201
    NF_33pf;30%;50V;0201
    NF_33pf;30%;50V;0201
    NF_33pf;30%;50V;0201

    1 2
    [43,48] FP_TP_VDD3P0
    NC 3.0V LDO reveser for TP R4005 0;0.5A;0201

    R4016
    U4003
    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR
    4 1 1 2
    IN OUT TP_VDD3P0 [40]
    C C
    2
    3 GND1 5 NF_0;0.5A;0201
    [3] TP_LDO_EN EN GND2
    NF_SGM2031-3.3YUDH4G/TR C4034
    R4015 NF_1.0uF;20%;6.3V;0201
    C4035
    NF_100K;5%;0201
    NF_1.0uF;20%;6.3V;0201

    OLED_DRIVIER
    L4003 10uH;20%;2520

    4.7uH;20%;2520
    L4001
    B B
    R4011

    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67,75] VPH_PWR

    0;1A;0402
    C4045 R4002
    C4038 C4033 C4001
    C4044 LCM_AVDD_7P6 [40]
    10uF;20%;6.3V;0402 U4002
    27pF;10%;50V;0201 22uF;20%;10V;0603
    22uF;20%;10V;0603 12 1 0;0.5A;0201
    PVIN LX1
    10uF;20%;6.3V;0402 16 15
    GND AVIN LX3 C4004
    GND 10uF;10%;10V;0603
    7 13 AVDD
    GND GND
    TP4002 TP4001 AGND VO3
    2
    GND PGND1
    14 GND
    17 PGND2
    GNDP R4001
    3 ELVDD
    LCM_ELVDD [40]
    1

    GND VO1
    8 4 0;0.5A;0201
    [40] VDDP_EN EN_VO3 FBS C4015
    22uF;16V;0805
    [40] EL_ON2
    9
    CTRL
    R4003
    5 10 ELVSS
    GND GND
    FD VO2 LCM_ELVSS [40]
    0;0.5A;0201
    6 11
    CT LX2
    C4003
    TPS65633BK 22uF;16V;0805
    GND
    R4012
    0;0.5A;0201 GND
    L4002
    4.7uH;20%;2520

    GND GND

    A A

    Title
    Page Name = 40_LCD/CTP IF REV: V10

    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605


    Size D

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 40 of 53

    5 4 3 2 1
    5 4 3 2 1

    Main Camera

    0;0.5A;0201
    2 1 R4130

    [41] WIDE_CSI2_CLK_M_CON WIDE_CSI2_CLK_M [41]


    VREG_L12A_1P8 [3,15,41]
    [41] WIDE_CSI2_CLK_P_CON WIDE_CSI2_CLK_P [41]
    0;0.5A;0201
    CAM0_DVDD_1P1 [21] 2 1 R4131

    VREG_L12A_1P8 [3,15,41]
    2 1
    C4114
    0;0.5A;0201 R4132
    CAM1_2_DVDD_1P2 [21,41]
    BAF04-30083-0500 C4113 [41] WIDE_CSI2_L0_M_CON WIDE_CSI2_L0_M [41]
    32 34 1.0UF;20%;6.3V;0201 CCI_I2C_SDA1 [3,41]
    D CCI_I2C_SCL1 [3,41] [41] WIDE_CSI2_L0_P_CON WIDE_CSI2_L0_P [41]D
    31 GND4PIN
    33
    2 1
    4.7uF;20%;6.3V;0402
    15 16 CAM3_RST_N [3] 0;0.5A;0201 R4133
    [5,41] MIPI_CSI1_L0_M 2 1
    14 17
    [5,41] MIPI_CSI1_L0_P 13 18 BB2R4-24KBJ03 0;0.5A;0201 R4134
    12 19 C4151
    TP4110 TP4112 C4152 [41] WIDE_CSI2_L1_M_CON WIDE_CSI2_L1_M [41]
    [5,41] MIPI_CSI1_CLK_M 26 27 C4149 C4148
    11 20 CCI_I2C_SDA0 [3]
    [5,41] MIPI_CSI1_CLK_P 25 GND-4PIN 28
    10 21 [41] WIDE_CSI2_L1_P_CON WIDE_CSI2_L1_P [41]
    9 22 CCI_I2C_SCL0 [3] 0;0.5A;02012 1 R4135
    1.0UF;20%;6.3V;0201
    [5] MIPI_CSI1_L1_M CAM0_RST_N [3] 12 13
    8 23
    [5] MIPI_CSI1_L1_P VSYNC [41] 11 14 4.7uF;20%;6.3V;0402
    C4150
    7 24

    1
    0;0.5A;0201 [41] WIDE_CSI2_L3_M_CON
    R_AGND [41]R4145 10 15 2 1
    6 25 1 2 [41] WIDE_CSI2_L3_P_CON
    [5] MIPI_CSI1_L3_M CAM0_AVDD_1P8 [21] [5,41] MIPI_CSI1_CLK_P 9 16 0;0.5A;0201 R4136
    5 26 1 2 [41] WIDE_CSI2_L0_M_CON
    [5] MIPI_CSI1_L3_P CAM0_AVDD_2P9 [21] [5,41] MIPI_CSI1_CLK_M 8 17
    4 27 R4103 0;0.5A;0201 [41] WIDE_CSI2_L0_P_CON [41] WIDE_CSI2_L2_M_CON WIDE_CSI2_L2_M [41]
    7 18
    3 28 CAM_MCLK0 [3]
    [5] MIPI_CSI1_L2_P 6 19
    2 29 [41] WIDE_CSI2_L1_M_CON [41] WIDE_CSI2_L2_P_CON WIDE_CSI2_L2_P [41]
    5 20 0;0.5A;0201 2
    [5] MIPI_CSI1_L2_M 1 30 [41] WIDE_CSI2_L1_P_CON WIDE_CSI2_L2_M_CON [41] 1 R4137
    CAM_AF_2P8 [21] 4 21
    [41] WIDE_CSI2_CLK_P_CON 3 22 WIDE_CSI2_L2_P_CON [41]
    J4101 C4115 [41] WIDE_CSI2_CLK_M_CON 2 23
    TP4109TP4111 R4106 1 2 1 24 R4102 1 2 0;0.5A;0201
    2 1 R4138
    C4102 C4116
    C4117 [3] CAM_MCLK3 CAM1_2_3_AVDD_2P8 [21,41]
    C4106 C4153
    1.0UF;20%;6.3V;0201 0;0.5A;0201 0;1A;0402
    J4102 [41] WIDE_CSI2_L3_M_CON WIDE_CSI2_L3_M [41]
    C4105
    0.1uF;20%;6.3V;0201
    NF_27pF;10%;50V;0201 R_AGND [41] C4120

    1
    [41] WIDE_CSI2_L3_P_CON WIDE_CSI2_L3_P [41]
    C0201_NC 4.7uF;20%;6.3V;0402 0;0.5A;0201
    1 R4139

    2
    NF_27pF;10%;50V;0201 4.7uF;20%;6.3V;0402
    4.7uF;20%;6.3V;0402 2
    [5,41] MIPI_CSI1_L0_P
    [5,41] MIPI_CSI1_L0_M

    2
    JP4103
    4/L10

    JP4104
    4/L10

    Depth Camera
    C C

    TP4101 TP4102 TP4103TP4104


    BB2R4-24KBJ03
    26 27
    25 GND-4PIN
    28
    1

    12 13
    11 14 CCI_I2C_SCL1 [3,41]
    10 15 CCI_I2C_SDA1 [3,41]
    9 16 R4107 1 2 0;0.5A;0201
    8 17 CAM_MCLK1 [3]
    [5] MIPI_CSI0_CLK_M 7 18
    [5] MIPI_CSI0_CLK_P CAM1_2_3_AVDD_2P8 [21,41]
    6 19
    5 20 D_AGND [41]
    [5] MIPI_CSI0_L0_M CAM1_RST_N [3]
    4 21
    [5] MIPI_CSI0_L0_P 3 22 VSYNC [41]
    2 23 C4132
    [3,15,41] VREG_L12A_1P8 C4127 C4126 C4101 C4128 TP4113
    1 24 VREG_L12A_1P8 [3,15,41]
    NF_0201 1
    C4146
    C4138 J4104 NF_27pF;10%;50V;0201
    C4147
    NF_27pF;10%;50V;0201 4.7uF;20%;6.3V;0402 0.1uF;20%;6.3V;0201
    18pF;10%;50V;0201 2.2uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201

    D_AGND [41]
    需要注意所有的信号线都要维持5 0 ohm阻抗，对于不用的信号线都要下拉 5 0 ohm电阻端接。

    A1
    2 U4101
    F1

    VDD
    [41] FRONT_CSI2_L2_P CLKBN
    F2
    [41] FRONT_CSI2_L2_M CLKBP
    F6
    CLKP MIPI_CSI2_L2_M [5]
    C1
    [41] FRONT_CSI2_L3_M DB3N
    JP4102 C2 F5
    [41] FRONT_CSI2_L3_P DB3P CLKN MIPI_CSI2_L2_P [5]
    4/L10
    D1 E5
    [41] FRONT_CSI2_CLK_P DB2N D1N MIPI_CSI2_L1_P [5]
    D2
    [41] FRONT_CSI2_CLK_M DB2P
    E6
    D1P MIPI_CSI2_L1_M [5]
    E1
    [41] FRONT_CSI2_L1_P DB1N
    E2 D5
    [41] FRONT_CSI2_L1_M DB1P D2N MIPI_CSI2_CLK_P [5]
    B1 D6
    [41] FRONT_CSI2_L0_M DB4N D2P MIPI_CSI2_CLK_M [5]
    B B2 B
    [41] FRONT_CSI2_L0_P DB4P
    C5
    D3N MIPI_CSI2_L3_M [5]
    F3
    [41] WIDE_CSI2_L2_P CLKAN
    F4 C6
    [41] WIDE_CSI2_L2_M CLKAP D3P MIPI_CSI2_L3_P [5]
    E3 B5
    [41] WIDE_CSI2_L1_P DA1N D4N MIPI_CSI2_L0_M [5]
    E4
    [41] WIDE_CSI2_L1_M DA1P
    B6
    D4P MIPI_CSI2_L0_P [5]
    D3
    [41] WIDE_CSI2_CLK_P DA2N
    D4
    [41] WIDE_CSI2_CLK_M DA2P

    0;0.5A;0201 B3
    [41] WIDE_CSI2_L3_M DA3N
    2 1 R4115 [41] WIDE_CSI2_L3_P
    B4
    DA3P
    A3 A6
    [41] WIDE_CSI2_L0_M DA4N SEL FCAM_SEL [3]

    Front Camera [41] FRONT_CSI2_CLK_P_CON FRONT_CSI2_CLK_P [41]


    [41] WIDE_CSI2_L0_P
    A4
    DA4P

    GND
    NC1
    NC2
    A5
    OE CAM_SW_EN [3]
    [41] FRONT_CSI2_CLK_M_CON FRONT_CSI2_CLK_M [41]
    2 1 R4114 TS5MP646

    A2
    C3
    C4
    0;0.5A;0201
    0;0.5A;0201
    2 1 R4117

    [41] FRONT_CSI2_L0_P_CON FRONT_CSI2_L0_P [41]

    R4146 2 1 NF_0;0.5A;0201 [41] FRONT_CSI2_L0_M_CON FRONT_CSI2_L0_M [41]


    CAM1_2_DVDD_1P05 [21]
    2 1 R4118
    1 R4109 2 R4140 2 1 0;0.5A;0201
    [3] CAM_MCLK2 CAM1_2_DVDD_1P2 [21,41] 0;0.5A;0201
    0;0.5A;0201
    VREG_L12A_1P8 [3,15,41] 0;0.5A;0201 2 1 R4119
    C4119 C4110
    C4118
    [41] FRONT_CSI2_L1_P_CON FRONT_CSI2_L1_P [41]
    NF_0201 4.7uF;20%;6.3V;0402
    J4103 1.0UF;20%;6.3V;0201 [41] FRONT_CSI2_L1_M_CON FRONT_CSI2_L1_M [41]
    2 1 R4121
    1 24
    0;0.5A;0201
    2 23
    3 22
    [41] FRONT_CSI2_L0_M_CON 4 21
    [41] FRONT_CSI2_L0_P_CON 5 20
    [41] FRONT_CSI2_L1_M_CON 6 19 FRONT_CSI2_L2_M_CON [41]
    [41] FRONT_CSI2_L1_P_CON 7 18 FRONT_CSI2_L2_P_CON [41] 0;0.5A;0201 2 1 R4141
    [41] FRONT_CSI2_CLK_M_CON 8 17 FRONT_CSI2_L3_M_CON [41]
    [41] FRONT_CSI2_CLK_P_CON 9 16 FRONT_CSI2_L3_P_CON [41]
    10 15 [41] FRONT_CSI2_L2_P_CON FRONT_CSI2_L2_P [41]
    CAM2_RST_N [3]
    11 14 AGND
    [3,41] CCI_I2C_SDA1 0;0.5A;0201 R4116 1 [41] FRONT_CSI2_L2_M_CON FRONT_CSI2_L2_M [41]
    12 13 AVDD 2
    [3,41] CCI_I2C_SCL1 CAM1_2_3_AVDD_2P8 [21,41] 2 1 R4142
    A 0;0.5A;0201 A
    25 28
    C4121 26 GND-4PIN 27
    C4123
    NF_27pF;10%;50V;0201 BB2R4-24KBJ03
    C4112
    NF_27pF;10%;50V;0201 0.1uF;20%;6.3V;0201 0;0.5A;0201 2 1 R4143
    C4122 4.7uF;20%;6.3V;0402
    [41] FRONT_CSI2_L3_P_CON FRONT_CSI2_L3_P [41]

    [41] FRONT_CSI2_L3_M_CON FRONT_CSI2_L3_M [41]


    2

    2 1 R4144
    JP4101 0;0.5A;0201 Title REV: V10
    4/L8
    Page Name = 41_Camera IF
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 41 of 53


    5 4 3 2 1
    5 4 3 2 1

    IR_LED
    FLASH_DRIVER
    R4201

    [13,14,15,16,18,19,20,21,37,40,43,44,62,67,75] VPH_PWR

    1
    D D

    2
    6.8;1%;0805

    1
    IR26-61C/L510/R/2G(MI) TVS4202

    N1
    C4201

    1
    1.0UF;20%;6.3V;0201 D4201 NF_LESD8D5.0CT5G

    N2
    FLASH_LED1 [18]

    2
    3
    R4203

    1
    Q4201
    1 WNM2046-3/TR TVS4204

    N1
    [3] IRTX_OUT
    2 NF_LESD8D5.0CT5G

    1
    TVS4201 0;0.5A;0201
    2

    N2
    N1
    NF_LESD8D5.0CT5G R4202
    LED4201 100K;5%;0201

    2
    LED-2+

    N2
    2
    1

    C C

    LED_DRIVER

    B B

    RED_LED [18]
    1

    D4202
    19-217UTD/S3393/TR8(UN)
    2

    A A

    Title Page Name = 42_Flash/RGB REV: V10

    DOCUMENT NO.: Size


    Design Name = S88512AA1_1_21_20190515_1605 C

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 42 of 53

    5 4 3 2 1
    5 4 3 2 1

    D D

    FP LDO 3.0V

    C C

    U4301
    [13,14,15,16,18,19,20,21,37,40,42,44,62,67,75] VPH_PWR 4 1
    IN OUT FP_TP_VDD3P0 [40,48]
    2
    3 GND1 5
    [3] FP_LDO_EN EN GND2
    SGM2031-3.3YUDH4G/TR C4309
    R4301 1.0uF;20%;6.3V;0201
    C4308
    100K;5%;0201
    1.0uF;20%;6.3V;0201

    B B

    A A

    Title Page Name = 43_Fingerprint REV: V10

    DOCUMENT NO.: Size


    Design Name = S88512AA1_1_21_20190515_1605 C

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 43 of 53

    5 4 3 2 1
    5 4 3 2 1

    ACCELEROMETER
    A+G SENSOR

    D D

    ALP-SENSOR
    TP4402 TP4403

    1
    [3,44] SNS_I3C_SCL

    [3,44] SNS_I3C_SDA

    VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]
    U4403

    12
    14

    13

    1
    R4403

    SDX

    SCX

    CSB
    1 10K;5%;0201
    SDO
    2 11

    2
    ASDX GND2
    3 10 J4401
    ASCX GND1 L4402 1 10
    33nH;3%;0201 ALSP_INT_N [3]
    [3] ACCEL_INT
    4 9 GYRO_INT [3]
    1 2 2 9
    INT1 INT2 [3,61] SNS_I2C_SCL 3 8 VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]

    GNDIO
    VDDIO
    33nH;3%;0201 L4401
    8 VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]
    1 2 4 7

    GND
    VDD [3,61] SNS_I2C_SDA 5 6 VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,62,67,75]
    C4402

    7
    11 14 C4409 C4404
    BMI120 0.1uF;20%;6.3V;0201 C4406 C4405 12 GND-4PIN 13

    C0201_NC C0201_NC BB2R4-10KBJ13


    2.2uF;20%;6.3V;0201 2.2uF;20%;6.3V;0201
    [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8

    C4401

    C 0.1uF;20%;6.3V;0201 C

    Magnetic Sensor

    B B

    U4402
    A2 A1
    [3,44] SNS_I3C_SCL SCL VSS

    B2 B1 VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]
    [3,44] SNS_I3C_SDA SDA VDD
    AK09918C C4410

    0.1uF;20%;6.3V;0201

    C4411
    4.7uF;20%;6.3V;0402

    A A

    Title REV: V10


    Page Name = 44_Sensor
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 44 of 53
    5 4 3 2 1
    5 4 3 2 1

    D D

    R4507
    [8,15] VREG_L5A_2P96 NF_100K;5%;0201

    J4501

    R4509 P1 G1
    [2] SDC2_DATA_2 33;5%;0201
    R4510 33;5%;0201 P2 DAT2 GND G2
    [2] SDC2_DATA_3 CT/DAT3 GND
    R4511 33;5%;0201 P3 G3
    [2] SDC2_CMD CMD GND
    [15] VREG_L22A_2P96
    P4 G4
    VDD GND

    T-F
    P5 G5
    [2] SDC2_CLK CLK GND
    P6 G6
    R4513 33;5%;0201 P7 VSS GND G7
    [2] SDC2_DATA_0 DAT0 GND
    C R4514 33;5%;0201 P8 G8 C
    [2] SDC2_DATA_1 DAT1 GND G9

    1
    GND G10
    C4503 TVS4504 GND

    N1
    G11
    4.7uF;20%;6.3V;0402 LESD8D5.0CT5G GND
    A1 G12
    DET_LEVER GND

    N2
    A2
    [45] SWITCH_DET DET_SW

    2
    VREG_L19A_1P8 [8,15,45]

    [8,15,45] VREG_L19A_1P8 R4501 2.2;1%;0201 AC11 AC51


    AC12 VCC-SIMA GND AC52
    VCC1-SIMA SIM-A GND

    2
    AC13 AC53
    VCC2-SIMA GND R4528 VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,47,60,61,62,75,77]
    R4504 100;5%;0201 AC21 AC61 15K;5%;0201
    [3] UIM1_RESET RST-SIMA VPP-SIMA
    AC22 AC62
    AC23 RST1-SIMA VPP1-SIMA AC63

    1
    1
    RST2-SIMA VPP2-SIMA
    R4521
    R4503 47;5%;0201 AC31 AC71 R4505 100;5%;0201
    [3] UIM1_CLK CLK-SIMA I/O-SIMA UIM1_DATA [3] 100K;1%;0201
    AC32 AC72
    AC33 CLK1-SIMA I/O1-SIMA AC73
    CLK2-SIMA I/O2-SIMA

    2
    1 R4515 2
    [8,15,45] VREG_L20A_1P8 R4502 2.2;1%;0201 BC11 BC51 VREG_L20A_1P8 [8,15,45] [45] SWITCH_DET UIM1_PRESENT [3]
    BC12 VCC-SIMB GND BC52 1K;5%;0201
    BC13 VCC1-SIMB GND BC53

    2
    VCC2-SIMB GND
    SIM-B R4529 1 R4526 2
    R4516 100;5%;0201 BC21 BC61

    1
    [3] UIM2_RESET UIM2_PRESENT [3]
    BC22 RST-SIMB VPP-SIMB BC62 15K;5%;0201 1K;5%;0201
    RST1-SIMB VPP1-SIMB TVS4503

    N1
    BC23 BC63
    RST2-SIMB VPP2-SIMB LESD8D5.0CT5G

    1
    R4508 1 R4527 2
    R4506 47;5%;0201 BC31 BC71 SD_CARD_DET_N [3]
    [3] UIM2_CLK CLK-SIMB I/O-SIMB UIM2_DATA [3]

    N2
    BC32 BC72 1K;5%;0201
    BC33 CLK1-SIMB I/O1-SIMB BC73 100;5%;0201
    CLK2-SIMB I/O2-SIMB

    2
    SIM-T-CAF00-20137-1029
    1
    1

    STATUS WITH SWITCH PIN


    TVS4502
    N1

    TVS4501 IN OUT
    N1

    LESD8D5.0CT5G
    LESD8D5.0CT5G
    H L
    N2
    N2

    C4501
    2

    C4502
    2

    1.0UF;20%;6.3V;0201

    B B

    1.0UF;20%;6.3V;0201

    A A

    Title REV: V10


    Page Name = 45_SIM/TF IF
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 45 of 53

    5 4 3 2 1
    5 4 3 2 1

    D D

    [47] DEBUG_KEY_VOL_UP_N

    Volume Up
    [16] KYPD_VOLP_N

    R4601 1K;5%;0201

    Keys

    1
    D4601

    N1
    C C
    LESD8D5.0CT5G

    N2
    2
    [47] DEBUG_KEY_VOL_DOWN_N

    J4601
    1
    2 Volume Down RESIN_N [16]
    3
    4 R4602 1K;5%;0201

    CONN-4P

    1
    D4602
    N1
    N2 LESD8D5.0CT5G
    2

    [47] DEBUG_KYPDPWR_N

    Power On
    KYPDPWR_N [16,17]
    R4603 1K;5%;0201
    1

    D4603
    N1

    LESD8D5.0CT5G
    B B
    N2
    2

    Schematic design notice of "75_PERI_KEYPAD" page.


    Note 75-1: DO NOT put pull-up resistor on PWRKEY

    Note 75-2: Volume Up : HOME Key / GND


    Volume Down : KPROW0/KPCOL0

    A A

    Title Page Name = 46_Sidekey REV: V10

    DOCUMENT NO.: Size


    Design Name = S88512AA1_1_21_20190515_1605 C

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 46 of 53

    5 4 3 2 1
    5 4 3 2 1

    USB KEYS TEST


    TP4702 TP4703 TP4704 TP4725 TP4730
    TP4728 TP4729
    TP-1MM TP-1MM TP-1MM TP-1MM TP-1MM
    TP-1MM TP-1MM

    TP4717 TP4708 TP4709

    1
    TP-1MM TP-1MM TP-1MM

    R4704

    1
    [2,19,48] USB0_HS_DM 1K;5%;0201
    R4703
    DEBUG_KEY_VOL_UP_N [46]
    [2,19,48] USB0_HS_DP 10K;5%;0201
    D FORCED_USB_BOOT [3] D
    DEBUG_KEY_VOL_DOWN_N [46]
    [48] USB1_VBUS_CONN
    DEBUG_KYPDPWR_N [46]

    VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,60,61,62,75,77]
    [19,48] USB_ID

    [19,48] USB_CC2

    1
    TVS4702 TVS4703 TVS4701
    N1

    N1
    TVS4704
    ESD9X5VU-2/TR
    ESD9X5VU-2/TR

    2
    N2

    N2
    2

    UART
    JTAG CONNECTOR

    C C

    TP4727 TP4720 TP4721 TP4722 TP4723 TP4726


    TP4711 TP4712
    TP-0.5MM TP-0.5MM
    1

    1
    BB1
    [2] JTAG_TCK BB2 PMI2
    PMI1
    SH4702 SH4711 SH4712 SH4713 SH4714 RF1 SH4715 SH4716 SH4701 WCN
    R4701 1K;5%;0201 RF2 PMU
    [3] DBG_UART_TX
    [2] JTAG_TDI

    [3] DBG_UART_RX
    R4702
    1K;5%;0201 屏蔽罩 屏蔽罩 屏蔽罩 屏蔽罩 屏蔽罩 屏蔽罩 屏蔽罩 屏蔽罩
    [2] JTAG_TDO

    1
    [2] JTAG_TMS Shielding-case Shielding-case Shielding-case Shielding-case Shielding-case Shielding-case Shielding-case Shielding-case

    [2] JTAG_SRST_N

    [2] JTAG_TRST_N

    C4701 C4702
    0.01uF;10%;16V;0201 0.01uF;10%;16V;0201

    B B

    BATTERY GND
    FM4703 FM4704 FM4705 FM4706
    Fiducial Mark Fiducial Mark Fiducial Mark Fiducial Mark

    TP4718 TP4714 TP4715 TP4724


    TP-1MM TP-1MM TP-1MM TP-1MM
    TP4713 TP4719
    TP-1MM TP-1MM

    1
    1
    1

    J4701
    1

    HOLE12 HOLE14 HOLE15 HOLE17


    SN
    PTH-1.6MM PTH-1.6MM PTH-1.6MM PTH-1.6MM 1

    [36] BATT_ID_CON SN-3x3mm

    1
    [19,36] VBATT
    A A

    [36] BATT_THERM_CON

    Title REV: V10


    Page Name = 47_Testpoint/Shielding/GND
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DESIGNER = zhanglieqiang


    DESIGNER:

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 47 of 53

    5 4 3 2 1
    5 4 3 2 1

    OVP
    U4801
    D B3 A2 [19] VBUS_USB_IN D
    [47,48] USB1_VBUS_CONN C2 IN1 OUT1 A3
    C3 IN2 OUT2 B2
    R4802 IN3 OUT3
    NF_10K;5%;0201 C1 R4801
    OVLO B1 47K;5%;0201
    A4 FLAG
    C4801 B4 GND1
    C4 GND2
    C4802 GND3 A1
    R4803 EN
    33pf;30%;50V;0201 0.1uF;20%;25V;0201 0;0.5A;0201
    ET9540L

    C C

    Sub Board Connector

    J4801
    B B
    1 34 ANT_DET [18]
    [2,19,47] USB0_HS_DM
    2 33
    [2,19,47] USB0_HS_DP USB_ID [19,47]
    3 32
    USB_CC2 [19,47]
    [48] Shielding case_Gnd
    4 31 SPK_VSENS_N [37]
    [37,48] SPK_P
    5 30 SPK_VSENS_P [37]
    6 29
    [37,48] SPK_N SPK_P [37,48]
    7 28
    SPK_N [37,48]
    8 27
    9 26
    [61] SAR_MianANT_CIN1 AMIC1_INP_CON [38]
    10 25
    [61] SAR_MianANT_CIN2 AMIC1_INM_CON [38]
    2

    11 24
    MIC_BIAS1 [20]
    12 23
    [3] GRFC13 Shielding case_Gnd [48]
    13 22
    [61,67,69] LTE_VFE28 FP_INT_N [3]
    14 21
    [3] GRFC10 FP_RST_N [3]
    15 20
    [3] GRFC11 FP_SPI_SCLK [3]
    16 19
    [40,43] FP_TP_VDD3P0 FP_SPI_CS_N [3] JP4807
    17 18
    [3] FP_SPI_MOSI FP_SPI_MISO [3] 4/L8
    35 38
    [47,48] USB1_VBUS_CONN 36 GND4PIN 37

    CONN-34P-2ROW-GND4P

    A A

    Title Page Name = 48_Sub PCB IF REV: V10

    DOCUMENT NO.: Size


    Design Name = S88512AA1_1_21_20190515_1605 C

    DEPARTMENT: DESIGNER:
    DESIGNER = zhanglieqiang

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 48 of 53

    5 4 3 2 1
    8 7 6 5 4 3 2 1
    REVISIONS

    LTR DESCRIPTION DATE APPROVED

    A INITIAL RELEASE

    D D

    C C

    B B

    A A
    Title REV: V10
    Page Name = 57_Reserved
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 57 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.
    SDR660 MSS &GND U5801B

    SDR660-0-180WLPSP-TR-03-0

    D GND
    D
    U5801D
    41
    SDR660-0-180WLPSP-TR-03-0 GND_19

    99 21
    GND_44 GND_9
    QLINK_ETDAC_TEST

    22
    GND_10

    1 81 [6] QPHY_CLK_M
    GND_1 QLINK_CLK_M
    9 96 [6] QPHY_CLK_P
    GND_4 QLINK_CLK_P
    36
    GND_17
    49
    87 [6] QPHY_UL0_M GND_24
    QLINK_UL0_M
    72 [6] QPHY_UL0_P
    QLINK_UL0_P 58 42
    GND_29 GND_20

    67 56
    88 [6] QPHY_DL0_M GND_32 GND_28
    QLINK_DL0_M
    97
    103 [6] QPHY_DL0_P GND_42
    QLINK_DL0_P 84
    GND_36
    128
    GND_54
    98 134
    115 111 [6] QPHY_DL1_M GND_43 GND_57
    GND_50 QLINK_DL1_M
    124 127 [6] QPHY_DL1_P
    GND_52 QLINK_DL1_P
    89
    106 GND_37
    GND_48
    91
    GND_38 158
    135 [6] QPHY_DL2_M GND_66
    QLINK_DL2_M
    119 [6] QPHY_DL2_P
    QLINK_DL2_P
    138
    GND_58
    116
    47 GND_51
    ETDAC_CH0_M
    39
    Each QPHY pair shall be routed in a channel together
    ETDAC_CH0_P 131
    GND_56
    isolated from other QPHY pairs with surrounding gnd 61

    C ETDAC_CH1_M

    ETDAC_CH1_P
    113

    104
    GND_30
    C
    139
    GND_59

    34
    GND_16
    40 92

    QPHY_ETDAC_TEST 129
    GND_18 GND_39

    GND_14
    30
    GND_55
    105
    GND_47

    79
    GND_35
    109 62
    GND_49 GND_31
    125
    GND_53 45
    GND_22
    140 31
    GND_60 GND_15
    155
    GND_65 24
    GND_12
    163
    GND_69

    17
    GND_6
    172
    NOTE: GND_70

    One dedicated RFFE bus is required for SDR660 debug purposes GND_11
    23

    U5801A 12
    GND_5
    SDR660-0-180WLPSP-TR-03-0
    145
    GND_61
    19
    CONTROL
    GND_7
    48
    GND_23 151
    GND_63
    28
    GND_13

    166 1 R5802 2 [3] RFFE1_CLK 51


    RFFE1_CLK GND_25
    0;0.5A;0201 20 76

    B RF_CLK1 [16] 1 R5801 2


    0;0.5A;0201
    114
    XO_IN RFFE1_DATA
    149 1 R5803 2
    0;0.5A;0201
    [3] RFFE1_DATA
    GND_8 GND_33
    B
    C5801
    NF
    52
    120 173 GND_26
    W_GRFC_6 DNC_3
    157 175
    W_GRFC_7 GND_72
    136 160
    W_GRFC_5 GND_67

    165 83 [3] WMSS_RESET 147


    DNC_2 WMSS_RESETN GND_62
    162
    GND_68
    153
    GND_64 78
    QLINK_ENABLE [3] 143
    QLINK_EN GND_34
    93
    GND_40

    QLINK_REQUEST [3] 73
    QLINK_REQ
    100 44
    GND_45 GND_21

    GNSS_ELNA_CTRL [79] 150


    GNSS_ELNA_CTRL
    4
    GND_2
    57
    W_GRFC_0 174
    66 65 GND_71
    DNC_1 W_GRFC_1
    74 55 94
    W_GRFC_2 GND_27 GND_41
    180
    GND_73 102
    GND_46
    8
    GND_3

    A Title REV: V10


    A
    Page Name = 58_SDR660_MSS_GND
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date:

    SDR660_MSS_GND
    Page Modify Date = Wednesday, May 15, 2019Sheet 58 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    SDR660 Tx,PRX,DRX,FBRX
    C5968 L5904
    C5902
    22pF;5%;50V;0201
    L5903

    1.2nH;0.1nH;0201

    C5941
    C5963
    22pF;5%;50V;0201

    RF_B7_PRX_RFIC [65]
    33pF;5%;50V;0201

    D 22pF;5%;50V;0201
    1.2nH;0.1nH;0201
    L5901
    C5962 D
    1.2nH;0.1nH;0201 22pF;5%;50V;0201
    C5903
    [73] RF_B41_DRX_RFIC
    C5951 33pF;5%;50V;0201 22pF;5%;50V;0201
    C5901 C5940
    RF_B40B41_PRX_RFIC [67]
    22pF;5%;50V;0201 33pF;5%;50V;0201
    L5910 L5906 C5967
    C5969
    1.2nH;0.1nH;0201 22pF;5%;50V;0201
    22pF;5%;50V;0201 1.2nH;0.1nH;0201

    C5952 C5905 C5904 C5945


    [73] RF_B7_DRX_RFIC RF_B1_PRX_RFIC [65]
    22pF;5%;50V;0201 22pF;5%;50V;0201 33pF;5%;50V;0201
    33pF;5%;50V;0201

    C5970 L5913

    22pF;5%;50V;0201 L5914
    1.2nH;0.1nH;0201 C5965
    22pF;5%;50V;0201
    1.2nH;0.1nH;0201
    C5907
    [73] RF_B40_DRX_RFIC
    C5953 33pF;5%;50V;0201 22pF;5%;50V;0201
    U5801E C5908 C5943
    RF_B34B39_PRX_RFIC [65]
    22pF;5%;50V;0201 33pF;5%;50V;0201
    SDR660-0-180WLPSP-TR-03-0

    L5918
    L5917 C5966
    C5974
    RF 22pF;5%;50V;0201
    22pF;5%;50V;0201 1.2nH;0.1nH;0201 1.2nH;0.1nH;0201

    C5909 C5910 C5944


    C5957 RF_B2_PRX_RFIC [65]
    [72] RF_B1B4_DRX_RFIC 141 46 22pF;5%;50V;0201 33pF;5%;50V;0201
    33pF;5%;50V;0201 22pF;5%;50V;0201 DRX_HB1 PRX_HB1
    133 54
    DRX_HB2 PRX_HB2
    L5909 C5964
    L5919
    C5971 126 63
    DRX_HB3 PRX_HB3 1.2nH;0.1nH;0201 22pF;5%;50V;0201
    22pF;5%;50V;0201 1.2nH;0.1nH;0201 117 71
    DRX_HB4 PRX_HB4
    C5906 C5942
    C5954 C5911 RF_B3_PRX_RFIC [65]
    [72] RF_B39_DRX_RFIC 22pF;5%;50V;0201 33pF;5%;50V;0201
    33pF;5%;50V;0201 22pF;5%;50V;0201
    110 80
    DRX_UHB PRX_UHB

    171 16
    DRX_MB1 PRX_MB1
    C C5972
    22pF;5%;50V;0201
    L5923

    1.2nH;0.1nH;0201
    164

    156
    DRX_MB2 PRX_MB2
    25 L5925
    C
    DRX_MB3 15nH;3%;0201
    32
    148 PRX_MB3
    C5955 C5912 C5914 C5946
    DRX_MB4 38
    [72] RF_B34_DRX_RFIC RF_B28A_PRX_RFIC [64]
    33pF;5%;50V;0201 22pF;5%;50V;0201 PRX_MB4 22pF;5%;50V;0201 33pF;5%;50V;0201

    L5927

    15nH;3%;0201
    179 7
    DRX_LB1 PRX_LB1
    L5926 C5916
    C5973 170 15 C5947
    DRX_LB2 PRX_LB2 RF_B28B_PRX_RFIC [64]
    22pF;5%;50V;0201 1.2nH;0.1nH;0201 22pF;5%;50V;0201 33pF;5%;50V;0201

    178 6
    DRX_LB3 PRX_LB3
    C5956 C5917 169 14 L5929
    [72] RF_B2_DRX_RFIC DRX_LB4 PRX_LB4 15nH;3%;0201
    33pF;5%;50V;0201 22pF;5%;50V;0201

    177 5
    DRX_LB5 PRX_LB5 C5919 C5948
    RF_B20_PRX_RFIC [64]
    L5938 101 86 22pF;5%;50V;0201 33pF;5%;50V;0201
    C5975 DRX_LTEU_UHB PRX_LTEU_UHB
    22pF;5%;50V;0201 1.2nH;0.1nH;0201 L5930
    15nH;3%;0201
    C5976 C5977
    [72] RF_B3_DRX_RFIC C5921 C5949
    33pF;5%;50V;0201 22pF;5%;50V;0201 68 26 RF_B8_PRX_RFIC [64]
    TX_FBRX_M TX_CH0_HB1 22pF;5%;50V;0201 33pF;5%;50V;0201

    60
    TX_FBRX_P

    L5931 33
    TX_CH0_MB1
    15nH;3%;0201 10
    161 TX_CH0_MB2
    GNSS_IN L5932
    18
    C5958 C5922 TX_CH0_LMB 15nH;3%;0201
    [72] RF_B28_DRX_RFIC
    33pF;5%;50V;0201 22pF;5%;50V;0201
    C5925 C5950
    L5933 RF_B5_PRX_RFIC [64]
    22pF;5%;50V;0201 33pF;5%;50V;0201
    2
    15nH;3%;0201 TX_CH0_LB1
    27
    TX_CH0_LB2
    C5928
    C5959 C5926
    [72] RF_B20_DRX_RFIC 22pF;5%;50V;0201
    33pF;5%;50V;0201 22pF;5%;50V;0201
    168 R5901 2 R5902
    TX_CH1_UHB 1 1 2
    RF_HB2_TX_RFIC [67]
    B L5934
    0;0.5A;0201 0;0.5A;0201
    B
    15nH;3%;0201 167
    TX_CH1_HB
    159 RF_MB2_TX_RFIC [67]
    TX_CH1_MB
    C5960 C5929 RF_2G_HB_TX_RFIC [62]
    [72] RF_B8_DRX_RFIC
    33pF;5%;50V;0201 22pF;5%;50V;0201
    176
    L5935 TX_CH1_LTEU
    15nH;3%;0201 RF_2G_LB_TX_RFIC [62]

    RF_LTE_LB_TX_RFIC [67]
    C5961 C5933
    [72] RF_B5_DRX_RFIC
    33pF;5%;50V;0201 22pF;5%;50V;0201
    R5903

    49.9;1%;0201

    [62] RF_TXDET
    1 R5904 2 a. DA outputs have no DC bias and they are DC grounded on chip.
    0;0.5A;0201
    b. If following component (switch/PA) requires non-zero DC, then a series DC blocking cap is needed
    1

    R5905 R5906 c. NC for unused LNA and DA Port


    NF NF
    2

    2
    2

    R5907 R5909
    0;0.5A;0201 U5902 0;0.5A;0201
    SAFFB1G56KB0F0A
    L5936
    1

    1 R5908 2 1 4 C5938
    [79] WTR_GPS UNBL1 UNBL2
    3.3nH;0.1nH;0201
    GND1

    GND2

    GND3

    0;0.5A;0201 33pF;5%;50V;0201

    L5937
    2.4nH;0.1nH;0201
    2

    A C5939
    33pF;5%;50V;0201 A
    Title REV: V10
    Page Name = 59_SDR660_PRX_DRX_FBRX
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    SDR660_PRX_DRX_FBRX
    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 59 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS
    CONFIDENTIAL AND PROPRIETARY - QUALCOMM TECHNOLOGIES, INC.
    LTR DESCRIPTION DATE APPROVED
    NOT TO BE USED, COPIED, REPRODUCED, OR MODIFIED IN WHOLE OR IN PART, NOR
    ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE EXPRESS WRITTEN A INITIAL RELEASE
    PERMISSION OF QUALCOMM TECHNOLOGIES, INC.
    THIS TECHNICAL DATA MAY BE SUBJECT TO U.S. AND INTERNATIONAL EXPORT,
    RE-EXPORT, OR TRANSFER ("EXPORT") LAWS. DIVERSION CONTRARY TO U.S. AND
    INTERNATIONAL LAW IS STRICTLY PROHIBITED.

    SDR660 POWER
    D D

    SH6001

    U5801C
    C6001
    0.1uF;20%;6.3V;0201 SDR660-0-180WLPSP-TR-03-0

    PWR
    SH6002 R6002
    108 1 2 [15] VREG_L1A_1P2
    VDDA_1P2_RX1
    70 0;0.5A;0201
    VDDA_1P2_RX2 VDD_ANALOG_1P2
    SH6003 C6004
    0.1uF;20%;6.3V;0201
    VREG_L2A_1P0 [15] R6001
    1 2 77 75
    VDDA_1P0_RX1 VDDA_1P2_ANA0 C6005
    0;0.5A;0201 4.7uF;20%;6.3V;0402
    37 90
    VDDA_1P0_RX2 VDDA_1P2_ANA0
    C6002 C6003 SH6004
    0.1uF;20%;6.3V;0201
    4.7uF;20%;6.3V;0402 107 85
    VDDA_1P0_XO VDDA_1P2_FBRX

    SH6005 Pin 43,37,107within one group


    43 C6006
    VDDA_1P0_RX2 0.1uF;20%;6.3V;0201
    95
    C6007 VDDA_1P0_RX
    0.1uF;20%;6.3V;0201
    53
    VDDA_1P0_RX2_1
    SH6006
    29
    SH6007 VDDA_1P2_TX0
    C 144
    VDDA_1P0_TX1 C
    C6009
    C6008
    0.1uF;20%;6.3V;0201
    0.1uF;20%;6.3V;0201

    SH6008
    154
    VDDA_1P0_RX0
    146 130
    C6010 VDDA_1P0_GNSS VDDA_1P2_RX0
    0.1uF;20%;6.3V;0201
    137
    132 VDDA_1P2_RX0
    SH6009 VDDA_1P0_RX0_1
    13
    VDDA_1P0_TX0_1
    SH6010
    C6011
    0.1uF;20%;6.3V;0201

    SH6011
    3 123
    VDDA_1P0_TX0 VDDA_1P2_RX0_1

    C6012 C6013
    0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201

    Pin 152,121,122within one group 152


    SH6012 VDDA_1P8_TX1
    121 118 1 R6003 2 [15] VREG_L3A_1P0
    VDDA_1P8_ANA2 VDDD_1P0_QLINK
    0;0.5A;0201 VDD_DIG_1P0
    C6014
    C6015 0.1uF;20%;6.3V;0201 C6016
    0.1uF;20%;6.3V;0201 4.7uF;20%;6.3V;0402

    SH6013
    64
    SH6014 VDDD_1P0
    11 82
    VDDA_1P8_TX0 VDDD_1P0
    B C6017
    0.1uF;20%;6.3V;0201
    35
    VDDA_1P8_ANA1 VDDD_1P0
    142 C6018
    0.1uF;20%;6.3V;0201 B
    R6004
    112 1 2 VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,61,62,75,77]
    VDDD_1P8
    0;0.5A;0201 VDD_DIG_1P8
    C6019
    SH6015 0.1uF;20%;6.3V;0201 C6020
    R6005 4.7uF;20%;6.3V;0402
    VREG_L13A_1P8 [15] 1 2 122
    VDDA_1P8_ANA2
    0;0.5A;0201
    69
    C6021 C6022 VDDA_1P8_RX2
    4.7uF;20%;6.3V;0402 0.1uF;20%;6.3V;0201
    50
    VDDA_1P8_FBRX
    59
    VDDA_1P8_FBRX

    A A
    Title REV: V10
    Page Name = 60_SDR660_PWR
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    SDR660_PWR Date: Page Modify Date = Wednesday, May 15, 2019Sheet 60 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    5 4 3 2 1

    D D

    [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8

    C6102
    C6101
    1.0UF;20%;6.3V;0201
    0.1uF;20%;6.3V;0201

    R6102
    SAR_DIV_CIN0 [69]
    470;5%;0201 U6101
    SX9325
    A2
    A3 VDD [3,44] SNS_I2C_SCL
    R6103 CS0
    SAR_MianANT_CIN1 [48] B4
    B3 CS1 [3,44] SNS_I2C_SDA
    470;5%;0201 CS2
    A1
    SCL C6103
    R6101
    B1 C6104
    SDA C0201_NC
    SAR_MianANT_CIN2 [48] A4 B2 C0201_NC
    GND NIRQ [3] SAR_INT_GRFC0
    470;5%;0201
    I2C需要1.8V上拉

    1
    R6104
    2.2K;5%;0201

    2
    [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77] VREG_L9A_1P8

    C C

    [48,67,69] LTE_VFE28

    C6108
    100pF;30%;50V;0201

    B B

    J6102
    J6101

    4
    3
    NF
    RF-ANT-SOCKET-818002131

    GND2
    GND1
    C6112
    2 C6110 C6109 1 R6111 2 2 1
    I/O OUT IN RF_Main [62]
    GND1
    GND2
    GND3

    33pF;5%;50V;0201 33pF;5%;50V;0201 0;0.5A;0201


    33pF;5%;50V;0201

    L6104
    3
    4
    1

    L6105
    68nH;5%;0201 1 R6108 2 L6107
    68nH;5%;0201 NF
    0;1A;0402

    [18] 2 R6110 1
    ANT_DET GRFC_ANT_DET [3]
    1

    0;0.5A;0201 C6113
    R6106
    100pF;5%;50V;0201 1M;5%;0201
    1

    R6107
    2

    100K;5%;0201
    2

    A A

    L6106
    VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75,77]
    68nH;5%;0201

    C6114 Title
    100pF;5%;50V;0201 Page Name = 61_Primary_ANTREV: V10

    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605


    Size D

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 61 of 81

    5 4 3 2 1
    5 4 3 2 1

    D D

    [3,8,12,15,16,17,20,37,44,45,47,60,61,75,77] VREG_L9A_1P8 R6208

    LTE_VMIPI [62,67,70]
    0;0.5A;0201

    [59] RF_TXDET
    VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,67,75]

    2
    C6204 D6201

    N2
    C6202
    ESD5651N-2/TR
    100pF;30%;50V;0201 0.1uF;20%;6.3V;0201 C6217 C6218

    N1
    2.2uF;20%;6.3V;0201
    2.2uF;20%;6.3V;0201

    1
    TO_HMLB_Primary-ANT U6201
    C6201 C6203
    22pF;5%;50V;0201 0.1uF;20%;6.3V;0201

    19

    17

    38
    23
    21
    20
    18
    16
    15
    14
    13
    12
    11
    RF5212ATR13

    NC

    GND9
    GND8
    GND7
    GND6
    GND5
    GND4
    GND3
    GND2
    GND1
    GND11
    GND10
    CPL_OUT
    10 VRAMP_1 R6209
    C6206 22 VBAT/VSW 100K;1%;0201
    [61] RF_Main ANT 9
    100pF;5%;50V;0201
    VCC/VPA
    8
    L6201 L6202 VRAMP
    LTE_VMIPI [62,67,70]
    C NF NF 7 C
    VIO C6208
    24 6 R6202
    1000pF;20%;50V;0201 1 2
    NC/GND1 SDATA RFFE2_DATA [3,67,70,75]
    0;0.5A;0201
    25 5 1 R6203 2
    NC/GND2 SCLK RFFE2_CLK [3,67,70,75]
    0;0.5A;0201
    26 4
    [64] RF_B5_TRX_TXM TRX12 RFIN_H_OUT
    1 R6204 2 27 3
    C6209
    NF_18pF
    C6210
    NA_18pF RC filter for Qorvo TXM RF5228
    R3312= 50 ohm
    [65] RF_B34_PRX_TXM TRX11 RFIN_H
    0;0.5A;0201
    28 2
    [64] RF_B20_TRX_TXM TRX10 RFIN_L C3310= 10 pF(This value should be optimized for both MIPI total C-Load and RC Filter Performance)
    29 1

    Reserved Shunt C for MIPI C-load Tuning


    [64] RF_B8_TRX_TXM TRX9 RFIN_L_OUT
    30
    1 R6210

    NC/GND3
    2 TRX8
    Control the Total Capacitance to 25pF+-3pF
    [64] RF_B28B_TRX_TXM

    GNDP1
    GNDP2
    GNDP3
    GNDP4
    GNDP5
    GNDP6
    GNDP7
    GNDP8
    GNDP9
    0;0.5A;0201

    TRX7

    TRX6

    TRX5

    TRX4

    TRX3

    TRX2
    1 R6211 2
    [65] RF_B39_PRX_TXM
    0;0.5A;0201

    31

    32

    33

    34

    35

    36

    39
    40
    41
    42
    43
    44
    45
    46
    47
    37
    L6203 C6211
    [65] RF_B2_TRX_TXM RF_2G_HB_TX_RFIC [59]
    4.3nH;0.1nH;0201 33pF;5%;50V;0201
    C6213
    [65] RF_B7_TRX_TXM
    C6212
    1.8pF;0.05pF;50V;0201 1.8pF;0.05pF;50V;0201 2G_PAIN_HB
    [65] RF_B1B3B4_TRX_TXM

    1 R6206 2
    [64] RF_B28A_TRX_TXM
    0;0.5A;0201
    L6204
    C6214
    1 R6207 2 RF_2G_LB_TX_RFIC [59]
    [65] RF_B1_TRX_TXM

    [67] RF_B34B39_TX_TXM
    0;0.5A;0201 9.1NH;3%;0201 33pF;5%;50V;0201
    2G_PAIN_LB
    C6215 C6216
    High pass filter for G8 Tx in G7 Rx
    3.3pF;0.25pF;50V;0201
    [67] RF_B40_TRX_TXM band
    3.3pF;0.25pF;50V;0201
    noise rejection

    [67] RF_B41_TRX_TXM

    B B

    A A

    Title REV: V10


    Page Name = 62_Primary_ASM
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 62 of 81

    5 4 3 2 1
    8 7 6 5 4 3 2 1
    REVISIONS

    LTR DESCRIPTION DATE APPROVED

    A INITIAL RELEASE

    D D

    C C

    B B

    A A
    Title REV: V10
    Page Name = 63_Reserved
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 63 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    5 4 3 2 1

    [67] RF_B5_PA_DPX

    B5 DPXL
    FL6401
    SAYEY836MBA0F0A

    D L6401 6 3 D
    [62] RF_B5_TRX_TXM ANT TX
    4.3nH;0.1nH;0201
    1
    RX RF_B5_PRX_RFIC [59]

    GND1
    GND2
    GND3
    GND4
    GND5
    L6403 L6404
    15nH;3%;0201 12nH;3%;0201

    2
    4
    5
    7
    8
    [67] RF_B8_PA_DPX

    B8 DPXL FL6402
    SFX897BYF0W
    C6402 6 3
    [62] RF_B8_TRX_TXM ANT TX
    18pF;5%;50V;0201
    1
    RX RF_B8_PRX_RFIC [59]

    GND1
    GND2
    GND3
    GND4
    GND5
    L6407
    NF L6408 L6409

    2
    4
    5
    7
    8
    8.2nH;3%;0201 NF

    C C

    RF_B20_PA_DPX [67]

    B20 DPXL FL6403


    SAYEY806MBC0F0A

    C6405 6 3
    RF_B20_TRX_TXM [62]
    33pF;5%;50V;0201 ANT TX
    1
    RX RF_B20_PRX_RFIC [59]

    GND1
    GND2
    GND3
    GND4
    GND5
    L6411
    8.2nH;3%;0201 L6412
    8.2nH;3%;0201

    2
    4
    5
    7
    8
    L6413
    8.2nH;3%;0201

    B28A DPXL
    B [67] RF_B28A_PA_DPX B

    FL6404
    SAYEY718MBC0F0A

    C6408
    6 3
    [62] RF_B28A_TRX_TXM ANT TX
    18pF;5%;50V;0201 1
    RX RF_B28A_PRX_RFIC [59]
    GND1
    GND2
    GND3
    GND4
    GND5

    L6415 L6416
    8.2nH;3%;0201
    2
    4
    5
    7
    8

    NF
    C6411
    18pF;5%;50V;0201

    B28B DPXL
    [67] RF_B28B_PA_DPX

    FL6405
    SAYEY733MBC0F0A
    C6412
    6 3
    [62] RF_B28B_TRX_TXM ANT TX
    33pF;5%;50V;0201
    1
    RX RF_B28B_PRX_RFIC [59]
    GND1
    GND2
    GND3
    GND4
    GND5

    A L6418 L6419 A
    2
    4
    5
    7
    8

    L6420
    NF NF
    NF

    Title REV: V10


    Page Name = 64_TRX_LB
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 64 of 81

    5 4 3 2 1
    5 4 3 2 1

    说明：国内、印度版使用双双工器；
    海外版使用四工器，两者做兼容。
    D D

    B1 [67] RF_B1_PA_DPX

    B3/4 [67] RF_B3_PA_DPX

    FL6501
    B3

    8
    rf-SAPRY1G74BA0B0A

    GND

    GND1
    1 7 C6501 RF_B3_PRX_RFIC [59]
    B1_TX Port B3_RX Port1 2.7pF;0.25pF;50V;0201
    2
    B3_TX Port1

    B34/39 PRX

    B3_ANT. Port1
    C6504 B1_RX Port
    6 1 R6508 2
    3 RF_B34_PRX_TXM [62]
    [62] RF_B1_TRX_TXM B1_ANT. Port
    33pF;5%;50V;0201 L6503 0;0.5A;0201
    NF

    L6531
    FL6509 2.0NH;0.1nH;0201

    5
    L6507 SFWG00DB002
    L6506 10nH;3%;0201
    NF

    C6513 1 6
    [59] RF_B34B39_PRX_RFIC B39 / B34 B34
    3.0pF;0.25pF;25V;0201

    9 1 R6509 2
    B39 RF_B39_PRX_TXM [62]
    C L6508 L6519 C
    [62] RF_B1B3B4_TRX_TXM 2 0;0.5A;0201
    6.2NH;3%;0201 L6520
    1.0nH;0.1nH;0201 C6506 RF_B1_PRX_RFIC [59] NF GND1

    L6514
    NF
    L6510
    NF L6509
    NF
    33pF;5%;50V;0201

    B1/4 3

    4
    GND2 GND5
    7

    8
    L6532
    2.0NH;0.1nH;0201

    GND3 GND6

    5 10
    GND4 GND7

    B3439

    [67] RF_B2_PA_DPX

    B2 DPXL FL6504
    SAYEY1G88BA0B0AR05-A

    C6510 6 3
    [62] RF_B2_TRX_TXM ANT TX
    33pF;5%;50V;0201 C6511
    1 RF_B2_PRX_RFIC [59]
    RX

    GND1
    GND2
    GND3
    GND4
    GND5
    GND6
    33pF;5%;50V;0201
    L6516
    L6515
    B NF B
    4.3nH;0.1nH;0201

    2
    4
    5
    7
    8
    9
    [67] RF_B7_PA_DPX L6517
    NF

    FL6506
    SAYEY2G53BC0F0AR05

    FL6533
    L6523 6 3
    [62] RF_B7_TRX_TXM L6524 SFHG60KQ602-A
    ANT TX
    0.6nH;0.1nH;0201 1
    RX RF_B7_PRX_RFIC [59] 6 3
    GND1
    GND2
    GND3
    GND4
    GND5

    UNBL_IN UNBL2_OUT
    3.3nH;0.1nH;0201
    L6525 L6529

    GND1

    GND2

    GND3

    GND4
    NF 3.3nH;0.1nH;0201 L6530
    2
    4
    5
    7
    8

    NF

    5
    B7 DPXL

    A A

    Title REV: V10


    Page Name = 65_TRX_MHB
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 65 of 81

    5 4 3 2 1
    8 7 6 5 4 3 2 1
    REVISIONS

    LTR DESCRIPTION DATE APPROVED

    A INITIAL RELEASE

    D D

    C C

    B B

    A A
    Title REV: V10
    Page Name = 66_Reserved
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 66 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    5 4 3 2 1

    B28B TX C6701
    12pF;5%;50V;0201
    [64] RF_B28B_PA_DPX

    L6702
    L6701 7.5nH;3%;0201
    10nH;3%;0201

    D
    B28A TX [64] RF_B28A_PA_DPX
    C6702
    12pF;5%;50V;0201
    D

    L6704
    L6703 7.5nH;3%;0201
    10nH;3%;0201

    B5/BC0 TX 1 R6701 2 1 R6702 2


    PA_THERM0 [16]

    [64] RF_B5_PA_DPX
    0;0.5A;0201 0;0.5A;0201

    C6703 C6704 C6705


    2.4pF;0.25pF;25V;0201 2.4pF;0.25pF;25V;0201 2.4pF;0.25pF;25V;0201

    RT6701
    100K;1%;0201 C6752

    B8 TX C6706
    12pF;2%;50V;0201
    100pF;5%;50V;0201

    [64] RF_B8_PA_DPX

    L6706
    L6705 7.5nH;3%;0201 Close to PA
    10nH;3%;0201
    0

    B20 TX
    R6703
    1 2 1 R6704 2
    [64] RF_B20_PA_DPX
    0;0.5A;0201 0;0.5A;0201

    L6707
    2.0NH;0.1nH;0201 L6708
    2.0NH;0.1nH;0201 C6707
    2.4pF;0.25pF;25V;0201

    C C

    R6705
    1 2
    [65] RF_B2_PA_DPX

    C6708
    0;0.5A;0201

    2.4pF;0.25pF;25V;0201
    C6709
    2.4pF;0.25pF;25V;0201[65]
    B1 TX RF_B1_PA_DPX
    1
    R6706
    2
    4G PA input need LPF for harmonic rejection

    0;0.5A;0201

    L6709 L6710
    L6711 C6710
    33pF;5%;50V;0201
    3/4G_PAIN_LB
    RF_LTE_LB_TX_RFIC [59]
    2.0NH;0.1nH;0201 2.0NH;0.1nH;0201 9.1nH;3%;0201

    C6711 C6712
    3.3pF;0.25pF;50V;0201 3.3pF;0.25pF;50V;0201

    B3 TX 1 R6707 2
    Phase3 LMH PA Pin20 is LB5
    [65] RF_B3_PA_DPX
    0;0.5A;0201
    U6701
    3/4G_PAIN_MB

    21
    20
    19
    18
    17
    16

    52
    51
    L6713 QM56020TR13-5K
    L6714
    L6712 2.0NH;0.1nH;0201 C6713

    LB5
    LB1
    LB2
    LB3

    GND21
    GND20
    MB1

    LB4
    RF_MB2_TX_RFIC [59]
    2.0NH;0.1nH;0201 4.3nH;0.1nH;0201 33pF;5%;50V;0201
    5

    1
    15
    22 GND3 14
    GND2

    GND1

    NC2

    NC1
    23 GND4 RFIN_L2 13 C6714 C6715
    24 MB2 RFIN_L1 12 1.8pF;0.05pF;50V;0201
    B34/39 TX L6715
    4 6 1
    R6708
    2
    25
    26
    GND5
    MB3
    RFIN_M
    NC4
    11
    10
    1.8pF;0.05pF;50V;0201

    [62] RF_B34B39_TX_TXM OUTPUT PORT INPUT PORT 27 MB4 NC3 9


    0;0.5A;0201 R6709
    2.2nH;0.1nH;0201 28 GND6 NC2 8
    VCC2_2 VBATT VPH_PWR [13,14,15,16,18,19,20,21,37,40,42,43,44,62,75]
    29 7
    LTE_VMIPI [62,70]

    2
    FL6701 C6718 30 VCC1 VIO 6 1 R6710 2 0;0.5A;0201
    C6717 2.4pF;0.25pF;25V;0201 RFFE2_CLK [3,62,70,75]
    C6716 C6719 RFLPF10051G8DM1T76 2.4pF;0.25pF;25V;0201 31 VCC2 SCLK 5 0;0.5A;0201

    N2
    GND7 SDATA RFFE2_DATA [3,62,70,75]
    2.4pF;0.25pF;25V;0201 2.4pF;0.25pF;25V;0201 32 4 C6720 C6753 D6701
    33 MB5 NC1 3 C6721 2.2uF;20%;6.3V;0201
    HB1 RFIN_H 0.1uF;20%;6.3V;0201 ESD5651N-2/TR
    34 2

    N1
    100pF;5%;50V;0201
    35 GND8 GND2 1 C6722 C6723
    36 HB2 GND1
    C6724 NF_0201 NF_0201

    1
    GND9
    1000pF;20%;50V;0201

    HBRX2
    HBRX1
    GND10

    GND11

    GND12
    GND13
    GND14
    GND15
    GND16
    GND17
    GND18
    GND19
    HB3

    HB4
    [75] VPA_APT_CH0

    37

    39

    41
    42
    38

    40

    43
    44
    45
    46
    47
    48
    49
    50
    2

    D6702 C6751
    N2

    NF C6746 C6748 C6733 C6728


    B 4.7uF;20%;6.3V;0402
    0.1uF;20%;6.3V;0201
    0.1uF;20%;6.3V;0201 100pF;5%;50V;0201
    100pF;5%;50V;0201
    3/4G_PAIN_HB B
    N1

    L6716
    1

    C6729
    RF_HB2_TX_RFIC [59]
    8.2pF;0.25pF;50V;0201
    3.3nH;0.1nH;0201

    C6730 C6731
    1.0pF;0.05pF;50V;0201
    1.0pF;0.05pF;50V;0201

    LPF for more


    margin on Tx
    FL6702 spurious
    B38/41(110M)TRX F6FC2G600H4PA

    C6734
    [62] RF_B41_TRX_TXM 1 R6711 2 4 1
    UNBL2 UNBL1
    0;0.5A;0201
    1.8pF;0.05pF;50V;0201
    GND3

    GND2

    GND1

    L6720
    L6717 L6718 L6719 1.8nH;0.1nH;0201 C6735
    1.5nH;0.1nH;0201 NF_0201 NF_0201 27pF;5%;50V;0201
    5

    U6703
    C6737
    MXD8015H
    4 3 C6736 1.8pF;0.05pF;50V;0201
    GND2 RFOUT RF_B40B41_PRX_RFIC [59]
    33pF;5%;50V;0201
    L6721

    B40 TRX FL6704


    885075
    3.3nH;0.1nH;0201
    5
    RFIN VDD
    2
    LTE_VFE28 [48,61,67,69]
    C6740
    2.4pF;0.25pF;25V;0201 C6739
    2.4pF;0.25pF;25V;0201
    C6742
    1 R6712 2 1 R6713 2 4 1 C6741 6 1
    [62] RF_B40_TRX_TXM UNBL2 UNBL1 EN GND1 100pF;30%;50V;0201
    0;0.5A;0201 0;0.5A;0201 2.4pF;0.25pF;25V;0201
    GND3

    GND2

    GND1

    C6743
    NF_0201 GRFC3 [3]
    L6725
    L6722 L6726 L6724 2.2nH;0.1nH;0201
    5

    NF_0201 L6723 1.8nH;0.1nH;0201 C6744


    1.8nH;0.1nH;0201 100pF;30%;50V;0201
    NF_0201

    A
    B38/40/41 PRX A

    R6715
    B7 TX [15] VREG_L21A_2P704
    0;0.5A;0201
    LTE_VFE28 [48,61,67,69]

    [65] RF_B7_PA_DPX C6745


    1.8pF;0.05pF;50V;0201

    Title REV: V10


    Page Name = 67_RF_MMPA_RF_TX
    L6727
    NF_0201 L6728
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D
    1.8nH;0.1nH;0201

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 67 of 81

    5 4 3 2 1
    5 4 3 2 1

    J6905
    4-00-45979

    D D
    1

    C6910 R6909
    2 1 2
    33pF;5%;50V;0201 0;0.5A;0201

    2
    R6910
    J6907 0;0.5A;0201
    4-00-45979

    1
    SAR_DIV_CIN0 [61]
    1

    L6901
    100nH;5%;0201
    J6901
    4-00-45979 J6902
    MM8030-2610RK0

    C6901 R6901 R6911 C6902 C6903 C6904 C6905


    1 1 2 1 2 2 1
    OUT IN RF_DRX [70]
    12pF;5%;50V;0201 0;0.5A;0201 0;1A;0402 10PF;5%;50V;0201 10PF;5%;50V;0201 33pF;5%;50V;0201 10PF;5%;50V;0201
    2

    GND2
    GND1
    L6904 L6905
    L6902 L6903

    4
    3
    NF NF
    68nH;5%;0201 NF

    J6903
    4-00-45979

    1
    R6903
    2 1 2
    0;0.5A;0201

    C C

    1
    R6904
    0;0.5A;0201

    2
    J6906
    4-00-45979

    J6904
    CONN-4P
    4
    3
    2
    1

    C6906
    27pF;5%;50V;0201

    L6909
    100nH;3%;0201

    L6908

    B
    100nH;3%;0201

    10 check封装 B
    U6902
    1 9
    RFC

    RF1 RF3
    2 8
    RF2 RF4
    3 7
    GND1 GND2

    1
    4 6
    VDD CTL2 R6905 R6906
    CTL1
    1

    0;0.5A;0201
    0;0.5A;0201
    R6907 R6908
    RF1694A

    2
    5

    0;0.5A;0201 0;0.5A;0201
    2

    LTE_VFE28 [48,61,67]

    C6907
    100pF;5%;50V;0201

    GRFC5 [3]

    C6908
    100pF;5%;50V;0201

    GRFC4 [3]

    C6909
    100pF;5%;50V;0201

    A A

    Title REV: V10


    Page Name = 69_Diversity_ANT
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 69 of 81

    5 4 3 2 1
    5 4 3 2 1

    D D

    U7001
    D5352
    C7001
    [72] RF_B1_B4_DRX_ASM 11 7 RF_DRX [69]
    B1 ANT
    15pF;5%;50V;0201
    [72] RF_B3_DRX_ASM 15
    B3

    [72] RF_B5_DRX_ASM 22
    B5
    L7002 L7001
    21 3.3nH;0.3nH;0201
    [72] RF_B8_DRX_ASM B8 3.3nH;0.3nH;0201
    17
    [72] RF_B34_DRX_ASM B34
    [72] RF_B39_DRX_ASM 18
    C B39 C
    12 2 RFFE2_DATA [3,62,67,75]
    [73] RF_B40_DRX_ASM B40 SDATA
    14 3 RFFE2_CLK [3,62,67,75]
    [73] RF_B41_DRX_ASM B41 SCLK

    [72] RF_B20_DRX_ASM 20 4 LTE_VMIPI [62,67]


    AUX1 VIO
    19 5
    [72] RF_B28_DRX_ASM AUX2 VDD
    C7002
    16 C7003
    [72] RF_B2_DRX_ASM AUX3 NF_0201 NF_0201
    C7004

    GNDP
    13

    GND1
    GND2
    GND3
    GND4
    [73] RF_B7_DRX_ASM AUX4

    GND
    18pF;5%;50V;0201

    1
    6
    8
    9
    10
    23
    C7005
    0.01uF;10%;16V;0201

    B B

    A A

    Title REV: V10


    Page Name = 70_Diversity ASM
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019


    Sheet 70 of 81

    5 4 3 2 1
    8 7 6 5 4 3 2 1
    REVISIONS

    LTR DESCRIPTION DATE APPROVED

    A INITIAL RELEASE

    D D

    C C

    B B

    A A
    Title REV: V10
    Page Name = 71_Reserved
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 71 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    5 4 3 2 1

    D D

    B34 C7203
    [70] RF_B34_DRX_ASM RF_B34_DRX_RFIC [59]
    4.7pF;0.25pF;50V;0201

    Band1/4 L7201

    [70] RF_B1_B4_DRX_ASM RF_B1B4_DRX_RFIC [59]


    2.2nH;0.1nH;0201

    B3 B39 2 R7205 1
    [70] RF_B39_DRX_ASM RF_B39_DRX_RFIC [59]
    L7217 0;0.5A;0201
    [70] RF_B3_DRX_ASM RF_B3_DRX_RFIC [59]
    3.9nH;0.1nH;0201

    C C

    B5/BC0 L7222
    [70] RF_B5_DRX_ASM RF_B5_DRX_RFIC [59]
    12nH;3%;0201

    B2

    2
    R7209 R7210
    0;0.5A;0201 0;0.5A;0201
    FL7203
    SAFFB1G96AB0F0A

    1
    R7201
    RF_B2_DRX_ASM [70] 2 1 1 4
    UNBL1 UNBL2 RF_B2_DRX_RFIC [59]
    0;0.5A;0201

    GND1

    GND2

    GND3
    L7209

    5
    3.3nH;0.3nH;0201

    B8 L7227
    L7211
    3.3nH;0.3nH;0201

    [70] RF_B8_DRX_ASM RF_B8_DRX_RFIC [59]


    6.2nH;0.1nH;0201

    B B

    B28 FL7204
    SAFFB806MAA0F0A

    B20 [70] RF_B28_DRX_ASM


    1 R7202 2
    0;0.5A;0201
    1
    UNBL1 UNBL2
    4
    RF_B28_DRX_RFIC [59]

    GND1

    GND2

    GND3
    FL7206
    SAFFB806MAA0F0A
    R7204
    1 2 1 4
    [70] RF_B20_DRX_ASM

    5
    UNBL1 UNBL2 RF_B20_DRX_RFIC [59]
    L7215
    0;0.5A;0201
    GND1

    GND2

    GND3

    3.3nH;0.3nH;0201

    C7211
    100pF;5%;50V;0201
    2

    A A

    Title REV: V10


    Page Name = 72_DRX_LMB
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 72 of 81

    5 4 3 2 1
    5 4 3 2 1

    D D

    B7 FL7301
    SFHG56BA002

    C7301 1 4
    [70] RF_B7_DRX_ASM UNBL1 UNBL2 RF_B7_DRX_RFIC [59]
    10PF;5%;50V;0201

    GND1

    GND2

    GND3
    2

    5
    L7302
    NF_0201

    C C

    B38/41
    C7304
    [70] RF_B41_DRX_ASM RF_B41_DRX_RFIC [59]
    10PF;5%;50V;0201

    B
    B40 B

    L7307
    [70] RF_B40_DRX_ASM RF_B40_DRX_RFIC [59]
    2.4nH;0.1nH;0201

    A A

    Title REV: V10


    Page Name = 73_DRX_HB
    DOCUMENT NO.: Design Name = S88512AA1_1_21_20190515_1605
    Size D

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 73 of 81

    5 4 3 2 1
    8 7 6 5 4 3 2 1
    REVISIONS

    LTR DESCRIPTION DATE APPROVED

    A INITIAL RELEASE

    D D

    C C

    B B

    A A
    Title REV: V10
    Page Name = 74_Reserved
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 74 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    5 4 3 2 1

    D D

    U7501
    QET4101-0-12WLNSP-TR-00-0

    QET4101

    1 10
    [13,14,15,16,18,19,20,21,37,40,42,43,44,62,67] VPH_PWR VDD_BATT DNC1

    9
    C7501 DNC2
    1.0UF;20%;6.3V;0201

    C7502
    4.7uF;20%;6.3V;0402
    l7501

    11 [67] VPA_APT_CH0
    VSW
    1.0UH;20%;2520
    C C

    5
    VOUT_LDO C7503
    33pF;5%;50V;0201

    12
    VBAT_SW

    C7504
    10uF;20%;6.3V;0402

    8
    GND_SW

    4
    [3,8,12,15,16,17,20,37,44,45,47,60,61,62,77] VREG_L9A_1P8 VDD_1P8
    VDD_DIG_1P8
    C7505
    1.0UF;20%;6.3V;0201

    6
    USID

    RFFE2_DATA [3,62,67,70] 2
    SDATA
    RFFE2_CLK [3,62,67,70] 3
    SCLK

    7
    GND

    B B

    A
    QPOET A

    Title REV: V1.0


    75_ET_APT
    DOCUMENT NO.: S88512AA1_1_21_20190515_1605 Size D

    DEPARTMENT: SH-HW DESIGNER: Liufenglei

    Date: Wednesday, May 15, 2019 Sheet 75 of 81


    5 4 3 2 1
    8 7 6 5 4 3 2 1
    REVISIONS

    LTR DESCRIPTION DATE APPROVED

    A INITIAL RELEASE

    D D

    C C

    B B

    A A
    Title REV: V10
    Page Name = 76_Reserved
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 76 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    5 4 3 2 1

    D D

    U7701

    WCN3950 MFG_NO

    R7701
    RF_CLK2 [16] C7701 38 27
    CLK_IN VDD13_PM VREG_L17A_1P304 [9,15]
    1000pF;20%;50V;0201
    0;0.5A;0201
    54
    VDD13_FM
    C7723
    16
    2.2pF;0.25pF;50V;0201 VDD11D_PM
    [9,15,79] VREG_L16A_1P8 C7702 C7706 C7709 C7707 C7708
    WLAN_RFIO_5G [78] 32 33 2.2uF;20%;6.3V;0201 4.7uF;20%;10V;0402
    WL_RFIO_5G VDD18_XTAL 0.01uF;10%;16V;0201 0.01uF;10%;16V;0201
    WLAN_BT_RFIO_2G_CH0 [78] 11 21 C7704 C7705 10PF;5%;50V;0201
    WL_BT_RFIO_2G VDD33_WL_PA
    2.2uF;20%;10V;0201
    0.47UF;20%;6.3V;0201
    25
    VDD33_WL_5G_DRV
    35 30
    GP_EN VDD13_WL_BT_GPS
    53 4
    GP_IN VDD33_WL_BT_2G_DRV_PM_LDO
    52 48
    GP_OUT VDD13_BT_FM_BBPLL_A
    VREG_L23A_3P304 [15,78]
    1.0UF;20%;6.3V;0201

    51 6 C7714 C7715 C7716 C7717


    [6] WL_Tx_BB_I_P WL_BB_IP_TX VDD18_IO C7719 C7720
    0.01uF;10%;16V;0201 10uF;20%;6.3V;0402
    C 0.01uF;10%;16V;0201 C
    56 42 10pF;2%;50V;0201 4.7uF;20%;10V;0402
    [6] WL_Tx_BB_I_N WL_BB_IN_TX GND_SEALRING1
    55 17
    [6] WL_Tx_BB_Q_P WL_BB_QP_TX GND_DIG_IO
    50
    [6] WL_Tx_BB_Q_N WL_BB_QN_TX
    VREG_L9A_1P8 [3,8,12,15,16,17,20,37,44,45,47,60,61,62,75]
    46 36
    [6] WL_Rx_BB_I_P WL_BB_IP_RX GND_WL_5G_DRV
    45 31
    [6] WL_Rx_BB_I_N WL_BB_IN_RX GND_WL_5G_PA
    39 26 C7712
    [6] WL_Rx_BB_Q_P WL_BB_QP_RX GND_WL_5G_BALUN
    0.47UF;20%;6.3V;0201 C7713
    44 41 4.7uF;20%;10V;0402
    [6] WL_Rx_BB_Q_N WL_BB_QN_RX GND_WL_DPD
    37
    GND_WL_5G_RXFE
    L7703
    58 40
    [39] FM_ANT FM_RX_HEADSET GND_WL_BT_BB
    68nH;5%;0201
    34
    GND_WL_BT_SYNTH_XTAL
    C7722
    1 15 XPST_CTRL [78]
    [6]
    2.2pF;0.25pF;50V;0201 WL_CMD_CLK WL_CMD_CLK GND_WL_BT_DRV

    [6] WL_CMD_DATA
    7 20
    WL_CMD_DATA GND_WL_BT_2G_PA
    5
    GND_WL_BT_2G_RXFE
    12 57
    [3] QCA_SB_CLK SB_CLK GND_FM_RXFE

    [3] QCA_SB_DATA
    22
    SB_DATA
    29
    GND_ISO
    2 43
    [6] WLAN_BT_COEX_CLK COEX_CLK GND_BT_FM_BBPLL_A
    8 49
    [6] WLAN_BT_COEX_DATA COEX_DATA GND_FM_VCO
    24
    [3] MSS_LTE_COXM_TXD COEX_RXD

    [3] MSS_LTE_COXM_RXD
    23 10
    COEX_TXD GND_BT_DA
    B B
    47
    GND_GPS
    13 9
    [2,16] SLEEP_CLK LF_CLK_IN GND_PMU

    18
    [3] WCN_UART_RX_N TXD
    14
    [3] WCN_UART_TX_N RXD

    [3] WCN_UART_CTS_N
    19
    RTS

    [3] WCN_UART_RFR_N 3
    CTS

    28
    [3] WCN_SW_CTRL SW_CTRL

    A A

    Title REV: V1.0


    77_WCN_IC
    DOCUMENT NO.: S88512AA1_1_21_20190515_1605 Size D

    DEPARTMENT: SH-HW DESIGNER: Liufenglei

    Date: Wednesday, May 15, 2019 Sheet 77 of 81


    5 4 3 2 1
    5 4 3 2 1

    D D

    J7806
    4-00-45979

    1 VREG_L23A_3P304 [15,77]

    2 C7802
    XPST_CTRL [77] 18pF;10%;50V;0201 C7801
    J7801
    4-00-45979 U7801
    4.7pF;0.25pF;50V;0201
    MXD8721

    R7805 R7809 6 1
    1 C7807 V1 RF1
    GPS_IN [79]
    0;0.5A;0201 0;0.5A;0201 5 2
    2 ANT GND R7802
    C7804
    4 3
    18pF;5%;50V;0201 V2 RF2 WLAN_RFIO_5G [77]
    L7808 4.7pF;0.25pF;50V;0201
    3.3nH;0.3nH;0201 L7809 L7813 0;0.5A;0201
    3.3nH;0.3nH;0201 L7812 NF_0201
    NF_0201 L7815
    NF

    J7808
    J7802
    C MM8030-2610RK0 FL7801 C

    R7807 DP1005-A2455EAT/LF
    1 R7811 2 1 4 1
    OUT IN COMMON H-PORT FL7802
    4-00-45979 0;0.5A;0201
    2

    GND2
    GND1
    F6HG2G441EG65
    0;0.5A;0201
    3 2 R7803 4 1 R7804 C7806
    GND L-PORT UNBL2 UNBL1 WLAN_BT_RFIO_2G_CH0 [77]
    R7814 L7810 0;0.5A;0201 18pF;10%;50V;0201

    4
    3
    0;0.5A;0201

    GND3

    GND2

    GND1
    NF_0201 R7815 3.3nH;0.3nH;0201 L7811
    NF_0201 3.3nH;0.3nH;0201

    L7804 L7805 L7806 L7807

    2
    NF_0201 12NH;3%;0201 12NH;3%;0201 4.7nH;0.1nH;0201

    J7804

    1
    4-00-45979
    2

    J7803

    1 R7810
    4-00-45979 0;0.5A;0201
    2

    B B
    J7805

    1
    4-00-45979
    2

    A A

    Title REV: V1.0


    78_WIFI
    DOCUMENT NO.: S88512AA1_1_21_20190515_1605 Size D

    DEPARTMENT: SH-HW DESIGNER: Liufenglei

    Date: Wednesday, May 15, 2019 Sheet 78 of 81


    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    U7901
    AW5005DNR
    R7905 C7901 [59] WTR_GPS
    1 6
    FL7903 GND1 RFOUT 15pF;5%;50V;0201
    0;0.5A;0201
    SAFFB1G56KB0F0A 2 5
    GND2 EN
    R7906 C7902 L7901 R7902 C7903
    GPS_IN [78] 1 4 3 4 1.0pF;0.05pF;50V;0201
    UNBL1 UNBL2 RFIN VCC
    0;0.5A;0201 8.2nH;3%;0201 0;0.5A;0201

    GND1

    GND2

    GND3
    3.9pF;0.05pF;50V;0201
    C7904
    L7902 L7903 L7904

    5
    8.2nH;3%;0201 NF_0201 8.2nH;3%;0201 3.9pF;0.05pF;50V;0201

    GNSS_ELNA_CTRL [58]

    [9,15,77] VREG_L13A_1P8

    C7906
    F6QA1G582H2JMQJS high attenuation SAW is required for saw +glna solution.
    100pF;30%;50V;0201

    B B

    A
    GNSS A

    Title REV: V1.0


    79_GPS
    DOCUMENT NO.: S88512AA1_1_21_20190515_1605 Size D

    DEPARTMENT: SH-HW DESIGNER: Liufenglei

    Date: Wednesday, May 15, 2019 Sheet 79 of 81


    5 4 3 2 1
    8 7 6 5 4 3 2 1
    REVISIONS

    LTR DESCRIPTION DATE APPROVED

    A INITIAL RELEASE

    D D

    C C

    B B

    A A
    Title REV: V10
    Page Name = 80_Reserved
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 80 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06
    8 7 6 5 4 3 2 1
    REVISIONS

    LTR DESCRIPTION DATE APPROVED

    A INITIAL RELEASE

    D D

    C C

    B B

    A A
    Title REV: V10
    Page Name = 81_Reserved
    DOCUMENT NO.: Size Custom
    Design Name = S88512AA1_1_21_20190515_1605

    DEPARTMENT: DEPARTMENT = WINGTECH-SH DESIGNER: DESIGNER = Linguijun

    Date: Page Modify Date = Wednesday, May 15, 2019Sheet 81 of 81

    8 7 6 5 4 3 2 1
    VERSION EDITED BY LAST EDIT DATE

    1 LAST_EDITOR 2-23-2007_10:06

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