IET Power Electronics

Research Article

ISSN 1755-4535
Analysis, design and realisation of a zero- Received on 9th December 2014
Revised on 11th March 2015
current transition pulse-width modulation Accepted on 30th March 2015
doi: 10.1049/iet-pel.2014.0938
interleaved boost power factor correction www.ietdl.org

converter with a zero-current transition

auxiliary circuit
Chien-Ming Wang 1 ✉, Chang-Hua Lin 2, Chi-Hsiang Cheng 1
1
Department of Electrical Engineering, National Ilan University, 1, Sec. 1, Shen-Lung Road, I-Lan, 260, Taiwan
2
Department of Electrical Engineering, Tatung University, 40, Sec. 3, Chungshan N. Rd., Taipei, Taiwan
✉ E-mail: cmwang@niu.edu.tw

Abstract: A zero-current transition (ZCT) pulse-width modulation (PWM) interleaved boost power factor correction (PFC)
converter with a ZCT auxiliary circuit is presented to achieve ripple current cancelation and ZCT for power switches.
The proposed PFC converter adopts a ZCT auxiliary circuit to realise ZCT for power switches and diodes. Thus, the
switching losses of active power switches are reduced and the reverse recovery losses of power diodes are eliminated.
The interleaved PWM control scheme with constant frequency and constant duty cycle is used in it. Thus, the control
circuit is simple and the circuit cost can be reduced. It shapes a close sinusoidal input current waveform, so that an
input current waveform with low harmonic can be obtained. The operational principle and design consideration are
discussed in detail. Finally, experimental results taken from a 1000 W prototype are presented to confirm the
effectiveness of the proposed PFC converter.

1 Introduction
Switching power supplies with high-power density are essential
equipment for server systems, telecommunication systems and
medical power systems. Active power factor correction (PFC)
circuits are usually used in switching power supply to reduce AC
input current harmonics and regulate DC output voltage. Boost
PFC converters are the most popular active PFC circuits. They are
used in the front end of switching power supply to draw a
sinusoidal AC input current for meeting the IEC61000-3-2 limits.
According to whether the inductor current is continuous or not, the
operation modes of boost PFC converter are classified into
continuous current mode (CCM), critical current mode (CRM) and
discontinuous-current-mode (DCM). The CCM boost PFC
converter [1–5] suits high- and medium-power applications.
However, its switch always operates at hard switching and its
diode suffers from reverse recovery. As a consequence, this results
in higher EMI and reduces the efficiency of the converter.
Adapting the CRM or DCM boost PFC converters can minimise
these drawbacks. The CRM and DCM boost PFC converters have
such advantages as zero-current turning-on of the switch and no
reverse recovery of the diode. The switching frequency of the
CRM boost PFC converter is variable. The design of the inductor
and EMI filter is more difficult. Moreover, the DCM boost PFC
converter [6–9] is operated in constant switching frequency which
is beneficial for designing the inductor and EMI filter. However, in
DCM boost PFC converter, the inductor current ripple is higher.
The current stresses of the switch and diode are also higher. The
conduction losses are higher. Moreover, the switches turn-off
losses are not minimised. For reducing the input current ripple and
conduction losses, the interleaved boost PFC converters are
proposed and shown in Fig. 1a [10–26]. The zero-current
transition (ZCT) techniques can be used to minimise these losses
at turn-off [20–26]. In [20–23], they adopt two ZCT auxiliary
circuits to achieve ZCT feature. Thus, the cost of circuit is higher.
For overcoming this drawback, several interleaved boost
converters with a ZCT auxiliary circuit have been proposed in
[24–26]. In [24], the diode of the ZCT auxiliary circuit is put on
the main power flow path. The conduction losses will be
increased. In [25], the ZCT auxiliary circuit uses three inductors.
Thus, the cost of circuit is higher.
For improving previous drawbacks, a ZCT pulse-width
modulation (ZCT-PWM) interleaved boost PFC converter with a
ZCT auxiliary circuit is presented in [26]. The proposed PFC
converter uses only a ZCT auxiliary circuit to realise ZCT for
power switches and diodes. Thus, the switching losses of active
power switches are reduced and the reverse recovery losses of
power diodes are eliminated. Moreover, the proposed ZCT
auxiliary circuit only includes a power switch, a resonant inductor,
a resonant capacitor and two power diodes. Thus, it is very simple
and compact. The interleaved PWM control scheme is adopted to
shape a close sinusoidal input current waveform, so that an input
current waveform with low harmonic can be obtained.
This paper in [26] only briefly discusses and describes the circuit
operation principle of the proposed ZCT-PWM interleaved boost
PFC converter. In this paper, the circuit operation principle, the
design consideration and the experiment results about the proposed
PFC converter will be discussed and described in detail. Finally,
experimental results taken from a 1000 W prototype are presented
to confirm the effectiveness of the proposed PFC converter.
2 Principle of proposed ZCT-PWM interleaved
boost PFC converter
The circuit configuration of the presented ZCT-PWM interleaved
boost PFC converter is shown in Fig. 1b. It composes of a
conventional interleaved boost PFC converter circuit and a ZCT
auxiliary circuit. The circuit of conventional interleaved boost PFC
converter includes two identical boost PFC converter circuits. Both
the boost PFC converter circuits are formed by a bridge rectifier
(DA, DB, DC, DD), two input inductors (Lin1, Lin2), two main
switches (S1, S2), two main diodes (D1, D2) and an output
capacitor (Co). For minimising the switches turn-on losses and the

IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785

& The Institution of Engineering and Technology 2015 1777
Fig. 1 Circuit topology of the
a Conventional interleaved boost PFC converter
b Proposed ZCT-PWM interleaved boost PFC converter

reverse recovery losses of diodes, they are operated at DCM. As the The equivalent circuit for operating states of the proposed boost
proposed boost PFC converter circuit is focused on higher boost PFC converter and key waveforms are shown in Figs. 2–4,
conversion ratio application, their operational duty cycles are respectively. The equivalent circuits of the proposed boost PFC
larger than 0.5. Moreover, they are controlled by an interleaved converter in one switching cycle, divide into 16 operating states.
PWM control scheme to shape a close sinusoidal form input The circuit operations in one switching cycle can be described as
current waveform, so that an input current waveform with low follows.
harmonic can be obtained. Thus, in the interleaved boost PFC
converter circuit, a boost PFC converter circuit is connected in
parallel with another boost PFC converter circuit and operated in 2.1 Circuit operation principles of the proposed
the same way as another boost PFC converter circuit with 180o ZCT-PWM interleaved boost PFC converter
phase shift. Both the boost PFC converter circuits can share output
2.1.1 Stage 1: [tk0, tk1], Fig. 2a: Prior to stage 1, switches S1 and
power, so that the current stresses in the active power switches can
Sa are in off state and switch S2 is in on state. Diodes D1 and D2 are
be reduced. In addition, the partial current ripple can be eliminated.
reversed biased. The input supplies energy to the inductor Lin2. The
The components of the ZCT auxiliary circuit include Da1, Da2, Lr,
resonant inductor current iLr is equal to zero. The resonant capacitor
Cr and Sa. The ZCT auxiliary circuit not only generates the ZCT
voltage vCr is equal to zero.
feature for power switches and diodes, but also limits the current
This stage begins at tk0 when switch S1 is turned on under ZCT.
stresses of S1 and S2. Thus, the switching losses of active switches
Switches S2, Sa and diodes D1, D2 hold previously their states.
are reduced and the reverse recovery losses of diodes are eliminated.
Thus, the input supplies energy to inductors Lin1 and Lin2. The
As the circuit operation principle of the presented PFC converter
input inductor currents, resonant inductor current and resonant
circuit in positive half cycle of input line voltage is the same as one
capacitor voltage in this stage are expressed as
in negative half cycle of input line voltage, the circuit operation
description is only aimed at positive half cycle of input line
Vink
voltage. Moreover, in order to simplify the system analysis, the iLin1 (t) = (t − tk0 ) (1)
assumptions are made as follows: Lin1


V T
1. Conductive voltage drops on diodes and switches are neglected. iLin2 (t) = ink s + t − tk0 (2)
2. Ripple voltage of output voltage is neglected because of the large Lin2 2
output capacitance.
3. Input inductances Lin1 and Lin2 are much larger than resonant iLr (t) = 0 (3)
inductance Lr, so that input inductor currents iLin1 and iLin2 can be
assumed as the constant values in a resonant period. vCr (t) = 0 (4)
4. The input voltage in the kth switching period is assumed as the
constant value Vink because of the switching frequency is much Ts
Dtk1 ; tk1 − tk0 = DTs − (5)
larger than the line voltage frequency. 2

IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785

1778 & The Institution of Engineering and Technology 2015
Fig. 2 Commutation stage diagrams of stage 1 to stage 4 of the proposed ZCT-PWM interleaved boost PFC converter

2.1.2 Stage 2: [tk1, tk2], Fig. 2b: This stage begins when switch iLin1 (tk3 ) + iLin2 (tk3 ). The input inductor currents, resonant inductor
Sa is turned on under ZCT at tk1. Cr and Lr are resonants. vCr increases current and resonant capacitor voltage in this stage are expressed as
towards its peak value. iLr also increases towards its negative peak
and then decreases when it reaches its negative peak. This stage Vink
ends when the resonant inductor current drops to zero at tk2. The iLin1 (t) = (t − tk0 ) (13)
Lin1
input inductor currents, resonant inductor current and resonant

capacitor voltage in this stage are expressed as V T
iLin2 (t) = ink s + t − tk0 (14)
Lin2 2
Vink
iLin1 (t) = (t − tk0 ) (6) Vo
Lin1 iLr (t) = sin vr (t − tk2 ) (15)

 Zo
V T
iLin2 (t) = ink s + t − tk0 (7) vCr (t) = Vo + Vo cos vr (t − tk2 ) (16)
Lin2 2


Vo 1 Zo (iLin1 (tk2 ) + iLin2 (tk2 ))
iLr (t) = − sin vr (t − tk1 ) (8) Dtk3 ; tk3 − tk2  sin−1 (17)
Zo vr Vo
vCr (t) = Vo − Vo cos vr (t − tk1 ) (9)
p
Dtk2 ; tk2 − tk1 = (10) 2.1.4 Stage 4: [tk3, tk4], Fig. 2d: In this stage, the resonant
vr operation of ZCT auxiliary circuit is still continuous. However, the
  resonant path is changed again. It is via Lr, Cr, D3, and output port
where Zo = Lr /Cr and vr = 1/ Lr Cr . (Co and RL). In this time, no current flows through S1, S2, and Sa.
In this stage, the negative peak of resonant inductor current iLr is at S2 and Sa can be turned off under ZCT at tk3. vCr continuously
t = tk2 + π/2ωr. It can be expressed as decreases towards zero. iLr continuously increases towards its peak

 and then decreases when it reaches its positive peak. This stage
p V finishes when iLr drops to iLin1 (tk4 ) + iLin2 (tk4 ) again. The input
ILr ,peak1 = iLr tk1 + =− o (11)
2vr Zo inductor currents, resonant inductor current and resonant capacitor
voltage in this stage are expressed as
The peak of resonant capacitor voltage vCr is at t = tk2. It can be
expressed as Vink
iLin1 (t) = (t − tk0 ) (18)
Lin1
VCr ,peak = vCr (tk2 ) = 2Vo (12)

V T
iLin2 (t) = ink s + t − tk0 (19)
2.1.3 Stage 3: [tk2, tk3], Fig. 2c: In this stage, the resonant Lin2 2
operation of ZCT auxiliary circuit in stage 2 is continuous. Vo
However, the resonant path is changed via Lr, Cr, Da1, Da2, S1, S2 iLr (t) = sin vr (t − tk3 ) (20)
Zo
and output port (Co and RL). Thus, vCr decreases towards zero. iLr
increases towards its peak. This state ends when iLr reaches vCr (t) = Vo + Vo cos vr (t − tk3 ) (21)

IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785

& The Institution of Engineering and Technology 2015 1779


p 2 Zo (iLin (tk2 ) + iLin2 (tk2 )) and resonant capacitor voltage in this stage are expressed as
Dtk4 ; tk4 − tk3  − sin−1 (22)
2vr vr Vo
Vink
iLin1 (t) = (t − tk0 ) (29)
In this stage, the positive peak of resonant inductor current iLr is at Lin1
t = tk3 + π/2ωr. Moreover, it can be expressed as
iLin2 (t)  iLin2 (tk2 ) (30)


p V iLr (t) = iin2 (tk2 ) (31)
ILr ,peak2 = iLr tk3 + = o (23)
2vr Zo
iin2 (tk2 )
vCr (t)  vCr (tk6 ) − (t − tk6 ) (32)
Cr
2.1.5 Stage 5: [tk4, tk5], Fig. 3a: The resonant operation of ZCT
vCr (tk6 )Cr
auxiliary circuit is still continuous in this stage. However, the Dtk6 ; tk6 − tk5  (33)
resonant path is changed again. It is via Lr, Cr, Da1, S1 and output iin2 (tk2 )
port (Co and RL). vCr continuously decreases towards zero. iLr
continuously decreases towards zero. This stage finishes when iLr
drops to iLin2 (tk5 ). The input inductor currents, resonant inductor
current and resonant capacitor voltage in this stage are expressed as 2.1.7 Stage 7: [tk6, tk7], Fig. 3c: In this stage, the input
continuously supplies energy to the inductor Lin1. The output stage
Vink receives energy from inductors Lin2 and Lr as well as input.
iLin1 (t) = (t − tk0 ) (24) Therefore the input inductor current iLin2 and the resonant inductor
Lin1
current iLr simultaneously decrease towards zero. Moreover, they
reach zero at tk7 and this stage ends. The input inductor currents,
iLin2 (t)  iLin2 (tk2 ) (25) resonant inductor current and resonant capacitor voltage in this
stage are expressed as
Vo
iLr (t) = sin vr (t − tk3 ) (26)
Zo Vink
iLin1 (t) = (t − tk0 ) (34)
Lin1
vCr (t) = Vo + Vo cos vr (t − tk3 ) (27)

 Vo
p 2 Zo iLin (tk2 ) iLin2 (t)  iLin2 (tk2 ) − (35)
Dtk5 ; tk5 − tk4  − sin−1 (28) Lin2 + Lr
2vr vr Vo
Vo
iLr (t)  iLin2 (tk2 ) − (36)
Lin2 + Lr
2.1.6 Stage 6: [tk5, tk6], Fig. 3b: In this stage, the input supplies vCr (t) = 0 (37)
energy to the inductor Lin1. The resonant capacitor Cr is discharged
by input current iLin2 . Therefore vCr decreases towards zero and iLin2 (tk2 )(Lin2 + Lr )
reaches zero at tk6. Da2 turns off under ZVT and D2 turns on Dtk7 ; tk7 − tk6  (38)
under ZVT. The input inductor currents, resonant inductor current Vo

Fig. 3 Commutation stage diagrams of stage 5 to stage 8 of the proposed ZCT-PWM interleaved boost PFC converter

IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785

1780 & The Institution of Engineering and Technology 2015
2.1.8 Stage 8: [tk7, tk8], Fig. 3d: In this stage, the input
continuously supplies energy to the inductor Lin1. Switches S2 and
Sa are in off state. Diodes D1 and D2 are reversed biased. The
resonant inductor current iLr and the resonant capacitor voltage vCr
are equal to zero. This stage ends when S2 is turned on under ZCT
at tk8. The input inductor currents, resonant inductor current and
resonant capacitor voltage in this stage are expressed as
2.2 Commutation analysis
According to the previous circuit operation analysis and the
waveforms shown in Fig. 4a, the positive peak of resonant current
must be larger than the maximum input current. The ZCT feature
can be achieved. Thus, the constraint which is the inequality
shown in (44) on proposed PFC converter must be satisfied as

Vink
iLin1 (t) = (t − tk0 ) (39) Vo
. iin, max (44)
Lin1 Zo

iLin2 (t) = 0 (40)

Moreover, the turn-on time interval can be defined as Dton,Sa and be
obtained as follows
iLr (t) = 0 (41)


vCr (t) = 0 p 1 Z i (t )
(42) Dton,Sa = Dtk2 + Dtk3 = + sin−1 o in k2 (45)
vr vr Vo

Ts  7
Dtk8 ; tk8 − tk7  − Dtkj (43) when iin(t) = iin,max, Dton,Sa is maximum and it is defined as
2 j=1
Dton,Sa, max . iin,max is the maximum input current. In addition,
Dton,Sa, max must be less than DTs according to the waveforms
As the playing roles of both the boost PFC converters in proposed
PFC converter only exchanged between states 1 to state 8 and shown in Fig. 4a for avoiding to affect the circuit operation. D is
state 9 to state 16. The operation principles of state 9 to state 16 the duty cycle of proposed interleaved boost PFC converter. Thus
are the same as them of state 1 to state 8. Thus, the circuit
operation descriptions of state 9 to state 16 are neglected for
simplifying the description. After state 16, the circuit operation is Dton,Sa, max ≤ (1 − D)Ts (46)
gone back state 1.

Fig. 4 Key waveforms

a Relevant waveforms of proposed ZCT-PWM interleaved boost PFC converter under the kth switching period in positive half cycle of input line voltage
b Ripple current waveforms

IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785

& The Institution of Engineering and Technology 2015 1781
3 Design considerations and experimental results
An example of ZCT-PWM interleaved boost PFC converter is
designed and realised. Its specifications listed below:
† Input ac voltage: vin(t) = 155sin(2π*60t).
† Output dc voltage: Vo = 400 V.
† Maximum output power: Po,max = 1000 W.
† Switching frequency: fs = 40 kHz.
The implemented power stage circuit of proposed PFC converter
is shown in Fig. 1b. For minimising the switches turn-on losses and
the reverse recovery losses of diodes, it is operated at DCM. As it is
focused on higher boost conversion ratio application, the operational
duty cycle must be larger than 0.5.
The proposed PFC converter circuit adopts two identical boost
PFC converter circuits which are operated at interleaved mode
with 180o phase shift. Thus, the components in both the boost
PFC converter circuits are the same. In addition, the current
ripples of input inductors are the same. Thus
DILin1 = DILin2 = DILin (47)
Fig. 5 Measured waveforms of input voltage and current
a Waveforms of input voltage vin(t) and input current i′in(t)
vin: 50 V/div; i′in:10 A/div, time: 4 m/div
b Input current iin, inductor currents iLin1 , iLin2
iin, iLin1 , iLin2 : 20 A/div, time: 2 ms
c Input current iin, inductor currents iLin1 , iLin2
iin, iLin1 , iLin2 : 10 A/div, time: 10 μs/div
1782
The design procedure of proposed PFC converter is described as
follows with previously described circuit characteristics.
(1) Considerations on the input current ripple and the selection of
the input inductors L = Lin1 = Lin2: Under the maximum input line
voltage, here assumes the circuit is just operated on CRM in this
period. The duty cycle D can be calculated as follows, according
to conversion ratio of boost converter


Vin,peak
D= 1− = 0.6125 (48)
Vo
The maximum input inductor current is also happened in this
moment. Thus, the both maximum input inductor currents can be
also denoted as follows
Vin,peak
iLi n1, max = iL in2, max = iLin, max = DTs (49)
L
As both the boost PFC converters in proposed ZCT-PWM
interleaved boost PFC converter are connected in parallel and then
are operated in identical PWM control scheme with a phase delay.
The output power can be shared out between both the boost PFC
converters. Thus, the maximum input inductor current can be
IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785
& The Institution of Engineering and Technology 2015
obtained as follows be obtained as follows
 w 
√ Po, max DIin,max = iLin1,max + iLin2,max − 2iLin1,max
360D
iLin1,max = iL in2,max = iL in,max  2 × 2× = 12.86 A (50) (53)
2Vin.rms  w  2Vin,peak  w 
= 2iLin,max 1 − = DTs 1 −
360D L 360D
Thus where j is the phase delay degree between operation periods of both
boost PFC converters and the phase delay degree is selected as 180o
in this case.
Vin,peak Thus, the input ripple current can be calculated as
L= DTs = 184.6 mA (51)
iLin,max
2Vin,peak  w 
DIin,max  DTs 1 − = 4.84 A (54)
L 360D
Thus, Lin1 = Lin2 = L = 180 μH is selected.
Owing to the proposed PFC converter is operated in DCM, the
input inductor current ripple is equal to the maximum input (2) Selection of output capacitor: The selection factors of the output
inductor current. Thus capacitor are the switching frequency ripple current, the second
harmonic ripple current, the output ripple voltage and the hold-up
time. The hold-up time factor often dominates the selection of
output capacitor. Thus, the output capacitor Co in proposed
DILin1,max = DILin2,max = iLin,max (52) ZCT-PWM interleaved boost PFC converter will select according
to hold-up requirements. In general case, the hold-up time
parameter Δt is two times the time period of the line input voltage.
Moreover, the input current is the summation of two input inductor
currents. As the proposed PFC converter is operated at interleaved 2Po,max Dt
mode, the input ripple current can be reduced. The relative current Co ≥ (55)
waveforms are shown in Fig. 4b. Thus, the input ripple current can Vo2 − Vo,2 min

Fig. 6 Commutation waveforms of the main power switches (S1, S2) (VDS1 , VDS2 : 250 V/div;IDS1 , IDS2 : 5 A/div, time:4 μs/div) and main power diodes (D1, D2)
(VD1 , VD2 : 250 V/div; IDS1 , VDS2 : 10 A/div, time:2 μs/div)

IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785

& The Institution of Engineering and Technology 2015 1783
where Δt is the hold-up time, Po,max is the maximum output power,
Vo is the output voltage and Vo(min) is the minimum output voltage
that the load equipment can normal operate.
In this case, Δt = 34 ms, Po = 1000 W, Vo = 400 V and Vo(min) =
300 V. Thus, Co is 971 μF. Moreover, Co = 940 μF is selected.
(3) Selection of the resonant parameters: According to (45), Dton,Sa
depends on the parameter ωr. Therefore using a larger ωr can reduce
the influence of the ZCT auxiliary circuit. It is recommended that the
ωr is higher than 3 × 2πfs. Thus, ωr = 5 × 2πfs is selected in this case.
Thus
1 Figs. 5b and c. Both the boost PFC converters in proposed PFC
vr =  = 10p fs = 1256637.1 rad/s
Lr Cr
In addition, for achieving the ZCT feature, the constraint which is the
inequality shown in (44) on proposed ZCT-PWM interleaved boost
PFC converter must be satisfied. Thus

Lr V Vo
Zo = ≤ o  = 15.55 V
Cr iin,max iLin1,max + iLin2,max
Thus, expression (57) divided by (56) leads to
Vo
Lr ≤ = 12.38 mH
10p fs (iLin1,max + iLin2,max )
Lr = 10 μH is selected. Substituting Lr into (56), Cr can be obtained as
Cr = 63.32 nF. Cr = 66 nF is selected in this case.
(4) Selection of power switches and diodes: The main selection
factors of power switches and diodes are the maximum currents
through them and the maximum voltages across them. According
to previous circuit operation analysis, the maximum currents
through the main power switches and diodes and the maximum
voltages across them in proposed ZCT-PWM interleaved boost
PFC converter can be obtained as follows
iDS1 ,max = iDS2 ,max = iLin,max = 12.86 A
vDS1 ,max = vDS2 ,max  Vo = 400 V
iD1, max = iD2, max  iLin,max = 12.86 A
vD1, max = vD2, max  2Vo = 800 V
Moreover, according to previous circuit operation analysis, the
maximum currents through the auxiliary power switches and
diodes and the maximum voltages across them can be obtained as
follows
Vo
iDSa ,max  ILr ,peak1 = = 32.49 A
Zo
vDSa ,max  Vo = 400 V
Vo
iDa1, max = iDa2, max  ILr ,peak2 /2 = = 16.25 A
2Zo
vDa1, max = vDa2, max  2Vo = 800 V
The commercial IGBTs and the fast recovery diodes with voltage
stress greater than 400 V in our laboratory are IRG4PC50UD with
600 V voltage stress and 27 A current stress and DSEP30-12A
with 1200 V voltage stress and 30 A current stress. Thus, they are
used for power switches (S1, S2 and Sa) and diodes (D1, D2, Da1
and Da2) in this case.
1784
The experimental results based on a 1000 W laboratory prototype
are provided to verify the effectiveness of the proposed PFC
converter. The specification and circuit parameters of the prototype
circuit are obtained from the previous section. The measured
waveforms of input voltage and current of the presented PFC
converter at full load are shown in Fig. 5a. The input voltage and
current are almost in phase. The power factor is 0.997. The high
power factor of input current features has been achieved. The
measured waveforms of input current iin, inductor currents
iLin1 and iLin2 at full load are shown in Figs. 5b and c. iin is equal to
iLin1 + iLin2 and iLin1 is close to iLin2 from the measured results in
(56)
converter share certainly the output power. The proposed PFC
converter has a good current sharing control feature. In addition,
the proposed PFC converter is certainly operated in an interleaved
PWM control mode from the waveforms of iLin1 and iLin2 in
Fig. 5c. The measured commutation waveforms of the power
switches (S1, S2, Sa) and the power diodes (D1, D2) are shown in
Figs. 6 and 7a, respectively. These results demonstrate that ZCT
features for the active power switches (S1, S2, Sa) and the power
(57) diodes (D1, D2) have been achieved. Therefore the switching
losses for the power switches have been reduced and the reverse
recovery losses of power diodes have been eliminated. In Figs. 6c
and d, the resonance of the internal capacitance of high voltage
probe and the stray inductance of circuit causes the resonant
waveforms occurred in vD1 and vD2 after the currents vD1 and vD2
(58)
(59)
(60)
(61)
(62)
(63)
(64)
(65)
(66)
Fig. 7 Measured commutation waveforms and experimental efficiency
a Commutation waveforms of the auxiliary switch Sa
VDSa: 250 V/div; IDSa:10 A/div, time: 2 μs/div
b Experimental efficiency comparison of proposed ZCT-PWM interleaved boost PFC
converter and the hard switching interleaved boost PFC converter
IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785
& The Institution of Engineering and Technology 2015
decrease to zero, respectively. However, it does not affect the circuit
operation. The system efficiency of proposed ZCT-PWM boost PFC
converter is also measured and shown in Fig. 7b. The system
efficiency is 93.5% at full load. Thus, the high efficiency feature
has also been achieved.
4 Conclusion
A ZCT-PWM interleaved boost PFC converter with a ZCT auxiliary
circuit has been proposed. The ZCT auxiliary circuit has been
employed to achieve the ZCT feature for power switches and
diodes. Therefore the switching losses and reverse recovery losses
can be reduced. The interleaved PWM scheme has been also used
to control proposed ZCT-PWM interleaved boost PFC converter.
Thus, the input ripple current and size of output capacitor can be
reduced. Operation principle and design consideration of the
proposed ZCT-PWM interleaved boost PFC converter have been
presented in detail. Finally, the experimental results were proposed
to verify the effectiveness of the proposed ZCT-PWM interleaved
boost PFC converter.
5 References
1 Kazerani, M., Ziogas, P.D., Joos, G.: ‘A novel active current waveshaping
technique for solid-state input power factor conditioners’, IEEE Trans. Ind.
Electron., 1991, 38, pp. 72–78
2 Lu, D.D.-C., Cheng, D.K.-W., Lee, Y.-S.: ‘A single-switch
continuous-conduction-mode boost converter with reduced reverse-recovery and
switching losses’, IEEE Trans. Ind. Electron., 2003, 50, (4), pp. 767–776
3 Villarejo, J.A., Sebastian, J., Soto, F., de Jodar, E.: ‘Optimizing the design of
single-stage power-factor correctors’, IEEE Trans. Ind. Electron., 2007, 54, (3),
pp. 1472–1482
4 Wu, T.F., Hung, J.C., Tseng, S.Y., Chen, Y.M.: ‘A single-stage fast regulator with
PFC based on an asymmetrical half-bridge topology’, IEEE Trans. Ind. Electron.,
2005, 52, (1), pp. 129–150
5 Zientarski, J.R.R., Beltrame, R.C., Cândido, D.B., da S Martins, M.L., Hey, H.L.:
‘Design methodology for universal line input boost power factor correction
magnetics’, IET Power Electron., 2011, 4, (6), pp. 715–724
6 Clark, C.W., Musavi, F., Eberle, W.: ‘Digital DCM detection and mixed
conduction mode control for boost PFC converters’, IEEE Trans. Power
Electron., 2014, 29, (1), pp. 347–355
7 Yao, K., Ruan, X., Mao, X., Ye, Z.: ‘Variable-duty-cycle control to achieve high
input power factor for DCM boost PFC converter’, IEEE Trans. Ind. Electron.,
2011, 58, (5), pp. 1856–1865
8 Gusseme, K.D., Van de, S., David, M., Van den Bossche, A.P.M., Melkebeek, J.
A.: ‘Input-current distortion of CCM boost PFC converters operated in DCM’,
IEEE Trans. Ind. Electron., 2007, 54, (2), pp. 858–865
IET Power Electron., 2015, Vol. 8, Iss. 9, pp. 1777–1785
& The Institution of Engineering and Technology 2015
9 Liang, T.J., Yang, L.S., Chen, J.F.: ‘Analysis and design of a single-phase AC/DC
step-down converter for universal input voltage’, IET Electric Power Appl., 2007,
1, (5), pp. 778–784
10 Lee, P.W., Lee, Y.S., Cheng, D.K.W., Liu, X.C.: ‘Steady-state analysis of an
interleaved boost converter with coupled inductors’, IEEE Trans. Ind. Electron.,
2000, 47, (4), pp. 787–795
11 Veerachary, M., Senjyu, T., Uezato, K.: ‘Modeling and analysis of interleaved dual
boost converter’, Proc. IEEE Int. Symp. Ind. Electron., 2001, 2, pp. 718–722
12 Perreault, D.J., Kassakian, J.G.: ‘Distributed interleaving of paralleled power
converters’, IEEE Trans. Circuits Syst. I, Fund. Theory Appl., 1997, 44, (8),
pp. 728–734
13 Chang, C., Knights, M.A.: ‘Interleaving technique in distributed power conversion
systems’, IEEE Trans. Circuits Syst. I, Fund. Theory Appl., 1995, 42, (5),
pp. 245–251
14 Miwa, B.A., Otten, D.M., Schlecht, M.F.: ‘High efficiency power factor correction
using interleaving techniques’. Proc. Appl. Power Electron. Conf. Expo., 1992,
pp. 557–568
15 Pinheiro, J.R., Gründling, H.A., Vidor, D.L.R., Baggio, J.E.: ‘Control strategy of
an interleaved boost power factor correction converter’. Proc. IEEE Power
Electron. Spec. Conf., 1999, pp. 137–142
16 Genc, N., Iskender, I.: ‘DSP-based current sharing of average current controlled
two-cell interleaved boost power factor correction converter’, IET Power
Electron., 2011, 4, (9), pp. 1015–1022
17 Kanaan, H.Y., Sauriol, G., Al-Haddad, K.: ‘Small-signal modelling and linear
control of a high efficiency dual boost single-phase power factor correction
circuit’, IET Power Electron., 2009, 2, (6), pp. 665–674
18 Do, H.-L.: ‘Interleaved boost converter with a single magnetic component’, IET
Power Electron., 2011, 4, (7), pp. 842–849
19 Choi, S., Agelidis, V.G., Yang, J., Coutellier, D., Marabeas, P.: ‘Analysis, design
and experimental results of a floating-output interleaved-input boost-derived
DC-DC high-gain transformer-less converter’, IET Power Electron., 2011, 4, (1),
pp. 168–180
20 de Oliveira Stein, C.M., Pinheiro, J.R., Hey, H.L.: ‘A ZCT auxiliary commutation
circuit for interleaved boost converters operating in critical conduction mode’,
IEEE Trans. Power Electron., 2002, 17, (6), pp. 954–962
21 Canesin, C.A., Goncalves, F.A.S.: ‘Modeling of pre-regulator boost ZCS
interleaved operating in critical conduction mode and with high power factor’.
Proc. IEEE Annual Conf. of the Industrial Electronics Society, 2002, pp. 305–310
22 Canesin, C.A., Goncalves, F.A.S.: ‘Single-phase high power-factor boost ZCS
pre-regulator operating in critical conduction mode’. Proc. IEEE Int. Symp. on
Industrial Electronics, 2003, pp. 746–751
23 Yao, G., Shen, Y., Li, W., He, X.: ‘A new soft switching snubber for the interleaved
boost converters’. Proc. 35th Annual IEEE Power Electron. Spec. Conf., 2004,
pp. 3765–3769
24 Rezvanyvardom, M., Adib, E., Farzanehfard, H., Mohammadi, M.: ‘Analysis,
design and implementation of zero-current transition interleaved boost
converter’, IET Power Electron., 2012, 5, (9), pp. 1804–1812
25 Rezvanyvardom, M., Adib, E., Farzanehfard, H.: ‘New interleaved zero-current
switching pulse-width modulation boost converter with one auxiliary switch’,
IET Power Electron., 2011, 4, (9), pp. 979–983
26 Wang, C.-M., Lin, C.-H., Kuo, H.-C., Lin, C.-I.: ‘Zero-current transition
interleaved boost dc/dc converter’. Proc. IEEE Conf. on Industrial Electronics
and Applications (ICIEA), 2014, pp. 278–281
1785