2021 A High-Efficiency Self-Synchronous RF-DC Rectifier With A Fixed Broadband Phase Offset

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324 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 31, NO.

3, MARCH 2021

A High-Efficiency Self-Synchronous RF-DC


Rectifier With a Fixed Broadband
Phase Offset
Muhammad Furqan Haider , Graduate Student Member, IEEE, Shuo Zhang, Fei You , Senior Member, IEEE,
Qian He, Shi-Wei Dong, Senior Member, IEEE, and Ying Wang

Abstract— This letter presents a broadband self-driving radio


frequency-to-direct current (RF-dc) rectifier design realized on
the CG2H40010F Cree’s GaN device. First, the transistor mod-
eling parameters for the reverse-biased I–V characteristics have
been obtained to achieve the high-frequency rectification at
negative drain biasing. Besides, an enhanced self-synchronization
is achieved across the operating bandwidth through an additional
microstrip open-stub line at the gate input matching network.
Thus, an additional line maintains a fixed 180◦ phase offset
between drain and gate voltages. Finally, the rectifier efficiency
of >60% has been measured from 2.65 to 2.95 GHz for 10-W
RF input power. The designed rectifier has been outperformed Fig. 1. Architecture of an EEHEMT model.
the recent designs in terms of operational bandwidth (300 MHz)
and rectification efficiency. rectification progress [5], [10]. Together these two compo-
Index Terms— EEHEMT model, high-efficiency, microwave nents form a dc–dc converter, if proper waveform duality
energy transfer, radio frequency-to-direct current (RF-DC) of I –V curves across the odd-quadrants is achieved [11].
rectifier. Thus, taking the advantage of harmonic-tuned PA classifica-
I. I NTRODUCTION tions, such as Doherty or continuous modes Class-E/F/F−1 ,
the self-synchronous rectifier can be designed [5], [7]–[10].
T HE current research trends in radio frequency (RF)
energy harvesting have shown promising outcomes in
the over-the-air powering of electronic applications [1]–[9].
Meanwhile, it is not always feasible to drive the rectifier
directly after PA, as it might introduce interconnection line
losses, which deteriorates the load impedance terminations.
A high-power RF-to-direct current (RF-dc) rectifier is a poten-
For this reason, transistor practical parameters, such as para-
tial circuit for wireless power transmission (WPT). Practically,
sitics and nonlinear transconductance effects, should be con-
it has been deployed in daily life applications, such as the
sidered to achieve the symmetrical waveform duality of the
charging on mobile phone with low power level [2] and
cascaded components [8].
charging on high-voltage electric vehicles [3].
In this letter, a self-driving transistor build RF-dc rectifier
For a long period, diode-based rectifiers have been used
is presented. First, a reverse bias I D –VDS characteristics is
to endure the RF energy harvesting [1], [6]. However, with
obtained to satisfy the dc–dc interconversion system. Then,
the advent of high-power applications, it has become ardu-
the nonlinear parameters, such as package parasitics and feed-
ous for the diodes to withstand high current (I ) and volt-
back capacitances, are analyzed for optimum load termination
age (V ) stress. For this purpose, GaN transistors have largely
points. Finally, the gate input matching network is designed
replaced diodes to provide high-power rectification at high
to offer a 180◦ phase difference between the drain and gate
frequencies [5], [7]–[9].
voltage over the bandwidth of interest. Finally, the Doherty
It has been shown in recent works that how the codesigns
PA (DPA) is used to drive the RF-dc rectifier, with synchro-
of the power amplifier (PA) and RF-dc rectifier influence the
nized gate driving and uniform phase offset.
Manuscript received December 6, 2020; revised December 29, 2020;
accepted December 31, 2020. Date of publication January 20, 2021; date of
current version March 11, 2021. This work was supported by the National Nat-
II. M ODIFIED EEHEMT A NALYSIS AND I D –VDS
ural Science Foundation of China under Grant 51777168 and Grant 61571080. C HARACTERISTICS M ODELING
(Corresponding author: Fei You.)
Muhammad Furqan Haider, Shuo Zhang, Fei You, and Qian He are The GaN HEMT has broad prospects for practical applica-
with the School of Electronic Science and Engineering, University of Elec- tions [12]. Besides, it provides a significant tolerance against
tronic Science and Technology of China, Chengdu 611731, China (e-mail: high-voltage stress, which can be beneficial for the rectification
haidarfurqan@gmail.com; feiyou@uestc.edu.cn).
Shi-Wei Dong and Ying Wang are with the National Key Laboratory of at microwave frequency bands. For the circuit analysis of
Science and Technology on Space Microwave, Xi’an 710071, China (e-mail: this work, essential time-domain expressions of the EEHEMT
sw.dong@163.com; wangying_c504@163.com). device model are obtained from [13], which are carried in
Color versions of one or more figures in this letter are available at
https://doi.org/10.1109/LMWC.2020.3049051. Keysight’s advanced design system (ADS). The structure of
Digital Object Identifier 10.1109/LMWC.2020.3049051 the EEHEMT model is displayed in Fig. 1.
1531-1309 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

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HAIDER et al.: HIGH-EFFICIENCY SELF-SYNCHRONOUS RF-DC RECTIFIER 325

TABLE I
F ITTED EEHEMT N ONLINEAR M ODEL PARAMETERS AT P OSITIVE AND N EGATIVE D RAIN –S OURCE V OLTAGES

A. Circuit Analysis
For the simplified circuit analysis, the most important para-
meters, such as the reverse mode I D –VDS curves, package
parasitics, and nonlinear feedback charges Q gy and Q gc ,
are considered. The device characterization starts from the
derivation of drain current equations. It is worth mentioning
that only the critical dc part of the drain current is considered
for the fitted parameters, as we intend to achieve the symmetric
I –V curves across the odd-quadrants [8]. Besides, the rest of Fig. 2. (a) Measured (circle) and fitted (line) dc I –V waveform of device
the parameters, such as parasitics and feedback charge effects, under negative drain bias. (b) Simulated dc I –V data across the origin.
are deduced from the vendors’ characterization.
where Vcs (t) and Vyd (t) are internal time-domain voltages,
The intrinsic time-domain drain–source current relation
as illustrated in Fig. 1.
driven by the internal gate voltage Vgint and drain voltage Vdint
can be written as
B. Fitting Results
IDS (t) = f (Vgint (t) · Vdint (t)). (1)
The measured dc current waveform with fitted results under
Here, the function f(·) represents the transistor intrinsic part, negative drain voltages is shown in Fig. 2. The dc test is
which also includes the device nonlinear constraints, such performed with pulsed voltage to prevent the abrupt increase in
as knee voltage and transconductance. Therefore, it can be transistor temperature from affecting the drain–source current.
expanded as [14] Hence, the pulsed isothermal dc measurements are taken at
  the room temperature of 25 ◦ C to obtain the empirical I –V
I D = −Idss · B Vgint + A · Vdint
3
· VGS (2) data of CG2H40010F. The quiescent drain bias of 0 V and
the pinched-off gate bias of −3.4 V is given to generate
whereas careful computation of A and B is needed as they
the pulse signal. Meanwhile, the pulselength is 200 μs with
are critical to the gate synchronization. Besides, variable A
a 2-s time-step period. During the measurements, VDS was
identifies the behavior of a current waveform across the origin,
swept from −20 to 0 V with a 0.5-V step, while VGS
while B calculates the drain saturation effects through the tanh
was swept from −5 to −0.5 V by a 0.5-V step, as shown
function as follows [15]:
in Fig. 2(a). The minor fitting errors can be observed mainly
A = cval(Apos , Aneg , VDS , αtrval ) (3) because of thermal variations in the limited pulsewidth setting.
  These thermal effects can be mitigated through a proper
3VDS
B = tanh . (4) device modeling [15], [16], which is not the scope of this
Vsat
work. The device fitted parameters at negative drain voltage
To ensure the high-frequency simulation accuracy, the non- are highlighted in Table I. Hence, by employing the fitted
linear feedback charge paths, Q gy and Q gc , also known data of negative drain voltages into the original EEHEMT
as intrinsic nonlinear capacitance’s need to be accurately model of CG2H40010F, we can obtain the dc I –V curves
extracted. The charge parameters are determined through a across the operation region of the RF-dc rectifier, as shown
series of nonlinear expressions [14]–[16], which are excluded in Fig. 2(b). Furthermore, the dc I –V curves parameters
here. For this reason, only an implicit relationship is defined, at positive drain voltages, such as nonlinear capacitances
which can be written as and package parasitics, can also be found in Table I. The
⎧ S-parameters simulation is also conducted at input–output port

⎪ Q gy = Q D , Q gc = Q S

⎨ Q (V , V ) = Q (V , V ) impedance points of the modified and manufacturer EEHEMT
D gint yd S gint cs
(5) models. Thus, different drain–source and gate–source voltage

⎪ Q gy (t) = qy(Vgint (t) − Vyd (t), Vgint (t) − Vcs (t))


biases are given to evaluate the variations between the two
Q gc (t) = qc(Vgint (t) − Vcs (t), Vgint (t) − Vyd (t)) models, as depicted in Fig. 3. It can be seen that there is not

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326 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 31, NO. 3, MARCH 2021

Fig. 3. Comparison of S-parameters variations among modified and vendors’


model.

Fig. 5. Experimental setup with the manufactured rectifier.

Fig. 6. Output dc power and rectification efficiency versus frequency at the


10-W RF input power. Also, the device measured load conditions are shown
explicitly.
Fig. 4. Circuit dimensions of the proposed rectifier module with the simulated
impact on phase offset and rectification efficiency due to the open-stub line.
TABLE II
C OMPARISON W ITH THE M OST R ECENT RF-DC R ECTIFIERS
much variation among the two models, which depicts the load
termination points’ effectiveness. This allows us to perform the
successive operations of self-synchronization and phase offset.

III. R ECTIFIER D ESIGN AND T ESTING


Based on the modified EEHEMT symmetric model, the rec-
tifier circuit is designed, and the schematic with final dimen-
sions of the matching and coupling network is presented
in Fig. 4. A substrate of Rogers RO4350B with a thickness
of 0.50 mm and a dielectric constant r of 3.66 is used. It can
be noticed that an additional open stub line is added, whose
presence dramatically improves the transistor phase offset at
the gate input line. In other words, the 180◦ phase difference
between the drain and gate voltages greatly enhances the the simulations, possibly due to the power leakages after the
rectification efficiency, as can be seen in Fig. 4. Therefore, prototype modeling.
different from our previous publication [8], this design offers Since most of the recent transistor-based rectifiers are
a significant all-round rectification over a wide bandwidth. designed at a single frequency, therefore, our design out-
The laboratory measurement setup is shown in Fig. 5. The performs recent works in terms of frequency bandwidth and
high-power RF input signal is amplified through the driver and peak rectification efficiency. The comparison with the recently
DPA before being fed into the coupler. Moreover, R&S power reported self-driving rectifiers is presented in Table II.
and spectrum analyzer FSP7 in calibration with the directional
coupler is used to measure the real-time input RF power.
IV. C ONCLUSION
Finally, an electronic load IT8510 is brought up to calculate
the rectifier dc output power. The comparison between simu- An RF-dc broadband high-efficiency rectifier is realized
lated and measured performance is shown in Fig. 6. As can be after a DPA prototype. A symmetrical reconstruction of
seen across the frequency band, the rectifier has a measured I –V curves is achieved in the first and third quadrants. Then,
efficiency of higher than 60%. Interestingly, the peak rectifica- an additional open-stub line is added to maintain a fixed phase
tion efficiency of close to 85% for an 8.49-W dc output power offset for self-synchronous gate driving. Finally, the measure-
can be observed at 2.85 GHz. Though, at high-frequency ments have shown the self-driving rectification efficiency of
points, the measurement results are about 10% lower than >60% across the 2.65–2.95-GHz operating frequency band.

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HAIDER et al.: HIGH-EFFICIENCY SELF-SYNCHRONOUS RF-DC RECTIFIER 327

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