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2021 A High-Efficiency Self-Synchronous RF-DC Rectifier With A Fixed Broadband Phase Offset
2021 A High-Efficiency Self-Synchronous RF-DC Rectifier With A Fixed Broadband Phase Offset
2021 A High-Efficiency Self-Synchronous RF-DC Rectifier With A Fixed Broadband Phase Offset
3, MARCH 2021
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HAIDER et al.: HIGH-EFFICIENCY SELF-SYNCHRONOUS RF-DC RECTIFIER 325
TABLE I
F ITTED EEHEMT N ONLINEAR M ODEL PARAMETERS AT P OSITIVE AND N EGATIVE D RAIN –S OURCE V OLTAGES
A. Circuit Analysis
For the simplified circuit analysis, the most important para-
meters, such as the reverse mode I D –VDS curves, package
parasitics, and nonlinear feedback charges Q gy and Q gc ,
are considered. The device characterization starts from the
derivation of drain current equations. It is worth mentioning
that only the critical dc part of the drain current is considered
for the fitted parameters, as we intend to achieve the symmetric
I –V curves across the odd-quadrants [8]. Besides, the rest of Fig. 2. (a) Measured (circle) and fitted (line) dc I –V waveform of device
the parameters, such as parasitics and feedback charge effects, under negative drain bias. (b) Simulated dc I –V data across the origin.
are deduced from the vendors’ characterization.
where Vcs (t) and Vyd (t) are internal time-domain voltages,
The intrinsic time-domain drain–source current relation
as illustrated in Fig. 1.
driven by the internal gate voltage Vgint and drain voltage Vdint
can be written as
B. Fitting Results
IDS (t) = f (Vgint (t) · Vdint (t)). (1)
The measured dc current waveform with fitted results under
Here, the function f(·) represents the transistor intrinsic part, negative drain voltages is shown in Fig. 2. The dc test is
which also includes the device nonlinear constraints, such performed with pulsed voltage to prevent the abrupt increase in
as knee voltage and transconductance. Therefore, it can be transistor temperature from affecting the drain–source current.
expanded as [14] Hence, the pulsed isothermal dc measurements are taken at
the room temperature of 25 ◦ C to obtain the empirical I –V
I D = −Idss · B Vgint + A · Vdint
3
· VGS (2) data of CG2H40010F. The quiescent drain bias of 0 V and
the pinched-off gate bias of −3.4 V is given to generate
whereas careful computation of A and B is needed as they
the pulse signal. Meanwhile, the pulselength is 200 μs with
are critical to the gate synchronization. Besides, variable A
a 2-s time-step period. During the measurements, VDS was
identifies the behavior of a current waveform across the origin,
swept from −20 to 0 V with a 0.5-V step, while VGS
while B calculates the drain saturation effects through the tanh
was swept from −5 to −0.5 V by a 0.5-V step, as shown
function as follows [15]:
in Fig. 2(a). The minor fitting errors can be observed mainly
A = cval(Apos , Aneg , VDS , αtrval ) (3) because of thermal variations in the limited pulsewidth setting.
These thermal effects can be mitigated through a proper
3VDS
B = tanh . (4) device modeling [15], [16], which is not the scope of this
Vsat
work. The device fitted parameters at negative drain voltage
To ensure the high-frequency simulation accuracy, the non- are highlighted in Table I. Hence, by employing the fitted
linear feedback charge paths, Q gy and Q gc , also known data of negative drain voltages into the original EEHEMT
as intrinsic nonlinear capacitance’s need to be accurately model of CG2H40010F, we can obtain the dc I –V curves
extracted. The charge parameters are determined through a across the operation region of the RF-dc rectifier, as shown
series of nonlinear expressions [14]–[16], which are excluded in Fig. 2(b). Furthermore, the dc I –V curves parameters
here. For this reason, only an implicit relationship is defined, at positive drain voltages, such as nonlinear capacitances
which can be written as and package parasitics, can also be found in Table I. The
⎧ S-parameters simulation is also conducted at input–output port
⎪
⎪ Q gy = Q D , Q gc = Q S
⎪
⎨ Q (V , V ) = Q (V , V ) impedance points of the modified and manufacturer EEHEMT
D gint yd S gint cs
(5) models. Thus, different drain–source and gate–source voltage
⎪
⎪ Q gy (t) = qy(Vgint (t) − Vyd (t), Vgint (t) − Vcs (t))
⎪
⎩
biases are given to evaluate the variations between the two
Q gc (t) = qc(Vgint (t) − Vcs (t), Vgint (t) − Vyd (t)) models, as depicted in Fig. 3. It can be seen that there is not
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326 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 31, NO. 3, MARCH 2021
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HAIDER et al.: HIGH-EFFICIENCY SELF-SYNCHRONOUS RF-DC RECTIFIER 327
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