PSPICE

Electrical Circuit Simulator

V+ (27) Q14 Q10 Q11 Q12 (22) (3) (17) Q15 NON INVERTING INPUT Q1 (1) Q2 (2) INVERTING INPUT Q20 (21) Q16 R10 50 R6 40K (20) (24) Q3 Q4 (6) COMP 30pF (23) Q22

R5 39K

(4)

(5)

OUTPUT

R9 25

Q21 (7) Q7 (8) Q18

(25)

(15) Q23 (9) Q5 OFFSET NULL (10) R1 1K R2 50K Q6 Q8 Q9 (14) Q19 (13)

OFFSET NULL (12) (11) R3 1K R4 3K Q13 R7 40K (18) R8 50 Q17 R11 50K

V(26)

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CONTENTS

1 2

INTRODUCTION INSTALLING PSPICE 2.1 System Requirements 2.2 Doing the Installation 2.2.1 If You Have a Fixed Disk 2.2.2 If You Do Not Have A Fixed Disk 2.3 Comments 2.4 Using the Backup Copy RUNNING PSPICE 3.1 File Name Conventions 3.2 The Extended Display Driver 3.3 Running PSpice With a Fixed Disk 3.4 Running PSpice Without a Fixed Disk 3.5 Creating the Input File DATA 4.1 Introduction 4.2 Names 4.3 Nodes 4.4 Values 4.5 Devices 4.5.1 Passive 4.5.2 Semiconductor 4.5.3 Voltage and Current Sources 4.5.3.1 Controlled 4.5.3.2 Independent 4.6 Models COMMANDS 5.1 Introduction 5.2 Specifying the Various Analysis 5.2.1 DC Sweep 5.2.2 Bias Point 5.2.3 Small Signal Transfer Function 5.2.4 Sensitivities 5.2.5 AC Analysis (Frequency Response) 5.2.6 Noise 5.2.7 Transient (Time) Response 5.2.8 Fourier Components
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7 8 8 8 9 9 10 10 12 12 12 13 13 14 14 15 15 15 16 16 17 17 17 18 18 19 20 20 20 21 21 21 21 22 22 22 23

5.3 5.4

5.5 6

Temperature Format of the Output 5.4.1 Description of the Circuit 5.4.2 Direct Output 5.4.3 Print Tables and Plots 5.4.3.1 Print Tables 5.4.3.2 Plots 5.4.4 Run Statistics Options

23 24 24 25 25 25 26 27 27 28 28 28 28 29 30 33 35 37 39 41 47

REFERENCE 6.1 Introduction 6.2 Notation 6.3 Statements Title C Capacitor D DIODE 31 E Voltage-Controlled Voltage Source F Current-Controlled Current Source G Voltage-Controlled Current Source H Current-Controlled Voltage Source I Independent Current Source J Junction FET 44 K Mutual Inductor (Transformer) L Inductor 48 M MOSFET 49 Q Bipolar Transistor 54 R Resistor 58 T Transmission Line 59 V Independent Voltage Source X Subcircuit Call 63 .AC AC Analysis .DC DC Analysis .END End of Circuit .ENDS End of Subcircuit Definitions .FOUR Fourier Analysis .IC Initial Transient Conditions .MODEL Model .NODESET Nodeset .NOISE Noise Analysis .OP Bias Point .OPTIONS Options .PLOT Plot .PRINT Print .PROBE Probe .SENS Sensitivity Analysis .SUBCKT Subcircuit Definition .TEMP Temperature
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60 64 65 66 67 68 69 70 71 72 73 74 76 77 78 79 80 81

.TFTransfer Function 82 .TRAN Transient Analysis .WIDTH Width * Comment 85 6.4 Output Variables 6.4.1 DC Sweep and Transient Analysis 6.4.2 AC Analysis 6.4.3 Noise Analysis 89 6.5 Job Statistics Summary 90 7 HINTS 7.1 Large Circuits 7.2 Large Outputs 7.3 Convergence Problems 93 7.3.1 DC Sweep 7.3.2 Bias Point 7.3.3 Transient Analysis 7.3.4 We Want to Know 7.4 Negative Component Values 7.5 Multiple Circuits in an Input File PROBE 8.1 Introduction 8.2 Installation 8.2.1 If You Have a Fixed Disk 8.2.2 If You Do Not Have a Fixed Disk 8.2.3 Setting Up the Device File 8.3 Running Probe 8.3.1 If You Have a Fixed Disk 8.3.2 IF You Do Not Have a Fixed Disk 8.3.3 More on Running Probe 8.3.4 Avoiding File Size Limits 8.4 An Example 8.5 Probe Menus and Commands 8.5.1 General Comments on the Input 8.5.2 Start-up Menu 8.5.3 Plot Menu 8.5.4 Axis Menu 8.6 Suggestions 8.6.1 Hysteresis Curves 8.6.2 Curve Families 112 8.6.3 Load Lines 8.6.4 Timing Diagrams113 EXAMPLE1

83 84 86 86 88

92 92 92 93 94 94 94 95 95 96 96 96 96 96 96 98 99 99 99 100 101 104 104 105 106 109 110 110 112

Appendix A

114 116 116

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Appendix B MORE EXAMPLES B.1 Introduction

B.2 B.3 B.4 B.5 B.6 B.7

Non-linear Controlled Source Inductors and Transformers Medium-size Bipolar Circuit Subcircuits Noise Medium-size Mosfet Circuit PSPICE vs SPICE

116 116 117 119 122 123 124 125 125 125 125 125 126 126 126 126 127 127

Appendix C

Appendix D User Changeable Models D.1 Introduction D.2 Installation D.2.1 If You Have a Fixed Disk D.2.2 If You Do Not Have a Fixed Disk D.2.3 Preparing the Program Diskettes D.3 Making Device Model Changes D.3.1 Changing a Parameter's Name D.3.2 Giving a Parameter an Alias D.3.3 Adding a Parameter D.3.4 Changing the Device Equations

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Chapter 1

INTRODUCTION
PSpice allows you to simulate your circuit designs before touching the first piece of hardware. The response over time to different inputs, the frequency response, the noise, and other information about your circuit are all available. In effect, PSpice allows you to do a "computer breadboard" of the circuit before building anything. This user's guide is divided into 3 parts: chapters 2-5 are a tutorial on PSpice, chapters 6-7 and the appendices are for later reference on PSpice, and chapter 8 is on the Probe graphics post-processor. The best way to become familiar with PSpice is to read chapters 2-5 in order. This will take you, step by step, through: installing PSpice, running an example circuit, and how to use PSpice. Once you are familiar with PSpice, chapters 6 and 7 will become more useful. Chapter 6 contains complete descriptions of all the PSpice input statements. Chapter 7 gives some help in dealing with less common situations. Familiarity with MSDOS is recommended but not required, to install and run PSpice.

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Chapter 2

INSTALLING PSPICE
2.1 System Requirements PSpice will run on any IBM PC, PC/XT, or PC/AT with 512 kilobytes of memory, the floating-point co-processor, and the MSDOS 2.0 (or later) operating system. Either the monochrome or the color graphics display may be used. No special brand of printer or special printer features are needed. PSpice will also run on IBM-compatible systems, as long as they meet the above requirements. The program has been run on some unusual pieces of hardware and the result is that, if the system will run MSDOS 2.0, has the memory, and has the floatingpoint co-processor, then it will run PSpice. Note that PSpice is delivered on IBMformat diskettes. This is not compatible with a few systems, such as the HP 150, which do run MSDOS. 2.2 Doing the Installation In the package which you received, you should find: 1) This user's guide 2) A diskette labeled "Diskette 1" containing: CONFIG.SYS PSPICE1.EXE PSPICE.BAT PSPICE.FLP README.DOC EXAMPLE1.CIR EXAMPLE1.OUT 3) A diskette labeled "Backup Copy Diskette 1" containing: CONFIG.SYS PSPICE1.EXE PSPICE.BAT PSPICE.FLP README.DOC EXAMPLE1.CIR EXAMPLE1.OUT 4) A diskette labeled "Diskette 2" containing:

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PSPICE2.EXE 5) If you have bought Option 1 (user-changeable Models), diskettes labeled "Diskette 3", "Diskette 4", and "Diskette 5". See Appendix D for more information on the files on these diskettes. 6) If you have bought Option 2 (Probe), a diskette labeled "Diskette 3"containing: PROBE.BAT PROBE.FLP PROBE.DEV PROBE.EXE After you have completed the instructions in this chapter and in chapter 3, you will want to follow the installation instructions in chapter 8 to install Probe. Installing PSpice consists mainly of making working copies of these files. Before beginning, print and read the file README.DOC. It contains last-minute information which did not make it into (this edition) of the user's guide. 2.2.1 If You Have a Fixed Disk In this case the installation is simple: just copy PSPICE1.EXE, PSPICE2.EXE, and PSPICE.BAT onto the fixed disk in the directory where you normally keep your program files. If you do not have a CONFIG.SYS file in your root directory, copy CONFIG.SYS from Diskette 1 into your root directory. If you do already have a CONFIG.SYS file, examine the one on Diskette 1 and add any statements which it contains to yours (DEVICE=\ANDI.SYS, BUFFFERS=10, and FILES=10). Copy EXAMPLE1.CIR from Diskette 1 into a directory where you will normally keep circuit files (this will usually be your default directory when you are running PSpice). Print EXAMPLE1.OUT. Later, you will want to compare it against the result of running EXAMPLE1.CIR. The diskettes Diskette 2 and Backup Copy Diskette 1 are your backup copies and should be stored in a safe place. Keep Diskette 1 handy, you will nedd it whenever you run the program. 2.2.2 If you Do Not Have a Fixed Disk In this case, you need to move CONFIG.SYS form Diskette 1 to your system diskette and copy COMMAND.COM from your system diskette to Diskette 1. Before doing this, print EXAMPLE1.OUT. Later on, you will want to compare it against the result of running EXAMPLE1.CIR. First, move the file CONFIG.SYS form Diskette 1 to your system diskette. Your system diskette is the one you use to boot your system. Assuming that your system diskette is in drive A: and Diskette 1 is in Drive B:, the commands are: COPY B:CONFIG.SYS A:CONFIG.SYS DEL B:CONFIG.SYS
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Next, copy the file COMMAND.COM from your system diskette to Diskette 1: COPY A:COMMAND.COM B:COMMAND.COM Next, delete PSPICE.BAT and rename PSPICE.FLP to be PSPICE.BAT: DEL B:PSPICE.BAT REN B:PSPICE.FLP PSPICE.BAT Also, if your system diskette does not already contain the file ANSY.SYS, copy it there from your DOS diskette. Finally, make a backup copy of Diskette 2. This backup copy and the diskette Backup Diskette 1 you should keep in a safe place. 2.3 Comments PSpice is composed of 2 programs: PSPICE1.EXE and PSPICE2.EXE which communicate through temporary files. You can put these program (.EXE) files on any diskette or directory you choose, so long as you arrange that they are run in sequence (first PSPICE1.EXE and then PSPICE2.EXE) and so long as Diskette 1 is in drive A: when PSPICE1.EXE begins execution. The above, very specific, instructions are only one way of arranging them. However, it is the way which is assumed in the next chapter on running PSpice, so it is recommended that you follow it until you become familiar with running the program. The CONFIG.SYS file configures the system when it is booted. The DEVICE=\ANSI\SYS statement loads in the extended display driver, the BUFFERS=10 statement gives PSpice enough disk buffering to work efficiently, and the FILES=10 statent allows PSpice to open all the files that it needs. If the file ANSI.SYS is not in the root directory, you must change the statement in the CONFIG.SYS file to give correct directory, for example: DEVICE=\DOS\ANSI.SYS Do not forget to copy EXAMPLE1.CIR. You will be running it in the next chapter. This finishes the installation procedure for PSpice. If you have purchased Option 1 (User-changeable Models) or Option 2 (Probe) you will want to read Appendix D (for Option 1) and Chapter 8 (for Option 2) for instructions on how to install these options. If you wish, you can ignore them for now and go on to chapter 3 and run PSpice. 2.4 Using the Backup Copy Although the files on Diskette 1 can be copied, the diskette itself cannot be. So, if Diskette 1 is damaged, send it back to MicroSim and it will be replaced. In the meantime, you will need to use Backup Copy Diskette 1. If you have a PC, you will
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want to go through the installation procedure again to put the file COMMAND.COM on Backup Copy diskette 1. If you have an XT, repeating the installation procedure is not necessary. Diskette 2 can be copied. So, if it is damaged, just make another copy from your backup.

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Chapter 3

RUNNING PSPICE
3.1 File Name Conventions Running PSpice requires you to specify 2 files: an input file and an output file. You may default either or both of the files' extensions and you may default the entire output file. The input file will default the extension to .CIR. So, these input file names are equivalent: EXAMPLE1.CIR EXAMPLE1 In both cases PSpice will get its input from the file EXAMPLE1.CIR. The output files' extension will default to .OUT and the entire output file name will default to the input file name with extension being replaced by .OUT. So, if the input file name is EXAMPLE1 or EXAMPLE1.CIR these output file names are equivalent: EXAMPLE1.OUT EXAMPLE1 <no file name> In all these cases PSpice will write its output to the file EXAMPLE1.OUT. You can direct the output to a printer instead of a file. To do this, use the DOS predefined printer name as the output name. For instance, the norma DOS name for the primary printer is PRN. To run EXAMPLE1 with output going to the printer, type PSPICE EXAMPLE1 PRN If your run will create a lot of output and you are worried about filling up the diskette with it, directing the output to the printer may be a solution. It is convenient to have the input and output files in the default directory, but this is not necessary. You could, for instance, start PSpice with: PSPICE \PROJ13\SLOWAMP 3.2 The Extended Display Driver In chapter 2 you put the file CONFIG.SYS on the root directory of your fixed disk or system diskette. When your system is booted, this file calls in the extendet CRT driver
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(ANSI.SYS) to replace the standard driver. The extende driver allows PSpice to format the screen properly. So, if you have not re-booted your system since following the instructions in chapter 2, do that now. 3.3 Running PSpice With a Fixed Disk Running PSpice with a fixed disk is straightforward. The command is: PSPICE <input file> <output file> Note that the file PSPICE>BAT must be in either the default directory, or a directory which was included in an earlier PATH command. The above command will cause PSPICE.BAT to call, in turn, PSPICE1>EXE and then PSPICE2.EXE. PSPICE1.EXE creates 2 temporary files: PSPICEA.TMP and PSPICEB.TMP in the default directory. PSPICE2.EXE reads these temporary files and writes the final result to the output file. Before ending, PSPICE2.EXE deletes the temporary files. Diskette 1 must be in drive A: when PSpice starts. As soon as PSpice begins drawing the screen it may be removed. Diskette 1 must not be write protected. Try this command now with input file EXAMPLE1.CIR. Insert Diskette 1 in drive A: and type: PSPICE EXAMPLE1 After about 20 seconds, the screen should be cleared and redrawn with a status display. If this does not happen, check that your files are in the proper directories, that you have set the default directory to the one containing EXAMPLE1.CIR, and that PSPICE.BAT is in a directory that DOS will search for programs and commands. Let EXAMPLE1 run to completion (about 5 minutes) and print EXAMPLE1.OUT on your printer. Compare it to the EXAMPLE1.OUT from the diskette which you printed out while installing PSpice. 3.4 Running PSpice Without a Fixed Disk First, put the input file on Diskette 1. Next, place Diskette 1 in drive A:. Then, place Diskette 2 in drive B:. Finally, start PSpice with the command: PSPICE <input file> <output file> Note that PSPICE.BAT must be in a directory searched by DOS for programs and commands (either the default directory or a directory included in a previous PATH command). PSPICE.BAT will first call PSPICE1.EXE from drive A:. PSPICE1.EXE will read from the input file and write 2 temporary files, PSPICEA.TMP and PSPICEB.TMP in the default directory. Then PSPICE.BAT will call PSPICE2.EXE from drive B:.
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PSPICE2.EXE will read the 2 temporary files and write to the output file. Just before ending, PSPICE2.EXE will delete the 2 temporary files. Note that Diskette 1 must be in drive A:, not B: and that Diskette 1 must not be write protected. Try this now with the input file EXAMPLE1.CIR. Put the 2 diskettes into the drives and type: PSPICE EXAMPLE1 After about 45 seconds you should see the screen cleared and redrawn as a status display. If not, go back and check that all your files are where they should be. Let this run go to completion (about 5 minutes). When it is done print EXAMPLE1.OUT on your printer. Compare it to the EXAMPLE1.COUT which you printed out earlier while installing PSpice. 3.5 Creating the Input File In the run which you just did, the input file (EXAMPLE1.CIR) already existed on Diskette 1. Creating your own input files is done with a text editor. The text editor(s) available to you depends on your system and the software it has. One text editor which will always do to you is EDLIN. It comes with DOS and is described in the DOS user's guide. Although EDILIN allows you to create a text file, there exist other editors which are easier to use. One which we use and recommend es P-Edit (no relation to PSpice). It is similar to EDT from DEC and is available for $100 from: Satellite Software 288 W. Center Dr. Orem, UT 84057 You can also use most word processing programs (such as WordStar) to create the input file, but it is not as straightforward. The file which a word processor creates is not a text file. It contains embedded control characters which determine things such as margins, paragraph bondaries, paging, etc. However, most word processors have a command which allows you to produce a text file without the control characters. In effect, you are "printing" to a file instead of a printer. The details of the command depend on the particular word processor which you have.

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Chapter 4

DATA
4.1 Introduction In this chapter we will show how to describe your circuit to Pspice. We will be referring to the circuit in the file EXAMPLE1.CIR which came with the program. If you have not run this circuit, go back to chapter 3. Also, if you have not printed a copy of EXAMPLE1.CIR itself, do that now. EXAMPLE1.CIR shows an example of the input to Pspice. Here are some general observations: 1) Pspice distinguishes between upper and lower case. All keywords are defined in upper case, so it is best to have the whole file (except possibly comments and the title line) in upper case. 2) The first line is the title line and may contain any text whatsoever. Look at the beginning of the output and see how it appears in the banner. 3) The last line must be .END. 4) Comment lines are marked by * in the first column and may contain any text. 5) Continuation lines are marked by + in the first column. 6) Except for the title line, subcircuit definitions, and the .END lines, the order of the lines does not matter. 7) The number of blanks between items is not significant (except in the title line) and commas are equivalent to blanks. So, and and , and , are all equivalent. The rest of this chapter will go over the different elements of the input which describe a circuit. Chapter 5 will go over the elements (commands) which tell PSpice what to do with the circuit. 4.2 Names Find resistor RS1 in the input. It is the line which starts with RS1. The first item on the line is RS1, which is the resistors name. Names must start with a letter, but after that can contain either letters or numbers. Names can be up to 8 characters long. 4.3 Nodes Look at resistor RS1 again. The 2 items after the name, 1 and 2, are the nodes to wich the resistor is attached. Nodes must be integers from 0 to 9999. Node 0 is predefined to mean ground. The node numbers need not be sequential: look at the

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ELEMENT NODE TABLE section of the output. The nodes 100, 101, and 102 appear for the supplies (VIN, VCC, and VEE) but nodes 8 through 99 are missing. 4.4 Values Look at resistor RS1 again. The last item on that line is 1K, which is the resistors value. Values are written in standard floating-point notation, with optional scale and units suffixes. Here are some legal values with no suffixes: 1 1. 1.0 -1.0 1E2 1.21E-5

The scale suffixes follow standard scientific convention and multiply the number which they follow. These are the scale suffixes recognized by PSpice: F P N U MIL M K MEG G T = = = = = = = = = = 1E-15 1E-12 1E-9 1E-6 25.4E-6 1E-3 1E3 1E6 1E9 1E12

Thus, these values are all equivalent: 1.05E6 1.05MEG 1.05E3K .00105G

Note that the scale suffixes are all in upper case. Note also that M by itself means milli, not mega. Besides the scale suffixes, units suffixes are also allowed. These are ignored by PSpice. Any letter which is not a scale suffix may be used as a units suffix. Thus, these values are all equivalent: 10E-3 10E-3V 10MV

Look at capacitor CLOAD for an example of the use of units suffixes. 4.5 Devices Each device in the circuit is represented in the input by one line, which does not begin with .. These lines all have a similar format: the device name, followed by 2 or more nodes, followed by a model name (not all devices have this), followed by 0 or more values
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Note: devices are the only lines in the input (except possibly the title line) which do not begin with a period. The first letter of the device name determines what kind of device it is: resistors must start with R, diodes must start with D, etc. The type of the device then determines the rest of the line: how many nodes it has, whether it needs a model name, and what values are needed at the end. Some devices allow (or require) model names. A model is a way of specifying, in one place, identical parameters for a set of devices. For instance, all 4 transistors (Q1, Q2, Q3, Q4) have the same beta (80). They all refer to the model QNL which specifies the beta with the parameter BF=80. The order of the devices in the input does not matter. The connections between devices are determined by the nodes: all device terminals with the same node number are connected. For instance, look at the ELEMENT NODE TABLE section of the output. Node 1 connects RS1 to VIN. The rest of this section gives an overview of the available devices. See chapter 6 for an exact description of any particular device. 4.5.1 Passive The passive devices available are: resistors, capacitors, inductors, transformers, and transmission lines. These begin with the letters R, C, L, K, and T respectively. Although resistors may have temperature coefficients, none of these devices may have voltage or current-dependent values (i.e., they are all linear). Resistors are allowed a model name, although it is not required. Having a set of resistors refer to one model is handy in that it allows you to easily scale them, for instance in doing worst-case analysis. See the CIRCUITI ELEMENT SUMMARY section of the output for a list of all the resistors in EXAMPLE1 and their values. 4.5.2 Semiconductor The semiconductor devices available are: diodes, bipolar transistors, junction field effect transistors (JFETs), and metal-oxide-silicon field effect transistors (MOSFETs). These begin with the letters D, Q, J, and M respectively. All of these devices require models. In addition, they allow size information to be specified independently for each device. Diodes, bipolar transistors, and JFETs allow a scale. MOSFETs allow length and width as well as source and drain areas and perimeters to be specified for each device. In EXAMPLE1, note that transistors Q1 and Q2 (the output transistors) are scaled up by 1.5. This means that they have 1.5 times the area of Q3 and Q4 (1.5 times the junction capacitance, 1.5 times the base-emitter conductance, etc.).
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4.5.3 Voltage and Current Sources Voltage and current sources are the only devices which can generate power. Sources can be controlled or independent. 4.5.3.1 Controlled All 4 controlled sources are available: current-controlled current sources, voltagecontrolled current sources, current-controlled voltage sources, and voltage-controlled voltage sources. These begin with the letters E, F, G, and H respectively. The controlled sources can be linear or polynomial functions of their controls. Linear controlled sources are the most common. For instance, linear voltage-controlled voltage sources are often used in RLC filter designs. Non-linear sources are also used occasionally. For instance, a non-linear voltage-controlled current source can be used to represent a voltage-dependent resistor. 4.5.3.2 Independent Independent voltage and current sources are the only devices which can have different specifications during the various analysis modes. Each source can be specified separately for the DC, AC, and transient analysis modes. The DC specification is marked by the keyword DC, the AC specification is marked by the keyword AC and the transient specification is marked by one of the transient keywords (PWL, SIN, EXP, PULSE, SFFM). Find VIN, VCC, and VEE in EXAMPLE1. Look at the CIRCUIT ELEMENT SUMMARY section of the output (INDEPENDENT SOURCES sub-section) VCC has only a DC value. It means that during the DC analysis phase, it will have the value of 12 volts. VEE is similar. If only a DC value is given, the keyword DC can be omitted. VIN has no DC value. It will have the value 0 volts during the DC analysis phase. VIN does have an AC value, however, (1 volt) which VCC and VEE lack. During AC analysis, VIN will have the value 1 volt (and 0 degrees phase) and VCC and VEE will have the values 0 volts. VIN also has a transient value: during transient analysis it will be a sine wave with an amplitude of 0.1 volts and a frequency of 5 megahertz. VCC and VEE have no transient value. During transient analysis they will have their DC value. In summary, each source may have its DC, AC, and Transient values specified independently. DC and AC values default to 0. Transient values default to the DC value. Independent sources have 3 general uses: 1) Power supplies, such as VCC and VEE. These are conveniently written with DC omitted (such as VEE).
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2) Stimuli, such as VIN. This includes input waveforms, clocks, and ramps. It also includes AC values for frequency response. 3) Current meters (voltage sources only). Voltage sources with no specifications are allowed. They have the value 0 volts for all analysis. You can print and plot the current going through such a voltage source. Thus, you can insert one of these wherever you need a current meter. 4.6 Models Many devices use models to assign values to various parameters wich describe the device. Model statements have the form: .MODEL name type (parameter=value parameter=value . . .) Find the model CRES in EXAMPLE1. It is referenced by the collector resistors RC1 and RC2. The model sets R=1 (R is the resistance multiplier) and sets the 2 temperature coefficients. Look at the RESISTOR MODEL PARAMETERS section of the output for a listing of the model CRES. Look also at the resistors RC1 and RC2 in the CIRCUIT ELEMENT SUMMARY section and note the values for TC1 and TC2. This is a typical use for a model. Note that you can now tolerance the values of RC1 and RC2 by changing R in CRES instead of having to change each of their values directly. The available model types are: RES, CAP, IND, D, NPN, PNP, NJF, PJF, NMOS, PMOS which correspond to resistor, capacitor, inductor, diode, npn bipolar, pnp bipolar, n-channel JFET, p-channel JFET, n-channel MOSFET, and p-channel MOSFET. Each model type has its own set of parameters (ignoring polarity - e.g., NPN and PNP have the same parameters). You can set the values of none, any, or all of the parameters for a model. All parameters have default values. This means that you could even say: .MODEL NOPARAM R () if you wanted. For a full list of the parameters and their defaults for each model, look up that model in chapter 6.

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Chapter 5

COMMANDS
5.1 Introduction This chapter covers the various analysis PSpice will perform and the commands available which control these analysis. All the general comments at the beginning of chapter 4 about the format of numeric values, continuation lines, etc. apply here, too. In addition, the following apply: 1) All commands are contained in statements which start with . 2) You are allowed to specify a command or option more than once. If you do, the last value is used. For instance, if you say .WIDTH OUT=80 and then later say .WIDTH OUT=132 then the output width will be 132 colums. Other than this, the order of commands does not matter. 5.2 Specifying the Various Analysis There are 8 analysis available for a circuit. These are: 1) .DC 2) .OP DC sweep of an input voltage or current source. Calculation of the bias (quiescent) point of the circuit. Using the bias point, these analysis are available: .TF .SENS .NOISE .AC DC transfer (Thevenin equivalent) calculation. DC sensitivity. Calculation of total and individual noise. Frequency response

2.1) 2.2) 2.3) 2.4) 3) .TRAN

- Transient response (behavior over time). Using the transient response, this analysis is available: 3.1) .FOUR - Calculation of the fourier components of the transient response.

Each analysis is invoked by including its statement in the input. For example, having a statement beginning with .DC will cause the DC sweep to be done. Any analysis
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selected will be done in the same order as shown above. Note that this means that any analysis is done at most once per run. If you try to do an analysis twice by having 2 statements for it (e.g., 2 .DC statements), only the last statement counts. The others are ignored. 5.2.1 DC Sweep The DC sweep allows you to sweep one voltage or current source through a range of values. The bias point of the circuit is calculated for each value of the source. This is useful for finding the transfer function of an amplifier, the high and low thresholds of a logic gate, and so on. Find the .DC statement in EXAMPLE1. It specifies that the voltage source VIN is to be swept from -0.25 volts to 0.25 volts by steps of .005 volts. This means that the output will have (0.25+0.25)/0.005+1=101 lines. In effect, the DC value of VIN (0, by default) is overriden during the .DC analysis and is made to be the swept value. All the other sources ratain their DC values. Find the print table and the plot labeled DC TRANSFER CURVE in EXAMPLE1. 5.2.2 Bias Point The .OP statement causes the bias point to be calculated and the bias values of the sources and devices to be printed. Find the section in EXAMPLE1 just after the DC TRANSFER CURVE plot labeled SMALL SIGNAL BIAS SOLUTION. It consists of 3 sub-sections: 1) A list of all the node voltages 2) The currents of all the voltage sources, and their total power 3) A list of the small-signal parameters for all the devices Actually, the bias point is calculated whether or not .OP is in the input. This is because other analysis, such as .AC, need the bias point. If .OP is omitted the first sub-section (a list of all the node voltages) is printed, but the 2nd and 3rd sub-sections are not. 5.2.3 Small Signal Transfer Function The .TF statement causes the small-signal gain, input resistance, and output resistance to be printed. These are calculated by linearizing the circuit around the bias point. Find the .TF statement and the resulting output in EXAMPLE1. The output is labeled SMALL-SIGNAL CHARACTERISTICS. 5.2.4 Sensitivities The .SENS statement calculates and prints the sensitivity of one node voltage to each device parameter. The sensitivity is calculated by linearizing all devices around the bias point. Find the .SENS statement and its resulting output in EXAMPLE1. The outpout is labeled DC SENSITIVITY ANALYSIS. Note that for a large circuit, a tremendous amount of output would be generated.
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5.2.5 AC Analysis (Frequency Response) Although the noise analysis comes before the AC analysis in the output, an understanding of the AC analysis is nedded first. The AC analysis calculates the smallsignal response of the circuit (linearized around the bias point) to a combination of inputs. Find the .AC statement in EXAMPLE1. It specifies that the frequency is to be swept from 1hz to 10Ghz by decades, with 10 points per decade. Unlike the .DC statement, it does not specify an input source. Instead, each independent source contains its own specification. Find VIN. It has an AC spec for 1 volt with 0 degrees (by default) of relative phase. Any and all sources can have an AC magnitude and phase. During the analysis, the contributions from all sources are propagated throughout the circuit and summed at all the nodes. In EXAMPLE1, VIN is the only input to an amplifier, so it is the only source to have a (non-zero) AC value. Find the print table and the plot labeled AC ANALYSIS. Note that both the magnitude and phase are available. 5.2.6 Noise The noise analysis calculates the noise contributions from each device and does an RMS sum at one output node. Find the .NOISE statement in EXAMPLE1. It specifies that node 5 is to be the output node and tha VIN is to be the input. This does not mean that VIN is the noise source, but rather that VIN is the place at which an equivalent input noise is calculated. In other words, the noises are summed at node 5. This value is then divided by the gain from VIN to 5 to get the amount of noise which, if injected at VIM into a noise-less circuit, would cause the previously calculated amount of noise at 5. This calculation is done for all the frequencies specified in the .AC statement. So, you must do an AC analysis to do a noise analysis. There are 2 kinds of printout from the noise analysis: detailed tables, and summary tables and plots. The detailed tables are specified by the 3rd value in the .NOISE statement. In EXAMPLE1, it specifies that every 20th frequency of the AC analysis, a detailed table is to be printed. Find these tables in EXAMPLE1. They are labeled NOISE ANALYSIS. Also find the print table and the plot labeled AC ANALYSIS with column headings INOISE and ONOISE. These are summary outputs, showing the RMS summed noise at node 5 (ONOISE) and the equivalent input noise at VIN (INOISE). 5.2.7 Transient (Time) Response The .TRAN statement causes the response of the circuit to be calculated from time 0 to a specified time. Find the .TRAN/OP statement in EXAMPLE1. It specifies that the analysis is to go from 0 to 500 nanoseconds and that values should be printed every 5 nanoseconds. During a transient analysis, any or all of the independent sources may have time-varying values. In EXAMPLE1, the only source which has a time-varying value is VIN, the
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input. It is given a 5 megahertz sine wave. In general, more than one source are often given time-varying values. For instance, 2 or more clocks in a digital circuit. During the analysis, PSpice maintains an internal time step which is continuously adjusted to maintain accuracy while not perforing unnecessary steps. During periods of inactivity, the internal time step is increased (although never to more than the print step specified in the .TRAN statement) and during active regions, it is decreased. The time steps which were used may not correspond to the print time steps. The values at the print time steps are obtained by 2nd order polynomial interpolation from values at the internal steps. The transient analysis does its own calculation of a bias point to start with. This is necessary because the initial values of the sources can be different from their DC values. If you want to see the small-signal parameters for the transient bias point, you should use the .TRAN/OP statement, as is done in EXAMPLE1. Otherwise, if all you want is the result of the transient run itself, you should use the .TRAN statement. Find the bias point printout for the transient bias point in EXAMPLE1. It is labeled INITIAL TRANSIENT SOLUTION. Note that it has the same format as the output from the .OP statement. Find the print table and the plot for the transient analysis. They are labeled TRANSIENT ANALYSIS. 5.2.8 Fourier Components The fourier analysis calculates the DC and 1st through 9th fourier components of the result of a transient analysis. So, you must do a transient analysis in order to do a fourier analysis. Find the .FOUR statement in EXAMPLE1. It specifies that the voltage waveform at node 5 from the transient analysis is to be used and that the fundamental frequency is to be 5 megahertz. The period of the fundamental frequency is 200 nanoseconds. Only the last 200 nanoseconds of the transient analysis are used, and that portion is assumed to repeat indefinitely. Since the sine wave in EXAMPLE1 does indeed repeat at every 200 nanoseconds this is all right. In general, however, you must make sure that the fundamental fourier period fits the waveform in the transient analysis. Find the output from the fourier analysis. It is labeled FOURIER ANALYSIS. Note that it calculates the harmonic distortion as well as the fourier components. 5.3 Temperature PSpice allows you to analyze your circuit at any temperature. The default temperature is 27 degreees centigrade. You can change this with the .TEMP statement. Find the .TEMP in EXAMPLE1. It sets the temperature for all analysis to 35 (deg. centigrade). The temperature is changed from the default just before the first analysis. Find the section of EXAMPLE1 labeled TEMPERATURE ADJUSTED VALUES. Note that the
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values of the resistors have been updated according to the temperature coefficients in the resistor model CRES. Note also that some of the bipolar model parameters have also been adjusted. From here to the end of the run the temperature stays at 35. You can specify more than one temperature in the .TEMP statement. If you do, then just before the first analysis the temperature is set to the first one in the .TEMP statement. Then, all the analysis are done. Then, the temperature is set to the second one in the .TEMP statement. Now all the analysis are done again. Then, the temperature is set to the third one in the .TEMP statement. And so on, for all the temperatures. The effect is the same as if you ran the circuit several times, once for each temperature. This can be convenient if you want to check the low, nominal, and high temperature behaviour of a circuit all in one run. On the other hand, for many temperatures a large amount of output will be generared. 5.4 Format of the Output The output of PSpice falls into 4 groups: 1) Descriptions of the circuit itself. This includes the net list, the device list, the model parameter list, etc. 2) Direct output from some of the analysis. This includes the output from the .SENS and .TF analysis. 3) Print tables and plots. This includes the output from the .DC, .AC, and .TRAN analysis. 4) Run statistics. This includes the run time and amount of memory used. You have control over which outputs appear. EXAMPLE1 has them all enabled, but normally only a few woud be selected. An overview of each group of outputs follows. 5.4.1 Descriptions of the Circuit These are different ways of reflecting the circuit topology and device values. If selected these outputs come before the results of any of the analysis. There are 5 possible outputs which appear in this order: 1) The input file can be echoed (listed). This section is labeled CIRCUIT DESCRIPTION. It always appears unless you include the NOECHO option on an .OPTIONS statement. 2) You can get a wiring (net) list. This section is labeled ELEMENT NODE TABLE. It only appears if you include the NODE option on an >OPTIONS statement. 3) The model parameters can be echoed. This section is labeled BJT MODEL PARAMETERS, and also RESISTOR MODEL PARAMETERS, and so on for each model type. It always appears unless you include the NOMOD option on an .OPTIONS statement. 4) A detailed listing of all the devices in the circuit is available. It is labeled CIRCUIT ELEMENT SUMMARY. It only appears if you include the LIST option on an .OPTIONS statement.
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5) The values of all options (which have numerical values) may be printed. These are labeled OPTION SUMMARY. They only appear if you include the OPTS option on an .OPTIONS statement. So, the 5 outputs are controlled by various options using the .OPTIONS statement. You can only control whether or not any of the 5 appear. The formatting of each output is fixed. 5.4.2 Direct Output The bias point calculation (.OP), small-signal transfer function (.TF), sensitivity analysis (.SENS), noise analysis (.NOIS), and fourier analysis (.FOUR) all provide output directly from the analysis. Directly means that a .PRINT or .PLOT statement (see section 5.4.3 below) is not used to get output. The format of the output is different for each analysis, depending on details of what is being calculated. The noise analysis is a special case. It provides direct output, and print table and print table and plot output. The direct output is the detailed breakdown of all the noise sources produced every nth frequency. In EXAMPLE1 this is output produced every 20th frequency. It is labeled NOISE ANALYSIS. The direct outputs are of fixed format and are enabled simply by including the analysis in the run. If the input has a .SENS statement, then the section labeled DC SENSITIVITY ANALYSIS will appear. If the analysis is not included, then it is not done and produces no output. In the case of noise analysis, the direct output is controlled by whether or not there is a number after the input and output specifications. In EXAMPLE1 the . NOISE statement has a 20 at the end. This causes printing of the noise source breakdown every 20th frequency. If that number were omitted, or were 0, then there would be no section labeled NOISE ANALYSIS on the output. 5.4.3 Print Tables and Plots The most common forms of output are print tables and plots. The DC-sweep (.DC), frequency response (.AC), noise (.NOIS), and time response (.TRAN) analysis produce output in the form of print tables and plots. 5.4.3.1 Print Tables Find the statement in EXAMPLE1 which begins with .PRINT DC. This statement causes the print table labeled DC TRANSFER CURVES to appear. The DC after .PRINT says that this print table is to be created from the results of the .DC analysis. The statement specifies that the voltages at nodes 4 and 5 are to be printed. Find the print table labeled DC TRANSFER CURVES in EXAMPLE1. The first column is labeled VIN. This is the voltage source which was swept during the DC sweep. This is true in general: the first column of print tables is always the value being swept. For DC it is the sources value, for AC the frequency, and for transient it is the time. The 2nd
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and 3rd columns are the voltages at nodes 4 and 5, as was specified in the .PRINT statement. Each of the items in the .PRINT statement after the analysis name can be one of: 1) 2) 3) 4) 5) 6) 7) A node voltage, for instance V(4), or A voltage between 2 nodes, for instance V(4,5), or A voltage across a 2-terminal device, for instance, V(RC1), or A voltage at a devices terminal, for instance, VC(Q2), or A voltage across 2 terminals of a device, for instance VBE(Q2), or A current through a 2-terminal device, for instance I(CLOAD), or a current into a devices terminal, for instance IC(Q2).

For AC analysis the V or I can be modified with a suffix: 1) 2) 3) 4) 5) 6) Magnitude, for instance VM(5) and VCM(5), or Magnitude in decibels, for instance VDB(4,5), or Phase, for instance IP(VIN), or Group delay, for instance VG(5), or Real part, for instance IR(VIN), or Imaginary part, for instance VI(4).

No suffix is the same as a suffix of M. Noise is once again a special case. The output items for noise are none of the above but, instead, are INOISE and ONOISE, for input equivalent noise and output noise, respectively. Many of these forms are shown in the .PRINT statements in EXAMPLE1. For a full description of all the output forms, see section 6.4. Each .PRINT statement is limited to 8 output items, not counting the implied one (the one which goes in the 1st column). However, you may have as many .PRINT statements for each analysis as you like. For instance, if you wanted to list the voltages on all 27 nodes of a circuit during a DC sweep, you could do this by having 4 .PRINT statements, all with an analysis of DC. The firs 3 could specify 8 node voltages each and the 4th could have the remaining 3. 5.4.3.2 Plots Plots are caused by .PLOT statements. The rules for plot statements are the same as the rules for .PRINT statements. Find the plot labeled TRANSIENT ANALYSIS in EXAMPLE1. Note that there are 2 columns printed, just like a print table. This is true for all plots: the implied output and the 1st specified output item are printed to the left of the plot. The plot has 3 different scales. When outputs have widely differing magnitudes, they are given different scales to avoid having the smaller ones compressed into a straight line. You can avoid this by
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specifying a y-axis range (see .PLOT in chapter 6 for details). This will force all output items onto the same scale. 5.4.4 Run Statistics Find the section at the end of EXAMPLE1 labeled JOB STATISTICS SUMMARY. This section lists various kinds of summary information about the whole run including the times required by the various analysis. Besides the times, the values of MAXMEM and MEMUSE are also of interest. MEMUSE is the maximum of amount of memory required during this run and MAXMEM is the amount available. For larger circuits these values can provide guidelines for which circuits are or are not too large for PSpice to handle. The run statistics only appear if the option ACCT is included in an .OPTIONS statement. In that case, they appear at very end of the output. Section 6.5 contains a list of all the statistics and the meaning of each one. 5.5 Options There is a number of options available which control various aspects of a PSpice run. Some of these have already been mentioned above associated with various kinds of output. There are 2 statements which allow you to set options: .OPTIONS and .WIDTH. Not surprisingly, the .WIDTH statement lets you to set the width of the output. Find the .WIDTH statement in EXAMPLE1. It sets the output width to 80 columns. This controls the formatting of the various tables, such as the printout of the model parameters, and also the width of the plots. There are only 2 values available: 80 and 132. The .OPTIONS statement handles all the other options. There are 2 kinds: options with values and options without values. Find the .OPTIONS statement in EXAMPLE1. Options such ACCT and LIST are without values. Options such as RELTOL have values. The various options are simply listed, with values assigned to those which need them. The order follows the same rule as for command statements in general: if an options is specified more than once, only the last time counts. Further, if there is more than one .OPTIONS statement, it works the same as if they are combined into one. For instance, .OPTIONS ACCT LIST .OPTIONS RELTOL=.001 is equivalent to .OPTIONS ACCT LIST RELTOL=.001 For a list of all the available options and their meanings, see the description of the .OPTIONS statement in chapter 6.
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Chapter 6

REFERENCE
6.1 Introduction This chapter is a list of all Pspice statements in alphabetical order. A complete description is given for each statement. Unlike previous chapters, the style of this chapter is terse. The emphasis is on giving a complete and accurate description instead of ease of understanding. 6.2 Notation Item name node scale suffix units suffix Example C23 15 P F Explanation Alphanumeric string of no more than 7 characters Integer in the range 0-9999 One of A, F, N, U, M, MIL, K, MEG, G, T Any letter which is not a scale suffix or any letter(s) at all which follows a scale suffix Required literal text string Floating-point number with optional scale and/or units suffixes Comment Optional item Zero or more of item Required item One or more of item

upper case text value

.WIDTH 1.2E-6

(text) [item] [item]* <item> <item>*

(model) [value] [<value>,]* <name> <<node> >*

6.3 Statements This section contains a description of each type of input statement. The statements are arranged in alphabetical order.

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TITLE

General Forms (any text) Examples LOW-NOISE OPAMP 12B - WORST CASE Unlike all other statements, the title statement is identified by its position instead of a keyword. It can contain any text, but is restricted to one line. The title statement is the first statement of the circuit. If there is more than one circuit in an input file, then each circuit has its own title statement.

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CAPACITOR

General Forms C<name> <(+)node> <(-)node> [(model) name] <value> Examples CLOAD C2 Model Parameters C capacitance multiplier 15 1 0 2 20PF .2E-12 Units Default 1

The + and nodes define the polarity meant when the capacitor has a positive voltage across it. Positive current flows from the (+) node through the capacitor to the (-) node. If the [(model) name] is left out then <value> is the capacitance in farads. If [(model) name] is specified, then <value> is multiplied by the value of the parameter C in the model to get the capacitance. <value> is normally positive, though it can be made negative. It must not be zero.

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DIODE

General Forms D<name> <(+)node> <(-)node> <(model) name> [(area) value] Examples DCLAMP D13 Model Parameters IS KS N TT CJO VJ M EG XTI KF AF FC BV IBV 14 15 0 17 DMOD SWITCH Units

1.5 Default 1E-14 0 1 0 0 1 .5 1.11 3.0 0 1 .5 infinite 1E-10

saturation current Amp parasitic (ohmic) resistance Ohm emission coefficient transit time Sec zero bias junction capacitance Farad junction potential Volt grading coefficient activation energy e-Volt saturation current temp. exponent flicker noise coefficient flicker noise exponent coeff. for forward-bias depl. cap. reverse breakdown voltage Volt reverse current at breakdown volt. Amp

<(+)node> is the anode and <(-)node> is the cathode. Positive current is current flowing from the (+) node through the diode to the (-) node. [(area) value] scales IS, RS, CJO, and IBV and defaults to 1. IBV and BV are both specified as positive values. The diode is modeled as an ohmic resistance (value = RS/area) in series with an intrinsic diode. The resistance is attached between the (+) node and an internal(+) node. In the following equations V Vt T0 q k = = = = = voltage across the intrinsic diode only thermal voltage nominal temperature (set with TNOM = . . . option) electron charge Boltzmanns constant

Other variables are from the model parameter list. DC Current I = area * ( In + Ib)
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In = normal current Ib = breakdown current Capacitance

= =

IS * (e(V/N * Vt)-1) IBV * e(- BV - V)/Vt

C = area * (Ct + Cj) Ct = transit time capacitance = TT * G G = dc conductance = dI/dV Cj = junction capacitance For V <= FC * VJ Cj = CJO * (1-V/VJ)-M For V > FC * VJ Cj = CJO * (1-FC)-(1+M) * (1-FC * (1+M) + M * V/VJ) Temperature Effects IS(T) = IS * e(EG/N * Vt) * (T/T0-1) * (T/T0)(XTI/N) VJ(T) = VJ * (T/T0) - 2 * Vt * (1.5 * ln(T/T0) - Eg/(2 * Vt-1.1150877 * Vt0)) where Eg = bandgap in silicon at T Vt0 = thermal voltage at T0 CJO(T) = CJO * [1 + M * (.0004 * (T-T0) + (1-VJ(T)/VJ))] KF(T) = KF * (PB[T]/PB) AF(T) = AF * (PB[T]/PB) RS has no temperature dependence Noise The parasitic resistance, RS, generates thermal noise. In2 = 4 * k * T/(RS/area) The intrinsic diode generates shot and flicker noise: In2 = 2 * q * I + KF * IAF/f

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VOLTAGE-CONTROLLED VOLTAGE SOURCE

General Forms E<name> <(+)node> <(-)node> <(+ controlling) node> + <(- controlling) node> <gain> E<name> <(+)node> <(-)node> [POLY(<value>)] + <<(+ contr.) node> <(-contr.) node>>* + <<(poly. coeff.) value>>* Examples EBUFF EAMP ENONLIN + 1 13 100 0.0 2 0 101 13.6 10 11 26 0 POLY(2) .2 .005 1.0 500 3

The first form and the first 2 examples apply to the linear case. The 2nd form and the last example are for the non-linear case. POLY(n) specifies the number of dimensions of the polynomial. The number of controlling nodes must be twice the number of dimensions. The (-) and (+) nodes are the output nodes. Positive current flows from the (+) node through the source to the (-) node. The (+ controlling) and (- controlling) nodes are in pairs and define a set of voltages. A particular node may appear more than once, and the output and controlling node need not be different. Caution should be exercised with the non-linear form. For instance, EWRONG 1 0 POLY(1) 1 0 .5

tries to set node 1 to .5 volts greater than node 1. In this case, any analysis which you specify will fail to calculate a result. In particular, PSpice will not be able to calculate the bias point for a circuit containing EWRONG. The number of dimensions (default=1) determines the number of controlling nodes. After the controlling nodes come the coefficients of the polynomial. For the linear case, there is only one and that is the gain. For the non-linear case, call the controlling voltages V1, V2, . . . Vn. Then the output voltage is given by: Vout = P0 + P1 * V1 + P2 * V2 + . . . + Pn * Vn + Pn+1* V1 * V1 + Pn+2 * V1 * V2 + . . . + Pn+n * V1 * Vn + P2n+1 * V2 * V2 + P2n+2 * V2 * V3 + . . . + P2n+n-1 * V2 * Vn + . .
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. P(n * n+n)/2 * Vn * Vn + P(n * n+n)/2+1 * V1 * V1* V1 + P(n * n+n)/2+2 * V1 * V1 * V2 + . . . . . . It is not necessary to enter all the coefficients, but none may be skipped over. For instance, this is a voltage summer: ESUM + 100 4 101 POLY(4) 1 0 2 0 0 0.0 1.0 1.0 1.0 1.0 3 0

For the one-dimensional polynomial, the general case reduces to: Vout = P0 + P1 * V + P2 * V2 + . . . + Pn * Vn

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CURRENT-CONTROLLED CURRENT SOURCE

General Forms F<name> <(+)node> <(-)node> + <(- controlling voltage source) name> <gain> F<name> <(+)node> <(-)node> [POLY(<value>)] + <(+ controlling voltage source) name>* + <<(poly. coeff.) value>>* Examples FSENSE FAMP FNONLIN + 1 13 100 0.0 2 0 101 13.6 VSENSE VIN POLY(2) .2 .005 30.0 500 VCNTRL1

VCNTRL2

The first form and the first 2 examples apply to the linear case. The 2nd form and the last example are for the non-linear case. POLY(n) specifies the number of dimensions of the polynomial. The number of controlling voltage sources must be equal to the number of dimensions. The (-) and (+) nodes are the output nodes. A positive current will flow from the (+) node through the source to the (-) node. The current(s) through the controlling voltage source(s) determine(s) the output current. The controlling sources(s) must be independent voltage source(s) (V<name> elements), although they need not have a zero DC value. Caution should be exercised with the non-linear form. For instance, FWRONG VWRONG 1 2 0 1 POLY(1) VWRONG .5

with nothing else connected to node 1, tries to set FWRONG's current to .5 amps more than the current flowing through VWRONG. Since all the current through VWRONG is the same as FWRONG's current, it tries to set FWRONG's current to .5 amps more than itself. In this case, any analysis which you specify will fail to calculate a result. In particular, PSpice will not be able to calculate the bias point for a circuit containing FWRONG. The number of dimensions (default = 1) determines the number of controlling voltage sources. After the controlling voltage source names come the coefficients of the polynomial. For the linear case, there is only one and that is the gain. For the non-linear case, call the controlling currents I1, I2, . . . In. Then the output current is given by:
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Iout

= P0 + P1 * I1 + P2 * I2 + . . . + Pn * In + Pn+1 * I1 * I1 + Pn+2 *I1 *I2 + . . . + Pn+n * I1* In + P2n+1 * I2 *I2 + P2n+2 * I2 * I3 + . . . + P2n+n-1 * I2 * In + . . . P(n * n+n)/2 * In * In + P(n * n+n)/2+1 * I1 * I1 * I1 + P(n*n+n)/2+2 * I1 * I1* I2 + . . . . . .

It is not necessary to enter all the coefficients, but none may be skipped over. For instance, this is a current summer: FSUM + 100 101 POLY(4) VSRC1 VSRC2 VSRC3 VSRC4 0.0 1.0 1.0 1.0 1.0

For the one-dimensional polynomial, the general case reduces to: Iout = P0 + P1 * I + P2 * I2 + . . . + Pn * In

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VOLTAGE-CONTROLLED CURRENT SOURCE

General Forms G<name> <(+)node> <(-)node> <(+ controlling) node> + <(- controlling) node> <transconductance> G<name> <(+)node> <(-)node> [POLY(<value>)] + <<(+ contr.) node> <(-contr.) node>>* + <<(poly. coeff.) value>>* Examples GBUFF GAMP GNONLIN + 1 13 100 0.0 2 0 101 13.6 10 11 26 0 POLY(2) .2 .005 1.0 500 3

The first form and the first 2 examples apply to the linear case. The 2nd form and the last example are for the non-linear case. POLY(n) specifies the number of dimensions of the polynomial. The number of controlling nodes must be twice the number of dimensions. The (-) and (+) nodes are the output nodes. Positive current flows from the (+) node through the source to the (-) node. The (+ controlling) and (- controlling) nodes are in pairs and define a set of voltages. A particular node may appear more than once, and the output and controlling nodes need not be different. The number of dimensions (default=1) determines the number of controlling nodes. After the controlling nodes come the coefficients of the polynomial. For the linear case, there is only one and that is the transconductance. For the non-linear case, call the controlling voltages V1, V2, . . . Vn. Then the output current is given by: Iout = P0 + P1 * V1 + P2 * V2 + . . . + Pn * Vn + Pn+1 * V1 * V1 + Pn+2 * V1 * V2 + . . . + Pn+n * V1 * Vn + P2n+1 * V2 * V2 + P2n+2 * V2 * V3 + . . . + P2n+n-1 * V2 * Vn + . . . P(n * n+n)/2 * Vn * Vn + P(n * n+n)/2+1 * V1 * V1 * V1 + P(n * n+n)/2+2 * V1 * V1 * V2 + . . . . . .

It is not necessary to enter all the coefficients, but none may be skipped over. For instance, this is a voltage summer:
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GSUM +

100 4

101 POLY(4) 1 0 2 0 0 0.0 1.0 1.0 1.0 1.0

For the one-dimensional polynomial, the general case reduces to: Iout = P0 + P1 * V + P2 * V2 + . . . + Pn * Vn

If the controlling nodes are the same as the output nodes, then this is a non-linear resistor.

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CURRENT-CONTROLLED VOLTAGE SOURCE

General forms H<name> <(+)node> <(-)node> + <(- controlling voltage source) name> + <transresistance> H<name> <(+)node> <(-)node> [POLY(<value>)] + <(+ controlling voltage source) name>* + <<(poly. coeff.) value>>* Examples HSENSE FAMP HNONLIN + 1 13 100 0.0 2 0 101 13.6 VSENSE VIN POLY(2) .2 .005 10.0 500 VCNTRL1

VCNTRL2

The first form and the first 2 examples apply to the linear case. The 2nd form and the last example are for the non-linear case. POLY(n) specifies the number of dimensions of the polynomial. The number of controlling voltage sources must be equal to the number of dimensions. The (-) and (+) nodes are the output nodes. Positive current will flow from the (+) node through the source to the (-) node. The current(s) through the controlling voltage source(s) determine(s) the output voltage. The controlling sources(s) must be independent voltage source(s) (V<name> elements), although they need not have a zero DC value. The number of dimensions (default = 1) determines the number of controlling voltage sources. After the controlling voltage source names come the coefficients of the polynomial. For the linear case, there is only one and that is the transresistance. For the non-linear case, call the controlling currents I1, I2, . . . In. Then the output voltage is given by: Vout = P0 + P1 * I1 + P2 * I2 + . . . + Pn * In + Pn+1 * I1 * I1 + Pn+2 * I1 * I2 + . . . + Pn+n * I1 * In + P2n+1 * I2 * I2 + P2n+2 * I2 * I3 + . . . + P2n+n-1 * I2 * In + . . . P(n * n+n)/2 * In * In + P(n * n+n)/2+1 * I1 * I1 * I1 + P(n * n+n)/2+2 * I1 * I1 * I2 + . . . . .
- 39 -

. It is not necessary to enter all the coefficients, but none may be skipped over. For instance, this is a current summer: HSUM + 100 101 POLY(4) VSRC1 VSRC2 VSRC3 VSRC4 0.0 1.0 1.0 1.0 1.0

For the one-dimensional polynomial, the general case reduces to: Vout = P0 + P1 * I + P2 * I2 + . . . + Pn * In

- 40 -

INDEPENDENT CURRENT SOURCE

General Forms I<name> + + + Examples IBIAS IAC IACPHS IPULSE I3 13 2 2 1 26 0 3 3 0 77 2.3MA AC .001 AC .001 90 PULSE (-1V 1V 2NS 2NS 2NS 50NS 100NS) DC .002 AC 1 SIN(.002 .002 1.5MEG) <(+)node> <(-)node> [[DC] <value>] [AC <(magnitude) value> [(phase) value] [(transient specification) [PULSE][SIN][EXP][PWL] [SFFM]([value]*)]

Positive current flows from the (+) node through the source to the (-) node. The default value is zero for the DC, AC, and transient values. None, any, or all of DC, AC, and transient values may be specified. The AC phase value is in degrees. If present, the transient specification must be one of: General form EXP(ioff ipeak td tcr tr tfr) Example EXP(0 .2 1US 2US 40US 20US) Parameters name ioff ipeak td tcr tr tfr meaning initial current peak current delay rise time constant rise time fall time constant default none none 0 TSTEP td + TSTEP TSTEP units Amps Amps sec sec sec sec

The EXP form causes the current to be ioff for the first td seconds. Then, the current decays exponentially from ioff to ipeak with a time constant of tcr. The decay lasts tr seconds. Then the current decays from ipeak back to ioff with a time constant tfr. General Form
- 41 -

PULSE(i1 i2 td tr tf pw per) Example PULSE(-1MA 1MA 50US .1US .1US 2US 10US) Parameters name i1 i2 td tr tf pw per meaning initial current pulsed current delay rise time fall time pulse width period default none none 0 TSTEP TSTEP TSTOP TSTOP units Amps Amps sec sec sec sec sec

The PULSE form cause the current to start at i1 and stay there for td seconds. Then, the current goes linearly from i1 to i2 during the next tr seconds. Then, the current stays at i2 for pw seconds. Then, it goes linearly from i2 back to i1 during the next tf seconds. It stays at i2 for per-(tr + pw + tf) seconds, and then the cycle is repeated except for the initial delay of td seconds. General Form PWL(t1 i1 t2 i2 . . . tn in) Example PWL(0 -1MA 1US 0MA 10US 0MA 10.1US 10MA 20US 10MA 20.1US 20MA) Parameters name ti ii meaning time at corner current at corner default none none units sec Amps

The PWL form describes a piece-wise linear waveform. Each pair of time-current values specifies a corner of the waveform. The current at times between corners is the linear interpolation of the currents at the corners. General Form SFFM(ioff iampl fc mod fm) Example
- 42 -

SFFM(0 2MA 10.1MEGH 5 4KH) Parameters name ioff iampl fc mod fm meaning offset current ampl current carrier frequency modulation index signal frequency default none none 1/TSTOP 0 1/TSTOP units Amps Amps Hertz Hertz

The SFFM (Single-Frequency FM) form causes the current to follow this equation: I = ioff + iampl * sine((2 * pi * fc * time) + mod * sine(2 * pi * fm * time)) General Form SIN(ioff iampl freq td df) Example SIN(0 .01 100KHZ 1MS 1E4) Parameters name ioff iampl freq td df meaning offset current pulsed current frequency delay damping factor default none none 1/TSTOP 0 0 units Amps Amps Hertz sec 1/sec

The SIN form causes the current to start at 0 and stay there for td seconds. Then, the current becomes an exponentially damped sine wave described by this equation: I = ioff + iampl * exp(- (time - td) * df) * sine(2 * pi * freq* (time - td))

- 43 -

JUNCTION FET

General Forms J<name> <(drain) node> <(gate) node> <(source) node> + <(model) name> [(area) value] Examples JIN J13 100 22 1 14 0 23 JFAST JNOM

2.0 Units Volt A/V**2 1/Volt Ohm Ohm F F Default -2.0 1E-4 0 0 0 0 0 .5 1.0 1E-14 0 1

Model Parameters VTO BETA LAMBDA RD RS CGD CGS FC PB IS KF AF threshold voltage transconductance parameter channel length modulation drain parasitic resistance source parasitic resistance zero-bias G-D junction cap. zero-bias G-S junction cap. coefficient for forward-bias depletion capacitance gate junction potential gate junction sat. current flicker noise coefficient flicker noise exponent

Volt Amp

Positive current is current flowing into a terminal. [(area) value] is the relative device area and defaults to 1.0. The JFET is modeled as an intrinsic JFET with an ohmic resistance (value = RD/area) in series with the drain and with another ohmic resistance (value = RS/area) in serier with the source. In the following equations Vgs Vgd Vds Vt T0 q k gate-intrinsic source voltage gate-intrinsic drain voltage intrinsic drain-intrinsic source voltage thermal voltage nominal temperature (set with TNOM = . . . option) electron charge Boltzmann's constant

Other variables are from the model parameter list. These equations describe an nchannel JFET. For p-channel devices, reverse the signal of all voltages and currents.
- 44 -

Ig = gate current = area * (Igs + Igd) Igs = gate-source leakage current = IS * (e(Vgs/Vt)-1) Igd = gate-drain leakage current = IS * (e(Vgd/Vt)-1) Id = drain current = area * (- Idrain - Igd) Is = source current = area * (Idrain - Igs) For Vds >= 0 (normal mode) (cuttof region) For Vgs - VTO < 0 Idrain = 0 For 0 <= Vgs - VTO <= Vds (saturation region) Idrain = BETA * (1 + LAMBDA * Vds) * (Vgs - VTO)2 For Vds < Vgs - VTO (linear region) Idrain = BETA * (1 + LAMBDA * Vds) * Vds * (2 * [Vgs -VTO] - Vds) Capacitance Note: all capacitances are between terminal of the intrinsic JFET. That is, to the inside of the ohmic drain and source resistances.

Cgs = gate-source depletion capacitance For Vgs <= FC * PB Cgs = area * CGS * (1 - Vgs/PB)-M For Vgs > FC * PB Cgs = area * CGS * (1 - FC)-(1 + M) * (1 - FC * (1 + M) + M * Vgs/PB) where M = 0.5 Cgd = gate-drain depletion capacitance For Vgd <= FC * PB Cgd = area * CGD * (1 - Vgd/PB)-M For Vgs > FC * PB Cgd = area * CGD * (1 - FC)-(1 + M) * (1 - FC * (1 + M) + M * Vgd/PB) where M = 0.5 Temperature Effects IS(T) = IS * e(EG/N * Vt) * (T/T0-1) * (T/T0)(XTI/N) where EG = 1.11 N = 1 XTI = 0 PB(T) = PB * (T/T0) - 2 * Vt * (1.5 * ln(T/T0) - Eg/(2 * Vt - 1.1150877 * Vt0)) where Eg = bandgap in silicon at T Vt0 = thermal voltage at T0 CGS(T) CGD(T) = CGS * [1 + M * (.0004 * (T-T0) + [1-PB(T)/PB])] = CGD * [1 + M * (.0004 * (T-T0) + [1-PB(T)/PB])]
- 45 -

where

M =

0.5

KF(T) = KF * (PB[T]/PB) AF(T) = AF*(PB[T]/PB) The drain and source ohmic (parasitic) resistances have no temperature dependence. Noise The parasitic resistances, Rs and Rd, generate thermal noise. Is2 = 4 * k * T/(RS/area) Id2 = 4 * k * T/(RD/area)

The intrinsic JFET generates shot and flicker noise: Ic2 = 4 * q * Vt * 2/3 * I + KF * IAF/f

- 46 -

MUTUAL INDUCTOR (TRANSFORMER)

General Forms K<name> L<(1st ind.) name> L<(2nd ind.) name> <value> Examples KTUNED KTRNSFRM L3OUT LPRIMARY L4IN LSECNDRY

K<name> couples the 1st and 2nd inductors. Using the 'dot' convention, place a 'dot' on the first node of each inductor. In other words, given: I1 L1 L2 R2 K12 1 1 2 2 L1 0 0 0 0 L2 AC 1MA 10UH 10UH .1 .9999

the current through L2 will be in the opposite direction as the current through L1. The polarity is determined by the order of the nodes in the L . . . statement and not by the order of inductors in the K . . . statement. <value> is the coefficient of coupling which must be between 0 and 1. Note that ironcore transformers have a very high coefficient of coupling, greater than .999 in many cases. If there are several coils on a transformer, then there must be K . . . statements coupling all pairs. For instance, a transformer with a center-tapped primary and 2 secondaries would be written: * PRIMARY L1 1 2 L2 2 3 * SECONDARY L3 11 12 L4 13 14 * MAGNETIC COUPLING K12 L1 L2 K13 L1 L3 K14 L1 L4 K23 L2 L3 K24 L2 L4 K34 L3 L4

10UH 10UH 10UH 10UH .9999 .9999 .9999 .9999 .9999 .9999

The name, Kxx, need not be related to the names of the inductors it is coupling. However, this is good practice.
- 47 -

INDUCTOR

General Forms L<name> <(+) node> <(-) node> [(model) name] <value> Examples LLOAD L2 Model Parameters L inductance multiplier 15 1 0 2 20MH .2E-6 Units Default 1

The + and - nodes define the polarity meant when the inductor has a positive voltage across it. Also, positive current flows from the (+) node through the inductor to the (-) node. If [(model) name] is left out then <value> is the inductance in henries. If [(model) name] is specified, the <value> is multiplied by the value of the parameter L in the model to get the inductance. <value> is normally positive. It can be set negative, but not to zero.

- 48 -

MOSFET

General Forms M<name> + + + + + Examples M1 M13 M2A + + 14 2 15 3 0 2 AD=288P NRD=14 13 0 0 0 100 100 AS=288P NRS=14 PNOM L=25U W=12U PSTRONG NWEAK L=33U W=12U PD=60U PS=60U <(drain) node> <(gate) node> <(source) node> <(bulk/substrate) node> <(model) name> [L = <value>] [W = <value>] [AD = <value>] [AS = <value>] [PD = <value>] [PS = <value>] [NRD = <value>] [NRS = <value>]

Model Parameters LEVEL LD WD VTO KP GAMA PHI LAMBDA RD RS RSH IS JS PB CBD CBS CJ CJSW MJ MJSW FC model type (1, 2, or 3) lateral diffusion (channel length) lateral diffusion (channel width) zero bias threshold voltage transconductance parameter bulk threshold parameter surface potential channel-length modulation (level = 1 or 2 only) drain parasitic resistance source parasitic resistance drain/source diffusion sheet resistance bulk junction saturation current bulk junc. sat. cur. per area bulk junction potential zero-bias bulk-drain cap. zero-bias bulk-source cap. zero-bias bulk-drain/source bottom cap. per area zero-bias bulk-drain/source sidewall cap. per perimeter bulk junction bottom grading bulk junc. sidewall grading bulk junction forward-biased
- 49 -

Units

Default 1 0 0 0.0 2.0E-5 0 0.6 0 0 0 0 1.0E-14 0 0.8 0 0 0 0 0.5 0.3 0.5

meter meter Volt A/V**2 SQRT(V) Volt 1/Volt Ohm Ohm Ohm/sqr. Amp. Amp/m**2 Volt F F F/m**2 F/m

CGSO CGDO CGBO NSUB NSS NFS TOX TPG

XJ UO UCRIT UEXP UTRA VMAX NEFF XQC DELTA THETA ETA KAPPA KF AF

capacitance coefficient gate-source overlap cap. per channel width gate-drain overlap cap. per channel width gate-bulk overlap cap. per channel length substrate doping surface state density fast surface state density oxide thickness gate material, +1 = opposite of substrate -1 = same as substrate 0 = aluminum metallurgical junction depth surface mobility critical field for mobility degradation (level 2 only) mob. degr. exponent (LEVEL=2) transverse field coefficient for mob. degr. (LEVEL=2) maximum drift velocity channel charge coeff. (LEV=2) fraction of channel charge attributed to drain width effect on threshold mobility modulation static feedback (LEVEL=3) sat. field factor (LEVEL=3) flicker noise coefficient flicker noise exponent

F/m F/m F/m 1/cm***3 1/cm**2 1/cm**2 meter

0 0 0 0 0 0 infinite 1

meter cm**2/V-s Volt/cm

0 600.0 1.0E4 0 0

m/sec

0 1.0 0 0 0 0 0.2 0 1.0

1/Volt

Positive current is current flowing into a terminal. In particular, positive drain current flows from the drain through the channel to the source. L and W are the channel length and width in meters. L is decreased by twice LD to get the effective channel length. W is decreased by twice WD to get the effective channel width. AD and AS are the drain and source diffusion areas in square meters. PD and PS are the drain and source diffusion perimeters in meters. The drain-bulk and source-bulk saturation currents can be specified either by JS, which is multiplied by AD and AS, or by IS, which is an absolute value. The zero-bias depletion capacitances can be specified by CJ, which is multiplied by AD and AS, and by CJSW, which is multiplied by PD and PS. Or they can be set to CBD and CBS which are absolute values.

- 50 -

NRD and NRS are the relative resistivities of the drain and source diffusion in squares. The drain and source parasitic (ohmic) resistances can be specified either by RSH, which is multiplied by NRD and NRS, or by RD and RS which are absolute values. PD and PS default to 0. NRD and NRS default to 1. Defaults for L, W, AD, and AS may be set in the .OPTIONS statement. If AD or AS defaults are not set, they also default to 0. If L or W defaults are not set, they default to 100u. The MOSFET is modeled as an intrinsic MOSFET with an ohmic resistance (value = RD) in series with the drain and with another ohmic resistance (value = RS) in series with the source. In the following equations Vgs = gate-intrinsic source voltage Vgd = gate-intrinsic drain voltage Vds = intrinsic drain-intrinsic source voltage Vbs = substrate-intrinsic source voltage Vbd = substrate-intrinsic drain voltage Vt = thermal voltage T0 = nominal temperature (set with TNOM = . . . option) q = electron charge k = Boltzmann's constant Other variables are from the model parameter list. These equations describe an nchannel MOSFET. For p-channel devices, reverse the signs of all voltages and currents. DC Currents Ig = gate current = 0 Ib = substrate current = Ibs + Ibd Ibs = substrate-source leakage current = Iss * (e(Vbs/Vt)-1) Ibd = substrate-drain leakage current = Ids * (e(Vbd/Vt)-1) For IS > 0 Iss = IS Ids = IS For IS = 0 (IS defaulted) Iss = AS * JS Ids = AD * JS Id = drain current = -Idrain + Ibd Is = source current = Idrain + Ids For LEVEL = 1 For Vds => 0 (normal mode) (cutoff region) For Vgs-Vt0 < 0 Idrain = 0 For 0 <= Vgs-Vt0 <= Vds (saturation region) Idrain = (W/L) * KP * (1 + LAMBDA * Vds) * (Vgs - Vt0)2 For Vds < Vgs -Vt0 (linear region) Idrain = (W/L) * KP * (1 + LAMBDA * Vds) *
- 51 -

Vds * (2 * [Vgs - Vt0] - Vds) Vt0 = VTO + GAMMA * (sqrt[PHI - Vbs] - sqrt[PHI]) For Vds < 0 (inverted mode) switch the source and drain For LEVEL = 2 or LEVEL = 3 see Reference [1] below for the equations describing Idrain. Capacitance Note: all capacitances are between terminal of the intrinsic MOSFET. That is, to the inside of the ohmic drain and source resistances.

Cbs = = Cbd = =

substrate-source depletion capacitance junction + sidewall capacitances substrate-drain depletion capacitance junction + sidewall capacitances For CGS = 0 and CGD = 0 Cbs = AS * CJ * Cbsj + PS * CJSW * Cbss Cbd = AD * CJ * Cbdj + PS * CJSW * Cbds Otherwise Cbs = CBS * Cbsj + PS * CJSW * Cbss Cbd = CBD * Cbdj + PS * CJSW * Cbds For Vbs <= FC * PB Cbsj = (1 - Vbs / PB)-MJ Cbss = (1 - Vbs / PB)-MJSW For Vbs > FC * PB Cbsj = (1 - FC)-(1+MJ) * (1 - FC * (1 + MJ) + MJ * Vbs / PB) Cbss = (1 - FC)-(1+MJSW) * (1 - FC * (1 + MJ) + MJ * Vbs / PB) For Vbd <= FC * PB Cbdj = (1 - Vbd / PB)-MJ Cbds = (1 - Vbd / PB)-MJSW For Vbd > FC * PB Cbdj = (1 - FC)-(1+MJ) * (1 - FC * (1 + MJ) + MJ * Vbd / PB) Cbds = (1 - FC)-(1+MJSW) * (1 - FC * (1 + MJ) + MJ * Vbd / PB) Cgs = gate-source overlap capacitance = CGSO * W Cgd = gate-drain overlap capacitance = CGDO * W Cgb = gate-substrate overlap capacitance = CGBO * L See Reference [1] for the equations describing the capacitances due to the channel charge.

Temperature Effects IS(T) = IS * e(EG/Vt) JS(T) = JS * e(EG/Vt) PB(T) = PB * (T/T0) - 2 * Vt * (1.5 * ln(T/T0) - (EG/(2 * Vt - 1.1150877 * Vt0)) where EG = 1.16 - (.000702 * T2) / (T + 1108) Vt0 = thermal voltage at T0 CBD(T) = CBD * [1 + MJ * (.0004 * (T-T0) + [1-PB(T)/PB])]
- 52 -

CBS(T) CJ(T) CJSW(T) KP(T) UO(T) KF(T) AF(T)

= = = = = = =

CBS * [1 + MJ * (.0004 * (T-T0) + [1-PB(T)/PB])] CJ * [1 + MJ * (.0004 * (T-T0) + [1-PB(T)/PB])] CJSW * [1 + MJSW * (.0004 * (T-T0) + [1-PB(T)/PB])] KP * (T / T0)-1.5 UO * (T / T0) -1.5 KF * (PB[T] / PB) AF * (PB[T] / PB)

The drain and source ohmic (parasitic) resistances have no temperature dependence. Noise The parasitic resistances, RS and RD, generate thermal noise. Is2 = 4 * k * T/(RS/area) Id2 = 4 * K * T/(RD/area)

The intrinsic MOSFET generates shot and flicker noise: Ic2 = 4 * q * Vt * 2/3 * gm + KF * (Idrain)AF / f where gm = DIdrain/dVgs at the dc bias point Reference 1 For a more complete description of the MOSFET, see "The Simulation of MOS Integrated Circuits Using Spice2" by Andrei Vladimirescu and Sally Liu, Memorandum No. ERL-M80/7 this document is available by sending a check for $7.50 made out to Regents of the University of California to this address: Ms. Deborah Dunster EECS Industrial Liaison Program 457 Cory University of California Berkeley, CA 94720

- 53 -

BIPOLAR TRANSISTOR

General Forms Q<name> <(collector) node> <(base) node> + <(emitter) node> [(substrate) node] + <(model) name> [(area) value] Examples Q1 Q13 14 15 2 3 13 0 PNPOM 1 NPNSTRONG Units Amp. e-Volt

1.5 Default 1.0E-16 1.11 3 100 1.0 infinite infinite 0 1.5 1.0 1.0 infinite infinite 0 2.0 0 infinite RB 0 0 0 0.75 0.33 0 0.75 0.33 1

Model Parameters IS EG XTI, PT BF NF VAF, VA IKF, IK ISE, C2 NE BR NR VAR, VB IKR ISC, C4 NC RB IRB RBM RE RC CJE VJE, PE MJE, ME CJC VJC, PC MJC, MC XCJC saturation current Is temp. effect energy gap Is temp. effect exponent ideal max. forward beta fwd. current emission coeff. forward Early voltage corner for forward beta high current roll-off B-E leakage sat. current B-E leakage emission coeff. ideal max. reverse beta rvs current emission coeff. reverse Early voltage corner for reverse beta high current roll-off B-C leakage sat. current B-C leakage emission coeff. zero bias base resistance current where base resistance falls halfway to min. value min. base resistance emitter parasitic resistance collector parasitic resistance B-E zero-bias depl. cap. B-E built-in potential B-E junction exponential fact. B-C zero-bias depl. cap. B-C built-in potential B-C junction exponential fact. fraction of B-C depl. cap. connected internal to rb
- 54 -

Volt Amp Amp

Volt Amp Amp Ohm Amp Ohm Ohm Ohm F Volt F Volt

CJS, CCS C-S zero-bias depl. cap. VJS, PS C-S built-in potential MJS, MS C-S junction exponential fact. FC depl. cap. forward-bias coeff. TF ideal forward transit time XTF coeff. for tf bias dependence VTF voltage of tf Vbc dependence ITFhigh-current param. for tf Amp PTF excess phase @ 1/(tf * 2 * pi) hz TR ideal reverse transit time XTB fwd/rvs beta temp. coeff. KF flicker noise coefficient AF flicker noise exponent

F Volt

sec Volt 0 degrees sec

0 0.75 0 0.5 0 0 infinite 0 0 0 0 1.0

The substrate node is optional. If not specified it defaults to ground. Positive current is current flowing into a terminal. [(area) value] is the relative device area and defaults to 1.0. For those model parameters which have 2 names, such as VAF and VA, either name may be used. The transistor is modeled as an intrinsic transistor with ohmic resistances in series with the collector (value = RC / area), the base (value varies with current, see equations below), and with the emitter (value = RE / area). In the following equations Vbe = intrinsic base-intrinsic emitter voltage Vbc = intrinsic base-intrinsic collector voltage Vbx = extrinsic base-intrinsic collector voltage Vce = intrinsic collector-intrinsic emitter voltage Vcs = intrinsic collector-substrate voltage Vt = thermal voltage T0 = nominal temperature (set with TNOM = . . . option) q = electron charge k = Boltzmann's constant Other variables are from the model parameter list. These equations describe an npn transistor. For pnp devices, reverse the signs of all voltages and currents. DC Currents Ib = base current = area * (Ibe1 / BF + Ibe2 + Ibc1 / BR + Ibc2) Ic = collector current = area * (Ibe1 / Kqb - Ibc1 / Kqb - Ibc1 / BR - Ibc2) Ibe1 = ideal b-e current = IS * (e(Vbe / NF*Vt) - 1) Ibe2 = non-ideal b-e current = ISE * (e(Vbe / NE*Vt) - 1) Ibc1 = ideal b-c current = IS * (e(Vbc / NR*Vt) - 1) Ibc2 = non-ideal b-c current = ISC * (e(Vbc / NC*Vt) - 1) Kqb = (base majority-carrier charge) / (base majority-charge at zero bias) = Kq1 * (1 + sqrt[1 + 4 * Kq2]) / 2 Kq1 = (1 - Vbc / VA - Vbe / VB)-1
- 55 -

Kq2 = Ibe1 / IKF + Ibc1 / IKR Rb = actual base parasitic resistance For IRB = 0 Rb = (RB + (RB - RBM) / Kqb) / area For IRB > 0 Rb = RB + (3 * RBM * tan[x] - x) / (tan2[x] * x)) / area x = (-1 + sqrt[1 + 14.59025 * Ib / IRB])/ (2.4317 * sqrt[Ib / IRB]) Capacitances Note: all capacitances, except Cbx, are between terminals of the intrinsic transistor. That is, to the inside of the collector, base and emitter parasitic resistances. Cbx is between the intrinsic collector and the extrinsic base.

Cbe = base-emitter capacitance = area * (Cbet + Cbej) Cbet = transit time capacitance = tf * Gbe tf = effective tf = TF * (1+ XTF * e Vbc / (1.44 * VTF) * (1 + ITF / Ibe1) Gbe = dc b-e conductance = dIbe1/dVbe For Vbe <= FC * VJE Cbej = CJE * (1 - Vbe/VJE)-MJE For Vbe > FC * VJE Cbej = CJE * (1 - FC)-(1+MJE) * (1 - FC * (1 + MJE) + MJE * Vbe / VJE) Cbc = base-collector capacitance = area * (Cbct + XCJC * Cbcj) Cbct = transit time capacitance = TR * Gbc Gbc = dc b-e conductance = dIbc1/dVbc For Vbc <= FC * VJC Cbcj = CJC * (1 - Vbc/VJC)-MJC For Vbc > FC * VJC Cbcj = CJC * (1 - FC)-(1+MJC) * (1 - FC * (1 + MJC) + MJC * Vbc / VJC) Cbx = extrinsic base-intrinsic collector capacitance For Vbx <= FC * VJC Cbx = (1 - XCJC) * CJC * (1 - Vbx / VJC)-MJC For Vbx > FC * VJC Cbx = (1 - XCJC) * CJC * (1 - FC)-(1 + MJC) * (1 - FC * (1 + MJC) + MJC * Vbx / VJC) Ccs = base-substrate capacitance For Vcs <= FC * VJS Ccs = CJS * (1 - Vcs/VJS)-MJS For Vcs > FC * VJS Ccs = CJS * (1 - FC)-(1+MJS) * (1 - FC * (1 + MJS) + MJS * Vcs / VJS) Temperature effects IS(T) = IS * e(EG / N * Vt) * (T / To - 1) * (T / T0)(XTI / N) N=1
- 56 -

ISE(T) = ISE * e(EG / [NE * bf ] * Vt) * (T/To -1) * (T/T0)(XTI / [NE * bf]) ISC(T) = ISC * e(EG / [NC * bf ] * Vt) * (T/To -1) * (T/T0)(XTI / [NC * bf]) BF(T) = BF * bf BR(T) = BR * bf bf = (T / T0)XTB VJE(T) = VJE * (T/T0) - 2 * Vt * (1.5 * ln(T/T0) - (Eg/(2 * Vt -1.1150877 * Vt0)) VJC(T) = VJC * (T/T0) - 2 * Vt * (1.5 * ln(T/T0) - (Eg/(2 * Vt -1.1150877 * Vt0)) VJS(T) = VJS * (T/T0) - 2 * Vt * (1.5 * ln(T/T0) - (Eg/(2 * Vt -1.1150877 * Vt0)) where Eg = bandgap in silicon at T Vt0 = thermal voltage at T0 CJE(T) = CJE * [1 + MJE * (.0004 * (T - T0) + [1 - VJE(T) / VJE])] CJC(T) = CJC * [1 + MJC * (.0004 * (T - T0) + [1 - VJC(T) / VJC])] CJS(T) = CJS * [1 + MJS * (.0004 * (T - T0) + [1 - VJS(T) / VJS])] KF(T) = KF * (PB[T] / PB) AF(T) = AF * (PB[T] / PB) The collector, base, and emitter parasitic resistances have no temperature dependence. Noise The parasitic resistances generate thermal noise. Ic2 = 4 * k * T/(RC /area) Ib2 = 4 * k * T/Rb Ie2 = 4 * k * T/(RE /area) The base and collector currents generate shot and flicker noise: Ib2 = 2 * q * Ib + KF * IbAF / f Ic2 = 2 * q * Ic + KF * IcAF / f

- 57 -

RESISTOR

General Forms R<name> <(+)node> <(-)node> [(model) name] <value> Examples RLOAD R2 Model Parameters R TC1 TC2 resistance multiplier linear temperature coeff. quadratic temp. coeff. 15 1 0 2 2K 2.4E4 Units Default 1 0 0

/deg /deg**2

The + and nodes define the polarity meant when the resistor has a positive voltage across it. Positive current flows from the (+) node through the resistor to the (-) node. If the [(model) name] is left out then <value> is the resistance in ohms. If [(model) name] is specified, then <value> is multiplied by the value of the parameter R in the model to get the resistance. <value> is normally positive, but can be set negative. It must not be set to zero.

- 58 -

TRANSMISSION LINE

General Forms T<name> + + + Examples TDELAY T2 T3 T4 15 1 1 1 0 2 2 2 30 3 3 3 40 4 4 4 Z0=50OHM Z0=220 Z0=220 Z0=220 16 TD=111NS F=2.25MEGHZ F=4.5MEGHZ NL=0.5 <(Port A +) node> <(Port A -) node> <(Port B +) node> <(Port B -) node> Z0 = <value> [TD = <value] [F = <value> [NL = <value>]]

The transmission line has 2 ports, A and B. The + and - nodes define the polarity of a positive voltage at a port. Positive current flows from the + node through the port to the - node. Z0 is the characteristic impedance. The transmission line's length can be specified either by TD, a delay in seconds, or by F and NL, a frequency and a relative wavelength at F. NL defaults to 0.25 (F is then the quarter-wave frequency). Although TD and F are both shown as optional, one of the 2 must be specified. Examples T2, T3, and T4 all specify the same transmission line. During transient (.TRAN) analysis the internal time step is limited to be no more than 1/2 the smallest transmission delay, so short transmission lines will cause long run times.

- 59 -

INDEPENDENT VOLTAGE SOURCE

General Forms V<name> + + + Examples VBIAS VAC VACPHS VPULSE V3 <(+)node> <(-)node> [[DC] <value>] [AC <(magnitude) value> [(phase) value] [(transient specification) [PULSE][SIN][EXP] [PWL][SFFM]([value]*)]

13 2 2 1 26

0 3 3 0 77

2.3V AC .001 AC .001 90 PULSE (-1V 1V 2NS 2NS 2NS 50NS 100NS) DC .002 AC 1 SIN(.002 .002 1.5MEG)

Positive current flows from the (+) node through the source to the (-) node. The default value is zero for the DC, AC, and transient values. None, any, or all of DC, AC, and transient values may be specified. The AC phase value is in degrees. In the following descriptions of the available transient specifications TSTEP and TSTOP are the transient print step interval and the total analysis interval. They are set by the .TRAN statement. If present, the transient specification must be one of: General Form EXP(voff vpeak td tcr tr tfr) Example EXP(0 .2 1US 2US 40US 20US) Parameters name voff vpeak td tcr tr tfr meaning initial voltage peak voltage delay rise time constant rise time fall time constant default none none 0 TSTEP td + TSTEP TSTEP units Volts Volts sec sec sec sec

The EXP form causes the voltage to be voff for the first td seconds. Then, the voltage decays exponentially from voff to vpeak with a time constant of tcr. The decay lasts tr seconds. Then the voltage decays from vpeak back voff with a time constant tfr. General Form
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PULSE(v1 v2 vpeak td tr tf pw per) Example PULSE(-1V 1V 50US .1US .1US 2US 10US) Parameters name v1 v2 td tr tf pw per meaning initial voltage pulsed voltage delay rise time fall time fall time constant period default none none 0 TSTEP TSTEP TSTOP TSTOP units Volts Volts sec sec sec sec sec

The PULSE form causes the voltage to start at v1 and stay there for td seconds. Then, the voltage goes linearly from v1 to v2 during the next tr seconds. Then, the voltage stays at v2 for pw seconds. Then, it goes linearly from v2 back to v1 during the next tf seconds. It stays at v2 for per-(tr + pw + tf) seconds, and then the cycle is repeated except for the initial delay of td seconds. General Form PWL(t1 v1 t2 v2 . . . tn vn) Example PWL(0 -1V 1US 0V 10.1US 10V 20US 10V 20.1US 20V) Parameters name ti vi meaning time at corner voltage at corner default none none units sec Volts

The PWL form describes a piece-wise linear waveform. Each pair of time-voltage values specifies a corner of the waveform. The voltage at times between corners is the linear interpolation of the voltages at the corners. General Form SFFM(voff vampl fc mod fm) Example
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SFFM(0 2V 10.1MEGH 5 4KH) Parameters name voff vampl fc mod fm meaning offset voltage ampl voltage carrier frequency modulation index signal frequency default none none 1/TSTOP 0 1/TSTOP units Volts Volts Hertz Hertz

The SFFM (Single-Frequency FM) form causes the voltage to follow this equation: V = voff + vampl * sine((2 * pi * fc * time) + mod * sine(2 * pi * fm * time)) General Form SIN(voff vampl freq td df) Example SIN(0 .01 100KHZ 1MS 1E4) Parameters name voff vampl freq td df meaning offset voltage pulsed voltage frequency delay damping factor default none none 1/TSTOP 0 0 units Volts Volts Hertz sec 1/sec

The SIN form causes the voltage to start at 0 and stay there for td seconds. Then, the voltage becomes an exponentially damped sine wave described by this equation: V = voff + vampl * exp(- time - td) * df) * sine(2 * pi * freq* (time - td))

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SUBCIRCUIT CALL

General Forms X<name> [node]* <(subcircuit) name> Examples X12 XBUFF 100 101 200 201 DIFFAMP 13 15 UNITAMP

<(subcircuit) name> is the name of the subcircuit's definition (see .SUBCKT statement). There must be the same number of nodes in the call as in the subcircuit's definition. This statement causes the referenced subcircuit to be inserted into the circuit with the given nodes replacing the argument nodes in the definition. It allows you to define a block of circuitry once and then use that block in several places. Subcircuit calls may be nested. That is, you may have a call to a subcircuit A, whose definition contains a call to subcircuit B. The nesting may be to any level, but must not be circular. For instance, if subcircuit A's definition contains a call to subcircuit B, then subcircuit B's difinition must not contain a call to subcircuit A.

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AC ANALYSIS

General Forms .AC + Examples .AC .AC .AC LIN OCT DEC 101 10 20 100HZ 1KHZ 1MEG 200HZ 16KHZ 100MEG [LIN][OCT][DEC] <(points) value> <(start freq.) value> <(end freq.) value>

The AC analysis calculates the frequency response of a circuit over a range of frequencies. [LIN], [OCT], or [DEC} specify the type of sweep and <(points) value> the number of points in the sweep: 1) [LIN] Linear sweep. The frequency is sweept linearly from the starting to the ending frequency. (points) is the total number of points in the sweep. 2) [OCT] Sweep by octaves. The frequency is swept logarithmically by octaves. (points) is the number of points per octave. 3) [DEC] Sweep by decades. The frequency is swept logarithmically by decades. (points) is the number of points per decade. Exactly one of [LIN], [OCT], [DEC] must be specified. <(end freq.) value> must not be less than <(start freq.) value> which in turn must be greater than (and not equal to) 0. The whole sweep may specify only one point if you wish. The frequency response is calculated by linearizing the circuit around the bias point. All independent voltage and current sources which have AC values are inputs to the circuit. .PRINT and .PLOT statements must be used to output the results. If you specify group delay ("G" suffix) as an output you must be sure that the frequency steps are close enough together that the phase of that output changes smoothly from one frequency to the next. Group delay is calculated by subtracting the phases of successive outputs and dividing by the frequency increment.

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DC ANALYSIS

General Forms .DC + + + Examples .DC .DC .DC VIN I2 VCE -0.25 5MA 0 0.25 -2MA 10 0.05 .1MA .5 IB <(SOURCE) name> <(start) value> <(end) value> <(increment) value [(source) name] [(start) value] [(end) value] [(increment) value]

1MA 50UA

The .DC statement causes a DC sweep analysis to be performed on the circuit. The DC sweep analysis calculates the circuit's bias point over a range of source input values. <(source) name> can be any independent voltage or current source. During the DC sweep the source's value is set by the sweep, overrinding its DC value. <(start) value> may be greater or less than <(end) value>. That is, the sweep may go in either direction. <(increment) value> must not be 0 or negative. A nested sweep is available. A 2nd source, start, end, and increment values may be placed after the 1st sweep. In this case the first sweep will be the "inner" loop. The first sweep will be done for each value of the second sweep. The rules for the values in the second sweep are the same as for the first. The second sweep generates an entire print table or plot for each value of the sweep. .PRINT and .PLOT statements must be used to get the results of the DC sweep analysis.

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END OF CIRCUIT

General Forms .END Examples .END The .END statement marks the end of the circuit. All the data and commands must come before it. When the .END statement is reached, PSpice does all the specified analysis on the circuit. There may be more than one circuit in an input file. Each circuit and its commands are marked by a .END statement. PSpice processes all the analysis for each circuit before going on to the next one. Everything is reset at the beginning of each circuit. Having several circuits in one file gives the same results as having then in separate files and running each one separately. This is a convenient way to arrange a set of runs to be done overnight. The last statement in an input file must be a .END statement.

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END OF SUBCIRCUIT DEFINITION

General Forms .ENDS [(subcircuit) name] Examples .ENDS .ENDS

OPAMP

The .ENDS statement marks the end of a subcircuit definition (started by a .SUBCKT statement). It is good practice to repeat the subcircuit name although this is not required.

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FOURIER ANALYSIS

General Forms .FOUR Examples .FOUR 100KHZ V(5) V(6,7) I(VSENS3) <(freq.) value> <(output variable)>*

The fourier analysis performs a decomposition into fourier components the result(s) of a transient analysis. A .FOUR statement requires a .TRAN statement. <(output) variable> is an output variable of the same form as in a .PRINT or .PLOT statement for a transient analysis. The fourier analysis is done by starting with the results of the transient analysis for the specified output variables. From these voltages/currents the dc component, the fundamental, and the 2nd through 8th harmonics are calculated. The fundamental frequency is <(freq.) value>. Not all of the transient results are used, only the interval from the end back to 1/<(freq.) value> before the end is used. This means that the transient analysis must be at least 1/<(freq.) value> seconds long. The .FOUR analysis does not require .PRINT or .PLOT statements. The results are output as the analysis is done.

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INITIAL TRANSIENT CONDITIONS

General Forms .IC Examples .IC V(2)=3.4 V(102)=0 V(3)=-1V <V(<node>)=<value>>*

The .IC statement is used to set initial conditions for transient analysis. Each <value> is a voltage which is assigned to <node> for the duration of the bias point calculation for the transient analysis. After the bias point has been calculated and the transient analysis started, the node is "released". The .IC sets initial conditions for the transient analysis only. It does not affect the regular bias point calculation or the DC sweep.

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MODEL

General Forms .MODEL <name> <(type) name> + ([<(parameter) name>=<value>]*) Examples .MODEL .MODEL .MODEL .MODEL RMAX DNOM DRIV DLOAD RES (R=1.5 TC1=.02 TC2=.005) D (IS=1E-9) NPN (IS=1E-7 BF=30) NMOS (LEVEL=1 VTO=.7 CJ=.02PF)

The .MODEL statement defines a set of device parameters which can be referenced by devices in the circuit. <name> is the model name which devices use to reference a particular model. <name> must start with a letter. It is good practice to make this the same letter as the device name (e. g., D for diode, Q for bipolar transistor) but this is not required. <(type) name> is the device type and must be one of: RES resistor CAP capacitor IND inductor D diode NPN npn bipolar transistor PNP bipolar transistor NJF n-channel junction FET PJF p-channel junction FET NMOS n-channel MOSFET PMOS p-channel MOSFET Devices can only reference models of the correct type. A JFET can reference a model of types NJF or PJF but not of type NPN. There can be more than one model of the same type in a circuit, although they must have different names. Following <(type) name> is a list of parameter values enclosed by parenthesis. None, any, or all parameters may be assigned values. Default values are used for all unassigned parameters. The lists of parameter names, meanings, and default values are located in the individual device descriptions.

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NODESET

General Forms .NODESET Examples .NODESET V(2)=3.4 V(102)=0 V(3)=-1V <V(<node>)=<value>>*

The .NODESET statement helps calculate the bias point by providing initial guesses for some nodes. Some or all of the circuit's nodes may be given initial guesses. It is effective for the regular bias point and the bias point for transient analysis. It has no effect during the DC sweep or during the transient analysis itself. Unlike the .IC statement, .NODESET only provides an initial guess for some node voltages. It does not clamp those nodes to the specified voltages. However, by providing an initial guess, .NODESET may be used to "break the tie" in, for instance, a flip-flop, and make it come up in a desired state.

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NOISE ANALYSIS

General Forms .NOISE Examples .NOISE .NOISE V(5) V(10) VIN VSRC V(<node>[,<node>]) <name> [(interval) value]

20

The .NOISE statement causes a noise analysis of the circuit to be done. Noise analysis is done in conjunction with AC analysis and requires there to be a .AC statement. V(<node>[,<node>]) is an output voltage. It has a form such as V(5), which is the voltage at an output node, or a form such as V(4,5), which is the output voltage across 2 nodes. <name> is the name of an independent voltage source at which the equivalent input noise will be calculated. <name> is not itself a noise generator, but only a place at which to calculate the equivalent input noise. The noise-generating devices in a circuit are the resistors and the semiconductor devices. For each frequency of the AC analysis each noise generator's contribution is calculated and propagated to the output voltage. There, all the propagated noise values are rms-summed. The gain from the input source to the output voltage is also computed and from it and the total output noise an equivalent input noise is calculated. If [(interval) value] is present, then it is the print interval. Every nth frequency, where n is the print interval, a detailed table is printed showing the individual contributions of all the circuit's noise generators to the total noise at the output. If [(interval) value] is not present, then no detailed table is printed. The detailed table is printed while the analysis is being done, and does not need .PRINT or .PLOT statements. The output noise and equivalent input noise may be output with .PRINT or .PLOT statements if desired. Noise analysis is the only analysis for which you have a choice about using the .PRINT or .PLOT statements.

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BIAS POINT

General Forms .OP Examples .OP The .OP statement causes detailed information about the bias point to be printed. The bias point is calculated whether or not there is a .OP statement. Without a .OP statement the only information about the bias point which is output is a list of the node voltages. With a .OP statement the currents and power dissipation of all the voltage sources are printed. Also the small signal (linearizad) parameters of all the non-linear controlled sources and all the semiconductor devices are output. The .OP statement controls output for the regular bias point only. The .TRAN statement controls output for the transient analysis bias point.

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OPTIONS

General Forms .OPTIONS Examples .OPTIONS NOECHO NOMODE + DEFAD=150P DEFAS=150P .OPTIONS ACCT RELTOL=.01 DEFL=12U DEFW=8U [(option) name]* [<(option) name>=<value>]*

The .OPTIONS statement is used to set all the options, limits, and control parameters for the various analysis except for the output width (see the .WIDTH statement). The options are simply listed in any order. There are 2 kinds of options: those with values and those without. The options without values are flags of various kinds and simply listing the option name is sufficient. The table below lists the flag options. The default for any flag option is "off" (i.e., the opposite of specifying the option). Option NOPAGE NOECHO NODE NOMOD LIST OPTS ACCT Meaning suppresses paging and printing of a banner for each major section of output suppresses listing of the input file causes output of net list (node table) suppresses listing of model parameters causes summary of all circuit elements (devices) to be output causes values for all options to be output summary and accounting information is output at the end of all the analysis

The table below lists the options with values and their defaults. Option DEFL DEFW DEPAD DEFAS TONOM Meanining default length (L) for MOSFET's default width (W) for MOSFET's default drain area (AD) for MOSFET's default source area (AS) for MOSFET's default temperature; also temperature at which model parameters are assumed to have been measured no. digits output in print tables cpu time allowed for this circuit
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Units meter meter m**2 m**2 deg. C

Default 100u 100u 0 0 27

NUMDGT CPTIME

sec

4 1E6

LIMPTS ITL1 ITL2 ITL4 ITL5

RELTOL TRTOL ABSTOL CHGTOL VNTOL PIVREL PIVTOL GMIN

max. points allowed for any print table or plot DC and bias point "blind" iteration limit DC and bias point "educated guess" iteration limit iteration limit at any point in transient analysis total iteration limit for all points in transient analysis (ITL5=0 is the same as ITL5=infinite) relative accuracy of voltages and currents transient analysis accuracy adjustment best accuracy of currents best accuracy of charges best accuracy of voltages relative magnitude required for pivot in matrix solution absolute magnitude required for pivot minimum conductance used for branch

201 40 20 10 5000

.001 7.0 Amp 1pA Coulomb .01pC Volt 1uV 1E-3 1E-13 1E-12

1/Ohm

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PLOT

General Forms .PLOT + Examples .PLOT .PLOT .PLOT .PLOT DC V(3) V(2,3) V(R1) I(VIN) I(R2) IB(Q13) VBE(Q13) AC VM(2) VP(2) VM(3,4) VG(5) VDB(5) IR(6) II(7) NOISE INOISE ONOISE DB(INOISE) DB(ONOISE) TRAN V(3) V(2,3) (0,5V) ID(M2) I(VCC) (-50MA,50MA) [DC][AC][NOISE][TRAN] [[(output variable)]* ([(lower limit) <value>,<(upper limit) value>]]*

The .PLOT statement allows results from DC, AC, noise, and transient analysis to be output in the form of "line printer" plots. These plots are made by using characters to draw the plot, hence will work with any kind of printer. [DC], [AC], [NOISE], and [TRAN] are the analysis types which can be output with .PLOT statements. Exactly one analysis type must be specified. Following the analysis type is a list of the output variables and (possibly) y-axis scales. A maximum of 8 output variables are allowed on the .PLOT statement. However, an analysis may have any number of .PLOT statements. See section 6.4 for a description of the possible output variables. The range and increment of the x-axis is fixed by the analysis being plotted. The y-axix defaults to a "nice" range determined by the ranges of the output variables. If different output variables differ considerably in their output ranges, then the plot is given more than one y-axis with ranges corresponding to the different output variables. The range of the y-axis can be set by adding (<(lower limit) value>,<(upper limit) value>) at the end of the .PLOT statement. This will force all output variables onto the same y-axix with the specified range. The same form, (<(lower limit) value>,<(upper limit) value>), can also be inserted one or more times in the middle of a set of output variables. Each occurrence defines one y-axis with the specified range. All the output variables which come between it and the next range to the left in the .PLOT statement are put on its corresponding y-axis. In example 4 the 2 voltage outputs go on the y-axis with range (0,5V) and the 2 current outputs go on the y-axis with range (-50MA,50MA).

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PRINT

General Forms .PRINT Examples .PRINT .PRINT .PRINT .PRINT DC V(3) V(2,3) V(R1) I(VIN) I(R2) IB(Q13) VBE(Q13) AC VM(2) VP(2) VG(5) VDB(5) IR(6) II(7) NOISE INOISE ONOISE DB(INOISE) DB(ONOISE) TRAN V(3) V(2,3) ID(M2) I(VCC) [DC][AC][NOISE][TRAN] [[(output variable)]*

The .PRINT statement allows results from DC, AC, noise, and transient analysis to be output in the form of tables, referred to as print tables. [DC], [AC], [NOISE], and [TRAN] are the analysis types wich can be output with .PRINT statements. Exactly one analysis type must be specified. Following the analysis type is a list of the output variables. A maximum of 8 output variables are allowed on one .PRINT statement. However, an analysis may have any number of .PRINT statements. See section 6.4 for a description of the possible output variables. The values of the output variables are printed as a table with each column corresponding to one output variable. The number of digits which are printed for each value can be changed by the NUMDGT on the .OPTIONS statement.

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PROBE

General Forms .PROBE .PROBE Examples .PROBE .PROBE V(3) V(2,3) V(R1) VM(2) VP(2) I(VIN) I(R2) + IB(Q13) VBE(Q13) VDB(5) The .PROBE statement writes the results from DC, AC, and transient analysis to a data file named PROBE.DAT for use by the Probe graphics post-processor. See chapter 8 for a description of Probe and its use of the PROBE.DAT file. The first form (with no output variables) writes all the node voltages and all the device currents to the data file. The list of device currents written is the same as the device currents allowed as output variables as described in section 6.4 (e.g., ID(M1) is allowed for transient analysis but not for AC analysis). The second form writes only those output variables specified to the data file. Note that unlike the .PRINT and .PLOT statements there is no analysis name before the output variables. Also, the number of output variables is not restricted to 8. See section 6.4 for a description of the possible output variables. This form is intended for users without a fixed disk who need to limit the size of the PROBE.DAT file written.

[(output variables)]*

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SENSITIVITY ANALYSIS

General Forms .SENS Examples .SENS V(9) V(4,3) V(17) I(VCC) The .SENS statement causes a DC sensitivity analysis to be performed. <(output variable)> has the same format and meaning as in the .PRINT statement for DC and transient analysis. However, in the case of <(output variable)> being a current, it is restricted to be the current through a voltage source. By linearizing the circuit about the bias point, the sensitivities of each of the output variables to all the device values and model parameters will be calculated and output. This can easily generate huge amounts of output. <(output variables)>*

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SUBCIRCUIT DEFINITION

General Forms .SUBCKT Examples .SUBCKT OPAMP 1 2 101 102 The .SUBCKT statement begins the definition of a subcircuit. The definition is ended with a .ENDS statement. All the statements between .SUBCKT and .ENDS are included in the definition. Whenever the subcircuit is called, by a X . . . statement, all the statements in the definition replace the calling statement. <name> is the subcircuit's name and is used by a X . . . statement to reference the subcircuit. It must start with a letter. [node]* is an optional list of nodes. There must be the same number of nodes in the subcircuit calling statements an in its definition. When the subcircuit is called, the actual nodes (the ones in the calling statement) replace the argument nodes (the ones in the defining statement). Subcircuit definitions may be nested. That is, a .SUBCKT statement may appear in the statements between a .SUBCKT and a .ENDS. However, this is not recommended. Subcircuit calls may also be nested. That is, a X . . . statement may appear between a .SUBCKT and a .ENDS. This is recommended. Subcircuit definitions should only contain device statements (statements without a leading ".") and possibly .MODEL statements. Models are available within the subcircuit definition in which they appear and any nested subcircuit definitions. So, if a .MODEL statement appears in the main circuit, that model is available in the main circuit an all subcircuits. <name> [node]*

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TEMPERATURE

General Forms .TEMP Examples .TEMP .TEMP 125 0 <(temperature) value>*

27

125

The .TEMP statement sets the temperature at which all analysis are done. The temperatures are in degrees centigrade. If more than one temperature is given, then all analysis are done for each temperature. It is assumed that the model parameters were measured or derived at the nominal temperature. The nominal temperature is 27 deg. C unless set otherwise by the TNOM option in the .OPTIONS statement.

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TRANSFER FUNCTION

General Forms .TF Examples .TF .TF V(5) VIN V(15,14) I(VDRIV) <(output variable)> <(input voltage source) name>

The .TF causes the small-signal transfer function to be calculated by linearizing the circuit around the bias point. <(output variable)> has the same format and meaning as in the .PRINT statement. However, in the case of <(output variable)> being a current, it is restricted to be the current through a voltage source. The gain from <(input voltage source) name> to <(output variable)> will be output along with the input and output resistances. The output is done as soon these quantities are calculated and does not require .PRINT or .PLOT statements.

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TRANSIENT ANALYSIS

General Forms .TRAN[/OP] <(print step) value> <(final time) value> + [(noprint) value [(step ceiling) value]] Examples .TRAN .TRAN/OP .TRAN 1NS 1NS 1NS 100NS 100NS 100NS

20NS 0NS .1NS

The .TRAN statement causes a transient analysis to be performed on the circuit. The transient analysis calculates the circuit's behaviour over time, starting at time 0 and going to <(final time) value>. The transient analysis uses an internal time step which is adjusted as the analysis proceeds. Over intervals where there is little activity, the internal time step is increased and during busy intervals it is decreased. <(print step) value> is the time interval used for printing or plotting the results of the transient analysis. It is also a ceiling on the internal time step. Since the results are computed at different times than they are printed, a second-order polynomial interpolation is used to obtain the printed values. The transient analysis always starts at time 0. However it is possible to suppress printing of a portion of the analysis. [(noprint) value] is the amount of time from time 0 which is not printed. Sometimes one is concerned about the size of the internal time step. [(step ceiling) value] allows a ceiling smaller than the print interval to be put on the internal time step. If [(step ceiling) value] is larger than the print interval, it is ignored. Prior to doing the transient analysis, PSpice computes a bias point for the circuit separate from the regular bias point. This is done because the independent sources can have different values at the start of a transient analysis than their DC value. Normally only the node voltages are printed for the transient analysis bias point. However, the /OP suffix on the .TRAN keyword will cause the same detailed printing of the bias point that the .OP statement causes for the regular bias point. .PRINT and .PLOT statements must be used to get the results of the transient analysis.

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WIDTH

General Forms .WIDTH Examples .WIDTH .WIDTH OUT=80 OUT=132 OUT=<value>

The .WIDTH statement sets the width of the output. <value> is in columns and must be either 80 (the default) or 132.

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COMMENT

General Forms *(text) Examples * This is an example of a comment A statement beginning with "*" is a comment and has no effect. The use of comment statements throughout the input is recommended. For instance, it is good practice to place a comment just before a subcircuit definition to identify the nodes: * .SUBCKT OPAMP +IN 100 -IN 101 V+ 1 V2 +OUT 200 -OUT 201

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6.4 Output Variables This section describes the types of output variables allowed in .PRINT and .PLOT statements. Each .PRINT or .PLOT statement may have up to 8 output variables. 6.4.1 DC Sweep and Transient Analysis

For the DC sweep and transient analysis these are the available output variables: General form V(<node>) V(<(+)node>,<(-)node>) V(<name>) Vx(<name>) Vxy(<name>) Vz(<name>) I(<name>) Ix(<name>) Iz(<name>) Examples V(3) V(3,2) V(R1) VB(Q3) VGS(M13) VA(T2) I(D5) IG(J10) Meaning voltage at node voltage across (+) and (-) nodes voltage across 2-terminal device voltage at a terminal voltage across a pair of terminals voltage at one end of a transmission line current through <name> current into a terminal current at one end of a transmission line Meaning voltage between node 3 and ground voltage between nodes 3 and 2 voltage across resistor R1 voltage between base of transistor Q3 and ground gate-sourse voltage of M13 voltage at port A of T2 current through diode D5 current into gate of J10

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For the V(<name>) and I(<name>) forms, <name> must be a 2-terminal device. These are the 2-terminal devices: 1st Letter C D E F G H I L R V Device Capacitor Diode Voltage-controlled voltage source Current-controlled current source Voltage-controlled current source Current-controlled voltage source Independent current source Inductor Resistor Independent voltage source

For the Vx(<name>), Vxy(<name>) and Ix(<name>) forms, <name> must be a 3 or 4terminal device name and x and y must each be a terminal abbreviation. These are the devices and the terminals: 1st Letter J Device Junction FET Terminals D G S D G S B C B E S (drain) (gate) (source) (drain) (gate) (source) (bulk, substrate) (collector) (base) (emitter) (substrate)

MOSFET

Bipolar transistor

For the Vz(<name>) and Iz(<name>) forms, <name> must be the name of a transmission line (begins with "T") and z must be "A" or "B". "A" means port A (the first 2 nodes) and "B" means port B (last 2 nodes).

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6.4.2 AC Analysis For AC analysis, the output variables listed in section 6.4.1 are augmented by adding a suffix. These are the available suffixes: Suffix (none) M DB P G R I Examples V(2,3) VM(2) VDB(R1) VBEP(Q3) IAG(T2) IR(VIN) II(R13) Meaning magnitude magnitude magnitude in decibels phase group delay (-d[phase]/d[frequency]) real part imaginary part Meaning magnitude of voltage across nodes 2 & 3 magnitude of voltage at node 2 db magnitude of voltage across R1 phase of base-emitter voltage at Q3 group delay of current at port A of T2 real part of current through VIN imaginary part of current through R13

Not as many types of current outputs are available as for DC and transient analysis. Specifically, currents through these devices only are availablle: 1st Letter R C I L T V Device Resistor Capacitor Independent current source Inductor Transmission line Independent voltage source

For the other devices, you must put a zero-valued voltage source in series with the device (or terminal) of interest. Then, print (or plot) the current through this voltage source.

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6.4.3 Noise Analysis For noise analysis, the output variables are predefined. Output variable INOISE ONOISE DB(INOISE) DB(ONOISE) Meaning ONOISE equivalent at input node total rms summed noise at output node INOISE in decibels ONOISE in decibels

The noise from any one device cannot be .PRINT'd or .PLOT'd. However, you can use the print interval on the .NOISE statement to output this information.

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6.5 Job Statistics Summary If you specify the ACCT option on the .OPTIONS statement, PSpice will print various statistics about the run at its end. This section lists the items printed and their meanings. The list follows the format of the output, going from left to right and then down to the next line. Item's Name NUNODS NCNODS Meaning Number of distinct nodes in circuit before subcircuit expansion. Number of distinct nodes in circuit afer subcircuit expansion. If there are no subcircuits then NCNODES will be the same as NUNODES. Total number of distinct nodes in circuit. This is NCNODS plus the internal nodes generated by parasitic resistances. If no device has parasitic resistances then NUMNOD=NCNODS. Total number of devices (elements) in circuit after subcircuit expansion. This includes all statements which do not begin with "." or "X". Number of diodes after subcircuit expansion. Number of bipolar transistors after subcircuit expansion. Number of junction FET's after subcircuit expansion. Number of MOSFET's after subcircuit expansion. Number of different temperatures. Number of steps of DC sweep. Number of print steps of transient analysis. Number of steps of AC analysis. 1/0: noise analysis was/was not done. 1/0: run had/had not have an error. The circuit matrix is conceptually (not physically) of dimension NSTOP x NSTOP. Actual number of entries in circuit matrix at beginning of run. Actual number of entries in circuit matrix at end of run. Number of terms in circuit matrix which come from more than 1 device. Difference between NTTAR and NTTBR. Number of floating-point operations needed to do one solution of circuit matrix. Percent sparsity of circuit matrix. Number of internal time steps in transient analysis.
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NUMNOD

NUMEL

DIODES BJTS JFETS MFETS NUMTEM ICVFLG JTRFLG JACFLG INOISE NOGO NSTOP NTTAR NTTBR NTTOV IFILL IOPS PERSPA NUMTTP

NUMRTP

NUMNIT MEMUSE/MAXMEM

COPYKNT

READIN SETUP DCSWEEP BIASPNT

MATSOL

ACAN TRANAN OUTPUT LOAD OVERHEAD TOTAL JOB TIME

Number of times in transient analysis that a time step was too large and had to be cut back. Total number of iterations for transient analysis. Amount of circuit memory used/available in bytes. There are 2 memory pools. Exceeding either one will abort the run. Number of bytes which were copied in the course of doing memory management for this run. Time spent reading and error checking the input file. Time spent setting up the circuit matrix pointer structure. Time spent and iteration count for calculating DC sweep. Time spent and iteration count for calculating bias point and bias point for transient analysis. Time spent solving circuit matrix (this time is also included in each analysis' time). The iteration count is the number of times the rows or columns were swapped in the course of solving it. Time spent and iteration count for AC analysis. Time spent and iteration count for transient analysis. Time spent preparing .PRINT tables and .PLOT plots. Time spent evaluating device equations (this time is also included en each analysis' time). Other time spent during run. Total run time excluding the time to load the files PSPICE1.EXE and PSPICE2.EXE into memory.

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Chapter 7

HINTS
7.1 Large Circuits The entire description of a circuit must fit into RAM during all the analysis. However, none of the results of any analysis are stored in RAM. All results, including intermediate results for .PRINT's and .PLOT's, go to the output file or one of the temporary files. So, whether your run will fit into RAM depends only on how big it is, not on how long your analysis are. You can get an idea of sizes by using ACCT option on the .OPTIONS statement and looking at the MAXMEM and MEMUSE numbers printed at the end of runs which ran successfully. MAXMEM is the amount of memory available and MEMUSE is the peak memory usage of that circuit. There are 2 memory pools. The size of the first pool is fixed; the size of the 2nd pool depends on how much available memory your system has. If either pool is exceeded then your circuit will not run. If your circuit does not fit there are several possible remedies: 1) Break it up into pieces and run the peces separately. 2) Reduce the amount memory taken up by DOS and other resident software. This might mean deleting a print spooler and/or reducing the buffer count in the CONFIG.SYS file from 10 to 4. 3) Buying more memory. Remedies (2) and (3) are only effective if the 2nd memory pools is the one being exceeded. Since the size of the first memory pool is fixed, increasing the amount of available memory will not expand it any. 7.2 Large Outputs If you have a run with several circuits, or for several temperatures, or one which uses the sensitivity analysis, it is possible for it to generate a large output file. If you have an XT this will not be a problem. If you have a PC, however, it is possible to fill up the diskette containing the output file. The best solution for this is to direct the output to the printer instead of a file. If this is not feasible, then it is still possible to improve the situation by directing the output to am empty diskette instead of the one containing PSPICE1.EXE. To do this, you must execute PSPICE1.EXE and PSPICE2.EXE manually instead of using PSPICE.BAT. You will want to put the input file on Diskette 1, but direct the output to drive B:. For instance:
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B: A:PSPICE1 A:FF12 B:FF12 while Diskette 1 (with FF12.CIR) is in drive A: and an empty diskette is in drive B:. When PSPICE1.EXE is done it will come back with the DOS prompt. Now remove Diskette 1 from drive A: and replace it with Diskette 2 and type: A:PSPICE2 PSPICE2.EXE will continue to write output to B:FF12.OUT. The purpose of the command "B:" is to change the default diskette from A: to B:. This will make PSpice put its temporary files on the diskette in drive B: instead of A:. The temporary files cannot be on drive A: since you change diskettes there in the middle of the run. 7.3 Convergence Problems The DC sweep, bias point calculation, and transient analysis all use iterative algorithms. These algorithms start with a set of node voltages and, each iteration, calculate a new set which, hopefully, will be closer to a solution of Kirchoff's voltage and current laws. In other words, an ititial guess is used and successive iterations are supposed to converge to the solution. If the iterations do not converge onto a solution, then the analysis fails. The DC sweep skips the remaining points in the sweep. Failure of the bias point calculation prevents the analysis (e.g., AC, sensitivity, etc.) which depend on it from being done. The transient analysis skips the remaining time. PSpice will succesfully analyse most circuits. Considerable effort has gone into removing problems which prevented analysis of known problem circuits. However, there are no guarantees. If an analysis fails for your circuit, what to do? 7.3.1 DC Sweep The most common cause of failure of the DC sweep analysis is an attempt to analyse a circuit with regenerative feedback, for instance a Schmidt trigger. There is an easy solution for this problem: don't do this. The DC sweep is not appropriate for calculating the hysteresis of such circuits because it is required to jump discontinuously from one solution to another at the crossover point. Instead, use transient analysis. Use PWL to generate a very slow ramp, say 1 second. There is no cpu-time penalty for this because PSpice will adjust the internal time step to be large away from the crossover point and small in that region. By using a very slow ramp, you are assured that the switching time of the circuit will not affect hysteresis
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levels. In effect, you are doing the same as you would in the lab: slowly changing the input voltage until the circuit switches. There is a fringe benefit: for hysteresis measurements you normally want both the upward and downward switching levels. With DC sweep, you must do 2 runs: one sweeping upward and one downward. But with a PWL source in transient analysis, you can sweep it upward and then back down again in one analysis. 7.3.2 Bias Point The best aid for problems in calculating the bias point is the .NODESET statement. By giving PSpice "hints" in the form of initial guesses for node voltages, it starts out that much closer to the solution. A little judgement must be used in assigning node voltages. If you know the correct voltages to within, say, 1/2 volt, then assigning the input node to an opamp would be useless, whereas assigning its output node would help. It is rare to have a convergence problem in the bias point calculation. This is because PSpice contains an algorithm for automatically scaling the power supplies if it is having trouble finding a solution. This algorithm first tries to find a bias point with the power supplies at full scale. If there is no convergence, then the power supplies are cut back to half strength and the program tries again. If there is still no convergence, then the supplies are cut by another factor of 2 to quarter strength, and so on. Since, at power supplies = 0, the circuit definitely has a solution (all nodes at 0 volts), the program will find a solution for some value of the supplies scaled far enough back. It then uses that solution to help it work its way back up to a solution with the power supplies at full strength. You can see on the CRT when this algorithm is in effect. If the message: Power supplies cut back to 50% (or some other percentage) appears on the CRT while the program is calculating the bias point, then it is using this algorithm to find the bias point of a stubborn circuit. 7.3.3 Transient Analysis There are only a few remedies available for this one. Try setting ITL4=40 in an .OPTIONS statement. Try also relaxing RELTOL from .001 to .01. 7.3.4 We Want to Know Much effort has already gone into weeding out sources of convergence problems and that effort will continue. If you run into a problem, we would like to know about it. Without examples of convergence problems, no progress can be made. To help us in this effort, please copy the input and output files of a problem run onto a diskette and mail it to MicroSim. Your diskette will be returned immediately. It will also help if you can accompany the diskette with a schematic of the circuit. All
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problems examples received will be considered proprietary to the sender and confidential. Unfortunately, it takes a lot of time to track down and fix the source of a convergence problem. In general, it will not be solved in time to help the design of the circuit which shows the problem. 7.4 Negative Component Values In general, resistors, capacitors, and indutctors should have positive values. However, there are cases when negative component values are desired. This occurs most often in filter design when one analyses an RLC circuit which is equivalent to a real circuit. In the transformation from the real to the RLC equivalent, one can end up with negative components. PSpice allows you to specify negative values for resistors, capacitors, and inductors. It has no special difficulty finding a bias point for such a circuit, or for doing a dc sweep. The .AC and .NOISE analysis are also happy with negative components. In the case of resistors, their noise contribution comes from the absolute value of their value (components are not allowed to generate negative noise). However, the transient analysis may fail for a circuit with negative components. They may create instabilities in time, specially negative capacitors and inductors, which the analysis cannot handle. For transient analysis: caveat emptor. In all cases, components must not be given a value of zero. 7.5 Multiple Circuits in an Input File Sometimes it is desired to set up a job which will do more than one circuit without your intervention. For instance, you might like to run a set of circuits overnight. This can be done by putting more than one circuit into one input file. Each circuit ends with a .END statement and begins with a title statement, just as usual. PSPICE1.EXE will read through all the circuits in the input file and then PSPICE2.EXE will process each one in sequence. The output file will contain the outputs from each circuit in the same order as they appeared in the input file. The effect is the same as if you had run each circuit separately and then concatenated all the outputs.

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Chapter 8

PROBE
8.1 Introduction Probe is the graphics post-processor for PSpice. Probe lets you look at various results of a simulation using graphics, both on the display and on hard copy. In effect, Probe is a "software oscilloscope". Running PSpice corresponds to building or changing a breadboard, and running Probe corresponds to looking at the breadboard with an oscilloscope. 8.2 Installation If you purchased Probe, then you received a diskette labeled "Diskette 3" or "Diskette 4" which contains these files: PROBE.BAT PROBE.FLP PROBE.DEV PROBE.EXE Installing Probe consists of steps similar to those in chapter 2 for installing PSpice. 8.2.1 If You Have a Fixed Disk Copy PROBE.EXE into the same directory which contains PSPICE1.EXE and PSPICE2.EXE. Copy PROBE.DEV into the same directory which contains the circuit (.CIR) file that you are running on PSpice. Also, replace the contents of PSPICE.BAT on your fixed disk with the contents of PROBE.BAT: COPY A:PROBE.BAT PSPICE.BAT 8.2.2 If You Do Not Have a Fixed Disk Make a backup copy of Diskette 3 or 4. Place Diskette 1 in drive A: and Diskette 3 in drive B:. Copy PROBE.DEV onto Diskette 1 and replace the contents of PSPICE.BAT on Diskette 1 with the contents of PROBE.FLP: COPY B:PROBE.DEV A:PROBE.DEV COPY B:PROBE.FLP A:PSPICE.BAT 8.2.3 Setting up the Device File

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Since graphics is very device-dependent, Probe needs to know what devices are attached to your system. Probe finds this information by looking in the device file, which is named PROBE.DEV. Before runnning Probe, you will need to change PROBE.DEV to reflect the hardware which is attached to your system. You can make these changes with any text editor, including the EDLIN text editor which comes with DOS (for instructions on how to run the EDLIN, see the EDLIN chapter in your DOS User's Guide). Look at the device file as it is shipped for an example of the format. You will see the lines: Display = Text Hard-copy = PRN:,Text There need not be 2 lines, and their order is not important. Also, whether the text is upper or lower case does no matter. However, there must be one line (and no more than one) which specifies the type of display. This line has the format: Display = <display name> where <display name> can be one of: Text IBM Hercules "Text" means that the display is non-graphic (e. g., the IBM monochrome display). In this case, Probe will produce graphs using characters as dots (similar to the line-printer style plots that PSpice produces). These do not offer much resolution, but "Text" is hardware-independent: it can be used with any display. "IBM" is the IBM color-graphics 640x200 display. It is not the new Professional Graphics Controller 640x480 display. We plan to add the Professinal Graphics Controller in the future under a different name than "IBM". "Hercules" is the Hercules Graphics Card 720x348 display. To specify hard-copy devices, use a line with the format: Hard-copy = <port name>, <device name> There do not have to be any lines of this form in the device file (in which case Probe cannot produce hard-copy output). Or, you can have more than one (if your system has more than one printer). The port name must be: PRN, LPT1, LPT2, LPT3, COM1, or COM2
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depending on which port your device is connected to. A trailing ":" is optional. Normally, PRN is the port name of the primary printer. Serial devices are normally connected to COM1. If you have any doubt about the port name, try to copy a text file (such as PROBE.DEV) to that port and see what happens. For instance: COPY PROBE.DEV LPT1: If the text of PROBE.DEV is correctly copied to the device, then LPT1 is the correct port name. If you get the message: 1 file(s) copied but nothing is copied, then that is not the right port name. For the hard-copy devices, the device name can be one of: Text Text132 Okidata Okidata132 Epson Epson132 EpsonMX EpsonMX132 As with the display, "Text" denotes a non-graphic device. In this case Probe will produce character-type plots, similar to the ones produced by PSpice. "Text132" is similar to "Text" except that the plots will be 132 characters wide instead of 80. "Okidata" is the Okidata ML92 or ML93 dot-matrix printer. "Okidata132" is the same as "Okidata" except that 13.2-inch wide plots are produced instead of 8. "Epson" is the Epson FX80 or FX100 dot-matrix printer. "Epson132" is the same as "Epson" except that 13.2-inch wide plots are produced instead of 8. "EpsonMX" is the Epson MX80 or MX100 printer with Graftrax. "EpsonMX132" is the same as "EpsonMX" except that 13.2-inch wide plots are produced instead of 8. 8.3 Running Probe Probe gets the simulation data by reading a data file named PROBE.DAT. This file is produced by PSPICE if you have the statement: .PROBE in the PSpice input file. The command files which come with Probe (PROBE.BAT and PROBE.FLP) are set up to automatically run Probe right after PSpice, if PSpice produces the PROBE.DAT file.
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8.3.1 If You Have a Fixed Disk You need do nothing special to run Probe. It will be run automatically if you have included a .PROBE statement in the PSpice input file. 8.3.2 If You Do Not Have a Fixed Disk You will need to switch diskettes after PSPICE2.EXE has started. If you have included a .PROBE statement in the PSpice input file then, after PSpice has started, you will see the message: Reading and Checking Circuit This indicates that PSPICE1.EXE has loaded from drive A: and is running. After a short while you will see the additional message: Circuit Read and Checked and PSPICE2.EXE will begin loading from drive B: (drive B:'s light will come on and the drive will make noise). When PSPICE2.EXE has finished loading (the drive's light goes off), remove Diskette 2 from drive B:, insert the diskette which contains PROBE.EXE. Then you can leave the machine. When you come back Probe will have started. If you have not included a .PROBE statement in the PSpice input file, then Probe will not be run and no diskette switching is necessary. PSpice puts the PROBE.DAT file on Diskette 1 (in drive A:). The PROBE.DEV file must also be on Diskette 1 before starting the run. 8.3.3 More on Running Probe This section can be skipped on your first time through. It contains information on other ways to run Probe. You can run Probe by itself, assuming that a data file has already been created. The command for running Probe is the same as in the PROBE.BAT file: PROBE <data file> <device file> If you do not specify a device file, it defaults to PROBE.DEV. If you do not specify a data file, it defaults to PROBE.DAT. So, PROBE PROBE PROBE.DAT PROBE PROBE.DAT PROBE.DEV
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are all equivalent. When PSpice runs it will overwrite the data file. If you want to save a data file, give it a different name before your next PSpice run. For instance: RENAME PROBE.DAT OPAMP13.DAT Then later you can re-examine that data with: PROBE OPAMP13.DAT If you have a fixed disk it may be more convenient to have the PROBE.DEV file in the directory which contains the PROBE.EXE file than in the directory which contains your circuit files. For instance, if you would like to set things up so that Probe looks for PROBE.DEV in the directory \PROGRAMS, use a text editor to change PSPICE.BAT so that: IF EXIST PROBE.DAT PROBE becomes: IF EXIST PROBE.DAT PROBE PROBE.DAT \PROGRAMS\PROBE.DEV 8.3.4 Avoiding File Size Limits This section can be skipped on your first time through. It contains some information on avoiding file size limitations when running with floppy diskettes. When PSpice and Probe are run there are 7 working files which reside on Diskette 1 in drive A:. These are: 1) The input circuit file (.CIR) 2) The PSpice output file (.OUT) 3) The Probe data file (PROBE.DAT) 4) PSpice temporary file PSPICEA.TMP 5) PSpice temporary file PSPICEB.TMP 6) PSpice temporary file T3.TMP 7) PSpice temporary file T4.TMP PSPICEA.TMP is about the same size as the circuit file. PSPICEB.TMP is between 30 and 60kbytes, depending on the size of the circuit (but not on the amount of output you requested). T3.TMP stores the analysis results as they are calculated for .PRINT and .PLOT statements only. T4.TMP is less than 10kbytes. One approach to saving diskette space when using Probe is not to request .PRINT ou .PLOT output from PSpice. This is reasonable since you will be looking at the simulation results with Probe anyway.
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This leaves us with the PROBE.DAT file. The size of this file for transient analysis is roughly = (no. transistors) x (no. print steps) x 20 bytes. The size for the other analysis is about 2.5 times smaller. For even a medium-size circuit this can easily get to be 100kbytes or larger, which will overflow Diskette 1. The reason for PROBE.DAT's large size is that all node voltages and device currents are stored at each internal time (or frequency or . . .) step. To avoid this, there is an alternate form of the .PROBE statement which lets you specify which voltages and currents you would like stored. It is: .PROBE <output valiable 1>, <output variable 2>, . . . This has a form similar to the .PLOT and .PRINT statements. The difference is that the analysis type (TRAN, AC, DC) is not included. Also, there is no limit on the number of variables which can be put on one .PROBE statement. With this form, only the output variables specified are stored in the PROBE.DAT file. By using this form of the .PROBE statement in the circuit file, you can make the PROBE.DAT file as small as you like. 8.4 An Example This section steps you through a simple use of Probe. It is intended to be tutorial, instead of comprehensive. It is assumed that you have followed instructions in section 8.2 on installing Probe. We will be using EXAMPLE1 as our circuit. To get started, go into EXAMPLE1.CIR with a text editor and add (before the .END statement) the statement: .PROBE Then, run EXAMPLE1 with the command: PSPICE EXAMPLE1 After PSPICE has run, Probe will start. After examining the data file and the device file, Probe will put up this screen:

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Probe Graphics-Processor Version 1.00 Dec. 1984 (C) Copyright 1984 by MicroSim Corporation Unauthorized copying of this program is prohibited

Circuit: EXAMPLE1 - AN ILLUSTRATION OF ALL COMMANDS Date/Time run: 11/28/84 17:13:40 Temperature: 35.0

0)Exit Program 1)DC Sweep 2)AC Analysis 3)Transient Analysis: 1

Underneath the Probe logo message, there is some information about the circuit which was simulated. The date and time refers to when the simulation (not Probe) was run. At the bottom is a menu. All Probe commands are activated through a menu. Each menu has a set of commands following a number or, if there are more than 10, following a letter. After the last command there is a suggested command. This is the default. If you hit the carriage return key instead of a number you will activate the default command. In this case, hittting "1" or carriage return will get you the same command. A menu does not always have all its comands listed. For instance, if you look at section 8.5.2 you will find that there are 2 more commands in this menu. These commands only apply if the data file contains data for more than one temperature or circuit. Since that is not the case for EXAMPLE1, these commands are no displayed. This menu lists the analysis as its commands. EXAMPLE1 did all 3 analysis, so all 3 are listed. Hit "1" without a carriage return (or just carriage return, since "1" is the default command) and we will look at the DC sweep. After the command, the screen will show:

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All voltages and currents are available

-300mV

-200mV

-100mV

.0mV VIN

100mV

200mV

300mV

0) Exit 1) Add Trace 2) X Axis 3) Y Axis 4) Add Plot 5) Hard Copy : 1

Going into an analysis puts the screen into graphics mode and puts up a plot. It also puts up the plot menu. It also defaults the x-axis to the DC sweep variable (VIN in this case) and autoranges the x-axis. After going into an analysis, one normally wants to look at one or more voltages or currents. We call these "traces", analogous to an oscilloscope trace, and have the Add Trace command as the default. Hit "1" or carriage return. You may enter an output variable in the same format as in a .PLOT or .PRINT statement in PSpice. You may also enter arithmetic expressions of output variables. For now, let's keep it simple; enter "V(5)" and hit carriage return. The screen will show:

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-300mV

-200mV

-100mV

.0mV VIN

100mV

200mV

300mV

0) Exit 1) Add Trace 2) Remove Trace 3) X Axis 4) Y Axis 5) Add Plot 6) Hard Copy : 1

The first command in all the menus is always the exit command. This command exits that menu and goes back to the previous menu. Type "0". Now you are back to the original screen and menu. Type "0" again and you will be back to DOS. 8.5 Probe Menus and Commands This section is intended for reference. It is a complete list of Probe menus and their commands. 8.5.1 General Comments on the Input With one exception, Probe disregards upper/lower case: "V(5)" and "v(5)" are equivalent. The exception is the "m" scale suffix for numbers. "m" means milli (1E-3) whereas "M" means mega (1E+6). Values are input in the same form as discussed in section 4.4, except that suffixes "MEG" and "MIL" are not available. Also, Probe makes some use of the units following a number. So, 2e-3 2mV .002v

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are all the same number, but Probe notes that the 2nd and 3rd forms are volts whereas the firs is dimensionless. The units are only used to label the axis, they never affect the numerical results. So, it is always safe to leave off units suffixes. The units which Probe recognizes are: V A W d s H Volts mperes Watts Degrees (of phase) Seconds Hertz

Probe also knows that W=V*A, V=W/A, and A=W/V. So, if you add a trace which is: V(5)*ID(M13) The axis values will be labeled with "W". Menu commands are selected by typing the command's number (or letter) without a carriage return. Inputs requiring more than one character, such as "V(5)" after the Add Trace command, do require a carriage return to terminate them. 8.5.2 Start-up Menu This menu appears when Probe is started. It allows you to select a section of the simulation results. When PSpice runs, it writes the results of each analysis out to the data file (PROBE.DAT) as a section. So, there is one section for each simulation (DC sweep, AC analysis, transient analysis) which was done, for each temperature, and for each circuit which was in the input file. For example, if the PSpice input file contained 2 circuits, one running DC sweep and AC analysis at 2 temperatures and the other running DC sweep and AC analysis at 1 temperature, then the data file would contain 4 sections. Note: If the data file has only one section, then this menu is skipped when Probe starts and you are put directly into the plot menu. Exit Program Exits Probe and returns control to DOS. The data file is left unchanged. DC Sweep Selects the DC sweep section of the data file and then transfers control to the plot menu. This command only appears if the circuit selected has a DC sweep section (i.e, if the PSpice circuit contained a .DC statement). AC Analysis
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Selects the AC analysis section of the data file and then transfers control to the plot menu. This command only appears if the circuit selected has an AC analysis section (i.e, if the PSpice circuit contained a .AC statement). Transient Analysis Selects the transient analysis section of the data file and then transfers control to the plot menu. This command only appears if the circuit selected has a transient analysis section (i.e, if the PSpice circuit contained a .TRAN statement). Next Temperature or Circuit Selects the next temperature or, if we are at the last temperature already, the next circuit. this command does not appear if we are at the last temperature of the last circuit in the data file. Previous Temperature or Circuit Selects the previous temperature or, if we are at the first temperature already, the previous circuit. This command does not appear if we are at the first (or only) temperature of the first (or only) circuit in the data file. 8.5.3 Plot Menu This menu appears after an analysis is selected from the start-up menu. The plot menu is the main menu in Probe: most of your time will be spent in it. If the data file contains only 1 section - 1 circuit run at 1 temperature with only 1 analysis - then the start-up menu is skipped and Probe goes directly to the plot menu. In this case, you do not have a chance to see the circuit title which the start-up menu displays. That is easily fixed by exiting the Plot menu back to the start-up menu, looking at the circuit title, and then re-entering the plot menu. While you are in the plot menu, 1 or more plots are displayed on the screen. If there are more than one, one of these is marked as selected by the characters "SEL>>". Some plot commands, such as Add Trace and Remove Trace, work on only 1 plot. This is always the selected plot. Exit Exits the plot menu and returns to the start-up menu. Add Trace Adds a trace to the selected plot. The trace can be any output variable in the data file, or an arithmetic expression involving output variables. A plot can have up to 8 traces. If the selected plot already has 8 traces, this command does no appear.
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The format and meaning of output variables are the same as in PSpice (see section 6.4), with these differences: 1) The V(<name>), Vx(<name>), and Vxx(<name>) forms are not available. These are, for instance, V(R3), VG(M2), or VCE(Q13). The reason for this is that the data file does not contain the information on wich nodes each device is connected to. You must use the node number form: V(5), V(13,2), etc. We plan to correct this in a future release. 2) The noise variables are not available. The output of the noise analysis cannot be examined with Probe. 3) In AC analysis, group delay is not available for both voltages and currents. We plan to correct this in a future release. 4) The sweep variable is available, in addition to the voltages and currents. For the DC sweep, the sweep variable's name is the name of the voltage or current source being swept. For the AC analysis the sweep variable's name is "Frequency". For transient analysis the name is "Time". Currents through devices are available, just as they are in PSpice. Arithmetic expressions of output variables are allowed. The available operators are: "+", "-", "*", "/", along with parenthesis. The available functions are: ABS(x) SGN(x) Absolute value of x +1 if x > 0 0 if x = 0 -1 if x < 0 20 * log(ABS(x))

DB(x)

(log base 10)

For instance, assume that we are in the DC sweep, that the sweep variable is named VCE, that it runs from 0 to 5 V and that we wish to add a 10K resistor's load line to the plot. After selecting the Add Trace command, the correct expression would be: (5V - VCE) / 10K This will add a line to the plot running from .5mA at the left to 0mA at the right. As another example, assume that Q13 has its collector connected to node 25 and the emitter to node 3. Then, to plot the power dissipated in the transistor by the collector current, the correct expression would be: V(13,3) * IC(Q13) Remove Trace Removes one or all traces from the selected plot. The traces are listed using the text which you typed in when adding them to the plot with the Add Trace command. If the selected plot has no traces this command does not appear.
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X Axis Enters the axis menu and applies those commands to the x-axis. Since all plots on the display share the same x-axis, these commands affect every plot. Y Axis Enters the axis menu and applies those commands to the y-axis of the selected plot. Add Plot Adds a plot to the display. The new plot becomes the selected plot. The display can contain up to 20 plots. If it already contains that many, this command does not appear. The new plot is added at the top of the display. The other plots are squeezed down to make room for it. All the plots share the same x-axis, but each has its own y-axis. Select Plot Allows you to change which plot is selected. If the display has only one plot, this command does not appear. After you choose this command the plots are listed from bottom-most to top-most. The one you choose becomes the selected plot and the selected characters "SEL>>", are moved to it. Remove Plot Removes the selected plot from the display. If the display has only one plot this command does not appear. After the plot is removed the other plots are stretched to fill the display. The top-most plot becomes the selected plot. Hard Copy Prints or plots the display onto a hard copy device. The hard copy devices available are determined by the information in the device file. Hard Copy will list the devices specified in PROBE.DEV and ask you to choose one. If only one device was specified in PROBE.DEV then this step will be skipped. Next, you are asked to choose the length of the plot. The plot will have the x-axis running the long way on the paper (the same as the PSpice plots). You may choose a length of 1 page (11 inches), 2 pages (22 inches), or "Other" which lets you enter any number of inches. Then the plot is made. During this time the keyboard is dead. Once the plot is finished, you are returned to the plot menu.
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Note: If you do not get a plot on your hard copy device, use Ctrl-Break to abort Probe and then try to copy a text file to the device. For example: COPY PROBE.DEV PRN: If the copy is successful, double check that you have correctly listed the device and its port name in the device file (PROBE.DEV). 8.5.4 Axis Menu This menu appears after the "X Axis" or "Y Axis" command is chosen from the plot menu. If it is entered via the "Y Axis" command, the y-axis of the selected plot is the one that will be affected. Exit Returns to the plot menu. Log Sets the axis to be logarithmic. If the axis is already logarithmic this command does not appear. You cannot execute this command if either end of the axis' range is zero or negative. For AC analysis, the x-axis starts out as logarithmic, Otherwise, all axis start out as linear. Linear Sets the axis to be linear. If the axis is already linear this command does not appear. For AC analysis, the x-axis starts out as logarithmic. Otherwise, all axis start out as linear. Auto-range Sets the range of the axis to be the range of its variable/traces, rounded to a "nice" value. The range of the axis will be automatically adjusted as its variable/traces are changed. If the axis is already auto-ranging this command does not appear. For the x-axis, the range is determined by the x variable. For a y-axis, the range is determined by the combined ranges of all the traces on that plot. All axis start out as auto-ranging. Set range
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Sets the range of the axis to your specification. Once set, the range is not affected by changes in the axis' variable/traces. It can only be changed by an "Auto-range" or another "Set range" command. After you choose this command you will be propted to enter a range. This has the format: <value>, <value> or <value> <value> or (<value>, <value>) For instance, 0V, 5V 05 (0, 5V) are all correct formats for a range. The first is better, though. By specifying the correct units, you assure that the units will appear on the numbers labeling the axis' tick marks. This command may be used to invert an axis. For instance, instead of having a range of (0V, 5V), one can set the range (5V, 0V). All the traces on that axis are then inverted. X variable Sets the variable for the x-axis. the x variable starts out as the sweep variable of the analysis: voltage or current for DC sweep, frequency for AC analysis, or time for transient analysis. But you can set it to any variable or expression you choose. If the axis is a y-axis this command does not appear. After you choose this command, you will be prompeted to enter a variable or expression. The format for this is the same as for the Add Trace command in the plot menu. This command can be very useful since it allows you to plot any variable versus any other over the course of the analysis. See section 8.6.1 for an example of using it to get the hysteresis curve of a Schmidt trigger. 8.6 Suggestions This section contains some suggestions for making more effective use of Probe. 8.6.1 Hysteresis Curves Using the "X variable" command of the axis menu, it is possible to get a good look at a circuit's hysteresis. Consider, for instance, the following circuit: Shimidt Trigger Example
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* VIN 20 0 PLW(0, 0.8V 1, 2.0V 2, 0.8V) * IN OUT X1 20 2 SCHIMIDT * .TRAN .01 2 .PROBE * (definition of subcircuit SCHMIDT) * .END where the subcircuit SCHMIDT is a schmidt trigger. Instead of using the DC sweep to look at the hysteresis, we use the transient analysis, sweeping VIN from .8V to 2V and back down to .8V very slowly. This has 2 advantages: 1) It avoids convergence problems (see section 7.3.1). 2) It covers both the upward and downward transitions in one analysis. After the simulation, when we are in Probe, the x-axis variable is initially set to be "Time". By using the "X variable" command in the axis menu, we can set the x-axis variable to be V(20). Then, we can use the "Add Trace" command to put V(2) on the plot. This plots the output of the schmidt trigger against its input, which is what we want. The result looks like this:

6.0V

4.0V

2.0V

0.0V 0.8V V(2) 1.0V 1.2V 1.4V V(20) 0) Exit 1) Add Trace 2) Remove Trace 3) X Axis 4) Y Axis 5) Add Plot 6) Hard Copy : 1 1.6V 1.8V 2.0V

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8.6.2 Curve Families The DC sweep in PSpice allows nested sweeps. That is, you can sweep one source repeatedly while a second is also stepped through a range of values. Look up the .DC command in chapter 6 for the exact syntax. Consider the following example: Curve Family Example * .OPTIONS NOPAGE NOMODE LIMPTS=1000 VD 1 0 DC 5V VG 2 0 DC 0V M1 1 2 0 0 M W=88.9U L=25.4U .MODEL M NMOS( . . . model parameters . . .) * DC VD 0V 5V .1V VG 0V 2V .5V .PROBE * .END When this circuit is run and we add the trace "ID(M1)" (M1's drain current), the result looks like this:

100uA

50uA

0uA 0.0V ID(M1)

1.0V

2.0V VD

3.0V

4.0V

5.0V

0) Exit 1) Add Trace 2) Remove Trace 3) X Axis 4) Y Axis 5) Add Plot 6) Hard Copy : 1

8.6.3 Load Lines In the DC sweep, we can add the load line for a resistor by adding a trace which computes the load line from the sweep voltage. Assume that the x-axis variable is the
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sweep voltage VC which runs from 0 to 5V. The expression which will add a trace that is the load line for a 10K resistor is: (5V - VC) / 10K This can be useful in conjuntction with a curve family such as discussed in section 8.6.2. 8.6.4 Timing Diagrams Timing diagrams are done using the Add Plot command, putting one trace on each plot. Multiple plots on the display share the same x-axis. For transient analysis this is normally time. Note that you can use the Set range command of the axis menu to invert any plot's yaxis. For instance, instead of (0V, 5V) you could set the range to be (5V, 0V). This may be used to put active-low signals "right-side up".

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Appendix A EXAMPLE1

VCC 101

RC1 10K

RC2 10K

4 100 VIN Q1 RS1 1K 2 CLOAD 5PF

5 3 Q2 6 RS2 1K 0

RBIAS 20K

7 Q4 102 Q3

VEE

EXAMPLE1

EXAMPLE1 - AN ILLUSTRATION OF ALL COMMANDS * * THIS CIRCUIT USES ALL POSSIBLE COMMANDS TO CREATE THE MAXIMUM * AMOUNT OF OUTPUT POSSIBLE FROM SUCH A SMALL CIRCUIT. * NORMALLY, ONLY A FEW KINDS OF OUTPUT (SUCH AS TRANSIENT ANALYSIS) * WOULD BE RUN. * .OPT ACCT LIST NODE OPTS NOPAGE RELTOL=.001 .WIDTH OUT=80 .TEMP 35 .TF V(5) VIN .DC VIN -0.25 0.25 0.005 - 114 -

.AC DEC 10 1 10GHZ .TRAN/OP 5NS 500NS .SENS V(5) .NOISE V(5) VIN 20 .FOUR 5MEG V(5) VIN 100 0 AC 1 SIN(0 0.1 5MEG) VCC 101 0 DC 12 VEE 102 0 -12 Q1 4 2 6 QNL Q2 5 3 6 QNL RS1 100 2 1K RS2 3 0 1K RC1 4 101 CRES 10K RC2 5 101 CRES 10K Q3 6 7 102 QNL Q4 7 7 102 QNL RBIAS 7 101 20K CLOAD 4 5 5PF .MODEL CRES RES (R=1 TC1=.02 TC2=.0045) .MODEL QNL NPN (BF=80 RB=100 CCS=2PF TF=0.3NS TR=6NS CJE=3PF CJC=2PF + VA=50) .PRINT DC V(4) V(5) .PLOT DC IC(Q2) .PRINT AC VM(5) VP(5) .PLOT AC VCM(Q2) VCP(Q2) .PRINT NOISE INOISE ONOISE .PLOT NOISE INOISE ONOISE .PRINT TRAN V(4) V(5) .PLOT TRAN V(4) V(5) I(CLOAD) .PROBE .END

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Appendix B MORE EXAMPLES

B.1 Introduction The following examples illustrate many of the features of PSpice. B.2 Non-linear Controlled Source
TD0 - TUNNEL DIODE OSCILLATOR VBIAS 0 2 -120MV LS 2 1 2.5UH CS 1 0 100PF GTD 1 0 POLY(1) + -3.95510115972848E-17 + -2.93646217292003E+00 + +4.12669748472374E+01 + +6.08207899870511E+03 + -3.73459336478768E+04 + -3.53021176453665E+05 + +5.34093436084762E+05 + +1.68527934888894E+05 .DC VBIAS 0 -600MV .PLOT DC I(VBIAS) (0,5MA) .TRAN 5NS 500NS 0 5NS .PLOT TRAN(1) V(1) .OPT ACCT LIST NODE OPTS .WIDTH IN=80 OUT=80 .END

1 0 +1.80727308405845E-01 -6.09649516869413E+02 +1.44146702315112E+05 -4.56234076434067E+05 -5MV

NOPAGE

B.3 Inductors and Transformers

KTEST - MUTUAL INDUCTANCE TEST .OPT ACCT LIST NODE OPTS NOPAGE .WIDTH IN=80 OUT=80 .AC DEC 10 1 1GHZ .TRAN 20NS 2000NS ISRC 1 0 SIN(0 1 1MEG) AC 1 L1 1 0 1MH L2 2 0 1MH L3 3 0 10MH L4 4 0 100MH K12 L1 L2 0.99 K13 L1 L3 0.995 K14 L1 L4 0.99 K23 L2 L3 0.995 K24 L2 L4 0.99 K34 L3 L4 0.995 R1 1 0 1K R2 2 0 1K R3 3 0 1K R4 4 0 1K .PLOT AC VM(1) VP(1) VM(2) VP(2) VM(3) VP(3) VM(4) VP(4) .PLOT TRAN V(1) V(2) V(3) V(4) - 116 -

.END

B.4 Medium-size Bipolar Circuit

UA741 CKT - UA 741 OPERATIONAL AMPLIFIER .OPT ACCT LIST NODE OPTS ITL4=20 NOPAGE .OPT .WIDTH IN=80 OUT=80 .DC VIN -0.25 0.25 0.005 .AC DEC 10 1 10GHZ .TRAN 2.5US 250US VCC 27 0 15 VEE 26 0 -15 VIN 30 0 SIN(0 0.1 10KHZ) AC 1 RS1 2 30 1K RS2 1 0 1K RF 24 2 100K R1 10 26 1K R2 9 26 50K R3 11 26 1K R4 12 26 3K R5 15 17 39K R6 21 20 40K R7 14 26 50K R8 18 26 50 R9 24 25 25 R10 23 24 50 R11 13 26 50K COMP 22 8 30PF Q1 3 1 4 QNL Q2 3 2 5 QNL Q3 7 6 4 QPL Q4 8 6 5 QPL Q5 7 9 10 QNL Q6 8 9 11 QNL Q7 27 7 9 QNL Q8 6 15 12 QNL Q9 15 15 26 QNL Q10 3 3 27 QPL Q11 6 3 27 QPL Q12 17 17 27 QPL Q14 22 17 27 QPL Q15 22 22 21 QNL Q16 22 21 20 QNL Q17 13 13 26 QNL Q18 27 8 14 QNL Q19 20 14 18 QNL Q20 22 23 24 QNL Q21 13 25 24 QPL Q22 27 22 23 QNL Q23 26 20 25 QPL .MODEL QNL NPN(BF=80 RB=100 CCS=2PF TF=0.3NS TR=6NS CJE=3PF + CJC=2PF VA=50) .MODEL QPL PNP(BF=10 RB=20 TF=1NS TR=20NS CJE=6PF CJC=4PF VA=50) .PRINT DC V(8) V(24) .PLOT DC V(24) .PRINT AC VM(24) VP(24) .PLOT AC VM(24) VP(24) .PRINT TRAN V(8) V(24) .PLOT TRAN V(24) V(8) .END

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V+

(27)
Q14 Q10 Q11 Q12

(22) (3)
Q15 NON INVERTING INPUT INVERTING INPUT Q1 Q2 R5 39K Q20

(17)

Q22

(23)
Q16 R10 50

(21)

(1) (2) (4) (5)

R6 40K

OUTPUT

(20)
Q3 Q4

(6)
COMP 30pF R9 25

(24)

- 118 (7)
Q7

Q21

(25)
Q18

(8) (15)

Q23

(9)
Q5 Q6 OFFSET NULL Q8 OFFSET NULL Q9

(14)
Q19

(13)

(10)
R1 1K R2 50K R3 1K

(11)

(12)
R4 3K Q13 R7 40K

(18)
R8 50

Q17 R11 50K

V-

(26)

UA741 Schematics for Examples in Appendix B

B.5 Subcircuits
BUSCKT BUS CONTENTION CIRCUIT .WIDTH OUT=80 .OPT ACCT NODE LIST ITL5=30000 NOPAGE ABSTOL=1E-9 * VCC 7 0 DC 5 VIN1 11 0 PULSE(0.4 4.0 5NS 0 0 1 10) *VIN2 12 0 PULSE(0.4 4.0 10NS 0 0 1 10) * X1 11 2 3 21 BUSCON *X2 12 2 3 22 BUSCON * C2 2 0 1PF C3 3 0 1PF * R2 2 7 1K R3 3 7 250 * *.PLOT TRAN V(21) V(22) V(2) V(3) .PLOT TRAN V(21) V(2) V(3) .TRAN 1NS 150NS * .SUBCKT BUSCON 1 2 3 5 * X1 1 2 4 NAND2 X2 4 6 5 NAND2 X3 5 1 3 6 NAND3 X4 6 3 OCBUF3 X5 6 2 OCBUF2 .ENDS * .SUBCKT OCBUF2 1 2 * VCC 5 0 DC 5 * R1 5 6 6K R2 5 7 3.4K R3 5 8 1.6K R4 10 9 100 R5 9 0 1K * D1 0 1 DIODE * Q1 11 6 1 TRAN Q2 7 11 10 TRAN Q3 8 9 0 TRAN Q4 2 8 0 TRAN .ENDS * .SUBCKT OCBUF3 1 2 * VCC 8 0 DC 5 * R1 8 3 420 R2 1 4 1K R3 5 0 .7K R4 6 0 10 R5 7 0 10 * D1 4 5 DIODE * - 119 -

Q1 3 3 6 TRAN 5 Q2 2 3 7 TRAN 5 Q3 3 5 0 TRAN .ENDS * .SUBCKT NAND2 11 12 3 * VCC 7 0 DC 5 * R1 7 21 4K R2 7 5 1.6K R3 7 1 130 R4 4 0 1K * D1 2 3 DIODE * Q1 1 5 2 TRAN Q2 3 4 0 TRAN Q3 5 6 4 TRAN * D11 0 11 DIODE D12 0 12 DIODE Q11 6 21 11 TRAN Q12 6 21 12 TRAN .ENDS * .SUBCKT NAND3 11 12 13 3 * VCC 7 0 DC 5 * R1 7 21 4K R2 7 5 1.6K R3 7 1 130 R4 4 0 1K * D1 2 3 DIODE * Q1 1 5 2 TRAN Q2 3 4 0 TRAN Q3 5 6 4 TRAN * D11 0 11 DIODE D12 0 12 DIODE D13 0 13 DIODE Q11 6 21 11 TRAN Q12 6 21 12 TRAN Q13 6 21 13 TRAN .ENDS * .MODEL DIODE D(RS=40 TT=0.1NS CJO=0.9PF) .MODEL TRAN NPN(BF=50 RB=70 RC=40 CCS=2PF TF=0.1NS TR=10NS CJE=0.9PF + CJC=1.5PF PC=0.85 VA=50) .END

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B.6 Noise
NOISE EXAMPLE - UA 741 OP AMP W/ FLICKER NOISE .WIDTH OUT=80 .OPT ACCT LIST NODE OPTS NOPAGE .OPT .AC DEC 10 10 100K .NOISE V(24) VIN 10 .PLOT NOISE ONOISE INOISE VCC 27 0 DC 15 VEE 26 0 DC -15 VIN 30 0 AC 1 RS1 2 0 100 RS2 30 1 100 RF 2 24 4K R1 10 26 1K R2 9 26 50K R3 11 26 1K R4 12 26 3K R5 15 17 39K R6 21 20 40K R7 14 26 50K R8 18 26 50 R9 24 25 25 R10 23 24 50 R11 13 26 50 COMP 22 8 30PF Q1 3 1 4 QNL Q2 3 2 5 QNL Q3 7 6 4 QPL Q4 8 6 5 QPL Q5 7 9 10 QNL Q6 8 9 11 QNL Q7 27 7 9 QNL Q8 6 15 12 QNL Q9 15 15 26 QNL Q10 3 3 27 QPL Q11 6 3 27 QPL Q12 17 17 27 QPL Q14 22 17 27 QPL Q15 22 22 21 QNL Q16 22 21 20 QNL Q17 13 13 26 QNL Q18 27 8 14 QNL Q19 20 14 18 QNL Q20 22 23 24 QNL Q21 13 25 24 QPL Q22 27 22 23 QNL Q23 26 20 25 QPL .MODEL QNL NPN(BF=200 RB=100 CCS=2PF TF=0.3NS TR=6NS CJE=3PF + CJC=2PF VA=50 KF=6.6E-16 AF=1.0) .MODEL QPL PNP(BF=50 RB=20 TF=1NS TR=20NS CJE=6PF CJC=4PF VA=50 + KF=6.3E-13 AF=1.5) .END

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B.7 Medium-size Mosfet Circuit

MOSAMP1 - MOS AMPLIFIER - DC/AC .OPTIONS ACCT ABSTOL=10N VNTOL=10N NOPAGE .WIDTH OUT=80 .DC VIN -60MV +6MV 0.66MV .OP .AC DEC 10 100 10MEG M1 15 15 1 32 M W=88.9U L=25.4U M2 1 1 2 32 M W=12.7U L=266.7U M3 2 2 30 32 M W=88.9U L=25.4U M4 15 5 4 32 M W=12.7U L=106.7U M5 4 4 30 32 M W=88.9U L=12.7U M6 15 15 5 32 M W=44.5U L=25.4U M7 5 0 8 32 M W=482.6U L=12.7U M8 8 2 30 32 M W=88.9U L=25.4U M9 15 15 6 32 M W=44.5U L=25.4U M10 6 21 8 32 M W=482.6U L=12.7U M11 15 6 7 32 M W=12.7U L= 106.7U M12 7 4 30 32 M W=88.9U L=12.7U M13 15 10 9 32 M W=139.7U L=12.7U M14 9 11 30 32 M W=139.7U L=12.7U M15 15 15 12 32 M W=12.7U L=207.8U M16 12 12 11 32 M W=54.1U L=12.7U M17 11 11 30 32 M W=54.1U L=12.7U M18 15 15 10 32 M W=12.7U L=45.2U M19 10 12 13 32 M W=270.5U L=12.7U M20 13 7 30 32 M W=270.5U L=12.7U M21 15 10 14 32 M W=254U L=12.7U M22 14 11 30 32 M W=241.3U L=12.7U M23 15 20 16 32 M W=19U L=38.1U M24 16 14 30 32 M W=406.4U L=12.7U M25 15 15 20 32 M W=38.1U L=42.7U M26 20 16 30 32 M W=381U L=25.4U M27 20 15 66 32 M W=22.9U L=7.6U CC 7 9 40PF CL 66 0 70PF VIN 21 0 DC -30MV AC 1 VCCP 15 0 DC +15 VCCN 30 0 DC -15 VB 32 0 DC -20 .MODEL M NMOS(NSUB=2.E15 UO=575 UCRIT=49K UEXP=0.1 TOX=0.11U + XJ=2.95U LEVEL=2 CGSO=1.5N CGDO=1.5N CBD=4.5F CBS=4.5F + LD=2.4485U NSS=3.2E10) .PLOT DC V(20) .PRINT AC VDB(20) VP(20) VDB(66) VP(66) .PLOT AC VDB(20) VP(20) VDB(66) VP(66) .END

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Appendix C PSPICE vs SPICE

The version of Spice referred to in this appendix is Spice 2G from the University of California at Berkeley. PSpice will run any circuit which Spice will run with these exceptions: 1) Circuits which use distortion (.DISTO) analysis. Also, the special distortion output variables (HD2, DIM3, etc.) are not available. 2) These options on the .OPTIONS statement are not available: a) LIMTIM it is assumed to be 0 b) LVLCOD no in-line machine code is generated c) METHOD trapezoidal integration is always used d) MAXORD trapezoidal integration is always used e) LVLTIM- truncation error time step control is always used f) ITL3 truncation error time step control is always used There are some features of Spice which are included in PSpice for compatibility, but are not included in this manual. These are: 1) The OFF and IC= options on device statements, and the UIC option on the .TRAN statement. These have been made obsolete by the .NODESET and .IC statements. 2) The IN= option on the .WIDTH statement. PSpice will give essentially the same results as Spice. There can be some small differences, especially for values crossing zero, due to the corrections made for convergence problems. The semiconductor device models are the same as in Spice.

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Appendix D User Changeable Models

D.1 Introduction This appendix describes how to install and use the user-changeable models option for PSpice. It only applies if you have purshased this option. This option is not an addition to PSpice. Rather, it is a different packaging of the program which gives you the source code for the device model subroutines. Note: you must have the Microsoft Fortran compiler to take advantage of this option. D.2 Installation Normally, PSpice comes as 2 executable files (PSPICE1.EXE and PSPICE2.EXE) plus some utility files. This option gives you the program in the form of many object files (PS1x.OBJ and PS2x.OBJ) and 2 linker command files (PSPICE1.LNK and PSPICE2.LNK). Installing this option consists of making PSPICE1.EXE and PSPICE2.EXE out of all the object files. The first step is to make backup copies of all the files. The files are on the diskettes labeled Diskette 3, 4, and 5. The files PSPICE1.LNK and PSPICE2.LNK list the object files to be linked in a particular order. You can change the link order if you wish, although you must not move any object file names from PSPICE1.LNK to PSPICE2.LNK or vice versa. The only restriction on order is that PS1A must come first in PSPICE1.LNK, PS2A must come first in PSPICE2.LNK, and PS1Z must come last in both. D.2.1 If you have a Fixed Disk In this case the installation is fairly easy. Copy all the object files into one directory. Copy the files PSPICE1.LNK and PSPICE2.LNK into the same directory. Copy the Fortran libray files DOSFOR.LIB, 8087.LIB, and FORTRAN.LIB into the same directory. These .LIB files come with the Microsoft Fortran compiler. Finally, do the link with the commands: LINK @PSPICE1.LNK LINK @PSPICE2.LNK This will produce PSPICE1.EXE and PSPICE2.EXE. D.2.2 If You Do Not Have a Fixed Disk
- 124 -

This case is more difficult because of the small size of the diskettes. PSPICE1.EXE is about 200kbytes large and PSPICE2.EXE is about 310kbytes. There are many ways to do the link. The basic idea is to gather the PSPICE1.LNK (or PSPICE2.LNK) file and as many .OBJ files as possible onto one diskette. The remaining .OBJ files, the Fortran library files, and the resulting .EXE file will go on the other diskette. The linker itself must be loaded from yet another diskette. Note that PSPICE1.LNK needs only the PS1x.OBJ files and PARAM.OBJ. PSPICE2.LNK needs only the PS2x.OBJ files and PS1B.OBJ, PS1C.OBJ, PS1E.OBJ, PS1G.OBJ, PS1H.OBJ and TMPUPD.OBJ, DIODE.OBJ, BJT.OBJ, JFET.OBJ, and MOS.OBJ. D.2.3 Preparing the Program Diskettes Once you have created PSPICE1.EXE and PSPICE2.EXE, you must put them on the Diskettes which came with the program. PSPICE1.EXE goes on Diskette 1 and on Backup Copy Diskette 1. PSPICE2.EXE goes on Diskette 2. The program diskettes are now the same as they are shipped without the user-changeable models option. To finish installation of the program, go to chapter 2 and follow the directions there. D.3 Making Device Model Changes The purpose of buying this option is to allow you to change the built-in model equations for one or more of the semiconductor devices. To get started, look at the file PARAM.FOR. This subroutine contains all the device parameters and all the model parameters. Although the tables are disturbingly long, they have a very regular structure and are actually easilly easy to change. For all cases discussed below, the procedure is to change PARAM.FOR and possibly one or more of the other .FOR files. Then, to compile the changed files. Finally, to go through the above installation procedure again. D.3.1 Changing a Parameter's Name This is the easiest change. Using the search feature of your favorite text editor, find each occurrence of the name in PARAM.FOR and change it. The changed name will now be used when a circuit is read-in and will appear when the model parameter values are echoed to the output file. D.3.2 Giving a Parameter an Alias Sometimes one would like a parameter to have an alternate name (an alias). Several bipolar model parameters, such as ISE, already have alternate names. The alias for ISE is C2. Look in PARAM.FOR at the occurrences of the parameters ISE and C2 for an example of how this is done. A new entry is made in the LOCMA, LOCMI, and LOCMR tables (don't forget to increase their sizes in the DIMENSION statement). However, the "new" parameter has the same LOCM offset as the alternate parameter,
- 125 -

and the LOCM block size is not increased. Note that when model parameters are exhoed the fist name found in PARAM.FOR (searching downward) for a given offset is the name which is echoed on the output. If you want the new name to appear, you should place it above the old one. D.3.3 Adding a Parameter This is probably the most common case. The parameter WD in the MOSFET LOCMA, LOCMI, and LOCMR tables provides an example. A new entry is made in the LOCMA, LOCMI, and LOCMR tables (don't forget to increase their sizes in the DIMENSION statement). Its offset must be set to the offset of the **SIZE** entry, and the offset of the **SIZE** entry must be increased by one. The new parameter will now be used during read-in, it will be echoed during print-out of model parameter values, and it will be available in the device subroutine. In the case of the parameter WD, see the subroutine MOSFET in the file MOS.FOR for an example of use. Note that its offset there is the same as was placed in the table in PARAM.FOR. D.3.4 Changing the Device Equations The device equations are in the file with the same name as the type of device (diode, bjt, jfet, mosfet). The code in these subroutines takes the model parameters and the node voltages and from these calculates the branch currents and conductances and, during transient analysis, the terminal charges and branch capacitances. These equations are neither simple nor easy. It is recommended that you already be familiar with UC Berkeley's Spice 2G before making such a change. Two useful references are: Spice: A Computer Program to Simulate Semiconductor Circuits. by Lawrence Nagel (memorandum No. ERL-M520) Program Reference for Spice2 by Ellis Cohen (memorandum No. ERL.M592) which are available by sending a check for $20.00 and $10.00, respectively, made out to: Regents of the University of California to this address Ms. Deborah Dunster EECS Industrial Liaison Program 457 Cory University of California Berkeley, CA 94720 Our experience has been that you should allow 8 weeks for delivery. Also, you should be aware that these references, useful as they are, contain some outdated information.
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PSpice PROGRAM LICENSE AGREEMENT

CAREFULLY READ ALL THE TERMS AND PROVISIONS OF THIS AGREEMENT BEFORE BREAKING THE DISKETTE SEAL. BREAKING THE DISKETTE SEAL INDICATES YOUR ACCEPTANCE OF THESE TERMS AND PROVISIONS. IF YOU DO NOT AGREE WITH THEM, PROMPTLY RETURN THE DISKETTE PACKAGE UNOPENED AND YOUR MONEY WILL BE REFUNDED. NO REFUNDS WILL BE GIVEN IF THE DISKETTE PACKAGE HAS BEEN OPENED OR IS MISSING ANY COMPONENTS. YOU MAY NOT USE, MODIFY, COPY OR TRANSFER THE USER'S GUIDE OR PROGRAM OR DOCUMENTATION, OR ANY COPY THEREOF EXCEPT AS EXPRESSLY PROVIDED IN THIS AGREEMENT. MicroSim Corporation is the exclusive owner of the mark "PSpice", and variations thereon, used in connection with computer programs, and for which trademark registration with the United States Patent and Trademark Office and the California Secretary of State is pending. The "PSpice" mark may not be used without a license, and no license for the "PSpice" mark is granted to you in this Agreement or otherwise. MicroSim Corporation is the exclusive owner of that certain computer program (as well as any past or future versions, changes, modifications, improvements, supplements, revisions, source code versions, object code versions and firmware) (the "Program") in connection with which its "PSpice" mark is used. The Program is a trade secret of MicroSim Corporation. MicroSim Corporation is the exclusive owner of that certain user's guide (as well as any past or future versions, changes, modifications, improvements, supplements and revisions) (the "User's Guide") for the program in connection with which the "PSpice" mark also is used. The Program and User's Guide are and shall remain the exclusive property of MicroSim Corporation and are published works of which MicroSim Corporation is the exclusive copyright owner. The attached diskette package contains two (2) "copy protected" diskettes, both of which contain the Program. If you have a fixed disk machine, you will be licensed to copy the Program onto your fixed disk for your use together with one "copy protected" diskette, and the other "copy protected" diskette containing the Program will be retained in your files for back-up purposes only. 1. LICENSE: MicroSim corporation hereby grants you a nontransferable, nonexclusive license to use the Program and User's Guide on only one (1) computer which you must own or lease. You shall not copy, reproduce, distribute, publish or translate the Program or User's Guide, except that you shall have the nontransferable, noexclusive right to make one (1) copy of the Program (but not the User's Guide) either for back-up purposes only or for use on your fixed disk machine only as set forth above, and your back-up copy shall be retaine in your files and not run on any computer. You may not electronically transfer the Program from one computer to another over a network. You may not distribute copies of the Program or User's Guide or any related documentation to others. You acknowledge that you must purchase from Microsim Corporation one (1) copy of the Program for each computer owned or leased by you on wish to run the Program, and that you do not have the right under this Agreement to otherwise to allow the Program to be run on any computer not owned or leased by you. You shall not change, modify or improve the Program or User's Guide without the prior written consent of MicroSim Corporation as to each such change, modification or improvement, which consent may be withheld in MicroSim Corporation's sole discretion. Any and all changes, modifications and improvements in the Program and User's Guide immediately upon their creation from time to time shall be and remain the sole and exclusive property of MicroSim Corporation without any separate or additional payment of any kind to you. 2. TERM: This license is effective until terminated. You may terminate it by destroying the Program and User's Guide and all copies thereof. This license also will terminate if you fail to comply with any term or condition of this Agreement. You agree upon such termination to destroy all copies of the Program and User's Guide. Termination of this license and/or this Agreement shall not relieve you of responsibility for violations incurred prior to termination. 3. NO WARRANTY: The Program and User's Guide are provided "as is" without warranty of any kind, either expressed or implied, including without limitation the implied warranties of merchantability and fitness for a particular purpose. The entire risk as to the quality and performance of the Program is with you. Should the Program prove defective, you (and not MicroSim Corporation or its dealers) assume the - 127 -

entire cost of all necessary servicing, repair or correction. MicroSim Corporation does not warrant, guarantee or make any representations regarding the use of or the results of the use of the Program in terms of corrections, accuracy, reliability, currentness or otherwise, and you rely upon the Program and results solely at your own risk. MicroSim Corporation does not warrant that the function contained in the Program will meet your requirements or that the operation of the program will be uninterrupted or error free. SOME STATES DO NOT ALLOW THE EXCLUSION OF IMPLIED WARRANTIES, SO THE ABOVE EXCLUSION MAY NOT APPLY TO YOU. 4. LIMITATION OF REMEDIES: IN NO EVENT WILL MICROSIM CORPORATION BE LIABLE TO YOU FOR ANY GENERAL, SPECIAL, CONSEQUENTIAL OR INCIDENTAL DAMAGES, INCLUDING ANY LOST PROFITS, LOST SAVINGS OR OTHER INCIDENTAL OR CONSEQUENTIAL DAMAGES, COSTS OR ATTORNEY'S FEES ARISING OUT OF THE OWNERSHIP, LICENSING, USE OF OR INABILITY TO USE THE PROGRAM OR USER'S GUIDE, EVEN IF MICROSIM CORPORATION OR ITS DEALER HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, OR FOR ANY CLAIM BY OTHER PARTY. SOME STATES DO NOT ALLOW THE LIMITATION OR EXCLUSION OF LIABILITY FOR INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE ABOVE LIMITATION OR EXCLUSION MAY NOT APPLY TO YOU. 5. GENERAL: You may not sublicense, assign, or transfer this license, the Program or the User's Guide, and any attempt to sublicense, assign or transfer any of the rights, duties or obligations hereunder is void. Nothing herein contained shall be deemed to constitute a franchise, partnership or joint venture between MicroSim Corporation and you nor shall anything herein contained be deemed to make either party the agent of the other. Any waiver of any provision hereof shall not be effective unless made expressly and in a written instrument executed in the name of the party sought to be charged. Failure of any party to insist, in any or more instances, or performance of any of the terms, covenants, or conditions of this Agreement shall not be construed as a waiver or relinquishment of any rights granted hereunder or of the future performance of any such term, covenant or condition, and the obligations of parties with respect thereto shall continue in full force and effect. No amendment, alteration or modification of this Agreement shall be valid in each instance such amendment, alteration or modification is expressed in a written instrument and duly executed in the name of the parties making such amendment, alteration or modification. If any provisions or any part of any provision of this Agreement is held to be unenforceable or invalid by a court of competent jurisdiction, the validity and enforceability of the enforceable portion of any such provision and/or the remaining provisions of this Ageement shall not be affected thereby. If a dispute arises under this Agreement, the prevailing party shall be entiled to recover its expenses, including attorney's fees, in addition to any other relief to which it is found entitled. This Ageement shall be governed by, subject to and interpreted in accordance with the laws of the State of California except to the extent governed by the United States Trademark Act of 1946, as amended, and the United States Copyright Act of 1976, as amended. If you have any questions concerning this Agreement, you may contact MicroSim corporation at 14101 Yorba Street, Suit 202, Tustin, California 92680. 6. ACKNOWLEDGEMENT: YOU ACKNOWLEDGE THAT YOU HAVE READ THIS AGREEMENT, UNDERSTAND IT AND AGREE TO BE BOUND BY ITS TERMS AND CONDITIONS. YOU ALSO AGREE THAT THIS AGREEMENT IS THE COMPLETE AND EXCLUSIVE STATEMENT OF AGREEMENT BETWEEN THE PARTIES AND SUPERSEDES ANY PROPOSAL OR PRIOR AGREEMENT, IF ANY, VERBAL OR WRITTEN, AND ANY OTHER COMMUNICATIONS BETWEEN THE PARTIES RELATING TO THE SUBJECT MATTER OF THIS AGREEMENT.

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